forked from GPUOpen-Drivers/llpc
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathPartPipeline.lgc
231 lines (197 loc) · 11.7 KB
/
PartPipeline.lgc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
; RUN: lgc -mcpu=gfx1030 -extract=2 -o %t.fs.elf %s
; RUN: lgc -mcpu=gfx1030 -extract=3 -other=%t.fs.elf -o %t.vs.elf %s
; RUN: lgc -mcpu=gfx1030 -extract=1 -l %s -o %t.pipe.elf %t.vs.elf %t.fs.elf
; RUN: lgcdis %t.pipe.elf | FileCheck %s
; The final linked pipeline ELF should have a GS that exports param 0 and
; a PS that reads attr0. This tests that separate part-pipeline compilation of
; the PS packs its inputs (the IR says read input location 1) and that information
; is passed through to the compilation of the VS via the -other option.
; Both the VS and FS have a symbol "table" in .rodata referred to by relocs in code;
; the linker appends the source ELF filename to the symbols to distinguish them.
; CHECK: .type _amdgpu_gs_main,@function
; CHECK: .type _amdgpu_ps_main,@function
; CHECK-LABEL: _amdgpu_gs_main:
; CHECK: .reloc {{.*}}, R_AMDGPU_REL32_LO, table.{{.*}}.vs.elf
; CHECK: .reloc {{.*}}, R_AMDGPU_REL32_HI, table.{{.*}}.vs.elf
; CHECK: exp param0 v
; CHECK-LABEL: _amdgpu_ps_main:
; CHECK: .reloc {{.*}}, R_AMDGPU_REL32_LO, table.{{.*}}.fs.elf
; CHECK: .reloc {{.*}}, R_AMDGPU_REL32_HI, table.{{.*}}.fs.elf
; CHECK-DAG: v_interp_p1_f32_e32 {{.*}}, attr0.x
; CHECK-DAG: v_interp_p1_f32_e32 {{.*}}, attr0.y
; CHECK-LABEL: .user_data_limit: 0xc
; ----------------------------------------------------------------------
; Extract 1: The reduced pipeline state for the link.
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn--amdpal"
; Metadata does not include user data nodes, as that is not needed for a link when the
; shaders were compiled with user data nodes.
!lgc.options = !{!0}
!lgc.options.FS = !{!1}
!lgc.options.VS = !{!4}
!lgc.color.export.formats = !{!18}
!lgc.vertex.inputs = !{!19, !20}
!lgc.input.assembly.state = !{!2}
!lgc.rasterizer.state = !{!21}
!0 = !{i32 -794094415, i32 0, i32 1583596299, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1}
!1 = !{i32 -1843601953, i32 337452067, i32 -1234379640, i32 1173800166}
!2 = !{i32 2}
!4 = !{i32 -225903757, i32 -647980161, i32 1491774676, i32 -114025882}
!18 = !{i32 10}
!19 = !{i32 0, i32 0, i32 0, i32 0, i32 13, i32 7, i32 -1}
!20 = !{i32 1, i32 0, i32 24, i32 0, i32 11, i32 7, i32 -1}
!21 = !{i32 0, i32 0, i32 0, i32 1}
!22 = !{i32 0}
; ----------------------------------------------------------------------
; Extract 2: The fragment shader and pipeline state relevant to it.
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn--amdpal"
%types.ResRet.f32.1 = type { float, float, float, float, i32 }
@table = internal unnamed_addr addrspace(4) constant [4 x <2 x float>] [<2 x float><float 1.125, float 1.25>, <2 x float><float 1.375, float 1.5>, <2 x float><float 1.625, float 1.75>, <2 x float><float 1.875, float 2.0>]
define dllexport void @lgc.shader.FS.main() !lgc.shaderstage !20 {
entry:
%SV_Target = alloca <4 x float>, align 16, addrspace(5)
%TEXCOORD = call <2 x float> (...) @lgc.create.read.generic.input.v2f32(i32 1, i32 0, i32 0, i32 1, i32 16, i32 undef)
%posx = extractelement <2 x float> %TEXCOORD, i32 0
%posxi = fptoui float %posx to i32
%mod = urem i32 %posxi, 4
%tableptr = getelementptr [4 x <2 x float>], [4 x <2 x float>] addrspace(4)* @table, i32 0, i32 %mod
%adj = load <2 x float>, <2 x float> addrspace(4)* %tableptr
%texcoordadj = fadd <2 x float> %TEXCOORD, %adj
%0 = extractelement <2 x float> %texcoordadj, i32 0
%1 = extractelement <2 x float> %texcoordadj, i32 1
%2 = call <8 x i32> addrspace(4)* (...) @lgc.create.get.desc.ptr.p4v8i32(i32 1, i32 0, i32 1)
%3 = load <8 x i32>, <8 x i32> addrspace(4)* %2, align 32
%4 = call <4 x i32> addrspace(4)* (...) @lgc.create.get.desc.ptr.p4v4i32(i32 2, i32 0, i32 2)
%5 = load <4 x i32>, <4 x i32> addrspace(4)* %4, align 16
%6 = insertelement <2 x float> undef, float %0, i64 0
%7 = insertelement <2 x float> %6, float %1, i64 1
%8 = call <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 0, <8 x i32> %3, <4 x i32> %5, i32 1, <2 x float> %7)
%9 = extractelement <4 x float> %8, i64 0
%10 = insertvalue %types.ResRet.f32.1 undef, float %9, 0
%11 = extractelement <4 x float> %8, i64 1
%12 = insertvalue %types.ResRet.f32.1 %10, float %11, 1
%13 = extractelement <4 x float> %8, i64 2
%14 = insertvalue %types.ResRet.f32.1 %12, float %13, 2
%15 = extractelement <4 x float> %8, i64 3
%16 = insertvalue %types.ResRet.f32.1 %14, float %15, 3
%17 = extractvalue %types.ResRet.f32.1 %16, 0
%18 = load <4 x float>, <4 x float> addrspace(5)* %SV_Target, align 16
%19 = insertelement <4 x float> %18, float %17, i8 0
store <4 x float> %19, <4 x float> addrspace(5)* %SV_Target, align 16
%20 = load <4 x float>, <4 x float> addrspace(5)* %SV_Target, align 16
%21 = insertelement <4 x float> %20, float %17, i8 1
store <4 x float> %21, <4 x float> addrspace(5)* %SV_Target, align 16
%22 = load <4 x float>, <4 x float> addrspace(5)* %SV_Target, align 16
%23 = insertelement <4 x float> %22, float %17, i8 2
store <4 x float> %23, <4 x float> addrspace(5)* %SV_Target, align 16
%24 = load <4 x float>, <4 x float> addrspace(5)* %SV_Target, align 16
%25 = insertelement <4 x float> %24, float 1.000000e+00, i8 3
store <4 x float> %25, <4 x float> addrspace(5)* %SV_Target, align 16
%26 = load <4 x float>, <4 x float> addrspace(5)* %SV_Target, align 16
call void (...) @lgc.create.write.generic.output(<4 x float> %26, i32 0, i32 0, i32 0, i32 1, i32 0, i32 undef)
ret void
}
; Function Attrs: nounwind readonly willreturn
declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #3
; Function Attrs: nounwind readnone
declare <8 x i32> addrspace(4)* @lgc.create.get.desc.ptr.p4v8i32(...) #1
; Function Attrs: nounwind readnone
declare <4 x i32> addrspace(4)* @lgc.create.get.desc.ptr.p4v4i32(...) #1
; Function Attrs: nounwind readonly willreturn
declare <4 x float> @lgc.create.image.sample.v4f32(...) #3
; Function Attrs: nounwind
declare void @lgc.create.write.generic.output(...) #2
attributes #0 = { nounwind readonly }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }
attributes #3 = { nounwind readonly willreturn }
; Metadata only includes parts that are relevant to the FS.
!lgc.unlinked = !{!2} ; !2 is 2, which is PipelineLink::PartPipeline
!lgc.options = !{!3}
!lgc.options.FS = !{!4}
!lgc.user.data.nodes = !{!10, !11, !14}
!lgc.color.export.formats = !{!19}
!2 = !{i32 2}
!3 = !{i32 -794094415, i32 0, i32 1583596299, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1}
!4 = !{i32 -1843601953, i32 337452067, i32 -1234379640, i32 1173800166}
!10 = !{!"DescriptorTableVaPtr", i32 11, i32 1, i32 1}
!11 = !{!"DescriptorResource", i32 0, i32 80, i32 0, i32 1, i32 8}
!14 = !{!"DescriptorSampler", i32 -1, i32 4, i32 0, i32 2, i32 4, i32 12288, i32 117436416, i32 1750073344, i32 -2147483648}
!19 = !{i32 10}
!20 = !{i32 6}
; ----------------------------------------------------------------------
; Extract 3: The vertex shader and pipeline state relevant to it.
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn--amdpal"
@table = internal unnamed_addr addrspace(4) constant [4 x <2 x float>] [<2 x float><float 0.125, float 0.25>, <2 x float><float 0.375, float 0.5>, <2 x float><float 0.625, float 0.75>, <2 x float><float 0.875, float 1.0>]
define dllexport void @lgc.shader.VS.main() !lgc.shaderstage !22 {
entry:
%TEXCOORD1 = alloca <2 x float>, align 8, addrspace(5)
%TEXCOORD = call <2 x float> (...) @lgc.create.read.generic.input.v2f32(i32 1, i32 0, i32 0, i32 1, i32 16, i32 undef)
%SV_Position = alloca <4 x float>, align 16, addrspace(5)
%POSITION = call <3 x float> (...) @lgc.create.read.generic.input.v3f32(i32 0, i32 0, i32 0, i32 1, i32 16, i32 undef)
%posx = extractelement <3 x float> %POSITION, i32 0
%posxi = fptoui float %posx to i32
%mod = urem i32 %posxi, 4
%tableptr = getelementptr [4 x <2 x float>], [4 x <2 x float>] addrspace(4)* @table, i32 0, i32 %mod
%adj = load <2 x float>, <2 x float> addrspace(4)* %tableptr
%texcoordadj = fadd <2 x float> %TEXCOORD, %adj
%0 = extractelement <3 x float> %POSITION, i32 0
%1 = extractelement <3 x float> %POSITION, i32 1
%2 = extractelement <3 x float> %POSITION, i32 2
%3 = load <4 x float>, <4 x float> addrspace(5)* %SV_Position, align 16
%4 = insertelement <4 x float> %3, float %0, i8 0
store <4 x float> %4, <4 x float> addrspace(5)* %SV_Position, align 16
%5 = load <4 x float>, <4 x float> addrspace(5)* %SV_Position, align 16
%6 = insertelement <4 x float> %5, float %1, i8 1
store <4 x float> %6, <4 x float> addrspace(5)* %SV_Position, align 16
%7 = load <4 x float>, <4 x float> addrspace(5)* %SV_Position, align 16
%8 = insertelement <4 x float> %7, float %2, i8 2
store <4 x float> %8, <4 x float> addrspace(5)* %SV_Position, align 16
%9 = load <4 x float>, <4 x float> addrspace(5)* %SV_Position, align 16
%10 = insertelement <4 x float> %9, float 1.000000e+00, i8 3
store <4 x float> %10, <4 x float> addrspace(5)* %SV_Position, align 16
%11 = extractelement <2 x float> %texcoordadj, i32 0
%12 = extractelement <2 x float> %texcoordadj, i32 1
%13 = load <2 x float>, <2 x float> addrspace(5)* %TEXCOORD1, align 8
%14 = insertelement <2 x float> %13, float %11, i8 0
store <2 x float> %14, <2 x float> addrspace(5)* %TEXCOORD1, align 8
%15 = load <2 x float>, <2 x float> addrspace(5)* %TEXCOORD1, align 8
%16 = insertelement <2 x float> %15, float %12, i8 1
store <2 x float> %16, <2 x float> addrspace(5)* %TEXCOORD1, align 8
%17 = load <4 x float>, <4 x float> addrspace(5)* %SV_Position, align 16
call void (...) @lgc.create.write.builtin.output(<4 x float> %17, i32 0, i32 0, i32 undef, i32 undef)
%18 = load <2 x float>, <2 x float> addrspace(5)* %TEXCOORD1, align 8
call void (...) @lgc.create.write.generic.output(<2 x float> %18, i32 1, i32 0, i32 0, i32 1, i32 0, i32 undef)
ret void
}
; Function Attrs: nounwind readonly willreturn
declare <3 x float> @lgc.create.read.generic.input.v3f32(...) #2
; Function Attrs: nounwind
declare void @lgc.create.write.builtin.output(...) #1
; Function Attrs: nounwind readonly willreturn
declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #2
; Function Attrs: nounwind
declare void @lgc.create.write.generic.output(...) #1
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind }
attributes #2 = { nounwind readonly willreturn }
; Metadata only includes parts that are relevant to the VS.
!lgc.unlinked = !{!2} ; !2 is 2, which is PipelineLink::PartPipeline
!lgc.options = !{!3}
!lgc.options.VS = !{!4}
!lgc.user.data.nodes = !{!10, !11, !14}
!lgc.vertex.inputs = !{!19, !20}
!lgc.input.assembly.state = !{!2}
!lgc.rasterizer.state = !{!21}
!2 = !{i32 2}
!3 = !{i32 -794094415, i32 0, i32 1583596299, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1}
!4 = !{i32 -225903757, i32 -647980161, i32 1491774676, i32 -114025882}
!10 = !{!"DescriptorTableVaPtr", i32 11, i32 1, i32 1}
!11 = !{!"DescriptorResource", i32 0, i32 80, i32 0, i32 1, i32 8}
!14 = !{!"DescriptorSampler", i32 -1, i32 4, i32 0, i32 2, i32 4, i32 12288, i32 117436416, i32 1750073344, i32 -2147483648}
!19 = !{i32 0, i32 0, i32 0, i32 0, i32 13, i32 7, i32 -1}
!20 = !{i32 1, i32 0, i32 24, i32 0, i32 11, i32 7, i32 -1}
!21 = !{i32 0, i32 0, i32 0, i32 1}
!22 = !{i32 1}