Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

SGMII design in Stratix 10 using Gx bank #205

Open
fpgapsyc opened this issue Apr 24, 2024 · 6 comments
Open

SGMII design in Stratix 10 using Gx bank #205

fpgapsyc opened this issue Apr 24, 2024 · 6 comments

Comments

@fpgapsyc
Copy link

Hi Alex,

In the examples design, i saw your 10g implementation using the native transceiver. Could you please let me know how i can do a similar design for 1G ethernet using SGMII interface using a GX bank.

Thanks

@alexforencich
Copy link
Owner

Unfortunately I don't have any soft IP for SGMII/1000BASE-X at the moment, so I recommend looking at Intel's soft IP. Presumably they have something for a 1G PCS/PMA, but I'm not sure if it's free-of-charge like the Xilinx one. I am looking at putting together soft IP for 1G to support dynamic switching between 1G and 10G as well as to support WR, but I have no timeline for that at the moment.

@fpgapsyc
Copy link
Author

I tried using the Intel Triple Speed Ethernet Ip but it only provides option for LVDS Serdes and not for GX bank. Can you help me how i can integrate the TBI interface with native transceiver IP.

I have configured the TSE as SGMII MAC and PCS. For the PMA what can i use?

@fpgapsyc
Copy link
Author

Hi Alex,

Waiting for your valuable suggestion on this. Please help me with the design generation.

@alexforencich
Copy link
Owner

alexforencich commented Apr 29, 2024

Buy, build, or contract?

Buy: Looks like https://www.intel.com/content/www/us/en/products/details/fpga/intellectual-property/interface-protocols/1g-10g.html or https://www.intel.com/content/www/us/en/partner/showcase/offering/a5b3b0000004cS2AAI/ethernet-pcs-1g25g.html would probably work. There are probably more options. Not sure about pricing on those - if you're affiliated with a university, you can probably get a license for the Intel 1G/10G core without too much trouble.

Build: I might be able to offer some guidance if you're potentially interested in building an open-source 1G PCS/PMA from scratch for inclusion in this repo.

Contract: I might also be able to build such a core under contract. I'm planning on implementing it anyway eventually, but currently I do not have a timeline for that.

@fpgapsyc
Copy link
Author

i Would like to build

@alexforencich
Copy link
Owner

Alright then, join the corundum zulip (https://corundum.zulipchat.com) and we can discuss in more detail.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants