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I am a newbie to axi-lite. I was trying to mimic the example figure in the documentation.
I have 1x1 crossbar. My master awchannel and wchannel are the following. From the slave side I assign awready and wready to 0. But I see these signals asserts themselves in master. Is it bug, or am I missing something?
// w_en signal is external signal from testbench.
// aw channel
always_ff @(posedge clk) begin
if (rst) begin
awaddr <= 32'h0;
awvalid <= 1'b0;
su_addr <= DEFAULT_VAL;
end
else if(w_en) begin
awvalid <= 1'b1;
awaddr <= su_addr;
end
else awvalid <= 1'b0;
end
// wchannel
always_ff @(posedge clk) begin
if(rst) begin
wvalid <= 1'b0;
su_data <= DEFAULT_VAL;
end
else if(w_en) begin
wvalid <= 1'b1;
wdata <= su_data;
end
else wvalid <= 1'b0;
end
The text was updated successfully, but these errors were encountered:
sazam0
changed the title
awready and wready set high without salve value
awready and wready set high in master without salve value
May 18, 2023
sazam0
changed the title
awready and wready set high in master without salve value
awready and wready set high in master without slave value
May 18, 2023
I am a newbie to axi-lite. I was trying to mimic the example figure in the documentation.
I have 1x1 crossbar. My master
awchannel
andwchannel
are the following. From the slave side I assignawready
andwready
to0
. But I see these signals asserts themselves in master. Is it bug, or am I missing something?The text was updated successfully, but these errors were encountered: