diff --git a/cranelift/codegen/src/isa/pulley_shared/abi.rs b/cranelift/codegen/src/isa/pulley_shared/abi.rs index 66b1cc113dc2..33470dc490e0 100644 --- a/cranelift/codegen/src/isa/pulley_shared/abi.rs +++ b/cranelift/codegen/src/isa/pulley_shared/abi.rs @@ -260,8 +260,10 @@ where Inst::gen_load(into_reg, mem, ty, MemFlags::trusted()).into() } - fn gen_store_base_offset(_base: Reg, _offset: i32, _from_reg: Reg, _ty: Type) -> Self::I { - todo!() + fn gen_store_base_offset(base: Reg, offset: i32, from_reg: Reg, ty: Type) -> Self::I { + let base = XReg::try_from(base).unwrap(); + let mem = Amode::RegOffset { base, offset }; + Inst::gen_store(mem, from_reg, ty, MemFlags::trusted()).into() } fn gen_sp_reg_adjust(amount: i32) -> SmallInstVec { diff --git a/cranelift/codegen/src/isa/pulley_shared/inst.isle b/cranelift/codegen/src/isa/pulley_shared/inst.isle index 384912269c71..89fdec3fe796 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst.isle +++ b/cranelift/codegen/src/isa/pulley_shared/inst.isle @@ -435,3 +435,33 @@ (decl gen_call_indirect (SigRef Value ValueSlice) InstOutput) (extern constructor gen_call_indirect gen_call_indirect) + +;;;; Helpers for Sign extension ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +;; Sign extend a `Value` to at least 32-bit +(decl zext32 (Value) XReg) +(rule (zext32 val @ (value_type $I8)) (pulley_zext8 val)) +(rule (zext32 val @ (value_type $I16)) (pulley_zext16 val)) +(rule (zext32 val @ (value_type $I32)) val) +(rule (zext32 val @ (value_type $I64)) val) + +;; Same as `zext32` but for sign-extension +(decl sext32 (Value) XReg) +(rule (sext32 val @ (value_type $I8)) (pulley_sext8 val)) +(rule (sext32 val @ (value_type $I16)) (pulley_sext16 val)) +(rule (sext32 val @ (value_type $I32)) val) +(rule (sext32 val @ (value_type $I64)) val) + +;; Sign extend a `Value` to at least 64-bit +(decl zext64 (Value) XReg) +(rule (zext64 val @ (value_type $I8)) (pulley_zext8 val)) +(rule (zext64 val @ (value_type $I16)) (pulley_zext16 val)) +(rule (zext64 val @ (value_type $I32)) (pulley_zext32 val)) +(rule (zext64 val @ (value_type $I64)) val) + +;; Same as `zext64` but for sign-extension +(decl sext64 (Value) XReg) +(rule (sext64 val @ (value_type $I8)) (pulley_sext8 val)) +(rule (sext64 val @ (value_type $I16)) (pulley_sext16 val)) +(rule (sext64 val @ (value_type $I32)) (pulley_sext32 val)) +(rule (sext64 val @ (value_type $I64)) val) diff --git a/cranelift/codegen/src/isa/pulley_shared/lower.isle b/cranelift/codegen/src/isa/pulley_shared/lower.isle index 8927345a19f9..1544695fa46f 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower.isle +++ b/cranelift/codegen/src/isa/pulley_shared/lower.isle @@ -12,17 +12,15 @@ ;; comparison must be made. Additionally if `Value` is smaller than 32-bits ;; then it must be sign-extended up to at least 32 bits. (decl lower_cond (Value) Cond) -(rule (lower_cond val @ (value_type $I64)) +(rule 0 (lower_cond val @ (value_type (fits_in_32 _))) (Cond.If32 (zext32 val))) +(rule 1 (lower_cond val @ (value_type $I64)) (Cond.IfXneq64 val (pulley_xconst8 0))) -(rule (lower_cond val @ (value_type $I32)) (Cond.If32 val)) -(rule (lower_cond val @ (value_type $I16)) (Cond.If32 (pulley_zext16 val))) -(rule (lower_cond val @ (value_type $I8)) (Cond.If32 (pulley_zext8 val))) ;; Peel away explicit `uextend` values to take a look at the inner value. -(rule 1 (lower_cond (uextend val)) (lower_cond val)) +(rule 2 (lower_cond (uextend val)) (lower_cond val)) ;; Conditional branches on `icmp`s. -(rule 1 (lower_cond (icmp cc a b @ (value_type $I32))) (lower_cond_icmp32 cc a b)) -(rule 1 (lower_cond (icmp cc a b @ (value_type $I64))) (lower_cond_icmp64 cc a b)) +(rule 2 (lower_cond (icmp cc a b @ (value_type $I32))) (lower_cond_icmp32 cc a b)) +(rule 2 (lower_cond (icmp cc a b @ (value_type $I64))) (lower_cond_icmp64 cc a b)) (decl lower_cond_icmp32 (IntCC Value Value) Cond) (rule (lower_cond_icmp32 (IntCC.Equal) a b) (Cond.IfXeq32 a b)) @@ -171,26 +169,36 @@ ;;;; Rules for `sdiv` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (sdiv a b))) (pulley_xdiv32_s a b)) -(rule (lower (has_type $I64 (sdiv a b))) (pulley_xdiv64_s a b)) +(rule 0 (lower (has_type (fits_in_32 _) (sdiv a b))) + (pulley_xdiv32_s (sext32 a) (sext32 b))) +(rule 1 (lower (has_type $I64 (sdiv a b))) (pulley_xdiv64_s a b)) ;;;; Rules for `srem` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (srem a b))) (pulley_xrem32_s a b)) -(rule (lower (has_type $I64 (srem a b))) (pulley_xrem64_s a b)) +(rule 0 (lower (has_type (fits_in_32 _) (srem a b))) + (pulley_xrem32_s (sext32 a) (sext32 b))) +(rule 1 (lower (has_type $I64 (srem a b))) (pulley_xrem64_s a b)) ;;;; Rules for `udiv` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (udiv a b))) (pulley_xdiv32_u a b)) -(rule (lower (has_type $I64 (udiv a b))) (pulley_xdiv64_u a b)) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (udiv a b))) + (pulley_xdiv32_u (zext32 a) (zext32 b))) +(rule 1 (lower (has_type $I64 (udiv a b))) (pulley_xdiv64_u a b)) ;;;; Rules for `urem` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (urem a b))) (pulley_xrem32_u a b)) -(rule (lower (has_type $I64 (urem a b))) (pulley_xrem64_u a b)) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (urem a b))) + (pulley_xrem32_u (zext32 a) (zext32 b))) +(rule 1 (lower (has_type $I64 (urem a b))) (pulley_xrem64_u a b)) ;;;; Rules for `ishl` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(rule (lower (has_type $I8 (ishl a b))) + (pulley_xshl32 a (pulley_xband32 b (pulley_xconst8 7)))) + +(rule (lower (has_type $I16 (ishl a b))) + (pulley_xshl32 a (pulley_xband32 b (pulley_xconst8 15)))) + (rule (lower (has_type $I32 (ishl a b))) (pulley_xshl32 a b)) @@ -204,6 +212,12 @@ ;;;; Rules for `ushr` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(rule (lower (has_type $I8 (ushr a b))) + (pulley_xshr32_u (zext32 a) (pulley_xband32 b (pulley_xconst8 7)))) + +(rule (lower (has_type $I16 (ushr a b))) + (pulley_xshr32_u (zext32 a) (pulley_xband32 b (pulley_xconst8 15)))) + (rule (lower (has_type $I32 (ushr a b))) (pulley_xshr32_u a b)) @@ -217,6 +231,12 @@ ;;;; Rules for `sshr` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(rule (lower (has_type $I8 (sshr a b))) + (pulley_xshr32_u (sext32 a) (pulley_xband32 b (pulley_xconst8 7)))) + +(rule (lower (has_type $I16 (sshr a b))) + (pulley_xshr32_u (sext32 a) (pulley_xband32 b (pulley_xconst8 15)))) + (rule (lower (has_type $I32 (sshr a b))) (pulley_xshr32_s a b)) @@ -262,38 +282,50 @@ ;;;; Rules for `umin` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (umin a b))) (pulley_xmin32_u a b)) -(rule (lower (has_type $I64 (umin a b))) (pulley_xmin64_u a b)) +(rule 0 (lower (has_type (fits_in_32 _) (umin a b))) + (pulley_xmin32_u (zext32 a) (zext32 b))) +(rule 1 (lower (has_type $I64 (umin a b))) (pulley_xmin64_u a b)) ;;;; Rules for `smin` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (smin a b))) (pulley_xmin32_s a b)) -(rule (lower (has_type $I64 (smin a b))) (pulley_xmin64_s a b)) +(rule 0 (lower (has_type (fits_in_32 _) (smin a b))) + (pulley_xmin32_s (sext32 a) (sext32 b))) +(rule 1 (lower (has_type $I64 (smin a b))) (pulley_xmin64_s a b)) ;;;; Rules for `umax` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (umax a b))) (pulley_xmax32_u a b)) -(rule (lower (has_type $I64 (umax a b))) (pulley_xmax64_u a b)) +(rule 0 (lower (has_type (fits_in_32 _) (umax a b))) + (pulley_xmax32_u (zext32 a) (zext32 b))) +(rule 1 (lower (has_type $I64 (umax a b))) (pulley_xmax64_u a b)) ;;;; Rules for `smax` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (smax a b))) (pulley_xmax32_s a b)) -(rule (lower (has_type $I64 (smax a b))) (pulley_xmax64_s a b)) +(rule 0 (lower (has_type (fits_in_32 _) (smax a b))) + (pulley_xmax32_s (sext32 a) (sext32 b))) +(rule 1 (lower (has_type $I64 (smax a b))) (pulley_xmax64_s a b)) ;;;; Rules for `ctz` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(rule (lower (has_type $I8 (ctz a))) + (pulley_xctz32 (pulley_xbor32 a (pulley_xconst16 0x100)))) +(rule (lower (has_type $I16 (ctz a))) + (pulley_xctz32 (pulley_xbor32 a (pulley_xconst32 0x10000)))) (rule (lower (has_type $I32 (ctz a))) (pulley_xctz32 a)) (rule (lower (has_type $I64 (ctz a))) (pulley_xctz64 a)) ;;;; Rules for `clz` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(rule (lower (has_type $I8 (clz a))) + (pulley_xsub32 (pulley_xclz32 (zext32 a)) (pulley_xconst8 24))) +(rule (lower (has_type $I16 (clz a))) + (pulley_xsub32 (pulley_xclz32 (zext32 a)) (pulley_xconst8 16))) (rule (lower (has_type $I32 (clz a))) (pulley_xclz32 a)) (rule (lower (has_type $I64 (clz a))) (pulley_xclz64 a)) ;;;; Rules for `popcnt` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (popcnt a))) (pulley_xpopcnt32 a)) -(rule (lower (has_type $I64 (popcnt a))) (pulley_xpopcnt64 a)) +(rule 0 (lower (has_type (fits_in_32 _) (popcnt a))) (pulley_xpopcnt32 (zext32 a))) +(rule 1 (lower (has_type $I64 (popcnt a))) (pulley_xpopcnt64 a)) ;;;; Rules for `rotl` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -309,8 +341,8 @@ (rule 1 (lower (icmp cc a b @ (value_type $I64))) (lower_icmp $I64 cc a b)) -(rule (lower (icmp cc a b @ (value_type (fits_in_32 _)))) - (lower_icmp $I32 cc a b)) +(rule (lower (icmp cc a b @ (value_type (ty_int (fits_in_32 ty))))) + (lower_icmp ty cc a b)) (decl lower_icmp (Type IntCC Value Value) XReg) @@ -332,23 +364,23 @@ (rule (lower_icmp $I64 (IntCC.UnsignedLessThanOrEqual) a b) (pulley_xulteq64 a b)) -(rule (lower_icmp $I32 (IntCC.Equal) a b) - (pulley_xeq32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.Equal) a b) + (pulley_xeq32 (zext32 a) (zext32 b))) -(rule (lower_icmp $I32 (IntCC.NotEqual) a b) - (pulley_xneq32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.NotEqual) a b) + (pulley_xneq32 (zext32 a) (zext32 b))) -(rule (lower_icmp $I32 (IntCC.SignedLessThan) a b) - (pulley_xslt32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.SignedLessThan) a b) + (pulley_xslt32 (sext32 a) (sext32 b))) -(rule (lower_icmp $I32 (IntCC.SignedLessThanOrEqual) a b) - (pulley_xslteq32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.SignedLessThanOrEqual) a b) + (pulley_xslteq32 (sext32 a) (sext32 b))) -(rule (lower_icmp $I32 (IntCC.UnsignedLessThan) a b) - (pulley_xult32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.UnsignedLessThan) a b) + (pulley_xult32 (zext32 a) (zext32 b))) -(rule (lower_icmp $I32 (IntCC.UnsignedLessThanOrEqual) a b) - (pulley_xulteq32 a b)) +(rule 1 (lower_icmp (fits_in_32 _) (IntCC.UnsignedLessThanOrEqual) a b) + (pulley_xulteq32 (zext32 a) (zext32 b))) ;; Pulley doesn't have instructions for `>` and `>=`, so we have to reverse the ;; operation. @@ -470,25 +502,19 @@ ;;;; Rules for `uextend` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type (fits_in_64 _) (uextend val @ (value_type $I32)))) - (pulley_zext32 val)) +(rule 0 (lower (has_type (fits_in_32 _) (uextend val))) + (zext32 val)) -(rule (lower (has_type (fits_in_64 _) (uextend val @ (value_type $I16)))) - (pulley_zext16 val)) - -(rule (lower (has_type (fits_in_64 _) (uextend val @ (value_type $I8)))) - (pulley_zext8 val)) +(rule 1 (lower (has_type $I64 (uextend val))) + (zext64 val)) ;;;; Rules for `sextend` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type (fits_in_64 _) (sextend val @ (value_type $I8)))) - (pulley_sext8 val)) - -(rule (lower (has_type (fits_in_64 _) (sextend val @ (value_type $I16)))) - (pulley_sext16 val)) +(rule 0 (lower (has_type (fits_in_32 _) (sextend val))) + (sext32 val)) -(rule (lower (has_type (fits_in_64 _) (sextend val @ (value_type $I32)))) - (pulley_sext32 val)) +(rule 1 (lower (has_type $I64 (sextend val))) + (sext64 val)) ;;;; Rules for `ireduce` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -551,6 +577,8 @@ (rule 1 (lower (has_type (ty_vec128 _) (bitcast _flags val @ (value_type (ty_vec128 _))))) val) +(rule 2 (lower (has_type ty (bitcast _flags a @ (value_type ty)))) a) + ;;;; Rules for `fcvt_to_{u,s}int` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (rule (lower (has_type $I32 (fcvt_to_uint val @ (value_type $F32)))) @@ -711,8 +739,8 @@ ;;;; Rules for `ineg` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type $I32 (ineg a))) (pulley_xneg32 a)) -(rule (lower (has_type $I64 (ineg a))) (pulley_xneg64 a)) +(rule 0 (lower (has_type (fits_in_32 _) (ineg a))) (pulley_xneg32 (sext32 a))) +(rule 1 (lower (has_type $I64 (ineg a))) (pulley_xneg64 a)) ;;;; Rules for `fabs` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -722,3 +750,22 @@ ;;;; Rules for `vconst` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (rule (lower (has_type (ty_vec128 _) (vconst (u128_from_constant a)))) (pulley_vconst128 a)) + +;;;; Rules for `bmask` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (bmask a))) + (pulley_xbmask32 (zext32 a))) +(rule 1 (lower (has_type $I64 (bmask a))) + (pulley_xbmask64 (zext64 a))) + +;;;; Rules for `bswap` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +(rule (lower (has_type $I16 (bswap a))) + (pulley_xshr32_u (pulley_bswap32 a) (pulley_xconst8 16))) +(rule (lower (has_type $I32 (bswap a))) (pulley_bswap32 a)) +(rule (lower (has_type $I64 (bswap a))) (pulley_bswap64 a)) + +;;;; Rules for `iabs` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +(rule 0 (lower (has_type (fits_in_32 _) (iabs a))) (pulley_xabs32 (sext32 a))) +(rule 1 (lower (has_type $I64 (iabs a))) (pulley_xabs64 a)) diff --git a/cranelift/filetests/filetests/isa/pulley32/brif.clif b/cranelift/filetests/filetests/isa/pulley32/brif.clif index 3a0bf0bceef8..b7c86f7513c1 100644 --- a/cranelift/filetests/filetests/isa/pulley32/brif.clif +++ b/cranelift/filetests/filetests/isa/pulley32/brif.clif @@ -143,9 +143,11 @@ block2: ; VCode: ; block0: -; xeq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, label2; jump label1 +; zext8 x6, x0 +; zext8 x8, x1 +; xeq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, label2; jump label1 ; block1: ; xconst8 x0, 0 ; ret @@ -154,9 +156,11 @@ block2: ; ret ; ; Disassembled: -; xeq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, 0xa // target = 0x10 +; zext8 x6, x0 +; zext8 x8, x1 +; xeq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, 0xa // target = 0x16 ; xconst8 x0, 0 ; ret ; xconst8 x0, 1 @@ -178,9 +182,11 @@ block2: ; VCode: ; block0: -; xneq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, label2; jump label1 +; zext16 x6, x0 +; zext16 x8, x1 +; xneq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, label2; jump label1 ; block1: ; xconst8 x0, 0 ; ret @@ -189,9 +195,11 @@ block2: ; ret ; ; Disassembled: -; xneq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, 0xa // target = 0x10 +; zext16 x6, x0 +; zext16 x8, x1 +; xneq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, 0xa // target = 0x16 ; xconst8 x0, 0 ; ret ; xconst8 x0, 1 diff --git a/cranelift/filetests/filetests/isa/pulley32/icmp.clif b/cranelift/filetests/filetests/isa/pulley32/icmp.clif index 8f2363f9e7db..fbf7add50292 100644 --- a/cranelift/filetests/filetests/isa/pulley32/icmp.clif +++ b/cranelift/filetests/filetests/isa/pulley32/icmp.clif @@ -9,11 +9,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xeq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xeq32 x0, x3, x5 ; ret ; ; Disassembled: -; xeq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xeq32 x0, x3, x5 ; ret function %i16_eq(i16, i16) -> i8 { @@ -24,11 +28,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xeq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xeq32 x0, x3, x5 ; ret ; ; Disassembled: -; xeq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xeq32 x0, x3, x5 ; ret function %i32_eq(i32, i32) -> i8 { @@ -69,11 +77,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xneq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xneq32 x0, x3, x5 ; ret ; ; Disassembled: -; xneq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xneq32 x0, x3, x5 ; ret function %i16_ne(i16, i16) -> i8 { @@ -84,11 +96,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xneq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xneq32 x0, x3, x5 ; ret ; ; Disassembled: -; xneq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xneq32 x0, x3, x5 ; ret function %i32_ne(i32, i32) -> i8 { @@ -129,11 +145,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xult32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xult32 x0, x3, x5 ; ret function %i16_ult(i16, i16) -> i8 { @@ -144,11 +164,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xult32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xult32 x0, x3, x5 ; ret function %i32_ult(i32, i32) -> i8 { @@ -189,11 +213,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xulteq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xulteq32 x0, x3, x5 ; ret function %i16_ule(i16, i16) -> i8 { @@ -204,11 +232,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xulteq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xulteq32 x0, x3, x5 ; ret function %i32_ule(i32, i32) -> i8 { @@ -249,11 +281,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslt32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslt32 x0, x3, x5 ; ret function %i16_slt(i16, i16) -> i8 { @@ -264,11 +300,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslt32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslt32 x0, x3, x5 ; ret function %i32_slt(i32, i32) -> i8 { @@ -309,11 +349,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslteq32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslteq32 x0, x3, x5 ; ret function %i16_sle(i16, i16) -> i8 { @@ -324,11 +368,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslteq32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslteq32 x0, x3, x5 ; ret function %i32_sle(i32, i32) -> i8 { @@ -369,11 +417,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xult32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xult32 x0, x3, x5 ; ret function %i16_ugt(i16, i16) -> i8 { @@ -384,11 +436,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xult32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xult32 x0, x3, x5 ; ret function %i32_ugt(i32, i32) -> i8 { @@ -429,11 +485,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslt32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslt32 x0, x3, x5 ; ret function %i16_sgt(i16, i16) -> i8 { @@ -444,11 +504,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslt32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslt32 x0, x3, x5 ; ret function %i32_sgt(i32, i32) -> i8 { @@ -489,11 +553,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xulteq32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xulteq32 x0, x3, x5 ; ret function %i16_uge(i16, i16) -> i8 { @@ -504,11 +572,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xulteq32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xulteq32 x0, x3, x5 ; ret function %i32_uge(i32, i32) -> i8 { @@ -549,11 +621,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslteq32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslteq32 x0, x3, x5 ; ret function %i16_sge(i16, i16) -> i8 { @@ -564,11 +640,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslteq32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslteq32 x0, x3, x5 ; ret function %i32_sge(i32, i32) -> i8 { diff --git a/cranelift/filetests/filetests/isa/pulley64/brif.clif b/cranelift/filetests/filetests/isa/pulley64/brif.clif index 9634f0bc25ea..d8cea25a080e 100644 --- a/cranelift/filetests/filetests/isa/pulley64/brif.clif +++ b/cranelift/filetests/filetests/isa/pulley64/brif.clif @@ -143,9 +143,11 @@ block2: ; VCode: ; block0: -; xeq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, label2; jump label1 +; zext8 x6, x0 +; zext8 x8, x1 +; xeq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, label2; jump label1 ; block1: ; xconst8 x0, 0 ; ret @@ -154,9 +156,11 @@ block2: ; ret ; ; Disassembled: -; xeq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, 0xa // target = 0x10 +; zext8 x6, x0 +; zext8 x8, x1 +; xeq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, 0xa // target = 0x16 ; xconst8 x0, 0 ; ret ; xconst8 x0, 1 @@ -178,9 +182,11 @@ block2: ; VCode: ; block0: -; xneq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, label2; jump label1 +; zext16 x6, x0 +; zext16 x8, x1 +; xneq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, label2; jump label1 ; block1: ; xconst8 x0, 0 ; ret @@ -189,9 +195,11 @@ block2: ; ret ; ; Disassembled: -; xneq32 x6, x0, x1 -; zext8 x6, x6 -; br_if32 x6, 0xa // target = 0x10 +; zext16 x6, x0 +; zext16 x8, x1 +; xneq32 x10, x6, x8 +; zext8 x8, x10 +; br_if32 x8, 0xa // target = 0x16 ; xconst8 x0, 0 ; ret ; xconst8 x0, 1 diff --git a/cranelift/filetests/filetests/isa/pulley64/icmp.clif b/cranelift/filetests/filetests/isa/pulley64/icmp.clif index badfa73b3ceb..6d15d5661fcf 100644 --- a/cranelift/filetests/filetests/isa/pulley64/icmp.clif +++ b/cranelift/filetests/filetests/isa/pulley64/icmp.clif @@ -9,11 +9,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xeq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xeq32 x0, x3, x5 ; ret ; ; Disassembled: -; xeq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xeq32 x0, x3, x5 ; ret function %i16_eq(i16, i16) -> i8 { @@ -24,11 +28,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xeq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xeq32 x0, x3, x5 ; ret ; ; Disassembled: -; xeq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xeq32 x0, x3, x5 ; ret function %i32_eq(i32, i32) -> i8 { @@ -69,11 +77,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xneq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xneq32 x0, x3, x5 ; ret ; ; Disassembled: -; xneq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xneq32 x0, x3, x5 ; ret function %i16_ne(i16, i16) -> i8 { @@ -84,11 +96,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xneq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xneq32 x0, x3, x5 ; ret ; ; Disassembled: -; xneq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xneq32 x0, x3, x5 ; ret function %i32_ne(i32, i32) -> i8 { @@ -129,11 +145,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xult32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xult32 x0, x3, x5 ; ret function %i16_ult(i16, i16) -> i8 { @@ -144,11 +164,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xult32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xult32 x0, x3, x5 ; ret function %i32_ult(i32, i32) -> i8 { @@ -189,11 +213,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xulteq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x0, x1 +; zext8 x3, x0 +; zext8 x5, x1 +; xulteq32 x0, x3, x5 ; ret function %i16_ule(i16, i16) -> i8 { @@ -204,11 +232,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xulteq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x0, x1 +; zext16 x3, x0 +; zext16 x5, x1 +; xulteq32 x0, x3, x5 ; ret function %i32_ule(i32, i32) -> i8 { @@ -249,11 +281,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslt32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslt32 x0, x3, x5 ; ret function %i16_slt(i16, i16) -> i8 { @@ -264,11 +300,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslt32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslt32 x0, x3, x5 ; ret function %i32_slt(i32, i32) -> i8 { @@ -309,11 +349,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslteq32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x0, x1 +; sext8 x3, x0 +; sext8 x5, x1 +; xslteq32 x0, x3, x5 ; ret function %i16_sle(i16, i16) -> i8 { @@ -324,11 +368,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslteq32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x0, x1 +; sext16 x3, x0 +; sext16 x5, x1 +; xslteq32 x0, x3, x5 ; ret function %i32_sle(i32, i32) -> i8 { @@ -369,11 +417,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xult32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xult32 x0, x3, x5 ; ret function %i16_ugt(i16, i16) -> i8 { @@ -384,11 +436,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xult32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xult32 x0, x3, x5 ; ret ; ; Disassembled: -; xult32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xult32 x0, x3, x5 ; ret function %i32_ugt(i32, i32) -> i8 { @@ -429,11 +485,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslt32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslt32 x0, x3, x5 ; ret function %i16_sgt(i16, i16) -> i8 { @@ -444,11 +504,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslt32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslt32 x0, x3, x5 ; ret ; ; Disassembled: -; xslt32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslt32 x0, x3, x5 ; ret function %i32_sgt(i32, i32) -> i8 { @@ -489,11 +553,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xulteq32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x1, x0 +; zext8 x3, x1 +; zext8 x5, x0 +; xulteq32 x0, x3, x5 ; ret function %i16_uge(i16, i16) -> i8 { @@ -504,11 +572,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xulteq32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xulteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xulteq32 x0, x1, x0 +; zext16 x3, x1 +; zext16 x5, x0 +; xulteq32 x0, x3, x5 ; ret function %i32_uge(i32, i32) -> i8 { @@ -549,11 +621,15 @@ block0(v0: i8, v1: i8): ; VCode: ; block0: -; xslteq32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x1, x0 +; sext8 x3, x1 +; sext8 x5, x0 +; xslteq32 x0, x3, x5 ; ret function %i16_sge(i16, i16) -> i8 { @@ -564,11 +640,15 @@ block0(v0: i16, v1: i16): ; VCode: ; block0: -; xslteq32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslteq32 x0, x3, x5 ; ret ; ; Disassembled: -; xslteq32 x0, x1, x0 +; sext16 x3, x1 +; sext16 x5, x0 +; xslteq32 x0, x3, x5 ; ret function %i32_sge(i32, i32) -> i8 { diff --git a/cranelift/filetests/filetests/runtests/alias.clif b/cranelift/filetests/filetests/runtests/alias.clif index f556cbbb90d7..be80713ad82d 100644 --- a/cranelift/filetests/filetests/runtests/alias.clif +++ b/cranelift/filetests/filetests/runtests/alias.clif @@ -4,6 +4,10 @@ target aarch64 target s390x target x86_64 target riscv64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %alias(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/arithmetic-extends.clif b/cranelift/filetests/filetests/runtests/arithmetic-extends.clif index 4c545947d584..8249483b74c9 100644 --- a/cranelift/filetests/filetests/runtests/arithmetic-extends.clif +++ b/cranelift/filetests/filetests/runtests/arithmetic-extends.clif @@ -6,6 +6,10 @@ target x86_64 target riscv64 target riscv64 has_zba target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ;; Various runtests intended to target the instructions encoded by the RISC-V `Zba` Extension ;; Although other targets may also benefit from these tests and may implement similar optimizations diff --git a/cranelift/filetests/filetests/runtests/arithmetic.clif b/cranelift/filetests/filetests/runtests/arithmetic.clif index 5b63c91445d1..79674e03a317 100644 --- a/cranelift/filetests/filetests/runtests/arithmetic.clif +++ b/cranelift/filetests/filetests/runtests/arithmetic.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 has_m target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %add_i64(i64, i64) -> i64 { block0(v0: i64,v1: i64): diff --git a/cranelift/filetests/filetests/runtests/bb-padding.clif b/cranelift/filetests/filetests/runtests/bb-padding.clif index 3bb3836a2f1a..1e93143c5486 100644 --- a/cranelift/filetests/filetests/runtests/bb-padding.clif +++ b/cranelift/filetests/filetests/runtests/bb-padding.clif @@ -7,6 +7,10 @@ target x86_64 set enable_multi_ret_implicit_sret target riscv64 has_v target riscv64 has_v has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ret_big_number() -> i64x2 { block0: diff --git a/cranelift/filetests/filetests/runtests/bitcast.clif b/cranelift/filetests/filetests/runtests/bitcast.clif index 77bd19d892c7..117e630db128 100644 --- a/cranelift/filetests/filetests/runtests/bitcast.clif +++ b/cranelift/filetests/filetests/runtests/bitcast.clif @@ -6,6 +6,10 @@ target x86_64 has_avx target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bitcast_if32(i32) -> f32 { block0(v0: i32): diff --git a/cranelift/filetests/filetests/runtests/bitops.clif b/cranelift/filetests/filetests/runtests/bitops.clif index 33a52a3f25c6..f33cf26692c8 100644 --- a/cranelift/filetests/filetests/runtests/bitops.clif +++ b/cranelift/filetests/filetests/runtests/bitops.clif @@ -6,6 +6,10 @@ target riscv64 target riscv64 has_c has_zcb target s390x has_mie2 target x86_64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be set opt_level=speed target aarch64 @@ -14,6 +18,10 @@ target riscv64 target riscv64 has_c has_zcb target s390x has_mie2 target x86_64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bnot_band() -> i8 { block0: diff --git a/cranelift/filetests/filetests/runtests/bmask.clif b/cranelift/filetests/filetests/runtests/bmask.clif index 648d99b32259..9be3b378f21c 100644 --- a/cranelift/filetests/filetests/runtests/bmask.clif +++ b/cranelift/filetests/filetests/runtests/bmask.clif @@ -5,6 +5,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bmask_i64_i64(i64) -> i64 { block0(v0: i64): diff --git a/cranelift/filetests/filetests/runtests/bnot.clif b/cranelift/filetests/filetests/runtests/bnot.clif index 72b79b8824d5..1ad506248ad8 100644 --- a/cranelift/filetests/filetests/runtests/bnot.clif +++ b/cranelift/filetests/filetests/runtests/bnot.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bnot_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/br_table.clif b/cranelift/filetests/filetests/runtests/br_table.clif index e9f7184310c0..855f67f6ebe2 100644 --- a/cranelift/filetests/filetests/runtests/br_table.clif +++ b/cranelift/filetests/filetests/runtests/br_table.clif @@ -6,6 +6,10 @@ target x86_64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %br_table_i32(i32) -> i32 { block0(v0: i32): diff --git a/cranelift/filetests/filetests/runtests/bswap.clif b/cranelift/filetests/filetests/runtests/bswap.clif index 570cae6e5c65..9d7a38eebe75 100644 --- a/cranelift/filetests/filetests/runtests/bswap.clif +++ b/cranelift/filetests/filetests/runtests/bswap.clif @@ -7,6 +7,10 @@ target s390x target riscv64 target riscv64 has_zbb target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bswap_i16(i16) -> i16 { block0(v0: i16): diff --git a/cranelift/filetests/filetests/runtests/ceil.clif b/cranelift/filetests/filetests/runtests/ceil.clif index 9ac7f24a32a9..ddb5d6cd14f8 100644 --- a/cranelift/filetests/filetests/runtests/ceil.clif +++ b/cranelift/filetests/filetests/runtests/ceil.clif @@ -9,6 +9,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ceil_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/clz.clif b/cranelift/filetests/filetests/runtests/clz.clif index 761fa70bd114..5ed66600eb31 100644 --- a/cranelift/filetests/filetests/runtests/clz.clif +++ b/cranelift/filetests/filetests/runtests/clz.clif @@ -7,6 +7,10 @@ target x86_64 has_lzcnt target riscv64 target riscv64 has_zbb target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %clz_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/const.clif b/cranelift/filetests/filetests/runtests/const.clif index 487c02e5d075..451c4e03d488 100644 --- a/cranelift/filetests/filetests/runtests/const.clif +++ b/cranelift/filetests/filetests/runtests/const.clif @@ -4,6 +4,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %i8_iconst_0() -> i8 { block0: diff --git a/cranelift/filetests/filetests/runtests/conversion.clif b/cranelift/filetests/filetests/runtests/conversion.clif index 5b4a554e080f..e6b717bfe157 100644 --- a/cranelift/filetests/filetests/runtests/conversion.clif +++ b/cranelift/filetests/filetests/runtests/conversion.clif @@ -6,6 +6,10 @@ target x86_64 target x86_64 has_avx target riscv64 has_c has_zcb target riscv64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %f32_to_i32(f32) -> i32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/ctz.clif b/cranelift/filetests/filetests/runtests/ctz.clif index ae1db7b9015e..42d33a988b76 100644 --- a/cranelift/filetests/filetests/runtests/ctz.clif +++ b/cranelift/filetests/filetests/runtests/ctz.clif @@ -8,6 +8,10 @@ target riscv64 target riscv64 has_zbb target riscv64 has_zbb has_zbs target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ctz_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/div-checks.clif b/cranelift/filetests/filetests/runtests/div-checks.clif index 29ea3b8c987d..fc1dc9b12cff 100644 --- a/cranelift/filetests/filetests/runtests/div-checks.clif +++ b/cranelift/filetests/filetests/runtests/div-checks.clif @@ -4,6 +4,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/extend.clif b/cranelift/filetests/filetests/runtests/extend.clif index 710c33d9a8e9..f13a2efc65e4 100644 --- a/cranelift/filetests/filetests/runtests/extend.clif +++ b/cranelift/filetests/filetests/runtests/extend.clif @@ -8,6 +8,10 @@ target riscv64 has_zba target riscv64 has_zbb target riscv64 has_zbkb target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ;;;; basic uextend diff --git a/cranelift/filetests/filetests/runtests/f32const.clif b/cranelift/filetests/filetests/runtests/f32const.clif index d457ba83c424..b88f34ca0bb7 100644 --- a/cranelift/filetests/filetests/runtests/f32const.clif +++ b/cranelift/filetests/filetests/runtests/f32const.clif @@ -7,6 +7,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ;; These values are special for RISC-V since it has a dedicated diff --git a/cranelift/filetests/filetests/runtests/f64const.clif b/cranelift/filetests/filetests/runtests/f64const.clif index 50e45aafc76c..07b050300fd5 100644 --- a/cranelift/filetests/filetests/runtests/f64const.clif +++ b/cranelift/filetests/filetests/runtests/f64const.clif @@ -7,6 +7,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ;; These values are special for RISC-V since it has a dedicated diff --git a/cranelift/filetests/filetests/runtests/fabs.clif b/cranelift/filetests/filetests/runtests/fabs.clif index 205c510868cb..0fda48787146 100644 --- a/cranelift/filetests/filetests/runtests/fabs.clif +++ b/cranelift/filetests/filetests/runtests/fabs.clif @@ -6,6 +6,10 @@ target x86_64 has_avx target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fabs_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/fadd.clif b/cranelift/filetests/filetests/runtests/fadd.clif index dff97b183efe..c82229c1b22a 100644 --- a/cranelift/filetests/filetests/runtests/fadd.clif +++ b/cranelift/filetests/filetests/runtests/fadd.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fadd_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcmp-eq.clif b/cranelift/filetests/filetests/runtests/fcmp-eq.clif index e5c082818d4c..d82cd3e30133 100644 --- a/cranelift/filetests/filetests/runtests/fcmp-eq.clif +++ b/cranelift/filetests/filetests/runtests/fcmp-eq.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcmp_eq_f32(f32, f32) -> i8 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcmp-gt.clif b/cranelift/filetests/filetests/runtests/fcmp-gt.clif index 310bd5884c6a..45014892184c 100644 --- a/cranelift/filetests/filetests/runtests/fcmp-gt.clif +++ b/cranelift/filetests/filetests/runtests/fcmp-gt.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcmp_gt_f32(f32, f32) -> i8 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcmp-le.clif b/cranelift/filetests/filetests/runtests/fcmp-le.clif index 32356ef7de7a..0d9a370174d5 100644 --- a/cranelift/filetests/filetests/runtests/fcmp-le.clif +++ b/cranelift/filetests/filetests/runtests/fcmp-le.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcmp_le_f32(f32, f32) -> i8 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcmp-lt.clif b/cranelift/filetests/filetests/runtests/fcmp-lt.clif index 95cbf66c5a67..dd1aa6f5c539 100644 --- a/cranelift/filetests/filetests/runtests/fcmp-lt.clif +++ b/cranelift/filetests/filetests/runtests/fcmp-lt.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcmp_lt_f32(f32, f32) -> i8 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcmp-ne.clif b/cranelift/filetests/filetests/runtests/fcmp-ne.clif index bbcdb9c9fa73..ef92a76bcdf8 100644 --- a/cranelift/filetests/filetests/runtests/fcmp-ne.clif +++ b/cranelift/filetests/filetests/runtests/fcmp-ne.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcmp_ne_f32(f32, f32) -> i8 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fcopysign.clif b/cranelift/filetests/filetests/runtests/fcopysign.clif index 3ad3ed862edb..670cfdf38799 100644 --- a/cranelift/filetests/filetests/runtests/fcopysign.clif +++ b/cranelift/filetests/filetests/runtests/fcopysign.clif @@ -6,6 +6,10 @@ target x86_64 has_avx target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fcopysign_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fdemote.clif b/cranelift/filetests/filetests/runtests/fdemote.clif index 11e3907d5020..74bc4c9cb03a 100644 --- a/cranelift/filetests/filetests/runtests/fdemote.clif +++ b/cranelift/filetests/filetests/runtests/fdemote.clif @@ -5,6 +5,10 @@ target x86_64 has_avx target s390x target aarch64 target riscv64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fdemote(f64) -> f32 { diff --git a/cranelift/filetests/filetests/runtests/fdiv.clif b/cranelift/filetests/filetests/runtests/fdiv.clif index 3993a15c0d94..7f278c7f4f40 100644 --- a/cranelift/filetests/filetests/runtests/fdiv.clif +++ b/cranelift/filetests/filetests/runtests/fdiv.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fdiv_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/floor.clif b/cranelift/filetests/filetests/runtests/floor.clif index 3c49a0a9d21e..8c79f93a873c 100644 --- a/cranelift/filetests/filetests/runtests/floor.clif +++ b/cranelift/filetests/filetests/runtests/floor.clif @@ -9,6 +9,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %floor_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/fmax.clif b/cranelift/filetests/filetests/runtests/fmax.clif index e6d0edc83bc5..ad0a82177c5d 100644 --- a/cranelift/filetests/filetests/runtests/fmax.clif +++ b/cranelift/filetests/filetests/runtests/fmax.clif @@ -7,6 +7,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fmax_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fmin.clif b/cranelift/filetests/filetests/runtests/fmin.clif index 4e261502ec10..c58b7d481063 100644 --- a/cranelift/filetests/filetests/runtests/fmin.clif +++ b/cranelift/filetests/filetests/runtests/fmin.clif @@ -7,6 +7,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fmin_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fmul.clif b/cranelift/filetests/filetests/runtests/fmul.clif index 19ab09d1f87f..230c7e859c1c 100644 --- a/cranelift/filetests/filetests/runtests/fmul.clif +++ b/cranelift/filetests/filetests/runtests/fmul.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fmul_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/fneg.clif b/cranelift/filetests/filetests/runtests/fneg.clif index cf8a51a446cf..b16eb1ebfb24 100644 --- a/cranelift/filetests/filetests/runtests/fneg.clif +++ b/cranelift/filetests/filetests/runtests/fneg.clif @@ -6,6 +6,10 @@ target x86_64 has_avx target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fneg_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/fpromote.clif b/cranelift/filetests/filetests/runtests/fpromote.clif index 6049d9cc0858..37ba3970e8cb 100644 --- a/cranelift/filetests/filetests/runtests/fpromote.clif +++ b/cranelift/filetests/filetests/runtests/fpromote.clif @@ -6,6 +6,10 @@ target s390x target aarch64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fpromote(f32) -> f64 { diff --git a/cranelift/filetests/filetests/runtests/fsub.clif b/cranelift/filetests/filetests/runtests/fsub.clif index cec10f2fb752..1f592cc0041e 100644 --- a/cranelift/filetests/filetests/runtests/fsub.clif +++ b/cranelift/filetests/filetests/runtests/fsub.clif @@ -6,6 +6,10 @@ target aarch64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %fsub_f32(f32, f32) -> f32 { block0(v0: f32, v1: f32): diff --git a/cranelift/filetests/filetests/runtests/iabs.clif b/cranelift/filetests/filetests/runtests/iabs.clif index c4d211de5930..f227ac55b2a1 100644 --- a/cranelift/filetests/filetests/runtests/iabs.clif +++ b/cranelift/filetests/filetests/runtests/iabs.clif @@ -6,6 +6,10 @@ target riscv64 target riscv64 has_zbb target riscv64 has_c has_zcb target x86_64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %iabs_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-eq-imm.clif b/cranelift/filetests/filetests/runtests/icmp-eq-imm.clif index 64b52827d6b0..ac72db1a881c 100644 --- a/cranelift/filetests/filetests/runtests/icmp-eq-imm.clif +++ b/cranelift/filetests/filetests/runtests/icmp-eq-imm.clif @@ -5,6 +5,10 @@ target x86_64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_imm_eq_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-eq.clif b/cranelift/filetests/filetests/runtests/icmp-eq.clif index 7e674a0e02f9..3fd82d99351f 100644 --- a/cranelift/filetests/filetests/runtests/icmp-eq.clif +++ b/cranelift/filetests/filetests/runtests/icmp-eq.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_eq_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-ne.clif b/cranelift/filetests/filetests/runtests/icmp-ne.clif index 2a8473cff86c..6db5641b788a 100644 --- a/cranelift/filetests/filetests/runtests/icmp-ne.clif +++ b/cranelift/filetests/filetests/runtests/icmp-ne.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_ne_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-of-icmp.clif b/cranelift/filetests/filetests/runtests/icmp-of-icmp.clif index 273d80dacd82..f0999417068c 100644 --- a/cranelift/filetests/filetests/runtests/icmp-of-icmp.clif +++ b/cranelift/filetests/filetests/runtests/icmp-of-icmp.clif @@ -6,6 +6,10 @@ target x86_64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %eq_eq_zero(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-sge.clif b/cranelift/filetests/filetests/runtests/icmp-sge.clif index a96bc0bc8e4b..51de60e05835 100644 --- a/cranelift/filetests/filetests/runtests/icmp-sge.clif +++ b/cranelift/filetests/filetests/runtests/icmp-sge.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_sge_i8(i8, i8) -> i8 { diff --git a/cranelift/filetests/filetests/runtests/icmp-sgt.clif b/cranelift/filetests/filetests/runtests/icmp-sgt.clif index 3763a21af079..0bc72b31b696 100644 --- a/cranelift/filetests/filetests/runtests/icmp-sgt.clif +++ b/cranelift/filetests/filetests/runtests/icmp-sgt.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_sgt_i8(i8, i8) -> i8 { diff --git a/cranelift/filetests/filetests/runtests/icmp-sle.clif b/cranelift/filetests/filetests/runtests/icmp-sle.clif index 9a4b64daaa03..fefa5c42cab7 100644 --- a/cranelift/filetests/filetests/runtests/icmp-sle.clif +++ b/cranelift/filetests/filetests/runtests/icmp-sle.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_sle_i8(i8, i8) -> i8 { diff --git a/cranelift/filetests/filetests/runtests/icmp-uge.clif b/cranelift/filetests/filetests/runtests/icmp-uge.clif index 0459baf4317f..2e762c35ab11 100644 --- a/cranelift/filetests/filetests/runtests/icmp-uge.clif +++ b/cranelift/filetests/filetests/runtests/icmp-uge.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_uge_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-ugt.clif b/cranelift/filetests/filetests/runtests/icmp-ugt.clif index 274444262005..b90248eea33f 100644 --- a/cranelift/filetests/filetests/runtests/icmp-ugt.clif +++ b/cranelift/filetests/filetests/runtests/icmp-ugt.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_ugt_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-ule.clif b/cranelift/filetests/filetests/runtests/icmp-ule.clif index f74e09bfb027..1c9690180681 100644 --- a/cranelift/filetests/filetests/runtests/icmp-ule.clif +++ b/cranelift/filetests/filetests/runtests/icmp-ule.clif @@ -5,6 +5,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_ule_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp-ult.clif b/cranelift/filetests/filetests/runtests/icmp-ult.clif index 3126ef0a1644..3a6847d269b5 100644 --- a/cranelift/filetests/filetests/runtests/icmp-ult.clif +++ b/cranelift/filetests/filetests/runtests/icmp-ult.clif @@ -5,6 +5,10 @@ target x86_64 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %icmp_ult_i8(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/icmp.clif b/cranelift/filetests/filetests/runtests/icmp.clif index 4cf3fdac2c7a..8fe798068e0e 100644 --- a/cranelift/filetests/filetests/runtests/icmp.clif +++ b/cranelift/filetests/filetests/runtests/icmp.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ; This test is also a regression test for aarch64. ; We were not correctly handling the fact that the rhs constant value diff --git a/cranelift/filetests/filetests/runtests/ineg.clif b/cranelift/filetests/filetests/runtests/ineg.clif index 3175d4b3ded5..6500a532d9ed 100644 --- a/cranelift/filetests/filetests/runtests/ineg.clif +++ b/cranelift/filetests/filetests/runtests/ineg.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ineg_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/integer-minmax.clif b/cranelift/filetests/filetests/runtests/integer-minmax.clif index 690bd9f6a6e7..a09b9aa3b62d 100644 --- a/cranelift/filetests/filetests/runtests/integer-minmax.clif +++ b/cranelift/filetests/filetests/runtests/integer-minmax.clif @@ -7,6 +7,10 @@ target x86_64 target riscv64 target riscv64 has_zbb target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be ; sort three signed i8s with smin and smax only diff --git a/cranelift/filetests/filetests/runtests/ireduce.clif b/cranelift/filetests/filetests/runtests/ireduce.clif index 35f89fd6f791..1db35bd39570 100644 --- a/cranelift/filetests/filetests/runtests/ireduce.clif +++ b/cranelift/filetests/filetests/runtests/ireduce.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ireduce_i16_i8(i16) -> i8 { block0(v0: i16): diff --git a/cranelift/filetests/filetests/runtests/issue-5498.clif b/cranelift/filetests/filetests/runtests/issue-5498.clif index 2cd353f200b8..05904d4c6c41 100644 --- a/cranelift/filetests/filetests/runtests/issue-5498.clif +++ b/cranelift/filetests/filetests/runtests/issue-5498.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %a(i16, i8) -> i16 { block0(v0: i16, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/long-jump.clif b/cranelift/filetests/filetests/runtests/long-jump.clif index 72aa4d12b369..6c1462b4a1c5 100644 --- a/cranelift/filetests/filetests/runtests/long-jump.clif +++ b/cranelift/filetests/filetests/runtests/long-jump.clif @@ -6,6 +6,10 @@ target s390x target x86_64 target riscv64 has_m target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %a(i16) -> i16 { block0(v0: i16): diff --git a/cranelift/filetests/filetests/runtests/nearest.clif b/cranelift/filetests/filetests/runtests/nearest.clif index 90496d4070db..0b8e48cc2a0a 100644 --- a/cranelift/filetests/filetests/runtests/nearest.clif +++ b/cranelift/filetests/filetests/runtests/nearest.clif @@ -9,6 +9,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %nearest_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/or-and-y-with-not-y.clif b/cranelift/filetests/filetests/runtests/or-and-y-with-not-y.clif index ee17289cc236..d43210134953 100644 --- a/cranelift/filetests/filetests/runtests/or-and-y-with-not-y.clif +++ b/cranelift/filetests/filetests/runtests/or-and-y-with-not-y.clif @@ -7,6 +7,10 @@ target x86_64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %or_and_y_with_not_y(i8, i8) -> i8 { block0(v0: i8, v1: i8): diff --git a/cranelift/filetests/filetests/runtests/popcnt.clif b/cranelift/filetests/filetests/runtests/popcnt.clif index f128e89d1052..b4e4ead77b02 100644 --- a/cranelift/filetests/filetests/runtests/popcnt.clif +++ b/cranelift/filetests/filetests/runtests/popcnt.clif @@ -6,6 +6,10 @@ target x86_64 target x86_64 has_popcnt has_sse42 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %popcnt_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/select-float.clif b/cranelift/filetests/filetests/runtests/select-float.clif index 8155afd62aed..08a43934ef1a 100644 --- a/cranelift/filetests/filetests/runtests/select-float.clif +++ b/cranelift/filetests/filetests/runtests/select-float.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %select_icmp_i8_f32(i8, f32, f32) -> f32 { block0(v0: i8, v1: f32, v2: f32): diff --git a/cranelift/filetests/filetests/runtests/shift-right-left.clif b/cranelift/filetests/filetests/runtests/shift-right-left.clif index 35cfadcbfdb6..69af30b75ce6 100644 --- a/cranelift/filetests/filetests/runtests/shift-right-left.clif +++ b/cranelift/filetests/filetests/runtests/shift-right-left.clif @@ -8,6 +8,10 @@ target x86_64 has_bmi2 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %unsigned_shift_right_shift_left_i8(i8) -> i8 { block0(v0: i8): diff --git a/cranelift/filetests/filetests/runtests/shifts.clif b/cranelift/filetests/filetests/runtests/shifts.clif index 9860e2851ad4..da0817f85579 100644 --- a/cranelift/filetests/filetests/runtests/shifts.clif +++ b/cranelift/filetests/filetests/runtests/shifts.clif @@ -6,6 +6,10 @@ target x86_64 has_bmi2 target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %ishl_i64_i64(i64, i64) -> i64 { block0(v0: i64, v1: i64): diff --git a/cranelift/filetests/filetests/runtests/sqrt.clif b/cranelift/filetests/filetests/runtests/sqrt.clif index 02b0520410db..90c8b7639b89 100644 --- a/cranelift/filetests/filetests/runtests/sqrt.clif +++ b/cranelift/filetests/filetests/runtests/sqrt.clif @@ -6,6 +6,10 @@ target x86_64 has_avx target s390x target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %sqrt_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/srem.clif b/cranelift/filetests/filetests/runtests/srem.clif index b81e37aeba50..38eca30e1792 100644 --- a/cranelift/filetests/filetests/runtests/srem.clif +++ b/cranelift/filetests/filetests/runtests/srem.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %srem_i64(i64, i64) -> i64 { block0(v0: i64,v1: i64): diff --git a/cranelift/filetests/filetests/runtests/stack-addr-32.clif b/cranelift/filetests/filetests/runtests/stack-addr-32.clif index 12aed367981a..bfa73b33d176 100644 --- a/cranelift/filetests/filetests/runtests/stack-addr-32.clif +++ b/cranelift/filetests/filetests/runtests/stack-addr-32.clif @@ -1,4 +1,6 @@ test interpret +target pulley32 +target pulley32be function %stack_addr_iadd(i64) -> i8 { ss0 = explicit_slot 16 diff --git a/cranelift/filetests/filetests/runtests/stack-addr-64.clif b/cranelift/filetests/filetests/runtests/stack-addr-64.clif index b98c82f2e1da..902be9c0b945 100644 --- a/cranelift/filetests/filetests/runtests/stack-addr-64.clif +++ b/cranelift/filetests/filetests/runtests/stack-addr-64.clif @@ -5,6 +5,8 @@ target s390x target aarch64 target riscv64 target riscv64 has_c has_zcb +target pulley64 +target pulley64be function %stack_addr_iadd(i64) -> i8 { ss0 = explicit_slot 16 diff --git a/cranelift/filetests/filetests/runtests/stack.clif b/cranelift/filetests/filetests/runtests/stack.clif index 36f9408cde43..e7dc0a88bf58 100644 --- a/cranelift/filetests/filetests/runtests/stack.clif +++ b/cranelift/filetests/filetests/runtests/stack.clif @@ -7,6 +7,10 @@ target s390x target aarch64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %stack_simple(i64) -> i64 { ss0 = explicit_slot 8 diff --git a/cranelift/filetests/filetests/runtests/trunc.clif b/cranelift/filetests/filetests/runtests/trunc.clif index d2386d4258eb..a688f4c8d0b7 100644 --- a/cranelift/filetests/filetests/runtests/trunc.clif +++ b/cranelift/filetests/filetests/runtests/trunc.clif @@ -9,6 +9,10 @@ target s390x target riscv64 target riscv64 has_zfa target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %trunc_f32(f32) -> f32 { block0(v0: f32): diff --git a/cranelift/filetests/filetests/runtests/uadd_overflow_trap.clif b/cranelift/filetests/filetests/runtests/uadd_overflow_trap.clif index 353043ecf3dc..cbf138983c0a 100644 --- a/cranelift/filetests/filetests/runtests/uadd_overflow_trap.clif +++ b/cranelift/filetests/filetests/runtests/uadd_overflow_trap.clif @@ -5,6 +5,10 @@ target aarch64 target riscv64 target riscv64 has_c has_zcb target s390x +target pulley32 +target pulley32be +target pulley64 +target pulley64be ; NOTE: we don't currently have infrastructure for testing for traps, so these ; tests can only test the happy path. Once we eventually have annotations for diff --git a/cranelift/filetests/filetests/runtests/urem.clif b/cranelift/filetests/filetests/runtests/urem.clif index 3fa2024240f8..d9c6906bbc3a 100644 --- a/cranelift/filetests/filetests/runtests/urem.clif +++ b/cranelift/filetests/filetests/runtests/urem.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %urem_i64(i64, i64) -> i64 { block0(v0: i64,v1: i64): diff --git a/cranelift/filetests/filetests/runtests/x64-bmi1.clif b/cranelift/filetests/filetests/runtests/x64-bmi1.clif index 4c48adc2b69f..e1d5ec222e7b 100644 --- a/cranelift/filetests/filetests/runtests/x64-bmi1.clif +++ b/cranelift/filetests/filetests/runtests/x64-bmi1.clif @@ -6,6 +6,10 @@ target x86_64 target x86_64 has_bmi1 target riscv64 target riscv64 has_c has_zcb +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %blsi32(i32) -> i32 { block0(v0: i32): diff --git a/cranelift/filetests/filetests/runtests/x64-bmi2.clif b/cranelift/filetests/filetests/runtests/x64-bmi2.clif index baeec19ee1c0..9c6561906dfa 100644 --- a/cranelift/filetests/filetests/runtests/x64-bmi2.clif +++ b/cranelift/filetests/filetests/runtests/x64-bmi2.clif @@ -5,6 +5,10 @@ target s390x target x86_64 target x86_64 has_bmi2 target riscv64 +target pulley32 +target pulley32be +target pulley64 +target pulley64be function %bzhi32(i32, i32) -> i32 { block0(v0: i32, v1: i32): diff --git a/pulley/src/interp.rs b/pulley/src/interp.rs index 2579790cda43..74a40242c162 100644 --- a/pulley/src/interp.rs +++ b/pulley/src/interp.rs @@ -2795,4 +2795,30 @@ impl ExtendedOpVisitor for Interpreter<'_> { self.state[dst].set_ptr(lr); ControlFlow::Continue(()) } + + fn xbmask32(&mut self, dst: XReg, src: XReg) -> ControlFlow { + let a = self.state[src].get_u32(); + let result = if a != 0 { -1 } else { 0 }; + self.state[dst].set_i32(result); + ControlFlow::Continue(()) + } + + fn xbmask64(&mut self, dst: XReg, src: XReg) -> ControlFlow { + let a = self.state[src].get_u64(); + let result = if a != 0 { -1 } else { 0 }; + self.state[dst].set_i64(result); + ControlFlow::Continue(()) + } + + fn xabs32(&mut self, dst: XReg, src: XReg) -> ControlFlow { + let a = self.state[src].get_i32(); + self.state[dst].set_i32(a.wrapping_abs()); + ControlFlow::Continue(()) + } + + fn xabs64(&mut self, dst: XReg, src: XReg) -> ControlFlow { + let a = self.state[src].get_i64(); + self.state[dst].set_i64(a.wrapping_abs()); + ControlFlow::Continue(()) + } } diff --git a/pulley/src/lib.rs b/pulley/src/lib.rs index 563ee1df6755..b848b7ea83d2 100644 --- a/pulley/src/lib.rs +++ b/pulley/src/lib.rs @@ -677,6 +677,16 @@ macro_rules! for_each_extended_op { fstore32be_offset32 = Fstore32BeOffset32 { ptr: XReg, offset: i32, src: FReg }; /// `*(ptr + offset) = src` fstore64be_offset32 = Fstore64BeOffset32 { ptr: XReg, offset: i32, src: FReg }; + + /// `low32(dst) = low32(src) ? -1 : 0` + xbmask32 = XBmask32 { dst: XReg, src: XReg }; + /// `dst = src ? -1 : 0` + xbmask64 = XBmask64 { dst: XReg, src: XReg }; + + /// `low32(dst) = |low32(src)|` + xabs32 = XAbs32 { dst: XReg, src: XReg }; + /// `dst = |src|` + xabs64 = XAbs64 { dst: XReg, src: XReg }; } }; }