From 722fde218d20bec4a0c33c613974e1f9de992765 Mon Sep 17 00:00:00 2001 From: morris Date: Fri, 29 Apr 2022 12:10:05 +0800 Subject: [PATCH] uart: add default source clock for all targets --- components/app_trace/port/port_uart.c | 2 +- components/driver/test/test_rs485.c | 2 +- components/driver/test/test_uart.c | 16 ++++----- components/esp_hw_support/test/test_dport.c | 4 +-- components/esp_pm/pm_impl.c | 10 +++--- components/esp_system/test/test_sleep.c | 9 ++--- components/hal/esp32c2/include/hal/uart_ll.h | 4 +-- components/hal/esp32h2/include/hal/uart_ll.h | 4 +-- components/hal/include/hal/uart_types.h | 33 ++++--------------- components/hal/uart_hal.c | 20 ++++------- .../soc/esp32/include/soc/clk_tree_defs.h | 11 +++++++ .../soc/esp32c2/include/soc/clk_tree_defs.h | 12 +++++++ .../soc/esp32c3/include/soc/clk_tree_defs.h | 12 +++++++ .../soc/esp32h2/include/soc/clk_tree_defs.h | 12 +++++++ .../soc/esp32s2/include/soc/clk_tree_defs.h | 11 +++++++ .../soc/esp32s3/include/soc/clk_tree_defs.h | 12 +++++++ components/vfs/test/test_vfs_select.c | 2 +- components/vfs/test/test_vfs_uart.c | 20 ++++------- .../ble/ble_spp_client/main/spp_client_demo.c | 2 +- .../ble_spp_server/main/ble_spp_server_demo.c | 2 +- .../main/main.c | 2 +- .../nimble/ble_spp/spp_client/main/main.c | 2 +- .../nimble/ble_spp/spp_server/main/main.c | 2 +- .../openthread/ot_br/main/esp_ot_config.h | 8 ++--- .../openthread/ot_cli/main/esp_ot_config.h | 10 +++--- .../openthread/ot_rcp/main/esp_ot_config.h | 8 ++--- .../uart/nmea0183_parser/main/nmea_parser.c | 20 ++++------- .../main/uart_async_rxtxtasks_main.c | 2 +- .../uart_echo/main/uart_echo_example_main.c | 2 +- .../uart/uart_echo_rs485/main/rs485_example.c | 2 +- .../main/uart_events_example_main.c | 2 +- .../uart_repl/main/uart_repl_example_main.c | 2 +- .../main/uart_select_example_main.c | 2 +- .../advanced/main/console_example_main.c | 4 +-- .../system/light_sleep/main/uart_wakeup.c | 2 +- examples/system/select/main/select_example.c | 2 +- .../main/esp_zigbee_gateway.h | 2 +- .../esp_zigbee_rcp/main/esp_zigbee_rcp.h | 2 +- tools/ci/check_copyright_ignore.txt | 4 --- 39 files changed, 152 insertions(+), 128 deletions(-) diff --git a/components/app_trace/port/port_uart.c b/components/app_trace/port/port_uart.c index a1c2422b3522..cfb126eb80d1 100644 --- a/components/app_trace/port/port_uart.c +++ b/components/app_trace/port/port_uart.c @@ -224,7 +224,7 @@ static esp_err_t esp_apptrace_uart_init(esp_apptrace_uart_data_t *hw_data) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; ESP_LOGI(TAG, "UART baud rate: %i", CONFIG_APPTRACE_UART_BAUDRATE); // We won't use a buffer for sending data. diff --git a/components/driver/test/test_rs485.c b/components/driver/test/test_rs485.c index 8c97973e449e..f7fe61df51c6 100644 --- a/components/driver/test/test_rs485.c +++ b/components/driver/test/test_rs485.c @@ -164,7 +164,7 @@ static void rs485_init(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, .rx_flow_ctrl_thresh = 120, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; printf("RS485 port initialization...\r\n"); TEST_ESP_OK(uart_wait_tx_idle_polling(UART_NUM1)); diff --git a/components/driver/test/test_uart.c b/components/driver/test/test_uart.c index 079b6b6f2d61..5f6fe6ffdae6 100644 --- a/components/driver/test/test_uart.c +++ b/components/driver/test/test_uart.c @@ -32,8 +32,6 @@ // Wait timeout for uart driver #define PACKET_READ_TICS (1000 / portTICK_PERIOD_MS) -#define TEST_DEFAULT_CLK UART_SCLK_APB - static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk) { uart_config_t uart_config = { @@ -80,7 +78,7 @@ static void test_task2(void *pvParameters) TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]") { - uart_config(UART_BAUD_11520, TEST_DEFAULT_CLK); + uart_config(UART_BAUD_11520, UART_SCLK_DEFAULT); SemaphoreHandle_t exit_sema = xSemaphoreCreateBinary(); exit_flag = false; @@ -112,7 +110,7 @@ TEST_CASE("test uart get baud-rate", "[uart]") #endif uint32_t baud_rate2 = 0; printf("init uart%d, unuse reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_115200); - uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK); + uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT); uart_get_baudrate(UART_NUM1, &baud_rate2); printf("get baud rate when don't use reftick: %d\n", (int)baud_rate2); TEST_ASSERT_UINT32_WITHIN(UART_BAUD_115200 * TOLERANCE, UART_BAUD_115200, baud_rate2); @@ -129,7 +127,7 @@ TEST_CASE("test uart tx data with break", "[uart]") char *psend = (char *)malloc(buf_len); TEST_ASSERT_NOT_NULL(psend); memset(psend, '0', buf_len); - uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK); + uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT); printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len); uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len); uart_wait_tx_done(UART_NUM1, (TickType_t)portMAX_DELAY); @@ -215,7 +213,7 @@ TEST_CASE("uart general API test", "[uart]") .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = TEST_DEFAULT_CLK, + .source_clk = UART_SCLK_DEFAULT, }; uart_param_config(uart_num, &uart_config); uart_word_len_set_get_test(uart_num); @@ -268,7 +266,7 @@ TEST_CASE("uart read write test", "[uart]") .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS, - .source_clk = TEST_DEFAULT_CLK, + .source_clk = UART_SCLK_DEFAULT, .rx_flow_ctrl_thresh = 120 }; TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0)); @@ -337,7 +335,7 @@ TEST_CASE("uart tx with ringbuffer test", "[uart]") .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS, .rx_flow_ctrl_thresh = 120, - .source_clk = TEST_DEFAULT_CLK, + .source_clk = UART_SCLK_DEFAULT, }; uart_wait_tx_idle_polling(uart_num); TEST_ESP_OK(uart_param_config(uart_num, &uart_config)); @@ -373,7 +371,7 @@ TEST_CASE("uart int state restored after flush", "[uart]") .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; const uart_port_t uart_echo = UART_NUM_1; diff --git a/components/esp_hw_support/test/test_dport.c b/components/esp_hw_support/test/test_dport.c index 031ce56728ee..e2fad32efaf3 100644 --- a/components/esp_hw_support/test/test_dport.c +++ b/components/esp_hw_support/test/test_dport.c @@ -138,7 +138,7 @@ void run_tasks_with_change_freq_cpu(int cpu_freq_mhz) esp_rom_uart_tx_wait_idle(uart_num); rtc_clk_cpu_freq_set_config(&new_config); - uart_ll_set_sclk(UART_LL_GET_HW(uart_num), UART_SCLK_APB); + uart_ll_set_sclk(UART_LL_GET_HW(uart_num), UART_SCLK_DEFAULT); uart_ll_set_baudrate(UART_LL_GET_HW(uart_num), uart_baud); /* adjust RTOS ticks */ _xt_tick_divisor = cpu_freq_mhz * 1000000 / XT_TICK_PER_SEC; @@ -151,7 +151,7 @@ void run_tasks_with_change_freq_cpu(int cpu_freq_mhz) // return old freq. esp_rom_uart_tx_wait_idle(uart_num); rtc_clk_cpu_freq_set_config(&old_config); - uart_ll_set_sclk(UART_LL_GET_HW(uart_num), UART_SCLK_APB); + uart_ll_set_sclk(UART_LL_GET_HW(uart_num), UART_SCLK_DEFAULT); uart_ll_set_baudrate(UART_LL_GET_HW(uart_num), uart_baud); _xt_tick_divisor = old_config.freq_mhz * 1000000 / XT_TICK_PER_SEC; } diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c index b425d8da639f..fb99261fb132 100644 --- a/components/esp_pm/pm_impl.c +++ b/components/esp_pm/pm_impl.c @@ -721,12 +721,14 @@ void esp_pm_impl_init(void) { #if defined(CONFIG_ESP_CONSOLE_UART) //This clock source should be a source which won't be affected by DFS - uint32_t clk_source; -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 + uart_sclk_t clk_source = UART_SCLK_DEFAULT; +#if SOC_UART_SUPPORT_REF_TICK clk_source = UART_SCLK_REF_TICK; -#else +#elif SOC_UART_SUPPORT_XTAL_CLK clk_source = UART_SCLK_XTAL; -#endif +#else + #error "No UART clock source is aware of DFS" +#endif // SOC_UART_SUPPORT_xxx while(!uart_ll_is_tx_idle(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM))); /* When DFS is enabled, override system setting and use REFTICK as UART clock source */ uart_ll_set_sclk(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), clk_source); diff --git a/components/esp_system/test/test_sleep.c b/components/esp_system/test/test_sleep.c index e1a51d0eecbe..1f3eb56f8fb0 100644 --- a/components/esp_system/test/test_sleep.c +++ b/components/esp_system/test/test_sleep.c @@ -191,10 +191,11 @@ TEST_CASE("light sleep duration is correct", "[deepsleep][ignore]") TEST_CASE("light sleep and frequency switching", "[deepsleep]") { #ifndef CONFIG_PM_ENABLE -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 - uart_sclk_t clk_source = UART_SCLK_REF_TICK; -#else - uart_sclk_t clk_source = UART_SCLK_XTAL; + uart_sclk_t clk_source = UART_SCLK_DEFAULT; +#if SOC_UART_SUPPORT_REF_TICK + clk_source = UART_SCLK_REF_TICK; +#elif SOC_UART_SUPPORT_XTAL_CLK + clk_source = UART_SCLK_XTAL; #endif uart_ll_set_sclk(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), clk_source); uart_ll_set_baudrate(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), CONFIG_ESP_CONSOLE_UART_BAUDRATE); diff --git a/components/hal/esp32c2/include/hal/uart_ll.h b/components/hal/esp32c2/include/hal/uart_ll.h index 92f67d93e373..aaea6e74ffe5 100644 --- a/components/hal/esp32c2/include/hal/uart_ll.h +++ b/components/hal/esp32c2/include/hal/uart_ll.h @@ -105,7 +105,7 @@ static inline void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk) { switch (source_clk) { default: - case UART_SCLK_APB: + case UART_SCLK_PLL_F40M: hw->clk_conf.sclk_sel = 1; break; case UART_SCLK_RTC: @@ -130,7 +130,7 @@ static inline void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk) switch (hw->clk_conf.sclk_sel) { default: case 1: - *source_clk = UART_SCLK_APB; + *source_clk = UART_SCLK_PLL_F40M; break; case 2: *source_clk = UART_SCLK_RTC; diff --git a/components/hal/esp32h2/include/hal/uart_ll.h b/components/hal/esp32h2/include/hal/uart_ll.h index f718d7c65ec0..3e9e15f98303 100644 --- a/components/hal/esp32h2/include/hal/uart_ll.h +++ b/components/hal/esp32h2/include/hal/uart_ll.h @@ -108,7 +108,7 @@ static inline void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk) { switch (source_clk) { default: - case UART_SCLK_APB: + case UART_SCLK_AHB: hw->clk_conf.sclk_sel = 1; break; case UART_SCLK_RTC: @@ -133,7 +133,7 @@ static inline void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk) switch (hw->clk_conf.sclk_sel) { default: case 1: - *source_clk = UART_SCLK_APB; + *source_clk = UART_SCLK_AHB; break; case 2: *source_clk = UART_SCLK_RTC; diff --git a/components/hal/include/hal/uart_types.h b/components/hal/include/hal/uart_types.h index 1e1110f136ec..8a22673bcc80 100644 --- a/components/hal/include/hal/uart_types.h +++ b/components/hal/include/hal/uart_types.h @@ -1,16 +1,8 @@ -// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -21,7 +13,7 @@ extern "C" { #include #include #include "soc/soc_caps.h" - +#include "soc/clk_tree_defs.h" /** * @brief UART port number, can be UART_NUM_0 ~ (UART_NUM_MAX -1). @@ -98,18 +90,7 @@ typedef enum { /** * @brief UART source clock */ -typedef enum { - UART_SCLK_APB = 0x0, /*!< UART source clock from APB*/ -#if SOC_UART_SUPPORT_RTC_CLK - UART_SCLK_RTC = 0x1, /*!< UART source clock from RTC*/ -#endif -#if SOC_UART_SUPPORT_XTAL_CLK - UART_SCLK_XTAL = 0x2, /*!< UART source clock from XTAL*/ -#endif -#if SOC_UART_SUPPORT_REF_TICK - UART_SCLK_REF_TICK = 0x3, /*!< UART source clock from REF_TICK*/ -#endif -} uart_sclk_t; +typedef soc_periph_uart_clk_src_legacy_t uart_sclk_t; /** * @brief UART AT cmd char configuration parameters diff --git a/components/hal/uart_hal.c b/components/hal/uart_hal.c index 9fa9725768ce..3e6862d0cb67 100644 --- a/components/hal/uart_hal.c +++ b/components/hal/uart_hal.c @@ -1,16 +1,8 @@ -// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // The HAL layer for UART (common part) #include "hal/uart_hal.h" @@ -138,7 +130,7 @@ void uart_hal_set_loop_back(uart_hal_context_t *hal, bool loop_back_en) void uart_hal_init(uart_hal_context_t *hal, int uart_num) { // Set default clock source - uart_ll_set_sclk(hal->dev, UART_SCLK_APB); + uart_ll_set_sclk(hal->dev, UART_SCLK_DEFAULT); // Set default baud: 115200, use APB clock. const uint32_t baud_def = 115200; uart_ll_set_baudrate(hal->dev, baud_def); diff --git a/components/soc/esp32/include/soc/clk_tree_defs.h b/components/soc/esp32/include/soc/clk_tree_defs.h index bfe59eb85895..faf9d94fe2a6 100644 --- a/components/soc/esp32/include/soc/clk_tree_defs.h +++ b/components/soc/esp32/include/soc/clk_tree_defs.h @@ -193,6 +193,17 @@ typedef enum { TEMPERATURE_SENSOR_SRC_NA, } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_APB = SOC_MOD_CLK_APB, /*!< UART source clock is APB CLK */ + UART_SCLK_REF_TICK = SOC_MOD_CLK_APB_F1M, /*!< UART source clock is APB_F1M */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32c2/include/soc/clk_tree_defs.h b/components/soc/esp32c2/include/soc/clk_tree_defs.h index 6cd0f5fc0b51..f3d37db7ab13 100644 --- a/components/soc/esp32c2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c2/include/soc/clk_tree_defs.h @@ -155,6 +155,18 @@ typedef enum { TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */ } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_PLL_F40M = SOC_MOD_CLK_PLL_F40M, /*!< UART source clock is APB CLK */ + UART_SCLK_RTC = SOC_MOD_CLK_RC_FAST, /*!< UART source clock is RC_FAST */ + UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< UART source clock is XTAL */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_PLL_F40M, /*!< UART source clock default choice is PLL_F40M */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32c3/include/soc/clk_tree_defs.h b/components/soc/esp32c3/include/soc/clk_tree_defs.h index 8311aafdd65d..869493786d91 100644 --- a/components/soc/esp32c3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c3/include/soc/clk_tree_defs.h @@ -183,6 +183,18 @@ typedef enum { TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */ } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_APB = SOC_MOD_CLK_APB, /*!< UART source clock is APB CLK */ + UART_SCLK_RTC = SOC_MOD_CLK_RC_FAST, /*!< UART source clock is RC_FAST */ + UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< UART source clock is XTAL */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h2/include/soc/clk_tree_defs.h index 03e824a99040..c10b3ee02f2a 100644 --- a/components/soc/esp32h2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h2/include/soc/clk_tree_defs.h @@ -188,6 +188,18 @@ typedef enum { TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */ } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_AHB = SOC_MOD_CLK_AHB, /*!< UART source clock is AHB CLK */ + UART_SCLK_RTC = SOC_MOD_CLK_RC_FAST, /*!< UART source clock is RC_FAST */ + UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< UART source clock is XTAL */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_AHB, /*!< UART source clock default choice is AHB */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32s2/include/soc/clk_tree_defs.h b/components/soc/esp32s2/include/soc/clk_tree_defs.h index 46bf1f248894..781027d56c16 100644 --- a/components/soc/esp32s2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s2/include/soc/clk_tree_defs.h @@ -201,6 +201,17 @@ typedef enum { TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_TEMP_SENSOR, /*!< Select RC_FAST as the default choice */ } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_APB = SOC_MOD_CLK_APB, /*!< UART source clock is APB CLK */ + UART_SCLK_REF_TICK = SOC_MOD_CLK_APB_F1M, /*!< UART source clock is APB_F1M */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32s3/include/soc/clk_tree_defs.h b/components/soc/esp32s3/include/soc/clk_tree_defs.h index ad745265ceae..939ad01c683b 100644 --- a/components/soc/esp32s3/include/soc/clk_tree_defs.h +++ b/components/soc/esp32s3/include/soc/clk_tree_defs.h @@ -201,6 +201,18 @@ typedef enum { TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_TEMP_SENSOR, /*!< Select RC_FAST as the default choice */ } soc_periph_temperature_sensor_clk_src_t; +///////////////////////////////////////////////////UART///////////////////////////////////////////////////////////////// + +/** + * @brief Type of UART clock source, reserved for the legacy UART driver + */ +typedef enum { + UART_SCLK_APB = SOC_MOD_CLK_APB, /*!< UART source clock is APB CLK */ + UART_SCLK_RTC = SOC_MOD_CLK_RC_FAST, /*!< UART source clock is RC_FAST */ + UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< UART source clock is XTAL */ + UART_SCLK_DEFAULT = SOC_MOD_CLK_APB, /*!< UART source clock default choice is APB */ +} soc_periph_uart_clk_src_legacy_t; + #ifdef __cplusplus } #endif diff --git a/components/vfs/test/test_vfs_select.c b/components/vfs/test/test_vfs_select.c index 061bb0739641..8568f2c284f2 100644 --- a/components/vfs/test/test_vfs_select.c +++ b/components/vfs/test/test_vfs_select.c @@ -95,7 +95,7 @@ static void uart1_init(void) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; uart_driver_install(UART_NUM_1, 256, 256, 0, NULL, 0); uart_param_config(UART_NUM_1, &uart_config); diff --git a/components/vfs/test/test_vfs_uart.c b/components/vfs/test/test_vfs_uart.c index 60903eade13e..a7229e8f6abf 100644 --- a/components/vfs/test/test_vfs_uart.c +++ b/components/vfs/test/test_vfs_uart.c @@ -1,16 +1,8 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -223,7 +215,7 @@ TEST_CASE("Can use termios for UART", "[vfs]") .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; uart_driver_install(UART_NUM_1, 256, 256, 0, NULL, 0); uart_param_config(UART_NUM_1, &uart_config); diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_client/main/spp_client_demo.c b/examples/bluetooth/bluedroid/ble/ble_spp_client/main/spp_client_demo.c index 9639911d8647..fc70c1b391ad 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_client/main/spp_client_demo.c +++ b/examples/bluetooth/bluedroid/ble/ble_spp_client/main/spp_client_demo.c @@ -591,7 +591,7 @@ static void spp_uart_init(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_RTS, .rx_flow_ctrl_thresh = 122, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_server/main/ble_spp_server_demo.c b/examples/bluetooth/bluedroid/ble/ble_spp_server/main/ble_spp_server_demo.c index efa4161530dc..433eca7837ca 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_server/main/ble_spp_server_demo.c +++ b/examples/bluetooth/bluedroid/ble/ble_spp_server/main/ble_spp_server_demo.c @@ -396,7 +396,7 @@ static void spp_uart_init(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_RTS, .rx_flow_ctrl_thresh = 122, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. diff --git a/examples/bluetooth/hci/controller_hci_uart_esp32c3_and_esp32s3/main/main.c b/examples/bluetooth/hci/controller_hci_uart_esp32c3_and_esp32s3/main/main.c index 1454b50ed0fd..0cacc7b4caba 100644 --- a/examples/bluetooth/hci/controller_hci_uart_esp32c3_and_esp32s3/main/main.c +++ b/examples/bluetooth/hci/controller_hci_uart_esp32c3_and_esp32s3/main/main.c @@ -205,7 +205,7 @@ void uhci_uart_install(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS, .rx_flow_ctrl_thresh = UART_RX_THRS, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; ESP_ERROR_CHECK(uart_param_config(UART_HCI_NUM, &uart_config)); diff --git a/examples/bluetooth/nimble/ble_spp/spp_client/main/main.c b/examples/bluetooth/nimble/ble_spp/spp_client/main/main.c index 280e2e789702..f92ebedbdc4b 100644 --- a/examples/bluetooth/nimble/ble_spp/spp_client/main/main.c +++ b/examples/bluetooth/nimble/ble_spp/spp_client/main/main.c @@ -381,7 +381,7 @@ static void ble_spp_uart_init(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_RTS, .rx_flow_ctrl_thresh = 122, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. diff --git a/examples/bluetooth/nimble/ble_spp/spp_server/main/main.c b/examples/bluetooth/nimble/ble_spp/spp_server/main/main.c index 4f6941a9aad6..7500028bb51d 100644 --- a/examples/bluetooth/nimble/ble_spp/spp_server/main/main.c +++ b/examples/bluetooth/nimble/ble_spp/spp_server/main/main.c @@ -369,7 +369,7 @@ static void ble_spp_uart_init(void) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_RTS, .rx_flow_ctrl_thresh = 122, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. uart_driver_install(UART_NUM_0, 4096, 8192, 10,&spp_common_uart_queue,0); diff --git a/examples/openthread/ot_br/main/esp_ot_config.h b/examples/openthread/ot_br/main/esp_ot_config.h index e237a8a14ba6..71c961e37005 100644 --- a/examples/openthread/ot_br/main/esp_ot_config.h +++ b/examples/openthread/ot_br/main/esp_ot_config.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: CC0-1.0 * @@ -10,7 +10,7 @@ * Unless required by applicable law or agreed to in writing, this * software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR * CONDITIONS OF ANY KIND, either express or implied. -*/ + */ #pragma once @@ -29,7 +29,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = 4, \ .tx_pin = 5, \ @@ -49,7 +49,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \ diff --git a/examples/openthread/ot_cli/main/esp_ot_config.h b/examples/openthread/ot_cli/main/esp_ot_config.h index 8506eed20d61..446344314cd2 100644 --- a/examples/openthread/ot_cli/main/esp_ot_config.h +++ b/examples/openthread/ot_cli/main/esp_ot_config.h @@ -1,7 +1,7 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * - * SPDX-License-Identifier: CC0 + * SPDX-License-Identifier: CC0-1.0 * * OpenThread Command Line Example * @@ -10,7 +10,7 @@ * Unless required by applicable law or agreed to in writing, this * software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR * CONDITIONS OF ANY KIND, either express or implied. -*/ + */ #pragma once @@ -36,7 +36,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = 4, \ .tx_pin = 5, \ @@ -57,7 +57,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \ diff --git a/examples/openthread/ot_rcp/main/esp_ot_config.h b/examples/openthread/ot_rcp/main/esp_ot_config.h index 65a929111543..3006f4aa40c2 100644 --- a/examples/openthread/ot_rcp/main/esp_ot_config.h +++ b/examples/openthread/ot_rcp/main/esp_ot_config.h @@ -1,7 +1,7 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * - * SPDX-License-Identifier: CC0 + * SPDX-License-Identifier: CC0-1.0 * * OpenThread Radio Co-Processor (RCP) Example * @@ -10,7 +10,7 @@ * Unless required by applicable law or agreed to in writing, this * software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR * CONDITIONS OF ANY KIND, either express or implied. -*/ + */ #pragma once @@ -33,7 +33,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \ diff --git a/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c b/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c index c70f119b156d..0dbd6ab9d906 100644 --- a/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c +++ b/examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c @@ -1,16 +1,8 @@ -// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -683,7 +675,7 @@ nmea_parser_handle_t nmea_parser_init(const nmea_parser_config_t *config) .parity = config->uart.parity, .stop_bits = config->uart.stop_bits, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; if (uart_driver_install(esp_gps->uart_port, CONFIG_NMEA_PARSER_RING_BUFFER_SIZE, 0, config->uart.event_queue_size, &esp_gps->event_queue, 0) != ESP_OK) { diff --git a/examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c b/examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c index da1dd5106663..3a5402f2374e 100644 --- a/examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c +++ b/examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c @@ -26,7 +26,7 @@ void init(void) { .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; // We won't use a buffer for sending data. uart_driver_install(UART_NUM_1, RX_BUF_SIZE * 2, 0, 0, NULL, 0); diff --git a/examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c b/examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c index 08d1996199fe..20ba94fe9c63 100644 --- a/examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c +++ b/examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c @@ -49,7 +49,7 @@ static void echo_task(void *arg) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; int intr_alloc_flags = 0; diff --git a/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c b/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c index b32369d9b628..401cf40af975 100644 --- a/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c +++ b/examples/peripherals/uart/uart_echo_rs485/main/rs485_example.c @@ -66,7 +66,7 @@ static void echo_task(void *arg) .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, .rx_flow_ctrl_thresh = 122, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; // Set UART log level diff --git a/examples/peripherals/uart/uart_events/main/uart_events_example_main.c b/examples/peripherals/uart/uart_events/main/uart_events_example_main.c index a3400680a70f..c4f12db2fa4d 100644 --- a/examples/peripherals/uart/uart_events/main/uart_events_example_main.c +++ b/examples/peripherals/uart/uart_events/main/uart_events_example_main.c @@ -129,7 +129,7 @@ void app_main(void) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. uart_driver_install(EX_UART_NUM, BUF_SIZE * 2, BUF_SIZE * 2, 20, &uart0_queue, 0); diff --git a/examples/peripherals/uart/uart_repl/main/uart_repl_example_main.c b/examples/peripherals/uart/uart_repl/main/uart_repl_example_main.c index 8d0095da9680..9e70780aac9c 100644 --- a/examples/peripherals/uart/uart_repl/main/uart_repl_example_main.c +++ b/examples/peripherals/uart/uart_repl/main/uart_repl_example_main.c @@ -76,7 +76,7 @@ static void configure_uarts(void) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; ESP_ERROR_CHECK(uart_driver_install(DEFAULT_UART_CHANNEL, READ_BUF_SIZE * 2, 0, 0, NULL, 0)); diff --git a/examples/peripherals/uart/uart_select/main/uart_select_example_main.c b/examples/peripherals/uart/uart_select/main/uart_select_example_main.c index 5020fb7679f3..402be68f68ce 100644 --- a/examples/peripherals/uart/uart_select/main/uart_select_example_main.c +++ b/examples/peripherals/uart/uart_select/main/uart_select_example_main.c @@ -28,7 +28,7 @@ static void uart_select_task(void *arg) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; uart_driver_install(UART_NUM_0, 2*1024, 0, 0, NULL, 0); uart_param_config(UART_NUM_0, &uart_config); diff --git a/examples/system/console/advanced/main/console_example_main.c b/examples/system/console/advanced/main/console_example_main.c index 6812a29ff70d..67618495d5d2 100644 --- a/examples/system/console/advanced/main/console_example_main.c +++ b/examples/system/console/advanced/main/console_example_main.c @@ -86,9 +86,9 @@ static void initialize_console(void) .data_bits = UART_DATA_8_BITS, .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 +#if SOC_UART_SUPPORT_REF_TICK .source_clk = UART_SCLK_REF_TICK, -#else +#elif SOC_UART_SUPPORT_XTAL_CLK .source_clk = UART_SCLK_XTAL, #endif }; diff --git a/examples/system/light_sleep/main/uart_wakeup.c b/examples/system/light_sleep/main/uart_wakeup.c index 69ab38e8330a..b7bd328e1b9a 100644 --- a/examples/system/light_sleep/main/uart_wakeup.c +++ b/examples/system/light_sleep/main/uart_wakeup.c @@ -101,7 +101,7 @@ static esp_err_t uart_initialization(void) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; //Install UART driver, and get the queue. ESP_RETURN_ON_ERROR(uart_driver_install(EXAMPLE_UART_NUM, EXAMPLE_UART_BUF_SIZE, EXAMPLE_UART_BUF_SIZE, 20, &uart_evt_que, 0), diff --git a/examples/system/select/main/select_example.c b/examples/system/select/main/select_example.c index 464b3782e363..4de3a006977c 100644 --- a/examples/system/select/main/select_example.c +++ b/examples/system/select/main/select_example.c @@ -96,7 +96,7 @@ static void uart1_init(void) .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, - .source_clk = UART_SCLK_APB, + .source_clk = UART_SCLK_DEFAULT, }; uart_driver_install(UART_NUM_1, 256, 0, 0, NULL, 0); uart_param_config(UART_NUM_1, &uart_config); diff --git a/examples/zigbee/esp_zigbee_gateway/main/esp_zigbee_gateway.h b/examples/zigbee/esp_zigbee_gateway/main/esp_zigbee_gateway.h index 314629844b10..d4881eda1d74 100644 --- a/examples/zigbee/esp_zigbee_gateway/main/esp_zigbee_gateway.h +++ b/examples/zigbee/esp_zigbee_gateway/main/esp_zigbee_gateway.h @@ -56,7 +56,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = 4, \ .tx_pin = 5, \ diff --git a/examples/zigbee/esp_zigbee_rcp/main/esp_zigbee_rcp.h b/examples/zigbee/esp_zigbee_rcp/main/esp_zigbee_rcp.h index 9ab0f0f5ec13..43d12caca1d0 100644 --- a/examples/zigbee/esp_zigbee_rcp/main/esp_zigbee_rcp.h +++ b/examples/zigbee/esp_zigbee_rcp/main/esp_zigbee_rcp.h @@ -55,7 +55,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_APB, \ + .source_clk = UART_SCLK_DEFAULT, \ }, \ .rx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \ diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index aaca695b00d9..54bb0222ff96 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -906,7 +906,6 @@ components/hal/include/hal/systimer_hal.h components/hal/include/hal/systimer_types.h components/hal/include/hal/touch_sensor_hal.h components/hal/include/hal/twai_types.h -components/hal/include/hal/uart_types.h components/hal/include/hal/uhci_types.h components/hal/include/hal/usb_hal.h components/hal/include/hal/usb_types_private.h @@ -932,7 +931,6 @@ components/hal/test/test_mpu.c components/hal/touch_sensor_hal.c components/hal/twai_hal.c components/hal/twai_hal_iram.c -components/hal/uart_hal.c components/hal/uart_hal_iram.c components/hal/usb_hal.c components/heap/heap_private.h @@ -1640,7 +1638,6 @@ components/vfs/include/esp_vfs_common.h components/vfs/include/esp_vfs_eventfd.h components/vfs/test/test_vfs_lwip.c components/vfs/test/test_vfs_paths.c -components/vfs/test/test_vfs_uart.c components/wifi_provisioning/include/wifi_provisioning/scheme_ble.h components/wifi_provisioning/include/wifi_provisioning/scheme_console.h components/wifi_provisioning/include/wifi_provisioning/scheme_softap.h @@ -2106,7 +2103,6 @@ examples/peripherals/twai/twai_network/twai_network_master/main/twai_network_exa examples/peripherals/twai/twai_network/twai_network_slave/main/twai_network_example_slave_main.c examples/peripherals/twai/twai_self_test/example_test.py examples/peripherals/twai/twai_self_test/main/twai_self_test_example_main.c -examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c examples/peripherals/uart/nmea0183_parser/main/nmea_parser_example_main.c examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c