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1 | 1 | #include <hash_functions/hash_function_sha512.h>
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2 |
| -#include <port/hash_functions/hash_function_sha512_esp32.h> |
| 2 | +#include "hash_function_sha512_esp32.h" |
3 | 3 | #include <utils/utils.h>
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4 | 4 | #include <xtensa/config/core-isa.h>
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5 | 5 | #include <xtensa/xtensa-versions.h>
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@@ -233,7 +233,7 @@ static inline void sha512_prepare_message_schedule(u64 * schedule, const u8 * in
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233 | 233 | static inline void store_64(u8 * dst, const u64 * src, size_t wordcount);
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234 | 234 | static inline void load_64(u64 * dst, const u8 * src, size_t wordcount);
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235 | 235 |
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236 |
| -void sha512_impl_sw(u8 * output, const struct iovec * iov, int iovcnt) { |
| 236 | +static inline void sha512_impl_sw(u8 * output, const struct iovec * iov, int iovcnt) { |
237 | 237 |
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238 | 238 | FE3C_SANITY_CHECK(output, NULL);
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239 | 239 | FE3C_SANITY_CHECK(iov || iovcnt == 0, NULL);
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@@ -645,3 +645,22 @@ static inline void load_64(u64 * dst, const u8 * src, size_t wordcount) {
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645 | 645 | dst[i] = __builtin_bswap64(*(u64 *) &src[8 * i]);
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646 | 646 | }
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647 | 647 | }
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| 648 | + |
| 649 | +void hash_sha512(u8 * output, const struct iovec * iov, int iovcnt) { |
| 650 | + |
| 651 | +#if FE3C_USE_SHA512_HARDWARE |
| 652 | + sha512_impl impl_select = sha512_try_lock_hw(); |
| 653 | + if (impl_select == sha512_hw_acceleration) { |
| 654 | + |
| 655 | + /* Try relying on the hardware accelerator. If that fails, we fall back to software. */ |
| 656 | + int hw_error = sha512_impl_hw(output, iov, iovcnt); |
| 657 | + sha512_release_hw(); |
| 658 | + if (0 == hw_error) { |
| 659 | + return; |
| 660 | + } |
| 661 | + |
| 662 | + /* Hardware failed us. Do it the boring way. */ |
| 663 | + } |
| 664 | +#endif |
| 665 | + sha512_impl_sw(output, iov, iovcnt); |
| 666 | +} |
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