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Rollup merge of rust-lang#136037 - no1wudi:doc, r=jieyouxu
Mark all NuttX targets as tier 3 target and support the standard library The support for standard library added by rust-lang#130595.
2 parents 689aa28 + ebf5363 commit ddb4d10

18 files changed

+51
-54
lines changed

‎compiler/rustc_target/src/spec/targets/aarch64_unknown_nuttx.rs

Lines changed: 1 addition & 1 deletion
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@@ -36,7 +36,7 @@ pub(crate) fn target() -> Target {
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description: Some("AArch64 NuttX".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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std: Some(true),
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},
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pointer_width: 64,
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data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),

‎compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabi.rs

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@@ -31,7 +31,7 @@ pub(crate) fn target() -> Target {
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description: Some("ARMv7-A Cortex-A with NuttX".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabihf.rs

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@@ -31,7 +31,7 @@ pub(crate) fn target() -> Target {
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description: Some("ARMv7-A Cortex-A with NuttX (hard float)".into()),
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tier: Some(3),
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host_tools: Some(false),
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std: Some(false),
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/riscv32imac_unknown_nuttx_elf.rs

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@@ -6,9 +6,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "riscv32".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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arch: "riscv32".into(),

‎compiler/rustc_target/src/spec/targets/riscv32imafc_unknown_nuttx_elf.rs

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@@ -6,9 +6,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "riscv32".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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arch: "riscv32".into(),

‎compiler/rustc_target/src/spec/targets/riscv32imc_unknown_nuttx_elf.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "riscv32".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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arch: "riscv32".into(),

‎compiler/rustc_target/src/spec/targets/riscv64gc_unknown_nuttx_elf.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,9 +8,9 @@ pub(crate) fn target() -> Target {
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data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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llvm_target: "riscv64".into(),
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pointer_width: 64,

‎compiler/rustc_target/src/spec/targets/riscv64imac_unknown_nuttx_elf.rs

Lines changed: 2 additions & 2 deletions
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@@ -8,9 +8,9 @@ pub(crate) fn target() -> Target {
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data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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llvm_target: "riscv64".into(),
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pointer_width: 64,

‎compiler/rustc_target/src/spec/targets/thumbv6m_nuttx_eabi.rs

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv6m-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
@@ -22,12 +22,9 @@ pub(crate) fn target() -> Target {
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llvm_floatabi: Some(FloatAbi::Soft),
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// The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
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// with +strict-align.
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// Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
26-
// The resulting atomics are ABI incompatible with atomics backed by libatomic.
27-
features: "+strict-align,+atomics-32".into(),
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// There are no atomic CAS instructions available in the instruction set of the ARMv6-M
29-
// architecture
30-
atomic_cas: false,
25+
// The ARMv6-M doesn't support hardware atomic operations, use atomic builtins instead.
26+
features: "+strict-align".into(),
27+
max_atomic_width: Some(32),
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..base::thumb::opts()
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},
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}

‎compiler/rustc_target/src/spec/targets/thumbv7a_nuttx_eabi.rs

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@@ -11,9 +11,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7a-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv7a_nuttx_eabihf.rs

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@@ -14,9 +14,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7a-none-eabihf".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabi.rs

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@@ -16,9 +16,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7em-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabihf.rs

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@@ -15,9 +15,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7em-none-eabihf".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv7m_nuttx_eabi.rs

Lines changed: 2 additions & 2 deletions
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@@ -7,9 +7,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7m-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv8m_base_nuttx_eabi.rs

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@@ -7,9 +7,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv8m.base-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabi.rs

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@@ -8,9 +8,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv8m.main-none-eabi".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabihf.rs

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@@ -8,9 +8,9 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv8m.main-none-eabihf".into(),
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metadata: crate::spec::TargetMetadata {
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description: None,
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tier: None,
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tier: Some(3),
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host_tools: None,
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std: None,
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std: Some(true),
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},
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),

‎src/doc/rustc/src/platform-support.md

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@@ -262,7 +262,7 @@ target | std | host | notes
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[`aarch64-unknown-nto-qnx710`](platform-support/nto-qnx.md) | ✓ | | ARM64 QNX Neutrino 7.1 RTOS with default network stack (io-pkt) |
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[`aarch64-unknown-nto-qnx710_iosock`](platform-support/nto-qnx.md) | ✓ | | ARM64 QNX Neutrino 7.1 RTOS with new network stack (io-sock) |
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[`aarch64-unknown-nto-qnx800`](platform-support/nto-qnx.md) | ✓ | | ARM64 QNX Neutrino 8.0 RTOS |
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[`aarch64-unknown-nuttx`](platform-support/nuttx.md) | * | | ARM64 with NuttX
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[`aarch64-unknown-nuttx`](platform-support/nuttx.md) | ✓ | | ARM64 with NuttX
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[`aarch64-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | ARM64 OpenBSD
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[`aarch64-unknown-redox`](platform-support/redox.md) | ✓ | | ARM64 Redox OS
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[`aarch64-unknown-teeos`](platform-support/aarch64-unknown-teeos.md) | ? | | ARM64 TEEOS |
@@ -298,8 +298,8 @@ target | std | host | notes
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[`armv7k-apple-watchos`](platform-support/apple-watchos.md) | ✓ | | Armv7-A Apple WatchOS
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[`armv7s-apple-ios`](platform-support/apple-ios.md) | ✓ | | Armv7-A Apple-A6 Apple iOS
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[`armv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | | Bare Armv8-R, hardfloat
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[`armv7a-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv7-A with NuttX
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[`armv7a-nuttx-eabihf`](platform-support/nuttx.md) | * | | ARMv7-A with NuttX, hardfloat
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[`armv7a-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX
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[`armv7a-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX, hardfloat
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`avr-unknown-gnu-atmega328` | * | | AVR. Requires `-Z build-std=core`
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`bpfeb-unknown-none` | * | | BPF (big endian)
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`bpfel-unknown-none` | * | | BPF (little endian)
@@ -369,40 +369,40 @@ target | std | host | notes
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[`riscv32im-risc0-zkvm-elf`](platform-support/riscv32im-risc0-zkvm-elf.md) | ? | | RISC Zero's zero-knowledge Virtual Machine (RV32IM ISA)
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[`riscv32ima-unknown-none-elf`](platform-support/riscv32-unknown-none-elf.md) | * | | Bare RISC-V (RV32IMA ISA)
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[`riscv32imac-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
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[`riscv32imac-unknown-nuttx-elf`](platform-support/nuttx.md) | * | | RISC-V 32bit with NuttX
372+
[`riscv32imac-unknown-nuttx-elf`](platform-support/nuttx.md) | ✓ | | RISC-V 32bit with NuttX
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[`riscv32imac-unknown-xous-elf`](platform-support/riscv32imac-unknown-xous-elf.md) | ? | | RISC-V Xous (RV32IMAC ISA)
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[`riscv32imafc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
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[`riscv32imafc-unknown-nuttx-elf`](platform-support/nuttx.md) | * | | RISC-V 32bit with NuttX
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[`riscv32imafc-unknown-nuttx-elf`](platform-support/nuttx.md) | ✓ | | RISC-V 32bit with NuttX
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[`riscv32imc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
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[`riscv32imc-unknown-nuttx-elf`](platform-support/nuttx.md) | * | | RISC-V 32bit with NuttX
377+
[`riscv32imc-unknown-nuttx-elf`](platform-support/nuttx.md) | ✓ | | RISC-V 32bit with NuttX
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[`riscv64-linux-android`](platform-support/android.md) | ? | | RISC-V 64-bit Android
379379
[`riscv64-wrs-vxworks`](platform-support/vxworks.md) | ✓ | |
380380
`riscv64gc-unknown-freebsd` | ? | | RISC-V FreeBSD
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`riscv64gc-unknown-fuchsia` | ? | | RISC-V Fuchsia
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[`riscv64gc-unknown-hermit`](platform-support/hermit.md) | ✓ | | RISC-V Hermit
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[`riscv64gc-unknown-netbsd`](platform-support/netbsd.md) | ✓ | ✓ | RISC-V NetBSD
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[`riscv64gc-unknown-nuttx-elf`](platform-support/nuttx.md) | * | | RISC-V 64bit with NuttX
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[`riscv64gc-unknown-nuttx-elf`](platform-support/nuttx.md) | ✓ | | RISC-V 64bit with NuttX
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[`riscv64gc-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/riscv64
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[`riscv64imac-unknown-nuttx-elf`](platform-support/nuttx.md) | * | | RISC-V 64bit with NuttX
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[`riscv64imac-unknown-nuttx-elf`](platform-support/nuttx.md) | ✓ | | RISC-V 64bit with NuttX
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[`s390x-unknown-linux-musl`](platform-support/s390x-unknown-linux-musl.md) | ✓ | | S390x Linux (kernel 3.2, musl 1.2.3)
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`sparc-unknown-linux-gnu` | ✓ | | 32-bit SPARC Linux
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[`sparc-unknown-none-elf`](./platform-support/sparc-unknown-none-elf.md) | * | | Bare 32-bit SPARC V7+
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[`sparc64-unknown-netbsd`](platform-support/netbsd.md) | ✓ | ✓ | NetBSD/sparc64
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[`sparc64-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/sparc64
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[`thumbv4t-none-eabi`](platform-support/armv4t-none-eabi.md) | * | | Thumb-mode Bare Armv4T
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[`thumbv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | Thumb-mode Bare Armv5TE
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[`thumbv6m-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv6M with NuttX
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[`thumbv6m-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv6M with NuttX
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`thumbv7a-pc-windows-msvc` | | |
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[`thumbv7a-uwp-windows-msvc`](platform-support/uwp-windows-msvc.md) | | |
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[`thumbv7a-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv7-A with NuttX
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[`thumbv7a-nuttx-eabihf`](platform-support/nuttx.md) | * | | ARMv7-A with NuttX, hardfloat
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[`thumbv7em-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv7EM with NuttX
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[`thumbv7em-nuttx-eabihf`](platform-support/nuttx.md) | * | | ARMv7EM with NuttX, hardfloat
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[`thumbv7m-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv7M with NuttX
397+
[`thumbv7a-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX
398+
[`thumbv7a-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX, hardfloat
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[`thumbv7em-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7EM with NuttX
400+
[`thumbv7em-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7EM with NuttX, hardfloat
401+
[`thumbv7m-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7M with NuttX
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`thumbv7neon-unknown-linux-musleabihf` | ? | | Thumb2-mode Armv7-A Linux with NEON, musl 1.2.3
403-
[`thumbv8m.base-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv8M Baseline with NuttX
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[`thumbv8m.main-nuttx-eabi`](platform-support/nuttx.md) | * | | ARMv8M Mainline with NuttX
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[`thumbv8m.main-nuttx-eabihf`](platform-support/nuttx.md) | * | | ARMv8M Mainline with NuttX, hardfloat
403+
[`thumbv8m.base-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv8M Baseline with NuttX
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[`thumbv8m.main-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv8M Mainline with NuttX
405+
[`thumbv8m.main-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv8M Mainline with NuttX, hardfloat
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[`wasm64-unknown-unknown`](platform-support/wasm64-unknown-unknown.md) | ? | | WebAssembly
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[`x86_64-apple-tvos`](platform-support/apple-tvos.md) | ✓ | | x86 64-bit tvOS
408408
[`x86_64-apple-watchos-sim`](platform-support/apple-watchos.md) | ✓ | | x86 64-bit Apple WatchOS simulator

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