diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc index d8d0f268d..24702838d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc +++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc @@ -4,39 +4,39 @@ SRC_URI:append = " \ file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \ file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \ - file://0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \ + file://0004-Fix-relaxation-of-assembler-resolved-references-Fixu.patch \ file://0005-upstream-change-to-garbage-collection-sweep-causes-m.patch \ file://0006-Fix-bug-in-TLSTPREL-Relocation.patch \ file://0007-Added-Address-extension-instructions.patch \ file://0008-fixing-the-MAX_OPCODES-to-correct-value.patch \ file://0009-Add-new-bit-field-instructions.patch \ - file://0010-fixing-the-imm-bug.patch \ - file://0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \ - file://0012-fixing-the-constant-range-check-issue.patch \ - file://0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \ - file://0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch \ - file://0015-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ + file://0010-fixing-the-imm-bug.-with-relax-option-imm-1-is-also-.patch \ + file://0011-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch \ + file://0012-fixing-the-constant-range-check-issue-sample-error-n.patch \ + file://0013-Compiler-will-give-error-messages-in-more-detail-for.patch \ + file://0014-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0015-negl-instruction-is-overriding-rsubl-fixed-it-by-cha.patch \ file://0016-Added-relocations-for-MB-X.patch \ - file://0017-Fixed-MB-x-relocation-issues.patch \ + file://0017-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch \ file://0018-Fixing-the-branch-related-issues.patch \ - file://0019-Fixed-address-computation-issues-with-64bit-address.patch \ + file://0019-Fixed-address-computation-issues-with-64bit-address-.patch \ file://0020-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch \ file://0021-fixing-the-.bss-relocation-issue.patch \ file://0022-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ - file://0023-Revert-ld-Remove-unused-expression-state.patch \ + file://0023-Revert-ld-Remove-unused-expression-state-defsym-symb.patch \ file://0024-fixing-the-long-long-long-mingw-toolchain-issue.patch \ file://0025-Added-support-to-new-arithmetic-single-register-inst.patch \ - file://0026-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \ + file://0026-double-imml-generation-for-64-bit-values.patch \ file://0027-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \ - file://0028-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \ - file://0029-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \ - file://0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch \ + file://0028-This-patch-will-remove-imml-0-and-imml-1-instruction.patch \ + file://0029-improper-address-mapping-of-PROVIDE-directive-symbol.patch \ + file://0030-Changing-the-long-to-long-long-as-in-Windows-long-is.patch \ file://0031-gas-revert-moving-of-md_pseudo_table-from-const.patch \ file://0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \ - file://0033-Add-initial-port-of-linux-gdbserver.patch \ - file://0034-Initial-port-of-core-reading-support.patch \ - file://0038-Patch-MB-MB-binutils-Upstream-port-issues.patch \ - file://0039-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch \ - file://0040-Patch-MicroBlaze-Fixing-the-imm-imml-generation-for-.patch \ - file://0041-Patch-MicroBlaze-Invalid-data-offsets-pointer-after-.patch \ + file://0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \ + file://0034-Initial-port-of-core-reading-support-Added-support-f.patch \ + file://0035-MB-binutils-Upstream-port-issues.patch \ + file://0036-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch \ + file://0037-Fixing-the-imm-imml-generation-for-16-bit-argument-C.patch \ + file://0038-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch \ " diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch index c34600e5c..53416280d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch @@ -1,4 +1,4 @@ -From baa73267935dc5854f4e07c809a46e42aa8cca4b Mon Sep 17 00:00:00 2001 +From fd654b0c7b88cd55fa659e0acea91296c7ed8e80 Mon Sep 17 00:00:00 2001 From: David Holsgrove Date: Wed, 8 May 2013 11:03:36 +1000 Subject: [PATCH 01/38] Add wdc.ext.clear and wdc.ext.flush insns @@ -9,13 +9,14 @@ used with the new coherency support for multiprocessing. Signed-off-by:nagaraju Signed-off-by: David Holsgrove +Signed-off-by: Mark Hatle --- opcodes/microblaze-opc.h | 5 ++++- opcodes/microblaze-opcm.h | 4 ++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 080d238bd2b..746566fdb87 100644 +index ffb0f08c692..b8a0cf82516 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -91,6 +91,7 @@ @@ -46,7 +47,7 @@ index 080d238bd2b..746566fdb87 100644 {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 6dd3694f4be..10d7e883366 100644 +index 8e293465fec..e56c1d2d47c 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -33,8 +33,8 @@ enum microblaze_instr @@ -61,5 +62,5 @@ index 6dd3694f4be..10d7e883366 100644 imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch index 03fcf2f07..ace172b64 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch @@ -1,4 +1,4 @@ -From 2c240d885b5871571d93af64baf2e67f077f735c Mon Sep 17 00:00:00 2001 +From 2daa3e3863ee052020ad07ac59c49b7f82f7a9d1 Mon Sep 17 00:00:00 2001 From: nagaraju Date: Tue, 19 Mar 2013 17:18:23 +0530 Subject: [PATCH 02/38] Add mlittle-endian and mbig-endian flags @@ -11,12 +11,13 @@ to include new entries. Signed-off-by:nagaraju Signed-off-by: David Holsgrove +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 881172d5274..d6fc400cef9 100644 +index 3db17a76ee7..c927331ea0a 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -37,6 +37,8 @@ @@ -60,5 +61,5 @@ index 881172d5274..d6fc400cef9 100644 -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch index b76020f50..09af3e82b 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch @@ -1,4 +1,4 @@ -From fc6844169e72155a008d963c3991ed084e0d0890 Mon Sep 17 00:00:00 2001 +From 7982c0bdd92531bca3b829255324a769df9521e1 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Fri, 22 Jun 2012 01:20:20 +0200 Subject: [PATCH 03/38] Disable the warning message for eh_frame_hdr @@ -7,12 +7,13 @@ Signed-off-by: Edgar E. Iglesias Conflicts: bfd/elf-eh-frame.c +Signed-off-by: Mark Hatle --- bfd/elf-eh-frame.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c -index 6ce6d225cff..c6b0c122459 100644 +index 2e22d0c9215..db470ed43c3 100644 --- a/bfd/elf-eh-frame.c +++ b/bfd/elf-eh-frame.c @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, @@ -30,5 +31,5 @@ index 6ce6d225cff..c6b0c122459 100644 free (sec_info); success: -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references-Fixu.patch similarity index 83% rename from meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references-Fixu.patch index 03b847984..adb6e2130 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references-Fixu.patch @@ -1,11 +1,10 @@ -From 786c2252440ed07d05c1ab37675e5138e7b44bb8 Mon Sep 17 00:00:00 2001 +From 1b47ecbc256f807b239f3f275fefd53bba0f0cde Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 8 Nov 2016 11:54:08 +0530 -Subject: [PATCH 04/38] [LOCAL]: Fix relaxation of assembler resolved - references,Fixup debug_loc sections after linker relaxation Adds a new - reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the - assembler to the linker when the linker manages to fully resolve a local - symbol reference. +Subject: [PATCH 04/38] Fix relaxation of assembler resolved references,Fixup + debug_loc sections after linker relaxation Adds a new reloctype + R_MICROBLAZE_32_NONE, used for passing reloc info from the assembler to the + linker when the linker manages to fully resolve a local symbol reference. This is a workaround for design flaws in the assembler to linker interface with regards to linker relaxation. @@ -20,21 +19,22 @@ Conflicts: Conflicts: binutils/readelf.c +Signed-off-by: Mark Hatle --- bfd/bfd-in2.h | 5 ++ - bfd/elf32-microblaze.c | 126 ++++++++++++++++++++++++++++--------- + bfd/elf32-microblaze.c | 118 +++++++++++++++++++++++++++++-------- bfd/libbfd.h | 1 + bfd/reloc.c | 6 ++ binutils/readelf.c | 4 ++ gas/config/tc-microblaze.c | 4 ++ include/elf/microblaze.h | 2 + - 7 files changed, 119 insertions(+), 29 deletions(-) + 7 files changed, 115 insertions(+), 25 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 9a698316980..943bc2e914c 100644 +index 1f0f18a7e75..26e3bb2b34b 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h -@@ -5423,6 +5423,11 @@ value relative to the read-write small data area anchor */ +@@ -5379,6 +5379,11 @@ value relative to the read-write small data area anchor */ expressions of the form "Symbol Op Symbol" */ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, @@ -47,7 +47,7 @@ index 9a698316980..943bc2e914c 100644 value in two words (with an imm instruction). No relocation is done here - only used for relaxing */ diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index d9c0d93a01a..2316e085d1f 100644 +index 013c32a1e51..e36cd102bd2 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c @@ -175,6 +175,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = @@ -70,7 +70,7 @@ index d9c0d93a01a..2316e085d1f 100644 + HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ 0, /* Rightshift. */ - 3, /* Size (0 = byte, 1 = short, 2 = long). */ + 0, /* Size. */ @@ -560,7 +574,10 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, case BFD_RELOC_NONE: microblaze_reloc = R_MICROBLAZE_NONE; @@ -83,7 +83,7 @@ index d9c0d93a01a..2316e085d1f 100644 microblaze_reloc = R_MICROBLAZE_64_NONE; break; case BFD_RELOC_32: -@@ -1910,18 +1927,26 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -1954,14 +1971,22 @@ microblaze_elf_relax_section (bfd *abfd, } break; case R_MICROBLAZE_NONE: @@ -91,30 +91,22 @@ index d9c0d93a01a..2316e085d1f 100644 { /* This was a PC-relative instruction that was completely resolved. */ - int sfix, efix; -+ unsigned int val; + size_t sfix, efix; ++ unsigned int val; bfd_vma target_address; target_address = irel->r_addend + irel->r_offset; sfix = calc_fixup (irel->r_offset, 0, sec); efix = calc_fixup (target_address, 0, sec); -- irel->r_addend -= (efix - sfix); -- /* Should use HOWTO. */ -- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, -- irel->r_addend); + -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } -+ irel->r_addend -= (efix - sfix); -+ /* Should use HOWTO. */ -+ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, -+ irel->r_addend); - } - break; - case R_MICROBLAZE_64_NONE: -@@ -1965,30 +1990,73 @@ microblaze_elf_relax_section (bfd *abfd, ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } + irel->r_addend -= (efix - sfix); + /* Should use HOWTO. */ + microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, +@@ -2009,30 +2034,73 @@ microblaze_elf_relax_section (bfd *abfd, irelscanend = irelocs + o->reloc_count; for (irelscan = irelocs; irelscan < irelscanend; irelscan++) { @@ -211,7 +203,7 @@ index d9c0d93a01a..2316e085d1f 100644 o->rawsize)) goto error_return; elf_section_data (o)->this_hdr.contents = ocontents; -@@ -2024,7 +2092,7 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2068,7 +2136,7 @@ microblaze_elf_relax_section (bfd *abfd, elf_section_data (o)->this_hdr.contents = ocontents; } } @@ -221,10 +213,10 @@ index d9c0d93a01a..2316e085d1f 100644 0, sec); diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index c37ddc03cfd..4153b94564d 100644 +index 29e8187f95f..ea2507d1879 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h -@@ -2988,6 +2988,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", +@@ -2989,6 +2989,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_32_ROSDA", "BFD_RELOC_MICROBLAZE_32_RWSDA", "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", @@ -233,10 +225,10 @@ index c37ddc03cfd..4153b94564d 100644 "BFD_RELOC_MICROBLAZE_64_GOTPC", "BFD_RELOC_MICROBLAZE_64_GOT", diff --git a/bfd/reloc.c b/bfd/reloc.c -index 6d920e1df06..3a08f7a8a42 100644 +index 36999fe9a40..5ac8a8536a7 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c -@@ -6896,6 +6896,12 @@ ENUM +@@ -6867,6 +6867,12 @@ ENUM ENUMDOC This is a 32 bit reloc for the microblaze to handle expressions of the form "Symbol Op Symbol" @@ -250,10 +242,10 @@ index 6d920e1df06..3a08f7a8a42 100644 BFD_RELOC_MICROBLAZE_64_NONE ENUMDOC diff --git a/binutils/readelf.c b/binutils/readelf.c -index a6073f7ec80..5b25fb9a52a 100644 +index 0f5977bc072..acd12713361 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c -@@ -14057,6 +14057,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) +@@ -14621,6 +14621,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 1; /* R_Z80_8. */ default: return false; @@ -265,7 +257,7 @@ index a6073f7ec80..5b25fb9a52a 100644 } diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index d6fc400cef9..87efc2b7a46 100644 +index c927331ea0a..8018d1f5686 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2211,9 +2211,12 @@ md_apply_fix (fixS * fixP, @@ -290,7 +282,7 @@ index d6fc400cef9..87efc2b7a46 100644 case BFD_RELOC_32: case BFD_RELOC_MICROBLAZE_32_LO: diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index 66b4fda8f54..936ef484289 100644 +index 43ad3ad3904..a2e1ce4580f 100644 --- a/include/elf/microblaze.h +++ b/include/elf/microblaze.h @@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) @@ -303,5 +295,5 @@ index 66b4fda8f54..936ef484289 100644 /* Global base address names. */ -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch index f2419c4c3..ec2a898f5 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch @@ -1,4 +1,4 @@ -From 48e989bf1ff9ce0250256afc95d40d75fa098e21 Mon Sep 17 00:00:00 2001 +From 318f98ea7f4271b3dd6e364d751415410a4076ac Mon Sep 17 00:00:00 2001 From: David Holsgrove Date: Wed, 27 Feb 2013 13:56:11 +1000 Subject: [PATCH 05/38] upstream change to garbage collection sweep causes mb @@ -21,15 +21,16 @@ Signed-off-by: David Holsgrove Conflicts: bfd/elflink.c +Signed-off-by: Mark Hatle --- bfd/elflink.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bfd/elflink.c b/bfd/elflink.c -index 9a05208253c..bdfbcecef92 100644 +index 2b1450fa4e1..c50919060b3 100644 --- a/bfd/elflink.c +++ b/bfd/elflink.c -@@ -6432,7 +6432,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) +@@ -6576,7 +6576,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) inf = (struct elf_gc_sweep_symbol_info *) data; (*inf->hide_symbol) (inf->info, h, true); @@ -38,5 +39,5 @@ index 9a05208253c..bdfbcecef92 100644 h->ref_regular_nonweak = 0; } -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch index 5221bb33b..5d42170bf 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch @@ -1,4 +1,4 @@ -From a150edd000f83578755a749bb8c44553e0dbc1f0 Mon Sep 17 00:00:00 2001 +From 8cfdaf2c7c3b3e8572588e6749f688f6b702fe35 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 15 Jun 2015 16:50:30 +0530 Subject: [PATCH 06/38] Fix bug in TLSTPREL Relocation @@ -8,15 +8,17 @@ When the fixup is applied the addend is not added at the correct offset of the instruction. The offset is hard coded considering its big endian and it fails for Little endian. This patch allows support for both big & little-endian compilers + +Signed-off-by: Mark Hatle --- bfd/elf32-microblaze.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 2316e085d1f..e0729c6a194 100644 +index e36cd102bd2..c66f4ffef36 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -1443,9 +1443,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1484,9 +1484,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, relocation += addend; relocation -= dtprel_base(info); bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, @@ -29,5 +31,5 @@ index 2316e085d1f..e0729c6a194 100644 case (int) R_MICROBLAZE_TEXTREL_64: case (int) R_MICROBLAZE_TEXTREL_32_LO: -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch index 2f1d83d75..b60c9085d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch @@ -1,4 +1,4 @@ -From fc3bbcce05e1726bf98948cebfef841b84df73cb Mon Sep 17 00:00:00 2001 +From be2ecb2dd73901484995c39d6c7375be6b8dd545 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 18 Jan 2016 12:28:21 +0530 Subject: [PATCH 07/38] Added Address extension instructions @@ -18,13 +18,15 @@ ChangeLog: Conflicts: opcodes/microblaze-opcm.h + +Signed-off-by: Mark Hatle --- opcodes/microblaze-opc.h | 11 +++++++++++ opcodes/microblaze-opcm.h | 10 +++++----- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 746566fdb87..5d165dcdf91 100644 +index b8a0cf82516..d3f8e36199e 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -178,8 +178,11 @@ const struct op_code_struct @@ -74,7 +76,7 @@ index 746566fdb87..5d165dcdf91 100644 {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, {"", 0, 0, 0, 0, 0, 0, 0, 0}, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 10d7e883366..250fd6a250a 100644 +index e56c1d2d47c..ad964560c17 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -33,13 +33,13 @@ enum microblaze_instr @@ -95,7 +97,7 @@ index 10d7e883366..250fd6a250a 100644 + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, + /* 'fsqrt' is a glibc:math.h symbol. */ -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch index 4c3caa518..d6faee70e 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch @@ -1,14 +1,15 @@ -From bb27e620e2911e472eee6c1ee4fb2a1e722b65aa Mon Sep 17 00:00:00 2001 +From ba9dde9e1068bb282bb0695d1159cd100bcae54f Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Thu, 28 Jan 2016 14:07:34 +0530 Subject: [PATCH 08/38] fixing the MAX_OPCODES to correct value +Signed-off-by: Mark Hatle --- opcodes/microblaze-opc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 5d165dcdf91..bf53e492b9a 100644 +index d3f8e36199e..3b3cdbe710c 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -102,7 +102,7 @@ @@ -21,5 +22,5 @@ index 5d165dcdf91..bf53e492b9a 100644 const struct op_code_struct { -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch index 5cd7d9c8c..85f0bfcfc 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch @@ -1,4 +1,4 @@ -From c5c42765e7436fa20cc2069fa0426995cf940e5a Mon Sep 17 00:00:00 2001 +From 3f45718e99e09679472366a2c7e454c75f0383e3 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 18 Jul 2016 12:24:28 +0530 Subject: [PATCH 09/38] Add new bit-field instructions @@ -15,6 +15,7 @@ Signed-off-by :Nagaraju Mekala Conflicts: opcodes/microblaze-dis.c +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++- opcodes/microblaze-dis.c | 20 +++++++++-- @@ -22,10 +23,10 @@ Conflicts: opcodes/microblaze-opcm.h | 6 +++- 4 files changed, 104 insertions(+), 5 deletions(-) -Index: git/gas/config/tc-microblaze.c -=================================================================== ---- git.orig/gas/config/tc-microblaze.c -+++ git/gas/config/tc-microblaze.c +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 8018d1f5686..1cb9b2519c3 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c @@ -917,7 +917,7 @@ md_assemble (char * str) unsigned reg2; unsigned reg3; @@ -60,7 +61,7 @@ Index: git/gas/config/tc-microblaze.c + as_fatal (_("Cannot use special register with this instruction")); + if (check_spl_reg (®2)) + as_fatal (_("Cannot use special register with this instruction")); -+ + + /* Width immediate value. */ + if (strcmp (op_end, "")) + op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); @@ -75,7 +76,7 @@ Index: git/gas/config/tc-microblaze.c + immed = exp.X_add_number; + if (opcode->instr == bsefi && immed > 31) + as_fatal (_("Width value must be less than 32")); - ++ + /* Shift immediate value. */ + if (strcmp (op_end, "")) + op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); @@ -112,11 +113,11 @@ Index: git/gas/config/tc-microblaze.c case INST_TYPE_R1_R2: if (strcmp (op_end, "")) op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -Index: git/opcodes/microblaze-dis.c -=================================================================== ---- git.orig/opcodes/microblaze-dis.c -+++ git/opcodes/microblaze-dis.c -@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf * +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index b057492ba93..f57b98fc9f7 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) } static char * @@ -137,7 +138,7 @@ Index: git/opcodes/microblaze-dis.c { char *p = strbuf (buf); -@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, +@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) /* For mbar 16 or sleep insn. */ case INST_TYPE_NONE: break; @@ -150,10 +151,10 @@ Index: git/opcodes/microblaze-dis.c case INST_TYPE_RD: print_func (stream, "\t%s", get_field_rd (&buf, inst)); break; -Index: git/opcodes/microblaze-opc.h -=================================================================== ---- git.orig/opcodes/microblaze-opc.h -+++ git/opcodes/microblaze-opc.h +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index 3b3cdbe710c..825c639a41e 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h @@ -59,6 +59,9 @@ /* For mbar. */ #define INST_TYPE_IMM5 20 @@ -201,10 +202,10 @@ Index: git/opcodes/microblaze-opc.h + #endif /* MICROBLAZE_OPC */ -Index: git/opcodes/microblaze-opcm.h -=================================================================== ---- git.orig/opcodes/microblaze-opcm.h -+++ git/opcodes/microblaze-opcm.h +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index ad964560c17..aa3401610d9 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h @@ -29,7 +29,7 @@ enum microblaze_instr addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, mulh, mulhu, mulhsu,swapb,swaph, @@ -214,7 +215,7 @@ Index: git/opcodes/microblaze-opcm.h /* 'or/and/xor' are C++ keywords. */ microblaze_or, microblaze_and, microblaze_xor, andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -@@ -129,6 +129,7 @@ enum microblaze_instr_type +@@ -130,6 +130,7 @@ enum microblaze_instr_type #define RB_LOW 11 /* Low bit for RB. */ #define IMM_LOW 0 /* Low bit for immediate. */ #define IMM_MBAR 21 /* low bit for mbar instruction. */ @@ -222,7 +223,7 @@ Index: git/opcodes/microblaze-opcm.h #define RD_MASK 0x03E00000 #define RA_MASK 0x001F0000 -@@ -141,6 +142,9 @@ enum microblaze_instr_type +@@ -142,6 +143,9 @@ enum microblaze_instr_type /* Imm mask for mbar. */ #define IMM5_MBAR_MASK 0x03E00000 @@ -232,3 +233,6 @@ Index: git/opcodes/microblaze-opcm.h /* FSL imm mask for get, put instructions. */ #define RFSL_MASK 0x000000F +-- +2.25.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.-with-relax-option-imm-1-is-also-.patch similarity index 68% rename from meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.-with-relax-option-imm-1-is-also-.patch index 1c939a840..7cde81471 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.-with-relax-option-imm-1-is-also-.patch @@ -1,18 +1,19 @@ -From ca1e831754eba0e38c1b7ceefd6a3d25c7d36e59 Mon Sep 17 00:00:00 2001 +From 248b0c67ed37bdc2ab0ba1d2c42a4ce200bbc237 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 10 Jul 2017 16:07:28 +0530 Subject: [PATCH 10/38] fixing the imm bug. with relax option imm -1 is also getting removed this is corrected now. +Signed-off-by: Mark Hatle --- bfd/elf32-microblaze.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index e0729c6a194..e378542b902 100644 +index c66f4ffef36..8c89bdcaeeb 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -1861,8 +1861,7 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -1905,8 +1905,7 @@ microblaze_elf_relax_section (bfd *abfd, else symval += irel->r_addend; @@ -21,7 +22,7 @@ index e0729c6a194..e378542b902 100644 + if ((symval & 0xffff8000) == 0) { /* We can delete this instruction. */ - sec->relax[sec->relax_count].addr = irel->r_offset; + sdata->relax[sdata->relax_count].addr = irel->r_offset; -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch similarity index 72% rename from meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0011-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch index 3118ea8c5..9ab38bbb3 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch @@ -1,15 +1,16 @@ -From b844e6bdbb6aa0dd63055e8c763f68f83ab15318 Mon Sep 17 00:00:00 2001 +From 6d52004e565699474956e8eaf4f11c32b1c2a64a Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Fri, 29 Sep 2017 18:00:23 +0530 -Subject: [PATCH 11/38] [Patch,Microblaze]: fixed bug in GCC so that It will - support .long 0U and .long 0u +Subject: [PATCH 11/38] fixed bug in GCC so that It will support .long 0U and + .long 0u +Signed-off-by: Mark Hatle --- gas/expr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gas/expr.c b/gas/expr.c -index 03caa91f4d1..469a52cfd56 100644 +index 6ad8bee2733..a1281ef71a8 100644 --- a/gas/expr.c +++ b/gas/expr.c @@ -832,6 +832,15 @@ operand (expressionS *expressionP, enum expr_mode mode) @@ -29,5 +30,5 @@ index 03caa91f4d1..469a52cfd56 100644 switch (c) { -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue-sample-error-n.patch similarity index 84% rename from meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue-sample-error-n.patch index 459539066..9f296ab97 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue-sample-error-n.patch @@ -1,15 +1,16 @@ -From 5d4d7383a152bfc87ac7fdf5fcaef7eaca500836 Mon Sep 17 00:00:00 2001 +From 855b983d270911c35c52b181426e9771f0851979 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 16 Oct 2017 15:44:23 +0530 Subject: [PATCH 12/38] fixing the constant range check issue sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000 +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index aa58a18f05c..98d0c259246 100644 +index 1cb9b2519c3..086f8704156 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) @@ -22,5 +23,5 @@ index aa58a18f05c..98d0c259246 100644 as_fatal (_("operand must be absolute in range %lx..%lx, not %lx"), (long) min, (long) max, (long) e->X_add_number); -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Compiler-will-give-error-messages-in-more-detail-for.patch similarity index 75% rename from meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0013-Compiler-will-give-error-messages-in-more-detail-for.patch index 22404408b..e76ef442d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Compiler-will-give-error-messages-in-more-detail-for.patch @@ -1,18 +1,19 @@ -From 094a9534b55a51982857859553c582492bf91815 Mon Sep 17 00:00:00 2001 +From a1169180250097b012ed69e3181ea0b4e22ae022 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 21 Feb 2018 12:32:02 +0530 -Subject: [PATCH 13/38] [Patch,Microblaze]: Compiler will give error messages - in more detail for mxl-gp-opt flag.. +Subject: [PATCH 13/38] Compiler will give error messages in more detail for + mxl-gp-opt flag.. +Signed-off-by: Mark Hatle --- ld/ldmain.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/ld/ldmain.c b/ld/ldmain.c -index 42660eb9a3c..7849f060aad 100644 +index 545f6a0f31a..d4502e7f3b0 100644 --- a/ld/ldmain.c +++ b/ld/ldmain.c -@@ -1562,6 +1562,18 @@ reloc_overflow (struct bfd_link_info *info, +@@ -1566,6 +1566,18 @@ reloc_overflow (struct bfd_link_info *info, break; case bfd_link_hash_defined: case bfd_link_hash_defweak: @@ -32,5 +33,5 @@ index 42660eb9a3c..7849f060aad 100644 "%s against symbol `%pT' defined in %pA section in %pB"), reloc_name, entry->root.string, -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-initial-support-for-MicroBlaze-64-bit-m64.patch similarity index 94% rename from meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0014-initial-support-for-MicroBlaze-64-bit-m64.patch index 0d70bf25c..90563dc50 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -1,9 +1,9 @@ -From b53570b1b4eb3e57b21e44515c202dc710b438ce Mon Sep 17 00:00:00 2001 +From fb0b2c799f37daba8aca5d64966f426d16e07cf8 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 1 Nov 2021 19:06:53 +0530 -Subject: [PATCH 14/38] [Patch,MicroBlaze] : initial support for MicroBlaze 64 - bit [-m64] +Subject: [PATCH 14/38] initial support for MicroBlaze 64 bit [-m64] +Signed-off-by: Mark Hatle --- bfd/Makefile.am | 2 + bfd/Makefile.in | 3 + @@ -11,9 +11,9 @@ Subject: [PATCH 14/38] [Patch,MicroBlaze] : initial support for MicroBlaze 64 bfd/config.bfd | 4 + bfd/configure | 2 + bfd/configure.ac | 2 + - bfd/cpu-microblaze.c | 53 +- + bfd/cpu-microblaze.c | 55 +- bfd/elf32-microblaze.c | 65 +- - bfd/elf64-microblaze.c | 3577 ++++++++++++++++++++++++++++ + bfd/elf64-microblaze.c | 3622 ++++++++++++++++++++++++++++ bfd/libbfd.h | 2 + bfd/reloc.c | 12 + bfd/targets.c | 6 + @@ -29,15 +29,15 @@ Subject: [PATCH 14/38] [Patch,MicroBlaze] : initial support for MicroBlaze 64 opcodes/microblaze-dis.c | 35 +- opcodes/microblaze-opc.h | 162 +- opcodes/microblaze-opcm.h | 24 +- - 24 files changed, 4375 insertions(+), 69 deletions(-) + 24 files changed, 4422 insertions(+), 69 deletions(-) create mode 100644 bfd/elf64-microblaze.c create mode 100644 ld/emulparams/elf64microblaze.sh create mode 100644 ld/emulparams/elf64microblazeel.sh -Index: git/bfd/Makefile.am -=================================================================== ---- git.orig/bfd/Makefile.am -+++ git/bfd/Makefile.am +diff --git a/bfd/Makefile.am b/bfd/Makefile.am +index 670e0598f55..c76adec960a 100644 +--- a/bfd/Makefile.am ++++ b/bfd/Makefile.am @@ -563,6 +563,7 @@ BFD64_BACKENDS = \ elf64-riscv.lo \ elfxx-riscv.lo \ @@ -46,7 +46,7 @@ Index: git/bfd/Makefile.am elf64-sparc.lo \ elf64-tilegx.lo \ elf64-x86-64.lo \ -@@ -599,6 +600,7 @@ BFD64_BACKENDS_CFILES = \ +@@ -600,6 +601,7 @@ BFD64_BACKENDS_CFILES = \ elf64-nfp.c \ elf64-ppc.c \ elf64-s390.c \ @@ -54,11 +54,11 @@ Index: git/bfd/Makefile.am elf64-sparc.c \ elf64-tilegx.c \ elf64-x86-64.c \ -Index: git/bfd/Makefile.in -=================================================================== ---- git.orig/bfd/Makefile.in -+++ git/bfd/Makefile.in -@@ -991,6 +991,7 @@ BFD64_BACKENDS = \ +diff --git a/bfd/Makefile.in b/bfd/Makefile.in +index 6edacdfeb0e..e2721f43391 100644 +--- a/bfd/Makefile.in ++++ b/bfd/Makefile.in +@@ -1030,6 +1030,7 @@ BFD64_BACKENDS = \ elf64-riscv.lo \ elfxx-riscv.lo \ elf64-s390.lo \ @@ -66,7 +66,7 @@ Index: git/bfd/Makefile.in elf64-sparc.lo \ elf64-tilegx.lo \ elf64-x86-64.lo \ -@@ -1027,6 +1028,7 @@ BFD64_BACKENDS_CFILES = \ +@@ -1067,6 +1068,7 @@ BFD64_BACKENDS_CFILES = \ elf64-nfp.c \ elf64-ppc.c \ elf64-s390.c \ @@ -74,7 +74,7 @@ Index: git/bfd/Makefile.in elf64-sparc.c \ elf64-tilegx.c \ elf64-x86-64.c \ -@@ -1535,6 +1537,7 @@ distclean-compile: +@@ -1650,6 +1652,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ @@ -82,36 +82,36 @@ Index: git/bfd/Makefile.in @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ -Index: git/bfd/bfd-in2.h -=================================================================== ---- git.orig/bfd/bfd-in2.h -+++ git/bfd/bfd-in2.h -@@ -5436,11 +5436,21 @@ done here - only used for relaxing */ +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 26e3bb2b34b..6cf701abf10 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -5389,11 +5389,21 @@ value in two words (with an imm instruction). No relocation is + done here - only used for relaxing */ BFD_RELOC_MICROBLAZE_64_NONE, - /* This is a 64 bit reloc that stores the 32 bit pc relative ++/* This is a 64 bit reloc that stores the 32 bit pc relative + * +value in two words (with an imml instruction). No relocation is + * +done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64, + -+/* This is a 64 bit reloc that stores the 32 bit pc relative + /* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is PC-relative GOT offset */ BFD_RELOC_MICROBLAZE_64_GOTPC, - /* This is a 64 bit reloc that stores the 32 bit pc relative ++/* This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imml instruction). The relocation is +PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + -+/* This is a 64 bit reloc that stores the 32 bit pc relative + /* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is GOT offset */ - BFD_RELOC_MICROBLAZE_64_GOT, -Index: git/bfd/config.bfd -=================================================================== ---- git.orig/bfd/config.bfd -+++ git/bfd/config.bfd +diff --git a/bfd/config.bfd b/bfd/config.bfd +index a4c6c8e8854..49208534de3 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd @@ -855,11 +855,15 @@ case "${targ}" in microblazeel*-*) targ_defvec=microblaze_elf32_le_vec @@ -128,11 +128,11 @@ Index: git/bfd/config.bfd ;; #ifdef BFD64 -Index: git/bfd/configure -=================================================================== ---- git.orig/bfd/configure -+++ git/bfd/configure -@@ -14198,6 +14198,8 @@ do +diff --git a/bfd/configure b/bfd/configure +index d90db11744b..08e33cf64cd 100755 +--- a/bfd/configure ++++ b/bfd/configure +@@ -14196,6 +14196,8 @@ do s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; @@ -141,11 +141,11 @@ Index: git/bfd/configure sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;; -Index: git/bfd/configure.ac -=================================================================== ---- git.orig/bfd/configure.ac -+++ git/bfd/configure.ac -@@ -627,6 +627,8 @@ do +diff --git a/bfd/configure.ac b/bfd/configure.ac +index 73e5e03d016..20a50d0f308 100644 +--- a/bfd/configure.ac ++++ b/bfd/configure.ac +@@ -603,6 +603,8 @@ do s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; @@ -154,11 +154,11 @@ Index: git/bfd/configure.ac sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;; -Index: git/bfd/cpu-microblaze.c -=================================================================== ---- git.orig/bfd/cpu-microblaze.c -+++ git/bfd/cpu-microblaze.c -@@ -23,7 +23,24 @@ +diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c +index 0c1d2b1aa69..f64f659cf44 100644 +--- a/bfd/cpu-microblaze.c ++++ b/bfd/cpu-microblaze.c +@@ -23,7 +23,25 @@ #include "bfd.h" #include "libbfd.h" @@ -177,33 +177,35 @@ Index: git/bfd/cpu-microblaze.c + 3, /* Section align power. */ + false, /* Is this the default architecture ? */ + bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_default_scan, /* String to architecture conversion. */ + bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ ++ &bfd_microblaze_arch[1], /* Next in list. */ ++ 0 /* Maximum offset of a reloc from the start of an insn. */ +}, { 32, /* Bits in a word. */ 32, /* Bits in an address. */ -@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_ +@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch = bfd_arch_default_fill, /* Default fill. */ NULL, /* Next in list. */ 0 /* Maximum offset of a reloc from the start of an insn. */ +} +#else +{ -+ 32, /* 32 bits in a word. */ -+ 32, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ ++ 32, /* 32 bits in a word. */ ++ 32, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ + bfd_arch_microblaze, /* Architecture. */ -+ 0, /* Machine number - 0 for now. */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ true, /* Is this the default architecture ? */ ++ 0, /* Machine number - 0 for now. */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ true, /* Is this the default architecture ? */ + bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_default_scan, /* String to architecture conversion. */ + bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ ++ &bfd_microblaze_arch[1], /* Next in list. */ ++ 0 /* Maximum offset of a reloc from the start of an insn. */ +}, +{ + 64, /* 32 bits in a word. */ @@ -223,11 +225,11 @@ Index: git/bfd/cpu-microblaze.c +} +#endif }; -Index: git/bfd/elf32-microblaze.c -=================================================================== ---- git.orig/bfd/elf32-microblaze.c -+++ git/bfd/elf32-microblaze.c -@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_h +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 8c89bdcaeeb..71ff973573c 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 0x0000ffff, /* Dest Mask. */ true), /* PC relative offset? */ @@ -248,7 +250,7 @@ Index: git/bfd/elf32-microblaze.c /* A 64 bit relocation. Table entry not really used. */ HOWTO (R_MICROBLAZE_64, /* Type. */ 0, /* Rightshift. */ -@@ -179,15 +193,15 @@ static reloc_howto_type microblaze_elf_h +@@ -179,15 +193,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 0, /* Rightshift. */ 2, /* Size (0 = byte, 1 = short, 2 = long). */ 32, /* Bitsize. */ @@ -267,7 +269,7 @@ Index: git/bfd/elf32-microblaze.c HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ 0, /* Rightshift. */ -@@ -278,6 +292,21 @@ static reloc_howto_type microblaze_elf_h +@@ -278,6 +292,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 0x0000ffff, /* Dest Mask. */ true), /* PC relative offset? */ @@ -289,7 +291,7 @@ Index: git/bfd/elf32-microblaze.c /* A 64 bit GOT relocation. Table-entry not really used. */ HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ 0, /* Rightshift. */ -@@ -617,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * +@@ -617,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, case BFD_RELOC_VTABLE_ENTRY: microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; break; @@ -305,7 +307,7 @@ Index: git/bfd/elf32-microblaze.c case BFD_RELOC_MICROBLAZE_64_GOT: microblaze_reloc = R_MICROBLAZE_GOT_64; break; -@@ -1459,7 +1494,7 @@ microblaze_elf_relocate_section (bfd *ou +@@ -1500,7 +1535,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) { relocation += addend; @@ -314,7 +316,7 @@ Index: git/bfd/elf32-microblaze.c bfd_put_32 (input_bfd, relocation, contents + offset); else { -@@ -1925,6 +1960,28 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -1969,6 +2004,28 @@ microblaze_elf_relax_section (bfd *abfd, irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); } break; @@ -343,11 +345,12 @@ Index: git/bfd/elf32-microblaze.c case R_MICROBLAZE_NONE: case R_MICROBLAZE_32_NONE: { -Index: git/bfd/elf64-microblaze.c -=================================================================== +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +new file mode 100644 +index 00000000000..7434bef393b --- /dev/null -+++ git/bfd/elf64-microblaze.c -@@ -0,0 +1,3577 @@ ++++ b/bfd/elf64-microblaze.c +@@ -0,0 +1,3622 @@ +/* Xilinx MicroBlaze-specific support for 32-bit ELF + + Copyright (C) 2009-2021 Free Software Foundation, Inc. @@ -1101,6 +1104,47 @@ Index: git/bfd/elf64-microblaze.c + return true; +} + ++/* Relax table contains information about instructions which can ++ be removed by relaxation -- replacing a long address with a ++ short address. */ ++struct relax_table ++{ ++ /* Address where bytes may be deleted. */ ++ bfd_vma addr; ++ ++ /* Number of bytes to be deleted. */ ++ size_t size; ++}; ++ ++struct _microblaze_elf_section_data ++{ ++ struct bfd_elf_section_data elf; ++ /* Count of used relaxation table entries. */ ++ size_t relax_count; ++ /* Relaxation table. */ ++ struct relax_table *relax; ++}; ++ ++#define microblaze_elf_section_data(sec) \ ++ ((struct _microblaze_elf_section_data *) elf_section_data (sec)) ++ ++static bool ++microblaze_elf_new_section_hook (bfd *abfd, asection *sec) ++{ ++ if (!sec->used_by_bfd) ++ { ++ struct _microblaze_elf_section_data *sdata; ++ size_t amt = sizeof (*sdata); ++ ++ sdata = bfd_zalloc (abfd, amt); ++ if (sdata == NULL) ++ return false; ++ sec->used_by_bfd = sdata; ++ } ++ ++ return _bfd_elf_new_section_hook (abfd, sec); ++} ++ +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ + +static bool @@ -2054,19 +2098,20 @@ Index: git/bfd/elf64-microblaze.c +calc_fixup (bfd_vma start, bfd_vma size, asection *sec) +{ + bfd_vma end = start + size; -+ int i, fixup = 0; ++ size_t i, fixup = 0; ++ struct _microblaze_elf_section_data *sdata; + -+ if (sec == NULL || sec->relax == NULL) ++ if (sec == NULL || (sdata = microblaze_elf_section_data (sec)) == NULL) + return 0; + + /* Look for addr in relax table, total fixup value. */ -+ for (i = 0; i < sec->relax_count; i++) ++ for (i = 0; i < sdata->relax_count; i++) + { -+ if (end <= sec->relax[i].addr) ++ if (end <= sdata->relax[i].addr) + break; -+ if ((end != start) && (start > sec->relax[i].addr)) ++ if (end != start && start > sdata->relax[i].addr) + continue; -+ fixup += sec->relax[i].size; ++ fixup += sdata->relax[i].size; + } + return fixup; +} @@ -2123,6 +2168,7 @@ Index: git/bfd/elf64-microblaze.c + int symcount; + int offset; + bfd_vma src, dest; ++ struct _microblaze_elf_section_data *sdata; + + /* We only do this once per section. We may be able to delete some code + by running multiple passes, but it is not worth it. */ @@ -2131,8 +2177,9 @@ Index: git/bfd/elf64-microblaze.c + /* Only do this for a text section. */ + if (bfd_link_relocatable (link_info) + || (sec->flags & SEC_RELOC) == 0 -+ || (sec->reloc_count == 0) -+ || (sec->flags & SEC_CODE) == 0) ++ || (sec->flags & SEC_CODE) == 0 ++ || sec->reloc_count == 0 ++ || (sdata = microblaze_elf_section_data (sec)) == NULL) + return true; + + BFD_ASSERT ((sec->size > 0) || (sec->rawsize > 0)); @@ -2157,11 +2204,11 @@ Index: git/bfd/elf64-microblaze.c + if (! link_info->keep_memory) + free_relocs = internal_relocs; + -+ sec->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) -+ * sizeof (struct relax_table)); -+ if (sec->relax == NULL) ++ sdata->relax_count = 0; ++ sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) ++ * sizeof (*sdata->relax)); ++ if (sdata->relax == NULL) + goto error_return; -+ sec->relax_count = 0; + + irelend = internal_relocs + sec->reloc_count; + rel_count = 0; @@ -2250,9 +2297,9 @@ Index: git/bfd/elf64-microblaze.c + if ((symval & 0xffff8000) == 0) + { + /* We can delete this instruction. */ -+ sec->relax[sec->relax_count].addr = irel->r_offset; -+ sec->relax[sec->relax_count].size = INST_WORD_SIZE; -+ sec->relax_count++; ++ sdata->relax[sdata->relax_count].addr = irel->r_offset; ++ sdata->relax[sdata->relax_count].size = INST_WORD_SIZE; ++ sdata->relax_count++; + + /* Rewrite relocation type. */ + switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info)) @@ -2277,11 +2324,11 @@ Index: git/bfd/elf64-microblaze.c + } /* Loop through all relocations. */ + + /* Loop through the relocs again, and see if anything needs to change. */ -+ if (sec->relax_count > 0) ++ if (sdata->relax_count > 0) + { + shndx = _bfd_elf_section_from_bfd_section (abfd, sec); + rel_count = 0; -+ sec->relax[sec->relax_count].addr = sec->size; ++ sdata->relax[sdata->relax_count].addr = sec->size; + + for (irel = internal_relocs; irel < irelend; irel++, rel_count++) + { @@ -2674,15 +2721,16 @@ Index: git/bfd/elf64-microblaze.c + } + + /* Physically move the code and change the cooked size. */ -+ dest = sec->relax[0].addr; -+ for (i = 0; i < sec->relax_count; i++) ++ dest = sdata->relax[0].addr; ++ for (i = 0; i < sdata->relax_count; i++) + { -+ int len; -+ src = sec->relax[i].addr + sec->relax[i].size; -+ len = sec->relax[i+1].addr - sec->relax[i].addr - sec->relax[i].size; ++ size_t len; ++ src = sdata->relax[i].addr + sdata->relax[i].size; ++ len = (sdata->relax[i+1].addr - sdata->relax[i].addr ++ - sdata->relax[i].size); + + memmove (contents + dest, contents + src, len); -+ sec->size -= sec->relax[i].size; ++ sec->size -= sdata->relax[i].size; + dest += len; + } + @@ -2708,11 +2756,11 @@ Index: git/bfd/elf64-microblaze.c + free_contents = NULL; + } + -+ if (sec->relax_count == 0) ++ if (sdata->relax_count == 0) + { + *again = false; -+ free (sec->relax); -+ sec->relax = NULL; ++ free (sdata->relax); ++ sdata->relax = NULL; + } + else + *again = true; @@ -2721,9 +2769,9 @@ Index: git/bfd/elf64-microblaze.c + error_return: + free (free_relocs); + free (free_contents); -+ free (sec->relax); -+ sec->relax = NULL; -+ sec->relax_count = 0; ++ free (sdata->relax); ++ sdata->relax = NULL; ++ sdata->relax_count = 0; + return false; +} + @@ -3925,11 +3973,11 @@ Index: git/bfd/elf64-microblaze.c +#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + +#include "elf64-target.h" -Index: git/bfd/libbfd.h -=================================================================== ---- git.orig/bfd/libbfd.h -+++ git/bfd/libbfd.h -@@ -2994,7 +2994,9 @@ static const char *const bfd_reloc_code_ +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index ea2507d1879..e74c051e781 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -2991,7 +2991,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", "BFD_RELOC_MICROBLAZE_32_NONE", "BFD_RELOC_MICROBLAZE_64_NONE", @@ -3939,41 +3987,40 @@ Index: git/bfd/libbfd.h "BFD_RELOC_MICROBLAZE_64_GOT", "BFD_RELOC_MICROBLAZE_64_PLT", "BFD_RELOC_MICROBLAZE_64_GOTOFF", -Index: git/bfd/reloc.c -=================================================================== ---- git.orig/bfd/reloc.c -+++ git/bfd/reloc.c -@@ -6907,6 +6907,12 @@ ENUMDOC +diff --git a/bfd/reloc.c b/bfd/reloc.c +index 5ac8a8536a7..0f99df91299 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6875,12 +6875,24 @@ ENUMDOC + done here - only used for relaxing ENUM BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC ++ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing +ENUM + BFD_RELOC_MICROBLAZE_64 -+ENUMDOC + ENUMDOC This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). No relocation is done here - only used for relaxing -@@ -6914,6 +6920,12 @@ ENUM + ENUM BFD_RELOC_MICROBLAZE_64_GOTPC - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing +ENUM + BFD_RELOC_MICROBLAZE_64_GPC -+ENUMDOC -+ This is a 64 bit reloc that stores the 32 bit pc relative + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is - PC-relative GOT offset - ENUM -Index: git/bfd/targets.c -=================================================================== ---- git.orig/bfd/targets.c -+++ git/bfd/targets.c -@@ -794,6 +794,8 @@ extern const bfd_target mep_elf32_le_vec +diff --git a/bfd/targets.c b/bfd/targets.c +index 3284bb88aa8..6e93cb2f995 100644 +--- a/bfd/targets.c ++++ b/bfd/targets.c +@@ -791,6 +791,8 @@ extern const bfd_target mep_elf32_le_vec; extern const bfd_target metag_elf32_vec; extern const bfd_target microblaze_elf32_vec; extern const bfd_target microblaze_elf32_le_vec; @@ -3982,7 +4029,7 @@ Index: git/bfd/targets.c extern const bfd_target mips_ecoff_be_vec; extern const bfd_target mips_ecoff_le_vec; extern const bfd_target mips_ecoff_bele_vec; -@@ -1160,6 +1162,10 @@ static const bfd_target * const _bfd_tar +@@ -1153,6 +1155,10 @@ static const bfd_target * const _bfd_target_vector[] = &metag_elf32_vec, @@ -3993,10 +4040,10 @@ Index: git/bfd/targets.c µblaze_elf32_vec, &mips_ecoff_be_vec, -Index: git/gas/config/tc-microblaze.c -=================================================================== ---- git.orig/gas/config/tc-microblaze.c -+++ git/gas/config/tc-microblaze.c +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 086f8704156..a6f12dda54a 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c @@ -35,10 +35,13 @@ #define streq(a,b) (strcmp (a, b) == 0) #endif @@ -4048,7 +4095,7 @@ Index: git/gas/config/tc-microblaze.c {"frame", s_ignore, 0}, {"mask", s_ignore, 0}, /* Emitted by gcc. */ {NULL, NULL, 0} -@@ -773,6 +781,74 @@ parse_imm (char * s, expressionS * e, of +@@ -773,6 +781,74 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) return new_pointer; } @@ -4123,7 +4170,7 @@ Index: git/gas/config/tc-microblaze.c static char * check_got (int * got_type, int * got_len) { -@@ -827,7 +903,7 @@ check_got (int * got_type, int * got_len +@@ -827,7 +903,7 @@ check_got (int * got_type, int * got_len) extern bfd_reloc_code_real_type parse_cons_expression_microblaze (expressionS *exp, int size) { @@ -4132,7 +4179,7 @@ Index: git/gas/config/tc-microblaze.c { /* Handle @GOTOFF et.al. */ char *save, *gotfree_copy; -@@ -859,6 +935,7 @@ parse_cons_expression_microblaze (expres +@@ -859,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) static const char * str_microblaze_ro_anchor = "RO"; static const char * str_microblaze_rw_anchor = "RW"; @@ -4439,7 +4486,7 @@ Index: git/gas/config/tc-microblaze.c { NULL, no_argument, NULL, 0} }; -@@ -1971,13 +2230,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UN +@@ -1971,13 +2230,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, fragP->fr_fix += INST_WORD_SIZE * 2; fragP->fr_var = 0; break; @@ -4555,7 +4602,7 @@ Index: git/gas/config/tc-microblaze.c else if (fixP->fx_r_type == BFD_RELOC_32) fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; else -@@ -2323,6 +2614,32 @@ md_estimate_size_before_relax (fragS * f +@@ -2323,6 +2614,32 @@ md_estimate_size_before_relax (fragS * fragP, as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); abort (); } @@ -4588,7 +4635,7 @@ Index: git/gas/config/tc-microblaze.c else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && !S_IS_WEAK (fragP->fr_symbol)) { -@@ -2330,6 +2647,7 @@ md_estimate_size_before_relax (fragS * f +@@ -2330,6 +2647,7 @@ md_estimate_size_before_relax (fragS * fragP, /* Don't know now whether we need an imm instruction. */ fragP->fr_var = INST_WORD_SIZE; } @@ -4596,7 +4643,7 @@ Index: git/gas/config/tc-microblaze.c else if (S_IS_DEFINED (fragP->fr_symbol) && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) { -@@ -2432,6 +2750,7 @@ md_estimate_size_before_relax (fragS * f +@@ -2432,6 +2750,7 @@ md_estimate_size_before_relax (fragS * fragP, case TLSLD_OFFSET: case TLSTPREL_OFFSET: case TLSDTPREL_OFFSET: @@ -4604,7 +4651,7 @@ Index: git/gas/config/tc-microblaze.c fragP->fr_var = INST_WORD_SIZE*2; break; case DEFINED_RO_SEGMENT: -@@ -2485,7 +2804,7 @@ md_pcrel_from_section (fixS * fixp, segT +@@ -2485,7 +2804,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) else { /* The case where we are going to resolve things... */ @@ -4613,7 +4660,7 @@ Index: git/gas/config/tc-microblaze.c return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; else return fixp->fx_where + fixp->fx_frag->fr_address; -@@ -2518,6 +2837,8 @@ tc_gen_reloc (asection * section ATTRIBU +@@ -2518,6 +2837,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) case BFD_RELOC_MICROBLAZE_32_RWSDA: case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: case BFD_RELOC_MICROBLAZE_64_GOTPC: @@ -4622,7 +4669,7 @@ Index: git/gas/config/tc-microblaze.c case BFD_RELOC_MICROBLAZE_64_GOT: case BFD_RELOC_MICROBLAZE_64_PLT: case BFD_RELOC_MICROBLAZE_64_GOTOFF: -@@ -2578,6 +2899,18 @@ tc_gen_reloc (asection * section ATTRIBU +@@ -2578,6 +2899,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) return rel; } @@ -4641,7 +4688,7 @@ Index: git/gas/config/tc-microblaze.c int md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) { -@@ -2591,6 +2924,10 @@ md_parse_option (int c, const char * arg +@@ -2591,6 +2924,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) case OPTION_LITTLE: target_big_endian = 0; break; @@ -4652,7 +4699,7 @@ Index: git/gas/config/tc-microblaze.c default: return 0; } -@@ -2606,6 +2943,7 @@ md_show_usage (FILE * stream ATTRIBUTE_U +@@ -2606,6 +2943,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) fprintf (stream, _(" MicroBlaze specific assembler options:\n")); fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); @@ -4672,11 +4719,11 @@ Index: git/gas/config/tc-microblaze.c break; default: as_bad (_("unsupported BFD relocation size %u"), size); -Index: git/gas/config/tc-microblaze.h -=================================================================== ---- git.orig/gas/config/tc-microblaze.h -+++ git/gas/config/tc-microblaze.h -@@ -81,7 +81,9 @@ extern const struct relax_type md_relax_ +diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h +index 36f56725c46..5a97b460212 100644 +--- a/gas/config/tc-microblaze.h ++++ b/gas/config/tc-microblaze.h +@@ -81,7 +81,9 @@ extern const struct relax_type md_relax_table[]; #ifdef OBJ_ELF @@ -4687,23 +4734,23 @@ Index: git/gas/config/tc-microblaze.h #define ELF_TC_SPECIAL_SECTIONS \ { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ -Index: git/include/elf/common.h -=================================================================== ---- git.orig/include/elf/common.h -+++ git/include/elf/common.h -@@ -354,6 +354,7 @@ - #define EM_65816 257 /* WDC 65816/65C816 */ - #define EM_LOONGARCH 258 /* LoongArch */ - #define EM_KF32 259 /* ChipON KungFu32 */ -+#define EM_MB_64 260 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ +diff --git a/include/elf/common.h b/include/elf/common.h +index e4bc53e35b4..1ad565adf7a 100644 +--- a/include/elf/common.h ++++ b/include/elf/common.h +@@ -360,6 +360,7 @@ + #define EM_U16_U8CORE 260 /* LAPIS nX-U16/U8 */ + #define EM_TACHYUM 261 /* Tachyum */ + #define EM_56800EF 262 /* NXP 56800EF Digital Signal Controller (DSC) */ ++#define EM_MB_64 263 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision -Index: git/include/elf/microblaze.h -=================================================================== ---- git.orig/include/elf/microblaze.h -+++ git/include/elf/microblaze.h -@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_relo +diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h +index a2e1ce4580f..79799b86a49 100644 +--- a/include/elf/microblaze.h ++++ b/include/elf/microblaze.h +@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) @@ -4712,11 +4759,11 @@ Index: git/include/elf/microblaze.h END_RELOC_NUMBERS (R_MICROBLAZE_max) -Index: git/ld/Makefile.am -=================================================================== ---- git.orig/ld/Makefile.am -+++ git/ld/Makefile.am -@@ -448,6 +448,8 @@ ALL_64_EMULATION_SOURCES = \ +diff --git a/ld/Makefile.am b/ld/Makefile.am +index 05c7630073d..256a95a2219 100644 +--- a/ld/Makefile.am ++++ b/ld/Makefile.am +@@ -445,6 +445,8 @@ ALL_64_EMULATION_SOURCES = \ eelf64lriscv_lp64f.c \ eelf64ltsmip.c \ eelf64ltsmip_fbsd.c \ @@ -4725,7 +4772,7 @@ Index: git/ld/Makefile.am eelf64mmix.c \ eelf64ppc.c \ eelf64ppc_fbsd.c \ -@@ -916,6 +918,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULAT +@@ -906,6 +908,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ @@ -4734,11 +4781,11 @@ Index: git/ld/Makefile.am @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@ -Index: git/ld/Makefile.in -=================================================================== ---- git.orig/ld/Makefile.in -+++ git/ld/Makefile.in -@@ -938,6 +938,8 @@ ALL_64_EMULATION_SOURCES = \ +diff --git a/ld/Makefile.in b/ld/Makefile.in +index 05d0ff5e122..a7f7e841acb 100644 +--- a/ld/Makefile.in ++++ b/ld/Makefile.in +@@ -944,6 +944,8 @@ ALL_64_EMULATION_SOURCES = \ eelf64lriscv_lp64f.c \ eelf64ltsmip.c \ eelf64ltsmip_fbsd.c \ @@ -4747,7 +4794,7 @@ Index: git/ld/Makefile.in eelf64mmix.c \ eelf64ppc.c \ eelf64ppc_fbsd.c \ -@@ -1411,6 +1413,8 @@ distclean-compile: +@@ -1410,6 +1412,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32z80.Po@am__quote@ @@ -4756,7 +4803,7 @@ Index: git/ld/Makefile.in @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@ -@@ -2583,6 +2587,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULAT +@@ -2575,6 +2579,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ @@ -4765,11 +4812,11 @@ Index: git/ld/Makefile.in @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@ -Index: git/ld/configure.tgt -=================================================================== ---- git.orig/ld/configure.tgt -+++ git/ld/configure.tgt -@@ -478,6 +478,9 @@ microblaze*-linux*) targ_emul="elf32mb_l +diff --git a/ld/configure.tgt b/ld/configure.tgt +index 2bae9099b6a..80ffbcf23b3 100644 +--- a/ld/configure.tgt ++++ b/ld/configure.tgt +@@ -515,6 +515,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" microblazeel*) targ_emul=elf32microblazeel targ_extra_emuls=elf32microblaze ;; @@ -4779,10 +4826,11 @@ Index: git/ld/configure.tgt microblaze*) targ_emul=elf32microblaze targ_extra_emuls=elf32microblazeel ;; -Index: git/ld/emulparams/elf64microblaze.sh -=================================================================== +diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 --- /dev/null -+++ git/ld/emulparams/elf64microblaze.sh ++++ b/ld/emulparams/elf64microblaze.sh @@ -0,0 +1,23 @@ +SCRIPT_NAME=elfmicroblaze +OUTPUT_FORMAT="elf64-microblazeel" @@ -4807,10 +4855,11 @@ Index: git/ld/emulparams/elf64microblaze.sh + +TEMPLATE_NAME=elf32 +#GENERATE_SHLIB_SCRIPT=yes -Index: git/ld/emulparams/elf64microblazeel.sh -=================================================================== +diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 --- /dev/null -+++ git/ld/emulparams/elf64microblazeel.sh ++++ b/ld/emulparams/elf64microblazeel.sh @@ -0,0 +1,23 @@ +SCRIPT_NAME=elfmicroblaze +OUTPUT_FORMAT="elf64-microblazeel" @@ -4835,10 +4884,10 @@ Index: git/ld/emulparams/elf64microblazeel.sh + +TEMPLATE_NAME=elf32 +#GENERATE_SHLIB_SCRIPT=yes -Index: git/opcodes/microblaze-dis.c -=================================================================== ---- git.orig/opcodes/microblaze-dis.c -+++ git/opcodes/microblaze-dis.c +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index f57b98fc9f7..f71589d714d 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c @@ -33,6 +33,7 @@ #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) @@ -4847,29 +4896,29 @@ Index: git/opcodes/microblaze-dis.c #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) #define NUM_STRBUFS 3 -@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, l +@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, long instr) } static char * -get_field_imm5 (struct string_buf *buf, long instr) +get_field_imml (struct string_buf *buf, long instr) -+{ -+ char *p = strbuf (buf); + { + char *p = strbuf (buf); + sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); + return p; +} -+ -+static char * -+get_field_imms (struct string_buf *buf, long instr) - { - char *p = strbuf (buf); - sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); ++static char * ++get_field_imms (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ + sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); return p; } -@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf * +@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) } static char * @@ -4887,7 +4936,7 @@ Index: git/opcodes/microblaze-dis.c return p; } -@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, +@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) } } break; @@ -4903,7 +4952,7 @@ Index: git/opcodes/microblaze-dis.c break; case INST_TYPE_RD_RFSL: print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), -@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, +@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) case INST_TYPE_RD_R2: print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); @@ -4914,7 +4963,7 @@ Index: git/opcodes/microblaze-dis.c break; case INST_TYPE_R2: print_func (stream, "\t%s", get_field_r2 (&buf, inst)); -@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, +@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) case INST_TYPE_NONE: break; /* For bit field insns. */ @@ -4925,10 +4974,10 @@ Index: git/opcodes/microblaze-dis.c break; /* For tuqula instruction */ case INST_TYPE_RD: -Index: git/opcodes/microblaze-opc.h -=================================================================== ---- git.orig/opcodes/microblaze-opc.h -+++ git/opcodes/microblaze-opc.h +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index 825c639a41e..ab90240d88a 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h @@ -40,7 +40,7 @@ #define INST_TYPE_RD_SPECIAL 11 #define INST_TYPE_R1 12 @@ -5153,10 +5202,10 @@ Index: git/opcodes/microblaze-opc.h + #endif /* MICROBLAZE_OPC */ -Index: git/opcodes/microblaze-opcm.h -=================================================================== ---- git.orig/opcodes/microblaze-opcm.h -+++ git/opcodes/microblaze-opcm.h +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index aa3401610d9..b242ea73c7b 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h @@ -25,6 +25,7 @@ enum microblaze_instr @@ -5174,9 +5223,9 @@ Index: git/opcodes/microblaze-opcm.h + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, + sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, - tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, -@@ -58,6 +59,18 @@ enum microblaze_instr + /* 'fsqrt' is a glibc:math.h symbol. */ + fint, microblaze_fsqrt, +@@ -59,6 +60,18 @@ enum microblaze_instr aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd, eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd, eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, @@ -5195,7 +5244,7 @@ Index: git/opcodes/microblaze-opcm.h invalid_inst }; -@@ -135,15 +148,18 @@ enum microblaze_instr_type +@@ -136,15 +149,18 @@ enum microblaze_instr_type #define RA_MASK 0x001F0000 #define RB_MASK 0x0000F800 #define IMM_MASK 0x0000FFFF @@ -5216,3 +5265,6 @@ Index: git/opcodes/microblaze-opcm.h /* FSL imm mask for get, put instructions. */ #define RFSL_MASK 0x000000F +-- +2.25.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-negl-instruction-is-overriding-rsubl-fixed-it-by-cha.patch similarity index 91% rename from meta-microblaze/recipes-devtools/binutils/binutils/0015-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0015-negl-instruction-is-overriding-rsubl-fixed-it-by-cha.patch index 0d4723312..5b3e3fc6c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-negl-instruction-is-overriding-rsubl-fixed-it-by-cha.patch @@ -1,15 +1,16 @@ -From e3d5306efa998ff6e72a6b0ca92d1b9bfadf8156 Mon Sep 17 00:00:00 2001 +From a41a5a63d4d52887f1ce5a5cab161670d033c1ce Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 11 Sep 2018 13:48:33 +0530 -Subject: [PATCH 15/38] [Patch,Microblaze] : negl instruction is overriding - rsubl,fixed it by changing the instruction order... +Subject: [PATCH 15/38] negl instruction is overriding rsubl,fixed it by + changing the instruction order... +Signed-off-by: Mark Hatle --- opcodes/microblaze-opc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 4a1545d8920..b1635f41529 100644 +index ab90240d88a..5e45df995de 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -275,9 +275,7 @@ const struct op_code_struct @@ -32,5 +33,5 @@ index 4a1545d8920..b1635f41529 100644 {"", 0, 0, 0, 0, 0, 0, 0, 0}, }; -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Added-relocations-for-MB-X.patch index c42ad41ff..6761f01e7 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-Added-relocations-for-MB-X.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Added-relocations-for-MB-X.patch @@ -1,4 +1,4 @@ -From f3d027568966b3c5ff8404656e6aa875c71926a1 Mon Sep 17 00:00:00 2001 +From 3deb533f60bb078f8a7b3f2dde5dc2125552d310 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Tue, 11 Sep 2018 17:30:17 +0530 Subject: [PATCH 16/38] Added relocations for MB-X @@ -9,6 +9,8 @@ Conflicts: Conflicts: gas/config/tc-microblaze.c + +Signed-off-by: Mark Hatle --- bfd/bfd-in2.h | 9 +++- bfd/libbfd.h | 4 +- @@ -17,10 +19,10 @@ Conflicts: 4 files changed, 61 insertions(+), 68 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 2a1d7563643..568bfafee7c 100644 +index 6cf701abf10..14e228c9c0e 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h -@@ -5431,13 +5431,18 @@ done here - only used for relaxing */ +@@ -5387,13 +5387,18 @@ done here - only used for relaxing */ /* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). No relocation is done here - only used for relaxing */ @@ -42,10 +44,10 @@ index 2a1d7563643..568bfafee7c 100644 value in two words (with an imm instruction). The relocation is PC-relative GOT offset */ diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 2caaf27bcd7..4a21358f5e0 100644 +index e74c051e781..20086ba608b 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h -@@ -2990,14 +2990,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", +@@ -2991,14 +2991,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", "BFD_RELOC_MICROBLAZE_32_NONE", "BFD_RELOC_MICROBLAZE_64_NONE", @@ -63,10 +65,10 @@ index 2caaf27bcd7..4a21358f5e0 100644 "BFD_RELOC_MICROBLAZE_64_TLSGD", "BFD_RELOC_MICROBLAZE_64_TLSLD", diff --git a/bfd/reloc.c b/bfd/reloc.c -index 288a5026d27..472a06a188d 100644 +index 0f99df91299..6165ff3adf1 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c -@@ -6904,24 +6904,12 @@ ENUMDOC +@@ -6875,24 +6875,12 @@ ENUMDOC done here - only used for relaxing ENUM BFD_RELOC_MICROBLAZE_64_NONE @@ -91,7 +93,7 @@ index 288a5026d27..472a06a188d 100644 ENUMDOC This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is -@@ -7007,6 +6995,20 @@ ENUMDOC +@@ -6978,6 +6966,20 @@ ENUMDOC value in two words (with an imm instruction). The relocation is relative offset from start of TEXT. @@ -113,7 +115,7 @@ index 288a5026d27..472a06a188d 100644 BFD_RELOC_AARCH64_RELOC_START ENUMDOC diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 378fb882f13..685a6e93f2b 100644 +index a6f12dda54a..9d4dbc12ab3 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; @@ -345,5 +347,5 @@ index 378fb882f13..685a6e93f2b 100644 case BFD_RELOC_MICROBLAZE_64_PLT: case BFD_RELOC_MICROBLAZE_64_GOTOFF: -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch similarity index 91% rename from meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch index 7b05d13cd..c4ccc0570 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch @@ -1,4 +1,4 @@ -From 835389f0f82b69f923aad7148717c48372a28828 Mon Sep 17 00:00:00 2001 +From 40702a32c685ad81803a666858b1b4133b0a9857 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 28 Sep 2018 12:04:55 +0530 Subject: [PATCH 17/38] -Fixed MB-x relocation issues -Added imml for required @@ -7,17 +7,19 @@ Subject: [PATCH 17/38] -Fixed MB-x relocation issues -Added imml for required Conflicts: bfd/elf64-microblaze.c gas/config/tc-microblaze.c + +Signed-off-by: Mark Hatle --- bfd/elf64-microblaze.c | 48 ++++++++++-- gas/config/tc-microblaze.c | 155 ++++++++++++++++++++++++++----------- gas/tc.h | 2 +- 3 files changed, 152 insertions(+), 53 deletions(-) -Index: git/bfd/elf64-microblaze.c -=================================================================== ---- git.orig/bfd/elf64-microblaze.c -+++ git/bfd/elf64-microblaze.c -@@ -1511,6 +1511,14 @@ microblaze_elf_relocate_section (bfd *ou +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +index 7434bef393b..104d7a1334f 100644 +--- a/bfd/elf64-microblaze.c ++++ b/bfd/elf64-microblaze.c +@@ -1552,6 +1552,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, bfd_put_16 (input_bfd, relocation & 0xffff, contents + offset + endian); @@ -32,7 +34,7 @@ Index: git/bfd/elf64-microblaze.c else { bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -@@ -1618,6 +1626,14 @@ microblaze_elf_relocate_section (bfd *ou +@@ -1659,6 +1667,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, bfd_put_16 (input_bfd, relocation & 0xffff, contents + offset + endian); } @@ -47,7 +49,7 @@ Index: git/bfd/elf64-microblaze.c else { bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -@@ -1727,9 +1743,19 @@ static void +@@ -1769,9 +1785,19 @@ static void microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) { unsigned long instr = bfd_get_32 (abfd, bfd_addr); @@ -70,7 +72,7 @@ Index: git/bfd/elf64-microblaze.c } /* Read-modify-write into the bfd, an immediate value into appropriate fields of -@@ -1741,10 +1767,18 @@ microblaze_bfd_write_imm_value_64 (bfd * +@@ -1783,10 +1809,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) unsigned long instr_lo; instr_hi = bfd_get_32 (abfd, bfd_addr); @@ -93,11 +95,11 @@ Index: git/bfd/elf64-microblaze.c instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); instr_lo &= ~0x0000ffff; instr_lo |= (val & 0x0000ffff); -Index: git/gas/config/tc-microblaze.c -=================================================================== ---- git.orig/gas/config/tc-microblaze.c -+++ git/gas/config/tc-microblaze.c -@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBU +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 9d4dbc12ab3..a0e97231a41 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) Integer arg to pass to the function. */ /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, and then in the read.c table. */ @@ -316,7 +318,7 @@ Index: git/gas/config/tc-microblaze.c if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) fixP->fx_r_type = BFD_RELOC_64; if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) -@@ -2636,7 +2693,14 @@ md_estimate_size_before_relax (fragS * f +@@ -2636,7 +2693,14 @@ md_estimate_size_before_relax (fragS * fragP, } else { @@ -332,7 +334,7 @@ Index: git/gas/config/tc-microblaze.c fragP->fr_var = INST_WORD_SIZE*2; } break; -@@ -2913,6 +2977,7 @@ md_parse_option (int c, const char * arg +@@ -2913,6 +2977,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) case OPTION_M64: //if (arg != NULL && strcmp (arg, "64") == 0) microblaze_arch_size = 64; @@ -340,10 +342,10 @@ Index: git/gas/config/tc-microblaze.c break; default: return 0; -Index: git/gas/tc.h -=================================================================== ---- git.orig/gas/tc.h -+++ git/gas/tc.h +diff --git a/gas/tc.h b/gas/tc.h +index 4a740f9bdd9..bb9a935a353 100644 +--- a/gas/tc.h ++++ b/gas/tc.h @@ -22,7 +22,7 @@ /* In theory (mine, at least!) the machine dependent part of the assembler should only have to include one file. This one. -- JF */ @@ -353,3 +355,6 @@ Index: git/gas/tc.h const char * md_atof (int, char *, int *); int md_parse_option (int, const char *); +-- +2.25.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixing-the-branch-related-issues.patch index 5b76c492f..62a8e7de6 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixing-the-branch-related-issues.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixing-the-branch-related-issues.patch @@ -1,19 +1,21 @@ -From 2ebffe31b57e7fe73ea8dbd60f3330da1f780243 Mon Sep 17 00:00:00 2001 +From 507032ec3840b48dfd709ef7c8f277eb0fabf5bb Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Sun, 30 Sep 2018 17:06:58 +0530 Subject: [PATCH 18/38] Fixing the branch related issues Conflicts: bfd/elf64-microblaze.c + +Signed-off-by: Mark Hatle --- bfd/elf64-microblaze.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 010ee1d15b4..f68fc344c1a 100644 +index 104d7a1334f..4c79bbe96c6 100644 --- a/bfd/elf64-microblaze.c +++ b/bfd/elf64-microblaze.c -@@ -2521,6 +2521,9 @@ microblaze_elf_check_relocs (bfd * abfd, +@@ -2566,6 +2566,9 @@ microblaze_elf_check_relocs (bfd * abfd, while (h->root.type == bfd_link_hash_indirect || h->root.type == bfd_link_hash_warning) h = (struct elf_link_hash_entry *) h->root.u.i.link; @@ -24,5 +26,5 @@ index 010ee1d15b4..f68fc344c1a 100644 switch (r_type) -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address-.patch similarity index 95% rename from meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address-.patch index 0a5ff4102..932ecb01f 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-address-computation-issues-with-64bit-address-.patch @@ -1,4 +1,4 @@ -From 46c4a8876203a8799dd4c7fb8b8ae1501e17b672 Mon Sep 17 00:00:00 2001 +From 31e2555754e9830192a56f1b4bc725a10fe7c300 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Tue, 9 Oct 2018 10:14:22 +0530 Subject: [PATCH 19/38] - Fixed address computation issues with 64bit address - @@ -10,6 +10,8 @@ Conflicts: Conflicts: bfd/elf64-microblaze.c + +Signed-off-by: Mark Hatle --- bfd/bfd-in2.h | 5 +++ bfd/elf64-microblaze.c | 14 ++++---- @@ -18,10 +20,10 @@ Conflicts: 4 files changed, 79 insertions(+), 16 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 568bfafee7c..03794ea1ecf 100644 +index 14e228c9c0e..d4b5006902c 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h -@@ -5438,6 +5438,11 @@ done here - only used for relaxing */ +@@ -5394,6 +5394,11 @@ done here - only used for relaxing */ * +done here - only used for relaxing */ BFD_RELOC_MICROBLAZE_64, @@ -34,7 +36,7 @@ index 568bfafee7c..03794ea1ecf 100644 * +value in two words (with an imm instruction). No relocation is * +done here - only used for relaxing */ diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index f68fc344c1a..2ae1f2b118a 100644 +index 4c79bbe96c6..2d4820c50fe 100644 --- a/bfd/elf64-microblaze.c +++ b/bfd/elf64-microblaze.c @@ -119,15 +119,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = @@ -77,7 +79,7 @@ index f68fc344c1a..2ae1f2b118a 100644 microblaze_reloc = R_MICROBLAZE_IMML_64; break; case BFD_RELOC_MICROBLAZE_64_GOTPC: -@@ -2005,7 +2005,7 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2049,7 +2049,7 @@ microblaze_elf_relax_section (bfd *abfd, efix = calc_fixup (target_address, 0, sec); /* Validate the in-band val. */ @@ -87,7 +89,7 @@ index f68fc344c1a..2ae1f2b118a 100644 fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); } diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 9b311ed1450..542c68a0857 100644 +index a0e97231a41..d3de049e9c0 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] = @@ -209,7 +211,7 @@ index 9b311ed1450..542c68a0857 100644 default: as_bad (_("unsupported BFD relocation size %u"), size); diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index fc15d210fe0..143a0a9d59e 100644 +index f71589d714d..97e21a38bd2 100644 --- a/opcodes/microblaze-dis.c +++ b/opcodes/microblaze-dis.c @@ -77,7 +77,7 @@ static char * @@ -222,5 +224,5 @@ index fc15d210fe0..143a0a9d59e 100644 } -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch index 43627c297..135af627b 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch @@ -1,19 +1,20 @@ -From e49fe1aee519af464c873425212914c56fa683bc Mon Sep 17 00:00:00 2001 +From 2034e50763e51635405988d0cf67345cad1b2101 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 2 Nov 2021 17:28:24 +0530 Subject: [PATCH 20/38] [Patch,MicroBlaze : Adding new relocation to support 64bit rodata. +Signed-off-by: Mark Hatle --- bfd/elf64-microblaze.c | 11 +++++++-- gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++---- 2 files changed, 54 insertions(+), 6 deletions(-) diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 2ae1f2b118a..55c01b44d29 100644 +index 2d4820c50fe..97131c352c7 100644 --- a/bfd/elf64-microblaze.c +++ b/bfd/elf64-microblaze.c -@@ -1488,6 +1488,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1529,6 +1529,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, case (int) R_MICROBLAZE_64_PCREL : case (int) R_MICROBLAZE_64: case (int) R_MICROBLAZE_32: @@ -21,7 +22,7 @@ index 2ae1f2b118a..55c01b44d29 100644 { /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols from removed linkonce sections, or sections discarded by -@@ -1497,6 +1498,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1538,6 +1539,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, relocation += addend; if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) bfd_put_32 (input_bfd, relocation, contents + offset); @@ -30,7 +31,7 @@ index 2ae1f2b118a..55c01b44d29 100644 else { if (r_type == R_MICROBLAZE_64_PCREL) -@@ -1585,7 +1588,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1626,7 +1629,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, } else { @@ -39,7 +40,7 @@ index 2ae1f2b118a..55c01b44d29 100644 { outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); outrel.r_addend = relocation + addend; -@@ -1611,6 +1614,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1652,6 +1655,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, relocation += addend; if (r_type == R_MICROBLAZE_32) bfd_put_32 (input_bfd, relocation, contents + offset); @@ -48,7 +49,7 @@ index 2ae1f2b118a..55c01b44d29 100644 else { if (r_type == R_MICROBLAZE_64_PCREL) -@@ -2121,7 +2126,8 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2165,7 +2170,8 @@ microblaze_elf_relax_section (bfd *abfd, microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, irelscan->r_addend); } @@ -58,7 +59,7 @@ index 2ae1f2b118a..55c01b44d29 100644 { isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -@@ -2595,6 +2601,7 @@ microblaze_elf_check_relocs (bfd * abfd, +@@ -2640,6 +2646,7 @@ microblaze_elf_check_relocs (bfd * abfd, case R_MICROBLAZE_64: case R_MICROBLAZE_64_PCREL: case R_MICROBLAZE_32: @@ -67,7 +68,7 @@ index 2ae1f2b118a..55c01b44d29 100644 if (h != NULL && !bfd_link_pic (info)) { diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 542c68a0857..6902a1518a6 100644 +index d3de049e9c0..76ce516d8aa 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -1119,6 +1119,13 @@ md_assemble (char * str) @@ -163,5 +164,5 @@ index 542c68a0857..6902a1518a6 100644 default: as_bad (_("unsupported BFD relocation size %u"), size); -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-fixing-the-.bss-relocation-issue.patch index bf2383891..848770b87 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-fixing-the-.bss-relocation-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-fixing-the-.bss-relocation-issue.patch @@ -1,19 +1,21 @@ -From 1131a31133a45553259b3fdb930daae468709bda Mon Sep 17 00:00:00 2001 +From cec495577424c4d5c4c77949a624bc33991ac673 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Wed, 24 Oct 2018 12:34:37 +0530 Subject: [PATCH 21/38] fixing the .bss relocation issue Conflicts: bfd/elf64-microblaze.c + +Signed-off-by: Mark Hatle --- bfd/elf64-microblaze.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 55c01b44d29..6fb88959357 100644 +index 97131c352c7..fe73de86659 100644 --- a/bfd/elf64-microblaze.c +++ b/bfd/elf64-microblaze.c -@@ -1514,14 +1514,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1555,14 +1555,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, bfd_put_16 (input_bfd, relocation & 0xffff, contents + offset + endian); @@ -36,7 +38,7 @@ index 55c01b44d29..6fb88959357 100644 else { bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -@@ -1632,7 +1632,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1673,7 +1673,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, contents + offset + endian); } unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); @@ -45,7 +47,7 @@ index 55c01b44d29..6fb88959357 100644 { insn &= ~0x00ffffff; insn |= (relocation >> 16) & 0xffffff; -@@ -1749,7 +1749,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) +@@ -1791,7 +1791,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) { unsigned long instr = bfd_get_32 (abfd, bfd_addr); @@ -54,7 +56,7 @@ index 55c01b44d29..6fb88959357 100644 { instr &= ~0x00ffffff; instr |= (val & 0xffffff); -@@ -1772,7 +1772,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) +@@ -1814,7 +1814,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) unsigned long instr_lo; instr_hi = bfd_get_32 (abfd, bfd_addr); @@ -63,7 +65,7 @@ index 55c01b44d29..6fb88959357 100644 { instr_hi &= ~0x00ffffff; instr_hi |= (val >> 16) & 0xffffff; -@@ -2276,7 +2276,10 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2320,7 +2320,10 @@ microblaze_elf_relax_section (bfd *abfd, unsigned long instr_lo = bfd_get_32 (abfd, ocontents + irelscan->r_offset + INST_WORD_SIZE); @@ -75,7 +77,7 @@ index 55c01b44d29..6fb88959357 100644 immediate |= (instr_lo & 0x0000ffff); offset = calc_fixup (irelscan->r_addend, 0, sec); immediate -= offset; -@@ -2320,7 +2323,10 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2364,7 +2367,10 @@ microblaze_elf_relax_section (bfd *abfd, unsigned long instr_lo = bfd_get_32 (abfd, ocontents + irelscan->r_offset + INST_WORD_SIZE); @@ -88,5 +90,5 @@ index 55c01b44d29..6fb88959357 100644 target_address = immediate; offset = calc_fixup (target_address, 0, sec); -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch index 710988008..2821a1e29 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch @@ -1,19 +1,20 @@ -From 70b208a66994ba60e36ca3eaa7c525e130b145af Mon Sep 17 00:00:00 2001 +From 622b9e85bde4a88ecfe1884179f547575224b984 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Wed, 28 Nov 2018 14:00:29 +0530 Subject: [PATCH 22/38] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. It was adjusting only lower 16bits. +Signed-off-by: Mark Hatle --- bfd/elf32-microblaze.c | 4 ++-- bfd/elf64-microblaze.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 2f2e1ef7f41..2a976ecbe1d 100644 +index 71ff973573c..f41b503cbb5 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -2015,8 +2015,8 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2059,8 +2059,8 @@ microblaze_elf_relax_section (bfd *abfd, sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); efix = calc_fixup (target_address, 0, sec); irel->r_addend -= (efix - sfix); @@ -25,10 +26,10 @@ index 2f2e1ef7f41..2a976ecbe1d 100644 break; } diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 6fb88959357..4d41ddbd953 100644 +index fe73de86659..387ee0da261 100644 --- a/bfd/elf64-microblaze.c +++ b/bfd/elf64-microblaze.c -@@ -2053,8 +2053,8 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -2097,8 +2097,8 @@ microblaze_elf_relax_section (bfd *abfd, sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); efix = calc_fixup (target_address, 0, sec); irel->r_addend -= (efix - sfix); @@ -40,5 +41,5 @@ index 6fb88959357..4d41ddbd953 100644 break; } -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state-defsym-symb.patch similarity index 79% rename from meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state-defsym-symb.patch index 945bad59a..7d23ee2ca 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Revert-ld-Remove-unused-expression-state-defsym-symb.patch @@ -1,4 +1,4 @@ -From 877ba3fffc2a542580ac95a091f3883d30b7797a Mon Sep 17 00:00:00 2001 +From 99193a486cc44f7bb56019a10bef413f7f7d9fd7 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 27 Feb 2019 15:12:32 +0530 Subject: [PATCH 23/38] Revert "ld: Remove unused expression state" --defsym @@ -13,16 +13,18 @@ Conflicts: Conflicts: ld/ldexp.c ld/ldexp.h + +Signed-off-by: Mark Hatle --- ld/ldexp.c | 8 +++++--- ld/ldexp.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/ld/ldexp.c b/ld/ldexp.c -index 02c76f8b33c..ec6450965c3 100644 +index d4d8706968d..b7f4361129f 100644 --- a/ld/ldexp.c +++ b/ld/ldexp.c -@@ -1364,6 +1364,7 @@ static etree_type * +@@ -1380,6 +1380,7 @@ static etree_type * exp_assop (const char *dst, etree_type *src, enum node_tree_enum class, @@ -30,7 +32,7 @@ index 02c76f8b33c..ec6450965c3 100644 bool hidden) { etree_type *n; -@@ -1375,6 +1376,7 @@ exp_assop (const char *dst, +@@ -1391,6 +1392,7 @@ exp_assop (const char *dst, n->assign.type.node_class = class; n->assign.src = src; n->assign.dst = dst; @@ -38,7 +40,7 @@ index 02c76f8b33c..ec6450965c3 100644 n->assign.hidden = hidden; return n; } -@@ -1384,7 +1386,7 @@ exp_assop (const char *dst, +@@ -1400,7 +1402,7 @@ exp_assop (const char *dst, etree_type * exp_assign (const char *dst, etree_type *src, bool hidden) { @@ -47,7 +49,7 @@ index 02c76f8b33c..ec6450965c3 100644 } /* Handle --defsym command-line option. */ -@@ -1392,7 +1394,7 @@ exp_assign (const char *dst, etree_type *src, bool hidden) +@@ -1408,7 +1410,7 @@ exp_assign (const char *dst, etree_type *src, bool hidden) etree_type * exp_defsym (const char *dst, etree_type *src) { @@ -56,7 +58,7 @@ index 02c76f8b33c..ec6450965c3 100644 } /* Handle PROVIDE. */ -@@ -1400,7 +1402,7 @@ exp_defsym (const char *dst, etree_type *src) +@@ -1416,7 +1418,7 @@ exp_defsym (const char *dst, etree_type *src) etree_type * exp_provide (const char *dst, etree_type *src, bool hidden) { @@ -66,7 +68,7 @@ index 02c76f8b33c..ec6450965c3 100644 /* Handle ASSERT. */ diff --git a/ld/ldexp.h b/ld/ldexp.h -index ebe82f6088f..96ac1a8e558 100644 +index ed6fb8be715..e838b736306 100644 --- a/ld/ldexp.h +++ b/ld/ldexp.h @@ -66,6 +66,7 @@ typedef union etree_union { @@ -78,5 +80,5 @@ index ebe82f6088f..96ac1a8e558 100644 } assign; struct { -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-fixing-the-long-long-long-mingw-toolchain-issue.patch index 37783b08e..548d7f61c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-fixing-the-long-long-long-mingw-toolchain-issue.patch @@ -1,15 +1,16 @@ -From b5d57f6b3d8826400a4e106e08c9387dc3defb11 Mon Sep 17 00:00:00 2001 +From f1c19a5ca7d28745cd9b28f155609eed70c1b349 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Thu, 29 Nov 2018 17:59:25 +0530 Subject: [PATCH 24/38] fixing the long & long long mingw toolchain issue +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 10 +++++----- opcodes/microblaze-opc.h | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 6902a1518a6..52058d94f98 100644 +index 76ce516d8aa..a1fb6ccbd44 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) @@ -38,7 +39,7 @@ index 6902a1518a6..52058d94f98 100644 if (atp) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index b1635f41529..fff7520ae81 100644 +index 5e45df995de..6b25d12dace 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; @@ -53,5 +54,5 @@ index b1635f41529..fff7520ae81 100644 #endif /* MICROBLAZE_OPC */ -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch index f614a2454..ca61b1a6a 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch @@ -1,4 +1,4 @@ -From e6c2ad33d4a668107e4828feb174ee08053e8c7e Mon Sep 17 00:00:00 2001 +From 16dfbc9464ebbf642cae6e45edd96f5fe14a6c0f Mon Sep 17 00:00:00 2001 From: Nagaraju Date: Fri, 23 Aug 2019 16:18:43 +0530 Subject: [PATCH 25/38] Added support to new arithmetic single register @@ -10,6 +10,8 @@ Conflicts: Conflicts: gas/config/tc-microblaze.c opcodes/microblaze-dis.c + +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++- opcodes/microblaze-dis.c | 11 +++ @@ -17,10 +19,10 @@ Conflicts: opcodes/microblaze-opcm.h | 5 +- 4 files changed, 200 insertions(+), 6 deletions(-) -Index: git/gas/config/tc-microblaze.c -=================================================================== ---- git.orig/gas/config/tc-microblaze.c -+++ git/gas/config/tc-microblaze.c +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index a1fb6ccbd44..bca3793c2d8 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c @@ -423,12 +423,33 @@ void md_begin (void) { @@ -209,11 +211,11 @@ Index: git/gas/config/tc-microblaze.c case INST_TYPE_R1_RFSL: if (strcmp (op_end, "")) op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -Index: git/opcodes/microblaze-dis.c -=================================================================== ---- git.orig/opcodes/microblaze-dis.c -+++ git/opcodes/microblaze-dis.c -@@ -130,6 +130,14 @@ get_field_imm15 (struct string_buf *buf, +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 97e21a38bd2..0814cab5bdb 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -130,6 +130,14 @@ get_field_imm15 (struct string_buf *buf, long instr) return p; } @@ -228,7 +230,7 @@ Index: git/opcodes/microblaze-dis.c static char * get_field_special (struct string_buf *buf, long instr, const struct op_code_struct *op) -@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, +@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) /* For mbar 16 or sleep insn. */ case INST_TYPE_NONE: break; @@ -238,10 +240,10 @@ Index: git/opcodes/microblaze-dis.c /* For bit field insns. */ case INST_TYPE_RD_R1_IMMW_IMMS: print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); -Index: git/opcodes/microblaze-opc.h -=================================================================== ---- git.orig/opcodes/microblaze-opc.h -+++ git/opcodes/microblaze-opc.h +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index 6b25d12dace..82da7f1179a 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h @@ -69,6 +69,7 @@ #define INST_TYPE_RD_R1_IMMW_IMMS 21 @@ -337,11 +339,11 @@ Index: git/opcodes/microblaze-opc.h {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, -Index: git/opcodes/microblaze-opcm.h -=================================================================== ---- git.orig/opcodes/microblaze-opcm.h -+++ git/opcodes/microblaze-opcm.h -@@ -61,7 +61,9 @@ enum microblaze_instr +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index b242ea73c7b..5c44a5ff0ac 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h +@@ -62,7 +62,9 @@ enum microblaze_instr eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, /* 64-bit instructions */ @@ -352,10 +354,13 @@ Index: git/opcodes/microblaze-opcm.h bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, -@@ -166,5 +168,6 @@ enum microblaze_instr_type +@@ -167,5 +169,6 @@ enum microblaze_instr_type /* Imm mask for msrset, msrclr instructions. */ #define IMM15_MASK 0x00007FFF +#define IMM16_MASK 0x0000FFFF #endif /* MICROBLAZE-OPCM */ +-- +2.25.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-double-imml-generation-for-64-bit-values.patch similarity index 98% rename from meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0026-double-imml-generation-for-64-bit-values.patch index cdf2854cd..50ce1c4e7 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-double-imml-generation-for-64-bit-values.patch @@ -1,18 +1,19 @@ -From 65677ff251b88389b3de4837f57215dc088dd716 Mon Sep 17 00:00:00 2001 +From 214d99aef9b21ddbb07c120495203861dfe52c43 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 26 Aug 2019 15:29:42 +0530 -Subject: [PATCH 26/38] [Patch,MicroBlaze] : double imml generation for 64 bit - values. +Subject: [PATCH 26/38] double imml generation for 64 bit values. Conflicts: gas/config/tc-microblaze.c + +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 321 ++++++++++++++++++++++++++++++------- opcodes/microblaze-opc.h | 4 +- 2 files changed, 262 insertions(+), 63 deletions(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 1a543c328f2..18dd8524949 100644 +index bca3793c2d8..454d4875ee1 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -1008,7 +1008,7 @@ md_assemble (char * str) @@ -526,7 +527,7 @@ index 1a543c328f2..18dd8524949 100644 within the same section only. */ buf[0] = INST_BYTE0 (inst1); diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index c25383f2de9..6f9a5a60dab 100644 +index 82da7f1179a..e65f4b58233 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr"; @@ -541,5 +542,5 @@ index c25383f2de9..6f9a5a60dab 100644 #endif /* MICROBLAZE_OPC */ -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch index 02940730e..139632655 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch @@ -1,15 +1,17 @@ -From 6b6b0332aa2dcb4fa86911031cafd1cc5442b17f Mon Sep 17 00:00:00 2001 +From 1b2e218f16714358ffc0cbffedeaa36725f56819 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 3 Nov 2021 12:13:32 +0530 Subject: [PATCH 27/38] Fixed bug in generation of IMML instruction for the new MB-64 instructions with single register. + +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 50 +++++++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 3 deletions(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 18dd8524949..68f19c965ef 100644 +index 454d4875ee1..23c0d080d9d 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -1643,12 +1643,56 @@ md_assemble (char * str) @@ -82,5 +84,5 @@ index 18dd8524949..68f19c965ef 100644 /* Needs an immediate inst. */ if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-This-patch-will-remove-imml-0-and-imml-1-instruction.patch similarity index 80% rename from meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0028-This-patch-will-remove-imml-0-and-imml-1-instruction.patch index d738e930f..afc0e67b1 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-This-patch-will-remove-imml-0-and-imml-1-instruction.patch @@ -1,16 +1,16 @@ -From 851a3d7218539c1a886edd92c57efe36b85e29be Mon Sep 17 00:00:00 2001 +From 3b7579366a80e4f8585f6bd5ab22a595909f6057 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 16 Apr 2020 18:08:58 +0530 -Subject: [PATCH 28/38] [Patch,MicroBlaze m64] : This patch will remove imml 0 - and imml -1 instructions when the offset is less than 16 bit for Type A - branch EA instructions. +Subject: [PATCH 28/38] This patch will remove imml 0 and imml -1 instructions + when the offset is less than 16 bit for Type A branch EA instructions. +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 68f19c965ef..805d250b6ac 100644 +index 23c0d080d9d..2378e5037a8 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2158,9 +2158,7 @@ md_assemble (char * str) @@ -34,5 +34,5 @@ index 68f19c965ef..805d250b6ac 100644 /* Generate the imm instruction. */ if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-improper-address-mapping-of-PROVIDE-directive-symbol.patch similarity index 65% rename from meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0029-improper-address-mapping-of-PROVIDE-directive-symbol.patch index f220f6115..80f8c5264 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-improper-address-mapping-of-PROVIDE-directive-symbol.patch @@ -1,20 +1,21 @@ -From aa1705bc097efd5003e5d818e1e2d12ff5fc0c94 Mon Sep 17 00:00:00 2001 +From 8124e17da0056fa6c9f650a0ee5631261e78b93e Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 17 Jun 2020 21:20:26 +0530 -Subject: [PATCH 29/38] [Patch,MicroBlaze] : improper address mapping of - PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't - need to override PROVIDE symbols if symbols are defined in libraries and - linker so I am disabling override for PROVIDE symbols. +Subject: [PATCH 29/38] improper address mapping of PROVIDE directive + symbols[DTOR_END] are causing runtime loops and we don't need to override + PROVIDE symbols if symbols are defined in libraries and linker so I am + disabling override for PROVIDE symbols. +Signed-off-by: Mark Hatle --- ld/ldlang.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/ld/ldlang.c b/ld/ldlang.c -index 37b64c89ee1..5b179daf8f1 100644 +index f12c09633a7..4a71abc7cbc 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c -@@ -3657,10 +3657,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) +@@ -3692,10 +3692,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) plugin_insert = NULL; #endif break; @@ -35,5 +36,5 @@ index 37b64c89ee1..5b179daf8f1 100644 break; } -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Changing-the-long-to-long-long-as-in-Windows-long-is.patch similarity index 53% rename from meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0030-Changing-the-long-to-long-long-as-in-Windows-long-is.patch index d19979296..045dbbb13 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Changing-the-long-to-long-long-as-in-Windows-long-is.patch @@ -1,18 +1,19 @@ -From 34c213ce7e7ef7e1f8fd91b686da655df43efca2 Mon Sep 17 00:00:00 2001 +From 6af09208c03034774aca624b50b2526878ea210e Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Tue, 20 Apr 2021 21:22:06 +0530 -Subject: [PATCH 30/38] [Patch, microblaze]:Changing the long to long long as - in Windows long is 32-bit but we need the variable to be 64-bit +Subject: [PATCH 30/38] Changing the long to long long as in Windows long is + 32-bit but we need the variable to be 64-bit Signed-off-by :Nagaraju Mekala +Signed-off-by: Mark Hatle --- gas/config/tc-microblaze.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -Index: git/gas/config/tc-microblaze.c -=================================================================== ---- git.orig/gas/config/tc-microblaze.c -+++ git/gas/config/tc-microblaze.c +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 2378e5037a8..604a8df86a2 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c @@ -1017,7 +1017,7 @@ md_assemble (char * str) unsigned reg2; unsigned reg3; @@ -22,3 +23,6 @@ Index: git/gas/config/tc-microblaze.c expressionS exp, exp1; char name[20]; long immedl; +-- +2.25.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch index c96b57578..df7a72d40 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch @@ -1,4 +1,4 @@ -From 2a8a925c35909543738ccacafcdc7000525a27c6 Mon Sep 17 00:00:00 2001 +From 276d9d6138efbe27d2542f9b3dfb2a47072ec588 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 8 Nov 2021 21:57:13 +0530 Subject: [PATCH 31/38] gas: revert moving of md_pseudo_table from const @@ -18,7 +18,7 @@ Signed-off-by: Mark Hatle 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 84f60c029c1..dfcd0ab1569 100644 +index 604a8df86a2..123d5ba6214 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -385,6 +385,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) @@ -66,7 +66,7 @@ index 84f60c029c1..dfcd0ab1569 100644 default: return 0; diff --git a/gas/tc.h b/gas/tc.h -index f1fa7495e29..c9722307dea 100644 +index bb9a935a353..4a740f9bdd9 100644 --- a/gas/tc.h +++ b/gas/tc.h @@ -22,7 +22,7 @@ @@ -79,5 +79,5 @@ index f1fa7495e29..c9722307dea 100644 const char * md_atof (int, char *, int *); int md_parse_option (int, const char *); -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch index 83e5a42b0..9146144a7 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch @@ -1,4 +1,4 @@ -From 231121a6d5ff51bcf578c06288181db5f800d66f Mon Sep 17 00:00:00 2001 +From 23b792fc927b4f24eb20f841cfef6b9548c1d547 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 8 Nov 2021 22:01:23 +0530 Subject: [PATCH 32/38] ld/emulparams/elf64microblaze: Fix emulation generation @@ -11,6 +11,7 @@ ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation The error appears to be that the elf64 files were referencing the elf32 emulation. Signed-off-by: Mark Hatle +Signed-off-by: Mark Hatle --- ld/emulparams/elf64microblaze.sh | 2 +- ld/emulparams/elf64microblazeel.sh | 2 +- @@ -39,5 +40,5 @@ index 9c7b0eb7080..7b4c7c411bd 100644 +TEMPLATE_NAME=elf #GENERATE_SHLIB_SCRIPT=yes -- -2.17.1 +2.25.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch similarity index 95% rename from meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch index c08a06e14..d2753fe98 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch @@ -1,4 +1,4 @@ -From bf7c7531e54e2f1b995e7ba52213c1df585d7fcc Mon Sep 17 00:00:00 2001 +From 48166e74b46787b10073fcec3c133463504e2dbc Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 23 Jan 2017 19:07:44 +0530 Subject: [PATCH 33/38] Add initial port of linux gdbserver add @@ -23,6 +23,7 @@ Signed-off-by: Nathan Rossi Conflicts: gdb/gdbserver/Makefile.in gdb/gdbserver/configure.srv +Signed-off-by: Mark Hatle --- gdb/configure.host | 3 + gdb/features/microblaze-linux.xml | 12 + @@ -40,19 +41,19 @@ Conflicts: create mode 100644 gdb/gdbserver/linux-microblaze-low.c create mode 100644 gdb/regformats/reg-microblaze.dat -Index: git/gdb/configure.host -=================================================================== ---- git.orig/gdb/configure.host -+++ git/gdb/configure.host -@@ -60,6 +60,7 @@ hppa*) gdb_host_cpu=pa ;; - i[34567]86*) gdb_host_cpu=i386 ;; +diff --git a/gdb/configure.host b/gdb/configure.host +index da71675b201..3a0c4443a93 100644 +--- a/gdb/configure.host ++++ b/gdb/configure.host +@@ -61,6 +61,7 @@ i[34567]86*) gdb_host_cpu=i386 ;; + loongarch*) gdb_host_cpu=loongarch ;; m68*) gdb_host_cpu=m68k ;; mips*) gdb_host_cpu=mips ;; +microblaze*) gdb_host_cpu=microblaze ;; powerpc* | rs6000) gdb_host_cpu=powerpc ;; sparcv9 | sparc64) gdb_host_cpu=sparc ;; s390*) gdb_host_cpu=s390 ;; -@@ -132,6 +133,8 @@ mips64*-*-openbsd*) gdb_host=obsd64 ;; +@@ -135,6 +136,8 @@ mips64*-*-openbsd*) gdb_host=obsd64 ;; or1k-*-linux*) gdb_host=linux ;; @@ -61,10 +62,11 @@ Index: git/gdb/configure.host powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) gdb_host=aix ;; powerpc*-*-freebsd*) gdb_host=fbsd ;; -Index: git/gdb/features/microblaze-linux.xml -=================================================================== +diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml +new file mode 100644 +index 00000000000..8983e66eb3d --- /dev/null -+++ git/gdb/features/microblaze-linux.xml ++++ b/gdb/features/microblaze-linux.xml @@ -0,0 +1,12 @@ + +