"IP definition not found" in tutorial

[Spirithead]

Hello everyone,
I'm following the tutorial notebook "3-build-accelerator-with-finn" and I've got this error during IP generating (step_set_fifo_depths [13/19]):

ERROR: [BD 5-390] IP definition not found for VLNV: xilinx.com:hls:MVAU_hls_1:1.0 
Traceback (most recent call last):
  File "/home/spirithead/finn/src/finn/builder/build_dataflow.py", line 158, in build_dataflow_cfg
    model = transform_step(model, cfg)
  File "/home/spirithead/finn/src/finn/builder/build_dataflow_steps.py", line 573, in step_set_fifo_depths
    model = model.transform(
  File "/home/spirithead/finn/deps/qonnx/src/qonnx/core/modelwrapper.py", line 140, in transform
    (transformed_model, model_was_changed) = transformation.apply(transformed_model)
  File "/home/spirithead/finn/src/finn/transformation/fpgadataflow/set_fifo_depths.py", line 325, in apply
    model = model.transform(CreateStitchedIP(self.fpgapart, self.clk_ns))
  File "/home/spirithead/finn/deps/qonnx/src/qonnx/core/modelwrapper.py", line 140, in transform
    (transformed_model, model_was_changed) = transformation.apply(transformed_model)
  File "/home/spirithead/finn/src/finn/transformation/fpgadataflow/create_stitched_ip.py", line 617, in apply
    raise Exception(
Exception: CreateStitchedIP failed, no wrapper HDL found under /tmp/finn_dev_spirithead/vivado_stitch_proj_flx36ioq/finn_vivado_stitch_proj.srcs/sources_1/bd/finn_design/hdl/finn_design_wrapper.v or /tmp/finn_dev_spirithead/vivado_stitch_proj_flx36ioq/finn_vivado_stitch_proj.gen/sources_1/bd/finn_design/hdl/finn_design_wrapper.v.
                    Please check logs under the parent directory.
> /home/spirithead/finn/src/finn/transformation/fpgadataflow/create_stitched_ip.py(617)apply()
    615                 model.set_metadata_prop("wrapper_filename", wrapper_filename_alt)
    616             else:
--> 617                 raise Exception(
    618                     """CreateStitchedIP failed, no wrapper HDL found under %s or %s.
    619                     Please check logs under the parent directory."""

I have Vivado and Vitis 2022.2. What could be the problem?

[fpjentzsch]

Hi, did you check the logs as per the error message?

[Spirithead]

Yep, as for the logs, there is the same message in '/tmp/finn_dev_spirithead/vivado_stitch_proj_iyqqu3x2/vivado.log':

# create_bd_cell -type hier MVAU_hls_1
# create_bd_pin -dir I -type clk /MVAU_hls_1/ap_clk
# create_bd_pin -dir I -type rst /MVAU_hls_1/ap_rst_n
# create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 /MVAU_hls_1/out_V
# create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 /MVAU_hls_1/in0_V
# create_bd_cell -type ip -vlnv xilinx.com:hls:MVAU_hls_1:1.0 /MVAU_hls_1/MVAU_hls_1
ERROR: [BD 5-390] IP definition not found for VLNV: xilinx.com:hls:MVAU_hls_1:1.0
ERROR: [Common 17-39] 'create_bd_cell' failed due to earlier errors.

    while executing
"create_bd_cell -type ip -vlnv xilinx.com:hls:MVAU_hls_1:1.0 /MVAU_hls_1/MVAU_hls_1"
    (file "make_project.tcl" line 40)

I also found out that finn is trying to get some wrapper under '/tmp/finn_dev_spirithead/vivado_stitch_proj_flx36ioq/finn_vivado_stitch_proj.srcs/sources_1/bd/finn_design/hdl/finn_design_wrapper.v or /tmp/finn_dev_spirithead/vivado_stitch_proj_flx36ioq/finn_vivado_stitch_proj.gen/sources_1/bd/finn_design/hdl/finn_design_wrapper.v'.

But there're no such directories (./hdl directory wasn't created) and therefore no wrapper. Is there the way to deal with this?

[Spirithead]

Ok, sorry for disturbing, i ran all notebooks from the beginning and it all worked out somehow :D Le classique