From 3a269dcf95cd9eaeebf24b913f31056adb5145e7 Mon Sep 17 00:00:00 2001 From: Srinivas Kakarla Date: Tue, 13 Feb 2018 14:50:12 +0530 Subject: [PATCH 001/614] Updated Cobalt's hash to latest Source --- package/cobalt/cobalt.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/cobalt/cobalt.mk b/package/cobalt/cobalt.mk index 80890fdc3e68..9a03ca8d6668 100644 --- a/package/cobalt/cobalt.mk +++ b/package/cobalt/cobalt.mk @@ -4,7 +4,7 @@ # ################################################################################ -COBALT_VERSION = 85f0b51231c6717b94db7526c22872c4b535d076 +COBALT_VERSION = 6ea1111f44caf7caa93a4dffeb6780a8c9d0a8b3 COBALT_SITE_METHOD = git COBALT_SITE = git@github.com:Metrological/cobalt COBALT_INSTALL_STAGING = YES From 2277258701b6b0554e2d8ec7b29387686a1a5d17 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Fri, 9 Feb 2018 15:19:14 +0000 Subject: [PATCH 002/614] gst1-plugins-bad: Fix HLS live stream issues with http://cdn.metrological.com/hls/master.m3u8 WARNING: This is an experimental patch! --- ...eam-issues-with-http-cdn.metrologica.patch | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0009-Fix-HLS-live-stream-issues-with-http-cdn.metrologica.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0009-Fix-HLS-live-stream-issues-with-http-cdn.metrologica.patch b/package/gstreamer1/gst1-plugins-bad/0009-Fix-HLS-live-stream-issues-with-http-cdn.metrologica.patch new file mode 100644 index 000000000000..3985adb17d36 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0009-Fix-HLS-live-stream-issues-with-http-cdn.metrologica.patch @@ -0,0 +1,69 @@ +From 74716972edc64c073169c994ad616dfca8cff0ab Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= +Date: Fri, 9 Feb 2018 15:03:45 +0000 +Subject: [PATCH] Fix HLS live stream issues with + http://cdn.metrological.com/hls/master.m3u8 + +This live stream has index{0-3}.ts blocks which repeat forever. The +first issue is that the fetch of an updated playlist takes too much and +the playback stalls. This has been fixed by increasing +GST_M3U8_LIVE_MIN_FRAGMENT_DISTANCE from 3 to 4, which gives more +buffer at the expense of latency in the stream (it's less realtime). + +The second issue was that index0.ts starts with a non-zero Program +Clock Reference (PCR, the timing used in MPEG TS). When the blocks wrap +around from index3.ts to index0.ts, the PCR reset code detects a +non-zero gap and screws the timestamps. This is fixed by correcting the +out_time, but requires to disable PCR wraparound management, which +seems a bit fishy. + +WARNING: This patch is experimental and can produce regressions! +--- + ext/hls/m3u8.h | 3 ++- + gst/mpegtsdemux/mpegtspacketizer.c | 9 ++++++++- + 2 files changed, 10 insertions(+), 2 deletions(-) + +diff --git a/ext/hls/m3u8.h b/ext/hls/m3u8.h +index 3a5023b..951f95c 100644 +--- a/ext/hls/m3u8.h ++++ b/ext/hls/m3u8.h +@@ -47,7 +47,8 @@ typedef struct _GstHLSMasterPlaylist GstHLSMasterPlaylist; + GST_M3U8_LIVE_MIN_FRAGMENT_DISTANCE fragments. Section 6.3.3 + "Playing the Playlist file" of the HLS draft states that this + value is three fragments */ +-#define GST_M3U8_LIVE_MIN_FRAGMENT_DISTANCE 3 ++/* Let's give more buffer and use 4 */ ++#define GST_M3U8_LIVE_MIN_FRAGMENT_DISTANCE 4 + + struct _GstM3U8 + { +diff --git a/gst/mpegtsdemux/mpegtspacketizer.c b/gst/mpegtsdemux/mpegtspacketizer.c +index cc46ebb..6317bf5 100644 +--- a/gst/mpegtsdemux/mpegtspacketizer.c ++++ b/gst/mpegtsdemux/mpegtspacketizer.c +@@ -1333,7 +1333,8 @@ calculate_skew (MpegTSPacketizer2 * packetizer, + /* Handle PCR wraparound and resets */ + if (GST_CLOCK_TIME_IS_VALID (pcr->last_pcrtime) && + gstpcrtime < pcr->last_pcrtime) { +- if (pcr->last_pcrtime - gstpcrtime > PCR_GST_MAX_VALUE / 2) { ++ /* DISABLED!!! */ ++ if (FALSE && pcr->last_pcrtime - gstpcrtime > PCR_GST_MAX_VALUE / 2) { + /* PCR wraparound */ + GST_DEBUG ("PCR wrap"); + pcr->pcroffset += PCR_GST_MAX_VALUE; +@@ -1521,6 +1522,12 @@ no_skew: + out_time = 0; + } else { + out_time += pcr->skew; ++ /* If out_time is reset to 0, keep counting where we were last time. ++ * But this needs PCR wraparound detection to be disabled in order to work consistently */ ++ if (out_time == 0) { ++ pcr->base_time += pcr->prev_out_time; ++ out_time = pcr->base_time + send_diff; ++ } + } + /* check if timestamps are not going backwards, we can only check this if we + * have a previous out time and a previous send_diff */ +-- +1.8.3.2 + From 8a35dd8b0c24d9bd60005029941d068753db7285 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 13 Feb 2018 14:36:57 +0100 Subject: [PATCH 003/614] [rpi23] add sense hat module --- board/raspberrypi/rpi23-linux-4.9.config | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index 3df77183a05f..24ad57cbe733 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -136,6 +136,8 @@ CONFIG_BRCMFMAC_USB=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_RPISENSE=m CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set @@ -175,6 +177,7 @@ CONFIG_VIDEO_BCM2835=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y CONFIG_FB_BCM2708=y +CONFIG_FB_RPISENSE=m CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y From 35a69b15fb93fc3521143c3337d9b267c4f80d0b Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 13 Feb 2018 16:47:18 +0100 Subject: [PATCH 004/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index f18f6b656d66..94ffb8523ef5 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 693fef69cdf374a1514b5d34845d561fdf3ad790 +WPEFRAMEWORK_UI_VERSION = 572cb8bda9b19b180d65d24382f65deef39ee61d WPEFRAMEWORK_UI_SITE_METHOD = git WPEFRAMEWORK_UI_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkUI.git WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From 1ab4a87151817d165eb2b920e10d65b87f911e32 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 13 Feb 2018 16:57:43 +0100 Subject: [PATCH 005/614] [wpewebkit] clear canvas on suspend --- .../wpe/wpewebkit/0003-Clear-on-suspend.patch | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 package/wpe/wpewebkit/0003-Clear-on-suspend.patch diff --git a/package/wpe/wpewebkit/0003-Clear-on-suspend.patch b/package/wpe/wpewebkit/0003-Clear-on-suspend.patch new file mode 100644 index 000000000000..7915bcfe44a2 --- /dev/null +++ b/package/wpe/wpewebkit/0003-Clear-on-suspend.patch @@ -0,0 +1,39 @@ +diff --git a/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp b/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp +index 752988aadd8..11e50aa4d75 100644 +--- a/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp ++++ b/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp +@@ -631,7 +631,7 @@ void WebGLRenderingContextBase::addActivityStateChangeObserverIfNecessary() + { + // We are only interested in visibility changes for contexts + // that are using the high-performance GPU. +- if (!isHighPerformanceContext(m_context)) ++ if (!isHighPerformanceContext(m_context) && !canvas().document().frame()->settings().nonCompositedWebGLEnabled()) + return; + + auto* page = canvas().document().page(); +@@ -5969,8 +5969,23 @@ void WebGLRenderingContextBase::activityStateDidChange(ActivityState::Flags oldA + return; + + ActivityState::Flags changed = oldActivityState ^ newActivityState; +- if (changed & ActivityState::IsVisible) +- m_context->setContextVisibility(newActivityState & ActivityState::IsVisible); ++ if (isHighPerformanceContext(m_context)) { ++ if (changed & ActivityState::IsVisible) { ++ m_context->setContextVisibility(newActivityState & ActivityState::IsVisible); ++ } ++ } ++ ++ if (canvas().document().frame()->settings().nonCompositedWebGLEnabled()) { ++ if ((changed & ActivityState::IsInWindow) && !(newActivityState & ActivityState::IsInWindow)) { ++ if (m_scissorEnabled) ++ m_context->disable(GraphicsContext3D::SCISSOR_TEST); ++ m_context->clearColor(0, 0, 0, 0); ++ m_context->clear(GraphicsContext3D::COLOR_BUFFER_BIT); ++ m_context->platformLayer()->swapBuffersIfNeeded(); ++ if (m_scissorEnabled) ++ m_context->enable(GraphicsContext3D::SCISSOR_TEST); ++ } ++ } + } + + void WebGLRenderingContextBase::setFailNextGPUStatusCheck() From f42608a91c911b6e44179aa916aefbc1ba06f60b Mon Sep 17 00:00:00 2001 From: Miguel Gomez Date: Thu, 15 Feb 2018 16:42:34 +0100 Subject: [PATCH 006/614] [wpewebkit][wpebackend-rdk] version bump. Also remove wpewebkit patches that are already committed. --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- ...ge-lifetime-of-media-OpenCdm-session.patch | 225 ------------------ ...-closed-sessions-from-session-id-map.patch | 44 ---- .../wpe/wpewebkit/0003-Clear-on-suspend.patch | 39 --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 5 files changed, 2 insertions(+), 310 deletions(-) delete mode 100644 package/wpe/wpewebkit/0001-EME-OpenCDM-Manage-lifetime-of-media-OpenCdm-session.patch delete mode 100644 package/wpe/wpewebkit/0002-Remove-closed-sessions-from-session-id-map.patch delete mode 100644 package/wpe/wpewebkit/0003-Clear-on-suspend.patch diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 546966422729..e3dcfaf7723c 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 1abc9e3168844b7f9e3b594f6e6056b5917f16a5 +WPEBACKEND_RDK_VERSION = c1655cc8f6b68fab58e9da08e39b71d68dca26bf WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 diff --git a/package/wpe/wpewebkit/0001-EME-OpenCDM-Manage-lifetime-of-media-OpenCdm-session.patch b/package/wpe/wpewebkit/0001-EME-OpenCDM-Manage-lifetime-of-media-OpenCdm-session.patch deleted file mode 100644 index dbe7dcb6e0f9..000000000000 --- a/package/wpe/wpewebkit/0001-EME-OpenCDM-Manage-lifetime-of-media-OpenCdm-session.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 7348e896c600bddda3e09eb49c43da7dbca28470 Mon Sep 17 00:00:00 2001 -From: Charlie Turner -Date: Wed, 31 Jan 2018 10:38:39 +0000 -Subject: [PATCH] [EME, OpenCDM] Manage lifetime of media::OpenCdm sessions - -Also rename from openCdmSession -> openCdmBackend, because in my opinion this -better reflects what it is (sessions are multiplexed over the backend -connection) - -* platform/graphics/gstreamer/eme/CDMOpenCDM.cpp: -(WebCore::CDMPrivateOpenCDM::CDMPrivateOpenCDM): -(WebCore::CDMPrivateOpenCDM::supportsConfiguration const): -(WebCore::CDMPrivateOpenCDM::createInstance): -(WebCore::CDMInstanceOpenCDM::CDMInstanceOpenCDM): -(WebCore::CDMInstanceOpenCDM::setServerCertificate): -(WebCore::CDMInstanceOpenCDM::requestLicense): -(WebCore::CDMInstanceOpenCDM::updateLicense): -(WebCore::CDMInstanceOpenCDM::loadSession): -(WebCore::CDMInstanceOpenCDM::closeSession): -(WebCore::CDMInstanceOpenCDM::removeSessionData): -(WebCore::CDMPrivateOpenCDM::getOpenCdmInstance): Deleted. -* platform/graphics/gstreamer/eme/CDMOpenCDM.h: ---- - .../platform/graphics/gstreamer/eme/CDMOpenCDM.cpp | 56 +++++++++------------- - .../platform/graphics/gstreamer/eme/CDMOpenCDM.h | 6 +-- - 2 files changed, 25 insertions(+), 37 deletions(-) - -diff --git a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -index dd08ea1b887..d569fb006da 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -@@ -42,15 +42,11 @@ using namespace Inspector; - - namespace WebCore { - --class CDMPrivateOpenCDM : public CDMPrivate { -- -- String m_openCdmKeySystem; -- static std::unique_ptr s_openCdm; -- -+// FIXME: Move these classes to their own files like the rest of WebKit. -+class CDMPrivateOpenCDM final : public CDMPrivate { - public: -- - CDMPrivateOpenCDM(const String&); -- virtual ~CDMPrivateOpenCDM(); -+ ~CDMPrivateOpenCDM() override = default; - - bool supportsInitDataType(const AtomicString&) const override; - bool supportsConfiguration(const MediaKeySystemConfiguration&) const override; -@@ -67,10 +63,11 @@ public: - bool supportsInitData(const AtomicString&, const SharedBuffer&) const override; - RefPtr sanitizeResponse(const SharedBuffer&) const override; - std::optional sanitizeSessionId(const String&) const override; -- static media::OpenCdm* getOpenCdmInstance(); --}; - --std::unique_ptr CDMPrivateOpenCDM::s_openCdm; -+private: -+ String m_openCdmKeySystem; -+ std::unique_ptr m_openCdmBackend; -+}; - - static media::OpenCdm::LicenseType webKitLicenseTypeToOpenCDM(CDMInstance::LicenseType licenseType) - { -@@ -116,11 +113,11 @@ static CDMInstance::KeyStatus openCDMKeyStatusToWebKit(media::OpenCdm::KeyStatus - - CDMPrivateOpenCDM::CDMPrivateOpenCDM(const String& keySystem) - : m_openCdmKeySystem(keySystem) -+ , m_openCdmBackend(std::make_unique()) - { -+ RELEASE_ASSERT(m_openCdmBackend); - } - --CDMPrivateOpenCDM::~CDMPrivateOpenCDM() = default; -- - bool CDMPrivateOpenCDM::supportsInitDataType(const AtomicString& initDataType) const - { - return equalLettersIgnoringASCIICase(initDataType, "cenc"); -@@ -129,11 +126,11 @@ bool CDMPrivateOpenCDM::supportsInitDataType(const AtomicString& initDataType) c - bool CDMPrivateOpenCDM::supportsConfiguration(const MediaKeySystemConfiguration& config) const - { - for (auto& audioCapability : config.audioCapabilities) { -- if (!getOpenCdmInstance()->IsTypeSupported(m_openCdmKeySystem.utf8().data(), audioCapability.contentType.utf8().data())) -+ if (!m_openCdmBackend->IsTypeSupported(m_openCdmKeySystem.utf8().data(), audioCapability.contentType.utf8().data())) - return false; - } - for (auto& videoCapability : config.videoCapabilities) { -- if (!getOpenCdmInstance()->IsTypeSupported(m_openCdmKeySystem.utf8().data(), videoCapability.contentType.utf8().data())) -+ if (!m_openCdmBackend->IsTypeSupported(m_openCdmKeySystem.utf8().data(), videoCapability.contentType.utf8().data())) - return false; - } - return true; -@@ -154,13 +151,6 @@ bool CDMPrivateOpenCDM::supportsRobustness(const String&) const - return false; - } - --media::OpenCdm* CDMPrivateOpenCDM::getOpenCdmInstance() --{ -- if (!s_openCdm) -- s_openCdm = std::make_unique(); -- return s_openCdm.get(); --} -- - MediaKeysRequirement CDMPrivateOpenCDM::distinctiveIdentifiersRequirement(const MediaKeySystemConfiguration&, const MediaKeysRestrictions&) const - { - return MediaKeysRequirement::Optional; -@@ -178,8 +168,8 @@ bool CDMPrivateOpenCDM::distinctiveIdentifiersAreUniquePerOriginAndClearable(con - - RefPtr CDMPrivateOpenCDM::createInstance() - { -- getOpenCdmInstance()->SelectKeySystem(m_openCdmKeySystem.utf8().data()); -- return adoptRef(new CDMInstanceOpenCDM(getOpenCdmInstance(), m_openCdmKeySystem)); -+ m_openCdmBackend->SelectKeySystem(m_openCdmKeySystem.utf8().data()); -+ return adoptRef(new CDMInstanceOpenCDM(std::move(m_openCdmBackend), m_openCdmKeySystem)); - } - - void CDMPrivateOpenCDM::loadAndInitialize() -@@ -230,14 +220,12 @@ bool CDMFactoryOpenCDM::supportsKeySystem(const String& keySystem) - return GStreamerEMEUtilities::isPlayReadyKeySystem(keySystem) || GStreamerEMEUtilities::isWidevineKeySystem(keySystem); - } - --CDMInstanceOpenCDM::CDMInstanceOpenCDM(media::OpenCdm* session, const String& keySystem) -- : m_openCdmSession(session) -+CDMInstanceOpenCDM::CDMInstanceOpenCDM(std::unique_ptr backend, const String& keySystem) -+ : m_openCdmBackend(std::move(backend)) - , m_keySystem(keySystem) - { - } - --CDMInstanceOpenCDM::~CDMInstanceOpenCDM() = default; -- - CDMInstance::SuccessValue CDMInstanceOpenCDM::initializeWithConfiguration(const MediaKeySystemConfiguration&) - { - return Succeeded; -@@ -256,7 +244,7 @@ CDMInstance::SuccessValue CDMInstanceOpenCDM::setPersistentStateAllowed(bool) - CDMInstance::SuccessValue CDMInstanceOpenCDM::setServerCertificate(Ref&& certificate) - { - CDMInstance::SuccessValue ret = WebCore::CDMInstance::SuccessValue::Failed; -- if (m_openCdmSession->SetServerCertificate(reinterpret_cast(const_cast(certificate->data())), certificate->size())) -+ if (m_openCdmBackend->SetServerCertificate(reinterpret_cast(const_cast(certificate->data())), certificate->size())) - ret = WebCore::CDMInstance::SuccessValue::Succeeded; - return ret; - } -@@ -273,7 +261,7 @@ void CDMInstanceOpenCDM::requestLicense(LicenseType licenseType, const AtomicStr - - GST_TRACE("Going to request a new session ID"); - -- bool createdSession = m_openCdmSession->CreateSession(mimeType.utf8().data(), reinterpret_cast(const_cast(initData->data())), -+ bool createdSession = m_openCdmBackend->CreateSession(mimeType.utf8().data(), reinterpret_cast(const_cast(initData->data())), - initData->size(), sessionId, webKitLicenseTypeToOpenCDM(licenseType)); - - if (!createdSession) { -@@ -293,7 +281,7 @@ void CDMInstanceOpenCDM::requestLicense(LicenseType licenseType, const AtomicStr - // below will detect an failure to retrieve a key message. That awkwardness will go when we move - // to std::string. - int destinationUrlLength = sizeof(temporaryUrl); -- m_openCdmSession->GetKeyMessage(message, &messageLength, temporaryUrl, &destinationUrlLength); -+ m_openCdmBackend->GetKeyMessage(message, &messageLength, temporaryUrl, &destinationUrlLength); - if (!messageLength || !destinationUrlLength) { - callback(WTFMove(initData), sessionIdValue, false, Failed); - return; -@@ -319,7 +307,7 @@ void CDMInstanceOpenCDM::updateLicense(const String& sessionId, LicenseType, con - { - // FIXME: At some point we will probably need to fix the API in OpenCDM, handle a key status vector and probably call the update key statuses algoritm. - std::string responseMessage; -- media::OpenCdm::KeyStatus keyStatus = m_openCdmSession->Update(reinterpret_cast(const_cast(response.data())), response.size(), responseMessage); -+ media::OpenCdm::KeyStatus keyStatus = m_openCdmBackend->Update(reinterpret_cast(const_cast(response.data())), response.size(), responseMessage); - GST_DEBUG("session id %s, key status is %ld", sessionId.utf8().data(), static_cast(keyStatus)); - if (keyStatus == media::OpenCdm::KeyStatus::Usable) { - SharedBuffer* initData = sessionIdMap.get(sessionId); -@@ -398,7 +386,7 @@ void CDMInstanceOpenCDM::loadSession(LicenseType, const String& sessionId, const - { - std::string responseMessage; - SessionLoadFailure sessionFailure = SessionLoadFailure::None; -- int ret = m_openCdmSession->Load(responseMessage); -+ int ret = m_openCdmBackend->Load(responseMessage); - if (!ret) { - std::string request = "message:"; - if (!responseMessage.compare(0, request.length(), request.c_str())) { -@@ -421,7 +409,7 @@ void CDMInstanceOpenCDM::loadSession(LicenseType, const String& sessionId, const - - void CDMInstanceOpenCDM::closeSession(const String&, CloseSessionCallback callback) - { -- m_openCdmSession->Close(); -+ m_openCdmBackend->Close(); - callback(); - } - -@@ -429,7 +417,7 @@ void CDMInstanceOpenCDM::removeSessionData(const String& sessionId, LicenseType, - { - std::string responseMessage; - KeyStatusVector keys; -- int ret = m_openCdmSession->Remove(responseMessage); -+ int ret = m_openCdmBackend->Remove(responseMessage); - if (!ret) { - std::string request = "message:"; - if (!responseMessage.compare(0, request.length(), request.c_str())) { -diff --git a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.h b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.h -index 72c4e84ea8e..404846d53b8 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.h -+++ b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.h -@@ -51,8 +51,8 @@ private: - - class CDMInstanceOpenCDM final : public CDMInstance { - public: -- CDMInstanceOpenCDM(media::OpenCdm*, const String&); -- virtual ~CDMInstanceOpenCDM(); -+ CDMInstanceOpenCDM(std::unique_ptr openCdmBackend, const String&); -+ ~CDMInstanceOpenCDM() override = default; - - ImplementationType implementationType() const { return ImplementationType::OpenCDM; } - SuccessValue initializeWithConfiguration(const MediaKeySystemConfiguration&) override; -@@ -77,7 +77,7 @@ private: - SessionLoadFailure getSessionLoadStatus(std::string &); - size_t checkMessageLength(std::string &, std::string &); - -- media::OpenCdm* m_openCdmSession; -+ std::unique_ptr m_openCdmBackend; - HashMap> sessionIdMap; - String m_keySystem; - }; --- -2.15.1 - diff --git a/package/wpe/wpewebkit/0002-Remove-closed-sessions-from-session-id-map.patch b/package/wpe/wpewebkit/0002-Remove-closed-sessions-from-session-id-map.patch deleted file mode 100644 index 11fa57b8657a..000000000000 --- a/package/wpe/wpewebkit/0002-Remove-closed-sessions-from-session-id-map.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 8f8d2537a2401774be6ed8e1d9510844eb80e798 Mon Sep 17 00:00:00 2001 -From: Charlie Turner -Date: Thu, 1 Feb 2018 17:11:31 +0000 -Subject: [PATCH] Remove closed sessions from session id map - -This isn't a final fix, the session id handling is completely bonkers... But -this does fix the issue of gstreamer selecting incorrect sessions -non-determinisically IFF session.close() is called by the application. -Multi-key will be refactoring much of this session handling stuff. - -* platform/graphics/gstreamer/eme/CDMOpenCDM.cpp: -(WebCore::CDMInstanceOpenCDM::loadSession): -(WebCore::CDMInstanceOpenCDM::closeSession): ---- - Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -index d569fb006da..a2cf71ac758 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/eme/CDMOpenCDM.cpp -@@ -407,14 +407,18 @@ void CDMInstanceOpenCDM::loadSession(LicenseType, const String& sessionId, const - } - } - --void CDMInstanceOpenCDM::closeSession(const String&, CloseSessionCallback callback) -+void CDMInstanceOpenCDM::closeSession(const String& sessionId, CloseSessionCallback callback) - { -+ if (!sessionIdMap.remove(sessionId)) { -+ GST_WARNING("%s is an unknown session", sessionId.utf8().data()); -+ } - m_openCdmBackend->Close(); - callback(); - } - - void CDMInstanceOpenCDM::removeSessionData(const String& sessionId, LicenseType, RemoveSessionDataCallback callback) - { -+ // FIXME: Should the session id be removed from the map here as well as in closeSession? - std::string responseMessage; - KeyStatusVector keys; - int ret = m_openCdmBackend->Remove(responseMessage); --- -2.15.1 - diff --git a/package/wpe/wpewebkit/0003-Clear-on-suspend.patch b/package/wpe/wpewebkit/0003-Clear-on-suspend.patch deleted file mode 100644 index 7915bcfe44a2..000000000000 --- a/package/wpe/wpewebkit/0003-Clear-on-suspend.patch +++ /dev/null @@ -1,39 +0,0 @@ -diff --git a/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp b/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp -index 752988aadd8..11e50aa4d75 100644 ---- a/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp -+++ b/Source/WebCore/html/canvas/WebGLRenderingContextBase.cpp -@@ -631,7 +631,7 @@ void WebGLRenderingContextBase::addActivityStateChangeObserverIfNecessary() - { - // We are only interested in visibility changes for contexts - // that are using the high-performance GPU. -- if (!isHighPerformanceContext(m_context)) -+ if (!isHighPerformanceContext(m_context) && !canvas().document().frame()->settings().nonCompositedWebGLEnabled()) - return; - - auto* page = canvas().document().page(); -@@ -5969,8 +5969,23 @@ void WebGLRenderingContextBase::activityStateDidChange(ActivityState::Flags oldA - return; - - ActivityState::Flags changed = oldActivityState ^ newActivityState; -- if (changed & ActivityState::IsVisible) -- m_context->setContextVisibility(newActivityState & ActivityState::IsVisible); -+ if (isHighPerformanceContext(m_context)) { -+ if (changed & ActivityState::IsVisible) { -+ m_context->setContextVisibility(newActivityState & ActivityState::IsVisible); -+ } -+ } -+ -+ if (canvas().document().frame()->settings().nonCompositedWebGLEnabled()) { -+ if ((changed & ActivityState::IsInWindow) && !(newActivityState & ActivityState::IsInWindow)) { -+ if (m_scissorEnabled) -+ m_context->disable(GraphicsContext3D::SCISSOR_TEST); -+ m_context->clearColor(0, 0, 0, 0); -+ m_context->clear(GraphicsContext3D::COLOR_BUFFER_BIT); -+ m_context->platformLayer()->swapBuffersIfNeeded(); -+ if (m_scissorEnabled) -+ m_context->enable(GraphicsContext3D::SCISSOR_TEST); -+ } -+ } - } - - void WebGLRenderingContextBase::setFailNextGPUStatusCheck() diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index fb2de3b4ebc7..08b7da395f77 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = 0546efe4f45689ec025cfe73085cbdd689a64f34 +WPEWEBKIT_VERSION = b37868ac159a74f1885ecf9c407da0ed73c8ecd8 WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From be6415995f8a32b03b0b6e7edbf4d1075dce7996 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 15 Feb 2018 22:00:39 +0100 Subject: [PATCH 007/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 84a9bbc5ec9d..89500d7da530 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 5687a0f8b309f67cea0b0536426395e9636bc1d4 +WPEFRAMEWORK_VERSION = 8c36b540befef5e49ace3cabb4e42d9b62836ca8 WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From b0f8998228aa499754ac85537ade5f4aa2856d01 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 15 Feb 2018 22:00:56 +0100 Subject: [PATCH 008/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index d882738b456d..52f5641b584f 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = fce921d86437d977a1cbe0166a999a17e9dd9bf6 +WPEFRAMEWORK_PLUGINS_VERSION = c59a9422b7a173bc62a7e8a929cbcf764fc13972 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From abeccbdc9089d16858646ba5c8bec6a7c4ea18af Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 15 Feb 2018 22:01:15 +0100 Subject: [PATCH 009/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 08b7da395f77..2694dbc898d7 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = b37868ac159a74f1885ecf9c407da0ed73c8ecd8 +WPEWEBKIT_VERSION = 029243740e2da303110375627ad644e3e61362a1 WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From b488bde1585ce569c35e2475ca9fee7b781218a6 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 16 Feb 2018 14:36:10 +0100 Subject: [PATCH 010/614] Revert "[rpi] remove wifi support for now until wifi plugin is complete" This reverts commit 965e87de6e4116bae1e6ec41f0f2324914fd5f3d. --- configs/raspberrypi0_wpe_ml_defconfig | 7 ++++++- configs/raspberrypi2_wpe_ml_defconfig | 3 +++ configs/raspberrypi3_wpe_ml_defconfig | 14 +++++++++++++- 3 files changed, 22 insertions(+), 2 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 69272facb231..32612bb779b2 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -13,7 +13,7 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi0/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi0/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" +BR2_ROOTFS_POST_SCRIPT_ARGS="--rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" @@ -55,6 +55,8 @@ BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y @@ -88,5 +90,8 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_IPTABLES=y +BR2_PACKAGE_IW=y +BR2_PACKAGE_PPPD=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index f11813386d82..7694f60f3fe6 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -91,5 +91,8 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_IPTABLES=y +BR2_PACKAGE_IW=y +BR2_PACKAGE_PPPD=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 539f14b69fd6..05b523c7ddec 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--i2c --spi --1w --tvmode-720 --overclock-pi3 --silent" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi3 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" @@ -58,11 +58,14 @@ BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y # BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y @@ -80,6 +83,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_COBALT=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y @@ -92,5 +96,13 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_IPTABLES=y +BR2_PACKAGE_IW=y +BR2_PACKAGE_PPPD=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set From f9e7f603a9bbbc991e04c81704407830ed8e3861 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 16 Feb 2018 14:56:19 +0100 Subject: [PATCH 011/614] Revert "[pi-top] sync defconfig with rest" This reverts commit 3da9ba98fcc42e47de7e5599855c8ad9557d7977. --- configs/raspberrypi3-pitop_wpe_ml_defconfig | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index 1c0b9a6ab7a7..ddc8c40e25c0 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--i2c --spi --tvmode-dvi --overclock-pi3 --silent" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --tvmode-dvi --overclock-pi3 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" @@ -57,11 +57,14 @@ BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y # BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y @@ -79,6 +82,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y @@ -91,5 +95,13 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_IPTABLES=y +BR2_PACKAGE_IW=y +BR2_PACKAGE_PPPD=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set From 6f582d5476ff0354da2c83393ca5598d8163a684 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 16 Feb 2018 15:12:59 +0100 Subject: [PATCH 012/614] Revert "[rpi] Add Cobalt in defconfigs" This reverts commit 8811c920c3906c11298815e17c067bd1c9b9248b. --- configs/raspberrypi0_wpe_ml_defconfig | 2 -- configs/raspberrypi2_wpe_ml_defconfig | 2 -- configs/raspberrypi3_wpe_ml_defconfig | 2 -- 3 files changed, 6 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 32612bb779b2..89c8e392d892 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -23,7 +23,6 @@ BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi01-linux-4.9.config" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b-plus bcm2708-rpi-0-w" -BR2_PACKAGE_COBALT=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y @@ -78,7 +77,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_COBALT=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 7694f60f3fe6..cfccf297af7d 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -26,7 +26,6 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b" BR2_PACKAGE_BUSYBOX_SMP=y -BR2_PACKAGE_COBALT=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y @@ -79,7 +78,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_COBALT=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 05b523c7ddec..4bf2a29b0fa5 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -26,7 +26,6 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-cm3" BR2_PACKAGE_BUSYBOX_SMP=y -BR2_PACKAGE_COBALT=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y @@ -84,7 +83,6 @@ BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_COBALT=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y From 60efe816255f68c30d5cccb59f35401b38ed720d Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 07:59:55 +0100 Subject: [PATCH 013/614] [rpi] cleaning up default mixer enabled --- board/raspberrypi/post-image.sh | 12 ++++++++++++ package/rpi-firmware/config.txt | 3 --- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index a9272064e22e..68d66e81db97 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -7,6 +7,18 @@ GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp" echo "Post-image: processing $@" +COBALT="$(grep ^BR2_PACKAGE_COBALT=y ${BR2_CONFIG})" +if [ "x${COBALT}" != "x" ]; then + if ! grep -qE '^dtparam=audio=on' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'dtparam=audio=on' to config.txt." + cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" + +# Enable the onboard ALSA audio +dtparam=audio=on +__EOF__ + fi +fi + for i in "$@" do case "$i" in diff --git a/package/rpi-firmware/config.txt b/package/rpi-firmware/config.txt index ccac646b93b6..cda42b8ecd21 100644 --- a/package/rpi-firmware/config.txt +++ b/package/rpi-firmware/config.txt @@ -21,6 +21,3 @@ gpu_mem_1024=384 # Enable mmc by default dtoverlay=mmc - -# Enable the onboard ALSA audio -dtparam=audio=on From 89d9a39345c0ec5f5daf09111f2e88d52f0b9ff3 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 08:23:41 +0100 Subject: [PATCH 014/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 52f5641b584f..28703938491b 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = c59a9422b7a173bc62a7e8a929cbcf764fc13972 +WPEFRAMEWORK_PLUGINS_VERSION = 8de2ceb211cdd800d0a19d87486616c5f464f903 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 28041d13ef31001580dfd65d3ad43bf599034e21 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 08:40:01 +0100 Subject: [PATCH 015/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 94ffb8523ef5..5c8084598e63 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 572cb8bda9b19b180d65d24382f65deef39ee61d +WPEFRAMEWORK_UI_VERSION = f1c68b25893b6e237c527097e1cbff28a4c5597b WPEFRAMEWORK_UI_SITE_METHOD = git WPEFRAMEWORK_UI_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkUI.git WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From 0331a0ac4ad541f300fe0666687294974e327d3a Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 08:41:49 +0100 Subject: [PATCH 016/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 2694dbc898d7..017a1b787ab3 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = 029243740e2da303110375627ad644e3e61362a1 +WPEWEBKIT_VERSION = 14ccfaad9461286eddcbff255744d4dbc547bc7b WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From bbee997026b540a576a8b5d3ffa236b18b6d1846 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 09:30:31 +0100 Subject: [PATCH 017/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 5c8084598e63..c79e60fc51ca 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = f1c68b25893b6e237c527097e1cbff28a4c5597b +WPEFRAMEWORK_UI_VERSION = d7b707d4031d501a2d4d33896dce7393762d601f WPEFRAMEWORK_UI_SITE_METHOD = git WPEFRAMEWORK_UI_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkUI.git WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From b31fb898d69bbe3daee04016ebd020bb2bf2718d Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 09:37:26 +0100 Subject: [PATCH 018/614] [rpi] cleaning up defconfigs --- configs/raspberrypi0_wpe_ml_defconfig | 3 --- configs/raspberrypi2_wpe_ml_defconfig | 3 --- configs/raspberrypi3-pitop_wpe_ml_defconfig | 3 --- configs/raspberrypi3_wpe_ml_defconfig | 3 --- 4 files changed, 12 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 89c8e392d892..0cb24677dde7 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -88,8 +88,5 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_IPTABLES=y -BR2_PACKAGE_IW=y -BR2_PACKAGE_PPPD=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index cfccf297af7d..92984b117df7 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -89,8 +89,5 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_IPTABLES=y -BR2_PACKAGE_IW=y -BR2_PACKAGE_PPPD=y BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index ddc8c40e25c0..1436ab849d6a 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -95,9 +95,6 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_IPTABLES=y -BR2_PACKAGE_IW=y -BR2_PACKAGE_PPPD=y BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y BR2_PACKAGE_WPA_SUPPLICANT_EAP=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 4bf2a29b0fa5..fdf3ffd23292 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -94,9 +94,6 @@ BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_IPTABLES=y -BR2_PACKAGE_IW=y -BR2_PACKAGE_PPPD=y BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y BR2_PACKAGE_WPA_SUPPLICANT_EAP=y From 70fb1fe8446f81e83006e96e9361eae1c6b298a1 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 10:09:07 +0100 Subject: [PATCH 019/614] [rpi] adding support for touchscreen --- board/raspberrypi/post-image.sh | 10 ++++++++++ board/raspberrypi/rpi23-linux-4.9.config | 2 ++ 2 files changed, 12 insertions(+) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 68d66e81db97..37f970e25879 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -141,6 +141,16 @@ __EOF__ # Enable 1Wire functionality dtoverlay=lirc-rpi,gpio_in_pin=23,gpio_out_pin=22 +__EOF__ + fi + ;; + --touchscreen) + if ! grep -qE '^dtoverlay=ads7846' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'ads7846' functionality to config.txt." + cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" + +# Enable ADS7846 Touchscreen +dtoverlay=ads7846,cs=0,penirq=25,penirq_pull=2,speed=10000,keep_vref_on=0,swapxy=0,pmax=255,xohms=150,xmin=199,xmax=3999,ymin=199,ymax=3999 __EOF__ fi ;; diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index 24ad57cbe733..ba3446efa62b 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -138,6 +138,8 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_JOYSTICK=y CONFIG_JOYSTICK_RPISENSE=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set From 4bab3ecd6f6125fd1ed8eade451bb65c5c23ec3b Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 18:09:39 +0100 Subject: [PATCH 020/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 017a1b787ab3..788d1a34a379 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = 14ccfaad9461286eddcbff255744d4dbc547bc7b +WPEWEBKIT_VERSION = e1472addc9b6100fea2eff9815638241c1cdccc2 WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From f81ec0dce00c4dd9f9524c56f2572192d47516d7 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 18 Feb 2018 21:10:35 +0100 Subject: [PATCH 021/614] [rpi] adding virtual remote with new rf rcu keymap --- configs/raspberrypi0_wpe_ml_defconfig | 3 +- configs/raspberrypi2_wpe_ml_defconfig | 3 +- configs/raspberrypi3_wpe_ml_defconfig | 3 +- .../0000-Add-new-remote-control.patch | 47 +++++++++++++++++++ 4 files changed, 53 insertions(+), 3 deletions(-) create mode 100644 package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 0cb24677dde7..84db89e8568c 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -59,12 +59,14 @@ BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y # BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -82,7 +84,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_LIBXKBCOMMON=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 92984b117df7..b4a9c29f9db4 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -60,12 +60,14 @@ BR2_PACKAGE_RPI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y # BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -83,7 +85,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_LIBXKBCOMMON=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index fdf3ffd23292..46a81115382d 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -62,6 +62,7 @@ BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y # BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y @@ -69,6 +70,7 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -88,7 +90,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_LIBXKBCOMMON=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y diff --git a/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch b/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch new file mode 100644 index 000000000000..d4a320d39c19 --- /dev/null +++ b/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch @@ -0,0 +1,47 @@ +From faef352235576dabdea06cddd691b2866f8e7a4c Mon Sep 17 00:00:00 2001 +From: Albert Dahan +Date: Sun, 18 Feb 2018 20:59:48 +0100 +Subject: [PATCH] Adding new remote + +--- + RemoteControl/KeyMaps/keymap.json | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/RemoteControl/KeyMaps/keymap.json b/RemoteControl/KeyMaps/keymap.json +index c19c3be..51a7f9b 100644 +--- a/RemoteControl/KeyMaps/keymap.json ++++ b/RemoteControl/KeyMaps/keymap.json +@@ -4,6 +4,10 @@ + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, ++ { "code": "0x000C", "key": 114 }, ++ { "code": "0x000D", "key": 115 }, ++ { "code": "0x0017", "key": 116 }, ++ { "code": "0x001C", "key": 28 }, + { "code": "0x0020", "key": 11 }, + { "code": "0x0021", "key": 2 }, + { "code": "0x0022", "key": 3 }, +@@ -15,13 +19,22 @@ + { "code": "0x0028", "key": 9 }, + { "code": "0x0029", "key": 10 }, + { "code": "0x002B", "key": 28 }, ++ { "code": "0x002E", "key": 139 }, + { "code": "0x0030", "key": 104 }, + { "code": "0x0031", "key": 109 }, + { "code": "0x0032", "key": 14 }, ++ { "code": "0x0066", "key": 1 }, ++ { "code": "0x0067", "key": 103 }, ++ { "code": "0x0069", "key": 105 }, ++ { "code": "0x006A", "key": 106 }, ++ { "code": "0x006C", "key": 108 }, + { "code": "0x0071", "key": 401 }, + { "code": "0x0072", "key": 398 }, + { "code": "0x0073", "key": 399 }, + { "code": "0x0074", "key": 400 }, ++ { "code": "0x0080", "key": 166 }, ++ { "code": "0x009E", "key": 14 }, ++ { "code": "0x00A4", "key": 164 }, + { "code": "0x8004", "key": 30 }, + { "code": "0x8005", "key": 48 }, + { "code": "0x8006", "key": 46 }, From b835c51cd273cfac0a0d119d17bf432c20d03e64 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 19 Feb 2018 12:13:37 +0100 Subject: [PATCH 022/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 89500d7da530..a23e1153555b 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 8c36b540befef5e49ace3cabb4e42d9b62836ca8 +WPEFRAMEWORK_VERSION = e398d8f81b5ac7a64683cf0364ed593054ad0a5b WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From e08eb5d9ba7c9779d98a12def07a1bfb53298e14 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 19 Feb 2018 12:14:04 +0100 Subject: [PATCH 023/614] [wpeframework-plugins] bump to latest version --- configs/raspberrypi0_wpe_ml_defconfig | 3 +- configs/raspberrypi2_wpe_ml_defconfig | 3 +- configs/raspberrypi3_wpe_ml_defconfig | 3 +- .../0000-Add-new-remote-control.patch | 47 ------------------- package/wpe/wpeframework-plugins/Config.in | 12 +++-- .../wpeframework-plugins.mk | 9 ++-- 6 files changed, 21 insertions(+), 56 deletions(-) delete mode 100644 package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 84db89e8568c..2aa60959e5e1 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -66,7 +66,8 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index b4a9c29f9db4..0c37b8d6e1da 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -67,7 +67,8 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 46a81115382d..19c45ccd3a10 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -70,7 +70,8 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch b/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch deleted file mode 100644 index d4a320d39c19..000000000000 --- a/package/wpe/wpeframework-plugins/0000-Add-new-remote-control.patch +++ /dev/null @@ -1,47 +0,0 @@ -From faef352235576dabdea06cddd691b2866f8e7a4c Mon Sep 17 00:00:00 2001 -From: Albert Dahan -Date: Sun, 18 Feb 2018 20:59:48 +0100 -Subject: [PATCH] Adding new remote - ---- - RemoteControl/KeyMaps/keymap.json | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/RemoteControl/KeyMaps/keymap.json b/RemoteControl/KeyMaps/keymap.json -index c19c3be..51a7f9b 100644 ---- a/RemoteControl/KeyMaps/keymap.json -+++ b/RemoteControl/KeyMaps/keymap.json -@@ -4,6 +4,10 @@ - { "code": "0x0003", "key": 105 }, - { "code": "0x0004", "key": 106 }, - { "code": "0x0009", "key": 1 }, -+ { "code": "0x000C", "key": 114 }, -+ { "code": "0x000D", "key": 115 }, -+ { "code": "0x0017", "key": 116 }, -+ { "code": "0x001C", "key": 28 }, - { "code": "0x0020", "key": 11 }, - { "code": "0x0021", "key": 2 }, - { "code": "0x0022", "key": 3 }, -@@ -15,13 +19,22 @@ - { "code": "0x0028", "key": 9 }, - { "code": "0x0029", "key": 10 }, - { "code": "0x002B", "key": 28 }, -+ { "code": "0x002E", "key": 139 }, - { "code": "0x0030", "key": 104 }, - { "code": "0x0031", "key": 109 }, - { "code": "0x0032", "key": 14 }, -+ { "code": "0x0066", "key": 1 }, -+ { "code": "0x0067", "key": 103 }, -+ { "code": "0x0069", "key": 105 }, -+ { "code": "0x006A", "key": 106 }, -+ { "code": "0x006C", "key": 108 }, - { "code": "0x0071", "key": 401 }, - { "code": "0x0072", "key": 398 }, - { "code": "0x0073", "key": 399 }, - { "code": "0x0074", "key": 400 }, -+ { "code": "0x0080", "key": 166 }, -+ { "code": "0x009E", "key": 14 }, -+ { "code": "0x00A4", "key": 164 }, - { "code": "0x8004", "key": 30 }, - { "code": "0x8005", "key": 48 }, - { "code": "0x8006", "key": 46 }, diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 9ce9c8d4efd9..ff0ea752e2da 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -195,10 +195,16 @@ config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_RF help Select devices which are based on Radio Frequency (RF) technology -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT - bool "uinput (linux input system)" +config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT + bool "devinput (linux input system)" help - Select devices which are annunced in the linux operating system under /dev/uinput as eventX + Select devices which are annunced in the linux operating system under /dev/input/ as eventX + +config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP + string "keymap" + default "" + help + Select a keymap file endif diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 28703938491b..281ea04ba547 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 8de2ceb211cdd800d0a19d87486616c5f464f903 +WPEFRAMEWORK_PLUGINS_VERSION = 5270f446d5a3b37196d1d7efd05b9e5974ee3750 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES @@ -81,8 +81,8 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL=ON -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVUINPUT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_DEVUINPUT=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_DEVINPUT=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR),y) ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS),y) @@ -101,6 +101,9 @@ endif ifneq ($(BR2_TARGET_GENERIC_HOSTNAME),"buildroot") WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_HOST="$(call qstrip,$(BR2_TARGET_GENERIC_HOSTNAME))" endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_KEYMAP="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP))" +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT),y) From 4276a2af1557535968bb0b6baf9423a1d1617eab Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 19 Feb 2018 12:30:00 +0100 Subject: [PATCH 024/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 281ea04ba547..a9c6cc6acd3c 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 5270f446d5a3b37196d1d7efd05b9e5974ee3750 +WPEFRAMEWORK_PLUGINS_VERSION = 7cbd1a4a3dc38471a40f95da11d9c2eb9960f260 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 440f9363c49251dc5be7719711c07873c389dae7 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 20 Feb 2018 09:01:15 +0100 Subject: [PATCH 025/614] [rpi] use default webserver, path is located at /boot/www (fat32) --- configs/raspberrypi0_wpe_ml_defconfig | 2 +- configs/raspberrypi2_wpe_ml_defconfig | 2 +- configs/raspberrypi3-pitop_wpe_ml_defconfig | 2 +- configs/raspberrypi3_wpe_ml_defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 2aa60959e5e1..a9fc439cba7e 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -72,7 +72,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:150m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 0c37b8d6e1da..fbf95641efaa 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -73,7 +73,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index 1436ab849d6a..2ec43951c5d6 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -73,7 +73,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 19c45ccd3a10..bdfe8c4b13db 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -76,7 +76,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y From 169591a043c798091158e290cab19dcfd5ea1c2b Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 20 Feb 2018 09:18:35 +0100 Subject: [PATCH 026/614] [wpeframework-plugins] add patch for updating device info --- .../0000-Fix-ip-update.patch | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch diff --git a/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch b/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch new file mode 100644 index 000000000000..dd1d4da95f99 --- /dev/null +++ b/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch @@ -0,0 +1,23 @@ +From 8dfee9f197ab5429b99b0ae79d9717e52fb0afe5 Mon Sep 17 00:00:00 2001 +From: Pierre Wielders +Date: Mon, 19 Feb 2018 22:29:08 +0100 +Subject: [PATCH] [NETWORKCONTROL] In case of a new IP, flush the current + information. + +--- + NetworkControl/NetworkControl.cpp | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/NetworkControl/NetworkControl.cpp b/NetworkControl/NetworkControl.cpp +index 174db31..f73a8f7 100644 +--- a/NetworkControl/NetworkControl.cpp ++++ b/NetworkControl/NetworkControl.cpp +@@ -235,6 +235,8 @@ namespace Plugin { + Core::AdapterIterator adapter(interfaceName); + + SetIP(adapter, entry.Address(), entry.Gateway()); ++ ++ Core::AdapterIterator::Flush(); + } + } + } From 9baa62340eac32a39c0254ba28cc481f3f317420 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 20 Feb 2018 19:57:52 +0100 Subject: [PATCH 027/614] [wpeframework+plugins] bump to latest version --- .../0000-Fix-ip-update.patch | 23 ------------------- .../wpeframework-plugins.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 3 files changed, 2 insertions(+), 25 deletions(-) delete mode 100644 package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch diff --git a/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch b/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch deleted file mode 100644 index dd1d4da95f99..000000000000 --- a/package/wpe/wpeframework-plugins/0000-Fix-ip-update.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 8dfee9f197ab5429b99b0ae79d9717e52fb0afe5 Mon Sep 17 00:00:00 2001 -From: Pierre Wielders -Date: Mon, 19 Feb 2018 22:29:08 +0100 -Subject: [PATCH] [NETWORKCONTROL] In case of a new IP, flush the current - information. - ---- - NetworkControl/NetworkControl.cpp | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/NetworkControl/NetworkControl.cpp b/NetworkControl/NetworkControl.cpp -index 174db31..f73a8f7 100644 ---- a/NetworkControl/NetworkControl.cpp -+++ b/NetworkControl/NetworkControl.cpp -@@ -235,6 +235,8 @@ namespace Plugin { - Core::AdapterIterator adapter(interfaceName); - - SetIP(adapter, entry.Address(), entry.Gateway()); -+ -+ Core::AdapterIterator::Flush(); - } - } - } diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index a9c6cc6acd3c..df7089f9bfe5 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 7cbd1a4a3dc38471a40f95da11d9c2eb9960f260 +WPEFRAMEWORK_PLUGINS_VERSION = 735e582c2681b170d3a0b3ee2d3c9ee4cb4cd21e WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index a23e1153555b..04950b78c877 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = e398d8f81b5ac7a64683cf0364ed593054ad0a5b +WPEFRAMEWORK_VERSION = 4627260736ba26c8b84045afe85d1291842bb90a WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From b0da611692dadb2d2434bb5552835e918f83c70d Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 23 Feb 2018 10:33:00 +0100 Subject: [PATCH 028/614] [rpi] fix cpio post image script --- board/raspberrypi/post-image.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 37f970e25879..6d30f4de4786 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -204,7 +204,7 @@ elif [ "x${INITRAMFS}" = "x" ] && [ "x${ROOTFS_CPIO}" != "x" ]; then if [ "x${CPIO_XZ}" != "x" ]; then sed -i 's/cpio.gz/cpio.xz/' "${BINARIES_DIR}/rpi-firmware/config.txt" elif [ "x${CPIO_GZIP}" = "x" ]; then - sed -i 's/cpio.gz/rootfs.cpio/' "${BINARIES_DIR}/rpi-firmware/config.txt" + sed -i 's/cpio.gz/cpio/' "${BINARIES_DIR}/rpi-firmware/config.txt" fi fi From d1f1b16c754526788aa1cbe810af78bcf12729ac Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 23 Feb 2018 12:38:17 +0100 Subject: [PATCH 029/614] [rpi] speed up decompression on boot --- configs/raspberrypi0_wpe_ml_defconfig | 1 + configs/raspberrypi2_wpe_ml_defconfig | 1 + configs/raspberrypi3-pitop_wpe_ml_defconfig | 1 + configs/raspberrypi3_wpe_ml_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index a9fc439cba7e..0b01757f3756 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -21,6 +21,7 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" BR2_LINUX_KERNEL_PATCH="board/raspberrypi/0001-Adding-metrological-boot-logo.patch" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi01-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b-plus bcm2708-rpi-0-w" BR2_PACKAGE_GSTREAMER1=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index fbf95641efaa..5288edf16dc0 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -23,6 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" BR2_LINUX_KERNEL_PATCH="board/raspberrypi/0001-Adding-metrological-boot-logo.patch" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b" BR2_PACKAGE_BUSYBOX_SMP=y diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index 2ec43951c5d6..bddbd7b44943 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -23,6 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" BR2_LINUX_KERNEL_PATCH="board/raspberrypi/0001-Adding-metrological-boot-logo.patch" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-cm3" BR2_PACKAGE_BUSYBOX_SMP=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index bdfe8c4b13db..d71ea9e86dd5 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -23,6 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" BR2_LINUX_KERNEL_PATCH="board/raspberrypi/0001-Adding-metrological-boot-logo.patch" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-cm3" BR2_PACKAGE_BUSYBOX_SMP=y From 2c834553d383221ef4dc66f2cfe72ab3a303b84f Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 11:07:16 +0100 Subject: [PATCH 030/614] [rpi] use lz4 for initramfs to speed up boot process --- board/raspberrypi/rpi01-linux-4.9.config | 6 ++++++ board/raspberrypi/rpi23-linux-4.9.config | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/board/raspberrypi/rpi01-linux-4.9.config b/board/raspberrypi/rpi01-linux-4.9.config index ebd5c8d9fcc6..bfffb3da7303 100644 --- a/board/raspberrypi/rpi01-linux-4.9.config +++ b/board/raspberrypi/rpi01-linux-4.9.config @@ -3,6 +3,12 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set CONFIG_EMBEDDED=y # CONFIG_COMPAT_BRK is not set CONFIG_JUMP_LABEL=y diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index ba3446efa62b..8eadd6d837a5 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -4,6 +4,11 @@ CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set CONFIG_EMBEDDED=y # CONFIG_COMPAT_BRK is not set CONFIG_JUMP_LABEL=y From fe8301e55b3d77e31ef6eb5d078aae2b58f0b2f5 Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 27 Feb 2018 11:44:28 +0100 Subject: [PATCH 031/614] [acn][wpeframework-plugins]: do not select Commander plugin by defult --- package/wpe/wpeframework-plugins/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index ff0ea752e2da..a95060e3e424 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -3,7 +3,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS config BR2_PACKAGE_WPEFRAMEWORK_COMMANDER select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - default y + default n bool "Commander" help Commander Plugin From f1b53c615c03f4811331b534b478ca9f3ada492d Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 27 Feb 2018 16:19:09 +0100 Subject: [PATCH 032/614] [wpeframework] Moved Network event and added Internet event --- package/wpe/wpeframework/wpeframework.mk | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 04950b78c877..a7c0f8ed46af 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -54,7 +54,7 @@ WPEFRAMEWORK_EXTERN_EVENTS += Provisioning endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC),y) -WPEFRAMEWORK_EXTERN_EVENTS += Network +WPEFRAMEWORK_EXTERN_EVENTS += Internet WPEFRAMEWORK_EXTERN_EVENTS += Location endif @@ -67,6 +67,10 @@ WPEFRAMEWORK_EXTERN_EVENTS += Platform WPEFRAMEWORK_EXTERN_EVENTS += Graphics endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL),y) +# WPEFRAMEWORK_EXTERN_EVENTS += Network +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) WPEFRAMEWORK_EXTERN_EVENTS += Decryption endif From 4eadac5eb99168fd0cef689a272f2f6958860b97 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 27 Feb 2018 16:24:01 +0100 Subject: [PATCH 033/614] [amazon] Added some dependencies --- package/amazon/Config.in | 2 ++ package/amazon/amazon.mk | 12 ++++++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/package/amazon/Config.in b/package/amazon/Config.in index aa3f2e29a45e..c1bd3d5035a7 100644 --- a/package/amazon/Config.in +++ b/package/amazon/Config.in @@ -3,6 +3,8 @@ config BR2_PACKAGE_AMAZON select BR2_PACKAGE_ZLIB select BR2_PACKAGE_LIBCURL select BR2_PACKAGE_LIBPNG + select BR2_PACKAGE_WPEFRAMEWORK + select BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT bool "amazon" help Amazon project diff --git a/package/amazon/amazon.mk b/package/amazon/amazon.mk index d1f3a9e7b996..2e77a329f966 100644 --- a/package/amazon/amazon.mk +++ b/package/amazon/amazon.mk @@ -9,7 +9,11 @@ AMAZON_SITE_METHOD = git AMAZON_SITE = git@github.com:Metrological/amazon.git AMAZON_INSTALL_STAGING = NO AMAZON_INSTALL_TARGET = YES -AMAZON_DEPENDENCIES = host-cmake zlib jpeg libcurl libpng +AMAZON_DEPENDENCIES = host-cmake zlib jpeg libcurl libpng wpeframework + +ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) + AMAZON_DEPENDENCIES += rpi-userland +endif define AMAZON_CONFIGURATION $(call GENERATE_LOCAL_CONFIG) @@ -45,10 +49,10 @@ endef ifeq ($(BR2_PACKAGE_AMAZON),y) ifeq ($(BR2_PACKAGE_AMAZON_BACKEND_DRM),y) - AMAZON_DEPENDENCIES += libgles libegl playready + AMAZON_DEPENDENCIES += libgles libegl gstreamer1 gst1-plugins-base gst1-plugins-good gst1-plugins-bad playready AMAZON_BACKEND = mpb-drm else ifeq ($(BR2_PACKAGE_AMAZON_BACKEND_NO_DRM),y) - AMAZON_DEPENDENCIES += libgles libegl + AMAZON_DEPENDENCIES += libgles libegl gstreamer1 gst1-plugins-base gst1-plugins-good gst1-plugins-bad AMAZON_BACKEND = mpb-no-drm else ifeq ($(BR2_PACKAGE_AMAZON_BACKEND_FAKE),y) AMAZON_BACKEND = fake-mpb @@ -100,7 +104,7 @@ endef define AMAZON_INSTALL_STAGING_CMDS endef -AMAZON_POST_EXTRACT_HOOKS += AMAZON_CONFIGURATION +AMAZON_PRE_BUILD_HOOKS += AMAZON_CONFIGURATION # AMAZON_POST_PATCH_HOOKS += AMAZON_APPLY_CUSTOM_PATCHES $(eval $(generic-package)) From 9f5fa1fb554fc9aa7ca9da2d1e6a1e773584150c Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:32:59 +0100 Subject: [PATCH 034/614] [system] cleaning up skeleton --- system/Config.in | 10 ++--- system/device_table.txt | 4 -- system/skeleton/etc/dnsmasq.conf | 2 - system/skeleton/etc/network/if-down.d/.empty | 0 .../etc/network/if-post-down.d/.empty | 0 .../etc/network/if-pre-up.d/wait_iface | 21 ---------- system/skeleton/etc/network/if-up.d/.empty | 0 system/skeleton/etc/ppp/chat | 39 ------------------- system/skeleton/etc/ppp/peers/provider | 22 ----------- 9 files changed, 4 insertions(+), 94 deletions(-) delete mode 100644 system/skeleton/etc/dnsmasq.conf delete mode 100644 system/skeleton/etc/network/if-down.d/.empty delete mode 100644 system/skeleton/etc/network/if-post-down.d/.empty delete mode 100755 system/skeleton/etc/network/if-pre-up.d/wait_iface delete mode 100644 system/skeleton/etc/network/if-up.d/.empty delete mode 100644 system/skeleton/etc/ppp/chat delete mode 100644 system/skeleton/etc/ppp/peers/provider diff --git a/system/Config.in b/system/Config.in index 2c22e04594aa..29196e3b9b04 100644 --- a/system/Config.in +++ b/system/Config.in @@ -53,13 +53,11 @@ config BR2_TARGET_GENERIC_CABUNDLE help Install CA bundle from curl. -config BR2_TARGET_GENERIC_TIMESERVER - string "Time Server" - default "time.nist.gov time-a.nist.gov time-b.nist.gov time-c.nist.gov utcnist.colorado.edu utcnist2.colorado.edu" +config BR2_TARGET_GENERIC_NETWORK + bool "Set network" + default y help - Select a server that can be used to ask the time. - Create an empty setting to prevent a time request from being issued. - Use space seperator to add multiple servers. + Install network scripts and config. endif diff --git a/system/device_table.txt b/system/device_table.txt index dc1af518100b..4a8959dbac41 100644 --- a/system/device_table.txt +++ b/system/device_table.txt @@ -13,9 +13,5 @@ /var/www d 755 33 33 - - - - - /etc/shadow f 600 0 0 - - - - - /etc/passwd f 644 0 0 - - - - - -/etc/network/if-up.d d 755 0 0 - - - - - -/etc/network/if-pre-up.d d 755 0 0 - - - - - -/etc/network/if-down.d d 755 0 0 - - - - - -/etc/network/if-post-down.d d 755 0 0 - - - - - # uncomment this to allow starting x as non-root #/usr/X11R6/bin/Xfbdev f 4755 0 0 - - - - - diff --git a/system/skeleton/etc/dnsmasq.conf b/system/skeleton/etc/dnsmasq.conf deleted file mode 100644 index 0cfe87a1380f..000000000000 --- a/system/skeleton/etc/dnsmasq.conf +++ /dev/null @@ -1,2 +0,0 @@ -dhcp-range=eth0,192.168.10.100,192.168.10.200,24h -dhcp-range=wlan0,192.168.20.100,192.168.20.200,24h diff --git a/system/skeleton/etc/network/if-down.d/.empty b/system/skeleton/etc/network/if-down.d/.empty deleted file mode 100644 index e69de29bb2d1..000000000000 diff --git a/system/skeleton/etc/network/if-post-down.d/.empty b/system/skeleton/etc/network/if-post-down.d/.empty deleted file mode 100644 index e69de29bb2d1..000000000000 diff --git a/system/skeleton/etc/network/if-pre-up.d/wait_iface b/system/skeleton/etc/network/if-pre-up.d/wait_iface deleted file mode 100755 index ebccff2aa58f..000000000000 --- a/system/skeleton/etc/network/if-pre-up.d/wait_iface +++ /dev/null @@ -1,21 +0,0 @@ -#!/bin/sh - -# In case we have a slow-to-appear interface (e.g. eth-over-USB), -# and we need to configure it, wait until it appears, but not too -# long either. IF_WAIT_DELAY is in seconds. - -if [ "${IF_WAIT_DELAY}" -a ! -e "/sys/class/net/${IFACE}" ]; then - printf "Waiting for interface %s to appear" "${IFACE}" - while [ ${IF_WAIT_DELAY} -gt 0 ]; do - if [ -e "/sys/class/net/${IFACE}" ]; then - printf "\n" - exit 0 - fi - sleep 1 - printf "." - : $((IF_WAIT_DELAY -= 1)) - done - printf " timeout!\n" - exit 1 -fi - diff --git a/system/skeleton/etc/network/if-up.d/.empty b/system/skeleton/etc/network/if-up.d/.empty deleted file mode 100644 index e69de29bb2d1..000000000000 diff --git a/system/skeleton/etc/ppp/chat b/system/skeleton/etc/ppp/chat deleted file mode 100644 index 70d92c108c15..000000000000 --- a/system/skeleton/etc/ppp/chat +++ /dev/null @@ -1,39 +0,0 @@ -# You can use this script unmodified to connect to cellular networks. -# The APN is specified in the peers file as the argument of the -T command -# line option of chat(8). - -# For details about the AT commands involved please consult the relevant -# standard: 3GPP TS 27.007 - AT command set for User Equipment (UE). -# (http://www.3gpp.org/ftp/Specs/html-info/27007.htm) - -ABORT BUSY -ABORT VOICE -ABORT "NO CARRIER" -ABORT "NO DIALTONE" -ABORT "NO DIAL TONE" -ABORT "NO ANSWER" -ABORT "DELAYED" - -# cease if the modem is not attached to the network yet -ABORT "+CGATT: 0" - -"" AT -TIMEOUT 12 -OK ATH -OK ATE1 - -# +CPIN provides the SIM card PIN -"" AT+CPIN=0000 - -# +CFUN may allow to configure the handset to limit operations to -# GPRS/EDGE/UMTS/etc to save power, but the arguments are not standard -# except for 1 which means "full functionality". -#OK AT+CFUN=1 - -OK ATZ -OK "ATQ0 V1 E1 S0=0 &C1 &D2 +FCLASS=0" -OK AT+CGDCONT=1,"IP","\T","",0,0 -OK ATD*99# -TIMEOUT 22 -CONNECT "" - diff --git a/system/skeleton/etc/ppp/peers/provider b/system/skeleton/etc/ppp/peers/provider deleted file mode 100644 index aac341814d48..000000000000 --- a/system/skeleton/etc/ppp/peers/provider +++ /dev/null @@ -1,22 +0,0 @@ -connect "/usr/sbin/chat -v -f /etc/ppp/chat -T portalmmm.nl" - -# Serial device to which the modem is connected. -/dev/ttyUSB2 - -# Speed of the serial line. -115200 - -# Assumes that your IP address is allocated dynamically by the ISP. -noipdefault - -# Try to get the name server addresses from the ISP. -usepeerdns - -# Use this connection as the default route. -defaultroute - -# Makes pppd "dial again" when the connection is lost. -persist - -# Do not ask the remote to authenticate. -noauth From bf2c802e0fad6362a0b5dfe33ed8abb9bc6efe14 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:33:40 +0100 Subject: [PATCH 035/614] [skeleton] cleaning up --- package/skeleton/rdate | 28 ---------------------------- package/skeleton/skeleton.mk | 26 ++++---------------------- package/skeleton/wait_iface | 21 +++++++++++++++++++++ package/skeleton/wlan_check | 26 -------------------------- 4 files changed, 25 insertions(+), 76 deletions(-) delete mode 100755 package/skeleton/rdate create mode 100755 package/skeleton/wait_iface delete mode 100755 package/skeleton/wlan_check diff --git a/package/skeleton/rdate b/package/skeleton/rdate deleted file mode 100755 index e7fddaede18a..000000000000 --- a/package/skeleton/rdate +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/sh - -if [ "$IFACE" = lo ]; then - exit -fi - -TRIES=0 -MAXTRIES=20 -SLEEP=1 -SERVERS=$(echo "TIMESERVERS" | tr ' ' "\n") - -sleep $SLEEP - -while true; -do - if [ "$TRIES" -gt "$MAXTRIES" ]; then - exit - fi - for SERVER in $SERVERS; - do - RESULT=$(rdate $SERVER) - if [ "x$RESULT" != "x" ]; then - exit - fi - let TRIES+=1 - sleep $SLEEP - done -done diff --git a/package/skeleton/skeleton.mk b/package/skeleton/skeleton.mk index 6134610fb376..0c15674bb572 100644 --- a/package/skeleton/skeleton.mk +++ b/package/skeleton/skeleton.mk @@ -117,7 +117,6 @@ endef # default skeleton. ifeq ($(BR2_ROOTFS_SKELETON_DEFAULT),y) -SKELETON_TARGET_GENERIC_TIMESERVER = $(call qstrip,$(BR2_TARGET_GENERIC_TIMESERVER)) SKELETON_TARGET_GENERIC_HOSTNAME = $(call qstrip,$(BR2_TARGET_GENERIC_HOSTNAME)) SKELETON_TARGET_GENERIC_ISSUE = $(call qstrip,$(BR2_TARGET_GENERIC_ISSUE)) SKELETON_TARGET_GENERIC_ROOT_PASSWD = $(call qstrip,$(BR2_TARGET_GENERIC_ROOT_PASSWD)) @@ -128,15 +127,6 @@ SKELETON_TARGET_GENERIC_GETTY_BAUDRATE = $(call qstrip,$(BR2_TARGET_GENERIC_GETT SKELETON_TARGET_GENERIC_GETTY_TERM = $(call qstrip,$(BR2_TARGET_GENERIC_GETTY_TERM)) SKELETON_TARGET_GENERIC_GETTY_OPTIONS = $(call qstrip,$(BR2_TARGET_GENERIC_GETTY_OPTIONS)) -ifneq ($(SKELETON_TARGET_GENERIC_TIMESERVER),) -define SYSTEM_TIMESERVER - $(INSTALL) -m 0755 -D $(SKELETON_PKGDIR)/rdate \ - $(TARGET_DIR)/etc/network/if-up.d/rdate - $(SED) "s/TIMESERVERS/$(SKELETON_TARGET_GENERIC_TIMESERVER)/" \ - $(TARGET_DIR)/etc/network/if-up.d/rdate -endef -TARGET_FINALIZE_HOOKS += SYSTEM_TIMESERVER -endif ifneq ($(SKELETON_TARGET_GENERIC_HOSTNAME),) define SKELETON_SET_HOSTNAME @@ -176,28 +166,18 @@ endef SKELETON_NETWORK_DHCP_IFACE = $(call qstrip,$(BR2_SYSTEM_DHCP)) ifneq ($(SKELETON_NETWORK_DHCP_IFACE),) -ifeq ($(BR2_PACKAGE_WPA_SUPPLICANT),y) -SKELETON_IFACE_WPA_SUPPLICANT = \ - [[ "$(NETWORK_DHCP_IFACE)" == "wlan"* ]] && \ - echo " pre-up /etc/network/wlan_check up $(NETWORK_DHCP_IFACE) \"$(BR2_PACKAGE_WPA_SUPPLICANT_OPTIONS)\"" && \ - echo " pre-down /etc/network/wlan_check down $(NETWORK_DHCP_IFACE)"; -define SKELETON_INSTALL_WPA_CHECK - $(INSTALL) -m 0755 -D $(SKELETON_PKGDIR)/wlan_check \ - $(TARGET_DIR)/etc/network/wlan_check -endef -endif define SKELETON_SET_NETWORK_DHCP ( \ echo ; \ echo "auto $(SKELETON_NETWORK_DHCP_IFACE)"; \ echo "iface $(SKELETON_NETWORK_DHCP_IFACE) inet dhcp"; \ echo " pre-up /etc/network/nfs_check"; \ - $(SKELETON_IFACE_WPA_SUPPLICANT) \ echo " wait-delay 15"; \ ) >> $(TARGET_DIR)/etc/network/interfaces $(INSTALL) -m 0755 -D $(SKELETON_PKGDIR)/nfs_check \ $(TARGET_DIR)/etc/network/nfs_check - $(SKELETON_INSTALL_WPA_CHECK) + $(INSTALL) -m 0755 -D $(SKELETON_PKGDIR)/wait_iface \ + $(TARGET_DIR)/etc/network/if-pre-up.d/wait_iface endef endif @@ -207,7 +187,9 @@ define SKELETON_SET_NETWORK $(SKELETON_SET_NETWORK_DHCP) endef +ifeq ($(BR2_TARGET_GENERIC_NETWORK),y) TARGET_FINALIZE_HOOKS += SKELETON_SET_NETWORK +endif ifeq ($(BR2_TARGET_ENABLE_ROOT_LOGIN),y) ifeq ($(SKELETON_TARGET_GENERIC_ROOT_PASSWD),) diff --git a/package/skeleton/wait_iface b/package/skeleton/wait_iface new file mode 100755 index 000000000000..ebccff2aa58f --- /dev/null +++ b/package/skeleton/wait_iface @@ -0,0 +1,21 @@ +#!/bin/sh + +# In case we have a slow-to-appear interface (e.g. eth-over-USB), +# and we need to configure it, wait until it appears, but not too +# long either. IF_WAIT_DELAY is in seconds. + +if [ "${IF_WAIT_DELAY}" -a ! -e "/sys/class/net/${IFACE}" ]; then + printf "Waiting for interface %s to appear" "${IFACE}" + while [ ${IF_WAIT_DELAY} -gt 0 ]; do + if [ -e "/sys/class/net/${IFACE}" ]; then + printf "\n" + exit 0 + fi + sleep 1 + printf "." + : $((IF_WAIT_DELAY -= 1)) + done + printf " timeout!\n" + exit 1 +fi + diff --git a/package/skeleton/wlan_check b/package/skeleton/wlan_check deleted file mode 100755 index 661d88f77f26..000000000000 --- a/package/skeleton/wlan_check +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh - -# Checks if we are using a wlan interface and if wpa_supplicant is -# present. If so it will start/stop wpa_supplicant respectively - -if [ ! -f /usr/sbin/wpa_supplicant ]; then - exit 0 -fi - -updown=$1 -iface=$2 -opts=$3 - -if [[ "$iface" != "wlan"* ]]; then - exit 0 -fi - -case "$updown" in - *up*) - /usr/sbin/wpa_supplicant -B -i$iface $opts -c /etc/wpa_supplicant.conf - ;; - - *down*) - killall -q wpa_supplicant - ;; -esac From ef65596a868fd492eeb8dbe4e204e06796a10dd6 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:34:01 +0100 Subject: [PATCH 036/614] [wpa_supplicant] cleaning up example conf --- package/wpa_supplicant/wpa_supplicant.conf | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/package/wpa_supplicant/wpa_supplicant.conf b/package/wpa_supplicant/wpa_supplicant.conf index 1e65c6362ae7..66a962bc98f7 100644 --- a/package/wpa_supplicant/wpa_supplicant.conf +++ b/package/wpa_supplicant/wpa_supplicant.conf @@ -1,15 +1,2 @@ ctrl_interface=/var/run/wpa_supplicant -ctrl_interface_group=0 -fast_reauth=1 -update_config=1 ap_scan=1 - -network={ - ssid="MobileRasPi" - mode=2 - key_mgmt=WPA-PSK - proto=RSN - pairwise=CCMP - psk="12345678" - frequency=2412 -} From e77cc2122484b73f77648dd017124fa73680e329 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:34:34 +0100 Subject: [PATCH 037/614] [initscripts] support for non network handling --- package/initscripts/initscripts.mk | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/package/initscripts/initscripts.mk b/package/initscripts/initscripts.mk index cfee155570c2..f9ae193a7c78 100644 --- a/package/initscripts/initscripts.mk +++ b/package/initscripts/initscripts.mk @@ -4,9 +4,16 @@ # ################################################################################ +ifeq ($(BR2_TARGET_GENERIC_NETWORK),y) define INITSCRIPTS_INSTALL_TARGET_CMDS mkdir -p $(TARGET_DIR)/etc/init.d $(INSTALL) -D -m 0755 package/initscripts/init.d/* $(TARGET_DIR)/etc/init.d/ endef +else +define INITSCRIPTS_INSTALL_TARGET_CMDS + mkdir -p $(TARGET_DIR)/etc/init.d + $(INSTALL) -D -m 0755 package/initscripts/init.d/{rc?,S20urandom} $(TARGET_DIR)/etc/init.d/ +endef +endif $(eval $(generic-package)) From 188a125d3c5fd3faef42724204586fb0c685a90a Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:35:09 +0100 Subject: [PATCH 038/614] [rpi] cleaning up wifi config generate --- board/raspberrypi/post-build.sh | 26 +------------------------- 1 file changed, 1 insertion(+), 25 deletions(-) diff --git a/board/raspberrypi/post-build.sh b/board/raspberrypi/post-build.sh index 3de6f27d2930..7be694dd5d67 100755 --- a/board/raspberrypi/post-build.sh +++ b/board/raspberrypi/post-build.sh @@ -5,33 +5,9 @@ set -e echo "Post-build: processing $@" -for i in "$@" -do -case "$i" in - --rpi-wifi) - if ! grep -qE '^auto wlan0' "${TARGET_DIR}/etc/network/interfaces"; then - echo "Adding 'wlan0 network' functionality to /etc/network/interfaces." - cat << __EOF__ >> "${TARGET_DIR}/etc/network/interfaces" - -auto wlan0 -iface wlan0 inet dhcp - pre-up wpa_supplicant -Dnl80211 -iwlan0 -c/etc/wpa_supplicant.conf -B - down killall wpa_supplicant -__EOF__ - cat << __EOF__ > "${TARGET_DIR}/etc/wpa_supplicant.conf" -ctrl_interface=/var/run/wpa_supplicant -ap_scan=1 - -__EOF__ - fi - ;; -esac - -done - # Add a console on tty1 if [ -e ${TARGET_DIR}/etc/inittab ]; then - grep -qE '^tty1::' ${TARGET_DIR}/etc/inittab || \ + grep -qE '^tty1::' ${TARGET_DIR}/etc/inittab || \ sed -i '/GENERIC_SERIAL/a\ tty1::respawn:/sbin/getty -L tty1 0 vt100 # HDMI console' ${TARGET_DIR}/etc/inittab fi From 59f9f410534cb28aa29b4c0bf2927a92c6a6d937 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:35:56 +0100 Subject: [PATCH 039/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/S80WPEFramework | 12 ++++++------ package/wpe/wpeframework/wpeframework.mk | 21 ++++++++++++++------- 2 files changed, 20 insertions(+), 13 deletions(-) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index f7062852b8e9..2ecaa6c5b94f 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -7,16 +7,16 @@ start() { #echo "/root/cores/core-pid_%p--process%E" > /proc/sys/kernel/core_pattern #mkdir -p /root/cores #ulimit -c unlimited + mount -a + if [ ! -d /root/Netflix/dpi ]; then mkdir -p /root/Netflix/dpi ln -sfn /etc/playready /root/Netflix/dpi/playready fi - mount -a - export TZ=$(wget -qO- http://jsonip.metrological.com/ | sed -e 's/^.*"tz":"\([^"]*\)".*$/\1/') - - # needed for wayland/westeros/weston - export XDG_RUNTIME_DIR=/tmp - + + # needed for wayland/westeros/weston + export XDG_RUNTIME_DIR=/tmp + echo -n "Starting WPEFramework: " start-stop-daemon -S -q -b -m -p /var/run/WPEFramework.pid --exec /usr/bin/WPEFramework -- -b /dev/null 2>&1 [ $? == 0 ] && echo "OK" || echo "FAIL" diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index a7c0f8ed46af..bdad075a62fc 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 4627260736ba26c8b84045afe85d1291842bb90a +WPEFRAMEWORK_VERSION = 458bfe0cee4a7023b8d1d97aa16d3d22877f94b9 WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES @@ -78,22 +78,29 @@ endif WPEFRAMEWORK_CONF_OPTS += -DEXTERN_EVENTS="${WPEFRAMEWORK_EXTERN_EVENTS}" +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL),y) +define WPEFRAMEWORK_POST_TARGET_INITD + mkdir -p $(TARGET_DIR)/etc/init.d + $(INSTALL) -D -m 0755 $(WPEFRAMEWORK_PKGDIR)/S80WPEFramework $(TARGET_DIR)/etc/init.d/S40WPEFramework +endef +else define WPEFRAMEWORK_POST_TARGET_INITD - mkdir -p $(TARGET_DIR)/etc/init.d - $(INSTALL) -D -m 0755 $(WPEFRAMEWORK_PKGDIR)/S80WPEFramework $(TARGET_DIR)/etc/init.d + mkdir -p $(TARGET_DIR)/etc/init.d + $(INSTALL) -D -m 0755 $(WPEFRAMEWORK_PKGDIR)/S80WPEFramework $(TARGET_DIR)/etc/init.d endef +endif define WPEFRAMEWORK_POST_TARGET_REMOVE_STAGING_ARTIFACTS - mkdir -p $(TARGET_DIR)/etc/WPEFramework - rm -rf $(TARGET_DIR)/usr/share/WPEFramework/cmake + mkdir -p $(TARGET_DIR)/etc/WPEFramework + rm -rf $(TARGET_DIR)/usr/share/WPEFramework/cmake endef define WPEFRAMEWORK_POST_TARGET_REMOVE_HEADERS - rm -rf $(TARGET_DIR)/usr/include/WPEFramework + rm -rf $(TARGET_DIR)/usr/include/WPEFramework endef define WPEFRAMEWORK_POST_STAGING_CDM_HEADER - ln -sfn $(STAGING_DIR)/usr/include/WPEFramework/interfaces/IDRM.h $(STAGING_DIR)/usr/include/cdmi.h + ln -sfn $(STAGING_DIR)/usr/include/WPEFramework/interfaces/IDRM.h $(STAGING_DIR)/usr/include/cdmi.h endef ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDM),y) From 4dd1b74e8e4b54820f65149000fdea943f9d5470 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:36:20 +0100 Subject: [PATCH 040/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 1 + package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index a95060e3e424..11092fca5b12 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -120,6 +120,7 @@ endif config BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL + depends on !BR2_TARGET_GENERIC_NETWORK select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "NetworkControl" help diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index df7089f9bfe5..8af48af75813 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 735e582c2681b170d3a0b3ee2d3c9ee4cb4cd21e +WPEFRAMEWORK_PLUGINS_VERSION = 0d099f58b5fc0d7ae45e370c07b674c988d9cb55 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 58c267a19c0866b5009c803f01038ce5f9cefc62 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:36:41 +0100 Subject: [PATCH 041/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 788d1a34a379..1216b5cee8e8 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = e1472addc9b6100fea2eff9815638241c1cdccc2 +WPEWEBKIT_VERSION = ade3d874de4134d70fcd63ac2f6ca928667652b2 WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From b451e602663c238b133f78e13ab8a429a1b5d762 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:36:54 +0100 Subject: [PATCH 042/614] [rpi] cleaning up defconfigs --- configs/raspberrypi0_wpe_ml_defconfig | 3 +-- configs/raspberrypi2_wpe_ml_defconfig | 3 +-- configs/raspberrypi3-pitop_wpe_ml_defconfig | 3 +-- configs/raspberrypi3_wpe_ml_defconfig | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 0b01757f3756..c85dfb78e414 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -7,10 +7,10 @@ BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" # BR2_TARGET_GENERIC_GETTY is not set -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi0/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi0/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="--rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" @@ -83,7 +83,6 @@ BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 5288edf16dc0..d8b7fe1d9b88 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -9,10 +9,10 @@ BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" # BR2_TARGET_GENERIC_GETTY is not set -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi2/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi2/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="--i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" @@ -84,7 +84,6 @@ BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index bddbd7b44943..e995ea3866ed 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -9,10 +9,10 @@ BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" # BR2_TARGET_GENERIC_GETTY is not set -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --tvmode-dvi --overclock-pi3 --silent" @@ -86,7 +86,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_FULLHD=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index d71ea9e86dd5..d0f52e1dd1c8 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -9,10 +9,10 @@ BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" # BR2_TARGET_GENERIC_GETTY is not set -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi3 --silent" @@ -89,7 +89,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y From d41d77edd34f0355fdacf6147b7bdd999e80c081 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 20:42:44 +0100 Subject: [PATCH 043/614] [wpeframework-amazon] fix recursive dependency --- package/wpe/wpeframework-amazon/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-amazon/Config.in b/package/wpe/wpeframework-amazon/Config.in index 83391c063001..8d1c46b3b89d 100644 --- a/package/wpe/wpeframework-amazon/Config.in +++ b/package/wpe/wpeframework-amazon/Config.in @@ -1,6 +1,6 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_AMAZON + depends on BR2_PACKAGE_AMAZON bool "Amazon" - select BR2_PACKAGE_AMAZON help WPE Platform plugins that supports amazon services. From 9fa067423c749d843877cb2c68a7431ce30453ed Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 27 Feb 2018 21:31:04 +0100 Subject: [PATCH 044/614] [wpeframework] fix network event --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index bdad075a62fc..e1f218a47f96 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -68,7 +68,7 @@ WPEFRAMEWORK_EXTERN_EVENTS += Graphics endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL),y) -# WPEFRAMEWORK_EXTERN_EVENTS += Network +WPEFRAMEWORK_EXTERN_EVENTS += Network endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) From bddc12a9fb4952b4d067b98d32b44f4c124cf70d Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Tue, 27 Feb 2018 14:04:50 -0800 Subject: [PATCH 045/614] [westerosi] bump to latest --- package/westeros-simplebuffer/westeros-simplebuffer.mk | 2 +- package/westeros-simpleshell/westeros-simpleshell.mk | 2 +- package/westeros-soc/westeros-soc.mk | 2 +- package/westeros/westeros.mk | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index 8b0bbb4c82af..74546743b3b8 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = 80f0b6dcc7ea525b4bf9f3af1c361f865f5555af +WESTEROS_SIMPLEBUFFER_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 WESTEROS_SIMPLEBUFFER_SITE_METHOD = git WESTEROS_SIMPLEBUFFER_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index a8c8a7c84909..2365aee0a5a4 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = 80f0b6dcc7ea525b4bf9f3af1c361f865f5555af +WESTEROS_SIMPLESHELL_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 WESTEROS_SIMPLESHELL_SITE_METHOD = git WESTEROS_SIMPLESHELL_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index 8808f7ca56bf..187683fdbe87 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SOC_VERSION = 80f0b6dcc7ea525b4bf9f3af1c361f865f5555af +WESTEROS_SOC_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 WESTEROS_SOC_SITE_METHOD = git WESTEROS_SOC_SITE = git://github.com/Metrological/westeros WESTEROS_SOC_INSTALL_STAGING = YES diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index ccfced42241d..cfec7acb9eab 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_VERSION = 80f0b6dcc7ea525b4bf9f3af1c361f865f5555af +WESTEROS_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 WESTEROS_SITE_METHOD = git WESTEROS_SITE = git://github.com/Metrological/westeros WESTEROS_INSTALL_STAGING = YES From 02ff34d968c1336f3febe5809bddec11622c10ef Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Tue, 27 Feb 2018 14:05:06 -0800 Subject: [PATCH 046/614] [wpeframework-plugins] bump to latest --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 8af48af75813..0ca85c36b991 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 0d099f58b5fc0d7ae45e370c07b674c988d9cb55 +WPEFRAMEWORK_PLUGINS_VERSION = acd513df48f27e0c75ef4b484f65c827afdb88a3 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 330ffb29afb5494d82b35a227c776b315ad675e4 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 28 Feb 2018 18:00:18 +0100 Subject: [PATCH 047/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index e1f218a47f96..31e4d8937784 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 458bfe0cee4a7023b8d1d97aa16d3d22877f94b9 +WPEFRAMEWORK_VERSION = b2f339b87cfe4e59aca1389650be930e3b43da9f WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From faa72bf12a8a543b14a3c594134f7717e4153ce8 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 28 Feb 2018 18:00:36 +0100 Subject: [PATCH 048/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 0ca85c36b991..4993b3ba2f18 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = acd513df48f27e0c75ef4b484f65c827afdb88a3 +WPEFRAMEWORK_PLUGINS_VERSION = e69fd1bb144bdde5e7d169af4904667290b9f5d6 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From e6fb3603ed3ba5e64c7f503737c1682ea8890f9e Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Wed, 28 Feb 2018 19:26:04 -0800 Subject: [PATCH 049/614] [rpi02] enable network plugin --- configs/raspberrypi0_wpe_ml_defconfig | 1 + configs/raspberrypi2_wpe_ml_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index c85dfb78e414..2b2c535bcb80 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -66,6 +66,7 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index d8b7fe1d9b88..660e5eff6f10 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -67,6 +67,7 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" From 8177d6a610d70d60517b2e8fbde2c5b0f7d708c7 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 1 Mar 2018 08:19:22 +0100 Subject: [PATCH 050/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 31e4d8937784..91bce3523986 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = b2f339b87cfe4e59aca1389650be930e3b43da9f +WPEFRAMEWORK_VERSION = 3b9a8d87f77064bf13acd377ee19f93e6a1727ab WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From f3efc3f79c3e735e76fba29d83b7a976519b3464 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 2 Mar 2018 17:06:17 +0100 Subject: [PATCH 051/614] [rpi] cleaning up defconfigs --- configs/raspberrypi0_wpe_ml_defconfig | 7 ------- configs/raspberrypi2_wpe_ml_defconfig | 6 ------ configs/raspberrypi3_wpe_ml_defconfig | 7 ------- 3 files changed, 20 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 2b2c535bcb80..14c693282ed0 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -48,21 +48,16 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_NETFLIX_KEYMAP="PartnerBridge_BCM.js" BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y -BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -# BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y @@ -82,8 +77,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 660e5eff6f10..6abf1ba61980 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -51,9 +51,6 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_NETFLIX_KEYMAP="PartnerBridge_BCM.js" BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y @@ -63,7 +60,6 @@ BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -# BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y @@ -83,8 +79,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index d0f52e1dd1c8..409a2dc9eb3f 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -51,21 +51,16 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_NETFLIX_KEYMAP="PartnerBridge_BCM.js" BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y -BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -# BR2_PACKAGE_WPEFRAMEWORK_COMMANDER is not set BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" @@ -87,8 +82,6 @@ BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y From a809ed96c409c8b9e84224f8e2d4f96937f1b30d Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 2 Mar 2018 19:05:21 +0100 Subject: [PATCH 052/614] [bcm-refsw] added version 17.4 --- package/bcm-refsw/Config.in | 3 +++ package/bcm-refsw/bcm-refsw.mk | 6 ++++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 859bdc3783c0..c21f73e0a3b9 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -45,6 +45,9 @@ choice config BR2_PACKAGE_BCM_REFSW_17_2 bool "bcm-refsw 17.2" + config BR2_PACKAGE_BCM_REFSW_17_4 + bool "bcm-refsw 17.4" + endchoice choice diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 54f530ad63d9..7bbfb4f810d4 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -8,6 +8,8 @@ ifeq ($(BR2_PACKAGE_BCM_REFSW_13_1),y) BCM_REFSW_VERSION = 13.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_13_4),y) BCM_REFSW_VERSION = 13.4-1 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_15_2),y) +BCM_REFSW_VERSION = 15.2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_1),y) BCM_REFSW_VERSION = 16.1-3 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_2),y) @@ -20,8 +22,8 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) BCM_REFSW_VERSION = 17.1-2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_2),y) BCM_REFSW_VERSION = 17.2-1 -else ifeq ($(BR2_PACKAGE_BCM_REFSW_15_2),y) -BCM_REFSW_VERSION = 15.2 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) +BCM_REFSW_VERSION = 17.4-1 else BCM_REFSW_VERSION = 16.2-7 endif From 1095893fcd9353f6fa594ea1d8785a23ddf6b414 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 2 Mar 2018 20:51:18 +0100 Subject: [PATCH 053/614] [rpi-wifi-firmware] minimize size by only selecting rpi wifi firmware --- package/rpi-wifi-firmware/Config.in | 7 +------ .../rpi-wifi-firmware/rpi-wifi-firmware.hash | 2 +- .../rpi-wifi-firmware/rpi-wifi-firmware.mk | 19 +++++++------------ 3 files changed, 9 insertions(+), 19 deletions(-) diff --git a/package/rpi-wifi-firmware/Config.in b/package/rpi-wifi-firmware/Config.in index 2c87c758427d..da3ca7420165 100644 --- a/package/rpi-wifi-firmware/Config.in +++ b/package/rpi-wifi-firmware/Config.in @@ -1,10 +1,5 @@ config BR2_PACKAGE_RPI_WIFI_FIRMWARE bool "rpi-wifi-firmware" depends on BR2_arm || BR2_aarch64 - select BR2_PACKAGE_LINUX_FIRMWARE - select BR2_PACKAGE_LINUX_FIRMWARE_BRCM_BCM43XXX # runtime help - Raspberry Pi 3 and Zero W Broadcom BCM43430 wifi module - NVRAM data. - - https://github.com/RPi-Distro/firmware-nonfree/ + This package provides the wifi firmware for the Raspberry Pi diff --git a/package/rpi-wifi-firmware/rpi-wifi-firmware.hash b/package/rpi-wifi-firmware/rpi-wifi-firmware.hash index c20506536f3f..4fa54feb1b9b 100644 --- a/package/rpi-wifi-firmware/rpi-wifi-firmware.hash +++ b/package/rpi-wifi-firmware/rpi-wifi-firmware.hash @@ -1,2 +1,2 @@ # Locally calculated -sha256 872fde4f9942d9aba805880d6eaddfe050305626fd58ad955bfe77c04f6b75a5 brcmfmac43430-sdio.txt +sha256 506366f8608b11e130d8d9b79538f864cf5ff7d894eac4f3b49fcf856cd8f217 rpi-wifi-firmware-927fa8ebdf5bcfb90944465b40ec4981e01d6015.tar.gz diff --git a/package/rpi-wifi-firmware/rpi-wifi-firmware.mk b/package/rpi-wifi-firmware/rpi-wifi-firmware.mk index 6c855a8e149e..d607d70db110 100644 --- a/package/rpi-wifi-firmware/rpi-wifi-firmware.mk +++ b/package/rpi-wifi-firmware/rpi-wifi-firmware.mk @@ -4,20 +4,15 @@ # ################################################################################ -RPI_WIFI_FIRMWARE_VERSION = 54bab3d6a6d43239c71d26464e6e10e5067ffea7 -# brcmfmac43430-sdio.bin comes from linux-firmware -RPI_WIFI_FIRMWARE_SOURCE = brcmfmac43430-sdio.txt -# git repo contains a lot of unrelated files -RPI_WIFI_FIRMWARE_SITE = https://raw.githubusercontent.com/RPi-Distro/firmware-nonfree/$(RPI_WIFI_FIRMWARE_VERSION)/brcm80211/brcm -RPI_WIFI_FIRMWARE_LICENSE = PROPRIETARY - -define RPI_WIFI_FIRMWARE_EXTRACT_CMDS - cp $(DL_DIR)/$($(PKG)_SOURCE) $(@D)/ -endef +RPI_WIFI_FIRMWARE_VERSION = 927fa8ebdf5bcfb90944465b40ec4981e01d6015 +RPI_WIFI_FIRMWARE_SITE = $(call github,RPi-Distro,firmware-nonfree,$(RPI_WIFI_FIRMWARE_VERSION)) +RPI_WIFI_FIRMWARE_LICENSE = Proprietary +RPI_WIFI_FIRMWARE_LICENSE_FILES = LICENCE.broadcom_bcm43xx define RPI_WIFI_FIRMWARE_INSTALL_TARGET_CMDS - $(INSTALL) -D -m 0644 $(@D)/$(RPI_WIFI_FIRMWARE_SOURCE) \ - $(TARGET_DIR)/lib/firmware/brcm/$(RPI_WIFI_FIRMWARE_SOURCE) + $(INSTALL) -D -m 0644 $(@D)/brcm/brcmfmac43143.bin $(TARGET_DIR)/lib/firmware/brcm/brcmfmac43143.bin + $(INSTALL) -D -m 0644 $(@D)/brcm/brcmfmac43430-sdio.bin $(TARGET_DIR)/lib/firmware/brcm/brcmfmac43430-sdio.bin + $(INSTALL) -D -m 0644 $(@D)/brcm/brcmfmac43430-sdio.txt $(TARGET_DIR)/lib/firmware/brcm/brcmfmac43430-sdio.txt endef $(eval $(generic-package)) From e5858a8d01f43f8d6b1ec182e2190302fb16ce78 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Sun, 4 Mar 2018 13:18:14 +0100 Subject: [PATCH 054/614] [NETWORKTEST] Add a possibility to select the build of a network test tool. --- package/wpe/wpeframework-devtools/Config.in | 6 ++++++ .../wpe/wpeframework-devtools/wpeframework-devtools.mk | 8 ++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-devtools/Config.in b/package/wpe/wpeframework-devtools/Config.in index 2679cc2da4b2..53c523d15051 100644 --- a/package/wpe/wpeframework-devtools/Config.in +++ b/package/wpe/wpeframework-devtools/Config.in @@ -39,6 +39,12 @@ config BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER TestLoader is a verification and analyze tool for WPEFramework software and plugins. +config BR2_PACKAGE_WPEFRAMEWORK_NETWORKTEST + bool "NetworkTest" + help + NetworkTest is a verification and analyze tool for + WPEFramework software network functionality. + config BR2_PACKAGE_WPEFRAMEWORK_TEST_RPCLINK bool "RPC link test" help diff --git a/package/wpe/wpeframework-devtools/wpeframework-devtools.mk b/package/wpe/wpeframework-devtools/wpeframework-devtools.mk index 3fc4beac1719..9333ef115710 100644 --- a/package/wpe/wpeframework-devtools/wpeframework-devtools.mk +++ b/package/wpe/wpeframework-devtools/wpeframework-devtools.mk @@ -1,9 +1,13 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TEST_CYCLICINSPECTOR),y) -WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_CYCLICINSPECTOR=ON +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_APPS=ON -DWPEFRAMEWORK_TEST_CYCLICINSPECTOR=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER),y) -WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_LOADER=ON +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_APPS=ON -DWPEFRAMEWORK_TEST_LOADER=ON +endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKTEST),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_APPS=ON -DWPEFRAMEWORK_TEST_NETWORKTEST=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TEST_RPCLINK),y) From c940af27fadf14b598750b9a34f781e7d7c1646f Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 01:47:58 +0100 Subject: [PATCH 055/614] [iot-gate-rpi] add support for ralink wifi --- board/raspberrypi/rpi23-linux-4.9.config | 4 +++- configs/raspberrypi3_wpe_ml_defconfig | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index 8eadd6d837a5..ed96782d29b2 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -131,7 +131,9 @@ CONFIG_BRCMFMAC_USB=y # CONFIG_WLAN_VENDOR_INTERSIL is not set # CONFIG_WLAN_VENDOR_MARVELL is not set # CONFIG_WLAN_VENDOR_MEDIATEK is not set -# CONFIG_WLAN_VENDOR_RALINK is not set +CONFIG_RT2X00=m +CONFIG_RT2800USB=m +# CONFIG_RT2800USB_RT35XX is not set # CONFIG_WLAN_VENDOR_REALTEK is not set # CONFIG_WLAN_VENDOR_RSI is not set # CONFIG_WLAN_VENDOR_ST is not set diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 409a2dc9eb3f..c5b007a27547 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -54,6 +54,8 @@ BR2_PACKAGE_GST_OMX=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_LINUX_FIRMWARE=y +BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set From 221e36a465dc050e666d2dd37cb9db2b7ca7321e Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Tue, 6 Mar 2018 12:23:15 +0100 Subject: [PATCH 056/614] [WPEFRAMEWORK] Add a flag for WEBSOURCE dependency if WebServer is selected. --- package/wpe/wpeframework/wpeframework.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 91bce3523986..2cf4899d1a18 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -75,6 +75,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) WPEFRAMEWORK_EXTERN_EVENTS += Decryption endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) +WPEFRAMEWORK_EXTERN_EVENTS += WebSource +endif + WPEFRAMEWORK_CONF_OPTS += -DEXTERN_EVENTS="${WPEFRAMEWORK_EXTERN_EVENTS}" From dbbdf441eda4f3b1030dcc8e4cc5a28452b77bf0 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 13:21:32 +0100 Subject: [PATCH 057/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 2cf4899d1a18..98844c70ff0a 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 3b9a8d87f77064bf13acd377ee19f93e6a1727ab +WPEFRAMEWORK_VERSION = c3f36c139f22f12599e91a38be9c0160d5c32bea WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From 8eb2dfbea39f01e5ef231a0cb962e0241ea7760a Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 13:21:53 +0100 Subject: [PATCH 058/614] [wpeframework-provisioning] bump to latest version --- .../wpeframework-provisioning.mk | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk index 7a21e3fa23ba..4399170d904e 100644 --- a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk +++ b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk @@ -1,4 +1,10 @@ -WPEFRAMEWORK_PROVISIONING_VERSION = fe4ac5a92333019182e71c006f4077b7b220d4b3 +################################################################################ +# +# WPEFramework Provisioning +# +################################################################################ + +WPEFRAMEWORK_PROVISIONING_VERSION = e974a31a75b065a37da9f403ffef9a83499d8e5c WPEFRAMEWORK_PROVISIONING_SITE_METHOD = git WPEFRAMEWORK_PROVISIONING_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginProvisioning.git WPEFRAMEWORK_PROVISIONING_INSTALL_STAGING = YES From 8a08187d05700b78448b17c851ca569ca65b08f0 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 13:22:32 +0100 Subject: [PATCH 059/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 4993b3ba2f18..695cc8e078a4 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = e69fd1bb144bdde5e7d169af4904667290b9f5d6 +WPEFRAMEWORK_PLUGINS_VERSION = 40d700c6c71e1b65d34ea608a431379b27de76f8 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From a004b27eda13f30b63ecadb10b3b4c809292430a Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 13:36:44 +0100 Subject: [PATCH 060/614] [rpi23] linux defconfig add more network drivers --- board/raspberrypi/rpi23-linux-4.9.config | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index ed96782d29b2..1e1c86da3286 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -111,8 +111,9 @@ CONFIG_PPP_DEFLATE=y CONFIG_PPP_MPPE=y CONFIG_PPP_MULTILINK=y CONFIG_PPP_ASYNC=m +CONFIG_USB_RTL8152=m CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set +CONFIG_USB_NET_AX8817X=m # CONFIG_USB_NET_AX88179_178A is not set # CONFIG_USB_NET_CDCETHER is not set # CONFIG_USB_NET_CDC_NCM is not set @@ -121,6 +122,7 @@ CONFIG_USB_NET_SMSC95XX=y # CONFIG_USB_NET_CDC_SUBSET is not set # CONFIG_USB_NET_ZAURUS is not set CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_IPHETH=m # CONFIG_WLAN_VENDOR_ADMTEK is not set # CONFIG_WLAN_VENDOR_ATH is not set # CONFIG_WLAN_VENDOR_ATMEL is not set From 45ab0eba3eb8648d96d7201439f8669bbd58af69 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 14:56:11 +0100 Subject: [PATCH 061/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 98844c70ff0a..3de5dc126471 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = c3f36c139f22f12599e91a38be9c0160d5c32bea +WPEFRAMEWORK_VERSION = 9b758683f23d5d53ce1013cd6de9353ece4ed592 WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From 82c6569734f1975cbb6fc87fe0a3af06cdba1377 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 14:56:29 +0100 Subject: [PATCH 062/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 695cc8e078a4..ac8a09399547 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 40d700c6c71e1b65d34ea608a431379b27de76f8 +WPEFRAMEWORK_PLUGINS_VERSION = a21354132f622635e88801f1a5fa8c18d63891c1 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From f485c95efddf8908904120a122f5a9f2af682043 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:09:03 +0100 Subject: [PATCH 063/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 1216b5cee8e8..1e861acd42df 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = ade3d874de4134d70fcd63ac2f6ca928667652b2 +WPEWEBKIT_VERSION = 1f30a77bacc51eae73d557e827610bc3bea33d2f WPEWEBKIT_SITE = $(call github,WebPlatformForEmbedded,WPEWebKit,$(WPEWEBKIT_VERSION)) WPEWEBKIT_INSTALL_STAGING = YES From 8167091770fa97d17036a7a4f3ddbeac9deab8ce Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:09:21 +0100 Subject: [PATCH 064/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 3de5dc126471..b13e65f1c742 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 9b758683f23d5d53ce1013cd6de9353ece4ed592 +WPEFRAMEWORK_VERSION = daf750eade0a206267c9a23e487a0e35e67fdd93 WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From 963b424deffd87bebda27275546b61558198c67f Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:09:35 +0100 Subject: [PATCH 065/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index ac8a09399547..d14b059df679 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = a21354132f622635e88801f1a5fa8c18d63891c1 +WPEFRAMEWORK_PLUGINS_VERSION = 81e550313a429e0b46f06db930bc9c3c6a71d56d WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 815278058c5a549e67a8f5bbbaebf9fc4aea2e2e Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:09:53 +0100 Subject: [PATCH 066/614] [rpi23] cleaning up linux config --- board/raspberrypi/rpi23-linux-4.9.config | 1 - 1 file changed, 1 deletion(-) diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index 1e1c86da3286..64a0855bf67b 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -122,7 +122,6 @@ CONFIG_USB_NET_SMSC95XX=y # CONFIG_USB_NET_CDC_SUBSET is not set # CONFIG_USB_NET_ZAURUS is not set CONFIG_USB_NET_QMI_WWAN=m -CONFIG_USB_IPHETH=m # CONFIG_WLAN_VENDOR_ADMTEK is not set # CONFIG_WLAN_VENDOR_ATH is not set # CONFIG_WLAN_VENDOR_ATMEL is not set From 41a257983033b0bca52c90bcb4a489af3df3dc26 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:10:19 +0100 Subject: [PATCH 067/614] [iot-gate-rpi] initial defconfig --- configs/iot-gate-rpi_wpe_ml_defconfig | 100 ++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 configs/iot-gate-rpi_wpe_ml_defconfig diff --git a/configs/iot-gate-rpi_wpe_ml_defconfig b/configs/iot-gate-rpi_wpe_ml_defconfig new file mode 100644 index 000000000000..70e8a705a7af --- /dev/null +++ b/configs/iot-gate-rpi_wpe_ml_defconfig @@ -0,0 +1,100 @@ +BR2_arm=y +BR2_cortex_a7=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +# BR2_TARGET_GENERIC_GETTY is not set +BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --i2c --spi --tvmode-720 --overclock-pi3 --silent" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" +BR2_LINUX_KERNEL_PATCH="board/raspberrypi/0001-Adding-metrological-boot-logo.patch" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-cm3" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_GST_OMX=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_LINUX_FIRMWARE=y +BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y +BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="OSMCKeyMap.json" +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y +BR2_TARGET_ROOTFS_INITRAMFS=y +# BR2_TARGET_ROOTFS_TAR is not set From 93758d56953a8d56554a5973459459af78ea8a66 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 6 Mar 2018 22:37:44 +0100 Subject: [PATCH 068/614] [rpi] cleaning up console --- board/raspberrypi/post-build.sh | 7 ------- package/rpi-firmware/cmdline.txt | 2 +- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/board/raspberrypi/post-build.sh b/board/raspberrypi/post-build.sh index 7be694dd5d67..a9d171715d98 100755 --- a/board/raspberrypi/post-build.sh +++ b/board/raspberrypi/post-build.sh @@ -5,13 +5,6 @@ set -e echo "Post-build: processing $@" -# Add a console on tty1 -if [ -e ${TARGET_DIR}/etc/inittab ]; then - grep -qE '^tty1::' ${TARGET_DIR}/etc/inittab || \ - sed -i '/GENERIC_SERIAL/a\ -tty1::respawn:/sbin/getty -L tty1 0 vt100 # HDMI console' ${TARGET_DIR}/etc/inittab -fi - BOARD_DIR="$(dirname $0)" # Add Gstreamer software based AC3 Decoder diff --git a/package/rpi-firmware/cmdline.txt b/package/rpi-firmware/cmdline.txt index 2b1a7a984cf7..dc191a34c738 100644 --- a/package/rpi-firmware/cmdline.txt +++ b/package/rpi-firmware/cmdline.txt @@ -1 +1 @@ -root=/dev/mmcblk0p2 rootwait console=tty1 console=ttyAMA0,115200 quiet +root=/dev/mmcblk0p2 rootwait console=ttyAMA0,115200 quiet From 9a74e58f95c9fa62d24c190f76fc7e67ee7af7da Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 00:16:30 +0100 Subject: [PATCH 069/614] [rpi] new boot page --- board/raspberrypi/index.html | 298 ++++++++++++++++++++++++++++------- 1 file changed, 238 insertions(+), 60 deletions(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index 18a3a708dd23..61419978b870 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -1,72 +1,250 @@ - - - Metrological - + +WPE + - -
No IP available
- + socket.onopen = () => { + delay(2000) + .then(interfaces) + .then((interfaces) => { + return new Promise((resolve, reject) => { + if (interfaces.length > 0) { + statusEl.innerHTML = 'Hello'; + return resolve(interfaces); + } + statusEl.innerHTML = 'Activating WiFi'; + wpe(['PUT', '/Controller/Activate/WifiControl']).catch(reject); + }); + }) + .then(log) + .catch(reject); + }; + socket.onerror = (err) => { + reject(err); + }; + socket.onclose = () => { + reject('Connection lost'); + }; + }); + }(location.hostname, 'eth0', 'wlan0')).catch(console.error); + From e890a1adbea9aa51a0d8146ec57cd4dad368be64 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 00:16:51 +0100 Subject: [PATCH 070/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 10 +++++++++- .../wpe/wpeframework-plugins/wpeframework-plugins.mk | 5 ++++- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 11092fca5b12..f628c2378d9a 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -318,12 +318,20 @@ config BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY help WebProxy Plugin -config BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER +menuconfig BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "WebServer" help WebServer Plugin +if BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER + +config BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH + string "path" + default "/www" + +endif + config BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "WebShell" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index d14b059df679..9ac782ac79f7 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 81e550313a429e0b46f06db930bc9c3c6a71d56d +WPEFRAMEWORK_PLUGINS_VERSION = fd2679456c0c1ee40fff4ac765cd8d5e7341f2a9 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES @@ -170,6 +170,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSERVER=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_WEBSERVER_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH) +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL),y) From 1bf560224dadffb5dcebd14f644864497083072f Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 09:11:54 +0100 Subject: [PATCH 071/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 9ac782ac79f7..096513b1541d 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = fd2679456c0c1ee40fff4ac765cd8d5e7341f2a9 +WPEFRAMEWORK_PLUGINS_VERSION = 46eaa3dcc1679132da934b62d3b46d1bd8b0efba WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES From 6cf8359bb2528845e30ff6c9cc2cedf525426ab8 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 09:12:09 +0100 Subject: [PATCH 072/614] [rpi] cleaning up index.html --- board/raspberrypi/index.html | 43 +++++++----------------------------- 1 file changed, 8 insertions(+), 35 deletions(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index 61419978b870..be1f2d4dc737 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -5,23 +5,20 @@ WPE -
Hello
lo: 127.0.0.1
@@ -224,16 +207,6 @@ socket.onopen = () => { delay(2000) .then(interfaces) - .then((interfaces) => { - return new Promise((resolve, reject) => { - if (interfaces.length > 0) { - statusEl.innerHTML = 'Hello'; - return resolve(interfaces); - } - statusEl.innerHTML = 'Activating WiFi'; - wpe(['PUT', '/Controller/Activate/WifiControl']).catch(reject); - }); - }) .then(log) .catch(reject); }; From cbeb1da2b895e9e9cf6d69b4c06890b11e5e5810 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 09:12:38 +0100 Subject: [PATCH 073/614] [rpi] use 127.0.0.1 instead of localhost in defconfig --- configs/raspberrypi0_wpe_ml_defconfig | 2 +- configs/raspberrypi2_wpe_ml_defconfig | 2 +- configs/raspberrypi3_wpe_ml_defconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 14c693282ed0..7d095bddcaad 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -69,7 +69,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:150m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 6abf1ba61980..15805efc96d9 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -71,7 +71,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index c5b007a27547..fc41034f12c2 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -74,7 +74,7 @@ BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y From 19e8aaf08590988e5525ae66532fcd5dbc5e7165 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 21:18:06 +0100 Subject: [PATCH 074/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index b13e65f1c742..108512e26753 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = daf750eade0a206267c9a23e487a0e35e67fdd93 +WPEFRAMEWORK_VERSION = 08a26274fa79ea3e89c43073708441c4cbd85f1f WPEFRAMEWORK_SITE_METHOD = git WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git WPEFRAMEWORK_INSTALL_STAGING = YES From 4bf3385c94d88ec14643426f206d168772a8a5bb Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 7 Mar 2018 21:18:20 +0100 Subject: [PATCH 075/614] [wpeframework-plugins] bump to latest version --- .../wpeframework-plugins.mk | 34 +++++++++---------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 096513b1541d..8d707fdccc7b 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 46eaa3dcc1679132da934b62d3b46d1bd8b0efba +WPEFRAMEWORK_PLUGINS_VERSION = 7c71b865a3a9df453b7c598558e5d3b44cffdc14 WPEFRAMEWORK_PLUGINS_SITE_METHOD = git WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES @@ -61,22 +61,22 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETWORKCONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI=ON - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_AUTOSTART=true - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_OOP=true - ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY),y) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_CLEARKEY=ON - endif - ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY),y) - ifeq ($(BR2_PACKAGE_PLAYREADY),y) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY=ON - else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_NEXUS=ON - endif - endif - ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE),y) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_WIDEVINE=ON - endif +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_AUTOSTART=true +#WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_OOP=true +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_CLEARKEY=ON +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY),y) +ifeq ($(BR2_PACKAGE_PLAYREADY),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY=ON +else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_NEXUS=ON +endif +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_WIDEVINE=ON +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL),y) From 9c7339d81600e86436b868010f9b79d3808f5d31 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 8 Mar 2018 13:28:36 +0100 Subject: [PATCH 076/614] [rpi] add colors to wpe logo --- board/raspberrypi/index.html | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index be1f2d4dc737..8d2a2ee69832 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -34,7 +34,6 @@ .logo div { width: 45%; height: 45%; - background: rgba(255, 255, 255, 0.7); opacity: 0; animation: fade 3s linear infinite; } @@ -42,12 +41,14 @@ position: absolute; top: 2.5%; left: 2.5%; + background-color: #3399ff; } .logo div:nth-of-type(2) { position: absolute; top: 2.5%; right: 2.5%; animation-delay: -0.15s; + background-color: #003366; } .logo div:nth-of-type(3) { @@ -55,12 +56,14 @@ bottom: 2.5%; right: -47.5%; animation-delay: -0.5s; + background-color: #006600; } .logo div:nth-of-type(4) { position: absolute; bottom: 2.5%; left: 2.5%; animation-delay: -0.65s; + background-color: #3366cc; } .logo div:nth-of-type(5) { @@ -68,6 +71,7 @@ bottom: -47.5%; right: -47.5%; animation-delay: -0.25s; + background-color: #003300; } .logo div:nth-of-type(6) { @@ -75,6 +79,7 @@ bottom: -47.5%; right: 2.5%; animation-delay: -0.35s; + background-color: #66cc33; } div#status { From 5bca07ec4c0a5d573355dde5803d5ed887dc5a92 Mon Sep 17 00:00:00 2001 From: Wouter Meek Date: Thu, 8 Mar 2018 15:17:34 +0100 Subject: [PATCH 077/614] [buildroot] update readme --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index c123f71b3b55..2418ae5a39d0 100644 --- a/README.md +++ b/README.md @@ -56,7 +56,7 @@ http://:9998/ WPE is verified and being tested by Metrological on the following devices: - - Raspberry Pi zero, 1 and 2 + - Raspberry Pi zero, 1, 2 and 3 - Broadcom chipsets (7430/7435) MIPS and (7252/7445) ARM - Intel CE (4100/4200) - nVidia Jetson TK1 From 09cf63dd82da875907d6dc7129a8db69d9f2f82c Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 8 Mar 2018 15:37:32 +0100 Subject: [PATCH 078/614] [bcmrefsw] 17.4 support --- package/bcm-refsw/bcm-refsw.mk | 208 +----------------------------- package/bcm-refsw/platforms.inc | 57 ++++++++ package/bcm-refsw/wayland-egl.inc | 140 ++++++++++++++++++++ 3 files changed, 203 insertions(+), 202 deletions(-) create mode 100644 package/bcm-refsw/platforms.inc create mode 100644 package/bcm-refsw/wayland-egl.inc diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 7bbfb4f810d4..e8c96b2510bb 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -41,64 +41,8 @@ ifeq ($(BR2_PACKAGE_WESTEROS),y) BCM_REFSW_DEPENDENCIES += wayland endif -ifeq ($(BR2_arm),y) -ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7437),y) -BCM_REFSW_PLATFORM = 974371 -BCM_REFSW_PLATFORM_VC = v3d -BCM_REFSW_PLATFORM_REV = A0 -BCM_REFSW_BCHP_CHIP = 7437 -BCM_REFSW_BCHP_VER_LOWER = a0 -BCM_REFSW_MAKE_ENV += \ - NEXUS_USE_74371_XID="y" -else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7271),y) -BCM_REFSW_PLATFORM = 97271 -BCM_REFSW_PLATFORM_REV = B0 -BCM_REFSW_PLATFORM_VC = vc5 -BCM_REFSW_BCHP_CHIP = 7271 -BCM_REFSW_BCHP_VER_LOWER = b0 -else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_72604),y) -BCM_REFSW_PLATFORM = 97260 -BCM_REFSW_PLATFORM_REV = A0 -BCM_REFSW_PLATFORM_VC = vc5 -BCM_REFSW_BCHP_VER_LOWER = a0 -else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7250),y) -BCM_REFSW_PLATFORM = 97250 -BCM_REFSW_PLATFORM_REV = B0 -BCM_REFSW_PLATFORM_VC = vc5 -BCM_REFSW_BCHP_CHIP = 7250 -BCM_REFSW_BCHP_VER_LOWER = b0 -BCM_REFSW_MAKE_ENV += NEXUS_USE_7250_SV=y -else -BCM_REFSW_PLATFORM = 97439 -BCM_REFSW_PLATFORM_REV = B0 -BCM_REFSW_MAKE_ENV += NEXUS_USE_7439_SFF=y -BCM_REFSW_PLATFORM_VC = vc5 -BCM_REFSW_BCHP_CHIP = 7439 -BCM_REFSW_BCHP_VER_LOWER = b0 -endif -BCM_REFSW_MAKE_ENV += \ - NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE -else ifeq ($(BR2_mipsel),y) -ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7425),y) -BCM_REFSW_PLATFORM = 97425 -BCM_REFSW_PLATFORM_REV = B2 -BCM_REFSW_MAKE_ENV += \ - NEXUS_USE_7425_VMS_SFF=y \ - NEXUS_USE_FRONTEND_DAUGHTER_CARD=y -else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7428),y) -BCM_REFSW_PLATFORM = 97428 -BCM_REFSW_PLATFORM_REV = B0 -else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7429),y) -BCM_REFSW_PLATFORM = 97429 -BCM_REFSW_PLATFORM_REV = B0 -else -BCM_REFSW_PLATFORM = 97429 -BCM_REFSW_PLATFORM_REV = B0 -endif -BCM_REFSW_PLATFORM_VC = v3d -BCM_REFSW_MAKE_ENV += NEXUS_ENDIAN=BSTD_ENDIAN_BIG -endif - +# SOC related info +include package/bcm-refsw/platforms.inc ifeq ($(BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_14),y) BCM_PMLIB_VERSION = 314 @@ -168,6 +112,7 @@ define BCM_REFSW_BUILD_NEXUS endef define BCM_REFSW_BUILD_VCX + $(TARGET_CONFIGURE_OPTS) \ $(TARGET_MAKE_ENV) \ $(BCM_REFSW_CONF_OPTS) \ @@ -235,146 +180,7 @@ endif # wayland-egl is needed only for westeros ifeq ($(BR2_PACKAGE_WESTEROS),y) -WAYLAND_EGL_DIR=${BCM_REFSW_VCX}/platform/wayland/ -define BCM_REFSW_BUILD_WAYLAND_EGL - $(TARGET_CONFIGURE_OPTS) \ - $(TARGET_MAKE_ENV) \ - $(BCM_REFSW_CONF_OPTS) \ - $(BCM_REFSW_MAKE_ENV) \ - $(MAKE) -C $(WAYLAND_EGL_DIR) -f wayland_nexus_protocol.mk \ - WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ - APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ - APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include - - $(TARGET_CONFIGURE_OPTS) \ - $(TARGET_MAKE_ENV) \ - $(BCM_REFSW_CONF_OPTS) \ - $(BCM_REFSW_MAKE_ENV) \ - $(MAKE) -C $(WAYLAND_EGL_DIR) -f wayland_egl.mk \ - WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ - APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ - APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include - - $(TARGET_CONFIGURE_OPTS) \ - $(TARGET_MAKE_ENV) \ - $(BCM_REFSW_CONF_OPTS) \ - $(BCM_REFSW_MAKE_ENV) \ - $(MAKE) -C $(WAYLAND_EGL_DIR) -f platform_wayland_server.mk \ - WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ - APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ - APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include - - $(TARGET_CONFIGURE_OPTS) \ - $(TARGET_MAKE_ENV) \ - $(BCM_REFSW_CONF_OPTS) \ - $(BCM_REFSW_MAKE_ENV) \ - $(MAKE) -C $(WAYLAND_EGL_DIR) -f platform_wayland_client.mk \ - WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ - APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ - APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include -endef - -ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) -define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/interface/khronos/include/ - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract/ - - ln -sf ../../../EGL $(STAGING_DIR)/usr/include/interface/khronos/include/ - ln -sf ../../../GLES $(STAGING_DIR)/usr/include/interface/khronos/include/ - ln -sf ../../../GLES2 $(STAGING_DIR)/usr/include/interface/khronos/include/ - ln -sf ../helpers $(STAGING_DIR)/usr/include/interface/khronos/include/ - - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.h $(STAGING_DIR)/usr/include/interface/khronos/include - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/khrn/egl/platform/bcg_abstract/*.h $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/bcg_abstract/*.h $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/*.h $(STAGING_DIR)/usr/include/interface/khronos/include - - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/include - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/posix - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/gcc - - $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/include/*.h $(STAGING_DIR)/usr/include/vcos/include - $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/posix/*.h $(STAGING_DIR)/usr/include/vcos/posix - $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/gcc/*.h $(STAGING_DIR)/usr/include/vcos/gcc - - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/util - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/util/log - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/core - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/core/v3d - - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/util/*.h $(STAGING_DIR)/usr/include/libs/util - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/util/log/*.h $(STAGING_DIR)/usr/include/libs/util/log - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/v3d/*.h $(STAGING_DIR)/usr/include/libs/core/v3d - - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/gmem.inl $(STAGING_DIR)/usr/include/interface/khronos/include - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/bcg_abstract/gmem_plat.inl $(STAGING_DIR)/usr/include/interface/khronos/include - - #$(INSTALL) the c file for wayland-egl building usage. - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/display_nexus.c $(STAGING_DIR)/usr/share/wayland-egl - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.c $(STAGING_DIR)/usr/share/wayland-egl/nexus - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.h $(STAGING_DIR)/usr/share/wayland-egl/nexus - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/common/*.c $(STAGING_DIR)/usr/share/wayland-egl/common - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/common/*.h $(STAGING_DIR)/usr/share/wayland-egl/common - - if [ -e $(@D)/trellis/display/weston/include/EGL/eglext.h ]; then \ - $(INSTALL) -m 0755 $(@D)/trellis/display/weston/include/EGL/eglext.h $(STAGING_DIR)/usr/include/EGL; \ - $(INSTALL) -m 0755 $(@D)/trellis/display/weston/include/EGL/eglext_brcm.h $(STAGING_DIR)/usr/include/EGL; \ - fi - if [ -e $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_common.h ]; then \ - $(INSTALL) -m 0755 $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_common.h $(STAGING_DIR)/usr/include; \ - fi - if [ -e $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_v3d_hub_ctl.h ]; then \ - $(INSTALL) -m 0755 $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_v3d_hub_ctl.h $(STAGING_DIR)/usr/include; \ - fi -endef -else -define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU - #$(INSTALL) the c file for wayland-egl building usage. - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/nexus/*.c $(STAGING_DIR)/usr/share/wayland-egl/nexus - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/common/*.c $(STAGING_DIR)/usr/share/wayland-egl/common - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/nexus/*.h $(STAGING_DIR)/usr/share/wayland-egl - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/common/*.h $(STAGING_DIR)/usr/share/wayland-egl -endef -endif - -define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL - $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/*.so $(STAGING_DIR)/usr/lib - $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/libbcm_wayland_egl.so $(STAGING_DIR)/usr/lib/libwayland-egl.so - $(INSTALL) -m 644 package/bcm-refsw/${BCM_REFSW_PLATFORM_VC}/wayland-egl.pc $(STAGING_DIR)/usr/lib/pkgconfig/ - $(INSTALL) -m 644 $(WAYLAND_EGL_DIR)/autogen/*.h $(STAGING_DIR)/usr/include/refsw/ - - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/common - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/nexus - - $(call BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU,$(STAGING_DIR)) - - #$(INSTALL) the c file for wayland-egl, cube/earth_es2 building usage. - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/nxclient - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/common - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/cube - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 - $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/bin/textures - $(INSTALL) -m 0644 $(@D)/nexus/nxclient/server/*.h $(STAGING_DIR)/usr/include/nxclient - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/common/* $(STAGING_DIR)/usr/share/wayland-egl/common - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/cube/cube.c $(STAGING_DIR)/usr/share/wayland-egl/cube - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/*.c $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/*.h $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 - $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/textures/* $(STAGING_DIR)/usr/bin/textures - - $(INSTALL) -m 0755 $(@D)/BSEAV/lib/utils/*.h $(STAGING_DIR)/usr/include - - $(INSTALL) -m 0644 $(@D)/rockford/lib/psip/include/*.h $(STAGING_DIR)/usr/include - $(INSTALL) -m 0644 $(@D)/nexus/lib/playback_ip/include/*.h $(STAGING_DIR)/usr/include - $(INSTALL) -m 0644 $(@D)/BSEAV/lib/tshdrbuilder/*.h $(STAGING_DIR)/usr/include -endef - -define BCM_REFSW_INSTALL_TARGET_WAYLAND_EGL - $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/*.so $(TARGET_DIR)/usr/lib -endef + include package/bcm-refsw/wayland-egl.inc endif define BCM_REFSW_INSTALL_LIBS @@ -463,7 +269,7 @@ define BCM_REFSW_INSTALL_STAGING_CMDS $(INSTALL) -m 644 $(BCM_REFSW_BIN)/include/platform_app.inc $(STAGING_DIR)/usr/include/ $(INSTALL) -m 644 ${BCM_REFSW_VCX}/platform/nexus/*.h $(STAGING_DIR)/usr/include/refsw/ $(INSTALL) -m 644 -D $(BCM_REFSW_BIN)/libnxserver.a $(STAGING_DIR)/usr/lib/libnxserver.a -if [ $(shell expr $(BCM_REFSW_VERSION) \>= 17.1) = 1 ]; then \ +if [ $(shell expr $(BCM_REFSW_VERSION) \>= 17.1)$(shell expr $(BCM_REFSW_VERSION) \<= 17.2) = 11 ]; then \ $(INSTALL) -m 644 $(BCM_REFSW_OUTPUT)/nexus/bin/nexus_kernel_include/*.h $(STAGING_DIR)/usr/include/refsw ; \ fi $(call BCM_REFSW_INSTALL_KHRONOS,$(STAGING_DIR)) @@ -479,15 +285,13 @@ define BCM_REFSW_INSTALL_TARGET_CMDS $(INSTALL) -D -m 755 package/bcm-refsw/S11nexus $(TARGET_DIR)/etc/init.d/S11nexus $(call BCM_REFSW_INSTALL_EXTRA,$(TARGET_DIR)) $(call BCM_REFSW_INSTALL_LIBS,$(TARGET_DIR)) -if [ $(shell expr $(BCM_REFSW_VERSION) \>= 17.1) = 1 ]; then \ +if [ $(shell expr $(BCM_REFSW_VERSION) \>= 17.1)$(shell expr $(BCM_REFSW_VERSION) \<= 17.2) = 11 ]; then \ $(INSTALL) -m 644 $(BCM_REFSW_OUTPUT)/nexus/lib/b_os/libb_os.so $(TARGET_DIR)/usr/lib; \ fi $(call BCM_REFSW_INSTALL_TARGET_NXSERVER,$(TARGET_DIR)) $(call BCM_REFSW_INSTALL_TARGET_EGLCUBE,$(TARGET_DIR)) $(call BCM_REFSW_INSTALL_SAGE_BIN,$(TARGET_DIR)) $(call BCM_REFSW_INSTALL_TARGET_WAYLAND_EGL,$(TARGET_DIR)) - endef $(eval $(generic-package)) - diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc new file mode 100644 index 000000000000..1adde60952e4 --- /dev/null +++ b/package/bcm-refsw/platforms.inc @@ -0,0 +1,57 @@ +ifeq ($(BR2_arm),y) +ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7437),y) +BCM_REFSW_PLATFORM = 974371 +BCM_REFSW_PLATFORM_VC = v3d +BCM_REFSW_PLATFORM_REV = A0 +BCM_REFSW_BCHP_CHIP = 7437 +BCM_REFSW_BCHP_VER_LOWER = a0 +BCM_REFSW_MAKE_ENV += \ + NEXUS_USE_74371_XID="y" +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7271),y) +BCM_REFSW_PLATFORM = 97271 +BCM_REFSW_PLATFORM_REV = B0 +BCM_REFSW_PLATFORM_VC = vc5 +BCM_REFSW_BCHP_CHIP = 7271 +BCM_REFSW_BCHP_VER_LOWER = b0 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_72604),y) +BCM_REFSW_PLATFORM = 97260 +BCM_REFSW_PLATFORM_REV = A0 +BCM_REFSW_PLATFORM_VC = vc5 +BCM_REFSW_BCHP_VER_LOWER = a0 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7250),y) +BCM_REFSW_PLATFORM = 97250 +BCM_REFSW_PLATFORM_REV = B0 +BCM_REFSW_PLATFORM_VC = vc5 +BCM_REFSW_BCHP_CHIP = 7250 +BCM_REFSW_BCHP_VER_LOWER = b0 +BCM_REFSW_MAKE_ENV += NEXUS_USE_7250_SV=y +else +BCM_REFSW_PLATFORM = 97439 +BCM_REFSW_PLATFORM_REV = B0 +BCM_REFSW_MAKE_ENV += NEXUS_USE_7439_SFF=y +BCM_REFSW_PLATFORM_VC = vc5 +BCM_REFSW_BCHP_CHIP = 7439 +BCM_REFSW_BCHP_VER_LOWER = b0 +endif +BCM_REFSW_MAKE_ENV += \ + NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE +else ifeq ($(BR2_mipsel),y) +ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7425),y) +BCM_REFSW_PLATFORM = 97425 +BCM_REFSW_PLATFORM_REV = B2 +BCM_REFSW_MAKE_ENV += \ + NEXUS_USE_7425_VMS_SFF=y \ + NEXUS_USE_FRONTEND_DAUGHTER_CARD=y +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7428),y) +BCM_REFSW_PLATFORM = 97428 +BCM_REFSW_PLATFORM_REV = B0 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7429),y) +BCM_REFSW_PLATFORM = 97429 +BCM_REFSW_PLATFORM_REV = B0 +else +BCM_REFSW_PLATFORM = 97429 +BCM_REFSW_PLATFORM_REV = B0 +endif +BCM_REFSW_PLATFORM_VC = v3d +BCM_REFSW_MAKE_ENV += NEXUS_ENDIAN=BSTD_ENDIAN_BIG +endif \ No newline at end of file diff --git a/package/bcm-refsw/wayland-egl.inc b/package/bcm-refsw/wayland-egl.inc new file mode 100644 index 000000000000..d8cedb77a46d --- /dev/null +++ b/package/bcm-refsw/wayland-egl.inc @@ -0,0 +1,140 @@ +WAYLAND_EGL_DIR=${BCM_REFSW_VCX}/platform/wayland/ +define BCM_REFSW_BUILD_WAYLAND_EGL + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(WAYLAND_EGL_DIR) -f wayland_nexus_protocol.mk \ + WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ + APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ + APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include + + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(WAYLAND_EGL_DIR) -f wayland_egl.mk \ + WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ + APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ + APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include + + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(WAYLAND_EGL_DIR) -f platform_wayland_server.mk \ + WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ + APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ + APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include + + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(WAYLAND_EGL_DIR) -f platform_wayland_client.mk \ + WAYLAND_SCANNER=${HOST_DIR}/usr/bin/wayland-scanner \ + APPLIBS_TARGET_LIB_DIR=${BCM_REFSW_BIN} \ + APPLIBS_TARGET_INC_DIR=${BCM_REFSW_BIN}/include +endef + +ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) +define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/interface/khronos/include/ + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract/ + + ln -sf ../../../EGL $(STAGING_DIR)/usr/include/interface/khronos/include/ + ln -sf ../../../GLES $(STAGING_DIR)/usr/include/interface/khronos/include/ + ln -sf ../../../GLES2 $(STAGING_DIR)/usr/include/interface/khronos/include/ + ln -sf ../helpers $(STAGING_DIR)/usr/include/interface/khronos/include/ + + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.h $(STAGING_DIR)/usr/include/interface/khronos/include + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/khrn/egl/platform/bcg_abstract/*.h $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/bcg_abstract/*.h $(STAGING_DIR)/usr/include/interface/khronos/include/bcg_abstract + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/*.h $(STAGING_DIR)/usr/include/interface/khronos/include + + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/include + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/posix + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/vcos/gcc + + $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/include/*.h $(STAGING_DIR)/usr/include/vcos/include + $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/posix/*.h $(STAGING_DIR)/usr/include/vcos/posix + $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/vcos/gcc/*.h $(STAGING_DIR)/usr/include/vcos/gcc + + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/util + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/util/log + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/core + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/libs/core/v3d + + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/util/*.h $(STAGING_DIR)/usr/include/libs/util + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/util/log/*.h $(STAGING_DIR)/usr/include/libs/util/log + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/core/v3d/*.h $(STAGING_DIR)/usr/include/libs/core/v3d + + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/gmem.inl $(STAGING_DIR)/usr/include/interface/khronos/include + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/driver/libs/platform/bcg_abstract/gmem_plat.inl $(STAGING_DIR)/usr/include/interface/khronos/include + + #$(INSTALL) the c file for wayland-egl building usage. + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/display_nexus.c $(STAGING_DIR)/usr/share/wayland-egl + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.c $(STAGING_DIR)/usr/share/wayland-egl/nexus + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/nexus/*.h $(STAGING_DIR)/usr/share/wayland-egl/nexus + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/common/*.c $(STAGING_DIR)/usr/share/wayland-egl/common + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/vc5/platform/common/*.h $(STAGING_DIR)/usr/share/wayland-egl/common + + if [ -e $(@D)/trellis/display/weston/include/EGL/eglext.h ]; then \ + $(INSTALL) -m 0755 $(@D)/trellis/display/weston/include/EGL/eglext.h $(STAGING_DIR)/usr/include/EGL; \ + $(INSTALL) -m 0755 $(@D)/trellis/display/weston/include/EGL/eglext_brcm.h $(STAGING_DIR)/usr/include/EGL; \ + fi + if [ -e $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_common.h ]; then \ + $(INSTALL) -m 0755 $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_common.h $(STAGING_DIR)/usr/include; \ + fi + if [ -e $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_v3d_hub_ctl.h ]; then \ + $(INSTALL) -m 0755 $(@D)/magnum/basemodules/chp/include/${BCM_REFSW_BCHP_CHIP}/rdb/${BCM_REFSW_BCHP_VER_LOWER}/bchp_v3d_hub_ctl.h $(STAGING_DIR)/usr/include; \ + fi +endef +else +define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU + #$(INSTALL) the c file for wayland-egl building usage. + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/nexus/*.c $(STAGING_DIR)/usr/share/wayland-egl/nexus + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/common/*.c $(STAGING_DIR)/usr/share/wayland-egl/common + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/nexus/*.h $(STAGING_DIR)/usr/share/wayland-egl + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/v3d/platform/common/*.h $(STAGING_DIR)/usr/share/wayland-egl +endef +endif + +define BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL + $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/*.so $(STAGING_DIR)/usr/lib + $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/libbcm_wayland_egl.so $(STAGING_DIR)/usr/lib/libwayland-egl.so + $(INSTALL) -m 644 package/bcm-refsw/${BCM_REFSW_PLATFORM_VC}/wayland-egl.pc $(STAGING_DIR)/usr/lib/pkgconfig/ + $(INSTALL) -m 644 $(WAYLAND_EGL_DIR)/autogen/*.h $(STAGING_DIR)/usr/include/refsw/ + + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/common + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/nexus + + $(call BCM_REFSW_INSTALL_STAGING_WAYLAND_EGL_GPU,$(STAGING_DIR)) + + #$(INSTALL) the c file for wayland-egl, cube/earth_es2 building usage. + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/include/nxclient + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/common + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/cube + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 + $(INSTALL) -d -m 0755 $(STAGING_DIR)/usr/bin/textures + $(INSTALL) -m 0644 $(@D)/nexus/nxclient/server/*.h $(STAGING_DIR)/usr/include/nxclient + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/common/* $(STAGING_DIR)/usr/share/wayland-egl/common + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/cube/cube.c $(STAGING_DIR)/usr/share/wayland-egl/cube + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/*.c $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/*.h $(STAGING_DIR)/usr/share/wayland-egl/earth_es2 + $(INSTALL) -m 0755 $(@D)/BSEAV/lib/gpu/applications/nexus/earth_es2/textures/* $(STAGING_DIR)/usr/bin/textures + + $(INSTALL) -m 0755 $(@D)/BSEAV/lib/utils/*.h $(STAGING_DIR)/usr/include + + $(INSTALL) -m 0644 $(@D)/rockford/lib/psip/include/*.h $(STAGING_DIR)/usr/include + $(INSTALL) -m 0644 $(@D)/nexus/lib/playback_ip/include/*.h $(STAGING_DIR)/usr/include + $(INSTALL) -m 0644 $(@D)/BSEAV/lib/tshdrbuilder/*.h $(STAGING_DIR)/usr/include +endef + +define BCM_REFSW_INSTALL_TARGET_WAYLAND_EGL + $(INSTALL) -m 644 -D $(WAYLAND_EGL_DIR)/lib_${BCM_REFSW_PLATFORM}_release/*.so $(TARGET_DIR)/usr/lib +endef \ No newline at end of file From 324a0b3c4a90103850adec525e74f13cc64bd07c Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 8 Mar 2018 16:16:07 +0100 Subject: [PATCH 079/614] [rpi] show boot progress in animation --- board/raspberrypi/index.html | 38 +++++++++++++++++++----------------- 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index 8d2a2ee69832..34ed85af49fe 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -19,31 +19,33 @@ margin: 0; } -.logo { +div#logo { position: relative; margin: 15% 41.5%; width: 12%; } -.logo:after { +div#logo:after { content: ""; display: block; padding-bottom: 100%; } -.logo div { +div#logo div { width: 45%; height: 45%; +} +div#logo.animate div { opacity: 0; animation: fade 3s linear infinite; } -.logo div:nth-of-type(1) { +div#logo div:nth-of-type(1) { position: absolute; top: 2.5%; left: 2.5%; background-color: #3399ff; } -.logo div:nth-of-type(2) { +div#logo div:nth-of-type(2) { position: absolute; top: 2.5%; right: 2.5%; @@ -51,14 +53,14 @@ background-color: #003366; } -.logo div:nth-of-type(3) { +div#logo div:nth-of-type(3) { position: absolute; bottom: 2.5%; right: -47.5%; animation-delay: -0.5s; background-color: #006600; } -.logo div:nth-of-type(4) { +div#logo div:nth-of-type(4) { position: absolute; bottom: 2.5%; left: 2.5%; @@ -66,7 +68,7 @@ background-color: #3366cc; } -.logo div:nth-of-type(5) { +div#logo div:nth-of-type(5) { position: absolute; bottom: -47.5%; right: -47.5%; @@ -74,7 +76,7 @@ background-color: #003300; } -.logo div:nth-of-type(6) { +div#logo div:nth-of-type(6) { position: absolute; bottom: -47.5%; right: 2.5%; @@ -108,12 +110,13 @@ - +
Hello
-
lo: 127.0.0.1
+
+ }); + }(location.hostname, 'eth0', 'wlan0')).catch(console.error); + diff --git a/configs/bcm7271_wpe_ml_defconfig b/configs/bcm7271_wpe_ml_defconfig index dc11caf21fa1..e1458cba2a4e 100644 --- a/configs/bcm7271_wpe_ml_defconfig +++ b/configs/bcm7271_wpe_ml_defconfig @@ -22,7 +22,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.9hf" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/kernel_4.1_defconfig" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y @@ -53,15 +53,21 @@ BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_GETTEXT=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y -BR2_PACKAGE_WESTEROS=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_17_3_RDK=y +BR2_PACKAGE_BCM_REFSW_17_1_RDK=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7271=y +BR2_PACKAGE_WAYLAND=y +BR2_PACKAGE_WAYLAND_PROTOCOLS=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SERVICE_INTERNAL=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY="5" BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" @@ -86,11 +92,13 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_LIBXKBCOMMON=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y @@ -101,4 +109,3 @@ BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y BR2_PACKAGE_WPA_SUPPLICANT_EAP=y BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y BR2_PACKAGE_WPA_SUPPLICANT_WPS=y -BR2_TARGET_ROOTFS_INITRAMFS=y From bd1281c75f72d5ae54dae603a961dc58cf8d6fde Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:06:20 +0200 Subject: [PATCH 198/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 1a78fa553772..6bdabbfa2f80 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,9 +4,8 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = bef59c6855b8e97348bef6ad607a423a77fdf424 -WPEFRAMEWORK_SITE_METHOD = git -WPEFRAMEWORK_SITE = git@github.com:WebPlatformForEmbedded/WPEFramework.git +WPEFRAMEWORK_VERSION = 9b495a733fd71675da8feb3adbda9af2f38edef1 +WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib @@ -20,7 +19,6 @@ WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_SYSTEM_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_ WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PROXYSTUB_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_OOMADJUST=$(BR2_PACKAGE_WPEFRAMEWORK_OOM_ADJUST) - # WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_WEBSERVER_PATH= # WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_WEBSERVER_PORT= # WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_CONFIG_INSTALL_PATH= @@ -32,7 +30,6 @@ WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_OOMADJUST=$(BR2_PACKAGE_WPEFRAMEWORK_OO ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) WPEFRAMEWORK_CONF_OPTS += -DCMAKE_BUILD_TYPE=Debug #WPEFRAMEWORK_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' -WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_APPS=ON -DWPEFRAMEWORK_TEST_LOADER=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD),y) From 318fb2049f2ea24580c151bad668d6e4d309057e Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:06:34 +0200 Subject: [PATCH 199/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 4e1f8ec7c403..939e5afd4804 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,9 +4,8 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 4c64a7f3cf68eab9b2e75af063bdacc46ed14021 -WPEFRAMEWORK_PLUGINS_SITE_METHOD = git -WPEFRAMEWORK_PLUGINS_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkPlugins.git +WPEFRAMEWORK_PLUGINS_VERSION = acfcec5374c430fb232db53805c5e7cf3371d037 +WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From c79b42c1748a7dd88c11b425a2bfcc55da5d19ad Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:06:48 +0200 Subject: [PATCH 200/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 5f650c75aa06..cf5b5ea98f60 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,9 +4,8 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 4add5bb6be6dc3fc8747db4d203954306ec2418c -WPEFRAMEWORK_UI_SITE_METHOD = git -WPEFRAMEWORK_UI_SITE = git@github.com:WebPlatformForEmbedded/WPEFrameworkUI.git +WPEFRAMEWORK_UI_VERSION = eb28ebcaae03738a74e7bd143055a936c00de2bb +WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins WPEFRAMEWORK_UI_INSTALL_STAGING = NO From b6115fe78d4f2d9b2b600db6b9ede8d0a81ed1aa Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:07:32 +0200 Subject: [PATCH 201/614] [wpeframework-provisioning] bump to latest version --- package/wpe/wpeframework-provisioning/Config.in | 2 +- .../wpe/wpeframework-provisioning/wpeframework-provisioning.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-provisioning/Config.in b/package/wpe/wpeframework-provisioning/Config.in index 4836e8dfc66f..d2e4a755cb89 100644 --- a/package/wpe/wpeframework-provisioning/Config.in +++ b/package/wpe/wpeframework-provisioning/Config.in @@ -12,7 +12,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING_URI config BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING_OPERATOR string "operator" - default "unknown" + default "metrological" endif diff --git a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk index 860016f88201..f05b09f31b5c 100644 --- a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk +++ b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PROVISIONING_VERSION = 2fb370f62ba3d4cdb6b7728ac3148eac614b9e93 +WPEFRAMEWORK_PROVISIONING_VERSION = d7aa48c4e71b0888f1a5f0b59349433046c75da9 WPEFRAMEWORK_PROVISIONING_SITE_METHOD = git WPEFRAMEWORK_PROVISIONING_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginProvisioning.git WPEFRAMEWORK_PROVISIONING_INSTALL_STAGING = YES From c6a9892d688dcb054960067347626092afa17148 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:24:38 +0200 Subject: [PATCH 202/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 9af1d8f08fe8..0997981b30f0 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = ce022f47929524ffb3acac3164702229cad94c38 +WPEWEBKIT_VERSION_VALUE = 3fefad3504c2f3a04a081efeff8c2e3f2d1b8fe0 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From a6aa58de0bda6d8ae981f3ef837cef4e55c53a1d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:39:51 +0200 Subject: [PATCH 203/614] [rpi] update opensource defconfigs --- configs/raspberrypi0_wpe_defconfig | 52 ++++++++++++++-------- configs/raspberrypi2_wpe_defconfig | 53 ++++++++++++++-------- configs/raspberrypi3_wpe_defconfig | 63 +++++++++++++++++++-------- configs/raspberrypi3_wpe_ml_defconfig | 1 - 4 files changed, 112 insertions(+), 57 deletions(-) diff --git a/configs/raspberrypi0_wpe_defconfig b/configs/raspberrypi0_wpe_defconfig index 3e19bc41dc68..e5e5fede1d79 100644 --- a/configs/raspberrypi0_wpe_defconfig +++ b/configs/raspberrypi0_wpe_defconfig @@ -5,24 +5,24 @@ BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" -BR2_TARGET_GENERIC_GETTY_PORT="tty1" -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi0/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi0/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--tvmode-720 --overclock-pi012" +BR2_ROOTFS_POST_SCRIPT_ARGS="--rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi01-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y -BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-0-w" +BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b-plus bcm2708-rpi-0-w" BR2_PACKAGE_GSTREAMER1=y -BR2_PACKAGE_GSTREAMER1_GIT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y @@ -31,15 +31,17 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y @@ -47,23 +49,37 @@ BR2_PACKAGE_GST_OMX=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:150m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEWEBKIT=y -# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA_V1 is not set -BR2_PACKAGE_WPELAUNCHER=y -BR2_PACKAGE_LIBXKBCOMMON=y +# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_OPENVPN=y -BR2_PACKAGE_OPENVPN_SMALL=y -BR2_PACKAGE_TCPDUMP=y -BR2_PACKAGE_SCREEN=y -BR2_TARGET_ROOTFS_EXT2=y -BR2_TARGET_ROOTFS_EXT2_4=y +BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set -BR2_PACKAGE_HOST_DOSFSTOOLS=y -BR2_PACKAGE_HOST_GENIMAGE=y -BR2_PACKAGE_HOST_MTOOLS=y diff --git a/configs/raspberrypi2_wpe_defconfig b/configs/raspberrypi2_wpe_defconfig index cbdcef9249dd..c59cb63fd495 100644 --- a/configs/raspberrypi2_wpe_defconfig +++ b/configs/raspberrypi2_wpe_defconfig @@ -7,25 +7,25 @@ BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" -BR2_TARGET_GENERIC_GETTY_PORT="tty1" -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi2/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi2/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--tvmode-720 --overclock-pi012" +BR2_ROOTFS_POST_SCRIPT_ARGS="--i2c --spi --1w --tvmode-720 --overclock-pi012 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="be97febf4aa42b1d019ad24e7948739da8557f66" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y -BR2_PACKAGE_GSTREAMER1_GIT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y @@ -34,40 +34,55 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DEBUGUTILS=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_LINUX_FIRMWARE=y BR2_PACKAGE_RPI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEWEBKIT=y -# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA_V1 is not set -BR2_PACKAGE_WPELAUNCHER=y -BR2_PACKAGE_LIBXKBCOMMON=y +# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_OPENVPN=y -BR2_PACKAGE_OPENVPN_SMALL=y -BR2_PACKAGE_TCPDUMP=y -BR2_PACKAGE_SCREEN=y -BR2_TARGET_ROOTFS_EXT2=y -BR2_TARGET_ROOTFS_EXT2_4=y +BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set -BR2_PACKAGE_HOST_DOSFSTOOLS=y -BR2_PACKAGE_HOST_GENIMAGE=y -BR2_PACKAGE_HOST_MTOOLS=y diff --git a/configs/raspberrypi3_wpe_defconfig b/configs/raspberrypi3_wpe_defconfig index 4b15ec05c3af..ada2247a6e9b 100644 --- a/configs/raspberrypi3_wpe_defconfig +++ b/configs/raspberrypi3_wpe_defconfig @@ -7,25 +7,25 @@ BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" -BR2_TARGET_GENERIC_GETTY_PORT="tty1" -BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --tvmode-720 --overclock-pi3" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi3 --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="8bf13deebd582fd64a6595d23e9c965b652ef7c8" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="be97febf4aa42b1d019ad24e7948739da8557f66" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y -BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-cm3" +BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y -BR2_PACKAGE_GSTREAMER1_GIT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y @@ -34,39 +34,64 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_LINUX_FIRMWARE=y +BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEWEBKIT=y -# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA_V1 is not set -BR2_PACKAGE_WPELAUNCHER=y -BR2_PACKAGE_LIBXKBCOMMON=y +# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_OPENVPN=y -BR2_PACKAGE_OPENVPN_SMALL=y -BR2_PACKAGE_TCPDUMP=y -BR2_PACKAGE_SCREEN=y -BR2_TARGET_ROOTFS_EXT2=y -BR2_TARGET_ROOTFS_EXT2_4=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y +BR2_TARGET_ROOTFS_INITRAMFS=y # BR2_TARGET_ROOTFS_TAR is not set -BR2_PACKAGE_HOST_DOSFSTOOLS=y -BR2_PACKAGE_HOST_GENIMAGE=y -BR2_PACKAGE_HOST_MTOOLS=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 0024080f7839..693471aeea72 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -66,7 +66,6 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y -BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" From f3e0c5aff0d04e60d5daa0aa39265fff16ceaf95 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 21:43:58 +0200 Subject: [PATCH 204/614] [wpe] cleaning up --- package/wpe/Config.in | 1 - package/wpe/wpelauncher/Config.in | 5 --- package/wpe/wpelauncher/S90wpe | 46 -------------------- package/wpe/wpelauncher/wpe | 58 -------------------------- package/wpe/wpelauncher/wpe.conf | 11 ----- package/wpe/wpelauncher/wpe.txt | 1 - package/wpe/wpelauncher/wpelauncher.mk | 27 ------------ 7 files changed, 149 deletions(-) delete mode 100644 package/wpe/wpelauncher/Config.in delete mode 100644 package/wpe/wpelauncher/S90wpe delete mode 100644 package/wpe/wpelauncher/wpe delete mode 100644 package/wpe/wpelauncher/wpe.conf delete mode 100644 package/wpe/wpelauncher/wpe.txt delete mode 100644 package/wpe/wpelauncher/wpelauncher.mk diff --git a/package/wpe/Config.in b/package/wpe/Config.in index 356fb2b017a1..c5a84398abcc 100644 --- a/package/wpe/Config.in +++ b/package/wpe/Config.in @@ -7,5 +7,4 @@ source "package/wpe/wpewebkit/Config.in" if BR2_PACKAGE_WPEWEBKIT source "package/wpe/wpebackend/Config.in" source "package/wpe/wpebackend-rdk/Config.in" -source "package/wpe/wpelauncher/Config.in" endif diff --git a/package/wpe/wpelauncher/Config.in b/package/wpe/wpelauncher/Config.in deleted file mode 100644 index 974345b520b6..000000000000 --- a/package/wpe/wpelauncher/Config.in +++ /dev/null @@ -1,5 +0,0 @@ -config BR2_PACKAGE_WPELAUNCHER - bool "wpelauncher" - depends on BR2_PACKAGE_WPEWEBKIT - help - WPE WebKit launcher app (will be deprecated soon). diff --git a/package/wpe/wpelauncher/S90wpe b/package/wpe/wpelauncher/S90wpe deleted file mode 100644 index dd83fb8a0c5a..000000000000 --- a/package/wpe/wpelauncher/S90wpe +++ /dev/null @@ -1,46 +0,0 @@ -#!/bin/sh - -WPE_URL_FILE="/boot/wpe.txt" - -start() { - echo -n "Starting WPE: " - if [ -e "$WPE_URL_FILE" ]; then - URL=`head -1 $WPE_URL_FILE` - if [ -n "$URL" ]; then - /usr/bin/wpe --loop $URL &> /dev/null & - echo "OK" - else - echo "NO URL" - fi - else - echo "NO FILE" - fi -} - -stop() { - echo -n "Stopping WPE: " - killall wpe WPELauncher WPEWebProcess WPENetworkProcess &> /dev/null - echo "OK" -} - -restart() { - stop - start -} - -case "$1" in - start) - start - ;; - stop) - stop - ;; - restart|reload) - restart - ;; - *) - echo "Usage: $0 {start|stop|restart}" - exit 1 -esac - -exit $? diff --git a/package/wpe/wpelauncher/wpe b/package/wpe/wpelauncher/wpe deleted file mode 100644 index 3cee526eb1a4..000000000000 --- a/package/wpe/wpelauncher/wpe +++ /dev/null @@ -1,58 +0,0 @@ -#!/bin/sh - -# Enable cookie persistent storage -export WPE_SHELL_COOKIE_STORAGE=1 - -# FIXME: gst-gl's dispmanx backend is messing up with our compositor -# when it creates its initial 16x16px surface. -export GST_GL_WINDOW=dummy - -# Use cairo noaa compositor -export CAIRO_GL_COMPOSITOR=noaa - -# WebInspector -export WEBKIT_INSPECTOR_SERVER=0.0.0.0:9998 - -# FPS -#export WPE_THREADED_COMPOSITOR_FPS=1 - -# RPI mouse support -#export WPE_BCMRPI_CURSOR=1 - -# RPI touch support -#export WPE_BCMRPI_TOUCH=1 - -WPE_UPDATE="/usr/bin/wpe-update" -if [ -e "$WPE_UPDATE" ]; -then - WPE_UPDATE_RESULT=$($WPE_UPDATE) -fi - -export TZ=$(wget -qO- http://jsonip.metrological.com/ | sed -e 's/^.*"tz":"\([^"]*\)".*$/\1/') - -WPE_CONF_FILE="/boot/wpe.conf" -WPE_CONFIG="" -if [ -e "$WPE_CONF_FILE" ]; -then - WPE_CONFIG=$(grep -v '^#' $WPE_CONF_FILE | tr -d "\r" | tr "\n" " " | tr -s " ") -fi - -# Core dumps -#echo 1 > /proc/sys/kernel/core_uses_pid -#echo 2 > /proc/sys/fs/suid_dumpable -#echo "/root/cores/core-pid_%p--process%E" > /proc/sys/kernel/core_pattern -#mkdir -p /root/cores -#ulimit -c unlimited - -# The PREFIX env var can be useful when debugging athol/WPELauncher with gdbserver. -if [ "$1" = "--loop" ]; -then - export HOME=/root - mkdir -p $HOME - while true; - do - cd /root && eval "$WPE_CONFIG $PREFIX WPELauncher \"$2\"" - done -else - cd /root && eval "$WPE_CONFIG $PREFIX WPELauncher \"$1\"" -fi diff --git a/package/wpe/wpelauncher/wpe.conf b/package/wpe/wpelauncher/wpe.conf deleted file mode 100644 index 61eee547719d..000000000000 --- a/package/wpe/wpelauncher/wpe.conf +++ /dev/null @@ -1,11 +0,0 @@ -# WebInspector -WEBKIT_INSPECTOR_SERVER=0.0.0.0:9998 - -# FPS -WPE_THREADED_COMPOSITOR_FPS=1 - -# RPI mouse support -#WPE_BCMRPI_CURSOR=1 - -# Timezone -#TZ=CET-1CEST,M3.5.0,M10.5.0/3 diff --git a/package/wpe/wpelauncher/wpe.txt b/package/wpe/wpelauncher/wpe.txt deleted file mode 100644 index 234eeefe9b89..000000000000 --- a/package/wpe/wpelauncher/wpe.txt +++ /dev/null @@ -1 +0,0 @@ -http://youtube.com/tv diff --git a/package/wpe/wpelauncher/wpelauncher.mk b/package/wpe/wpelauncher/wpelauncher.mk deleted file mode 100644 index e5e6f6838512..000000000000 --- a/package/wpe/wpelauncher/wpelauncher.mk +++ /dev/null @@ -1,27 +0,0 @@ -############################################################################### -# -# WPELauncher -# -################################################################################ - -WPELAUNCHER_VERSION = bee8c4dfbb437e1865b93f96898078b9279220ef -WPELAUNCHER_SITE = $(call github,WebPlatformForEmbedded,WPEWebKitLauncher,$(WPELAUNCHER_VERSION)) - -WPELAUNCHER_DEPENDENCIES = wpewebkit - -define WPELAUNCHER_BINS - $(INSTALL) -D -m 0644 package/wpe/wpelauncher/wpe.{txt,conf} $(BINARIES_DIR)/ - $(INSTALL) -D -m 0755 package/wpe/wpelauncher/wpe $(TARGET_DIR)/usr/bin -endef - -define WPELAUNCHER_AUTOSTART - $(INSTALL) -D -m 0755 package/wpe/wpelauncher/S90wpe $(TARGET_DIR)/etc/init.d -endef - -WPELAUNCHER_POST_INSTALL_TARGET_HOOKS += WPELAUNCHER_BINS - -ifeq ($(BR2_PACKAGE_PLUGIN_WEBKITBROWSER),) -WPELAUNCHER_POST_INSTALL_TARGET_HOOKS += WPELAUNCHER_AUTOSTART -endif - -$(eval $(cmake-package)) From 7c3bdd98ca723a732c7d3b97e441db8f49a45608 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 23 May 2018 23:38:16 +0200 Subject: [PATCH 205/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 939e5afd4804..7dafa05c3ec7 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = acfcec5374c430fb232db53805c5e7cf3371d037 +WPEFRAMEWORK_PLUGINS_VERSION = b9c8726e398b78080a583424bba3b2a6d1fc01ea WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 62956dd8ece5576f10d217e090c26d3ce27a1653 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 24 May 2018 15:52:31 +0200 Subject: [PATCH 206/614] [libsoup] expose cookie-jar api --- ...add-API-to-set-a-limit-of-cookies-in.patch | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch diff --git a/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch b/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch new file mode 100644 index 000000000000..6fa1a527b13c --- /dev/null +++ b/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch @@ -0,0 +1,87 @@ +From 8bbfc986086dd74bd512ed481e412b6ffc86ae71 Mon Sep 17 00:00:00 2001 +From: Carlos Garcia Campos +Date: Thu, 17 May 2018 08:18:33 +0200 +Subject: [PATCH] soup-cookie-jar: add API to set a limit of cookies in a jar + +--- + libsoup/soup-cookie-jar.c | 25 ++++++++++++++++++++++++- + libsoup/soup-cookie-jar.h | 3 +++ + 2 files changed, 27 insertions(+), 1 deletion(-) + +diff --git a/libsoup/soup-cookie-jar.c b/libsoup/soup-cookie-jar.c +index 2369c8a7..5c1570a3 100644 +--- a/libsoup/soup-cookie-jar.c ++++ b/libsoup/soup-cookie-jar.c +@@ -50,6 +50,8 @@ typedef struct { + GHashTable *domains, *serials; + guint serial; + SoupCookieJarAcceptPolicy accept_policy; ++ guint64 n_cookies; ++ guint64 limit; + } SoupCookieJarPrivate; + + static void soup_cookie_jar_session_feature_init (SoupSessionFeatureInterface *feature_interface, gpointer interface_data); +@@ -234,6 +236,18 @@ soup_cookie_jar_new (void) + return g_object_new (SOUP_TYPE_COOKIE_JAR, NULL); + } + ++void ++soup_cookie_jar_set_limit (SoupCookieJar *jar, ++ guint64 limit) ++{ ++ SoupCookieJarPrivate *priv; ++ ++ g_return_if_fail (SOUP_IS_COOKIE_JAR (jar)); ++ ++ priv = soup_cookie_jar_get_instance_private (jar); ++ priv->limit = limit; ++} ++ + /** + * soup_cookie_jar_save: + * @jar: a #SoupCookieJar +@@ -258,10 +272,13 @@ soup_cookie_jar_changed (SoupCookieJar *jar, + { + SoupCookieJarPrivate *priv = soup_cookie_jar_get_instance_private (jar); + +- if (old && old != new) ++ if (old && old != new) { + g_hash_table_remove (priv->serials, old); ++ priv->n_cookies--; ++ } + if (new) { + priv->serial++; ++ priv->n_cookies++; + g_hash_table_insert (priv->serials, new, GUINT_TO_POINTER (priv->serial)); + } + +@@ -499,6 +516,12 @@ soup_cookie_jar_add_cookie (SoupCookieJar *jar, SoupCookie *cookie) + return; + } + ++ if (priv->limit > 0 && priv->n_cookies + 1 >= priv->limit) { ++ g_warning ("Reached limit of %" G_GUINT64_FORMAT " cookies, not adding the new one for domain '%s'", priv->limit, cookie->domain); ++ soup_cookie_free (cookie); ++ return; ++ } ++ + if (last) + last->next = g_slist_append (NULL, cookie); + else { +diff --git a/libsoup/soup-cookie-jar.h b/libsoup/soup-cookie-jar.h +index e77f8ab3..48256b16 100644 +--- a/libsoup/soup-cookie-jar.h ++++ b/libsoup/soup-cookie-jar.h +@@ -52,6 +52,9 @@ GType soup_cookie_jar_get_type (void); + SOUP_AVAILABLE_IN_2_24 + SoupCookieJar * soup_cookie_jar_new (void); + SOUP_AVAILABLE_IN_2_24 ++void soup_cookie_jar_set_limit (SoupCookieJar *jar, ++ guint64 limit); ++SOUP_AVAILABLE_IN_2_24 + char * soup_cookie_jar_get_cookies (SoupCookieJar *jar, + SoupURI *uri, + gboolean for_http); +-- +2.17.0 + From b73c1061033d97a2b2811310d2242d1e106d9783 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 24 May 2018 15:52:55 +0200 Subject: [PATCH 207/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 0997981b30f0..c5b2e7cb988a 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = 3fefad3504c2f3a04a081efeff8c2e3f2d1b8fe0 +WPEWEBKIT_VERSION_VALUE = 200a16b241ff0c6a73e239c45345057d011f0193 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 15c2d005ff5c7d89b6e3356f0b6f08a0343ec7e2 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 29 May 2018 20:37:07 +0200 Subject: [PATCH 208/614] [wpeframework-plugins] bump to correct version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 7dafa05c3ec7..c7471f24aee1 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = b9c8726e398b78080a583424bba3b2a6d1fc01ea +WPEFRAMEWORK_PLUGINS_VERSION = 06798236f6b6cf8f105dc28803dd6de80f270961 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From f5cabe7ff03721411298e0e81af64ebf3485f855 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 30 May 2018 10:03:27 +0200 Subject: [PATCH 209/614] [PACKAGER] Add correct dependencies (and select thme) --- package/wpe/wpeframework-packager/Config.in | 1 + 1 file changed, 1 insertion(+) diff --git a/package/wpe/wpeframework-packager/Config.in b/package/wpe/wpeframework-packager/Config.in index 6b6bfbbd34d5..ad34acb17099 100644 --- a/package/wpe/wpeframework-packager/Config.in +++ b/package/wpe/wpeframework-packager/Config.in @@ -1,6 +1,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_PACKAGER bool "Packager" depends on BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY + select BR2_PACKAGE_OPKG help WPE Platform Packager plugin From 5e718dd6573d577ab5589e9d71a56611358f32d9 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 24 May 2018 16:50:31 +0200 Subject: [PATCH 210/614] [bcm-refsw] Install extra library --- package/bcm-refsw/nxserver.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/package/bcm-refsw/nxserver.inc b/package/bcm-refsw/nxserver.inc index 80dea50f929b..4a84da0c4639 100644 --- a/package/bcm-refsw/nxserver.inc +++ b/package/bcm-refsw/nxserver.inc @@ -31,6 +31,7 @@ endif define BCM_REFSW_INSTALL_NXSERVER $(INSTALL) -D $(BCM_REFSW_BIN)/libnxclient.so $(1)/usr/lib/libnxclient.so + $(INSTALL) -D $(BCM_REFSW_BIN)/libnxclient_local.so $(1)/usr/lib/libnxclient_local.so if [ "x$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR)" = "x" ]; then \ $(INSTALL) -m 755 -D $(BCM_REFSW_BIN)/nxserver $(1)/usr/bin/nxserver; \ $(BCM_REFSW_INSTALL_NXSERVER_INIT) \ From b0edf24ccfde9e3a38f52d85e685d66aa50cf8ae Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 25 May 2018 11:56:08 +0200 Subject: [PATCH 211/614] [wayland-egl-bnxs] Remove libtool control files after installation --- package/wayland-egl-bnxs/wayland-egl-bnxs.mk | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/package/wayland-egl-bnxs/wayland-egl-bnxs.mk b/package/wayland-egl-bnxs/wayland-egl-bnxs.mk index c856bd494a00..4c2864abf145 100644 --- a/package/wayland-egl-bnxs/wayland-egl-bnxs.mk +++ b/package/wayland-egl-bnxs/wayland-egl-bnxs.mk @@ -62,10 +62,16 @@ define WAYLAND_EGL_BNXS_RUN_AUTOCONF endef WAYLAND_EGL_BNXS_PRE_CONFIGURE_HOOKS += WAYLAND_EGL_BNXS_RUN_AUTOCONF +define WAYLAND_EGL_BNXS_REMOVE_LA + rm $(STAGING_DIR)/usr/lib/libwayland-egl.la +endef + define WAYLAND_EGL_BNXS_GENERATE_PROTOCOL SCANNER_TOOL=${HOST_DIR}/usr/bin/wayland-scanner $(TARGET_MAKE_ENV) $(MAKE) -C $(@D)/protocol endef WAYLAND_EGL_BNXS_PRE_BUILD_HOOKS += WAYLAND_EGL_BNXS_GENERATE_PROTOCOL +WAYLAND_EGL_BNXS_POST_INSTALL_STAGING_HOOKS += WAYLAND_EGL_BNXS_REMOVE_LA + $(eval $(autotools-package)) From 54a6d4a1a0bc35252629494e5f4a9577a32e6efc Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 25 May 2018 11:57:57 +0200 Subject: [PATCH 212/614] [westeros-soc] Enable nxclient local linkage --- package/westeros-soc/westeros-soc.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index 187683fdbe87..b9e4c0f366b5 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -28,6 +28,7 @@ else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) PKG_CONFIG_SYSROOT_DIR=$(STAGING_DIR) WESTEROS_SOC_CONF_OPTS += \ --enable-vc5 \ + --enable-nxclient_local=yes \ CFLAGS="$(TARGET_CFLAGS) -I ${STAGING_DIR}/usr/include/refsw/" \ CXXFLAGS="$(TARGET_CXXFLAGS) -I ${STAGING_DIR}/usr/include/refsw/" WESTEROS_SOC_SUBDIR = brcm From 54c4ee5658f60458566d06914da911bccc61f2a5 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 25 May 2018 11:59:37 +0200 Subject: [PATCH 213/614] [gst1-bcm] install newer plugins for refsw17.3 --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index b069129bb16c..6363798752bd 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -14,6 +14,8 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1),y) GST1_BCM_VERSION = 17.1-7 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) GST1_BCM_VERSION = 17.1 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) +GST1_BCM_VERSION = 17.1-7 else ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK)),) GST1_BCM_VERSION = 17.1-5 From 805d1382374edf8bb899351cc940ab56614b3fb8 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 31 May 2018 15:46:46 +0200 Subject: [PATCH 214/614] [Compositor] Add extra options to configure --- package/wpe/wpeframework-plugins/Config.in | 55 +++++++++---------- .../wpeframework-plugins.mk | 19 ++++--- 2 files changed, 38 insertions(+), 36 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 21baa159c73d..4bd241bdf249 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -13,44 +13,41 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR bool "Compositor" help WPE Platform Compositor plugin -if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR -if BR2_PACKAGE_BCM_REFSW + +if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART + bool "Start Automatically" + help + Select this to start the plugin automatically when starting WPEFramework + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS + bool "Out of process" + help + Select this to run this plugin in its own process. + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER bool "Nexus server" + depends on BR2_PACKAGE_BCM_REFSW help - Choose this if the system has a already a resource server running like nxserver. + Include a nxserver with the compositor. -if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SERVICE_EXTERNAL - bool "External Compositor" +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS + bool "Allow unauthenticated clients" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + default n help - The master compositor is hosted in a different process. WPEFramework will attach to it. + Allow unauthenticated clients on the nxserver. -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SERVICE_INTERNAL - bool "Internal Compositor" +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE + string "graphics heap (bytes)" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + default 100 help - The master compositor is hosted in WPEFramework. -endif -endif + The ammount of memory in MB to be configured for the GPU. -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOTRACE - bool "Enable Tracing at startup" - help - If enabled the compositer plug-in will start tracing - when WPEFramework is started. - -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS - bool "Out of process" - help - Select this to run this plugin in its own process. - config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY string "Manual overrule of the time it takes to initialisize all hardware (ms)" default 0 - -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SYSTEM - string "Callsign to report information." - default Controller endif config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO @@ -73,7 +70,7 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC help LocationSync Plugin WPE Platform Dictionary plugin - + if BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC config BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI @@ -118,7 +115,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "NetworkControl" help - Control the IP adressing of the interfaces in the system from + Control the IP adressing of the interfaces in the system from WPEFramework (static IPv4/IPv6 or dhcp IPv4) menuconfig BR2_PACKAGE_WPEFRAMEWORK_CDMI diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index c7471f24aee1..69ef0bd46d53 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -199,23 +199,28 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS= else WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS=false endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SERVICE_EXTERNAL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SERVICE=external +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=false else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SERVICE=internal +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=true +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON \ + -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_GRAPHICS_HEAP_SIZE=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE} +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=false +else +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=true +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_VIRTUALINPUT=ON endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOTRACE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOTRACE=ON -endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IRNEXUS_MODE=${BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE} endif WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_HARDWAREREADY=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY} -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SYSTEM=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SYSTEM} define WPEFRAMEWORK_COMPOSITOR_POST_TARGET_REMOVE_HEADERS rm -rf $(TARGET_DIR)/usr/include/WPEFramework From 8b2f70f74376fe38850e09a8bcfceb28408356a7 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 31 May 2018 15:56:23 +0200 Subject: [PATCH 215/614] [westeros] Bump version --- .../westeros-simplebuffer.mk | 2 +- .../westeros-simpleshell.mk | 2 +- package/westeros-sink/westeros-sink.mk | 2 +- .../westeros-soc/0002-westeros-soc.17.3.patch | 25 +++++++++++++++++++ .../0003-westeros-soc.usermode.patch | 13 ++++++++++ package/westeros-soc/westeros-soc.mk | 2 +- package/westeros/westeros.mk | 2 +- 7 files changed, 43 insertions(+), 5 deletions(-) create mode 100644 package/westeros-soc/0002-westeros-soc.17.3.patch create mode 100644 package/westeros-soc/0003-westeros-soc.usermode.patch diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index 74546743b3b8..175ce033ece6 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 +WESTEROS_SIMPLEBUFFER_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 WESTEROS_SIMPLEBUFFER_SITE_METHOD = git WESTEROS_SIMPLEBUFFER_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index 2365aee0a5a4..604ad844cbb8 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 +WESTEROS_SIMPLESHELL_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 WESTEROS_SIMPLESHELL_SITE_METHOD = git WESTEROS_SIMPLESHELL_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES diff --git a/package/westeros-sink/westeros-sink.mk b/package/westeros-sink/westeros-sink.mk index e4bb69298d39..8a70ab580bf4 100644 --- a/package/westeros-sink/westeros-sink.mk +++ b/package/westeros-sink/westeros-sink.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SINK_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 +WESTEROS_SINK_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 WESTEROS_SINK_SITE_METHOD = git WESTEROS_SINK_SITE = git://github.com/Metrological/westeros WESTEROS_SINK_INSTALL_STAGING = YES diff --git a/package/westeros-soc/0002-westeros-soc.17.3.patch b/package/westeros-soc/0002-westeros-soc.17.3.patch new file mode 100644 index 000000000000..60a310844b44 --- /dev/null +++ b/package/westeros-soc/0002-westeros-soc.17.3.patch @@ -0,0 +1,25 @@ +diff -auNrd git.orig/brcm/westeros-gl/westeros-gl.cpp git/brcm/westeros-gl/westeros-gl.cpp +--- git.orig/brcm/westeros-gl/westeros-gl.cpp 2017-08-25 14:59:51.970453733 -0400 ++++ git/brcm/westeros-gl/westeros-gl.cpp 2017-08-25 14:57:39.706432920 -0400 +@@ -77,9 +77,11 @@ + } + ++ctxCount; + ++#if 0 /*NXPL can only register once, it will be registered in following eglGetDisplay*/ + NXPL_RegisterNexusDisplayPlatform( &ctx->nxplHandle, 0 ); + printf("WstGLInit: nxplHandle %x\n", ctx->nxplHandle ); +- ++#endif ++ + BKNI_CreateEvent( &ctx->gfxEvent ); + ctx->gfxEventCreated= true; + +@@ -94,7 +96,7 @@ + NEXUS_Graphics2D_SetSettings( ctx->gfx, &gfxSettings ); + } + +- if ( !ctx->nxplHandle || !ctx->gfx || !ctx->gfxEventCreated || (NEXUS_SUCCESS != rc) ) ++ if ( !ctx->gfx || !ctx->gfxEventCreated || (NEXUS_SUCCESS != rc) ) + { + WstGLTerm( ctx ); + ctx= 0; diff --git a/package/westeros-soc/0003-westeros-soc.usermode.patch b/package/westeros-soc/0003-westeros-soc.usermode.patch new file mode 100644 index 000000000000..8b659ae69087 --- /dev/null +++ b/package/westeros-soc/0003-westeros-soc.usermode.patch @@ -0,0 +1,13 @@ +diff --git a/brcm/Makefile.am b/brcm/Makefile.am +index 2bfc998..99764e7 100644 +--- a/brcm/Makefile.am ++++ b/brcm/Makefile.am +@@ -46,7 +46,7 @@ libwesteros_gl_la_CXXFLAGS= $(AM_CFLAGS) + libwesteros_gl_la_LDFLAGS= \ + $(AM_LDFLAGS) \ + -lwayland-egl \ +- -lnexus ++ $(NEXUSLIBS) + + distcleancheck_listfiles = *-libtool + diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index b9e4c0f366b5..d9c56aa9265b 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SOC_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 +WESTEROS_SOC_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 WESTEROS_SOC_SITE_METHOD = git WESTEROS_SOC_SITE = git://github.com/Metrological/westeros WESTEROS_SOC_INSTALL_STAGING = YES diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index cfec7acb9eab..366c863e74b8 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_VERSION = 1edcfb04d139f14a12231cf97d1c37338e97f515 +WESTEROS_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 WESTEROS_SITE_METHOD = git WESTEROS_SITE = git://github.com/Metrological/westeros WESTEROS_INSTALL_STAGING = YES From 630000d7842016e7a38fefcc6cddc8c6e657f593 Mon Sep 17 00:00:00 2001 From: Carlos Garcia Campos Date: Mon, 4 Jun 2018 14:58:17 +0200 Subject: [PATCH 216/614] [wpewebkit] Add WPEWebDriver to the list of targets We were not building the WebDriver process because the target was not added to the build command. We also need to copy the process to the staging and target. --- package/wpe/wpewebkit/wpewebkit.mk | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index c5b2e7cb988a..f8707fb79fe3 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -228,7 +228,7 @@ WPEWEBKIT_BUILD_TARGETS += jsc endif ifeq ($(WPEWEBKIT_BUILD_WEBKIT),y) WPEWEBKIT_BUILD_TARGETS += libWPEWebKit.so libWPEWebInspectorResources.so \ - WPE{Network,Storage,Web}Process + WPE{Network,Storage,Web}Process WPEWebDriver endif @@ -249,6 +249,7 @@ endif ifeq ($(WPEWEBKIT_BUILD_WEBKIT),y) define WPEWEBKIT_INSTALL_STAGING_CMDS_WEBKIT cp $(WPEWEBKIT_BUILDDIR)/bin/WPE{Network,Storage,Web}Process $(STAGING_DIR)/usr/bin/ && \ + cp $(WPEWEBKIT_BUILDDIR)/bin/WPEWebDriver $(STAGING_DIR)/usr/bin/ && \ cp -d $(WPEWEBKIT_BUILDDIR)/lib/libWPE* $(STAGING_DIR)/usr/lib/ && \ DESTDIR=$(STAGING_DIR) $(HOST_DIR)/usr/bin/cmake -DCOMPONENT=Development -P $(WPEWEBKIT_BUILDDIR)/Source/JavaScriptCore/cmake_install.cmake > /dev/null && \ DESTDIR=$(STAGING_DIR) $(HOST_DIR)/usr/bin/cmake -DCOMPONENT=Development -P $(WPEWEBKIT_BUILDDIR)/Source/WebKit/cmake_install.cmake > /dev/null @@ -274,6 +275,7 @@ endif ifeq ($(WPEWEBKIT_BUILD_WEBKIT),y) define WPEWEBKIT_INSTALL_TARGET_CMDS_WEBKIT cp $(WPEWEBKIT_BUILDDIR)/bin/WPE{Network,Storage,Web}Process $(TARGET_DIR)/usr/bin/ && \ + cp $(WPEWEBKIT_BUILDDIR)/bin/WPEWebDriver $(TARGET_DIR)/usr/bin/ && \ cp -d $(WPEWEBKIT_BUILDDIR)/lib/libWPE* $(TARGET_DIR)/usr/lib/ && \ $(STRIPCMD) $(TARGET_DIR)/usr/lib/libWPEWebKit.so.* endef From 2f159d11bac3027761706e5ae213d8a999d069df Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 6 Jun 2018 08:09:31 +0200 Subject: [PATCH 217/614] [gst1-bcm] Enable broadcom gst1 plugins for vss sdk --- package/gstreamer1/gst1-bcm/Config.in | 2 +- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/gstreamer1/gst1-bcm/Config.in b/package/gstreamer1/gst1-bcm/Config.in index c6408af01f6f..95ffdb5ce567 100644 --- a/package/gstreamer1/gst1-bcm/Config.in +++ b/package/gstreamer1/gst1-bcm/Config.in @@ -3,7 +3,7 @@ menuconfig BR2_PACKAGE_GST1_BCM select BR2_PACKAGE_GST1_PLUGINS_BASE select BR2_PACKAGE_LIBCURL select BR2_PACKAGE_MPG123 - depends on BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_ACN_SDK || BR2_PACKAGE_HOMECAST_SDK + depends on BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_ACN_SDK || BR2_PACKAGE_HOMECAST_SDK || BR2_PACKAGE_VSS_SDK help Broadcom NEXUS GStreamer 1.x plugins diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 6363798752bd..733deb0a8837 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -17,7 +17,7 @@ GST1_BCM_VERSION = 17.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) GST1_BCM_VERSION = 17.1-7 else -ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK)),) +ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK) $(BR2_PACKAGE_VSS_SDK)),) GST1_BCM_VERSION = 17.1-5 else GST1_BCM_VERSION = 15.2 From e07ccb093dbeb8cf85d2a331e0f86851cf3f1d39 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 6 Jun 2018 08:13:33 +0200 Subject: [PATCH 218/614] [vss] Update defconfig --- configs/vss_wpe_ml_defconfig | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index 9c4c6c62f124..e636a6b04e1a 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -14,10 +14,11 @@ BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y BR2_TOOLCHAIN_EXTERNAL_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +BR2_INIT_NONE=y BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" -BR2_PACKAGE_BUSYBOX_SMP=y +# BR2_PACKAGE_BUSYBOX is not set BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y @@ -38,19 +39,24 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_VSS_SDK=y +BR2_PACKAGE_GRAPHITE2=y +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/tmp/nfs/metrological/persistent" -BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/tmp/nfs/metrological/usr/share/WPEFramework" -BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/plugins" -BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/proxystubs" +BR2_PACKAGE_WPEFRAMEWORK_PORT="82" +BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/flash/metrological/persistent" +BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/mnt/flash/metrological/usr/share/WPEFramework" +BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/mnt/flash/metrological/usr/lib/wpeframework/plugins" +BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/mnt/flash/metrological/usr/lib/wpeframework/proxystubs" +BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y +BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD=y BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y +BR2_PACKAGE_WPEFRAMEWORK_EGLTEST=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y @@ -62,11 +68,12 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y # BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_LIBXKBCOMMON=y +BR2_PACKAGE_C_ARES=y +BR2_PACKAGE_LIBCURL=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From 7d9c066294007a3a0978a9a36325f105a3b49f0d Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 6 Jun 2018 08:25:55 +0200 Subject: [PATCH 219/614] [board] Add vss start script --- board/bcm/start.vss.sh | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 board/bcm/start.vss.sh diff --git a/board/bcm/start.vss.sh b/board/bcm/start.vss.sh new file mode 100644 index 000000000000..5748aa1408a9 --- /dev/null +++ b/board/bcm/start.vss.sh @@ -0,0 +1,17 @@ +#!/bin/sh +export SOURCE=/mnt/flash/metrological +export DESTINATION=/mnt/flash/run +export CORES=/opt/cores + +export LD_LIBRARY_PATH=$SOURCE/usr/lib:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs +export PATH=$SOURCE/usr/bin:$PATH +export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner +export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/lib/gstreamer-1.0 + +mkdir -p ${CORES} +ulimit -c unlimited +echo "${CORES}/core.%e.%p.%t" > /proc/sys/kernel/core_pattern + +export GST_DEBUG=3 + +WPEFramework -c $SOURCE/etc/WPEFramework/config.json From e657bfd284a0a8499f6c43b1e804209829d5bb72 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 8 Jun 2018 12:32:25 +0200 Subject: [PATCH 220/614] [wayland-egl-bnxs] Bump version --- package/wayland-egl-bnxs/wayland-egl-bnxs.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wayland-egl-bnxs/wayland-egl-bnxs.mk b/package/wayland-egl-bnxs/wayland-egl-bnxs.mk index 4c2864abf145..46672ade3eb9 100644 --- a/package/wayland-egl-bnxs/wayland-egl-bnxs.mk +++ b/package/wayland-egl-bnxs/wayland-egl-bnxs.mk @@ -4,7 +4,7 @@ # ################################################################################ -WAYLAND_EGL_BNXS_VERSION = b7c878b8d88abc324b6303ac61da44f702533909 +WAYLAND_EGL_BNXS_VERSION = ab76649310f6688670b5c88cfac184735afc4d21 WAYLAND_EGL_BNXS_SITE_METHOD = git WAYLAND_EGL_BNXS_SITE = git@github.com:Metrological/wayland-egl-bnxs.git WAYLAND_EGL_BNXS_INSTALL_STAGING = YES From c7a65e4998b8de997b951e0581fa200f762bab42 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 8 Jun 2018 12:33:02 +0200 Subject: [PATCH 221/614] [westeros] Bump version --- .../westeros-simplebuffer/westeros-simplebuffer.mk | 2 +- .../westeros-simpleshell/westeros-simpleshell.mk | 2 +- package/westeros-sink/westeros-sink.mk | 2 +- .../westeros-soc/0003-westeros-soc.usermode.patch | 13 ------------- package/westeros-soc/westeros-soc.mk | 13 ++++++++++++- package/westeros/westeros.mk | 4 +--- 6 files changed, 16 insertions(+), 20 deletions(-) delete mode 100644 package/westeros-soc/0003-westeros-soc.usermode.patch diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index 175ce033ece6..9380bf69c72d 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 +WESTEROS_SIMPLEBUFFER_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 WESTEROS_SIMPLEBUFFER_SITE_METHOD = git WESTEROS_SIMPLEBUFFER_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index 604ad844cbb8..b6a9bc00d3e5 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 +WESTEROS_SIMPLESHELL_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 WESTEROS_SIMPLESHELL_SITE_METHOD = git WESTEROS_SIMPLESHELL_SITE = git://github.com/Metrological/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES diff --git a/package/westeros-sink/westeros-sink.mk b/package/westeros-sink/westeros-sink.mk index 8a70ab580bf4..140cc14f7db3 100644 --- a/package/westeros-sink/westeros-sink.mk +++ b/package/westeros-sink/westeros-sink.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SINK_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 +WESTEROS_SINK_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 WESTEROS_SINK_SITE_METHOD = git WESTEROS_SINK_SITE = git://github.com/Metrological/westeros WESTEROS_SINK_INSTALL_STAGING = YES diff --git a/package/westeros-soc/0003-westeros-soc.usermode.patch b/package/westeros-soc/0003-westeros-soc.usermode.patch deleted file mode 100644 index 8b659ae69087..000000000000 --- a/package/westeros-soc/0003-westeros-soc.usermode.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/brcm/Makefile.am b/brcm/Makefile.am -index 2bfc998..99764e7 100644 ---- a/brcm/Makefile.am -+++ b/brcm/Makefile.am -@@ -46,7 +46,7 @@ libwesteros_gl_la_CXXFLAGS= $(AM_CFLAGS) - libwesteros_gl_la_LDFLAGS= \ - $(AM_LDFLAGS) \ - -lwayland-egl \ -- -lnexus -+ $(NEXUSLIBS) - - distcleancheck_listfiles = *-libtool - diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index d9c56aa9265b..6cc6db63a36c 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SOC_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 +WESTEROS_SOC_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 WESTEROS_SOC_SITE_METHOD = git WESTEROS_SOC_SITE = git://github.com/Metrological/westeros WESTEROS_SOC_INSTALL_STAGING = YES @@ -13,6 +13,10 @@ WESTEROS_SOC_AUTORECONF_OPTS = "-Icfg" WESTEROS_SOC_DEPENDENCIES = host-pkgconf host-autoconf wayland libegl +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLATFORM),y) + WESTEROS_SOC_DEPENDENCIES += wpeframework-platform +endif + WESTEROS_SOC_CONF_OPTS += \ --prefix=/usr/ \ --disable-silent-rules \ @@ -47,6 +51,13 @@ WESTEROS_SOC_PRE_CONFIGURE_HOOKS += WESTEROS_SOC_RUN_AUTOCONF define WESTEROS_SOC_ENTER_BUILD_DIR cd $(@D)/$(WESTEROS_SOC_SUBDIR) endef + WESTEROS_SOC_PRE_BUILD_HOOKS += WESTEROS_SOC_ENTER_BUILD_DIR +define WESTEROS_SOC_REMOVE_LA + rm $(STAGING_DIR)/usr/lib/libwesteros_gl.la +endef + +WESTEROS_SOC_POST_INSTALL_STAGING_HOOKS += WESTEROS_SOC_REMOVE_LA + $(eval $(autotools-package)) diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index 366c863e74b8..9898814715f8 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_VERSION = 319b26391a64a5695568eac5ff9ebf294dafee68 +WESTEROS_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 WESTEROS_SITE_METHOD = git WESTEROS_SITE = git://github.com/Metrological/westeros WESTEROS_INSTALL_STAGING = YES @@ -16,8 +16,6 @@ WESTEROS_DEPENDENCIES = host-pkgconf host-autoconf wayland \ WESTEROS_CONF_OPTS = \ --prefix=/usr/ \ - --enable-app=yes \ - --enable-test=yes \ --enable-rendergl=yes \ --enable-sbprotocol=yes \ --enable-xdgv5=yes\ From ac2fc22a82951590c111fb7346f4f0f011458c36 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 6 Jun 2018 10:04:11 +0200 Subject: [PATCH 222/614] [vss-sdk] Exclude packages provided by SDK --- package/vss-sdk/vss-sdk.mk | 67 +++++++++++++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 1 deletion(-) diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index 04c0882acdb7..666331f5a918 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -4,4 +4,69 @@ # ################################################################################ -$(eval $(virtual-package)) +#$(eval $(virtual-package)) + +BUILDROOT_FLAGS = .stamp_downloaded \ + .stamp_extracted \ + .applied_patches_list \ + .stamp_patched \ + .stamp_configured \ + .stamp_built \ + .stamp_staging_installed \ + .br_filelist_before \ + .br_filelist_after \ + .stamp_target_installed \ + .stamp_host_installed \ + .stamp_images_installed + +define VSS_EXCLUDE_PACKAGE + $(info "Excluding ${${1}_NAME}-${${1}_VERSION} from build, provided by SDK") + mkdir -p $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION}/ + $(foreach flag,$(BUILDROOT_FLAGS), touch $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION}/$(flag);) +endef + +define VSS_SDK_BUILD_CMDS + $(call VSS_EXCLUDE_PACKAGE,OPENSSL) + $(call VSS_EXCLUDE_PACKAGE,ZLIB) + $(call VSS_EXCLUDE_PACKAGE,LIBPNG) + $(call VSS_EXCLUDE_PACKAGE,LIBJPEG) + $(call VSS_EXCLUDE_PACKAGE,JPEG_TURBO) + $(call VSS_EXCLUDE_PACKAGE,EXPAT) + $(call VSS_EXCLUDE_PACKAGE,LIBXML2) + $(call VSS_EXCLUDE_PACKAGE,LIBXSLT) + $(call VSS_EXCLUDE_PACKAGE,C_ARES) + $(call VSS_EXCLUDE_PACKAGE,LIBCURL) + $(call VSS_EXCLUDE_PACKAGE,LIBXKBCOMMON) + $(call VSS_EXCLUDE_PACKAGE,LIBSOUP) + $(call VSS_EXCLUDE_PACKAGE,LIBGLIB2) + $(call VSS_EXCLUDE_PACKAGE,LIBFFI) + $(call VSS_EXCLUDE_PACKAGE,ICU) + $(call VSS_EXCLUDE_PACKAGE,ICUDATA) + $(call VSS_EXCLUDE_PACKAGE,ORC) + $(call VSS_EXCLUDE_PACKAGE,PCRE) + $(call VSS_EXCLUDE_PACKAGE,SQLITE) + $(call VSS_EXCLUDE_PACKAGE,FREETYPE) + $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) + $(call VSS_EXCLUDE_PACKAGE,KMOD) + $(call VSS_EXCLUDE_PACKAGE,SHARED_MIME_INFO) +endef + +define VSS_SDK_WRONG_PKG + #$(call VSS_EXCLUDE_PACKAGE,GSTREAMER1) #Shipped v1.4.5 to old, v1.5.3 is required to enable ENCRYPTED_MEDIA. + #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BASE) + #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_GOOD) + #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BAD) + #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_UGLY) + #$(call VSS_EXCLUDE_PACKAGE,MPG123) #libmpg123 v1.14.4, required >= 1.19.0 for BCM gst1 plugins + #$(call VSS_EXCLUDE_PACKAGE,LIBGCRYPT) #v1.6.5 WPE needed v1.7.0 to enable Web Crypto API support. + #$(call VSS_EXCLUDE_PACKAGE,LIBGPG_ERROR) #not detected properly libgpg-error 1.26 +endef + + +define VSS_SDK_INSTALL_STAGING_CMDS +endef + +define VSS_SDK_INSTALL_TARGET_CMDS +endef + +$(eval $(generic-package)) From c7a7fcccb3ad943b90a7853785f36576e1a4c40c Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 12 Jun 2018 15:39:51 +0200 Subject: [PATCH 223/614] [vss] Add extra environment variables --- board/bcm/start.vss.sh | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/board/bcm/start.vss.sh b/board/bcm/start.vss.sh index 5748aa1408a9..2aa8f255bcf1 100644 --- a/board/bcm/start.vss.sh +++ b/board/bcm/start.vss.sh @@ -1,17 +1,18 @@ #!/bin/sh export SOURCE=/mnt/flash/metrological -export DESTINATION=/mnt/flash/run export CORES=/opt/cores +# export GST_DEBUG=3 export LD_LIBRARY_PATH=$SOURCE/usr/lib:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs export PATH=$SOURCE/usr/bin:$PATH export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/lib/gstreamer-1.0 +export GST_REGISTRY=$SOURCE/gst-registry.bin + +export XKB_CONFIG_ROOT=$SOURCE/usr/share/X11/xkb mkdir -p ${CORES} ulimit -c unlimited echo "${CORES}/core.%e.%p.%t" > /proc/sys/kernel/core_pattern -export GST_DEBUG=3 - WPEFramework -c $SOURCE/etc/WPEFramework/config.json From 1a571d75e1125b134331f9954dcf247417ddb123 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 12 Jun 2018 18:26:44 +0200 Subject: [PATCH 224/614] [vss] Add mouting ssl and gio location --- board/bcm/start.vss.sh | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/bcm/start.vss.sh b/board/bcm/start.vss.sh index 2aa8f255bcf1..7415303d0ba8 100644 --- a/board/bcm/start.vss.sh +++ b/board/bcm/start.vss.sh @@ -3,6 +3,12 @@ export SOURCE=/mnt/flash/metrological export CORES=/opt/cores # export GST_DEBUG=3 +grep -q "/etc/ssl" /proc/mounts && + echo "/etc/ssl is already mounted" || mount --bind $SOURCE/etc/ssl/ /etc/ssl/ + +grep -q "/usr/lib/gio" /proc/mounts && + echo "/usr/lib/gio is already mounted" || mount --bind $SOURCE/usr/lib/gio /usr/lib/gio + export LD_LIBRARY_PATH=$SOURCE/usr/lib:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs export PATH=$SOURCE/usr/bin:$PATH export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner From 3e7dbd32ccfa101c8bfb217fccb43471f7a5545c Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 12 Jun 2018 23:31:35 +0200 Subject: [PATCH 225/614] [vss] Update defconfig --- configs/vss_wpe_ml_defconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index e636a6b04e1a..2881f2706551 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -20,9 +20,11 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" # BR2_PACKAGE_BUSYBOX is not set BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y @@ -36,6 +38,7 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y @@ -71,9 +74,8 @@ BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_LIBXKBCOMMON=y +BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y BR2_PACKAGE_C_ARES=y -BR2_PACKAGE_LIBCURL=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From b53774e09649ae44b3c876721917302574a34469 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 13 Jun 2018 12:05:40 +0200 Subject: [PATCH 226/614] [OPKG] Add a provision hook into the libopkg package for secure installation of packages. --- package/opkg/001-provisioning_hook.patch | 136 +++++++++++++++++++++++ package/opkg/opkg.mk | 5 + 2 files changed, 141 insertions(+) create mode 100644 package/opkg/001-provisioning_hook.patch diff --git a/package/opkg/001-provisioning_hook.patch b/package/opkg/001-provisioning_hook.patch new file mode 100644 index 000000000000..fca96a690be7 --- /dev/null +++ b/package/opkg/001-provisioning_hook.patch @@ -0,0 +1,136 @@ +--- a/libopkg/opkg_verify.c 2018-06-04 08:49:19.457680188 +0200 ++++ b/libopkg/opkg_verify.c 2018-06-13 09:41:11.899234221 +0200 +@@ -53,6 +53,25 @@ + } + #endif + ++#ifdef HAVE_PROVISION ++#include "opkg_provision.h" ++ ++int opkg_verify_and_decrypt_package(const char *file) ++{ ++ return (opkg_verify_and_decrypt_package(file)); ++} ++#else ++/* Validate and Decrypt the package if possible. */ ++int opkg_verify_and_decrypt_package(const char *file) ++{ ++ (void)file; ++ ++ opkg_msg(ERROR, "Provisioned package checking and decryption not supported\n"); ++ return -1; ++} ++#endif ++ ++ + int opkg_verify_md5sum(const char *file, const char *md5sum) + { + int r; +@@ -104,6 +124,8 @@ + return opkg_verify_gpg_signature(file, sigfile); + else if (strcmp(opkg_config->signature_type, "openssl") == 0) + return opkg_verify_openssl_signature(file, sigfile); ++ else if (strcmp(opkg_config->signature_type, "provisioned") == 0) ++ return opkg_verify_and_decrypt_package(file); + + opkg_msg(ERROR, "signature_type option '%s' not understood.\n", + opkg_config->signature_type); +--- a/configure.ac 2015-12-02 22:56:43.000000000 +0100 ++++ b/configure.ac 2018-06-13 11:57:16.237697579 +0200 +@@ -10,6 +10,7 @@ + + AC_CANONICAL_HOST + AC_GNU_SOURCE ++AC_PROG_CXX + + # Disable C++/Fortran checks + define([AC_LIBTOOL_LANG_CXX_CONFIG], [:]) +@@ -74,6 +75,19 @@ + fi + AM_CONDITIONAL(HAVE_CURL, test "x$want_curl" = "xyes") + ++# check for provision ++AC_ARG_ENABLE(provision, ++ AC_HELP_STRING([--enable-provision], [Enable verification and decryption with provision ++ [[default=no]] ]), ++ [want_provision="$enableval"], [want_provision="no"]) ++ ++if test "x$want_provision" = "xyes"; then ++ PKG_CHECK_MODULES(PROVISION, [provisionproxy]) ++ AC_DEFINE(HAVE_PROVISION, 1, [Define if you want provision support]) ++fi ++AM_CONDITIONAL(HAVE_PROVISION, test "x$want_provision" = "xyes") ++ ++ + # check for sha256 + AC_ARG_ENABLE(sha256, + AC_HELP_STRING([--enable-sha256], [Enable sha256sum check +--- a/libopkg/Makefile.am 2018-06-13 11:33:25.196265228 +0200 ++++ b/libopkg/Makefile.am 2018-06-13 11:34:26.170288674 +0200 +@@ -38,6 +38,10 @@ + opkg_sources += opkg_openssl.c + opkg_headers += opkg_openssl.h + endif ++if HAVE_PROVISION ++opkg_sources += opkg_provision.cpp ++opkg_headers += opkg_provision.h ++endif + if HAVE_GPGME + opkg_sources += opkg_gpg.c + opkg_headers += opkg_gpg.h +--- a/libopkg/opkg_provision.h 2018-06-13 11:38:34.210246513 +0200 ++++ b/libopkg/opkg_provision.h 2018-06-13 11:47:56.975994355 +0200 +@@ -0,0 +1,29 @@ ++/* vi: set expandtab sw=4 sts=4: */ ++/* opkg_provision.h - the opkg package management system ++ ++ Copyright (C) 2018 Metrological ++ ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2, or (at ++ your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++*/ ++ ++#ifndef OPKG_PROVISION_H ++#define OPKG_PROVISION_H ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++int opkg_verify_and_decrypt_package(const char* file); ++ ++#ifdef __cplusplus ++} ++#endif ++#endif +--- a/libopkg/opkg_provision.cpp 2018-06-13 11:38:31.110347034 +0200 ++++ b/libopkg/opkg_provision.cpp 2018-06-13 11:45:52.768023211 +0200 +@@ -0,0 +1,21 @@ ++/* vi: set expandtab sw=4 sts=4: */ ++/* opkg_provision.c - the opkg package management system ++ ++ Copyright (C) 2018 Metrological ++ ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2, or (at ++ your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++*/ ++ ++#include ++ ++int opkg_verify_and_decrypt_package(const char* /* file */) { ++ return (-1); ++} diff --git a/package/opkg/opkg.mk b/package/opkg/opkg.mk index 3a292912712b..5784ac5fe695 100644 --- a/package/opkg/opkg.mk +++ b/package/opkg/opkg.mk @@ -30,6 +30,11 @@ else OPKG_CONF_OPTS += --disable-gpg endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY),y) +OPKG_CONF_OPTS += --enable-provision +OPKG_DEPENDENCIES += wpeframework +endif + OPKG_POST_INSTALL_TARGET_HOOKS += OPKG_CREATE_LOCKDIR $(eval $(autotools-package)) From 165ed30830b8be3d6899e64dd793239731d4620e Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 13 Jun 2018 12:33:19 +0200 Subject: [PATCH 227/614] [UMA] Initial commit against latest/greatest on master. --- board/uma/linux-3-14.config | 3200 +++++++++++++++++ .../uma/patches/02_TT_USB_TestCommands.patch | 289 ++ board/uma/patches/03_kstorman.patch | 1046 ++++++ board/uma/patches/04_jffs2_nooob_write.patch | 133 + board/uma/patches/05_inherited-caps.patch | 22 + .../patches/06_manage-hardlink-incpio.patch | 117 + board/uma/patches/09_make_initramfs_RO.patch | 21 + .../patches/10_bootargs_append_in_dtb.patch | 22 + board/uma/patches/12_systool.patch | 401 +++ ...40_espial_hardwire_ubictrl_minor_dev.patch | 24 + .../41_espial_chardev_preassigned.patch | 124 + .../42_espial_settime_security_check.patch | 74 + board/uma/patches/43_max_dgram_qlen.patch | 30 + .../44_espial_blkdev_preassigned.patch | 119 + .../44_espial_read_kmsg_from_logger.patch | 30 + ...c8a33eec78289b1b3f6e10874719c27ce0a7.patch | 835 +++++ ...3ee2517303afa54ad6cbd9342a2f748cf509.patch | 187 + ...71887fcba470ff9265c65cff7d14d9e0e3f9.patch | 85 + ...5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch | 58 + ...571bb8940a189322cc5f51466bdab044a48b.patch | 50 + ...8926f337ff4de49a8fb512aa4a55df0c502d.patch | 44 + ...36bc4a2639af0e77b3a05460e8367e3187a4.patch | 30 + ...70725339c41d1cd9be4da4ca0d968119d8ad.patch | 48 + ...6496758d19de2431ebf163337fc7b92f8c45.patch | 81 + ...c2905f745c8b1920a335cbb366ba6b0fc754.patch | 47 + ...22a1b3b9e8ee231913c500f73c6988b1aff5.patch | 34 + ...83be973dc990f3763de3667c4cd004e6e4f7.patch | 25 + ...d05799976c0611dcb229649260504b2bdef5.patch | 27 + ...71bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch | 29 + .../patches/99_kernel_stricter_compiler.patch | 11 + board/uma/uma.sh | 51 + board/uma/uma.txt | 124 + board/uma/uma.txt.exclude_common_libraries | 122 + board/uma/wpeframework.sh | 9 + configs/uma7439_full_wpe_nf_defconfig | 112 + package/wpe/wpeframework-plugins/Config.in | 1 - .../wpeframework-plugins.mk | 3 + 37 files changed, 7664 insertions(+), 1 deletion(-) create mode 100644 board/uma/linux-3-14.config create mode 100644 board/uma/patches/02_TT_USB_TestCommands.patch create mode 100644 board/uma/patches/03_kstorman.patch create mode 100644 board/uma/patches/04_jffs2_nooob_write.patch create mode 100644 board/uma/patches/05_inherited-caps.patch create mode 100644 board/uma/patches/06_manage-hardlink-incpio.patch create mode 100755 board/uma/patches/09_make_initramfs_RO.patch create mode 100755 board/uma/patches/10_bootargs_append_in_dtb.patch create mode 100644 board/uma/patches/12_systool.patch create mode 100755 board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch create mode 100755 board/uma/patches/41_espial_chardev_preassigned.patch create mode 100755 board/uma/patches/42_espial_settime_security_check.patch create mode 100755 board/uma/patches/43_max_dgram_qlen.patch create mode 100755 board/uma/patches/44_espial_blkdev_preassigned.patch create mode 100755 board/uma/patches/44_espial_read_kmsg_from_logger.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch create mode 100755 board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch create mode 100644 board/uma/patches/99_kernel_stricter_compiler.patch create mode 100755 board/uma/uma.sh create mode 100644 board/uma/uma.txt create mode 100644 board/uma/uma.txt.exclude_common_libraries create mode 100755 board/uma/wpeframework.sh create mode 100644 configs/uma7439_full_wpe_nf_defconfig diff --git a/board/uma/linux-3-14.config b/board/uma/linux-3-14.config new file mode 100644 index 000000000000..58030295f5b9 --- /dev/null +++ b/board/uma/linux-3-14.config @@ -0,0 +1,3200 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 3.14.28-1.9 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="arm-linux-gnueabihf-" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_FHANDLE is not set +CONFIG_AUDIT=y +# CONFIG_AUDITSYSCALL is not set + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +# CONFIG_TICK_CPU_ACCOUNTING is not set +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_PREEMPT_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_RCU_USER_QS is not set +CONFIG_RCU_FANOUT=32 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_MM_OWNER=y +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_EXPERT=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_PCI_QUIRKS=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_SYSTEM_TRUSTED_KEYRING is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM_NODT is not set +# CONFIG_ARCH_SHMOBILE_LEGACY is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP1 is not set + +# +# Multiple platform selection +# + +# +# CPU Core family selection +# +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_V6_V7=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# CONFIG_ARCH_MVEBU is not set +CONFIG_ARCH_BCM=y + +# +# Broadcom SoC Selection +# +# CONFIG_ARCH_BCM_MOBILE is not set +CONFIG_ARCH_BRCMSTB=y +# CONFIG_BCM3390A0 is not set +# CONFIG_BCM3390B0 is not set +# CONFIG_BCM7145B0 is not set +# CONFIG_BCM7250B0 is not set +# CONFIG_BCM7364A0 is not set +# CONFIG_BCM7366C0 is not set +# CONFIG_BCM74371A0 is not set +CONFIG_BCM7439B0=y +# CONFIG_BCM7445D0 is not set +CONFIG_SPI_BRCMSTB=y +CONFIG_BCMGENET=y +CONFIG_BRCM_MOCA=y +CONFIG_BRCM_USB=y +CONFIG_MTD_NAND_BRCMSTB=y +CONFIG_BRCM_SDIO=y +CONFIG_BRCMSTB=y +CONFIG_BCM7439=y +CONFIG_BRCM_GENET_V4=y +CONFIG_BRCM_GENET_VERSION=4 +CONFIG_BRCM_HAS_MOCA=y +CONFIG_BRCM_HAS_MOCA_20_GEN23=y +CONFIG_BRCM_MOCA_VERS=0x2003 +CONFIG_BRCM_HAS_NAND_MINOR_1=y +CONFIG_BRCM_HAS_NAND_MAJOR_7=y +CONFIG_BRCMNAND_MAJOR_VERS=7 +CONFIG_BRCMNAND_MINOR_VERS=1 +CONFIG_BRCM_HAS_BSPI_V4=y +CONFIG_BRCM_BSPI_MAJOR_VERS=4 +CONFIG_BRCM_MSPI_64B_WORDS=y +CONFIG_BRCM_USB_OHCI=y +CONFIG_BRCM_USB_EHCI=y +CONFIG_BRCM_USB_XHCI=y +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_HI3xxx is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MSM_DT is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +# CONFIG_SOC_AM33XX is not set +# CONFIG_SOC_AM43XX is not set +# CONFIG_SOC_DRA7XX is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_SHMOBILE_MULTI is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VIRT is not set +# CONFIG_ARCH_WM8850 is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_LPAE=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_ARM_VIRT_EXT=y +CONFIG_SWP_EMULATE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_KUSER_HELPERS=y +CONFIG_CACHE_B15_RAC=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_NR_BANKS=8 +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_643719 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_ARM_ERRATA_754322 is not set +# CONFIG_ARM_ERRATA_754327 is not set +# CONFIG_ARM_ERRATA_764369 is not set +# CONFIG_ARM_ERRATA_775420 is not set +CONFIG_ARM_ERRATA_798181=y +# CONFIG_ARM_ERRATA_773022 is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCI_MSI=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set + +# +# PCI host controller drivers +# +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_HAVE_SMP=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_ARM_CPU_TOPOLOGY=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_HAVE_ARM_ARCH_TIMER=y +# CONFIG_MCPM is not set +# CONFIG_BIG_LITTLE is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +CONFIG_ARM_PSCI=y +CONFIG_ARCH_NR_GPIO=1024 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_HZ_FIXED=0 +CONFIG_HZ_100=y +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_500 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +# CONFIG_HAVE_ARCH_PFN_VALID is not set +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_CLEANCACHE is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +# CONFIG_XEN is not set + +# +# Boot options +# +CONFIG_USE_OF=y +CONFIG_ATAGS=y +# CONFIG_DEPRECATED_PARAM_STRUCT is not set +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="vmalloc=342m bmem=659m@1389m" +# CONFIG_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_GENERIC_CPUFREQ_CPU0=y + +# +# ARM CPU frequency scaling drivers +# +CONFIG_ARM_BRCMSTB_CPUFREQ=y +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_HIGHBANK_CPUIDLE is not set +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y +# CONFIG_KERNEL_MODE_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_HAS_OPP=y +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_NET_IP_TUNNEL is not set +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_UDP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_CONNTRACK_MARK is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +CONFIG_NETFILTER_XT_MATCH_MAC=y +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +CONFIG_IP_NF_MATCH_RPFILTER=y +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +# CONFIG_IP_NF_TARGET_ULOG is not set +CONFIG_NF_NAT_IPV4=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +CONFIG_IP_NF_RAW=y +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_802_3=y +CONFIG_BRIDGE_EBT_AMONG=y +CONFIG_BRIDGE_EBT_ARP=y +CONFIG_BRIDGE_EBT_IP=y +CONFIG_BRIDGE_EBT_LIMIT=y +# CONFIG_BRIDGE_EBT_MARK is not set +CONFIG_BRIDGE_EBT_PKTTYPE=y +# CONFIG_BRIDGE_EBT_STP is not set +CONFIG_BRIDGE_EBT_VLAN=y +# CONFIG_BRIDGE_EBT_ARPREPLY is not set +CONFIG_BRIDGE_EBT_DNAT=y +# CONFIG_BRIDGE_EBT_MARK_T is not set +CONFIG_BRIDGE_EBT_REDIRECT=y +CONFIG_BRIDGE_EBT_SNAT=y +# CONFIG_BRIDGE_EBT_LOG is not set +# CONFIG_BRIDGE_EBT_ULOG is not set +# CONFIG_BRIDGE_EBT_NFLOG is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_MMAP is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_NET_MPLS_GSO is not set +# CONFIG_HSR is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_RFKILL_REGULATOR is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +# CONFIG_DMA_SHARED_BUFFER is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=12 + +# +# Bus devices +# +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_ARM_CCI is not set +# CONFIG_KSTORMAN_DRIVER is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_DENALI is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_MTD_UBI_BLOCK=y +CONFIG_DTC=y +CONFIG_OF=y + +# +# Device Tree and Open Firmware support +# +CONFIG_PROC_DEVICETREE=y +# CONFIG_OF_SELFTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_MTD=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_ATMEL_PWM is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ATMEL_SSC is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_PCH_PHUB is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=y +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_SCSI_BNX2X_FCOE is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_IMX is not set +CONFIG_SATA_BRCMSTB=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_HIGHBANK is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_RCAR is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=y +CONFIG_MACVTAP=y +# CONFIG_VXLAN is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_TUN is not set +CONFIG_VETH=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set +CONFIG_NET_DSA_BCM_SF2=y +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2X is not set +CONFIG_SYSTEM_PORT=y +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_IP1000 is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_SH_ETH is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_SFC is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +CONFIG_BCM531XX_PHY=y +CONFIG_BCM7XXX_PHY=y +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +CONFIG_MDIO_UNIMAC=y +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=y +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +CONFIG_WLAN=y +# CONFIG_ATMEL is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_HOSTAP is not set +# CONFIG_WL_TI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_PS2_ELANTECH=y +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_MMA8450 is not set +CONFIG_INPUT_MPU3050=y +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_CMA3000 is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_OLPC_APSP is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVKMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_EM is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_MFD_HSU is not set +# CONFIG_SERIAL_SH_SCI is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_PCH_UART is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_ST_ASC is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_ATMEL is not set +# CONFIG_HW_RANDOM_EXYNOS is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EG20T is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_BRCMSTB=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +# CONFIG_GPIOLIB is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_SMB347 is not set +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_AVS is not set +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_CPU_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_IMX_THERMAL is not set +# CONFIG_INTEL_POWERCLAMP is not set +# CONFIG_BRCMSTB_THERMAL is not set + +# +# Texas Instruments thermal drivers +# +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_RC_SUPPORT is not set +# CONFIG_MEDIA_CONTROLLER is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_GSPCA=y +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Audio decoders, processors and mixers +# + +# +# RDS decoders +# + +# +# Video decoders +# + +# +# Video and audio decoders +# + +# +# Video encoders +# + +# +# Camera sensor devices +# + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Audio/Video compression chips +# + +# +# Miscellaneous helper chips +# + +# +# Sensors used on soc_camera driver +# + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_EXYNOS_VIDEO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +CONFIG_SND_SOC=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_HUION is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO_TPKBD is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FUSBH200_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +CONFIG_USB_SERIAL_MXUPORT=y +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +CONFIG_USB_SERIAL_XSENS_MT=y +CONFIG_USB_SERIAL_WISHBONE=y +# CONFIG_USB_SERIAL_ZTE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HSIC_USB3503 is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_PHY is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_AM335X_PHY_USB is not set +# CONFIG_SAMSUNG_USB2PHY is not set +# CONFIG_SAMSUNG_USB3PHY is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set +# CONFIG_USB_ULPI is not set +# CONFIG_USB_GADGET is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_PXAV3 is not set +# CONFIG_MMC_SDHCI_PXAV2 is not set +# CONFIG_MMC_SDHCI_BCM_KONA is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_STAGING is not set + +# +# SOC (System On Chip) specific Drivers +# +CONFIG_SOC_BRCMSTB=y + +# +# Broadcom STB SoC drivers +# +CONFIG_BRCMSTB_IRQ0_STUB=y +CONFIG_BRCMSTB_BMEM=y +CONFIG_BRCMSTB_CMA=y +CONFIG_BRCMSTB_MEMORY_API=y +CONFIG_BRCMSTB_PM=y +# CONFIG_BRCMSTB_SRPD is not set +CONFIG_BRCMSTB_WKTMR=y +CONFIG_BRCMSTB_XPT_HASH=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_QCOM is not set + +# +# Hardware Spinlock drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_MAILBOX is not set +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set +# CONFIG_PHY_EXYNOS_DP_VIDEO is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_POWERCAP is not set +CONFIG_SYSTOOL_SUPPORT=y + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +CONFIG_JBD2_DEBUG=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=y +CONFIG_CUSE=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +CONFIG_JFFS2_FS_WBUF_VERIFY=y +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_REDUCED=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_CPU_STALL_INFO is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_PROBE_EVENTS is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_MODULE is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM_PTDUMP is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_BCM_KONA_UART is not set +CONFIG_DEBUG_BRCMSTB_UART=y +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_DEBUG_SEMIHOSTING is not set +# CONFIG_DEBUG_LL_UART_8250 is not set +# CONFIG_DEBUG_LL_UART_PL01X is not set +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +# CONFIG_DEBUG_UART_PL01X is not set +CONFIG_DEBUG_UART_8250=y +CONFIG_DEBUG_UART_PHYS=0xf040a900 +CONFIG_DEBUG_UART_VIRT=0xfc40a900 +CONFIG_DEBUG_UART_8250_SHIFT=2 +CONFIG_DEBUG_UART_8250_WORD=y +# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set +CONFIG_DEBUG_UNCOMPRESS=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_EARLY_PRINTK=y +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_SET_MODULE_RONX is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_PERSISTENT_KEYRINGS=y +# CONFIG_BIG_KEYS is not set +CONFIG_ENCRYPTED_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +CONFIG_SECURITY_PATH=y +# CONFIG_SECURITY_SELINUX is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_APPARMOR_HASH=y +# CONFIG_SECURITY_YAMA is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_APPARMOR=y +# CONFIG_DEFAULT_SECURITY_DAC is not set +CONFIG_DEFAULT_SECURITY="apparmor" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_CMAC is not set +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA1_ARM is not set +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_ARM is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +# CONFIG_CRC8 is not set +CONFIG_AUDIT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +# CONFIG_AVERAGE is not set +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +# CONFIG_VIRTUALIZATION is not set diff --git a/board/uma/patches/02_TT_USB_TestCommands.patch b/board/uma/patches/02_TT_USB_TestCommands.patch new file mode 100644 index 000000000000..7b1f2b2b4acd --- /dev/null +++ b/board/uma/patches/02_TT_USB_TestCommands.patch @@ -0,0 +1,289 @@ +--- kernel/drivers/usb/core/devio.c 2014-10-29 06:26:34.000000000 +0530 ++++ kernel/drivers/usb/core/devio.c 2015-01-22 10:40:00.000000000 +0530 +@@ -1542,6 +1542,231 @@ + + return 0; + } ++#define CONFIG_PACE_TT_USB_COMMANDS 1 ++/* Pace change */ ++#if defined(CONFIG_PACE_TT_USB_COMMANDS) ++#define DBGTEST(arg) printk arg ++static int proc_usb_test(struct dev_state *ps, void *arg) ++{ ++ struct usb_device *pRootHub = ps->dev; ++ struct usb_device *pDevice; ++ struct usbdevfs_usb_test TestInfo; ++ int port_num; ++ int ret; ++ unsigned int response = 0; ++ char *buf; ++ int index, len; ++ u16 portchange = 0; ++ u16 portstatus = 0; ++ struct usb_port_status *portsts; ++ ++ if (!pRootHub) ++ { ++ DBGTEST(("USB_TEST: pRootHub is NULL\n")); ++ return -EINVAL; ++ } ++ DBGTEST(("USB_TEST: pRootHub is valid\n")); ++ ++ /* usb_show_device(pRootHub); */ ++ ++ if (copy_from_user(&TestInfo, (void *)arg, sizeof(TestInfo))) ++ return -EFAULT; ++ ++ DBGTEST(("USB_TEST: --> Port %d, action %d, response=%u\n", ++ TestInfo.port_num, TestInfo.action, TestInfo.response)); ++ ++ port_num = TestInfo.port_num; ++ ret = 0; ++ if (port_num < 0) ++ { ++ pDevice = pRootHub; ++ } ++ else ++ { ++ DBGTEST(("USB_TEST: Hub max children %d", pRootHub->maxchild)); ++ if ((pRootHub->maxchild) && (port_num < USB_MAXCHILDREN)) ++ { ++ port_num=1; ++ pDevice=usb_hub_find_child(pRootHub,port_num); ++ } ++ else ++ { ++ DBGTEST(("USB_TEST: max child failed ---------------")); ++ return -EINVAL; ++ } ++ } ++ ++ DBGTEST(("USB_TEST: pDevice %d\n", pDevice)); ++ ++ switch (TestInfo.action) ++ { ++ case TEST_DEVICE_CONNECTED: ++ response = (pDevice)?1:0; ++ DBGTEST(("USB_TEST: The response is %d ret %d", response, ret)); ++ break; ++ ++ case TEST_POWER_OFF: ++ /* ++ info("USB_TEST: --> Port %d, POWER OFF, response=%u", TestInfo.port_num, TestInfo.response); ++ info("USB_TEST: Hub [0x%08x] max children %d", pRootHub, pRootHub->maxchild); ++ for (index=0; index < pRootHub->maxchild; index++) ++ { ++ info("USB_TEST: Child %d = [0x%08x]", index, pRootHub->children[index]); ++ } ++ */ ++ ret = usb_control_msg(pRootHub, usb_sndctrlpipe(pRootHub, 0), ++ USB_REQ_CLEAR_FEATURE, USB_RT_PORT, USB_PORT_FEAT_POWER, ++ port_num /*+ 1*/, NULL, 0, HZ); ++ if (ret < 0) { ++ printk("HUB_PORT: --> %s (%d) failed (err = %d)", __FUNCTION__, pDevice->devnum, ret); ++ } ++ ++ /* disconnect device if any */ ++ /* if (pRootHub->children[port_num]) ++ usb_disconnect(&pRootHub->children[port_num]); ++ ++ */ ++ ++ break; ++ ++ case TEST_POWER_ON: ++ ret = usb_control_msg (pRootHub, usb_sndctrlpipe(pRootHub, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, USB_PORT_FEAT_POWER, ++ port_num /*+ 1*/, NULL, 0, HZ); ++ if (ret < 0) { ++ printk("HUB_PORT: --> %s (%d) failed (err = %d)", __FUNCTION__, pDevice->devnum, ret); ++ } ++ break; ++ ++ case TEST_PORT_STATUS: ++ portsts = kmalloc(sizeof(*portsts), GFP_KERNEL); ++ if (portsts) { ++ ret = usb_control_msg(pRootHub, usb_rcvctrlpipe(pRootHub, 0), ++ USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, ++ port_num /*+ 1*/, portsts, sizeof(struct usb_hub_status), HZ); ++ if (ret < 0) { ++ printk("HUB_PORT: --> %s (%d) failed (err = %d)", __FUNCTION__, pRootHub->devnum, ret); ++ } ++ else { ++ portstatus = le16_to_cpu(portsts->wPortStatus); ++ portchange = le16_to_cpu(portsts->wPortChange); ++ DBGTEST(("port %d, portstatus 0x%04x, change 0x%04x", port_num, portstatus, portchange)); ++ response = portstatus; ++ } ++ kfree(portsts); ++ } ++ break; ++ ++ case TEST_SPEED: ++ if (!pDevice) ++ { ++ response = 3; ++ break; ++ } ++ switch (pDevice->speed) ++ { ++ case USB_SPEED_LOW: ++ response = 0; break; ++ case USB_SPEED_FULL: ++ response = 1; break; ++ case USB_SPEED_HIGH: ++ response = 2;break; ++ case USB_SPEED_SUPER: ++ response = 4; break; ++ default: ++ response = 3; break; ++ } ++ break; ++ ++ case TEST_VENDOR_ID: ++ if (pDevice) ++ { ++ response = (pDevice->descriptor.idVendor << 16) | pDevice->descriptor.idProduct; ++ } ++ else ++ { ++ response = 0; ++ } ++ break; ++ ++ case TEST_DEVICE_MS: ++ if (!pDevice) ++ { ++ response = 0; ++ break; ++ } ++ if((pDevice->config->interface[0]->altsetting->desc.bInterfaceClass == 8) ++ &&(pDevice->config->interface[0]->altsetting->desc.bInterfaceSubClass == 6)) ++ response = 1; ++ else ++ response = 0; ++ break; ++ ++ case TEST_STRING_MANUF: ++ case TEST_STRING_PROD: ++ case TEST_STRING_SERNUM: ++ if (!pDevice) ++ { ++ response = 0; ++ break; ++ } ++ if (TestInfo.action == TEST_STRING_MANUF) ++ index = pDevice->descriptor.iManufacturer; ++ else if (TestInfo.action == TEST_STRING_PROD) ++ index = pDevice->descriptor.iProduct; ++ else ++ index = pDevice->descriptor.iSerialNumber; ++ ++ if (!index) ++ { ++ response = 0; ++ ret = 0; ++ } ++ else if (!(buf = kmalloc(256, GFP_KERNEL))) ++ { ++ /* failed to allocate buffer */ ++ ret = -ENOMEM; ++ } ++ else if ((len = usb_string(pDevice, index, buf, 256)) <= 0) ++ { ++ /* failed to get string */ ++ kfree(buf); ++ } ++ ++ else ++ { ++ DBGTEST(("KERN_INFO %s\n", buf)); ++ if (copy_to_user((void *)TestInfo.pBuf, buf, len)) ++ { ++ DBGTEST(("USB_TEST: --> Failed to copy to user")); ++ ret = -EFAULT; ++ } ++ else ++ { ++ response = 1; ++ } ++ kfree(buf); ++ } ++ break; ++ ++ default: ++ break; ++ ++ } /* End of switch() */ ++ TestInfo.response = response; ++ if (copy_to_user((void *)arg, &TestInfo, sizeof(TestInfo))) ++ { ++ DBGTEST(("USB_TEST: --> Failed to copy to user")); ++ ret = -EFAULT; ++ } ++ else ++ ret = 0; ++ ++ DBGTEST(("USB_TEST: --> The response is %d return %d\n", TestInfo.response, ret)); ++ ++ return ret; ++} ++#endif /* #ifdef PACE_TT_USB_COMMANDS */ + + static int processcompl(struct async *as, void __user * __user *arg) + { +@@ -2058,6 +2283,12 @@ + snoop(&dev->dev, "%s: SETCONFIGURATION\n", __func__); + ret = proc_setconfig(ps, p); + break; ++#if defined (CONFIG_PACE_TT_USB_COMMANDS) ++ /* Pace change */ ++ case USBDEVFS_TEST: ++ ret = proc_usb_test(ps, (void *)p); ++ break; ++#endif /* #ifdef PACE_TT_USB_COMMANDS */ + + case USBDEVFS_SUBMITURB: + snoop(&dev->dev, "%s: SUBMITURB\n", __func__); + +--- kernel/include/linux/usbdevice_fs.h 2014-10-29 06:26:35.000000000 +0530 ++++ kernel/include/linux/usbdevice_fs.h 2015-01-14 15:56:27.000000000 +0530 +@@ -30,6 +30,30 @@ + + #include + ++#define CONFIG_PACE_TT_USB_COMMANDS 1 ++/* RT210911 Pace change */ ++#if defined (CONFIG_PACE_TT_USB_COMMANDS) ++typedef enum { ++ TEST_SPEED = 0, ++ TEST_POWER_OFF, ++ TEST_POWER_ON, ++ TEST_PORT_STATUS, ++ TEST_VENDOR_ID, ++ TEST_DEVICE_MS, ++ TEST_DEVICE_CONNECTED, ++ TEST_STRING_SERNUM, ++ TEST_STRING_PROD, ++ TEST_STRING_MANUF, ++ TEST_LAST ++} usb_test_code; ++ ++struct usbdevfs_usb_test { ++ int port_num; ++ usb_test_code action; ++ unsigned int response; ++ char * pBuf; ++}; ++#endif + #ifdef CONFIG_COMPAT + #include + +@@ -77,4 +101,7 @@ + compat_caddr_t data; + }; + #endif ++#if defined (CONFIG_PACE_TT_USB_COMMANDS) ++ #define USBDEVFS_TEST _IOWR('U', 26, struct usbdevfs_usb_test) ++#endif //#ifdef TT_USB_SUPPORT + #endif /* _LINUX_USBDEVICE_FS_H */ diff --git a/board/uma/patches/03_kstorman.patch b/board/uma/patches/03_kstorman.patch new file mode 100644 index 000000000000..0a609f5d9d75 --- /dev/null +++ b/board/uma/patches/03_kstorman.patch @@ -0,0 +1,1046 @@ +diff -Naur CURRENT/drivers/Kconfig PATCHED/drivers/Kconfig +--- CURRENT/drivers/Kconfig 2015-08-21 12:25:32.307164000 +0000 ++++ PATCHED/drivers/Kconfig 2015-08-21 12:25:32.440165095 +0000 +@@ -4,6 +4,8 @@ + + source "drivers/bus/Kconfig" + ++source "drivers/kstorman/Kconfig" ++ + source "drivers/connector/Kconfig" + + source "drivers/mtd/Kconfig" +diff -Naur CURRENT/drivers/Makefile PATCHED/drivers/Makefile +--- CURRENT/drivers/Makefile 2015-08-21 12:25:32.307164000 +0000 ++++ PATCHED/drivers/Makefile 2015-08-21 12:25:32.442165103 +0000 +@@ -14,6 +14,7 @@ + obj-y += pinctrl/ + obj-y += gpio/ + obj-y += pwm/ ++obj-$(CONFIG_KSTORMAN_DRIVER) += kstorman/ + obj-$(CONFIG_PCI) += pci/ + obj-$(CONFIG_PARISC) += parisc/ + obj-$(CONFIG_RAPIDIO) += rapidio/ +diff -Naur CURRENT/drivers/kstorman/Kconfig PATCHED/drivers/kstorman/Kconfig +--- CURRENT/drivers/kstorman/Kconfig 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/drivers/kstorman/Kconfig 2015-08-21 12:25:32.440165095 +0000 +@@ -0,0 +1,7 @@ ++ config KSTORMAN_DRIVER ++ bool "kstorman driver" ++ depends on BLK_DEV ++ depends on MD ++ help ++ activate the kstorman driver for device infos ++ +diff -Naur CURRENT/drivers/kstorman/Makefile PATCHED/drivers/kstorman/Makefile +--- CURRENT/drivers/kstorman/Makefile 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/drivers/kstorman/Makefile 2015-08-21 12:25:32.441165099 +0000 +@@ -0,0 +1 @@ ++obj-$(CONFIG_KSTORMAN_DRIVER) += kstorman.o kstorman_driver.o +diff -Naur CURRENT/drivers/kstorman/kstorman.c PATCHED/drivers/kstorman/kstorman.c +--- CURRENT/drivers/kstorman/kstorman.c 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/drivers/kstorman/kstorman.c 2015-08-21 12:25:32.441165099 +0000 +@@ -0,0 +1,476 @@ ++/* ++ * kstorman.c ++ * ++ * This file contains the implementation of the storman ++ * core functions. ++ * ++ * Created by Pace on 19/07/13. ++ * ++ */ ++ ++#include "kstorman_priv.h" ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../../fs/mount.h" ++#include "../usb/storage/usb.h" ++#include "../md/dm.h" ++ ++/*#define KSTORMAN_CORE_PRINT_DBG*/ ++ ++/*********************************************************************************************** ++ * ++ * static functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * Copied from fs/namespace.c ++ */ ++static struct mount *next_mnt(struct mount *p, struct mount *root) ++{ ++ struct list_head *next = p->mnt_mounts.next; ++ if (next == &p->mnt_mounts) { ++ while (1) { ++ if (p == root) ++ return NULL; ++ next = p->mnt_child.next; ++ if (next != &p->mnt_parent->mnt_mounts) ++ break; ++ p = p->mnt_parent; ++ } ++ } ++ return list_entry(next, struct mount, mnt_child); ++} ++ ++ ++static int set_mount_infos ( kstorman_ioc_getmounts_t *mountlist, struct mount *s ) ++{ ++ struct path mnt_path = { .dentry = s->mnt.mnt_root, .mnt = &s->mnt }; ++ char *pathname; ++ char *tmp; ++ ++ if ((mountlist->mounts_nb + 1) == KSTORMAN_MOUNTLIST_MAXSIZE) ++ return 1; ++ ++ tmp = (char *)__get_free_page(GFP_TEMPORARY); ++ ++ if (!tmp) { ++ return -ENOMEM; ++ } ++ ++ pathname = d_path(&mnt_path, tmp, PAGE_SIZE); ++ ++ if (IS_ERR(pathname)) { ++ free_page((unsigned long)tmp); ++ return PTR_ERR(pathname); ++ } ++ ++ /* ++ * fill mount list ++ */ ++ strncpy (mountlist->mounts[mountlist->mounts_nb].device, s->mnt_devname, KSTORMAN_STR_MAXSIZE); ++ strncpy (mountlist->mounts[mountlist->mounts_nb].dir, pathname, KSTORMAN_STR_MAXSIZE); ++ strncpy (mountlist->mounts[mountlist->mounts_nb].type, s->mnt.mnt_sb->s_type->name, KSTORMAN_STR_MAXSIZE); ++ mountlist->mounts[mountlist->mounts_nb].flags = s->mnt.mnt_flags; ++ ++ ++ /* ++ * Print for debug ++ */ ++#ifdef KSTORMAN_CORE_PRINT_DBG ++ printk ("%s on %s", mountlist->mounts[mountlist->mounts_nb].device, mountlist->mounts[mountlist->mounts_nb].dir); ++ ++ printk (" type %s", mountlist->mounts[mountlist->mounts_nb].type); ++ ++ printk (mountlist->mounts[mountlist->mounts_nb].flags & MNT_READONLY ? " (ro" : " (rw"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_NOSUID) printk (",nosuid"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_NODEV) printk (",nodev"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_NOEXEC) printk (",noexec"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_NOATIME) printk (",noatime"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_NODIRATIME) printk (",nodiratime"); ++ if (mountlist->mounts[mountlist->mounts_nb].flags & MNT_RELATIME) printk (",relatime"); ++ ++ printk (")\n"); ++#endif ++ ++ free_page((unsigned long)tmp); ++ ++ mountlist->mounts_nb++; ++ ++ return 0; ++} ++ ++ ++static struct ata_device *ata_find_dev(struct ata_port *ap, int devno) ++{ ++ if (!sata_pmp_attached(ap)) { ++ if (likely(devno < ata_link_max_devices(&ap->link))) ++ return &ap->link.device[devno]; ++ } else { ++ if (likely(devno < ap->nr_pmp_links)) ++ return &ap->pmp_link[devno].device[0]; ++ } ++ ++ return NULL; ++} ++ ++static struct ata_device *__ata_scsi_find_dev(struct ata_port *ap, ++ const struct scsi_device *scsidev) ++{ ++ int devno; ++ ++ /* skip commands not addressed to targets we simulate */ ++ if (!sata_pmp_attached(ap)) { ++ if (unlikely(scsidev->channel || scsidev->lun)) ++ return NULL; ++ devno = scsidev->id; ++ } else { ++ if (unlikely(scsidev->id || scsidev->lun)) ++ return NULL; ++ devno = scsidev->channel; ++ } ++ ++ return ata_find_dev(ap, devno); ++} ++ ++/** ++ * ata_scsi_find_dev - lookup ata_device from scsi_cmnd ++ * @ap: ATA port to which the device is attached ++ * @scsidev: SCSI device from which we derive the ATA device ++ * ++ * Given various information provided in struct scsi_cmnd, ++ * map that onto an ATA bus, and using that mapping ++ * determine which ata_device is associated with the ++ * SCSI command to be sent. ++ * ++ * LOCKING: ++ * spin_lock_irqsave(host lock) ++ * ++ * RETURNS: ++ * Associated ATA device, or %NULL if not found. ++ */ ++static struct ata_device * ++ata_scsi_find_dev(struct ata_port *ap, const struct scsi_device *scsidev) ++{ ++ struct ata_device *dev = __ata_scsi_find_dev(ap, scsidev); ++ ++ if (unlikely(!dev || !ata_dev_enabled(dev))) ++ return NULL; ++ ++ return dev; ++} ++ ++static int set_block_infos ( kstorman_ioc_getblocks_t *blocklist, struct gendisk *disk ) ++{ ++ struct mapped_device *mp; ++ struct dm_table *map; ++ struct dm_dev_internal *dd; ++ struct device *device = disk_to_dev (disk); ++ struct device *dev = NULL; ++ struct scsi_device *scsi_dev = NULL; ++ struct Scsi_Host *scsi_host = NULL; ++ struct scsi_target *scsi_targ = NULL; ++ struct ata_port *ap; ++ struct ata_device *atadev; ++ struct us_data *usb_data; ++ struct list_head *devices; ++ int srcu_idx; ++ ++ if ((blocklist->blkdevs_nb + 1) == KSTORMAN_BLKDEVLIST_MAXSIZE) ++ return 1; ++ ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].name, disk->disk_name, KSTORMAN_STR_MAXSIZE); ++ blocklist->blkdevs[blocklist->blkdevs_nb].major = disk->major; ++ blocklist->blkdevs[blocklist->blkdevs_nb].minor = disk->first_minor; ++ ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].bus, "unknown", KSTORMAN_STR_MAXSIZE); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].type, "unknown", KSTORMAN_STR_MAXSIZE); ++ ++ ++ if ( disk->driverfs_dev != NULL && disk->driverfs_dev->type != NULL ++ && ( !strcmp (disk->driverfs_dev->type->name, "scsi_device") ++ || !strcmp (disk->driverfs_dev->type->name, "mtd"))) ++ { ++ if (device) ++ { ++ dev = device; ++ ++ while (dev != NULL) ++ { ++ if (dev->type) ++ { ++ if (!strcmp(dev->type->name, "scsi_device")) ++ { ++ scsi_dev = to_scsi_device (dev); ++ if (scsi_dev) ++ { ++ scsi_host = scsi_dev->host; ++ scsi_targ = scsi_dev->sdev_target; ++ ++ if (!strcmp(scsi_host->hostt->name, "ahci_platform")) ++ { ++ ap = ata_shost_to_port(scsi_dev->host); ++ if (ap) ++ { ++ atadev = ata_scsi_find_dev(ap, scsi_dev); ++ if (atadev) ++ { ++ snprintf ( blocklist->blkdevs[blocklist->blkdevs_nb].bus, KSTORMAN_STR_MAXSIZE, ++ "ata%u.%02u", atadev->link->ap->print_id, atadev->link->pmp + atadev->devno); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].type, "ata", KSTORMAN_STR_MAXSIZE); ++ } ++ } ++ } ++ else if (!strcmp(scsi_host->hostt->name, "usb-storage")) ++ { ++ usb_data = (struct us_data *) scsi_host->hostdata; ++ ++ snprintf ( blocklist->blkdevs[blocklist->blkdevs_nb].bus, KSTORMAN_STR_MAXSIZE, ++ "%s %s", dev_driver_string (&(usb_data->pusb_dev->dev)), ++ dev_name(&(usb_data->pusb_dev->dev))); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].type, "usb", KSTORMAN_STR_MAXSIZE); ++ ++ } ++ } ++ break; ++ } ++ else if (!strcmp(dev->type->name, "mtd")) ++ { ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].bus, "mtd", KSTORMAN_STR_MAXSIZE); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].type, "mtd", KSTORMAN_STR_MAXSIZE); ++ break; ++ } ++ } ++ ++ dev = dev->parent; ++ } ++ } ++ } ++ else ++ { ++ mp = dm_get_md(disk_to_dev(disk)->devt); ++ ++ if (mp) ++ { ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].bus, "dev-mapper", KSTORMAN_STR_MAXSIZE); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].type, "dev-mapper", KSTORMAN_STR_MAXSIZE); ++ ++ map = dm_get_live_table(mp,&srcu_idx); ++ ++ if (map) { ++ struct list_head *tmp, *next; ++ devices = dm_table_get_devices(map); ++ ++ list_for_each_safe(tmp, next, devices) { ++ dd = list_entry(tmp, struct dm_dev_internal, list); ++ strncpy (blocklist->blkdevs[blocklist->blkdevs_nb].mapped_to, dd->dm_dev.name, KSTORMAN_STR_MAXSIZE); ++ } ++ ++ dm_put_live_table(mp, srcu_idx); ++ } ++ ++ dm_put (mp); ++ } ++ } ++ ++ ++ /* ++ * Print for debug ++ */ ++#ifdef KSTORMAN_CORE_PRINT_DBG ++ printk ("disk_name=%s\n", blocklist->blkdevs[blocklist->blkdevs_nb].name); ++ printk ("major=%i\n", blocklist->blkdevs[blocklist->blkdevs_nb].major); ++ printk ("first minor=%i\n", blocklist->blkdevs[blocklist->blkdevs_nb].minor); ++ printk ("type=%s\n", blocklist->blkdevs[blocklist->blkdevs_nb].type); ++ printk ("bus=%s\n", blocklist->blkdevs[blocklist->blkdevs_nb].bus); ++#endif ++ ++ blocklist->blkdevs_nb++; ++ ++ return 0; ++} ++ ++/*********************************************************************************************** ++ * ++ * core functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * kstorman_core_init ++ */ ++int kstorman_core_init ( void ) ++{ ++ return 0; ++} ++ ++/* ++ * kstorman_core_cleanup ++ */ ++void kstorman_core_cleanup ( void ) ++{ ++ return; ++} ++ ++/* ++ * kstorman_core_getmounts ++ */ ++int kstorman_core_getmounts ( kstorman_ioc_getmounts_t *mountlist ) ++{ ++ struct nsproxy *nsproxy; ++ struct mnt_namespace *namespace = NULL; ++ struct mount *r = NULL; ++ int ret = 0; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ memset (mountlist, 0, sizeof (kstorman_ioc_getmounts_t)); ++ mountlist->mounts_nb = 0; ++ ++ rcu_read_lock(); ++ nsproxy = task_nsproxy(current); ++ if (nsproxy != NULL) { ++ ++ namespace = rcu_dereference(nsproxy->mnt_ns); ++ get_mnt_ns(namespace); ++ ++ } ++ ++ rcu_read_unlock(); ++ ++ if (namespace != NULL) ++ { ++ if ((ret = set_mount_infos (mountlist, namespace->root))) ++ { ++ put_mnt_ns(namespace); ++ return ret; ++ } ++ ++ list_for_each_entry(r, &namespace->root->mnt_mounts, mnt_child) ++ { ++ struct mount *s; ++ ++ for (s = r; s; s = next_mnt(s, r)) { ++ if (s != NULL) ++ { ++ if ((ret = set_mount_infos (mountlist, s))) ++ { ++ put_mnt_ns(namespace); ++ return ret; ++ } ++ } ++ } ++ } ++ ++ } ++ else ++ ret = 1; ++ ++ put_mnt_ns(namespace); ++ return ret; ++} ++ ++/*src/Broadcom/kernel/kernel-current/Documentation/RCU/lockdep.txt ++ * kstorman_core_getblocks ++ */ ++int kstorman_core_getblocks ( kstorman_ioc_getblocks_t *blocklist ) ++{ ++ struct class_dev_iter iter; ++ struct device *dev; ++ int ret = 0; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ blocklist->blkdevs_nb = 0; ++ ++ class_dev_iter_init(&iter, &block_class, NULL, NULL); ++ while ((dev = class_dev_iter_next(&iter))) { ++ ++ struct gendisk *disk; ++ ++ if (strcmp(dev->type->name, "disk")) ++ continue; ++ ++ disk = dev_to_disk(dev); ++ ++ if (get_capacity(disk) == 0 || ++ (disk->flags & GENHD_FL_SUPPRESS_PARTITION_INFO)) ++ continue; ++ ++ if ( (ret = set_block_infos ( blocklist, disk ))) break; ++ ++ } ++ class_dev_iter_exit(&iter); ++ ++ return ret; ++} ++ ++ ++/* ++ * kstorman_core_getmmtd ++ */ ++int kstorman_core_getmtd ( kstorman_ioc_getmtd_t *mtdlist ) ++{ ++ struct mtd_info *mtd_info = NULL; ++ int num; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ mtdlist->mtd_nb = 0; ++ ++ for(num = 0; num < 64; num++) { ++ if ((mtdlist->mtd_nb + 1) == KSTORMAN_MTDLIST_MAXSIZE) ++ return 1; ++ ++ mtd_info = get_mtd_device(NULL, num); ++ if(IS_ERR(mtd_info)) { ++ continue; ++ } ++ ++ strncpy (mtdlist->mtd[mtdlist->mtd_nb].name, mtd_info->name, KSTORMAN_STR_MAXSIZE); ++ mtdlist->mtd[mtdlist->mtd_nb].index = mtd_info->index; ++ mtdlist->mtd[mtdlist->mtd_nb].type = mtd_info->type; ++ ++ /* ++ * Print for debug ++ */ ++#ifdef KSTORMAN_CORE_PRINT_DBG ++ printk("MTD name: %s\n", mtdlist->mtd[mtdlist->mtd_nb].name); ++ printk("MTD index: mtd%i\n", mtdlist->mtd[mtdlist->mtd_nb].index); ++ printk("MTD type: %u\n", mtdlist->mtd[mtdlist->mtd_nb].type); ++#endif ++ ++ mtdlist->mtd_nb++; ++ } ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ return 0; ++} ++ +diff -Naur CURRENT/drivers/kstorman/kstorman_driver.c PATCHED/drivers/kstorman/kstorman_driver.c +--- CURRENT/drivers/kstorman/kstorman_driver.c 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/drivers/kstorman/kstorman_driver.c 2015-08-21 12:25:32.441165099 +0000 +@@ -0,0 +1,359 @@ ++/* ++ * kstorman_driver.c ++ * ++ * This file contains the implementation of the storman ++ * interface module with the user space. ++ * ++ * Created by Pace on 19/07/13. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "kstorman_priv.h" ++ ++MODULE_AUTHOR ("Pace"); ++MODULE_DESCRIPTION ("kstorman interface"); ++MODULE_SUPPORTED_DEVICE (""); ++MODULE_LICENSE ("GPL"); ++ ++ ++/* ++ * ++ * Module param ++ * ++ */ ++static int kstorman_major = 0; ++ ++module_param (kstorman_major, int, 0644); ++MODULE_PARM_DESC (kstorman_major, "Device major number"); ++ ++ ++/* ++ * ++ * Module data ++ * ++ */ ++static kstorman_info_t kstorman_info; ++char connected_id[KSTORMAN_MAX_CONNECT]; ++ ++/*********************************************************************************************** ++ * ++ * ioctl functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * kstorman_getmounts_ioc ++ * ++ */ ++int kstorman_getmounts_ioc (kstorman_ioc_getmounts_t *mountlist) ++{ ++ int ret; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ ret = kstorman_core_getmounts (mountlist); ++ ++ return ret; ++} ++ ++ ++/* ++ * ++ * kstorman_getblocks_ioc ++ * ++ */ ++int kstorman_getblocks_ioc (kstorman_ioc_getblocks_t *blocklist) ++{ ++ int ret; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ ret = kstorman_core_getblocks (blocklist); ++ ++ return ret; ++} ++ ++/* ++ * ++ * kstorman_getmtd_ioc ++ * ++ */ ++int kstorman_getmtd_ioc (kstorman_ioc_getmtd_t *mtdlist) ++{ ++ int ret; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ ret = kstorman_core_getmtd(mtdlist); ++ ++ return ret; ++} ++ ++ ++ ++ ++/*********************************************************************************************** ++ * ++ * Char device functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * kstorman_open ++ * ++ */ ++int kstorman_open(struct inode *inode, struct file *filp) ++{ ++ int i; ++ ++ kstorman_data_t *priv_data; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ logkstorman("opened = %i\n", (int) kstorman_info.opened); ++ ++ if(!kstorman_info.opened) /* If first open */ ++ { ++ logkstorman("opening kstorman\n"); ++ ++ kstorman_info.opened = 1; ++ } ++ ++ if ( kstorman_info.connected < KSTORMAN_MAX_CONNECT ) ++ { ++ kstorman_info.connected++; ++ ++ /* Alloc priv_data */ ++ priv_data = (kstorman_data_t *) kmalloc(sizeof(kstorman_data_t), GFP_ATOMIC); ++ if ( priv_data == NULL ) ++ { ++ logkstorman("kmalloc error\n"); ++ return -ENOMEM; ++ } ++ ++ priv_data->infos = &kstorman_info; ++ ++ for (i = 0; i < KSTORMAN_MAX_CONNECT; i++) ++ { ++ if (connected_id[i] == 0) ++ { ++ priv_data->id = i; ++ connected_id[i] = 1; ++ break; ++ } ++ } ++ ++ if (!filp->private_data) ++ filp->private_data = priv_data; ++ } ++ else ++ { ++ logkstorman("kstorman already opened\n"); ++ return -EBUSY; ++ } ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ return 0; /* success */ ++} ++ ++ ++/* ++ * ++ * kstorman_release ++ * ++ */ ++int kstorman_release(struct inode *inode, struct file *filp) ++{ ++ kstorman_data_t *priv_data; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ priv_data = (kstorman_data_t *)filp->private_data; ++ ++ connected_id[priv_data->id] = 0; ++ ++ if( kstorman_info.connected ) kstorman_info.connected--; ++ ++ kfree (priv_data); ++ ++ if (filp->private_data) ++ filp->private_data = NULL; ++ ++ if (!kstorman_info.connected) ++ kstorman_info.opened = 0; ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ return 0; ++} ++ ++ ++/* ++ * ++ * kstorman_ioctl ++ * ++ */ ++long kstorman_ioctl (struct file *filp, unsigned int cmd, unsigned long arg) ++{ ++ int err = 0; ++ ++ kstorman_data_t *priv_data; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ priv_data = (kstorman_data_t *)filp->private_data; ++ ++ /* ++ * Check IOC ++ */ ++ if (_IOC_TYPE(cmd) != KSTORMAN_IOC_MAGIC) return -ENOTTY; ++ if (_IOC_NR(cmd) > KSTORMAN_IOC_MAXNR) return -ENOTTY; ++ ++ if (_IOC_DIR(cmd) & _IOC_READ) ++ err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd)); ++ else if (_IOC_DIR(cmd) & _IOC_WRITE) ++ err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd)); ++ if (err) return -EFAULT; ++ ++ switch(cmd) ++ { ++ case KSTORMAN_IOC_GETMOUNTS: ++ err = kstorman_getmounts_ioc (&priv_data->mountlist); ++ ++ if (!err) ++ { ++ copy_to_user( (kstorman_ioc_getmounts_t __user *)arg, &priv_data->mountlist, sizeof(kstorman_ioc_getmounts_t)); ++ } ++ break; ++ case KSTORMAN_IOC_GETBLOCKS: ++ err = kstorman_getblocks_ioc (&priv_data->blocklist); ++ ++ if (!err) ++ { ++ copy_to_user( (kstorman_ioc_getblocks_t __user *)arg, &priv_data->blocklist, sizeof(kstorman_ioc_getblocks_t)); ++ } ++ break; ++ case KSTORMAN_IOC_GETMTD: ++ err = kstorman_getmtd_ioc (&priv_data->mtdlist); ++ ++ if (!err) ++ { ++ copy_to_user( (kstorman_ioc_getmtd_t __user *)arg, &priv_data->mtdlist, sizeof(kstorman_ioc_getmtd_t)); ++ } ++ break; ++ default: ++ return -ENOTTY; ++ } ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ if (err) return -EFAULT; ++ ++ return err; ++} ++ ++struct file_operations kstorman_fops = { ++ open: kstorman_open, ++ release: kstorman_release, ++ unlocked_ioctl: kstorman_ioctl, ++ owner: THIS_MODULE, ++}; ++ ++ ++ ++ ++/*********************************************************************************************** ++ * ++ * init and exit functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * kstorman_init ++ * ++ */ ++static int __init kstorman_init(void) ++{ ++ int result; ++ int i; ++ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ /* ++ * Register char kstorman device ++ */ ++ result = register_chrdev(kstorman_major, KSTORMAN_NAME, &kstorman_fops); ++ if (result < 0) ++ { ++ logkstorman(KERN_WARNING "kstorman: can't get major %d\n",kstorman_major); ++ return result; ++ } ++ ++ if (kstorman_major == 0) kstorman_major = result; /* dynamic */ ++ ++ logkstorman("kstorman device created with %i major number\n", kstorman_major); ++ ++ /* ++ * Init kstorman_info ++ */ ++ kstorman_info.opened = 0; ++ kstorman_info.connected = 0; ++ ++ for (i = 0; i < KSTORMAN_MAX_CONNECT; i++) ++ connected_id[i] = 0; ++ ++ /* ++ * Init kstorman core ++ */ ++ if (kstorman_core_init ()) ++ return ENOMEM; ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ return 0; ++} ++ ++ ++/* ++ * ++ * kstorman_cleanup ++ * ++ */ ++static void __exit kstorman_cleanup(void) ++{ ++ logkstorman("enter %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++ ++ /* ++ * Init kstorman core ++ */ ++ kstorman_core_cleanup (); ++ ++ /* ++ * Uninit kstorman_info ++ */ ++ ++ ++ /* ++ * Unregister char kstorman device ++ */ ++ unregister_chrdev(kstorman_major, KSTORMAN_NAME); ++ ++ logkstorman("exit %s [%s:%d]\n", __FUNCTION__, __FILE__, __LINE__); ++} ++ ++module_init(kstorman_init); ++module_exit(kstorman_cleanup); ++ +diff -Naur CURRENT/drivers/kstorman/kstorman_priv.h PATCHED/drivers/kstorman/kstorman_priv.h +--- CURRENT/drivers/kstorman/kstorman_priv.h 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/drivers/kstorman/kstorman_priv.h 2015-08-21 12:25:32.441165099 +0000 +@@ -0,0 +1,51 @@ ++/* ++ * kstorman_priv.h ++ * ++ * This file contains the implementation of the storman ++ * interface module with the user space. ++ * ++ * Created by Pace on 19/07/13. ++ * ++ */ ++ ++#ifndef KSTORMAN_PRIV_H ++#define KSTORMAN_PRIV_H ++ ++#include ++ ++/*#define KSTORMANDEBUG*/ ++ ++#ifdef KSTORMANDEBUG ++#define logkstorman(...) \ ++ printk("[KSTORMAN] "__VA_ARGS__); ++#else ++#define logkstorman(...) ++#endif ++ ++#define KSTORMAN_NAME "kstorman" ++ ++#define KSTORMAN_MAX_CONNECT 10 ++ ++typedef struct ++{ ++ char opened; ++ char connected; ++} kstorman_info_t; ++ ++typedef struct ++{ ++ int id; ++ kstorman_ioc_getmounts_t mountlist; ++ kstorman_ioc_getblocks_t blocklist; ++ kstorman_ioc_getmtd_t mtdlist; ++ kstorman_info_t* infos; ++} kstorman_data_t; ++ ++int kstorman_core_init ( void ); ++void kstorman_core_cleanup ( void ); ++int kstorman_core_getmounts ( kstorman_ioc_getmounts_t *mountlist ); ++int kstorman_core_getblocks ( kstorman_ioc_getblocks_t *blocklist ); ++int kstorman_core_getmtd ( kstorman_ioc_getmtd_t *mtdlist ); ++ ++ ++#endif /* KSTORMAN_PRIV_H */ +diff -Naur CURRENT/include/uapi/linux/Kbuild PATCHED/include/uapi/linux/Kbuild +--- CURRENT/include/uapi/linux/Kbuild 2015-08-21 12:25:32.308164000 +0000 ++++ PATCHED/include/uapi/linux/Kbuild 2015-08-21 12:25:32.442165103 +0000 +@@ -215,6 +215,7 @@ + header-y += kexec.h + header-y += keyboard.h + header-y += keyctl.h ++header-y += kstorman.h + + ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/include/uapi/asm/kvm.h \ + $(srctree)/arch/$(SRCARCH)/include/asm/kvm.h),) +diff -Naur CURRENT/include/uapi/linux/kstorman.h PATCHED/include/uapi/linux/kstorman.h +--- CURRENT/include/uapi/linux/kstorman.h 1970-01-01 00:00:00.000000000 +0000 ++++ PATCHED/include/uapi/linux/kstorman.h 2015-08-21 12:25:32.442165103 +0000 +@@ -0,0 +1,94 @@ ++/* ++ * kstorman.h ++ * ++ * This file contains the implementation of the storman ++ * interface module with the user space. ++ * ++ * Created by Pace on 19/07/13. ++ * ++ */ ++ ++#ifndef KSTORMAN_H ++#define KSTORMAN_H ++ ++#include ++#include ++ ++/*********************************************************************************************** ++ * ++ * Structures ++ * ++ ***********************************************************************************************/ ++#define KSTORMAN_MOUNTLIST_MAXSIZE 100 ++#define KSTORMAN_BLKDEVLIST_MAXSIZE 100 ++#define KSTORMAN_MTDLIST_MAXSIZE 64 ++#define KSTORMAN_STR_MAXSIZE 100 ++ ++/* ++ * data for mount list ++ */ ++typedef struct ++{ ++ char device[KSTORMAN_STR_MAXSIZE + 1]; ++ char dir[KSTORMAN_STR_MAXSIZE + 1]; ++ char type[KSTORMAN_STR_MAXSIZE + 1]; ++ int flags; ++} kstorman_mount_t; ++ ++typedef struct ++{ ++ size_t mounts_nb; ++ kstorman_mount_t mounts[KSTORMAN_MOUNTLIST_MAXSIZE]; ++} kstorman_ioc_getmounts_t; ++ ++ ++/* ++ * data for block list ++ */ ++typedef struct ++{ ++ char name[KSTORMAN_STR_MAXSIZE + 1]; ++ int major; ++ int minor; ++ char type[KSTORMAN_STR_MAXSIZE + 1]; ++ char bus[KSTORMAN_STR_MAXSIZE + 1]; ++ char mapped_to[KSTORMAN_STR_MAXSIZE + 1]; ++} kstorman_blkdev_t; ++ ++typedef struct ++{ ++ size_t blkdevs_nb; ++ kstorman_blkdev_t blkdevs[KSTORMAN_BLKDEVLIST_MAXSIZE]; ++} kstorman_ioc_getblocks_t; ++ ++/* ++ * data for mtd list ++ */ ++typedef struct ++{ ++ char name[KSTORMAN_STR_MAXSIZE + 1]; ++ int index; ++ unsigned char type; ++} kstorman_mtd_t; ++ ++typedef struct ++{ ++ size_t mtd_nb; ++ kstorman_mtd_t mtd[KSTORMAN_MTDLIST_MAXSIZE]; ++} kstorman_ioc_getmtd_t; ++ ++/*********************************************************************************************** ++ * ++ * Ioctl ++ * ++ ***********************************************************************************************/ ++#define KSTORMAN_IOC_MAGIC 'y' ++ ++#define KSTORMAN_IOC_GETMOUNTS _IOR(KSTORMAN_IOC_MAGIC, 0, kstorman_ioc_getmounts_t*) ++#define KSTORMAN_IOC_GETBLOCKS _IOR(KSTORMAN_IOC_MAGIC, 1, kstorman_ioc_getblocks_t*) ++#define KSTORMAN_IOC_GETMTD _IOR(KSTORMAN_IOC_MAGIC, 2, kstorman_ioc_getmtd_t*) ++ ++#define KSTORMAN_IOC_MAXNR 2 ++ ++ ++#endif /* KSTORMAN_H */ diff --git a/board/uma/patches/04_jffs2_nooob_write.patch b/board/uma/patches/04_jffs2_nooob_write.patch new file mode 100644 index 000000000000..96d7100a4736 --- /dev/null +++ b/board/uma/patches/04_jffs2_nooob_write.patch @@ -0,0 +1,133 @@ +diff -Naur linux/fs/jffs2/fs.c linux.new/fs/jffs2/fs.c +--- linux/fs/jffs2/fs.c 2014-12-07 10:41:15.000000000 +0100 ++++ linux.new/fs/jffs2/fs.c 2015-03-11 12:20:19.093282577 +0100 +@@ -710,6 +710,8 @@ + int ret = 0; + + if (jffs2_cleanmarker_oob(c)) { ++ if(!jffs2_oob_write_enabled(c)) ++ pr_info("JFFS2 doesn't use OOB.\n"); + /* NAND flash... do setup accordingly */ + ret = jffs2_nand_flash_setup(c); + if (ret) +diff -Naur linux/fs/jffs2/os-linux.h linux.new/fs/jffs2/os-linux.h +--- linux/fs/jffs2/os-linux.h 2014-12-07 10:41:15.000000000 +0100 ++++ linux.new/fs/jffs2/os-linux.h 2015-03-11 12:20:19.085282544 +0100 +@@ -108,6 +108,7 @@ + #endif + + #define jffs2_cleanmarker_oob(c) (c->mtd->type == MTD_NANDFLASH) ++#define jffs2_oob_write_enabled(c) (c->mtd->flags & MTD_OOB_WRITEABLE) + + #define jffs2_wbuf_dirty(c) (!!(c)->wbuf_len) + +diff -Naur linux/fs/jffs2/wbuf.c linux.new/fs/jffs2/wbuf.c +--- linux/fs/jffs2/wbuf.c 2015-04-25 10:00:02.000000000 +0530 ++++ linux.new/fs/jffs2/wbuf.c 2016-05-20 11:59:27.370298022 +0530 +@@ -1037,6 +1037,9 @@ + int cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + struct mtd_oob_ops ops; + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = NR_OOB_SCAN_PAGES * c->oobavail; + ops.oobbuf = c->oobbuf; +@@ -1079,6 +1082,9 @@ + struct mtd_oob_ops ops; + int ret, cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = cmlen; + ops.oobbuf = c->oobbuf; +@@ -1104,6 +1110,9 @@ + struct mtd_oob_ops ops; + int cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = cmlen; + ops.oobbuf = (uint8_t *)&oob_cleanmarker; +@@ -1181,6 +1190,42 @@ + jffs2_dbg(1, "%s()\n", __func__); + } + ++static int jffs2_nand_clean_bad_blocks(struct jffs2_sb_info *c) ++{ ++ loff_t offs; ++ int good_block_thresold,blocks, good_blocks, bad_blocks; ++ struct erase_info instr; ++ ++ blocks = good_blocks = bad_blocks = 0; ++ ++ for(offs = 0; offs < c->mtd->size; offs += c->mtd->erasesize ) ++ { ++ if (mtd_block_isbad(c->mtd, offs)) ++ bad_blocks++; ++ blocks++; ++ } ++ good_blocks = blocks - bad_blocks; ++ good_block_thresold = blocks/4; ++ ++ if(good_blocks < good_block_thresold) ++ { ++ pr_info("%d good blocks not enough , erasing %d bad blocks\n",good_blocks,bad_blocks); ++ for(offs = 0; offs < c->mtd->size; offs += c->mtd->erasesize ) ++ { ++ if (mtd_block_isbad(c->mtd, offs)) ++ { ++ memset(&instr, 0, sizeof(instr)); ++ instr.mtd = c->mtd; ++ instr.addr = offs; ++ instr.len = c->mtd->erasesize; ++ instr.callback = NULL; ++ mtd_erase(c->mtd, &instr); ++ } ++ } ++ } ++ return 0; ++} ++ + int jffs2_nand_flash_setup(struct jffs2_sb_info *c) + { + struct nand_ecclayout *oinfo = c->mtd->ecclayout; +@@ -1197,6 +1242,8 @@ + } + + jffs2_dbg(1, "using OOB on NAND\n"); ++ ++ jffs2_nand_clean_bad_blocks(c); + + c->oobavail = oinfo->oobavail; + +diff -Naur linux/include/uapi/mtd/mtd-abi.h linux.new/include/uapi/mtd/mtd-abi.h +--- linux/include/uapi/mtd/mtd-abi.h 2014-12-07 10:41:16.000000000 +0100 ++++ linux.new/include/uapi/mtd/mtd-abi.h 2015-03-11 12:20:19.085282544 +0100 +@@ -103,6 +103,7 @@ + #define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ + #define MTD_NO_ERASE 0x1000 /* No erase necessary */ + #define MTD_POWERUP_LOCK 0x2000 /* Always locked after reset */ ++#define MTD_OOB_WRITEABLE 0x4000 /* Use Out-Of-Band area */ + + /* Some common devices / combinations of capabilities */ + #define MTD_CAP_ROM 0 +diff -Naur linux/fs/jffs2/erase.c linux.new/fs/jffs2/erase.c +--- linux/fs/jffs2/erase.c 2015-04-25 10:00:02.000000000 +0530 ++++ linux/fs/jffs2/erase.c 2016-05-13 17:59:29.433389720 +0530 +@@ -421,6 +421,10 @@ + ret = 0; + fail: + kfree(ebuf); ++ /* Sumil: buggy driver may return error on reading freshly erased block. ++ * Therer is no reason to mark block to bad because of the error returned by mtd_read() ++ */ ++ ret = 0; + return ret; + } + diff --git a/board/uma/patches/05_inherited-caps.patch b/board/uma/patches/05_inherited-caps.patch new file mode 100644 index 000000000000..1b4f519d6c77 --- /dev/null +++ b/board/uma/patches/05_inherited-caps.patch @@ -0,0 +1,22 @@ +diff -Naur CURRENT/security/commoncap.c PATCHED/security/commoncap.c +--- CURRENT/security/commoncap.c 2015-04-07 16:33:46.646312000 +0000 ++++ PATCHED/security/commoncap.c 2015-04-07 16:33:46.923313824 +0000 +@@ -280,8 +280,7 @@ + */ + static inline void bprm_clear_caps(struct linux_binprm *bprm) + { +- cap_clear(bprm->cred->cap_permitted); +- bprm->cap_effective = false; ++ return; + } + + /** +@@ -550,8 +549,6 @@ + + if (effective) + new->cap_effective = new->cap_permitted; +- else +- cap_clear(new->cap_effective); + bprm->cap_effective = effective; + + /* diff --git a/board/uma/patches/06_manage-hardlink-incpio.patch b/board/uma/patches/06_manage-hardlink-incpio.patch new file mode 100644 index 000000000000..e1e3ed78fc19 --- /dev/null +++ b/board/uma/patches/06_manage-hardlink-incpio.patch @@ -0,0 +1,117 @@ +diff -Naur CURRENT/init/initramfs.c PATCHED/init/initramfs.c +--- CURRENT/init/initramfs.c 2015-04-08 13:35:26.501091000 +0000 ++++ PATCHED/init/initramfs.c 2015-04-08 13:35:26.551091994 +0000 +@@ -311,7 +311,7 @@ + clean_path(collected, mode); + if (S_ISREG(mode)) { + int ml = maybe_link(); +- if (ml >= 0) { ++ /*if (ml >= 0)*/ { + int openflags = O_WRONLY|O_CREAT; + if (ml != 1) + openflags |= O_TRUNC; +diff -Naur CURRENT/scripts/gen_initramfs_list.sh PATCHED/scripts/gen_initramfs_list.sh +--- CURRENT/scripts/gen_initramfs_list.sh 2015-04-08 13:35:26.501091000 +0000 ++++ PATCHED/scripts/gen_initramfs_list.sh 2015-04-08 13:35:26.552091997 +0000 +@@ -11,7 +11,7 @@ + + # error out on errors + set -e +- ++all_files=() + usage() { + cat << EOF + Usage: +@@ -97,7 +97,11 @@ + } + + list_parse() { +- [ ! -L "$1" ] && echo "$1 \\" || : ++ if [ ! -f $1 ]; then ++ [ ! -L "$1" ] && echo "$1 \\" || : ++ else ++ [ ! -L "$1" ] && [[ ${x} != *container*rootfs* ]] && echo "$1 \\" || : ++ fi + } + + # for each file print a line in following format +@@ -112,6 +116,9 @@ + local uid="$3" + local gid="$4" + local ftype=$(filetype "${location}") ++ local rootfs_path=`echo ${ROOTFS_PATH}| sed -e "s#//#/#g" ` ++ local abshardlinks="" ++ local hardlink="" + # remap uid/gid to 0 if necessary + [ "$root_uid" = "squash" ] && uid=0 || [ "$uid" -eq "$root_uid" ] && uid=0 + [ "$root_gid" = "squash" ] && gid=0 || [ "$gid" -eq "$root_gid" ] && gid=0 +@@ -119,10 +126,40 @@ + + [ "${ftype}" = "invalid" ] && return 0 + [ "${location}" = "${srcdir}" ] && return 0 +- + case "${ftype}" in + "file") +- str="${ftype} ${name} ${location} ${str}" ++ ++ haslink=`find ${location} -type f -links +1` ++ if [[ $haslink ]]; then ++ abshardlinks=`find $rootfs_path -xdev -samefile $location` ++ abshardlinks=`echo ${abshardlinks}| sed -e "s#//#/#g" ` ++ hardlinks=` echo $abshardlinks | sed -e "s#$rootfs_path#/#g"` ++ found=0 ++ for hardlink in ${hardlinks[@]}; do ++ for i in ${all_files[@]}; do ++ #echo "test "$i" with "$hardlink ++ if [ "$i" = "$hardlink" ]; then ++ found=1 ++ break ++ #echo "found "$i ++ fi ++ if [ $found -eq 1 ]; then break;fi ++ done ++ done ++ if [ $found -eq 0 ]; then ++ # this link is not in our list ++ # we add it ++ #echo "Add "$location ++ #echo "hl:"$hardlinks ++ rela_name=` echo $location | sed -e "s#$rootfs_path#/#g"` ++ all_files=("${all_files[@]}" ${rela_name} ) ++ str="${ftype} ${name} ${location} ${str} ${hardlinks}" ++ else ++ str="" ++ fi ++ else ++ str="${ftype} ${name} ${location} ${str}" ++ fi + ;; + "nod") + local dev=`LC_ALL=C ls -l "${location}"` +@@ -155,7 +192,7 @@ + printf "by './' so that it won't be interpreted as an option." >&2 + printf "\n" >&2 + usage >&2 +- exit 1 ++// exit 1 + } + + list_header() { +@@ -172,7 +209,6 @@ + + srcdir=$(echo "$1" | sed -e 's://*:/:g') + dirlist=$(find "${srcdir}" -printf "%p %m %U %G\n") +- + # If $dirlist is only one line, then the directory is empty + if [ "$(echo "${dirlist}" | wc -l)" -gt 1 ]; then + ${dep_list}print_mtime "$1" +@@ -307,7 +343,8 @@ + fi + fi + cpio_tfile="$(mktemp ${TMPDIR:-/tmp}/cpiofile.XXXXXX)" +- usr/gen_init_cpio $timestamp ${cpio_list} > ${cpio_tfile} ++ sort ${cpio_list} > ${cpio_list}.sorted ++ usr/gen_init_cpio $timestamp ${cpio_list}.sorted > ${cpio_tfile} + else + cpio_tfile=${cpio_file} + fi diff --git a/board/uma/patches/09_make_initramfs_RO.patch b/board/uma/patches/09_make_initramfs_RO.patch new file mode 100755 index 000000000000..92f5bfd12641 --- /dev/null +++ b/board/uma/patches/09_make_initramfs_RO.patch @@ -0,0 +1,21 @@ +--- ./init/initramfs.c ++++ ./init/initramfs.c +584a585 +> int error; +624a626,630 +> #ifdef CONFIG_BLK_DEV_INITRAMFS_RO +> error = sys_mount("/", "/", NULL, MS_RDONLY | MS_NOSUID | MS_REMOUNT, NULL); +> if (error) +> printk(KERN_EMERG "Initramfs issue with remount on RO\n"); +> #endif +--- ./init/Kconfig ++++ ./init/Kconfig +1233a1234,1241 +> config BLK_DEV_INITRAMFS_RO +> bool "Make Initramfs RO" +> default n +> help +> by default initramfs is RW. We can make it RO. +> +> If unsure say N. +> diff --git a/board/uma/patches/10_bootargs_append_in_dtb.patch b/board/uma/patches/10_bootargs_append_in_dtb.patch new file mode 100755 index 000000000000..02d6fd77bef7 --- /dev/null +++ b/board/uma/patches/10_bootargs_append_in_dtb.patch @@ -0,0 +1,22 @@ +diff -Naur kernel-E077_CADDV_MAINAPP_DEBUG/drivers/of/fdt.c kernel-E077_CADDV_MAINAPP_DEBUG_patched/drivers/of/fdt.c +--- kernel-E077_CADDV_MAINAPP_DEBUG/drivers/of/fdt.c 2015-04-25 06:30:00.000000000 +0200 ++++ kernel-E077_CADDV_MAINAPP_DEBUG_patched/drivers/of/fdt.c 2015-12-11 10:38:32.614352200 +0100 +@@ -937,8 +937,16 @@ + + /* Retrieve command line */ + p = of_get_flat_dt_prop(node, "bootargs", &l); +- if (p != NULL && l > 0) +- strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); ++ if (p != NULL && l > 0) { ++ int offset = 0; ++#ifdef CONFIG_CMDLINE ++#ifdef CONFIG_CMDLINE_EXTEND ++ strlcpy(data, CONFIG_CMDLINE, COMMAND_LINE_SIZE); ++ offset = strlcat(data, " ", COMMAND_LINE_SIZE); ++#endif ++#endif ++ strlcpy(data + offset, p, min(l, (unsigned long)(COMMAND_LINE_SIZE - offset))); ++ } + + /* + * CONFIG_CMDLINE is meant to be a default in case nothing else diff --git a/board/uma/patches/12_systool.patch b/board/uma/patches/12_systool.patch new file mode 100644 index 000000000000..d85305ea2322 --- /dev/null +++ b/board/uma/patches/12_systool.patch @@ -0,0 +1,401 @@ +diff -Naur kernel.old/drivers/systool/Kconfig kernel.new/drivers/systool/Kconfig +--- kernel.old/drivers/systool/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ kernel.new/drivers/systool/Kconfig 2016-01-26 18:23:10.646836841 +0100 +@@ -0,0 +1,7 @@ ++# ++# systool subsystem configuration ++# SYSTOOL is a system information managment API ++# ++config SYSTOOL_SUPPORT ++ bool "Systool driver" ++ +diff -Naur kernel.old/drivers/systool/Makefile kernel.new/drivers/systool/Makefile +--- kernel.old/drivers/systool/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ kernel.new/drivers/systool/Makefile 2016-01-26 18:23:10.634836716 +0100 +@@ -0,0 +1 @@ ++obj-$(CONFIG_SYSTOOL_SUPPORT) +=systool.o + +diff -Naur kernel.old/drivers/Kconfig kernel.new/drivers/Kconfig +--- kernel.old/drivers/Kconfig 2016-01-26 18:21:46.790010483 +0100 ++++ kernel.new/drivers/Kconfig 2016-01-26 18:47:25.114103188 +0100 +@@ -174,4 +174,6 @@ + + source "drivers/powercap/Kconfig" + ++source "drivers/systool/Kconfig" ++ + endmenu +diff -Naur kernel.old/drivers/Makefile kernel.new/drivers/Makefile +--- kernel.old/drivers/Makefile 2016-01-26 18:21:46.778010365 +0100 ++++ kernel.new/drivers/Makefile 2016-01-26 20:24:12.317367633 +0100 +@@ -159,3 +159,5 @@ + obj-$(CONFIG_NTB) += ntb/ + obj-$(CONFIG_FMC) += fmc/ + obj-$(CONFIG_POWERCAP) += powercap/ ++ ++obj-$(CONFIG_SYSTOOL_SUPPORT) += systool/ +diff -Naur kernel.old/drivers/systool/systool.c kernel.new/drivers/systool/systool.c +--- kernel.old/drivers/systool/systool.c 1970-01-01 01:00:00.000000000 +0100 ++++ kernel.new/drivers/systool/systool.c 2016-01-26 20:24:47.148735456 +0100 +@@ -0,0 +1,250 @@ ++/* ++ * systool.c ++ * ++ * This file contains the implementation of the AON read/writer ++ * interface module with the user space. ++ * ++ * Created by Samir MOUHOUNE on 10/07/2013. ++ * Copyright 2013 Pace plc. All rights reserved. ++ * ++ * The copyright in this material is owned by Pace ++ * plc ("Pace"). This material is regarded as a ++ * highly confidential trade secret of Pace. It may not be ++ * reproduced, used, sold or in any other way exploited or ++ * transferred to any third party without the prior ++ * written permission of Pace. ++ * ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "systool_priv.h" ++ ++#include ++#include ++#include ++ ++MODULE_AUTHOR ("Pace"); ++MODULE_DESCRIPTION ("System Information Management interface"); ++MODULE_SUPPORTED_DEVICE (""); ++MODULE_LICENSE ("Pace Proprietary"); ++ ++ ++/* ++ * ++ * Module param ++ * ++ */ ++static int systool_major = 0;/*Major Number will be set dynamically*/ ++ ++module_param (systool_major, int, 0644); ++MODULE_PARM_DESC (systool_major, "Device major number"); ++ ++ ++static struct systool sys_info; ++ ++ ++int system_reboot(void) ++{ ++ ++ machine_restart("reboot"); ++ ++ return 0; ++} ++ ++ ++ ++/*********************************************************************************************** ++ * ++ * Char device functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * systool_open ++ * ++ */ ++static int systool_open(struct inode *inode, struct file *filp) ++{ ++ logsystool("An instance of %s has been opened.\n", systool_NAME); ++ return 0; ++} ++ ++ ++/* ++ * ++ * systool_close ++ * ++ */ ++static int systool_close(struct inode *inode, struct file *file) ++{ ++ logsystool("One instance of %s has been closed.\n", systool_NAME); ++ return 0; ++} ++ ++ ++/* ++ * ++ * systool_ioctl ++ * ++ */ ++long systool_ioctl(struct file *filp,unsigned int cmd, unsigned long arg) ++{ ++ if (_IOC_TYPE(cmd) != systool_IOC_MAGIC) ++ { ++ logsystool("Unrecognized ioctl command prefix.\n"); ++ return 1; ++ } ++ if (_IOC_NR(cmd) > MAX_IOCTL_CMD_NMBR) ++ { ++ logsystool("ioctl command number out of range.\n"); ++ return 1; ++ } ++ switch (cmd) ++ { ++ case GET_MEMORY_STATUS: ++ logsystool("ioctl cmd = GET_MEMORY_STATUS.\n"); ++ ++ break; ++ case GET_PROCESS_STATUS: ++ logsystool("ioctl cmd = GET_PROCESS_STATUS.\n"); ++ ++ break; ++ case GET_PROCESSOR: ++ logsystool("ioctl cmd = GET_PROCESSOR.\n"); ++ ++ break; ++ case GET_NB_PROC: ++ logsystool("ioctl cmd = GET_NB_PROC.\n"); ++ ++ break; ++ case GET_NB_CPU: ++ logsystool("ioctl cmd = GET_NB_CPU.\n"); ++ ++ break; ++ case CPU_REBOOT_CMD: ++ ++ system_reboot(); ++ break; ++ case STANDBY_CM_ENABLE: ++ logsystool("ioctl cmd = STANDBY_CM_ENABLE.\n"); ++ ++ break; ++ case STANDBY_CM_DISABLE: ++ logsystool("ioctl cmd = STANDBY_CM_DISABLE.\n"); ++ ++ break; ++ default: ++ logsystool("ioctl cmd = default.\n"); ++ return 1; ++ } ++ return 0; ++} ++ ++ ++/* ++ * ++ * systool_read ++ * ++ */ ++static ssize_t systool_read(struct file *file, char *buff, size_t ctr, loff_t *offp) ++{ ++ /*TODO to be implemented*/ ++ return 0; ++} ++ ++ ++/*********************************************************************************************** ++ * ++ * Functions uses to write in the device buffer ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * _systool_write ++ * ++ * ++ * ++ */ ++static ssize_t systool_write(struct file *file, const char *buff, size_t ctr,loff_t *woof) ++{ ++/*TODO to be implemnted*/ ++ return 0; ++} ++ ++ ++struct file_operations systool_fops = { ++ owner: THIS_MODULE, ++ open: systool_open, ++ release: systool_close, ++ read: systool_read, ++ write: systool_write, ++ unlocked_ioctl: systool_ioctl, ++}; ++ ++ ++ ++/*********************************************************************************************** ++ * ++ * init and exit functions ++ * ++ ***********************************************************************************************/ ++ ++/* ++ * ++ * systool_init ++ * ++ */ ++static int __init systool_init(void) ++{ ++ int result; ++ ++ logsystool("enter systool_init()\n"); ++ ++ /* ++ * Register char systool device ++ */ ++ result = register_chrdev(systool_major, systool_NAME, &systool_fops); ++ if (result < 0) ++ { ++ errorsystool("systool: can't get major %d\n",systool_major); ++ return result; ++ } ++ ++ if(systool_major == 0) systool_major = result; /* dynamic */ ++ ++ logsystool("systool device created with %i major number\n",systool_major); ++ ++ ++ logsystool("Registered %s, at major number = %d.\n\n",systool_NAME, systool_major); ++ logsystool("To use %s, you must create a device file.\n", systool_NAME); ++ logsystool("If this has not already been done, then enter:\n"); ++ logsystool("mknod /dev/%s c %d 0\n\n", systool_NAME, systool_major); ++ logsystool("Also set appropriate permissions for /dev/%s.\n\n", systool_NAME); ++ ++ return 0; ++} ++ ++ ++/* ++ * ++ * systool_cleanup ++ * ++ */ ++static void __exit systool_cleanup(void) ++{ ++ logsystool("enter systool_cleanup\n"); ++ unregister_chrdev(systool_major, systool_NAME); ++} ++ ++module_init(systool_init); ++module_exit(systool_cleanup); +diff -Naur kernel.old/drivers/systool/systool_priv.h kernel.new/drivers/systool/systool_priv.h +--- kernel.old/drivers/systool/systool_priv.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel.new/drivers/systool/systool_priv.h 2016-01-26 18:23:10.643836811 +0100 +@@ -0,0 +1,47 @@ ++/* ++ * systool_priv.h ++ * ++ * This file contains the implementation of the system information API ++ * interface module with the user space. ++ * ++ * Created by Samir MOUHOUNE on 10/07/2013. ++ * Copyright 2013 Pace plc. All rights reserved. ++ * ++ * The copyright in this material is owned by Pace ++ * plc ("Pace"). This material is regarded as a ++ * highly confidential trade secret of Pace. It may not be ++ * reproduced, used, sold or in any other way exploited or ++ * transferred to any third party without the prior ++ * written permission of Pace. ++ * ++ */ ++ ++#ifndef systool_PRIV_H ++#define systool_PRIV_H ++ ++ ++ ++ ++#define systool_DEBUG /*To Enable kernel traces*/ ++ ++#ifdef systool_DEBUG ++#define logsystool(...) \ ++ printk("[systool] "__VA_ARGS__); ++#else ++#define logsystool(...) ++#endif ++#define errorsystool(...) \ ++ printk("[systool] ERROR "__VA_ARGS__); ++ ++ ++#define systool_NAME "systool" ++ ++ ++static ssize_t systool_write(struct file *file, const char *buff, size_t ctr,loff_t *woof); ++static ssize_t systool_read(struct file *file, char *buff, size_t ctr, loff_t *offp); ++static int systool_init (void ); ++static void systool_cleanup ( void ); ++ ++ ++ ++#endif /* systool_PRIV_H */ +diff -Naur kernel.old/include/linux/systool.h kernel.new/include/linux/systool.h +--- kernel.old/include/linux/systool.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel.new/include/linux/systool.h 2016-01-26 18:24:58.057895380 +0100 +@@ -0,0 +1,45 @@ ++/* ++ * systool.h ++ * ++ * This file contains the implementation of the AON read/writer ++ * interface module with the user space. ++ * ++ * Created by Samir MOUHOUNE on 25/06/2013. ++ * Copyright 2013 Pace plc. All rights reserved. ++ * ++ * The copyright in this material is owned by Pace ++ * plc ("Pace"). This material is regarded as a ++ * highly confidential trade secret of Pace. It may not be ++ * reproduced, used, sold or in any other way exploited or ++ * transferred to any third party without the prior ++ * written permission of Pace. ++ * ++ */ ++ ++#ifndef systool_H ++#define systool_H ++ ++#include ++ ++ ++/*********************************************************************************************** ++ * ++ * Ioctl ++ * ++ ***********************************************************************************************/ ++#define MAX_IOCTL_CMD_NMBR 8 ++#define systool_IOC_MAGIC 'q' ++#define GET_NB_PROC _IOR(systool_IOC_MAGIC, 1, unsigned long) ++#define GET_NB_CPU _IOR(systool_IOC_MAGIC, 2, unsigned long) ++#define GET_MEMORY_STATUS _IOR(systool_IOC_MAGIC, 3, unsigned long) ++#define GET_PROCESS_STATUS _IOR(systool_IOC_MAGIC, 4, unsigned long) ++#define GET_PROCESSOR _IOR(systool_IOC_MAGIC, 5, unsigned long) ++#define CPU_REBOOT_CMD _IOR(systool_IOC_MAGIC, 6, unsigned long) ++#define STANDBY_CM_ENABLE _IOR(systool_IOC_MAGIC, 7, unsigned long) ++#define STANDBY_CM_DISABLE _IOR(systool_IOC_MAGIC, 8, unsigned long) ++#define SYSINFO_MAX_PROCESSOR 4 ++/**/ ++ ++ ++ ++#endif /* systool_H */ +diff -Naur kernel.old/include/uapi/linux/Kbuild kernel.new/include/uapi/linux/Kbuild +--- kernel.old/include/uapi/linux/Kbuild 2016-01-26 18:21:46.434006974 +0100 ++++ kernel.new/include/uapi/linux/Kbuild 2016-01-26 18:26:12.053624644 +0100 +@@ -370,6 +370,7 @@ + header-y += synclink.h + header-y += sysctl.h + header-y += sysinfo.h ++header-y += systool.h + header-y += taskstats.h + header-y += tcp.h + header-y += tcp_metrics.h diff --git a/board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch b/board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch new file mode 100755 index 000000000000..28cc20705ee0 --- /dev/null +++ b/board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch @@ -0,0 +1,24 @@ +Copyright (C) Espial Limited 2015-2016 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +This patch overrides the minor device number of /dev/ubi_ctrl so that it is +predictable rather than allocated dynamically. 240 is in the "private use" +area. During system boot, there are races with other "misc" device drivers +leading to this unpredictability, which makes it all but impossible to make +a static /dev directory without this modification. + +This patch should apply cleanly to any kernel from 3.14 onwards (at least) + +diff -Naur linux/drivers/mtd/ubi/build.c linux.new/drivers/mtd/ubi/build.c +--- linux/drivers/mtd/ubi/build.c 2015-04-25 05:30:00.000000000 +0100 ++++ linux.new/drivers/mtd/ubi/build.c 2015-10-01 16:37:42.661551526 +0100 +@@ -90,7 +90,7 @@ + + /* UBI control character device */ + static struct miscdevice ubi_ctrl_cdev = { +- .minor = MISC_DYNAMIC_MINOR, ++ .minor = 240, + .name = "ubi_ctrl", + .fops = &ubi_ctrl_cdev_operations, + }; diff --git a/board/uma/patches/41_espial_chardev_preassigned.patch b/board/uma/patches/41_espial_chardev_preassigned.patch new file mode 100755 index 000000000000..bcbe2789239a --- /dev/null +++ b/board/uma/patches/41_espial_chardev_preassigned.patch @@ -0,0 +1,124 @@ +Copyright (C) Espial Limited 2016-2017 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +** This patch requires editing for each project to list the device numbers. ** + +This patch adds the ability to pre-allocate dynamic major device numbers for +character devices, such that the major device number for any given driver +becomes predictable, even if it asks for a dynamically-allocated number. + +This is critical to avoid assignments changing between builds and when other +kernel options are modified and when kernel modules are added or removed. + +The list of assignments goes in the array in the second file. You can edit +the patch directly, provided you remember to adjust the line count at the +top of the file patch! + +This patch should apply cleanly to any kernel from 3.14 onwards (at least) + + +diff -Nbrc a/fs/char_dev.c b/fs/char_dev.c +*** a/fs/char_dev.c 2015-04-25 05:30:01.000000000 +0100 +--- b/fs/char_dev.c 2017-02-10 15:40:33.039101099 +0000 +*************** +*** 23,28 **** +--- 23,55 ---- + #include + + #include "internal.h" ++ #include "espial_device_assignments.h" ++ ++ static unsigned int __register_chrdev_find_preassigned(const char *name) ++ { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(preassigned_majors); i++) { ++ if (strcmp(preassigned_majors[i].name, name) == 0) { ++ return preassigned_majors[i].major; ++ } ++ } ++ ++ return 0; ++ } ++ ++ static int __register_chrdev_reserved_preassigned(unsigned int major) ++ { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(preassigned_majors); i++) { ++ if (preassigned_majors[i].major == major) { ++ return 1; ++ } ++ } ++ ++ return 0; ++ } + + /* + * capabilities for /dev/mem, /dev/kmem and similar directly mappable character +*************** +*** 105,114 **** + + mutex_lock(&chrdevs_lock); + + /* temporary */ + if (major == 0) { + for (i = ARRAY_SIZE(chrdevs)-1; i > 0; i--) { +! if (chrdevs[i] == NULL) + break; + } + +--- 132,145 ---- + + mutex_lock(&chrdevs_lock); + ++ if (major == 0) { ++ major = __register_chrdev_find_preassigned(name); ++ ret = major; ++ } + /* temporary */ + if (major == 0) { + for (i = ARRAY_SIZE(chrdevs)-1; i > 0; i--) { +! if (chrdevs[i] == NULL && !__register_chrdev_reserved_preassigned(i)) + break; + } + +diff -Nbrc a/fs/espial_device_assignments.h b/fs/espial_device_assignments.h +*** a/fs/espial_device_assignments.h 1970-01-01 01:00:00.000000000 +0100 +--- b/fs/espial_device_assignments.h 2017-02-10 15:37:16.336498411 +0000 +*************** +*** 0 **** +--- 1,32 ---- ++ /* ++ * Copyright (c) 2016 Espial Limited ++ * All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it would be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ #ifndef FS_DEVICE_ASSIGNMENTS_H ++ #define FS_DEVICE_ASSIGNMENTS_H 1 ++ ++ static const struct { ++ unsigned int major; ++ const char *name; ++ } preassigned_majors[] = { ++ { 248, "gpK5" }, ++ { 249, "ubi0" }, ++ { 250, "systool" }, ++ { 251, "brcm_cma" }, ++ }; ++ ++ #endif ++ diff --git a/board/uma/patches/42_espial_settime_security_check.patch b/board/uma/patches/42_espial_settime_security_check.patch new file mode 100755 index 000000000000..b5ef343b136a --- /dev/null +++ b/board/uma/patches/42_espial_settime_security_check.patch @@ -0,0 +1,74 @@ +Copyright (C) Espial Limited 2016 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +This patch changes the security test for the settimeofday(2) and adjtimex(2) +system calls, so unprivileged containers possessing CAP_SYS_TIME can set the +system time. + +This patch should apply cleanly to any kernel from 3.14 onwards (at least) +although it will start failing at the point at which the kernel's security +code was refactored. At that point, this patch will have to be reworked. + +diff -Naur linux_orig/security/commoncap.c linux/security/commoncap.c +--- linux_orig/security/commoncap.c 2015-03-19 20:07:07.000000000 +0000 ++++ linux/security/commoncap.c 2016-02-19 10:54:42.127518084 +0000 +@@ -118,7 +118,7 @@ + */ + int cap_settime(const struct timespec *ts, const struct timezone *tz) + { +- if (!capable(CAP_SYS_TIME)) ++ if (!ns_capable(current_user_ns(), CAP_SYS_TIME)) + return -EPERM; + return 0; + } + +diff -Naur linux-secure/kernel/time/ntp.c linux-debug/kernel/time/ntp.c +--- linux-secure/kernel/time/ntp.c 2016-03-01 17:38:07.150474368 +0000 ++++ linux-debug/kernel/time/ntp.c 2016-03-01 17:43:10.946341599 +0000 +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -611,13 +612,18 @@ + /* singleshot must not be used with any other mode bits */ + if (!(txc->modes & ADJ_OFFSET_SINGLESHOT)) + return -EINVAL; +- if (!(txc->modes & ADJ_OFFSET_READONLY) && +- !capable(CAP_SYS_TIME)) +- return -EPERM; ++ if (!(txc->modes & ADJ_OFFSET_READONLY)) { ++ int error = security_settime(NULL,NULL); ++ if (error) ++ return error; ++ } + } else { + /* In order to modify anything, you gotta be super-user! */ +- if (txc->modes && !capable(CAP_SYS_TIME)) +- return -EPERM; ++ if (txc->modes) { ++ int error = security_settime(NULL,NULL); ++ if (error) ++ return error; ++ } + /* + * if the quartz is off by more than 10% then + * something is VERY wrong! +@@ -628,8 +634,11 @@ + return -EINVAL; + } + +- if ((txc->modes & ADJ_SETOFFSET) && (!capable(CAP_SYS_TIME))) +- return -EPERM; ++ if (txc->modes & ADJ_SETOFFSET) { ++ int error = security_settime(NULL,NULL); ++ if (error) ++ return error; ++ } + + return 0; + } diff --git a/board/uma/patches/43_max_dgram_qlen.patch b/board/uma/patches/43_max_dgram_qlen.patch new file mode 100755 index 000000000000..31f6fda23e68 --- /dev/null +++ b/board/uma/patches/43_max_dgram_qlen.patch @@ -0,0 +1,30 @@ +Copyright (C) Espial Limited 2016 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +This patch changes the default UNIX domain socket datagram queue length so that +more datagrams can be queued before a blockage occurs. The sysctl interface is +only able to change the setting in the initial network namespace. There is not +any mechanism for changing this value in other network namespaces. Hence, this +change to the default is the only way of solving the problem. + + +*** a/net/unix/af_unix.c 2015-04-25 05:30:02.000000000 +0100 +--- b/net/unix/af_unix.c 2016-04-06 12:06:24.293856504 +0100 +*************** +*** 2415,2421 **** + { + int error = -ENOMEM; + +! net->unx.sysctl_max_dgram_qlen = 10; + if (unix_sysctl_register(net)) + goto out; + +--- 2415,2421 ---- + { + int error = -ENOMEM; + +! net->unx.sysctl_max_dgram_qlen = 20; + if (unix_sysctl_register(net)) + goto out; + diff --git a/board/uma/patches/44_espial_blkdev_preassigned.patch b/board/uma/patches/44_espial_blkdev_preassigned.patch new file mode 100755 index 000000000000..8db706a2f9b4 --- /dev/null +++ b/board/uma/patches/44_espial_blkdev_preassigned.patch @@ -0,0 +1,119 @@ +Copyright (C) Espial Limited 2017 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +** This patch requires editing for each project to list the device numbers. ** + +This patch adds the ability to pre-allocate dynamic major device numbers for +block devices, such that the major device number for any given driver +becomes predictable, even if it asks for a dynamically-allocated number. + +This is critical to avoid assignments changing between builds and when other +kernel options are modified and when kernel modules are added or removed. + +The list of assignments goes in the array in the second file. You can edit +the patch directly, provided you remember to adjust the line count at the +top of the file patch! + +This patch should apply cleanly to any kernel from 3.14 onwards (at least) + +diff -Nbrc a/block/genhd.c b/block/genhd.c +*** a/block/genhd.c 2015-04-25 05:29:59.000000000 +0100 +--- b/block/genhd.c 2017-02-10 15:44:06.553584521 +0000 +*************** +*** 21,26 **** +--- 21,53 ---- + #include + + #include "blk.h" ++ #include "espial_block_device_assignments.h" ++ ++ static unsigned int __register_blkdev_find_preassigned(const char *name) ++ { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(preassigned_block_majors); i++) { ++ if (strcmp(preassigned_block_majors[i].name, name) == 0) { ++ return preassigned_block_majors[i].major; ++ } ++ } ++ ++ return 0; ++ } ++ ++ static int __register_blkdev_reserved_preassigned(unsigned int major) ++ { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(preassigned_block_majors); i++) { ++ if (preassigned_block_majors[i].major == major) { ++ return 1; ++ } ++ } ++ ++ return 0; ++ } + + static DEFINE_MUTEX(block_class_lock); + struct kobject *block_depr; +*************** +*** 289,298 **** + + mutex_lock(&block_class_lock); + + /* temporary */ + if (major == 0) { + for (index = ARRAY_SIZE(major_names)-1; index > 0; index--) { +! if (major_names[index] == NULL) + break; + } + +--- 316,329 ---- + + mutex_lock(&block_class_lock); + ++ if (major == 0) { ++ major = __register_blkdev_find_preassigned(name); ++ ret = major; ++ } + /* temporary */ + if (major == 0) { + for (index = ARRAY_SIZE(major_names)-1; index > 0; index--) { +! if (major_names[index] == NULL && !__register_blkdev_reserved_preassigned(index)) + break; + } + +diff -Nbrc a/block/espial_block_device_assignments.h b/block/espial_block_device_assignments.h +*** a/block/espial_block_device_assignments.h 1970-01-01 01:00:00.000000000 +0100 +--- b/block/espial_block_device_assignments.h 2017-02-10 15:43:06.436011515 +0000 +*************** +*** 0 **** +--- 1,28 ---- ++ /* ++ * Copyright (c) 2017 Espial Limited ++ * All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it would be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ #ifndef FS_BLOCK_DEVICE_ASSIGNMENTS_H ++ #define FS_BLOCK_DEVICE_ASSIGNMENTS_H 1 ++ ++ static const struct { ++ unsigned int major; ++ const char *name; ++ } preassigned_block_majors[] = { ++ { 253, "ubiblock" }, ++ }; ++ ++ #endif diff --git a/board/uma/patches/44_espial_read_kmsg_from_logger.patch b/board/uma/patches/44_espial_read_kmsg_from_logger.patch new file mode 100755 index 000000000000..04ff01d590c1 --- /dev/null +++ b/board/uma/patches/44_espial_read_kmsg_from_logger.patch @@ -0,0 +1,30 @@ +Copyright (C) Espial Limited 2016 Company Confidential - All Rights Reserved + +This patch is mandatory for all Espial projects. + +This patch changes the security test for opening /dev/kmsg, so unprivileged +containers possessing CAP_SYSLOG can still open the file. + +This patch should apply cleanly to any kernel from 3.14 onwards (at least) +although it will start failing at the point at which the kernel's security +code was refactored. At that point, this patch will have to be reworked. + +*** a/kernel/printk/printk.c 2015-03-19 20:07:06.000000000 +0000 +--- b/kernel/printk/printk.c 2016-08-26 14:38:54.991688592 +0100 +*************** static int check_syslog_permissions(int +*** 386,392 **** + return 0; + + if (syslog_action_restricted(type)) { +! if (capable(CAP_SYSLOG)) + return 0; + /* + * For historical reasons, accept CAP_SYS_ADMIN too, with +--- 386,392 ---- + return 0; + + if (syslog_action_restricted(type)) { +! if (ns_capable(current_user_ns(), CAP_SYSLOG)) + return 0; + /* + * For historical reasons, accept CAP_SYS_ADMIN too, with diff --git a/board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch b/board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch new file mode 100755 index 000000000000..876f8cba20bb --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch @@ -0,0 +1,835 @@ +commit 9d54c8a33eec78289b1b3f6e10874719c27ce0a7 +Author: Ezequiel Garcia +Date: Tue Feb 25 13:25:22 2014 -0300 + + UBI: R/O block driver on top of UBI volumes + + This commit introduces read-only block device emulation on top of UBI volumes. + + Given UBI takes care of wear leveling and bad block management it's possible + to add a thin layer to enable block device access to UBI volumes. + This allows to use a block-oriented filesystem on a flash device. + + The UBI block devices are meant to be used in conjunction with any + regular, block-oriented file system (e.g. ext4), although it's primarily + targeted at read-only file systems, such as squashfs. + + Block devices are created upon user request through new ioctls: + UBI_IOCVOLATTBLK to attach and UBI_IOCVOLDETBLK to detach. + Also, a new UBI module parameter is added 'ubi.block'. This parameter is + needed in order to attach a block device on boot-up time, allowing to + mount the rootfs on a ubiblock device. + For instance, you could have these kernel parameters: + + ubi.mtd=5 ubi.block=0,0 root=/dev/ubiblock0_0 + + Or, if you compile ubi as a module: + + $ modprobe ubi mtd=/dev/mtd5 block=/dev/ubi0_0 + + Artem: amend commentaries and massage the patch a little bit. + + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + +diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig +index 36663af..783fb18 100644 +--- a/drivers/mtd/ubi/Kconfig ++++ b/drivers/mtd/ubi/Kconfig +@@ -87,4 +87,19 @@ config MTD_UBI_GLUEBI + work on top of UBI. Do not enable this unless you use legacy + software. + ++config MTD_UBI_BLOCK ++ bool "Read-only block devices on top of UBI volumes" ++ default n ++ help ++ This option enables read-only UBI block devices support. UBI block ++ devices will be layered on top of UBI volumes, which means that the ++ UBI driver will transparently handle things like bad eraseblocks and ++ bit-flips. You can put any block-oriented file system on top of UBI ++ volumes in read-only mode (e.g., ext4), but it is probably most ++ practical for read-only file systems, like squashfs. ++ ++ When selected, this feature will be built in the UBI driver. ++ ++ If in doubt, say "N". ++ + endif # MTD_UBI +diff --git a/drivers/mtd/ubi/Makefile b/drivers/mtd/ubi/Makefile +index b46b0c97..4e3c3d7 100644 +--- a/drivers/mtd/ubi/Makefile ++++ b/drivers/mtd/ubi/Makefile +@@ -3,5 +3,6 @@ obj-$(CONFIG_MTD_UBI) += ubi.o + ubi-y += vtbl.o vmt.o upd.o build.o cdev.o kapi.o eba.o io.o wl.o attach.o + ubi-y += misc.o debug.o + ubi-$(CONFIG_MTD_UBI_FASTMAP) += fastmap.o ++ubi-$(CONFIG_MTD_UBI_BLOCK) += block.o + + obj-$(CONFIG_MTD_UBI_GLUEBI) += gluebi.o +diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c +new file mode 100644 +index 0000000..cea7d1c +--- /dev/null ++++ b/drivers/mtd/ubi/block.c +@@ -0,0 +1,646 @@ ++/* ++ * Copyright (c) 2014 Ezequiel Garcia ++ * Copyright (c) 2011 Free Electrons ++ * ++ * Driver parameter handling strongly based on drivers/mtd/ubi/build.c ++ * Copyright (c) International Business Machines Corp., 2006 ++ * Copyright (c) Nokia Corporation, 2007 ++ * Authors: Artem Bityutskiy, Frank Haverkamp ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation, version 2. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See ++ * the GNU General Public License for more details. ++ */ ++ ++/* ++ * Read-only block devices on top of UBI volumes ++ * ++ * A simple implementation to allow a block device to be layered on top of a ++ * UBI volume. The implementation is provided by creating a static 1-to-1 ++ * mapping between the block device and the UBI volume. ++ * ++ * The addressed byte is obtained from the addressed block sector, which is ++ * mapped linearly into the corresponding LEB: ++ * ++ * LEB number = addressed byte / LEB size ++ * ++ * This feature is compiled in the UBI core, and adds a new 'block' parameter ++ * to allow early block device attaching. Runtime block attach/detach for UBI ++ * volumes is provided through two new UBI ioctls: UBI_IOCVOLATTBLK and ++ * UBI_IOCVOLDETBLK. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ubi-media.h" ++#include "ubi.h" ++ ++/* Maximum number of supported devices */ ++#define UBIBLOCK_MAX_DEVICES 32 ++ ++/* Maximum length of the 'block=' parameter */ ++#define UBIBLOCK_PARAM_LEN 63 ++ ++/* Maximum number of comma-separated items in the 'block=' parameter */ ++#define UBIBLOCK_PARAM_COUNT 2 ++ ++struct ubiblock_param { ++ int ubi_num; ++ int vol_id; ++ char name[UBIBLOCK_PARAM_LEN+1]; ++}; ++ ++/* Numbers of elements set in the @ubiblock_param array */ ++static int ubiblock_devs __initdata; ++ ++/* MTD devices specification parameters */ ++static struct ubiblock_param ubiblock_param[UBIBLOCK_MAX_DEVICES] __initdata; ++ ++struct ubiblock { ++ struct ubi_volume_desc *desc; ++ int ubi_num; ++ int vol_id; ++ int refcnt; ++ int leb_size; ++ ++ struct gendisk *gd; ++ struct request_queue *rq; ++ ++ struct workqueue_struct *wq; ++ struct work_struct work; ++ ++ struct mutex dev_mutex; ++ spinlock_t queue_lock; ++ struct list_head list; ++}; ++ ++/* Linked list of all ubiblock instances */ ++static LIST_HEAD(ubiblock_devices); ++static DEFINE_MUTEX(devices_mutex); ++static int ubiblock_major; ++ ++static int __init ubiblock_set_param(const char *val, ++ const struct kernel_param *kp) ++{ ++ int i, ret; ++ size_t len; ++ struct ubiblock_param *param; ++ char buf[UBIBLOCK_PARAM_LEN]; ++ char *pbuf = &buf[0]; ++ char *tokens[UBIBLOCK_PARAM_COUNT]; ++ ++ if (!val) ++ return -EINVAL; ++ ++ len = strnlen(val, UBIBLOCK_PARAM_LEN); ++ if (len == 0) { ++ ubi_warn("block: empty 'block=' parameter - ignored\n"); ++ return 0; ++ } ++ ++ if (len == UBIBLOCK_PARAM_LEN) { ++ ubi_err("block: parameter \"%s\" is too long, max. is %d\n", ++ val, UBIBLOCK_PARAM_LEN); ++ return -EINVAL; ++ } ++ ++ strcpy(buf, val); ++ ++ /* Get rid of the final newline */ ++ if (buf[len - 1] == '\n') ++ buf[len - 1] = '\0'; ++ ++ for (i = 0; i < UBIBLOCK_PARAM_COUNT; i++) ++ tokens[i] = strsep(&pbuf, ","); ++ ++ param = &ubiblock_param[ubiblock_devs]; ++ if (tokens[1]) { ++ /* Two parameters: can be 'ubi, vol_id' or 'ubi, vol_name' */ ++ ret = kstrtoint(tokens[0], 10, ¶m->ubi_num); ++ if (ret < 0) ++ return -EINVAL; ++ ++ /* Second param can be a number or a name */ ++ ret = kstrtoint(tokens[1], 10, ¶m->vol_id); ++ if (ret < 0) { ++ param->vol_id = -1; ++ strcpy(param->name, tokens[1]); ++ } ++ ++ } else { ++ /* One parameter: must be device path */ ++ strcpy(param->name, tokens[0]); ++ param->ubi_num = -1; ++ param->vol_id = -1; ++ } ++ ++ ubiblock_devs++; ++ ++ return 0; ++} ++ ++static const struct kernel_param_ops ubiblock_param_ops = { ++ .set = ubiblock_set_param, ++}; ++module_param_cb(block, &ubiblock_param_ops, NULL, 0); ++MODULE_PARM_DESC(block, "Attach block devices to UBI volumes. Parameter format: block=.\n" ++ "Multiple \"block\" parameters may be specified.\n" ++ "UBI volumes may be specified by their number, name, or path to the device node.\n" ++ "Examples\n" ++ "Using the UBI volume path:\n" ++ "ubi.block=/dev/ubi0_0\n" ++ "Using the UBI device, and the volume name:\n" ++ "ubi.block=0,rootfs\n" ++ "Using both UBI device number and UBI volume number:\n" ++ "ubi.block=0,0\n"); ++ ++static struct ubiblock *find_dev_nolock(int ubi_num, int vol_id) ++{ ++ struct ubiblock *dev; ++ ++ list_for_each_entry(dev, &ubiblock_devices, list) ++ if (dev->ubi_num == ubi_num && dev->vol_id == vol_id) ++ return dev; ++ return NULL; ++} ++ ++static int ubiblock_read_to_buf(struct ubiblock *dev, char *buffer, ++ int leb, int offset, int len) ++{ ++ int ret; ++ ++ ret = ubi_read(dev->desc, leb, buffer, offset, len); ++ if (ret) { ++ ubi_err("%s ubi_read error %d", ++ dev->gd->disk_name, ret); ++ return ret; ++ } ++ return 0; ++} ++ ++static int ubiblock_read(struct ubiblock *dev, char *buffer, ++ sector_t sec, int len) ++{ ++ int ret, leb, offset; ++ int bytes_left = len; ++ int to_read = len; ++ loff_t pos = sec << 9; ++ ++ /* Get LEB:offset address to read from */ ++ offset = do_div(pos, dev->leb_size); ++ leb = pos; ++ ++ while (bytes_left) { ++ /* ++ * We can only read one LEB at a time. Therefore if the read ++ * length is larger than one LEB size, we split the operation. ++ */ ++ if (offset + to_read > dev->leb_size) ++ to_read = dev->leb_size - offset; ++ ++ ret = ubiblock_read_to_buf(dev, buffer, leb, offset, to_read); ++ if (ret) ++ return ret; ++ ++ buffer += to_read; ++ bytes_left -= to_read; ++ to_read = bytes_left; ++ leb += 1; ++ offset = 0; ++ } ++ return 0; ++} ++ ++static int do_ubiblock_request(struct ubiblock *dev, struct request *req) ++{ ++ int len, ret; ++ sector_t sec; ++ ++ if (req->cmd_type != REQ_TYPE_FS) ++ return -EIO; ++ ++ if (blk_rq_pos(req) + blk_rq_cur_sectors(req) > ++ get_capacity(req->rq_disk)) ++ return -EIO; ++ ++ if (rq_data_dir(req) != READ) ++ return -ENOSYS; /* Write not implemented */ ++ ++ sec = blk_rq_pos(req); ++ len = blk_rq_cur_bytes(req); ++ ++ /* ++ * Let's prevent the device from being removed while we're doing I/O ++ * work. Notice that this means we serialize all the I/O operations, ++ * but it's probably of no impact given the NAND core serializes ++ * flash access anyway. ++ */ ++ mutex_lock(&dev->dev_mutex); ++ ret = ubiblock_read(dev, req->buffer, sec, len); ++ mutex_unlock(&dev->dev_mutex); ++ ++ return ret; ++} ++ ++static void ubiblock_do_work(struct work_struct *work) ++{ ++ struct ubiblock *dev = ++ container_of(work, struct ubiblock, work); ++ struct request_queue *rq = dev->rq; ++ struct request *req; ++ int res; ++ ++ spin_lock_irq(rq->queue_lock); ++ ++ req = blk_fetch_request(rq); ++ while (req) { ++ ++ spin_unlock_irq(rq->queue_lock); ++ res = do_ubiblock_request(dev, req); ++ spin_lock_irq(rq->queue_lock); ++ ++ /* ++ * If we're done with this request, ++ * we need to fetch a new one ++ */ ++ if (!__blk_end_request_cur(req, res)) ++ req = blk_fetch_request(rq); ++ } ++ ++ spin_unlock_irq(rq->queue_lock); ++} ++ ++static void ubiblock_request(struct request_queue *rq) ++{ ++ struct ubiblock *dev; ++ struct request *req; ++ ++ dev = rq->queuedata; ++ ++ if (!dev) ++ while ((req = blk_fetch_request(rq)) != NULL) ++ __blk_end_request_all(req, -ENODEV); ++ else ++ queue_work(dev->wq, &dev->work); ++} ++ ++static int ubiblock_open(struct block_device *bdev, fmode_t mode) ++{ ++ struct ubiblock *dev = bdev->bd_disk->private_data; ++ int ret; ++ ++ mutex_lock(&dev->dev_mutex); ++ if (dev->refcnt > 0) { ++ /* ++ * The volume is already open, just increase the reference ++ * counter. ++ */ ++ goto out_done; ++ } ++ ++ /* ++ * We want users to be aware they should only mount us as read-only. ++ * It's just a paranoid check, as write requests will get rejected ++ * in any case. ++ */ ++ if (mode & FMODE_WRITE) { ++ ret = -EPERM; ++ goto out_unlock; ++ } ++ ++ dev->desc = ubi_open_volume(dev->ubi_num, dev->vol_id, UBI_READONLY); ++ if (IS_ERR(dev->desc)) { ++ ubi_err("%s failed to open ubi volume %d_%d", ++ dev->gd->disk_name, dev->ubi_num, dev->vol_id); ++ ret = PTR_ERR(dev->desc); ++ dev->desc = NULL; ++ goto out_unlock; ++ } ++ ++out_done: ++ dev->refcnt++; ++ mutex_unlock(&dev->dev_mutex); ++ return 0; ++ ++out_unlock: ++ mutex_unlock(&dev->dev_mutex); ++ return ret; ++} ++ ++static void ubiblock_release(struct gendisk *gd, fmode_t mode) ++{ ++ struct ubiblock *dev = gd->private_data; ++ ++ mutex_lock(&dev->dev_mutex); ++ dev->refcnt--; ++ if (dev->refcnt == 0) { ++ ubi_close_volume(dev->desc); ++ dev->desc = NULL; ++ } ++ mutex_unlock(&dev->dev_mutex); ++} ++ ++static int ubiblock_getgeo(struct block_device *bdev, struct hd_geometry *geo) ++{ ++ /* Some tools might require this information */ ++ geo->heads = 1; ++ geo->cylinders = 1; ++ geo->sectors = get_capacity(bdev->bd_disk); ++ geo->start = 0; ++ return 0; ++} ++ ++static const struct block_device_operations ubiblock_ops = { ++ .owner = THIS_MODULE, ++ .open = ubiblock_open, ++ .release = ubiblock_release, ++ .getgeo = ubiblock_getgeo, ++}; ++ ++int ubiblock_add(struct ubi_volume_info *vi) ++{ ++ struct ubiblock *dev; ++ struct gendisk *gd; ++ int disk_capacity; ++ int ret; ++ ++ /* Check that the volume isn't already handled */ ++ mutex_lock(&devices_mutex); ++ if (find_dev_nolock(vi->ubi_num, vi->vol_id)) { ++ mutex_unlock(&devices_mutex); ++ return -EEXIST; ++ } ++ mutex_unlock(&devices_mutex); ++ ++ dev = kzalloc(sizeof(struct ubiblock), GFP_KERNEL); ++ if (!dev) ++ return -ENOMEM; ++ ++ mutex_init(&dev->dev_mutex); ++ ++ dev->ubi_num = vi->ubi_num; ++ dev->vol_id = vi->vol_id; ++ dev->leb_size = vi->usable_leb_size; ++ ++ /* Initialize the gendisk of this ubiblock device */ ++ gd = alloc_disk(1); ++ if (!gd) { ++ ubi_err("block: alloc_disk failed"); ++ ret = -ENODEV; ++ goto out_free_dev; ++ } ++ ++ gd->fops = &ubiblock_ops; ++ gd->major = ubiblock_major; ++ gd->first_minor = dev->ubi_num * UBI_MAX_VOLUMES + dev->vol_id; ++ gd->private_data = dev; ++ sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id); ++ disk_capacity = (vi->size * vi->usable_leb_size) >> 9; ++ set_capacity(gd, disk_capacity); ++ dev->gd = gd; ++ ++ spin_lock_init(&dev->queue_lock); ++ dev->rq = blk_init_queue(ubiblock_request, &dev->queue_lock); ++ if (!dev->rq) { ++ ubi_err("block: blk_init_queue failed"); ++ ret = -ENODEV; ++ goto out_put_disk; ++ } ++ ++ dev->rq->queuedata = dev; ++ dev->gd->queue = dev->rq; ++ ++ /* ++ * Create one workqueue per volume (per registered block device). ++ * Rembember workqueues are cheap, they're not threads. ++ */ ++ dev->wq = alloc_workqueue(gd->disk_name, 0, 0); ++ if (!dev->wq) ++ goto out_free_queue; ++ INIT_WORK(&dev->work, ubiblock_do_work); ++ ++ mutex_lock(&devices_mutex); ++ list_add_tail(&dev->list, &ubiblock_devices); ++ mutex_unlock(&devices_mutex); ++ ++ /* Must be the last step: anyone can call file ops from now on */ ++ add_disk(dev->gd); ++ ubi_msg("%s created from ubi%d:%d(%s)", ++ dev->gd->disk_name, dev->ubi_num, dev->vol_id, vi->name); ++ return 0; ++ ++out_free_queue: ++ blk_cleanup_queue(dev->rq); ++out_put_disk: ++ put_disk(dev->gd); ++out_free_dev: ++ kfree(dev); ++ ++ return ret; ++} ++ ++static void ubiblock_cleanup(struct ubiblock *dev) ++{ ++ del_gendisk(dev->gd); ++ blk_cleanup_queue(dev->rq); ++ ubi_msg("%s released", dev->gd->disk_name); ++ put_disk(dev->gd); ++} ++ ++int ubiblock_del(struct ubi_volume_info *vi) ++{ ++ struct ubiblock *dev; ++ ++ mutex_lock(&devices_mutex); ++ dev = find_dev_nolock(vi->ubi_num, vi->vol_id); ++ if (!dev) { ++ mutex_unlock(&devices_mutex); ++ return -ENODEV; ++ } ++ ++ /* Found a device, let's lock it so we can check if it's busy */ ++ mutex_lock(&dev->dev_mutex); ++ if (dev->refcnt > 0) { ++ mutex_unlock(&dev->dev_mutex); ++ mutex_unlock(&devices_mutex); ++ return -EBUSY; ++ } ++ ++ /* Remove from device list */ ++ list_del(&dev->list); ++ mutex_unlock(&devices_mutex); ++ ++ /* Flush pending work and stop this workqueue */ ++ destroy_workqueue(dev->wq); ++ ++ ubiblock_cleanup(dev); ++ mutex_unlock(&dev->dev_mutex); ++ kfree(dev); ++ return 0; ++} ++ ++static void ubiblock_resize(struct ubi_volume_info *vi) ++{ ++ struct ubiblock *dev; ++ int disk_capacity; ++ ++ /* ++ * Need to lock the device list until we stop using the device, ++ * otherwise the device struct might get released in 'ubiblock_del()'. ++ */ ++ mutex_lock(&devices_mutex); ++ dev = find_dev_nolock(vi->ubi_num, vi->vol_id); ++ if (!dev) { ++ mutex_unlock(&devices_mutex); ++ return; ++ } ++ ++ mutex_lock(&dev->dev_mutex); ++ disk_capacity = (vi->size * vi->usable_leb_size) >> 9; ++ set_capacity(dev->gd, disk_capacity); ++ ubi_msg("%s resized to %d LEBs", dev->gd->disk_name, vi->size); ++ mutex_unlock(&dev->dev_mutex); ++ mutex_unlock(&devices_mutex); ++} ++ ++static int ubiblock_notify(struct notifier_block *nb, ++ unsigned long notification_type, void *ns_ptr) ++{ ++ struct ubi_notification *nt = ns_ptr; ++ ++ switch (notification_type) { ++ case UBI_VOLUME_ADDED: ++ /* ++ * We want to enforce explicit block device attaching for ++ * volumes, so when a volume is added we do nothing. ++ */ ++ break; ++ case UBI_VOLUME_REMOVED: ++ ubiblock_del(&nt->vi); ++ break; ++ case UBI_VOLUME_RESIZED: ++ ubiblock_resize(&nt->vi); ++ break; ++ default: ++ break; ++ } ++ return NOTIFY_OK; ++} ++ ++static struct notifier_block ubiblock_notifier = { ++ .notifier_call = ubiblock_notify, ++}; ++ ++static struct ubi_volume_desc * __init ++open_volume_desc(const char *name, int ubi_num, int vol_id) ++{ ++ if (ubi_num == -1) ++ /* No ubi num, name must be a vol device path */ ++ return ubi_open_volume_path(name, UBI_READONLY); ++ else if (vol_id == -1) ++ /* No vol_id, must be vol_name */ ++ return ubi_open_volume_nm(ubi_num, name, UBI_READONLY); ++ else ++ return ubi_open_volume(ubi_num, vol_id, UBI_READONLY); ++} ++ ++static int __init ubiblock_attach_from_param(void) ++{ ++ int i, ret; ++ struct ubiblock_param *p; ++ struct ubi_volume_desc *desc; ++ struct ubi_volume_info vi; ++ ++ for (i = 0; i < ubiblock_devs; i++) { ++ p = &ubiblock_param[i]; ++ ++ desc = open_volume_desc(p->name, p->ubi_num, p->vol_id); ++ if (IS_ERR(desc)) { ++ ubi_err("block: can't open volume, err=%ld\n", ++ PTR_ERR(desc)); ++ ret = PTR_ERR(desc); ++ break; ++ } ++ ++ ubi_get_volume_info(desc, &vi); ++ ubi_close_volume(desc); ++ ++ ret = ubiblock_add(&vi); ++ if (ret) { ++ ubi_err("block: can't add '%s' volume, err=%d\n", ++ vi.name, ret); ++ break; ++ } ++ } ++ return ret; ++} ++ ++static void ubiblock_detach_all(void) ++{ ++ struct ubiblock *next; ++ struct ubiblock *dev; ++ ++ list_for_each_entry_safe(dev, next, &ubiblock_devices, list) { ++ /* Flush pending work and stop workqueue */ ++ destroy_workqueue(dev->wq); ++ /* The module is being forcefully removed */ ++ WARN_ON(dev->desc); ++ /* Remove from device list */ ++ list_del(&dev->list); ++ ubiblock_cleanup(dev); ++ kfree(dev); ++ } ++} ++ ++int __init ubiblock_init(void) ++{ ++ int ret; ++ ++ ubiblock_major = register_blkdev(0, "ubiblock"); ++ if (ubiblock_major < 0) ++ return ubiblock_major; ++ ++ /* Attach block devices from 'block=' module param */ ++ ret = ubiblock_attach_from_param(); ++ if (ret) ++ goto err_detach; ++ ++ /* ++ * Block devices needs to be attached to volumes explicitly ++ * upon user request. So we ignore existing volumes. ++ */ ++ ret = ubi_register_volume_notifier(&ubiblock_notifier, 1); ++ if (ret) ++ goto err_unreg; ++ return 0; ++ ++err_unreg: ++ unregister_blkdev(ubiblock_major, "ubiblock"); ++err_detach: ++ ubiblock_detach_all(); ++ return ret; ++} ++ ++void __exit ubiblock_exit(void) ++{ ++ ubi_unregister_volume_notifier(&ubiblock_notifier); ++ ubiblock_detach_all(); ++ unregister_blkdev(ubiblock_major, "ubiblock"); ++} +diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c +index 57deae9..6e30a3c 100644 +--- a/drivers/mtd/ubi/build.c ++++ b/drivers/mtd/ubi/build.c +@@ -1298,6 +1298,15 @@ static int __init ubi_init(void) + } + } + ++ err = ubiblock_init(); ++ if (err) { ++ ubi_err("block: cannot initialize, error %d", err); ++ ++ /* See comment above re-ubi_is_module(). */ ++ if (ubi_is_module()) ++ goto out_detach; ++ } ++ + return 0; + + out_detach: +@@ -1326,6 +1335,8 @@ static void __exit ubi_exit(void) + { + int i; + ++ ubiblock_exit(); ++ + for (i = 0; i < UBI_MAX_DEVICES; i++) + if (ubi_devices[i]) { + mutex_lock(&ubi_devices_mutex); +diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c +index 8ca49f2..39d3774 100644 +--- a/drivers/mtd/ubi/cdev.c ++++ b/drivers/mtd/ubi/cdev.c +@@ -561,6 +561,26 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + break; + } + ++ /* Attach a block device to an UBI volume */ ++ case UBI_IOCVOLATTBLK: ++ { ++ struct ubi_volume_info vi; ++ ++ ubi_get_volume_info(desc, &vi); ++ err = ubiblock_add(&vi); ++ break; ++ } ++ ++ /* Dettach a block device from an UBI volume */ ++ case UBI_IOCVOLDETBLK: ++ { ++ struct ubi_volume_info vi; ++ ++ ubi_get_volume_info(desc, &vi); ++ err = ubiblock_del(&vi); ++ break; ++ } ++ + default: + err = -ENOTTY; + break; +diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h +index 8ea6297..e76ff98 100644 +--- a/drivers/mtd/ubi/ubi.h ++++ b/drivers/mtd/ubi/ubi.h +@@ -864,6 +864,20 @@ int ubi_update_fastmap(struct ubi_device *ubi); + int ubi_scan_fastmap(struct ubi_device *ubi, struct ubi_attach_info *ai, + int fm_anchor); + ++/* block.c */ ++#ifdef CONFIG_MTD_UBI_BLOCK ++int ubiblock_init(void); ++void ubiblock_exit(void); ++int ubiblock_add(struct ubi_volume_info *vi); ++int ubiblock_del(struct ubi_volume_info *vi); ++#else ++static inline int ubiblock_init(void) { return 0; } ++static inline void ubiblock_exit(void) {} ++static inline int ubiblock_add(struct ubi_volume_info *vi) { return -ENOTTY; } ++static inline int ubiblock_del(struct ubi_volume_info *vi) { return -ENOTTY; } ++#endif ++ ++ + /* + * ubi_rb_for_each_entry - walk an RB-tree. + * @rb: a pointer to type 'struct rb_node' to use as a loop counter +diff --git a/include/uapi/mtd/ubi-user.h b/include/uapi/mtd/ubi-user.h +index 723c324..b98585a 100644 +--- a/include/uapi/mtd/ubi-user.h ++++ b/include/uapi/mtd/ubi-user.h +@@ -134,6 +134,13 @@ + * used. A pointer to a &struct ubi_set_vol_prop_req object is expected to be + * passed. The object describes which property should be set, and to which value + * it should be set. ++ * ++ * Block devices on UBI volumes ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * To attach or detach a block device from an UBI volume the %UBI_IOCVOLATTBLK ++ * and %UBI_IOCVOLDETBLK ioctl commands should be used, respectively. ++ * These commands take no arguments. + */ + + /* +@@ -191,6 +198,10 @@ + /* Set an UBI volume property */ + #define UBI_IOCSETVOLPROP _IOW(UBI_VOL_IOC_MAGIC, 6, \ + struct ubi_set_vol_prop_req) ++/* Attach a block device to an UBI volume */ ++#define UBI_IOCVOLATTBLK _IO(UBI_VOL_IOC_MAGIC, 7) ++/* Detach a block device from an UBI volume */ ++#define UBI_IOCVOLDETBLK _IO(UBI_VOL_IOC_MAGIC, 8) + + /* Maximum MTD device name length supported by UBI */ + #define MAX_UBI_MTD_NAME_LEN 127 diff --git a/board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch b/board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch new file mode 100755 index 000000000000..c36b0ba4b260 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch @@ -0,0 +1,187 @@ +commit 4d283ee2517303afa54ad6cbd9342a2f748cf509 +Author: Artem Bityutskiy +Date: Tue Mar 4 12:00:26 2014 +0200 + + UBI: block: do not use term "attach" + + We already use term attach/detach for UBI->MTD relations, let's not use this + for UBI->ubiblock relations to avoid confusion. Just use 'create' and 'remove' + instead. E.g., "create a R/O block device on top of a UBI volume". + + Signed-off-by: Artem Bityutskiy + +diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c +index cea7d1c..6402e41 100644 +--- a/drivers/mtd/ubi/block.c ++++ b/drivers/mtd/ubi/block.c +@@ -29,10 +29,10 @@ + * + * LEB number = addressed byte / LEB size + * +- * This feature is compiled in the UBI core, and adds a new 'block' parameter +- * to allow early block device attaching. Runtime block attach/detach for UBI +- * volumes is provided through two new UBI ioctls: UBI_IOCVOLATTBLK and +- * UBI_IOCVOLDETBLK. ++ * This feature is compiled in the UBI core, and adds a 'block' parameter ++ * to allow early creation of block devices on top of UBI volumes. Runtime ++ * block creation/removal for UBI volumes is provided through two UBI ioctls: ++ * UBI_IOCVOLATTBLK and UBI_IOCVOLDETBLK. + */ + + #include +@@ -374,7 +374,7 @@ static const struct block_device_operations ubiblock_ops = { + .getgeo = ubiblock_getgeo, + }; + +-int ubiblock_add(struct ubi_volume_info *vi) ++int ubiblock_create(struct ubi_volume_info *vi) + { + struct ubiblock *dev; + struct gendisk *gd; +@@ -464,7 +464,7 @@ static void ubiblock_cleanup(struct ubiblock *dev) + put_disk(dev->gd); + } + +-int ubiblock_del(struct ubi_volume_info *vi) ++int ubiblock_remove(struct ubi_volume_info *vi) + { + struct ubiblock *dev; + +@@ -503,7 +503,8 @@ static void ubiblock_resize(struct ubi_volume_info *vi) + + /* + * Need to lock the device list until we stop using the device, +- * otherwise the device struct might get released in 'ubiblock_del()'. ++ * otherwise the device struct might get released in ++ * 'ubiblock_remove()'. + */ + mutex_lock(&devices_mutex); + dev = find_dev_nolock(vi->ubi_num, vi->vol_id); +@@ -528,12 +529,12 @@ static int ubiblock_notify(struct notifier_block *nb, + switch (notification_type) { + case UBI_VOLUME_ADDED: + /* +- * We want to enforce explicit block device attaching for ++ * We want to enforce explicit block device creation for + * volumes, so when a volume is added we do nothing. + */ + break; + case UBI_VOLUME_REMOVED: +- ubiblock_del(&nt->vi); ++ ubiblock_remove(&nt->vi); + break; + case UBI_VOLUME_RESIZED: + ubiblock_resize(&nt->vi); +@@ -561,7 +562,7 @@ open_volume_desc(const char *name, int ubi_num, int vol_id) + return ubi_open_volume(ubi_num, vol_id, UBI_READONLY); + } + +-static int __init ubiblock_attach_from_param(void) ++static int __init ubiblock_create_from_param(void) + { + int i, ret; + struct ubiblock_param *p; +@@ -582,7 +583,7 @@ static int __init ubiblock_attach_from_param(void) + ubi_get_volume_info(desc, &vi); + ubi_close_volume(desc); + +- ret = ubiblock_add(&vi); ++ ret = ubiblock_create(&vi); + if (ret) { + ubi_err("block: can't add '%s' volume, err=%d\n", + vi.name, ret); +@@ -592,7 +593,7 @@ static int __init ubiblock_attach_from_param(void) + return ret; + } + +-static void ubiblock_detach_all(void) ++static void ubiblock_remove_all(void) + { + struct ubiblock *next; + struct ubiblock *dev; +@@ -618,13 +619,13 @@ int __init ubiblock_init(void) + return ubiblock_major; + + /* Attach block devices from 'block=' module param */ +- ret = ubiblock_attach_from_param(); ++ ret = ubiblock_create_from_param(); + if (ret) +- goto err_detach; ++ goto err_remove; + + /* +- * Block devices needs to be attached to volumes explicitly +- * upon user request. So we ignore existing volumes. ++ * Block devices are only created upon user requests, so we ignore ++ * existing volumes. + */ + ret = ubi_register_volume_notifier(&ubiblock_notifier, 1); + if (ret) +@@ -633,14 +634,14 @@ int __init ubiblock_init(void) + + err_unreg: + unregister_blkdev(ubiblock_major, "ubiblock"); +-err_detach: +- ubiblock_detach_all(); ++err_remove: ++ ubiblock_remove_all(); + return ret; + } + + void __exit ubiblock_exit(void) + { + ubi_unregister_volume_notifier(&ubiblock_notifier); +- ubiblock_detach_all(); ++ ubiblock_remove_all(); + unregister_blkdev(ubiblock_major, "ubiblock"); + } +diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c +index 39d3774..11c8473 100644 +--- a/drivers/mtd/ubi/cdev.c ++++ b/drivers/mtd/ubi/cdev.c +@@ -567,7 +567,7 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + struct ubi_volume_info vi; + + ubi_get_volume_info(desc, &vi); +- err = ubiblock_add(&vi); ++ err = ubiblock_create(&vi); + break; + } + +@@ -577,7 +577,7 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + struct ubi_volume_info vi; + + ubi_get_volume_info(desc, &vi); +- err = ubiblock_del(&vi); ++ err = ubiblock_remove(&vi); + break; + } + +diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h +index e76ff98..2e588a9 100644 +--- a/drivers/mtd/ubi/ubi.h ++++ b/drivers/mtd/ubi/ubi.h +@@ -868,13 +868,19 @@ int ubi_scan_fastmap(struct ubi_device *ubi, struct ubi_attach_info *ai, + #ifdef CONFIG_MTD_UBI_BLOCK + int ubiblock_init(void); + void ubiblock_exit(void); +-int ubiblock_add(struct ubi_volume_info *vi); +-int ubiblock_del(struct ubi_volume_info *vi); ++int ubiblock_create(struct ubi_volume_info *vi); ++int ubiblock_remove(struct ubi_volume_info *vi); + #else + static inline int ubiblock_init(void) { return 0; } + static inline void ubiblock_exit(void) {} +-static inline int ubiblock_add(struct ubi_volume_info *vi) { return -ENOTTY; } +-static inline int ubiblock_del(struct ubi_volume_info *vi) { return -ENOTTY; } ++static inline int ubiblock_create(struct ubi_volume_info *vi) ++{ ++ return -ENOTTY; ++} ++static inline int ubiblock_remove(struct ubi_volume_info *vi) ++{ ++ return -ENOTTY; ++} + #endif + + diff --git a/board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch b/board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch new file mode 100755 index 000000000000..8835ddd7571f --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch @@ -0,0 +1,85 @@ +commit 8af871887fcba470ff9265c65cff7d14d9e0e3f9 +Author: Artem Bityutskiy +Date: Wed Mar 5 13:01:56 2014 +0200 + + UBI: rename block device ioctls + + Rename the UBI_IOCVOLATTBLK and UBI_IOCVOLDETBLK to UBI_IOCVOLCRBLK and + UBI_IOCVOLRMBLK, because we do not use terms "attach" and "detach" for the R/O + block devices on top of UBI volumes. Instead, we use terms "create" and + "remove". This patch also amends the related commentaries. + + Signed-off-by: Artem Bityutskiy + Acked-by: Ezequiel Garcia + +diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c +index 16e6731..69a74fd 100644 +--- a/drivers/mtd/ubi/block.c ++++ b/drivers/mtd/ubi/block.c +@@ -32,7 +32,7 @@ + * This feature is compiled in the UBI core, and adds a 'block' parameter + * to allow early creation of block devices on top of UBI volumes. Runtime + * block creation/removal for UBI volumes is provided through two UBI ioctls: +- * UBI_IOCVOLATTBLK and UBI_IOCVOLDETBLK. ++ * UBI_IOCVOLCRBLK and UBI_IOCVOLRMBLK. + */ + + #include +diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c +index 11c8473..f54562a 100644 +--- a/drivers/mtd/ubi/cdev.c ++++ b/drivers/mtd/ubi/cdev.c +@@ -561,8 +561,8 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + break; + } + +- /* Attach a block device to an UBI volume */ +- case UBI_IOCVOLATTBLK: ++ /* Create a R/O block device on top of the UBI volume */ ++ case UBI_IOCVOLCRBLK: + { + struct ubi_volume_info vi; + +@@ -571,8 +571,8 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + break; + } + +- /* Dettach a block device from an UBI volume */ +- case UBI_IOCVOLDETBLK: ++ /* Remove the R/O block device */ ++ case UBI_IOCVOLRMBLK: + { + struct ubi_volume_info vi; + +diff --git a/include/uapi/mtd/ubi-user.h b/include/uapi/mtd/ubi-user.h +index b98585a..9c885e2 100644 +--- a/include/uapi/mtd/ubi-user.h ++++ b/include/uapi/mtd/ubi-user.h +@@ -138,9 +138,9 @@ + * Block devices on UBI volumes + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * +- * To attach or detach a block device from an UBI volume the %UBI_IOCVOLATTBLK +- * and %UBI_IOCVOLDETBLK ioctl commands should be used, respectively. +- * These commands take no arguments. ++ * To create or remove a R/O block device on top of an UBI volume the ++ * %UBI_IOCVOLCRBLK and %UBI_IOCVOLRMBLK ioctl commands should be used, ++ * respectively. These commands take no arguments. + */ + + /* +@@ -198,10 +198,10 @@ + /* Set an UBI volume property */ + #define UBI_IOCSETVOLPROP _IOW(UBI_VOL_IOC_MAGIC, 6, \ + struct ubi_set_vol_prop_req) +-/* Attach a block device to an UBI volume */ +-#define UBI_IOCVOLATTBLK _IO(UBI_VOL_IOC_MAGIC, 7) +-/* Detach a block device from an UBI volume */ +-#define UBI_IOCVOLDETBLK _IO(UBI_VOL_IOC_MAGIC, 8) ++/* Create a R/O block device on top of an UBI volume */ ++#define UBI_IOCVOLCRBLK _IO(UBI_VOL_IOC_MAGIC, 7) ++/* Remove the R/O block device */ ++#define UBI_IOCVOLRMBLK _IO(UBI_VOL_IOC_MAGIC, 8) + + /* Maximum MTD device name length supported by UBI */ + #define MAX_UBI_MTD_NAME_LEN 127 diff --git a/board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch b/board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch new file mode 100755 index 000000000000..41049bab5881 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch @@ -0,0 +1,58 @@ +commit 463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4 +Author: Ezequiel Garcia +Date: Wed Mar 5 11:16:14 2014 -0300 + + UBI: make UBI_IOCVOLCRBLK take a parameter for future usage + + In order to allow a future ioctl parameter, such as a creation flag, + we change the UBI_IOCVOLCRBLK so it accepts a struct ubi_blkcreate_req. + For the time being the structure is not in use, but fully reserved. + + This ABI change is still possible and harmless, because the ioctl has just + been introduced and there's no userspace program which uses it. + + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + +diff --git a/include/uapi/mtd/ubi-user.h b/include/uapi/mtd/ubi-user.h +index 9c885e2..1927b0d 100644 +--- a/include/uapi/mtd/ubi-user.h ++++ b/include/uapi/mtd/ubi-user.h +@@ -138,9 +138,12 @@ + * Block devices on UBI volumes + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * +- * To create or remove a R/O block device on top of an UBI volume the +- * %UBI_IOCVOLCRBLK and %UBI_IOCVOLRMBLK ioctl commands should be used, +- * respectively. These commands take no arguments. ++ * To create a R/O block device on top of an UBI volume the %UBI_IOCVOLCRBLK ++ * should be used. A pointer to a &struct ubi_blkcreate_req object is expected ++ * to be passed, which is not used and reserved for future usage. ++ * ++ * Conversely, to remove a block device the %UBI_IOCVOLRMBLK should be used, ++ * which takes no arguments. + */ + + /* +@@ -199,7 +202,7 @@ + #define UBI_IOCSETVOLPROP _IOW(UBI_VOL_IOC_MAGIC, 6, \ + struct ubi_set_vol_prop_req) + /* Create a R/O block device on top of an UBI volume */ +-#define UBI_IOCVOLCRBLK _IO(UBI_VOL_IOC_MAGIC, 7) ++#define UBI_IOCVOLCRBLK _IOW(UBI_VOL_IOC_MAGIC, 7, struct ubi_blkcreate_req) + /* Remove the R/O block device */ + #define UBI_IOCVOLRMBLK _IO(UBI_VOL_IOC_MAGIC, 8) + +@@ -431,4 +434,12 @@ struct ubi_set_vol_prop_req { + __u64 value; + } __packed; + ++/** ++ * struct ubi_blkcreate_req - a data structure used in block creation requests. ++ * @padding: reserved for future, not used, has to be zeroed ++ */ ++struct ubi_blkcreate_req { ++ __s8 padding[128]; ++} __packed; ++ + #endif /* __UBI_USER_H__ */ diff --git a/board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch b/board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch new file mode 100755 index 000000000000..ecf31bc182d7 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch @@ -0,0 +1,50 @@ +commit 0a3d571bb8940a189322cc5f51466bdab044a48b +Author: Ezequiel Garcia +Date: Mon May 5 07:11:53 2014 -0300 + + UBI: block: Set disk_capacity out of the mutex + + There's no need to set the disk capacity with the mutex held, so this + commit takes the variable setting out of the mutex. This simplifies + the disk capacity fix for very large volumes in a follow up commit. + + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + +diff -Naur CURRENT/drivers/mtd/ubi/block.c PATCHED/drivers/mtd/ubi/block.c +--- CURRENT/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.370858165 +0000 ++++ PATCHED/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.399858531 +0000 +@@ -378,7 +378,7 @@ + { + struct ubiblock *dev; + struct gendisk *gd; +- int disk_capacity; ++ int disk_capacity = (vi->size * vi->usable_leb_size) >> 9; + int ret; + + /* Check that the volume isn't already handled */ +@@ -412,7 +412,6 @@ + gd->first_minor = dev->ubi_num * UBI_MAX_VOLUMES + dev->vol_id; + gd->private_data = dev; + sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id); +- disk_capacity = (vi->size * vi->usable_leb_size) >> 9; + set_capacity(gd, disk_capacity); + dev->gd = gd; + +@@ -499,7 +498,7 @@ + static void ubiblock_resize(struct ubi_volume_info *vi) + { + struct ubiblock *dev; +- int disk_capacity; ++ int disk_capacity = (vi->size * vi->usable_leb_size) >> 9; + + /* + * Need to lock the device list until we stop using the device, +@@ -514,7 +513,6 @@ + } + + mutex_lock(&dev->dev_mutex); +- disk_capacity = (vi->size * vi->usable_leb_size) >> 9; + set_capacity(dev->gd, disk_capacity); + ubi_msg("%s resized to %d LEBs", dev->gd->disk_name, vi->size); + mutex_unlock(&dev->dev_mutex); diff --git a/board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch b/board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch new file mode 100755 index 000000000000..af81ba207bf1 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch @@ -0,0 +1,44 @@ +commit 4df38926f337ff4de49a8fb512aa4a55df0c502d +Author: Richard Weinberger +Date: Mon May 5 07:11:54 2014 -0300 + + UBI: block: Avoid disk size integer overflow + + This patch fixes the issue that on very large UBI volumes + UBI block does not work correctly. + + Signed-off-by: Richard Weinberger + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + +diff -Naur CURRENT/drivers/mtd/ubi/block.c PATCHED/drivers/mtd/ubi/block.c +--- CURRENT/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.475859490 +0000 ++++ PATCHED/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.500859806 +0000 +@@ -378,9 +378,11 @@ + { + struct ubiblock *dev; + struct gendisk *gd; +- int disk_capacity = (vi->size * vi->usable_leb_size) >> 9; ++ u64 disk_capacity = ((u64)vi->size * vi->usable_leb_size) >> 9; + int ret; + ++ if ((sector_t)disk_capacity != disk_capacity) ++ return -EFBIG; + /* Check that the volume isn't already handled */ + mutex_lock(&devices_mutex); + if (find_dev_nolock(vi->ubi_num, vi->vol_id)) { +@@ -498,8 +500,13 @@ + static void ubiblock_resize(struct ubi_volume_info *vi) + { + struct ubiblock *dev; +- int disk_capacity = (vi->size * vi->usable_leb_size) >> 9; ++ u64 disk_capacity = ((u64)vi->size * vi->usable_leb_size) >> 9; + ++ if ((sector_t)disk_capacity != disk_capacity) { ++ ubi_warn("%s: the volume is too big, cannot resize (%d LEBs)", ++ dev->gd->disk_name, vi->size); ++ return -EFBIG; ++ } + /* + * Need to lock the device list until we stop using the device, + * otherwise the device struct might get released in diff --git a/board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch b/board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch new file mode 100755 index 000000000000..62b10a26ead7 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch @@ -0,0 +1,30 @@ +commit 49e236bc4a2639af0e77b3a05460e8367e3187a4 +Author: Richard Weinberger +Date: Sun Jul 27 09:35:48 2014 +0200 + + UBI: bugfix in ubi_wl_flush() + + Use the _safe variant because we're iterating over a list where items get + deleted and freed. + + Signed-off-by: Richard Weinberger + Signed-off-by: Artem Bityutskiy + +diff -Naur CURRENT/drivers/mtd/ubi/wl.c PATCHED/drivers/mtd/ubi/wl.c +--- CURRENT/drivers/mtd/ubi/wl.c 2017-02-13 08:32:49.714849000 +0000 ++++ PATCHED/drivers/mtd/ubi/wl.c 2017-02-13 08:32:50.606861144 +0000 +@@ -1712,12 +1712,12 @@ + vol_id, lnum, ubi->works_count); + + while (found) { +- struct ubi_work *wrk; ++ struct ubi_work *wrk, *tmp; + found = 0; + + down_read(&ubi->work_sem); + spin_lock(&ubi->wl_lock); +- list_for_each_entry(wrk, &ubi->works, list) { ++ list_for_each_entry_safe(wrk, tmp, &ubi->works, list) { + if ((vol_id == UBI_ALL || wrk->vol_id == vol_id) && + (lnum == UBI_ALL || wrk->lnum == lnum)) { + list_del(&wrk->list); diff --git a/board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch b/board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch new file mode 100755 index 000000000000..5381048e26b4 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch @@ -0,0 +1,48 @@ +commit 3df770725339c41d1cd9be4da4ca0d968119d8ad +Author: Colin Ian King +Date: Wed Aug 20 10:19:38 2014 +0100 + + UBI: block: fix dereference on uninitialized dev + + commit 4df38926f337 ("UBI: block: Avoid disk size integer overflow") + introduced a dereference on dev (which is not initialized at that + point) when printing a warning message. Re-order disk_capacity check + after the dev is found. + + Found by cppcheck: + [drivers/mtd/ubi/block.c:509]: (error) Uninitialized variable: dev + + Artem: tweak the error message a bit + + Signed-off-by: Colin Ian King + Acked-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + +diff -Naur CURRENT/drivers/mtd/ubi/block.c PATCHED/drivers/mtd/ubi/block.c +--- CURRENT/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.689862193 +0000 ++++ PATCHED/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.718862560 +0000 +@@ -502,11 +502,6 @@ + struct ubiblock *dev; + u64 disk_capacity = ((u64)vi->size * vi->usable_leb_size) >> 9; + +- if ((sector_t)disk_capacity != disk_capacity) { +- ubi_warn("%s: the volume is too big, cannot resize (%d LEBs)", +- dev->gd->disk_name, vi->size); +- return -EFBIG; +- } + /* + * Need to lock the device list until we stop using the device, + * otherwise the device struct might get released in +@@ -518,6 +513,12 @@ + mutex_unlock(&devices_mutex); + return; + } ++ if ((sector_t)disk_capacity != disk_capacity) { ++ mutex_unlock(&devices_mutex); ++ ubi_warn("%s: the volume is too big (%d LEBs), cannot resize", ++ dev->gd->disk_name, vi->size); ++ return -EFBIG; ++ } + + mutex_lock(&dev->dev_mutex); + set_capacity(dev->gd, disk_capacity); diff --git a/board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch b/board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch new file mode 100755 index 000000000000..1b0e716fed36 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch @@ -0,0 +1,81 @@ +commit 978d6496758d19de2431ebf163337fc7b92f8c45 +Author: Ezequiel Garcia +Date: Fri Aug 29 18:42:28 2014 -0300 + + UBI: block: Fix block device size setting + + We are currently taking the block device size from the ubi_volume_info.size + field. However, this is not the amount of data in the volume, but the + number of reserved physical eraseblocks, and hence leads to an incorrect + representation of the volume. + + In particular, this produces I/O errors on static volumes as the block + interface may attempt to read unmapped PEBs: + + $ cat /dev/ubiblock0_0 > /dev/null + UBI error: ubiblock_read_to_buf: ubiblock0_0 ubi_read error -22 + end_request: I/O error, dev ubiblock0_0, sector 9536 + Buffer I/O error on device ubiblock0_0, logical block 2384 + [snip] + + Fix this by using the ubi_volume_info.used_bytes field which is set to the + actual number of data bytes for both static and dynamic volumes. + + While here, improve the error message to be less stupid and more useful: + UBI error: ubiblock_read_to_buf: ubiblock0_1 ubi_read error -9 on LEB=0, off=15872, len=512 + + It's worth noticing that the 512-byte sector representation of the volume + is only correct if the volume size is multiple of 512-bytes. This is true for + virtually any NAND device, given eraseblocks and pages are 512-byte multiple + and hence so is the LEB size. + + Artem: tweak the error message and make it look more like other UBI error + messages. + + Fixes: 9d54c8a33eec ("UBI: R/O block driver on top of UBI volumes") + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + Cc: stable@vger.kernel.org # v3.15+ + +diff -Naur CURRENT/drivers/mtd/ubi/block.c PATCHED/drivers/mtd/ubi/block.c +--- CURRENT/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.797863557 +0000 ++++ PATCHED/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.821863860 +0000 +@@ -188,8 +188,9 @@ + + ret = ubi_read(dev->desc, leb, buffer, offset, len); + if (ret) { +- ubi_err("%s ubi_read error %d", +- dev->gd->disk_name, ret); ++ ubi_err("%s: error %d while reading from LEB %d (offset %d, " ++ "length %d)", dev->gd->disk_name, ret, leb, offset, ++ len); + return ret; + } + return 0; +@@ -378,7 +379,7 @@ + { + struct ubiblock *dev; + struct gendisk *gd; +- u64 disk_capacity = ((u64)vi->size * vi->usable_leb_size) >> 9; ++ u64 disk_capacity = vi->used_bytes >> 9; + int ret; + + if ((sector_t)disk_capacity != disk_capacity) +@@ -500,7 +501,7 @@ + static void ubiblock_resize(struct ubi_volume_info *vi) + { + struct ubiblock *dev; +- u64 disk_capacity = ((u64)vi->size * vi->usable_leb_size) >> 9; ++ u64 disk_capacity = vi->used_bytes >> 9; + + /* + * Need to lock the device list until we stop using the device, +@@ -522,7 +523,7 @@ + + mutex_lock(&dev->dev_mutex); + set_capacity(dev->gd, disk_capacity); +- ubi_msg("%s resized to %d LEBs", dev->gd->disk_name, vi->size); ++ ubi_msg("%s resized to %lld bytes", dev->gd->disk_name, vi->used_bytes); + mutex_unlock(&dev->dev_mutex); + mutex_unlock(&devices_mutex); + } diff --git a/board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch b/board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch new file mode 100755 index 000000000000..14998893ffac --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch @@ -0,0 +1,47 @@ +commit 06d9c2905f745c8b1920a335cbb366ba6b0fc754 +Author: Ezequiel Garcia +Date: Fri Aug 29 18:42:29 2014 -0300 + + UBI: block: Add support for the UBI_VOLUME_UPDATED notification + + Static volumes can change its 'used_bytes' when they get updated, + and so the block interface must listen to the UBI_VOLUME_UPDATED + notification to resize the block device accordingly. + + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + Cc: stable@vger.kernel.org # v3.15+ + +diff -Naur CURRENT/drivers/mtd/ubi/block.c PATCHED/drivers/mtd/ubi/block.c +--- CURRENT/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.913865022 +0000 ++++ PATCHED/drivers/mtd/ubi/block.c 2017-02-13 08:32:50.937865325 +0000 +@@ -522,8 +522,12 @@ + } + + mutex_lock(&dev->dev_mutex); +- set_capacity(dev->gd, disk_capacity); +- ubi_msg("%s resized to %lld bytes", dev->gd->disk_name, vi->used_bytes); ++ ++ if (get_capacity(dev->gd) != disk_capacity) { ++ set_capacity(dev->gd, disk_capacity); ++ ubi_msg("%s resized to %lld bytes", dev->gd->disk_name, ++ vi->used_bytes); ++ } + mutex_unlock(&dev->dev_mutex); + mutex_unlock(&devices_mutex); + } +@@ -546,6 +550,14 @@ + case UBI_VOLUME_RESIZED: + ubiblock_resize(&nt->vi); + break; ++ case UBI_VOLUME_UPDATED: ++ /* ++ * If the volume is static, a content update might mean the ++ * size (i.e. used_bytes) was also changed. ++ */ ++ if (nt->vi.vol_type == UBI_STATIC_VOLUME) ++ ubiblock_resize(&nt->vi); ++ break; + default: + break; + } diff --git a/board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch b/board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch new file mode 100755 index 000000000000..f36812667607 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch @@ -0,0 +1,34 @@ +commit fda322a1b3b9e8ee231913c500f73c6988b1aff5 +Author: Ezequiel Garcia +Date: Fri Aug 29 18:42:30 2014 -0300 + + UBI: Dispatch update notification if the volume is updated + + The UBI_IOCVOLUP ioctl is used to start an update and also to + truncate a volume. In the first case, a "volume updated" notification + is dispatched when the update is done. + + This commit adds the "volume updated" notification to be also sent when + the volume is truncated. This is required for UBI block and gluebi to get + notified about the new volume size. + + Signed-off-by: Ezequiel Garcia + Signed-off-by: Artem Bityutskiy + Cc: stable@vger.kernel.org # v3.15+ + +diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c +index 7646220..20aeb277 100644 +--- a/drivers/mtd/ubi/cdev.c ++++ b/drivers/mtd/ubi/cdev.c +@@ -425,8 +425,10 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd, + break; + + err = ubi_start_update(ubi, vol, bytes); +- if (bytes == 0) ++ if (bytes == 0) { ++ ubi_volume_notify(ubi, vol, UBI_VOLUME_UPDATED); + revoke_exclusive(desc, UBI_READWRITE); ++ } + break; + } + diff --git a/board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch b/board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch new file mode 100755 index 000000000000..da337eb736a7 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch @@ -0,0 +1,25 @@ +commit adfe83be973dc990f3763de3667c4cd004e6e4f7 +Author: Richard Weinberger +Date: Fri Sep 19 11:48:47 2014 +0200 + + UBI: Improve comment on work_sem + + Make clear what work_sem really does. + + Suggested-by: Artem Bityutskiy + Signed-off-by: Richard Weinberger + Signed-off-by: Artem Bityutskiy + +diff -Naur CURRENT/drivers/mtd/ubi/ubi.h PATCHED/drivers/mtd/ubi/ubi.h +--- CURRENT/drivers/mtd/ubi/ubi.h 2017-02-13 08:32:51.247869238 +0000 ++++ PATCHED/drivers/mtd/ubi/ubi.h 2017-02-13 08:32:51.296869856 +0000 +@@ -440,7 +440,8 @@ + * @move_to, @move_to_put @erase_pending, @wl_scheduled, @works, + * @erroneous, and @erroneous_peb_count fields + * @move_mutex: serializes eraseblock moves +- * @work_sem: synchronizes the WL worker with use tasks ++ * @work_sem: used to wait for all the scheduled works to finish and prevent ++ * new works from being submitted + * @wl_scheduled: non-zero if the wear-leveling was scheduled + * @lookuptbl: a table to quickly find a &struct ubi_wl_entry object for any + * physical eraseblock diff --git a/board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch b/board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch new file mode 100755 index 000000000000..a913840a28b4 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch @@ -0,0 +1,27 @@ +commit 7fbbd05799976c0611dcb229649260504b2bdef5 +Author: Dan Carpenter +Date: Fri Sep 19 13:56:56 2014 +0300 + + UBI: return on error in rename_volumes() + + I noticed this during a code review. We are checking that the strlen() + of ->name is not less than the ->name_len which the user gave us. I + believe this bug is harmless but clearly we meant to return here instead + of setting an error code and then not using it. + + Signed-off-by: Dan Carpenter + Signed-off-by: Artem Bityutskiy + +diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c +index 20aeb277..59de69a 100644 +--- a/drivers/mtd/ubi/cdev.c ++++ b/drivers/mtd/ubi/cdev.c +@@ -701,7 +701,7 @@ static int rename_volumes(struct ubi_device *ubi, + req->ents[i].name[req->ents[i].name_len] = '\0'; + n = strlen(req->ents[i].name); + if (n != req->ents[i].name_len) +- err = -EINVAL; ++ return -EINVAL; + } + + /* Make sure volume IDs and names are unique */ diff --git a/board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch b/board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch new file mode 100755 index 000000000000..fd32fdd6f8b7 --- /dev/null +++ b/board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch @@ -0,0 +1,29 @@ +commit b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf +Author: Richard Weinberger +Date: Fri Sep 19 17:37:56 2014 +0200 + + UBI: Fix livelock in produce_free_peb() + + The while loop in produce_free_peb() assumes that each work will produce a + free PEB. This is not true. + If ubi->works_count is 1 and the only scheduled work is the + wear_leveling_worker() produce_free_peb() can loop forever in case + nobody schedules an erase work. + Fix this issue by checking in the while loop whether work is scheduled. + + Signed-off-by: Richard Weinberger + Signed-off-by: Artem Bityutskiy + +diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c +index 20f4917..32b3c14 100644 +--- a/drivers/mtd/ubi/wl.c ++++ b/drivers/mtd/ubi/wl.c +@@ -272,7 +272,7 @@ static int produce_free_peb(struct ubi_device *ubi) + { + int err; + +- while (!ubi->free.rb_node) { ++ while (!ubi->free.rb_node && ubi->works_count) { + spin_unlock(&ubi->wl_lock); + + dbg_wl("do one work synchronously"); diff --git a/board/uma/patches/99_kernel_stricter_compiler.patch b/board/uma/patches/99_kernel_stricter_compiler.patch new file mode 100644 index 000000000000..5ff8f7ce89f4 --- /dev/null +++ b/board/uma/patches/99_kernel_stricter_compiler.patch @@ -0,0 +1,11 @@ +--- linux-master/drivers/net/ethernet/broadcom/genet/bcmgenet.org 2017-12-08 15:58:14.330854015 +0100 ++++ linux-master/drivers/net/ethernet/broadcom/genet/bcmgenet.h 2017-12-08 15:59:52.831648203 +0100 +@@ -21,7 +21,7 @@ + #define __BCMGENET_H__ + + #define VERSION "2.0" +-#define VER_STR "v" VERSION " " __DATE__ " " __TIME__ ++#define VER_STR "v" VERSION " Dec 8 2017 15:59:01" + + #include + #include diff --git a/board/uma/uma.sh b/board/uma/uma.sh new file mode 100755 index 000000000000..73aa3c317e3c --- /dev/null +++ b/board/uma/uma.sh @@ -0,0 +1,51 @@ +#!/bin/sh +BOARD_DIR="$(dirname $0)" +ROOTFS_DIR="${BINARIES_DIR}/../rootfs" +ROOTFS_FILES="${BINARIES_DIR}/rootfs.files" +STAR="*" + +# Clean up target +rm -rf "${TARGET_DIR}/usr/lib/gstreamer-1.0/include" +rm -rf "${TARGET_DIR}/usr/lib/libstdc++.so.6.0.20-gdb.py" +rm -rf "${TARGET_DIR}/etc/ssl/man" + +# Temp rootfs dir +mkdir -p "${ROOTFS_DIR}" + +# Create files list for rsync +rm -rf "${ROOTFS_FILES}" +while read line +do + find "${TARGET_DIR}" -name "$line$STAR" -printf "%P\n" >> "${ROOTFS_FILES}" +done < "${BOARD_DIR}/uma.txt" + +# Append missing folders +echo "usr/lib/gstreamer-1.0" >> "${ROOTFS_FILES}" +echo "usr/lib/gio" >> "${ROOTFS_FILES}" +echo "usr/share/X11" >> "${ROOTFS_FILES}" +echo "usr/share/mime" >> "${ROOTFS_FILES}" +echo "etc/playready" >> "${ROOTFS_FILES}" +echo "etc/ssl" >> "${ROOTFS_FILES}" +echo "etc/fonts" >> "${ROOTFS_FILES}" + +rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_DIR}" + +# Default font +mkdir -p "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera" +cp -f "${TARGET_DIR}/usr/share/fonts/ttf-bitstream-vera/Vera.ttf" "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera/" + +# move utility lib of brcm plugin to usr/lib +mv "${ROOTFS_DIR}/usr/lib/gstreamer-1.0/libbrcmgstutil.so" "${ROOTFS_DIR}/usr/lib/" + +# WPEFramework launcher +cp -pf "${BOARD_DIR}/wpeframework.sh" "${ROOTFS_DIR}" + +# WebServer path +mkdir -p "${ROOTFS_DIR}/www" + +# Create tar +tar -cvf "${BINARIES_DIR}/uma.tar" -C "${ROOTFS_DIR}" . + +# Cleaning up +rm -rf "${ROOTFS_FILES}" +rm -rf "${ROOTFS_DIR}" diff --git a/board/uma/uma.txt b/board/uma/uma.txt new file mode 100644 index 000000000000..4e730151456b --- /dev/null +++ b/board/uma/uma.txt @@ -0,0 +1,124 @@ +WPENetworkProcess +WPEWebProcess +WPEDatabaseProcess +WPEStorageProcess +WPEFramework +WPEProcess +gst-plugin-scanner +gst-inspect-1.0 +gst-launch-1.0 +gst-typefind-1.0 +libatomic.so +libudev.so +libcairo.so +libcares.so +libcrypto.so +libcurl.so +libevdev.so +libexpat.so +libfaad.so +libffi.so +libfontconfig.so +libfreetype.so +libgcc_s.so +libgcrypt.so +libgio-2.0.so +libglib-2.0.so +libepoxy.so +libgmodule-2.0.so +libgmp.so +libgnutls.so +libgobject-2.0.so +libgpg-error.so +libgraphite2.so +libgstadaptivedemux-1.0.so +libgstapp-1.0.so +libgstaudio-1.0.so +libgstbase-1.0.so +libgstcodecparsers-1.0.so +libgstfaad.so +libgstfft-1.0.so +libgstpbutils-1.0.so +libgstmpegts-1.0.so +libgstnet-1.0.so +libgstreamer-1.0.so +libgsttag-1.0.so +libgstriff-1.0.so +libgstrtp-1.0.so +libgsturidownloader-1.0.so +libgstvideo-1.0.so +libharfbuzz-icu.so +libharfbuzz.so +libhogweed.so +libicudata.so +libicui18n.so +libicuuc.so +libinput.so +libjpeg.so +libmpg123.so +libmng.so +libmtdev.so +libnetflix.so +libnettle.so +liborc-0.4.so +liborc-test-0.4.so +libpcre.so +libpixman-1.so +libplayready.so +libpng16.so +libprovision.so +librpc.so +libsoup-2.4.so +libsqlite3.so +libstdc++.so +libtasn1.so +libwebp.so +libwebsocket.so +libWPE.so +libWPE-platform.so +libWPEWebInspectorResources.so +libWPEWebKit.so +libxkbcommon.so +libxml2.so +libxslt.so +libz.so +libssl.so +libgnutls-openssl.so +libgnutlsxx.so +libpcreposix.so +libmount.so.1 +libblkid.so.1 +libuuid.so.1 +libintl.so.8 +libiconv.so.2 +ca-certificates.crt +libWPEFrameworkDeviceInfo.so +libWPEFrameworkLocationSync.so +libWPEFrameworkRemoteControl.so +libWPEFrameworkWebKitBrowser.so +libWPEFrameworkDIALServer.so +libWPEFrameworkMonitor.so +libWPEFrameworkTraceControl.so +libWPEFrameworkWebServer.so +libWPEFrameworkInterfaces.so +libWPEFrameworkProxyStubs.so +libWPEFrameworkCore.so +libWPEFrameworkCryptalgo.so +libWPEFrameworkPlugins.so +libWPEFrameworkProtocols.so +libWPEFrameworkTracing.so +libWPEFrameworkVirtualInput.so +libWPEFrameworkTimeSync.so +libWPEFrameworkWebShell.so +libnxclient.so +libWPEBackend.so +libWPEBackend-rdk.so +libWPEBackend-default.so +libwebpdemux.so +libbrcmgstutil.so +libbrcmaudiodecoder.so +libbrcmaudiofilter.so +libbrcmaudiosink.so +libbrcmvideodecoder.so +libbrcmvideosink.so +libbrcmvidfilter.so diff --git a/board/uma/uma.txt.exclude_common_libraries b/board/uma/uma.txt.exclude_common_libraries new file mode 100644 index 000000000000..05cd7fae9905 --- /dev/null +++ b/board/uma/uma.txt.exclude_common_libraries @@ -0,0 +1,122 @@ +WPENetworkProcess +WPEWebProcess +WPEDatabaseProcess +WPEFramework +WPEProcess +#gst-plugin-scanner +#gst-inspect-1.0 +#gst-launch-1.0 +#gst-typefind-1.0 +libatomic.so +libudev.so +#libcairo.so +libcares.so +#libcrypto.so +libcurl.so +libevdev.so +#libexpat.so +libfaad.so +#libffi.so +#libfontconfig.so +libfreetype.so +libgcc_s.so +libgcrypt.so +#libgio-2.0.so +#libglib-2.0.so +#libgmodule-2.0.so +#libgmp.so +libgnutls.so +#libgobject-2.0.so +libgpg-error.so +libgraphite2.so +libgstadaptivedemux-1.0.so +#libgstapp-1.0.so +#libgstaudio-1.0.so +#libgstbase-1.0.so +#libgstcodecparsers-1.0.so +libgstfaad.so +#libgstfft-1.0.so +#libgstpbutils-1.0.so +#libgstmpegts-1.0.so +#libgstnet-1.0.so +#libgstreamer-1.0.so +#libgsttag-1.0.so +#libgstriff-1.0.so +#libgstrtp-1.0.so +#libgsturidownloader-1.0.so +#libgstvideo-1.0.so +libharfbuzz-icu.so +libharfbuzz.so +libhogweed.so +libicudata.so +libicui18n.so +libicuuc.so +libinput.so +libjpeg.so +libmpg123.so +libmng.so +libmtdev.so +#libnetflix.so +libnettle.so +liborc-0.4.so +liborc-test-0.4.so +#libpcre.so +#libpixman-1.so +#libplayready.so +#libpng16.so +#libprovision.so +librpc.so +#libsoup-2.4.so +#libsqlite3.so +libstdc++.so +libtasn1.so +libwebp.so +libwebsocket.so +libWPE.so +libWPE-platform.so +libWPEWebInspectorResources.so +libWPEWebKit.so +libxkbcommon.so +#libxml2.so +#libxslt.so +#libz.so +#libssl.so +libgnutls-openssl.so +libgnutlsxx.so +#libpcreposix.so +libmount.so.1 +libblkid.so.1 +#libuuid.so.1 +libintl.so.8 +libiconv.so.2 +ca-certificates.crt +libWPEFrameworkDeviceInfo.so +libWPEFrameworkLocationSync.so +libWPEFrameworkRemoteControl.so +libWPEFrameworkWebKitBrowser.so +libWPEFrameworkDIALServer.so +libWPEFrameworkMonitor.so +libWPEFrameworkTraceControl.so +libWPEFrameworkWebServer.so +libWPEFrameworkInterfaces.so +libWPEFrameworkProxyStubs.so +libWPEFrameworkCore.so +libWPEFrameworkCryptalgo.so +libWPEFrameworkPlugins.so +libWPEFrameworkProtocols.so +libWPEFrameworkTracing.so +libWPEFrameworkVirtualInput.so +libWPEFrameworkTimeSync.so +libWPEFrameworkWebShell.so +#libnxclient.so +libWPEBackend.so +libWPEBackend-rdk.so +libWPEBackend-default.so +libwebpdemux.so +libbrcmgstutil.so +libbrcmaudiodecoder.so +libbrcmaudiofilter.so +libbrcmaudiosink.so +libbrcmvideodecoder.so +libbrcmvideosink.so +libbrcmvidfilter.so diff --git a/board/uma/wpeframework.sh b/board/uma/wpeframework.sh new file mode 100755 index 000000000000..674825694d6d --- /dev/null +++ b/board/uma/wpeframework.sh @@ -0,0 +1,9 @@ +#!/bin/sh +export SOURCE=/metro +export LD_LIBRARY_PATH=$SOURCE/usr/lib:$SOURCE/usr/lib/wpeframework:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs:/lib:/usr/lib:$SOURCE/lib +export PATH=$PATH:$SOURCE/usr/bin + +export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner +export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/lib/gstreamer-1.0 + +LD_PRELOAD=$SOURCE/usr/lib/libstdc\+\+.so.6.0.21 WPEFramework diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig new file mode 100644 index 000000000000..af935dadf7ce --- /dev/null +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -0,0 +1,112 @@ +BR2_arm=y +BR2_cortex_a7=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_TOOLCHAIN_BUILDROOT_VENDOR="uma" +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_GCC_ENABLE_GRAPHITE=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_HOSTNAME="uma" +BR2_TARGET_GENERIC_ISSUE="Welcome" +BR2_TARGET_GENERIC_CABUNDLE=y +BR2_ROOTFS_DEVICE_CREATION_STATIC=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_SYSTEM_DHCP="eth0" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="ssh://git@github.com/Metrological/bcm-stblinux-3.14" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="3.14-1.9-hf" +BR2_LINUX_KERNEL_PATCH="board/uma/patches" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/uma/linux-3-14.config" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_FFMPEG=y +BR2_PACKAGE_FFMPEG_GPL=y +BR2_PACKAGE_FFMPEG_NONFREE=y +BR2_PACKAGE_FFMPEG_AVRESAMPLE=y +BR2_PACKAGE_FFMPEG_POSTPROC=y +BR2_PACKAGE_FFMPEG_SWSCALE=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_BCM=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NETFLIX=y +BR2_PACKAGE_NETFLIX_LIB=y +BR2_PACKAGE_GDB=y +BR2_PACKAGE_GETTEXT=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_BCM_REFSW=y +BR2_PACKAGE_BCM_REFSW_17_3_RDK=y +BR2_PACKAGE_ALSA_LIB=y +# BR2_PACKAGE_ALSA_LIB_ALOAD is not set +# BR2_PACKAGE_ALSA_LIB_RAWMIDI is not set +# BR2_PACKAGE_ALSA_LIB_HWDEP is not set +# BR2_PACKAGE_ALSA_LIB_ALISP is not set +# BR2_PACKAGE_ALSA_LIB_OLD_SYMBOLS is not set +BR2_PACKAGE_LIBVORBIS=y +BR2_PACKAGE_TREMOR=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_PORT="" +BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PREFIX="NOS" +BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY="10" +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +# BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y +BR2_PACKAGE_LIBVPX=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_DROPBEAR=y +# BR2_PACKAGE_DROPBEAR_CLIENT is not set +# BR2_PACKAGE_DROPBEAR_SMALL is not set +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_UTIL_LINUX_PIVOT_ROOT=y diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 4bd241bdf249..138b94a2fadc 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -111,7 +111,6 @@ endif config BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL - depends on !BR2_TARGET_GENERIC_NETWORK select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "NetworkControl" help diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 69ef0bd46d53..d63005b339f8 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -55,6 +55,9 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX_MEMORYLIMIT=${BR endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL),y) +ifeq ($(BR2_TARGET_GENERIC_NETWORK),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_NETWORKCONTROL_SYSTEM_NETWORK=ON +endif WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETWORKCONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) From 4b4fb43cfd58aa467432457c5279d808258e0032 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 13 Jun 2018 16:17:50 +0200 Subject: [PATCH 228/614] [OPKG] Security implementation started. All dependencies included and compile flags corrected. --- package/opkg/001-provisioning_hook.patch | 56 +++++++++++++++++++++--- 1 file changed, 51 insertions(+), 5 deletions(-) diff --git a/package/opkg/001-provisioning_hook.patch b/package/opkg/001-provisioning_hook.patch index fca96a690be7..506c48be75d1 100644 --- a/package/opkg/001-provisioning_hook.patch +++ b/package/opkg/001-provisioning_hook.patch @@ -30,7 +30,7 @@ return opkg_verify_gpg_signature(file, sigfile); else if (strcmp(opkg_config->signature_type, "openssl") == 0) return opkg_verify_openssl_signature(file, sigfile); -+ else if (strcmp(opkg_config->signature_type, "provisioned") == 0) ++ else if (strcmp(opkg_config->signature_type, "provision") == 0) + return opkg_verify_and_decrypt_package(file); opkg_msg(ERROR, "signature_type option '%s' not understood.\n", @@ -67,17 +67,27 @@ AC_HELP_STRING([--enable-sha256], [Enable sha256sum check --- a/libopkg/Makefile.am 2018-06-13 11:33:25.196265228 +0200 +++ b/libopkg/Makefile.am 2018-06-13 11:34:26.170288674 +0200 -@@ -38,6 +38,10 @@ +@@ -38,6 +38,11 @@ opkg_sources += opkg_openssl.c opkg_headers += opkg_openssl.h endif +if HAVE_PROVISION ++AM_CXXFLAGS=-std=c++11 +opkg_sources += opkg_provision.cpp +opkg_headers += opkg_provision.h +endif if HAVE_GPGME opkg_sources += opkg_gpg.c opkg_headers += opkg_gpg.h +@@ -67,7 +72,7 @@ + endif + + libopkg_la_LIBADD = $(LIBARCHIVE_LIBS) \ +- $(CURL_LIBS) $(GPGME_LIBS) $(GPGERR_LIBS) $(OPENSSL_LIBS) \ ++ $(CURL_LIBS) $(GPGME_LIBS) $(GPGERR_LIBS) $(OPENSSL_LIBS) $(PROVISION_LIBS) \ + $(PATHFINDER_LIBS) $(SOLVER_LIBS) + + libopkg_la_LDFLAGS = -version-info 1:0:0 --- a/libopkg/opkg_provision.h 2018-06-13 11:38:34.210246513 +0200 +++ b/libopkg/opkg_provision.h 2018-06-13 11:47:56.975994355 +0200 @@ -0,0 +1,29 @@ @@ -112,7 +122,7 @@ +#endif --- a/libopkg/opkg_provision.cpp 2018-06-13 11:38:31.110347034 +0200 +++ b/libopkg/opkg_provision.cpp 2018-06-13 11:45:52.768023211 +0200 -@@ -0,0 +1,21 @@ +@@ -0,0 +1,57 @@ +/* vi: set expandtab sw=4 sts=4: */ +/* opkg_provision.c - the opkg package management system + @@ -129,8 +139,44 @@ + General Public License for more details. +*/ + ++#include +#include -+ -+int opkg_verify_and_decrypt_package(const char* /* file */) { ++#include ++#include ++#include ++#include ++ ++int opkg_verify_and_decrypt_package(const char* file) { ++ ++ int result = -1; ++ char RSAKeyBuffer[8*1024]; ++ int length = GetDRMId("packager", sizeof(RSAKeyBuffer), RSAKeyBuffer); ++ ++ if (length > 0) { ++ // Seems like we have a valid RSA KEY, so we can decrypt. ++ WPEFramework::Core::DataElementFile package (file); ++ ++ if (package.IsValid() == true) { ++ uint8_t securityHeader[128]; ++ ++ BIO* keybio = BIO_new_mem_buf(RSAKeyBuffer, -1); ++ ++ if (keybio != nullptr) { ++ RSA* rsa = nullptr; ++ rsa = PEM_read_bio_RSAPrivateKey(keybio, &rsa, nullptr, nullptr); ++ ++ if (rsa == nullptr) { ++ result = -2; ++ } ++ else { ++ // Decrypt the first 128 bytes. This is the security header ++ result = RSA_private_decrypt(128, package.Buffer(), securityHeader, rsa, RSA_PKCS1_PADDING); ++ if (result > 0) { ++ } ++ } ++ } ++ } ++ } ++ + return (-1); +} From b71e43f79ae56ad23bffcd21f407d1ae3a2bcc5b Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 14 Jun 2018 10:02:53 +0200 Subject: [PATCH 229/614] [NETFLIX] Selects right branch of wpeframework-netflix. Netflix 5.x exposes an API a little bit different from Netflix 4.x. For now Netflix 5 related work on wpeframework-netflix is performed on a seperate branch. --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index d370c34e0589..4b8252f6d191 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -5,6 +5,12 @@ ################################################################################ WPEFRAMEWORK_NETFLIX_VERSION = 9735202436138fd1438d47cdd5e17618290990ff + +ifeq ($(BR2_PACKAGE_NETFLIX5),y) +# Netflix 5 has a little different API, use "netflix5" branch for now. +WPEFRAMEWORK_NETFLIX_VERSION = ca237132a3ce7d6be01fbe941fdf9a65bebc2c42 +endif + WPEFRAMEWORK_NETFLIX_SITE_METHOD = git WPEFRAMEWORK_NETFLIX_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginNetflix.git WPEFRAMEWORK_NETFLIX_INSTALL_STAGING = YES From 2fe0b875231f3e6f97d1ba189d77d8a4e09496e1 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 14 Jun 2018 11:11:00 +0200 Subject: [PATCH 230/614] [wpewebkit] disable media disk cache in defconfigs --- configs/bcm7271_wpe_ml_defconfig | 1 - configs/bcm7439_wpe_ml_defconfig | 1 - configs/iot-gate-rpi_wpe_ml_defconfig | 1 - configs/raspberrypi0_wpe_defconfig | 1 - configs/raspberrypi0_wpe_ml_defconfig | 1 - configs/raspberrypi2_wpe_defconfig | 1 - configs/raspberrypi2_wpe_ml_defconfig | 1 - configs/raspberrypi3+_wpe_ml_defconfig | 1 - configs/raspberrypi3-pitop_wpe_ml_defconfig | 1 - configs/raspberrypi3_wpe_defconfig | 1 - configs/raspberrypi3_wpe_ml_defconfig | 1 - 11 files changed, 11 deletions(-) diff --git a/configs/bcm7271_wpe_ml_defconfig b/configs/bcm7271_wpe_ml_defconfig index e1458cba2a4e..c0d03abc7e74 100644 --- a/configs/bcm7271_wpe_ml_defconfig +++ b/configs/bcm7271_wpe_ml_defconfig @@ -85,7 +85,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y diff --git a/configs/bcm7439_wpe_ml_defconfig b/configs/bcm7439_wpe_ml_defconfig index 9ec6d33a416f..a51771c0f2bb 100644 --- a/configs/bcm7439_wpe_ml_defconfig +++ b/configs/bcm7439_wpe_ml_defconfig @@ -83,7 +83,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y diff --git a/configs/iot-gate-rpi_wpe_ml_defconfig b/configs/iot-gate-rpi_wpe_ml_defconfig index 029d0252ccf9..11f240fd6a32 100644 --- a/configs/iot-gate-rpi_wpe_ml_defconfig +++ b/configs/iot-gate-rpi_wpe_ml_defconfig @@ -75,7 +75,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi0_wpe_defconfig b/configs/raspberrypi0_wpe_defconfig index e5e5fede1d79..93bf9f615fad 100644 --- a/configs/raspberrypi0_wpe_defconfig +++ b/configs/raspberrypi0_wpe_defconfig @@ -69,7 +69,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:150m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 7390a7d39f64..37ac3cb5f266 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -70,7 +70,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:150m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi2_wpe_defconfig b/configs/raspberrypi2_wpe_defconfig index c59cb63fd495..567f54e3eab5 100644 --- a/configs/raspberrypi2_wpe_defconfig +++ b/configs/raspberrypi2_wpe_defconfig @@ -72,7 +72,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index bcd3ada74066..0a56ae8b9b6d 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -74,7 +74,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi3+_wpe_ml_defconfig b/configs/raspberrypi3+_wpe_ml_defconfig index 2615379b9731..94aca3cb9290 100644 --- a/configs/raspberrypi3+_wpe_ml_defconfig +++ b/configs/raspberrypi3+_wpe_ml_defconfig @@ -75,7 +75,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi3-pitop_wpe_ml_defconfig b/configs/raspberrypi3-pitop_wpe_ml_defconfig index e8674bfa0a24..11ba66a59c12 100644 --- a/configs/raspberrypi3-pitop_wpe_ml_defconfig +++ b/configs/raspberrypi3-pitop_wpe_ml_defconfig @@ -75,7 +75,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://localhost:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi3_wpe_defconfig b/configs/raspberrypi3_wpe_defconfig index ada2247a6e9b..28abb1b09b72 100644 --- a/configs/raspberrypi3_wpe_defconfig +++ b/configs/raspberrypi3_wpe_defconfig @@ -74,7 +74,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 693471aeea72..36e1da019185 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -76,7 +76,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:80m,webprocess:250m,rpcprocess:80m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y From a81cb5f2bb0f1a1429e8abd27f4d271b0d62f0b0 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 13 Jun 2018 21:48:41 +0200 Subject: [PATCH 231/614] [gst1-bcm] Add conditional patch to remove opus support --- ...0001_remove_opus_support.patch.conditional | 33 +++++++++++++++++++ package/gstreamer1/gst1-bcm/gst1-bcm.mk | 17 ++++++++-- 2 files changed, 47 insertions(+), 3 deletions(-) create mode 100644 package/gstreamer1/gst1-bcm/0001_remove_opus_support.patch.conditional diff --git a/package/gstreamer1/gst1-bcm/0001_remove_opus_support.patch.conditional b/package/gstreamer1/gst1-bcm/0001_remove_opus_support.patch.conditional new file mode 100644 index 000000000000..2f42bb8122a0 --- /dev/null +++ b/package/gstreamer1/gst1-bcm/0001_remove_opus_support.patch.conditional @@ -0,0 +1,33 @@ +Index: gstreamer-plugins-soc/audfilter/src/gst_brcm_aud_filter.c +IDEA additional info: +Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP +<+>UTF-8 +=================================================================== +--- gstreamer-plugins-soc/audfilter/src/gst_brcm_aud_filter.c (revision dd00f0762b7dfed4e4e657482d085e554201fa48) ++++ gstreamer-plugins-soc/audfilter/src/gst_brcm_aud_filter.c (date 1528913960000) +@@ -92,7 +92,6 @@ + "audio/x-wma; " + "audio/x-adpcm; " + "audio/x-vorbis; " +- "audio/x-opus; " + ) + ); + #else +Index: gstreamer-plugins-soc/audiodecode/src/gst_brcm_audio_decoder.c +IDEA additional info: +Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP +<+>UTF-8 +=================================================================== +--- gstreamer-plugins-soc/audiodecode/src/gst_brcm_audio_decoder.c (revision dd00f0762b7dfed4e4e657482d085e554201fa48) ++++ gstreamer-plugins-soc/audiodecode/src/gst_brcm_audio_decoder.c (date 1528913960000) +@@ -145,9 +145,7 @@ + case baudio_format_wma_pro: return NEXUS_AudioCodec_eWmaPro; + case baudio_format_mp3: return NEXUS_AudioCodec_eMp3; + case baudio_format_vorbis: return NEXUS_AudioCodec_eVorbis; +-#if NEXUS_PLATFORM_VERSION_MAJOR >= 15 +- case baudio_format_opus: return NEXUS_AudioCodec_eOpus; +-#endif ++ + #if (NEXUS_PLATFORM_VERSION_MAJOR>=16 && NEXUS_PLATFORM_VERSION_MINOR >= 4) + case baudio_format_ac4: return NEXUS_AudioCodec_eAc4; + #endif diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 733deb0a8837..8b85cd79ab38 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -16,13 +16,13 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) GST1_BCM_VERSION = 17.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) GST1_BCM_VERSION = 17.1-7 -else -ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK) $(BR2_PACKAGE_VSS_SDK)),) +else ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK)),) GST1_BCM_VERSION = 17.1-5 +else ifneq ($(filter y,$(BR2_PACKAGE_VSS_SDK)),) +GST1_BCM_VERSION = dd00f0762b7dfed4e4e657482d085e554201fa48 else GST1_BCM_VERSION = 15.2 endif -endif GST1_BCM_SITE = git@github.com:Metrological/gstreamer-plugins-soc.git GST1_BCM_SITE_METHOD = git @@ -127,4 +127,15 @@ else GST1_BCM_CONF_OPTS += --disable-vidfilter endif +# Temporary audio fix for youtube on vss platforms +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +GST1_BCM_PKGDIR = "$(TOP_DIR)/package/gstreamer1/gst1-bcm" + +define GST1_BCM_APPLY_LOCAL_PATCHES + $(APPLY_PATCHES) $(@D) $(GST1_BCM_PKGDIR) 0001_remove_opus_support.patch.conditional; +endef + +GST1_BCM_POST_PATCH_HOOKS += GST1_BCM_APPLY_LOCAL_PATCHES +endif + $(eval $(autotools-package)) From 2922077b971b5969379dd2dd75fffccbb1df67e1 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 13 Jun 2018 21:54:06 +0200 Subject: [PATCH 232/614] [vss-sdk] change to virtual package --- package/vss-sdk/vss-sdk.mk | 48 +------------------------------------- 1 file changed, 1 insertion(+), 47 deletions(-) diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index 666331f5a918..759f912d804f 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -4,8 +4,6 @@ # ################################################################################ -#$(eval $(virtual-package)) - BUILDROOT_FLAGS = .stamp_downloaded \ .stamp_extracted \ .applied_patches_list \ @@ -25,48 +23,4 @@ define VSS_EXCLUDE_PACKAGE $(foreach flag,$(BUILDROOT_FLAGS), touch $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION}/$(flag);) endef -define VSS_SDK_BUILD_CMDS - $(call VSS_EXCLUDE_PACKAGE,OPENSSL) - $(call VSS_EXCLUDE_PACKAGE,ZLIB) - $(call VSS_EXCLUDE_PACKAGE,LIBPNG) - $(call VSS_EXCLUDE_PACKAGE,LIBJPEG) - $(call VSS_EXCLUDE_PACKAGE,JPEG_TURBO) - $(call VSS_EXCLUDE_PACKAGE,EXPAT) - $(call VSS_EXCLUDE_PACKAGE,LIBXML2) - $(call VSS_EXCLUDE_PACKAGE,LIBXSLT) - $(call VSS_EXCLUDE_PACKAGE,C_ARES) - $(call VSS_EXCLUDE_PACKAGE,LIBCURL) - $(call VSS_EXCLUDE_PACKAGE,LIBXKBCOMMON) - $(call VSS_EXCLUDE_PACKAGE,LIBSOUP) - $(call VSS_EXCLUDE_PACKAGE,LIBGLIB2) - $(call VSS_EXCLUDE_PACKAGE,LIBFFI) - $(call VSS_EXCLUDE_PACKAGE,ICU) - $(call VSS_EXCLUDE_PACKAGE,ICUDATA) - $(call VSS_EXCLUDE_PACKAGE,ORC) - $(call VSS_EXCLUDE_PACKAGE,PCRE) - $(call VSS_EXCLUDE_PACKAGE,SQLITE) - $(call VSS_EXCLUDE_PACKAGE,FREETYPE) - $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) - $(call VSS_EXCLUDE_PACKAGE,KMOD) - $(call VSS_EXCLUDE_PACKAGE,SHARED_MIME_INFO) -endef - -define VSS_SDK_WRONG_PKG - #$(call VSS_EXCLUDE_PACKAGE,GSTREAMER1) #Shipped v1.4.5 to old, v1.5.3 is required to enable ENCRYPTED_MEDIA. - #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BASE) - #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_GOOD) - #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BAD) - #$(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_UGLY) - #$(call VSS_EXCLUDE_PACKAGE,MPG123) #libmpg123 v1.14.4, required >= 1.19.0 for BCM gst1 plugins - #$(call VSS_EXCLUDE_PACKAGE,LIBGCRYPT) #v1.6.5 WPE needed v1.7.0 to enable Web Crypto API support. - #$(call VSS_EXCLUDE_PACKAGE,LIBGPG_ERROR) #not detected properly libgpg-error 1.26 -endef - - -define VSS_SDK_INSTALL_STAGING_CMDS -endef - -define VSS_SDK_INSTALL_TARGET_CMDS -endef - -$(eval $(generic-package)) +$(eval $(virtual-package)) From 0c29fdcb00b0a156cc9ddaad1e05856f6caa3a3a Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 13 Jun 2018 21:57:25 +0200 Subject: [PATCH 233/614] [wpebackend-rdk] Add nexus mode option --- .../0001-add-nxclient-switch.patch | 20 +++++++++++++++++++ package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 5 +++++ 2 files changed, 25 insertions(+) create mode 100644 package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch diff --git a/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch b/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch new file mode 100644 index 000000000000..32b08a49305d --- /dev/null +++ b/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch @@ -0,0 +1,20 @@ +diff --git a/src/bcm-nexus/CMakeLists.txt b/src/bcm-nexus/CMakeLists.txt +index 57ec6ff..5dd8916 100644 +--- a/src/bcm-nexus/CMakeLists.txt ++++ b/src/bcm-nexus/CMakeLists.txt +@@ -12,6 +12,15 @@ if (EGL_LIBRARIES_nxclient) + list(APPEND WPE_PLATFORM_LIBRARIES nxclient) + endif() + ++# TODO: write a pc file for this. ++if (NEXUS_CLIENT_MODE) ++ message(STATUS "Building with nexus in client mode" ) ++ list(APPEND WPE_PLATFORM_LIBRARIES nexus_client) ++else () ++ message(STATUS "Building with nexus in proxy mode" ) ++ list(APPEND WPE_PLATFORM_LIBRARIES nexus) ++endif () ++ + list(APPEND WPE_PLATFORM_SOURCES + src/bcm-nexus/renderer-backend.cpp + src/bcm-nexus/view-backend.cpp diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 6224dd42c85a..0812b82f6a03 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -74,6 +74,11 @@ else ifeq ($(BR2_PACKAGE_VIP_SDK),y) WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_NEXUS=ON endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) + WPEBACKEND_RDK_FLAGS += -DNEXUS_CLIENT_MODE=ON \ + -DUSE_BACKEND_BCM_NEXUS=ON +endif + WPEBACKEND_RDK_CONF_OPTS = \ $(WPEBACKEND_RDK_FLAGS) From ec57a8ef1cbb16f7584b4871472dba18bc3d444f Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 13 Jun 2018 22:17:02 +0200 Subject: [PATCH 234/614] [wpewebkit] Add conditional patches for vss platforms --- ..._Test_55_DelayedAACAudio.patch.conditional | 15 ++++++ ...ed_Position_Fix_For_BRCM.patch.conditional | 21 +++++++++ ...-force-sink-av-factories.patch.conditional | 47 +++++++++++++++++++ ...ion-query-frequency-10ms.patch.conditional | 13 +++++ package/wpe/wpewebkit/wpewebkit.mk | 14 ++++++ 5 files changed, 110 insertions(+) create mode 100644 package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional create mode 100644 package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional create mode 100644 package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional create mode 100644 package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional diff --git a/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional b/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional new file mode 100644 index 000000000000..ff441f501c61 --- /dev/null +++ b/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional @@ -0,0 +1,15 @@ +diff --git a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp +index a65bf63..25822af 100644 +--- a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp ++++ b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp +@@ -602,7 +602,9 @@ void MediaPlayerPrivateGStreamerMSE::updateStates() + m_volumeAndMuteInitialized = true; + } + +- if (!seeking() && !buffering && !m_paused && m_playbackRate) { ++ if (!isTimeBuffered(currentMediaTime()) && !playbackPipelineHasFutureData()) { ++ m_readyState = MediaPlayer::HaveMetadata; ++ } else if (!seeking() && !buffering && !m_paused && m_playbackRate) { + GST_DEBUG("[Buffering] Restarting playback."); + changePipelineState(GST_STATE_PLAYING); + } diff --git a/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional b/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional new file mode 100644 index 000000000000..8d55aa0beeb6 --- /dev/null +++ b/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional @@ -0,0 +1,21 @@ +diff --git a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp +index a65bf63..f93a3cb 100644 +--- a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp ++++ b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp +@@ -352,6 +352,16 @@ bool MediaPlayerPrivateGStreamerMSE::doSeek() + return m_seeking; + } + ++#if PLATFORM(BCM_NEXUS) ++ // When performing bufferedSeek, if the state is still playing, make it paused ++ // Seek will trigger state_change to Playing again ++ getStateResult = gst_element_get_state(m_pipeline.get(), &state, &newState, 0); ++ GST_DEBUG("StateResult:%d CurrentState:%s NewState:%s",getStateResult, gst_element_state_get_name(state), gst_element_state_get_name(newState)); ++ if (state == GST_STATE_PLAYING) { ++ gst_element_set_state(m_pipeline.get(), GST_STATE_PAUSED); ++ } ++#endif ++ + GST_DEBUG("We can seek now"); + + MediaTime startTime = seekTime, endTime = MediaTime::invalidTime(); diff --git a/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional b/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional new file mode 100644 index 000000000000..877f90ece69b --- /dev/null +++ b/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional @@ -0,0 +1,47 @@ +.0diff --git a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp +ind0 +0e..x 000a875d2..f9343e0 100644 +--- a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp ++++ b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp +@@ -2359,12 +2359,32 @@ void MediaPlayerPrivateGStreamer::createGSTPlayBin() + m_videoSink = gst_element_factory_make( "db410csink", "optimized vsink"); + g_object_set(m_pipeline.get(), "video-sink", m_videoSink.get(), nullptr); + #endif ++ ++#if PLATFORM(BCM_NEXUS) ++ m_videoSink = gst_element_factory_make( "brcmvideosink", "brcmvideosink"); ++ g_object_set(m_pipeline.get(), "video-sink", m_videoSink.get(), nullptr); + +-#if !USE(WESTEROS_SINK) && !USE(FUSION_SINK) ++ GValue window_set = {0, }; ++ static char str[40]; ++ snprintf(str, 40, "%d,%d,%d,%d", 0,0, 1280, 720); ++ ++ g_value_init(&window_set, G_TYPE_STRING); ++ g_value_set_static_string(&window_set, str); ++ g_object_set(m_videoSink.get(), "window_set", str, nullptr); ++ g_object_set(m_videoSink.get(), "zorder", 0, nullptr); ++ ++ GstElement* audioSink = gst_element_factory_make( "brcmaudiosink", "brcmaudiosink"); ++ g_object_set(m_pipeline.get(), "audio-sink", audioSink, nullptr); ++ ++#endif ++ ++#if !USE(WESTEROS_SINK) && !USE(FUSION_SINK) && !PLATFORM(BCM_NEXUS) ++ + g_object_set(m_pipeline.get(), "audio-sink", createAudioSink(), nullptr); + #endif + configurePlaySink(); + ++#if !PLATFORM(BCM_NEXUS) + // On 1.4.2 and newer we use the audio-filter property instead. + // See https://bugzilla.gnome.org/show_bug.cgi?id=735748 for + // the reason for using >= 1.4.2 instead of >= 1.4.0. +@@ -2376,6 +2396,7 @@ void MediaPlayerPrivateGStreamer::createGSTPlayBin() + else + g_object_set(m_pipeline.get(), "audio-filter", scale, nullptr); + } ++#endif + + if (!m_renderingCanBeAccelerated) { + // If not using accelerated compositing, let GStreamer handle diff --git a/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional b/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional new file mode 100644 index 000000000000..dcd6103fa12e --- /dev/null +++ b/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional @@ -0,0 +1,13 @@ +diff --git a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp +index 0a875d2..d855fea 100644 +--- a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp ++++ b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp +@@ -357,7 +357,7 @@ MediaTime MediaPlayerPrivateGStreamer::playbackPosition() const + } + + double now = WTF::currentTime(); +- if (m_lastQuery > -1 && ((now - m_lastQuery) < 0.25) && m_cachedPosition.isValid()) ++ if (m_lastQuery > -1 && ((now - m_lastQuery) < 0.01) && m_cachedPosition.isValid()) + return m_cachedPosition; + + m_lastQuery = now; diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index f8707fb79fe3..132f673f728e 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -292,4 +292,18 @@ endif RSYNC_VCS_EXCLUSIONS += --exclude LayoutTests --exclude WebKitBuild +# Temporary fix for vss platforms +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +WPEWEBKIT_PKGDIR = "$(TOP_DIR)/package/wpe/wpewebkit" + +define WPEWEBKIT_APPLY_LOCAL_PATCHES + $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional + $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional + $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0006-brcm-force-sink-av-factories.patch.conditional + $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0011-change-position-query-frequency-10ms.patch.conditional +endef + +WPEWEBKIT_POST_PATCH_HOOKS += WPEWEBKIT_APPLY_LOCAL_PATCHES +endif + $(eval $(cmake-package)) From 48de8792ebd1d8204cd28ddd24cb157c6014bb5c Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 14 Jun 2018 12:19:38 +0200 Subject: [PATCH 235/614] [defconfig] Update vss config --- configs/vss_wpe_ml_defconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index 2881f2706551..ff64f7a0f9e3 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -24,7 +24,6 @@ BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y -BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y @@ -32,13 +31,13 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y @@ -47,6 +46,7 @@ BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_VSS_SDK=y +BR2_PACKAGE_OPUS=y BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y @@ -65,6 +65,7 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y From e948e2d7196b410868711f296d46cafe0247565a Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Fri, 15 Jun 2018 17:31:33 +0200 Subject: [PATCH 236/614] [ArrisRDK] initial configuration --- board/bcm/index.html | 231 +----------------------------- configs/ArrisRDK_wpe_ml_defconfig | 89 ++++++++++++ 2 files changed, 90 insertions(+), 230 deletions(-) mode change 100644 => 120000 board/bcm/index.html create mode 100644 configs/ArrisRDK_wpe_ml_defconfig diff --git a/board/bcm/index.html b/board/bcm/index.html deleted file mode 100644 index fb99ff5e3dcd..000000000000 --- a/board/bcm/index.html +++ /dev/null @@ -1,230 +0,0 @@ - - - - -WPE - - - - -
Hello
-
- - - diff --git a/board/bcm/index.html b/board/bcm/index.html new file mode 120000 index 000000000000..6c4d2198132c --- /dev/null +++ b/board/bcm/index.html @@ -0,0 +1 @@ +board/raspberrypi/index.html \ No newline at end of file diff --git a/configs/ArrisRDK_wpe_ml_defconfig b/configs/ArrisRDK_wpe_ml_defconfig new file mode 100644 index 000000000000..39ba4f797573 --- /dev/null +++ b/configs/ArrisRDK_wpe_ml_defconfig @@ -0,0 +1,89 @@ +BR2_arm=y +BR2_cortex_a15=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y +BR2_GLIBC_VERSION_2_23=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_TARGET_GENERIC_HOSTNAME="WPE" +BR2_TARGET_GENERIC_ISSUE="Welcome to BCM72604" +BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" +BR2_SYSTEM_DHCP="eth0" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="e217b1f183d2ae26bb9859c8bff5255e15fcec46" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_BCM=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_BCM_REFSW=y +BR2_PACKAGE_BCM_REFSW_17_3_RDK=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y +# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_GRAPHITE2=y +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_C_ARES=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y From 2e9c4f19bfbcb3ddfdc17dbf3a720cb76fc3d7f9 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Tue, 19 Jun 2018 12:44:44 +0200 Subject: [PATCH 237/614] [BCM-SETTINGS] Move the BCM setting to one location and make the unique. --- package/wpe/wpeframework-plugins/Config.in | 15 +++++++++++---- .../wpeframework-plugins/wpeframework-plugins.mk | 9 +++++++-- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 138b94a2fadc..14a8136e5d45 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -27,20 +27,27 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER bool "Nexus server" - depends on BR2_PACKAGE_BCM_REFSW + depends on BR2_PACKAGE_BCM_REFSW help Include a nxserver with the compositor. +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE + string "Memory Box Mode" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + help + Memory box mode, you can find details from release notes per platform + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS bool "Allow unauthenticated clients" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER default n help Allow unauthenticated clients on the nxserver. + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE - string "graphics heap (bytes)" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + string "graphics heap (MB)" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER default 100 help The ammount of memory in MB to be configured for the GPU. diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index d63005b339f8..4df79eeb039f 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -208,8 +208,13 @@ else WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=true endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON \ - -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_GRAPHICS_HEAP_SIZE=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_BOXMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_GRAPHICS_HEAP_SIZE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE))" +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=false else From c98bd7ffecc55a712c23852ac2833642bd9ffc7a Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 19 Jun 2018 16:30:34 +0200 Subject: [PATCH 238/614] [UMA]: Merge uma branch with master --- configs/uma7439_full_wpe_nf_defconfig | 14 +- package/Config.in | 3 + package/bcm-refsw/Config.in | 14 +- package/bcm-refsw/S70nxserver | 2 + package/bcm-refsw/bcm-refsw.mk | 2 +- package/harfbuzz/harfbuzz.hash | 1 + package/harfbuzz/harfbuzz.mk | 3 + package/icu/icu.hash | 1 + package/icu/icu.mk | 3 + package/libcurl/libcurl.hash | 1 + package/libcurl/libcurl.mk | 3 + package/netflix5/Config.in | 68 +++++ package/netflix5/netflix.pc | 11 + package/netflix5/netflix5.mk | 270 ++++++++++++++++++ package/nghttp2/Config.in | 5 + package/nghttp2/nghttp2.mk | 14 + package/openssl/openssl.hash | 1 + package/openssl/openssl.mk | 3 + package/uma-sdk/Config.in | 21 ++ package/uma-sdk/uma-sdk.mk | 7 + package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- package/wpe/wpeframework-netflix/Config.in | 4 +- .../wpeframework-netflix.mk | 10 +- 23 files changed, 448 insertions(+), 15 deletions(-) create mode 100644 package/netflix5/Config.in create mode 100644 package/netflix5/netflix.pc create mode 100644 package/netflix5/netflix5.mk create mode 100644 package/nghttp2/Config.in create mode 100644 package/nghttp2/nghttp2.mk create mode 100644 package/uma-sdk/Config.in create mode 100644 package/uma-sdk/uma-sdk.mk diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index af935dadf7ce..785a44eb909c 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -23,7 +23,6 @@ BR2_LINUX_KERNEL_PATCH="board/uma/patches" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/uma/linux-3-14.config" BR2_PACKAGE_BUSYBOX_SMP=y -BR2_PACKAGE_FFMPEG=y BR2_PACKAGE_FFMPEG_GPL=y BR2_PACKAGE_FFMPEG_NONFREE=y BR2_PACKAGE_FFMPEG_AVRESAMPLE=y @@ -53,8 +52,8 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y +BR2_PACKAGE_NETFLIX5=y +BR2_PACKAGE_NETFLIX5_LIB=y BR2_PACKAGE_GDB=y BR2_PACKAGE_GETTEXT=y BR2_PACKAGE_NINJA=y @@ -63,15 +62,15 @@ BR2_PACKAGE_WIDEVINE=y BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_17_3_RDK=y +BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE="104857600" +BR2_PACKAGE_BCM_REFSW_BOXMODE="1" BR2_PACKAGE_ALSA_LIB=y # BR2_PACKAGE_ALSA_LIB_ALOAD is not set # BR2_PACKAGE_ALSA_LIB_RAWMIDI is not set # BR2_PACKAGE_ALSA_LIB_HWDEP is not set # BR2_PACKAGE_ALSA_LIB_ALISP is not set # BR2_PACKAGE_ALSA_LIB_OLD_SYMBOLS is not set -BR2_PACKAGE_LIBVORBIS=y -BR2_PACKAGE_TREMOR=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PORT="" BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PREFIX="NOS" @@ -82,7 +81,6 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY="10" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y @@ -96,13 +94,11 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y -BR2_PACKAGE_LIBVPX=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_DROPBEAR=y diff --git a/package/Config.in b/package/Config.in index 93da61d12c89..e097a66f6f2b 100644 --- a/package/Config.in +++ b/package/Config.in @@ -38,6 +38,7 @@ menu "Audio and video applications" source "package/multicat/Config.in" source "package/musepack/Config.in" source "package/netflix/Config.in" + source "package/netflix5/Config.in" source "package/ncmpc/Config.in" source "package/omxplayer/Config.in" source "package/on2-8170-libs/Config.in" @@ -418,6 +419,7 @@ endmenu source "package/vip-sdk/Config.in" source "package/vss-sdk/Config.in" source "package/homecast-sdk/Config.in" + source "package/uma-sdk/Config.in" source "package/hwdata/Config.in" source "package/hwloc/Config.in" source "package/i2c-tools/Config.in" @@ -1325,6 +1327,7 @@ menu "Networking" source "package/lora-net/Config.in" source "package/mongoose/Config.in" source "package/neon/Config.in" + source "package/nghttp2/Config.in" source "package/norm/Config.in" source "package/nss-mdns/Config.in" source "package/nss-pam-ldapd/Config.in" diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 8783a42037d6..d64b8f383cd2 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -106,7 +106,7 @@ endchoice config BR2_PACKAGE_BCM_REFSW_SAGE bool "SAGE v3.x" default n - depends on BR2_PACKAGE_BCM_REFSW && (BR2_PACKAGE_BCM_REFSW_16_2 || BR2_PACKAGE_BCM_REFSW_16_3) + depends on BR2_PACKAGE_BCM_REFSW && (BR2_PACKAGE_BCM_REFSW_16_2 || BR2_PACKAGE_BCM_REFSW_16_3 || BR2_PACKAGE_BCM_REFSW_17_1 || BR2_PACKAGE_BCM_REFSW_17_1_RDK || BR2_PACKAGE_BCM_REFSW_17_2 || BR2_PACKAGE_BCM_REFSW_17_4) help Add SAGE support in Nexus. @@ -137,4 +137,16 @@ config BR2_PACKAGE_BCM_REFSW_NXCLIENT_EXAMPLES help Build the Nexus client exaples. +config BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE + string "Graphics heap size" + depends on BR2_PACKAGE_BCM_REFSW && BR2_PACKAGE_BCM_REFSW_17_4 + help + Custom graphics heap size + +config BR2_PACKAGE_BCM_REFSW_BOXMODE + string "Memory Box Mode" + depends on BR2_PACKAGE_BCM_REFSW + help + Memory box mode, you can find details from release notes per platform + endif diff --git a/package/bcm-refsw/S70nxserver b/package/bcm-refsw/S70nxserver index 74aa4cc9afaf..4f4d8ddc8c6e 100644 --- a/package/bcm-refsw/S70nxserver +++ b/package/bcm-refsw/S70nxserver @@ -4,6 +4,8 @@ export SAGEBIN_PATH=/lib/firmware/ start() { echo -n "Starting nxserver: " export NEXUS_IR_MODE=%IRMODE% + export B_REFSW_BOXMODE=%BOXMODE% + export NEXUS_GRAPHICS_HEAP_SIZE_BYTE=%GRAPHICS_HEAP_SIZE% start-stop-daemon -S -q -b -m -p /var/run/nxserver.pid --exec /usr/bin/nxserver -- /dev/null 2>&1 [ $? == 0 ] && echo "OK" || echo "FAIL" } diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index ecece9513fe8..3ac788e30da1 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -27,7 +27,7 @@ BCM_REFSW_VERSION = 17.3-1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) BCM_REFSW_VERSION = 17.3-2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) -BCM_REFSW_VERSION = 17.4-1 +BCM_REFSW_VERSION = 17.4-2 else BCM_REFSW_VERSION = 16.2-7 endif diff --git a/package/harfbuzz/harfbuzz.hash b/package/harfbuzz/harfbuzz.hash index b399f998ab26..9cc4742ff7a0 100644 --- a/package/harfbuzz/harfbuzz.hash +++ b/package/harfbuzz/harfbuzz.hash @@ -1,3 +1,4 @@ # From https://www.freedesktop.org/software/harfbuzz/release/harfbuzz-1.4.4.tar.bz2.sha256 sha256 35d2f8ca476cbbec64ee824eca6b0209ff8db0334990b9f5af893b94f119d255 harfbuzz-1.4.4.tar.bz2 +sha256 8f234dcfab000fdec24d43674fffa2fdbdbd654eb176afbde30e8826339cb7b3 harfbuzz-1.4.2.tar.bz2 sha256 32a1a7ad584a2f2cfba5c1d234d046c0521e86e7a21d403e15e89aa509ef0ea8 harfbuzz-1.0.1.tar.bz2 diff --git a/package/harfbuzz/harfbuzz.mk b/package/harfbuzz/harfbuzz.mk index 0899e0feae5f..a3c8079a9058 100644 --- a/package/harfbuzz/harfbuzz.mk +++ b/package/harfbuzz/harfbuzz.mk @@ -8,6 +8,9 @@ HARFBUZZ_VERSION = 1.4.4 ifeq ($(BR2_PACKAGE_NETFLIX),y) HARFBUZZ_VERSION = 1.0.1 endif +#ifeq ($(BR2_PACKAGE_NETFLIX5),y) +HARFBUZZ_VERSION = 1.4.2 +#endif HARFBUZZ_SITE = https://www.freedesktop.org/software/harfbuzz/release HARFBUZZ_SOURCE = harfbuzz-$(HARFBUZZ_VERSION).tar.bz2 HARFBUZZ_LICENSE = MIT, ISC (ucdn library) diff --git a/package/icu/icu.hash b/package/icu/icu.hash index 4233ba3996da..fa9866ad6549 100644 --- a/package/icu/icu.hash +++ b/package/icu/icu.hash @@ -1,4 +1,5 @@ # From https://ssl.icu-project.org/files/icu4c/57.1/icu4c-src-57_1.md5 md5 976734806026a4ef8bdd17937c8898b9 icu4c-57_1-src.tgz +md5 fac212b32b7ec7ab007a12dff1f3aea1 icu4c-58_2-src.tgz # Calculated based on the hash above sha256 ff8c67cb65949b1e7808f2359f2b80f722697048e90e7cfc382ec1fe229e9581 icu4c-57_1-src.tgz diff --git a/package/icu/icu.mk b/package/icu/icu.mk index 339cae16b01a..8f0b6f7036e1 100644 --- a/package/icu/icu.mk +++ b/package/icu/icu.mk @@ -5,6 +5,9 @@ ################################################################################ ICU_VERSION = 57.1 +#ifeq ($(BR2_PACKAGE_NETFLIX5),y) +ICU_VERSION = 58.2 +#endif ICU_SOURCE = icu4c-$(subst .,_,$(ICU_VERSION))-src.tgz ICU_SITE = http://download.icu-project.org/files/icu4c/$(ICU_VERSION) ICU_LICENSE = ICU License diff --git a/package/libcurl/libcurl.hash b/package/libcurl/libcurl.hash index 8dfc737ddb42..283937e4a83a 100644 --- a/package/libcurl/libcurl.hash +++ b/package/libcurl/libcurl.hash @@ -1,3 +1,4 @@ # Locally calculated after checking pgp signature sha256 8e3db42548e01407cb2f1407660c0f528b89ec7afda6264442fc2b229b95223b curl-7.32.0.tar.bz2 +sha256 b2345a8bef87b4c229dedf637cb203b5e21db05e20277c8e1094f0d4da180801 curl-7.53.0.tar.bz2 sha256 1c7207c06d75e9136a944a2e0528337ce76f15b9ec9ae4bb30d703b59bf530e8 curl-7.53.1.tar.bz2 diff --git a/package/libcurl/libcurl.mk b/package/libcurl/libcurl.mk index d030670b0115..b4f0a7ce174a 100644 --- a/package/libcurl/libcurl.mk +++ b/package/libcurl/libcurl.mk @@ -8,6 +8,9 @@ LIBCURL_VERSION = 7.53.1 ifeq ($(BR2_PACKAGE_NETFLIX),y) LIBCURL_VERSION = 7.32.0 endif +ifeq ($(BR2_PACKAGE_NETFLIX5),y) +LIBCURL_VERSION = 7.53.0 +endif LIBCURL_SOURCE = curl-$(LIBCURL_VERSION).tar.bz2 LIBCURL_SITE = https://curl.haxx.se/download LIBCURL_DEPENDENCIES = host-pkgconf \ diff --git a/package/netflix5/Config.in b/package/netflix5/Config.in new file mode 100644 index 000000000000..d9de0a8163a9 --- /dev/null +++ b/package/netflix5/Config.in @@ -0,0 +1,68 @@ +config BR2_PACKAGE_NETFLIX5 + bool "netflix5" + select BR2_PACKAGE_LIBMNG + select BR2_PACKAGE_LIBPNG + select BR2_PACKAGE_ICU + select BR2_PACKAGE_JPEG + select BR2_PACKAGE_WEBP + select BR2_PACKAGE_HARFBUZZ + select BR2_PACKAGE_FREETYPE + select BR2_PACKAGE_EXPAT + select BR2_PACKAGE_OPENSSL + select BR2_PACKAGE_C_ARES + select BR2_PACKAGE_LIBCURL + select BR2_PACKAGE_GRAPHITE2 + select BR2_PACKAGE_LIBVPX + select BR2_PACKAGE_TREMOR + select BR2_PACKAGE_LIBVORBIS + select BR2_PACKAGE_LIBOGG + select BR2_PACKAGE_NGHTTP2 + select BR2_PACKAGE_FFMPEG + help + Netflix5 + +if BR2_PACKAGE_NETFLIX5 + +menu "Extra options" + +choice + bool "Application type" + default BR2_PACKAGE_NETFLIX5_APP + help + Choose application type. + +config BR2_PACKAGE_NETFLIX5_APP + bool "executable" + help + Create Netflix standalone app. + +config BR2_PACKAGE_NETFLIX5_LIB + bool "library" + help + Create Netflix library. + +endchoice + +config BR2_PACKAGE_NETFLIX5_KEYMAP + string "keymap" + help + Install custom keymap + +config BR2_PACKAGE_NETFLIX5_GST_GL + bool "gl" + depends on BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_GL + default y + +config BR2_PACKAGE_NETFLIX5_MARVEL + bool "marvel" + depends on BR2_PACKAGE_MARVELL_AMPSDK + default n + +config BR2_PACKAGE_NETFLIX5_WESTEROS_SINK + bool "westeros-sink" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR + default n + +endmenu + +endif diff --git a/package/netflix5/netflix.pc b/package/netflix5/netflix.pc new file mode 100644 index 000000000000..4f5b5362eae5 --- /dev/null +++ b/package/netflix5/netflix.pc @@ -0,0 +1,11 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${exec_prefix}/lib +includedir=${prefix}/include/netflix + +Name: netflix +Description: Netflix +Requires: +Version: 5.1 +Libs: -L${libdir} -lnetflix +Cflags: -I${includedir} diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk new file mode 100644 index 000000000000..6257ce8034b2 --- /dev/null +++ b/package/netflix5/netflix5.mk @@ -0,0 +1,270 @@ +################################################################################ +# +# netflix5 +# +################################################################################ + +NETFLIX5_VERSION = 59992602fde52e21c33934010bbffe6348962c78 +NETFLIX5_SITE = git@github.com:Metrological/netflix.git +NETFLIX5_SITE_METHOD = git +NETFLIX5_LICENSE = PROPRIETARY +# TODO: check if all deps are really needed, e.g. decoders once gstreamer sink is selected +NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 libvpx tremor libvorbis libogg nghttp2 ffmpeg wpeframework +NETFLIX5_INSTALL_TARGET = YES +NETFLIX5_INSTALL_STAGING = YES +NETFLIX5_SUBDIR = netflix +NETFLIX5_RESOURCE_LOC = $(call qstrip,${BR2_PACKAGE_NETFLIX5_RESOURCE_LOCATION}) + +NETFLIX5_CONF_ENV += TOOLCHAIN_DIRECTORY=$(STAGING_DIR)/usr LD=$(TARGET_CROSS)ld +NETFLIX_CONF_ENV += TARGET_CROSS="$(GNU_TARGET_NAME)-" + +# TODO: disable hardcoded build type, check if all args are really needed. +NETFLIX5_CONF_OPTS = \ + -DCMAKE_BUILD_TYPE=Debug \ + -DBUILD_DPI_DIRECTORY=$(@D)/partner/dpi \ + -DCMAKE_INSTALL_PREFIX=$(@D)/release \ + -DCMAKE_OBJCOPY="$(TARGET_CROSS)objcopy" \ + -DCMAKE_STRIP="$(TARGET_CROSS)strip" \ + -DBUILD_COMPILE_RESOURCES=ON \ + -DBUILD_SYMBOLS=OFF \ + -DBUILD_SHARED_LIBS=OFF \ + -DGIBBON_SCRIPT_JSC_DYNAMIC=OFF \ + -DGIBBON_SCRIPT_JSC_DEBUG=OFF \ + -DNRDP_HAS_IPV6=ON \ + -DNRDP_CRASH_REPORTING="off" \ + -DNRDP_TOOLS="provisioning" \ + -DDPI_IMPLEMENTATION=sink-interface \ + -DDPI_SINK_INTERFACE_IMPLEMENTATION=gstreamer \ + -DBUILD_DEBUG=OFF -DNRDP_HAS_GIBBON_QA=ON -DNRDP_HAS_MUTEX_STACK=ON -DNRDP_HAS_OBJECTCOUNT=ON \ + -DBUILD_PRODUCTION=OFF -DNRDP_HAS_QA=ON -DBUILD_SMALL=OFF -DBUILD_SYMBOLS=ON -DNRDP_HAS_TRACING=OFF \ + -DNRDP_CRASH_REPORTING=breakpad + +ifeq ($(BR2_PACKAGE_NETFLIX5_LIB), y) +NETFLIX5_CONF_OPTS += -DGIBBON_MODE=shared +NETFLIX5_FLAGS = -O3 -fPIC +else +NETFLIX5_CONF_OPTS += -DGIBBON_MODE=executable +endif + +ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yy) +NETFLIX5_CONF_OPTS += -DGIBBON_INPUT=wpeframework +NETFLIX5_DEPENDENCIES = wpeframework-plugins +else +NETFLIX5_CONF_OPTS += -DGIBBON_INPUT=devinput +endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yn) +NETFLIX5_CONF_OPTS += -DUSE_NETFLIX_VIRTUAL_KEYBOARD=1 +NETFLIX5_DEPENDENCIES += WPEFramework +endif + +ifeq ($(BR2_PACKAGE_NETFLIX5_GST_GL),y) + NETFLIX5_CONF_OPTS += -DGST_VIDEO_RENDERING=gl +else ifeq ($(BR2_PACKAGE_NETFLIX5_MARVEL),y) + NETFLIX5_CONF_OPTS += -DGST_VIDEO_RENDERING=synaptics + NETFLIX5_DEPENDENCIES += westeros westeros-sink +else ifeq ($(BR2_PACKAGE_NETFLIX5_WESTEROS_SINK),y) + NETFLIX5_CONF_OPTS += -DGST_VIDEO_RENDERING=westeros + NETFLIX5_DEPENDENCIES += westeros westeros-sink +endif + +ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) + +ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yy) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=wpeframework +else ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yn) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=wayland-egl +else +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=rpi-egl +endif +NETFLIX5_CONF_OPTS += \ + -DGIBBON_PLATFORM=rpi +ifeq ($(BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_GL)$(BR2_PACKAGE_NETFLIX5_WESTEROS_SINK),yn) +NETFLIX5_CONF_OPTS += \ + -DGST_VIDEO_RENDERING=gl +else ifeq ($(BR2_PACKAGE_GST1_PLUGINS_DORNE),y) +NETFLIX5_CONF_OPTS += \ + -DGST_VIDEO_RENDERING=horizon-fusion +endif + +NETFLIX5_DEPENDENCIES += libgles libegl + +else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) +ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yy) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=wpeframework +else ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yn) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=wayland-egl +else +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=nexus \ + -DGST_VIDEO_RENDERING=bcm-nexus +endif + +NETFLIX5_CONF_OPTS += \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles libegl + +ifeq ($(BR2_PACKAGE_HOMECAST_SDK),y) +NETFLIX5_CONF_OPTS += -DNO_NXCLIENT=1 +endif +else ifeq ($(BR2_PACKAGE_INTELCE_SDK),y) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=intelce \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles libegl +else ifeq ($(BR2_PACKAGE_HORIZON_SDK),y) +NETFLIX5_CONF_OPTS += \ + -DNRDP_SCHEDULER_TYPE=rr \ + -DGIBBON_TCMALLOC=OFF \ + -DGIBBON_GRAPHICS=intelce \ + -DGIBBON_PLATFORM=posix \ + -DDPI_REFERENCE_HAVE_DDPLUS=true +ifeq ($(BR2_PACKAGE_GST1_PLUGINS_DORNE),y) +NETFLIX5_CONF_OPTS += \ + -DGST_VIDEO_RENDERING=horizon-fusion +endif +NETFLIX5_DEPENDENCIES += libgles libegl +else ifeq ($(BR2_PACKAGE_KYLIN_GRAPHICS),y) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=wayland-egl \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles libegl +else ifeq ($(BR2_PACKAGE_HAS_LIBEGL)$(BR2_PACKAGE_HAS_LIBGLES)$(BR2_PACKAGE_MESA3D),yyn) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=gles2-egl \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles libegl +else ifeq ($(BR2_PACKAGE_HAS_LIBEGL)$(BR2_PACKAGE_HAS_LIBGLES)$(BR2_PACKAGE_MESA3D),yyy) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=gles2-mesa \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles libegl +else ifeq ($(BR2_PACKAGE_HAS_LIBGLES),y) +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=gles2 \ + -DGIBBON_PLATFORM=posix +NETFLIX5_DEPENDENCIES += libgles +else +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GRAPHICS=null \ + -DGIBBON_PLATFORM=posix +endif + +# +# ifeq ($(BR2_PACKAGE_GSTREAMER1),y) +# NETFLIX5_CONF_OPTS += -DDPI_IMPLEMENTATION=gstreamer +# NETFLIX5_DEPENDENCIES += gstreamer1 gst1-plugins-base gst1-plugins-bad +# else ifeq ($(BR2_PACKAGE_HAS_LIBOPENMAX),y) +# NETFLIX5_CONF_OPTS += \ +# -DDPI_IMPLEMENTATION=reference \ +# -DDPI_REFERENCE_VIDEO_DECODER=openmax-il \ +# -DDPI_REFERENCE_VIDEO_RENDERER=openmax-il \ +# -DDPI_REFERENCE_AUDIO_DECODER=ffmpeg \ +# -DDPI_REFERENCE_AUDIO_RENDERER=openmax-il \ +# -DDPI_REFERENCE_AUDIO_MIXER=none +# NETFLIX5_DEPENDENCIES += ffmpeg libopenmax +# else +# NETFLIX5_CONF_OPTS += -DDPI_IMPLEMENTATION=reference +# endif + +# ifeq ($(BR2_PACKAGE_PLAYREADY),y) +# NETFLIX5_CONF_OPTS += -DDPI_REFERENCE_DRM=playready +# NETFLIX5_DEPENDENCIES += playready +# else +# NETFLIX5_CONF_OPTS += -DDPI_REFERENCE_DRM=none +# endif + +ifeq ($(BR2_PACKAGE_CPPSDK),y) + # This path is deprecated, but for legacy still applicable. + ifeq ($(BR2_PACKAGE_LIBPROVISION),y) + NETFLIX5_CONF_OPTS += -DNETFLIX_USE_PROVISION=ON + NETFLIX5_DEPENDENCIES += libprovision + endif + ifeq ($(BR2_PACKAGE_GLUELOGIC_VIRTUAL_KEYBOARD),y) + NETFLIX5_CONF_OPTS += -DUSE_NETFLIX_VIRTUAL_KEYBOARD=1 + NETFLIX5_DEPENDENCIES += gluelogic + endif +else + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY), y) + NETFLIX5_CONF_OPTS += -DNETFLIX_USE_PROVISION=ON + NETFLIX5_DEPENDENCIES += wpeframework + endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) + NETFLIX5_CONF_OPTS += -DUSE_NETFLIX_VIRTUAL_KEYBOARD=1 + NETFLIX5_DEPENDENCIES += wpeframework + endif +endif + +ifneq ($(BR2_PACKAGE_NETFLIX5_KEYMAP),"") +NETFLIX5_CONF_OPTS += -DNETFLIX_USE_KEYMAP=$(call qstrip,$(BR2_PACKAGE_NETFLIX5_KEYMAP)) +endif + +NETFLIX5_CONF_OPTS += \ + -DCMAKE_C_FLAGS="$(TARGET_CFLAGS) $(NETFLIX5_FLAGS)" \ + -DCMAKE_CXX_FLAGS="$(TARGET_CXXFLAGS) $(NETFLIX5_FLAGS)" + + + +define NETFLIX5_FIX_CONFIG_XMLS + mkdir -p $(@D)/netflix/src/platform/gibbon/data/etc/conf + cp -f $(@D)/netflix/resources/configuration/common.xml $(@D)/netflix/src/platform/gibbon/data/etc/conf/common.xml + cp -f $(@D)/netflix/resources/configuration/config.xml $(@D)/netflix/src/platform/gibbon/data/etc/conf/config.xml +endef + +NETFLIX5_POST_EXTRACT_HOOKS += NETFLIX5_FIX_CONFIG_XMLS + +ifeq ($(BR2_PACKAGE_NETFLIX5_LIB),y) + +define NETFLIX5_INSTALL_STAGING_CMDS + make -C $(@D)/netflix install + $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/libnetflix.so $(STAGING_DIR)/usr/lib + $(INSTALL) -D package/netflix/netflix.pc $(STAGING_DIR)/usr/lib/pkgconfig/netflix.pc + mkdir -p $(STAGING_DIR)/usr/include/netflix/src + mkdir -p $(STAGING_DIR)/usr/include/netflix/nrdbase + mkdir -p $(STAGING_DIR)/usr/include/netflix/nrd + mkdir -p $(STAGING_DIR)/usr/include/netflix/nrdnet + cp -Rpf $(@D)/release/include/* $(STAGING_DIR)/usr/include/netflix/ + cp -Rpf $(@D)/netflix/include/nrdbase/*.h $(STAGING_DIR)/usr/include/netflix/nrdbase/ + cp -Rpf $(@D)/netflix/include/nrd/*.h $(STAGING_DIR)/usr/include/netflix/nrd/ + cp -Rpf $(@D)/netflix/include/nrdnet/*.h $(STAGING_DIR)/usr/include/netflix/nrdnet/ + cd $(@D)/netflix/src && find ./base/ -name "*.h" -exec cp --parents {} ${STAGING_DIR}/usr/include/netflix/src \; + cd $(@D)/netflix/src && find ./nrd/ -name "*.h" -exec cp --parents {} ${STAGING_DIR}/usr/include/netflix/src \; + cd $(@D)/netflix/src && find ./net/ -name "*.h" -exec cp --parents {} ${STAGING_DIR}/usr/include/netflix/src \; + mkdir -p $(STAGING_DIR)/usr/include/netflix + cp -Rpf $(@D)/netflix/src/platform/gibbon/*.h $(STAGING_DIR)/usr/include/netflix + cp -Rpf $(@D)/netflix/src/platform/gibbon/bridge/*.h $(STAGING_DIR)/usr/include/netflix + cp -Rpf $(@D)/netflix/src/platform/gibbon/text/*.h $(STAGING_DIR)/usr/include/netflix + cp -Rpf $(@D)/netflix/src/platform/gibbon/text/freetype/*.h $(STAGING_DIR)/usr/include/netflix + mkdir -p $(STAGING_DIR)/usr/include/netflix/gibbon + cp -Rpf $(@D)/netflix/src/platform/gibbon/include/gibbon/*.h $(STAGING_DIR)/usr/include/netflix/gibbon + find output/staging/usr/include/netflix/nrdbase/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + find output/staging/usr/include/netflix/nrd/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + find output/staging/usr/include/netflix/nrdnet/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; +endef + +define NETFLIX5_INSTALL_TARGET_CMDS + $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/libnetflix.so $(TARGET_DIR)/usr/lib +endef + +else + +define NETFLIX5_INSTALL_TARGET_CMDS + $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/netflix $(TARGET_DIR)/usr/bin + $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/manufss $(TARGET_DIR)/usr/bin +endef + +endif + +define NETFLIX5_PREPARE_DPI + mkdir -p $(TARGET_DIR)/root/Netflix/dpi + ln -sfn /etc/playready $(TARGET_DIR)/root/Netflix/dpi/playready +endef + +NETFLIX5_POST_INSTALL_TARGET_HOOKS += NETFLIX5_PREPARE_DPI + +$(eval $(cmake-package)) diff --git a/package/nghttp2/Config.in b/package/nghttp2/Config.in new file mode 100644 index 000000000000..1ba11d7a5b35 --- /dev/null +++ b/package/nghttp2/Config.in @@ -0,0 +1,5 @@ +config BR2_PACKAGE_NGHTTP2 + bool "nghttp2" + help + nghttp2 + diff --git a/package/nghttp2/nghttp2.mk b/package/nghttp2/nghttp2.mk new file mode 100644 index 000000000000..8505bfe12e20 --- /dev/null +++ b/package/nghttp2/nghttp2.mk @@ -0,0 +1,14 @@ +################################################################################ +# +# nghttp2 +# +################################################################################ + +NGHTTP2_VERSION = 939ad5ddbeeb153c6df23ddfb33b0e9b299708a5 +NGHTTP2_SITE = git@github.com:nghttp2/nghttp2.git +NGHTTP2_SITE_METHOD = git +NGHTTP2_LICENSE = PROPRIETARY +NGHTTP2_INSTALL_STAGING = YES + +$(eval $(cmake-package)) + diff --git a/package/openssl/openssl.hash b/package/openssl/openssl.hash index 064eeca6f4a4..a127e05cba84 100644 --- a/package/openssl/openssl.hash +++ b/package/openssl/openssl.hash @@ -1,5 +1,6 @@ # From https://www.openssl.org/source/openssl-1.0.2k.tar.gz.sha256 sha256 6b3977c61f2aedf0f96367dcfb5c6e578cf37e7b8d913b4ecb6643c3cb88d8c0 openssl-1.0.2k.tar.gz +sha256 932b4ee4def2b434f85435d9e3e19ca8ba99ce9a065a61524b429a9d5e9b2e9c openssl-1.0.2f.tar.gz # Locally computed sha256 eddd8a5123748052c598214487ac178e4bfa4e31ba2ec520c70d59c8c5bfa2e9 openssl-1.0.2a-parallel-install-dirs.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d sha256 147c3eeaad614c044749ea527cb433eae5e2d5cad34a78c6ba61cd967bfbe01f openssl-1.0.2a-parallel-obj-headers.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d diff --git a/package/openssl/openssl.mk b/package/openssl/openssl.mk index 1536982f8bb3..3300a6d28d03 100644 --- a/package/openssl/openssl.mk +++ b/package/openssl/openssl.mk @@ -5,6 +5,9 @@ ################################################################################ OPENSSL_VERSION = 1.0.2k +ifeq ($(BR2_PACKAGE_NETFLIX5),y) +OPENSSL_VERSION = 1.0.2f +endif OPENSSL_SITE = http://www.openssl.org/source OPENSSL_LICENSE = OpenSSL or SSLeay OPENSSL_LICENSE_FILES = LICENSE diff --git a/package/uma-sdk/Config.in b/package/uma-sdk/Config.in new file mode 100644 index 000000000000..b52b03eb08dd --- /dev/null +++ b/package/uma-sdk/Config.in @@ -0,0 +1,21 @@ +config BR2_PACKAGE_UMA_SDK + bool "uma-sdk" + depends on BR2_arm + select BR2_PACKAGE_HAS_NEXUS + select BR2_PACKAGE_HAS_LIBEGL + select BR2_PACKAGE_HAS_LIBGLES + help + Pre-compiled binaries for a platform + +if BR2_PACKAGE_UMA_SDK + +config BR2_PACKAGE_PROVIDES_NEXUS + default "uma-sdk" + +config BR2_PACKAGE_PROVIDES_LIBEGL + default "uma-sdk" + +config BR2_PACKAGE_PROVIDES_LIBGLES + default "uma-sdk" + +endif diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk new file mode 100644 index 000000000000..82fe015c78b6 --- /dev/null +++ b/package/uma-sdk/uma-sdk.mk @@ -0,0 +1,7 @@ +################################################################################ +# +# uma-sdk +# +################################################################################ + +$(eval $(virtual-package)) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 0812b82f6a03..d28aecbbae4b 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -70,7 +70,7 @@ WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_WAYLAND_EGL=ON else ifeq ($(BR2_PACKAGE_HORIZON_SDK)$(BR2_PACKAGE_INTELCE_SDK),y) WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_INTEL_CE=ON -else ifeq ($(BR2_PACKAGE_VIP_SDK),y) +else ifeq ($(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_UMA_SDK),y) WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_NEXUS=ON endif diff --git a/package/wpe/wpeframework-netflix/Config.in b/package/wpe/wpeframework-netflix/Config.in index 99748c167c3f..d110b00d1a53 100644 --- a/package/wpe/wpeframework-netflix/Config.in +++ b/package/wpe/wpeframework-netflix/Config.in @@ -1,6 +1,6 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_NETFLIX bool "Netflix" - depends on BR2_PACKAGE_NETFLIX_LIB + depends on BR2_PACKAGE_NETFLIX_LIB || BR2_PACKAGE_NETFLIX5_LIB help WPE Platform Netflix plugin @@ -44,4 +44,4 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_FULLHD endif comment "netflix is dependent on the netflix package compiled as library" - depends on !BR2_PACKAGE_NETFLIX_LIB + depends on !BR2_PACKAGE_NETFLIX_LIB && !BR2_PACKAGE_NETFLIX5_LIB diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 4b8252f6d191..fd79518655f3 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -14,7 +14,15 @@ endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git WPEFRAMEWORK_NETFLIX_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginNetflix.git WPEFRAMEWORK_NETFLIX_INSTALL_STAGING = YES -WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework netflix +WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework + +ifeq ($(BR2_PACKAGE_NETFLIX5_LIB),y) +WPEFRAMEWORK_NETFLIX_DEPENDENCIES = netflix5 +endif + +ifeq ($(BR2_PACKAGE_NETFLIX_LIB),y) +WPEFRAMEWORK_NETFLIX_DEPENDENCIES = netflix +endif WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_NETFLIX_VERSION} From 3e3411b1442b67ed95285403a5f30cc540193e30 Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 19 Jun 2018 16:34:12 +0200 Subject: [PATCH 239/614] [UMA]: Select box mode 1 as default --- configs/uma7439_full_wpe_nf_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 785a44eb909c..edc893098fa6 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -80,6 +80,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y From 153c74a380d48290050029ebbbac3dea045a2b27 Mon Sep 17 00:00:00 2001 From: modeveci Date: Wed, 20 Jun 2018 13:58:09 +0200 Subject: [PATCH 240/614] [icu][harfbuzz]: remove comment-hashes in front of if conditions --- package/harfbuzz/harfbuzz.mk | 4 ++-- package/icu/icu.mk | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/harfbuzz/harfbuzz.mk b/package/harfbuzz/harfbuzz.mk index a3c8079a9058..973aa3d6f470 100644 --- a/package/harfbuzz/harfbuzz.mk +++ b/package/harfbuzz/harfbuzz.mk @@ -8,9 +8,9 @@ HARFBUZZ_VERSION = 1.4.4 ifeq ($(BR2_PACKAGE_NETFLIX),y) HARFBUZZ_VERSION = 1.0.1 endif -#ifeq ($(BR2_PACKAGE_NETFLIX5),y) +ifeq ($(BR2_PACKAGE_NETFLIX5),y) HARFBUZZ_VERSION = 1.4.2 -#endif +endif HARFBUZZ_SITE = https://www.freedesktop.org/software/harfbuzz/release HARFBUZZ_SOURCE = harfbuzz-$(HARFBUZZ_VERSION).tar.bz2 HARFBUZZ_LICENSE = MIT, ISC (ucdn library) diff --git a/package/icu/icu.mk b/package/icu/icu.mk index 8f0b6f7036e1..10670bb36d9a 100644 --- a/package/icu/icu.mk +++ b/package/icu/icu.mk @@ -5,9 +5,9 @@ ################################################################################ ICU_VERSION = 57.1 -#ifeq ($(BR2_PACKAGE_NETFLIX5),y) +ifeq ($(BR2_PACKAGE_NETFLIX5),y) ICU_VERSION = 58.2 -#endif +endif ICU_SOURCE = icu4c-$(subst .,_,$(ICU_VERSION))-src.tgz ICU_SITE = http://download.icu-project.org/files/icu4c/$(ICU_VERSION) ICU_LICENSE = ICU License From 039ce7b29af8ea2af3cf9fa0f13d0a996f856db0 Mon Sep 17 00:00:00 2001 From: MFransen69 <39826971+MFransen69@users.noreply.github.com> Date: Wed, 20 Jun 2018 16:56:27 +0200 Subject: [PATCH 241/614] [compositor] align auto start flag --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 4df79eeb039f..694db6d3f74a 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -203,9 +203,9 @@ else WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS=false endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=false -else WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=true +else +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=false endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON From b76337e5e076f2b099b6b28e3c3ef18ebb3bbfe4 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Fri, 22 Jun 2018 10:25:13 +0200 Subject: [PATCH 242/614] [ArrisRDK] updated config --- configs/bcm72604_wpe_ml_defconfig | 51 +++++++++++++++++-------- package/bcm-refsw/Config.in | 5 +++ package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- package/vss-sdk/Config.in | 1 + 4 files changed, 43 insertions(+), 16 deletions(-) diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index 8174dac59874..621917f108bc 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -8,11 +8,14 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y BR2_GLIBC_VERSION_2_23=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_TARGET_GENERIC_HOSTNAME="WPE" +BR2_TARGET_GENERIC_ISSUE="Welcome to BCM72604" BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" -BR2_SYSTEM_DHCP="eth2" +BR2_SYSTEM_DHCP="eth0" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" @@ -22,58 +25,76 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +# BR2_PACKAGE_GST1_BCM_VP9_SUPPORT is not set BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NETFLIX=y +BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_16_3=y +BR2_PACKAGE_BCM_REFSW_17_3_RDK=y BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y +BR2_PACKAGE_NEXUS_REMOVE_OPUS=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_GRAPHITE2=y -BR2_PACKAGE_LIBMNG=y -BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y -BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO=y -# BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC is not set +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="4" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE="200" +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y -BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SERVICE_INTERNAL=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y -BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_C_ARES=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index d64b8f383cd2..9b6b97abc667 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -119,6 +119,11 @@ config BR2_PACKAGE_PROVIDES_LIBEGL config BR2_PACKAGE_PROVIDES_LIBGLES default "bcm-refsw" +config BR2_PACKAGE_NEXUS_REMOVE_OPUS + depends on BR2_PACKAGE_HAS_NEXUS + bool "disable opus" + default n + config BR2_PACKAGE_BCM_REFSW_EGLCUBE bool "eglcube" default n diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 8b85cd79ab38..fcbe73fa162e 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -128,7 +128,7 @@ GST1_BCM_CONF_OPTS += --disable-vidfilter endif # Temporary audio fix for youtube on vss platforms -ifeq ($(BR2_PACKAGE_VSS_SDK),y) +ifeq ($(BR2_PACKAGE_NEXUS_REMOVE_OPUS),y) GST1_BCM_PKGDIR = "$(TOP_DIR)/package/gstreamer1/gst1-bcm" define GST1_BCM_APPLY_LOCAL_PATCHES diff --git a/package/vss-sdk/Config.in b/package/vss-sdk/Config.in index d8154f66c8d1..b0bac7a649fc 100644 --- a/package/vss-sdk/Config.in +++ b/package/vss-sdk/Config.in @@ -4,6 +4,7 @@ config BR2_PACKAGE_VSS_SDK select BR2_PACKAGE_HAS_LIBEGL select BR2_PACKAGE_HAS_LIBGLES select BR2_PACKAGE_HAS_NEXUS + select BR2_PACKAGE_NEXUS_REMOVE_OPUS help Pre-compiled binaries for a platform From ae4eb938780f3bedb15d65752786928c6075f0a4 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 22 Jun 2018 10:06:17 +0200 Subject: [PATCH 243/614] [libsoup] use version 2.52.2 for vss config --- package/libsoup/libsoup.hash | 1 + package/libsoup/libsoup.mk | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/package/libsoup/libsoup.hash b/package/libsoup/libsoup.hash index b42cf2f711d2..d335da531610 100644 --- a/package/libsoup/libsoup.hash +++ b/package/libsoup/libsoup.hash @@ -1,2 +1,3 @@ # From http://ftp.gnome.org/pub/gnome/sources/libsoup/2.56/libsoup-2.56.0.sha256sum sha256 d8216b71de8247bc6f274ec054c08547b2e04369c1f8add713e9350c8ef81fe5 libsoup-2.56.0.tar.xz +sha256 db55628b5c7d952945bb71b236469057c8dfb8dea0c271513579c6273c2093dc libsoup-2.52.2.tar.xz diff --git a/package/libsoup/libsoup.mk b/package/libsoup/libsoup.mk index f6e92f8a3b8f..6dd917201ff7 100644 --- a/package/libsoup/libsoup.mk +++ b/package/libsoup/libsoup.mk @@ -4,8 +4,13 @@ # ################################################################################ +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +LIBSOUP_VERSION_MAJOR = 2.52 +LIBSOUP_VERSION = $(LIBSOUP_VERSION_MAJOR).2 +else LIBSOUP_VERSION_MAJOR = 2.56 LIBSOUP_VERSION = $(LIBSOUP_VERSION_MAJOR).0 +endif LIBSOUP_SOURCE = libsoup-$(LIBSOUP_VERSION).tar.xz LIBSOUP_SITE = http://ftp.gnome.org/pub/gnome/sources/libsoup/$(LIBSOUP_VERSION_MAJOR) LIBSOUP_LICENSE = LGPLv2+ From 5e8b05b9261eaf7c5093aec799e8e8e16dc0f13a Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 22 Jun 2018 10:13:45 +0200 Subject: [PATCH 244/614] [wpebackend-rdk] Update version --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index d28aecbbae4b..79d6b54cded2 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 456f7c1470d0dba61399bd593f34a0b0316158cf +WPEBACKEND_RDK_VERSION = da25a833689c42613cc8a75200112f548f7cb3e0 WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 517f03a0693abb87e5431c37f4855c687a8ec944 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 22 Jun 2018 10:16:13 +0200 Subject: [PATCH 245/614] [wpewebkit] disable features for vss platfoms --- package/wpe/wpewebkit/wpewebkit.mk | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 132f673f728e..70aab78efaa0 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -180,6 +180,12 @@ else ifeq ($(BR2_PACKAGE_INTELCE_SDK),y) WPEWEBKIT_FLAGS += -DUSE_WPEWEBKIT_PLATFORM_INTEL_CE=ON endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +WPEWEBKIT_FLAGS += \ + -DENABLE_ACCELERATED_2D_CANVAS=OFF \ + -DENABLE_WEB_CRYPTO=OFF +endif + ifeq ($(BR2_PACKAGE_WPEWEBKIT_ONLY_JSC), y) WPEWEBKIT_FLAGS += -DENABLE_STATIC_JSC=ON endif @@ -302,8 +308,8 @@ define WPEWEBKIT_APPLY_LOCAL_PATCHES $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0006-brcm-force-sink-av-factories.patch.conditional $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0011-change-position-query-frequency-10ms.patch.conditional endef - -WPEWEBKIT_POST_PATCH_HOOKS += WPEWEBKIT_APPLY_LOCAL_PATCHES + +WPEWEBKIT_POST_PATCH_HOOKS += WPEWEBKIT_APPLY_LOCAL_PATCHES endif $(eval $(cmake-package)) From b3a92c489166131f98d21e733bd30ccf84e8d275 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 22 Jun 2018 10:20:46 +0200 Subject: [PATCH 246/614] [vss] Update vss platform --- board/bcm/start.vss.sh | 15 ++--- board/bcm/vss.sh | 47 ++++++++++++++++ board/bcm/vss.txt | 98 +++++++++++++++++++++++++++++++++ configs/vss_wpe_ml_defconfig | 26 ++++----- package/vss-sdk/vss-sdk.mk | 103 +++++++++++++++++++++++++++++++++-- 5 files changed, 260 insertions(+), 29 deletions(-) mode change 100644 => 100755 board/bcm/start.vss.sh create mode 100755 board/bcm/vss.sh create mode 100644 board/bcm/vss.txt diff --git a/board/bcm/start.vss.sh b/board/bcm/start.vss.sh old mode 100644 new mode 100755 index 7415303d0ba8..9327fcbe0b5b --- a/board/bcm/start.vss.sh +++ b/board/bcm/start.vss.sh @@ -1,21 +1,16 @@ #!/bin/sh -export SOURCE=/mnt/flash/metrological +export SOURCE=/home/metrological export CORES=/opt/cores -# export GST_DEBUG=3 -grep -q "/etc/ssl" /proc/mounts && - echo "/etc/ssl is already mounted" || mount --bind $SOURCE/etc/ssl/ /etc/ssl/ - grep -q "/usr/lib/gio" /proc/mounts && echo "/usr/lib/gio is already mounted" || mount --bind $SOURCE/usr/lib/gio /usr/lib/gio -export LD_LIBRARY_PATH=$SOURCE/usr/lib:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs +export LD_LIBRARY_PATH=$SOURCE/usr/ml_libs:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs export PATH=$SOURCE/usr/bin:$PATH -export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner -export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/lib/gstreamer-1.0 -export GST_REGISTRY=$SOURCE/gst-registry.bin -export XKB_CONFIG_ROOT=$SOURCE/usr/share/X11/xkb +export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner +export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/ml_libs/gstreamer-1.0 +export GST_REGISTRY=/tmp/gst-registry.bin mkdir -p ${CORES} ulimit -c unlimited diff --git a/board/bcm/vss.sh b/board/bcm/vss.sh new file mode 100755 index 000000000000..24e88624307b --- /dev/null +++ b/board/bcm/vss.sh @@ -0,0 +1,47 @@ +#!/bin/sh +BOARD_DIR="$(dirname $0)" +ROOTFS_DIR="${BINARIES_DIR}/../rootfs" +ROOTFS_INSTALL_DIR="${ROOTFS_DIR}/home/metrological" +ROOTFS_FILES="${BINARIES_DIR}/rootfs.files" +STAR="*" + +# Clean up target +rm -rf "${TARGET_DIR}/usr/lib/gstreamer-1.0/include" +rm -rf "${TARGET_DIR}/usr/lib/libstdc++.so.6.0.20-gdb.py" +rm -rf "${TARGET_DIR}/etc/ssl/man" + +# Temp rootfs dir +mkdir -p "${ROOTFS_DIR}/usr/bin" +mkdir -p "${ROOTFS_INSTALL_DIR}" + +# Create files list for rsync +rm -rf "${ROOTFS_FILES}" +while read line +do + find "${TARGET_DIR}" -name "$line$STAR" -printf "%P\n" >> "${ROOTFS_FILES}" +done < "${BOARD_DIR}/vss.txt" + +# Append missing folders +echo "usr/lib/gstreamer-1.0" >> "${ROOTFS_FILES}" +echo "usr/lib/gio" >> "${ROOTFS_FILES}" + +rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_INSTALL_DIR}" + +# select general libs that need priority over default version on the box +mkdir -p "${ROOTFS_INSTALL_DIR}/usr/ml_libs/gstreamer-1.0" +find "${ROOTFS_INSTALL_DIR}/usr/lib/" -maxdepth 1 -name "libgst*" -exec mv {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; +find "${ROOTFS_INSTALL_DIR}/usr/lib/" -maxdepth 1 -name "libbrcm*" -exec mv {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; +mv -f "${ROOTFS_INSTALL_DIR}/usr/lib/gstreamer-1.0" "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" +# workaround to prevent mixing libs and slow HTTPS +find "${TARGET_DIR}/usr/lib/" -maxdepth 1 -name "libsoup*" -exec cp -pf {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; + + +# WPEFramework launcher +cp -apf "${BOARD_DIR}/start.vss.sh" "${ROOTFS_DIR}/usr/bin/wpe" + +# Create tar +tar -cvf "${BINARIES_DIR}/vss.tar" -C "${ROOTFS_DIR}" . + +# Cleaning up +rm -rf "${ROOTFS_FILES}" +rm -rf "${ROOTFS_DIR}" diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt new file mode 100644 index 000000000000..1a1b4513f16f --- /dev/null +++ b/board/bcm/vss.txt @@ -0,0 +1,98 @@ +WPEDatabaseProcess +WPEFramework +WPENetworkProcess +WPEProcess +WPEWebProcess +gst-inspect-1.0 +gst-launch-1.0 +gst-plugin-scanner +gst-typefind-1.0 +libWPE-platform.so +libWPE.so +libWPEBackend-default.so +libWPEBackend-rdk.so +libWPEBackend.so +libWPEFrameworkCore.so +libWPEFrameworkCryptalgo.so +libWPEFrameworkDIALServer.so +libWPEFrameworkDeviceInfo.so +libWPEFrameworkInterfaces.so +libWPEFrameworkMonitor.so +libWPEFrameworkOCDM.so +libWPEFrameworkPlugins.so +libWPEFrameworkProtocols.so +libWPEFrameworkProxyStubs.so +libWPEFrameworkRemoteControl.so +libWPEFrameworkSnapshot.so +libWPEFrameworkTraceControl.so +libWPEFrameworkTracing.so +libWPEFrameworkVirtualInput.so +libWPEFrameworkWebKitBrowser.so +libWPEInjectedBundle.so +libWPEWebInspectorResources.so +libWPEWebKit.so +libatomic.so +libbrcmaudiodecoder.so +libbrcmaudiofilter.so +libbrcmaudiosink.so +libbrcmgstutil.so +libbrcmvideodecoder.so +libbrcmvideosink.so +libbrcmvidfilter.so +libcares.so +libcrypto.so +libcurl.so +libepoxy.so +libevdev.so +libfaad.so +libgcrypt.so +libgmp.so +libgnutls-openssl.so +libgnutls.so +libgnutlsxx.so +libgraphite2.so +libgstadaptivedemux-1.0.so +libgstapp-1.0.so +libgstapp.so +libgstaudio-1.0.so +libgstaudioconvert.so +libgstaudioparsers.so +libgstaudioresample.so +libgstbase-1.0.so +libgstcodecparsers-1.0.so +libgstcoreelements.so +libgstfaad.so +libgstfft-1.0.so +libgstgio.so +libgstinterleave.so +libgstisomp4.so +libgstmatroska.so +libgstmpegts-1.0.so +libgstnet-1.0.so +libgstpbutils-1.0.so +libgstplayback.so +libgstreamer-1.0.so +libgstriff-1.0.so +libgstrtp-1.0.so +libgsttag-1.0.so +libgsttypefindfunctions.so +libgsturidownloader-1.0.so +libgstvideo-1.0.so +libharfbuzz-icu.so +libhogweed.so +libiconv.so +libinput.so +libintl.so +libjpeg.so +libmng.so +libmpg123.so +libmtdev.so +libnettle.so +libocdm.so +librpc.so +libssl.so +libtasn1.so +libudev.so +libunistring.so +libwebsocket.so +libxslt.so diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index ff64f7a0f9e3..4fe98344ee4e 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -6,7 +6,7 @@ BR2_CCACHE_DIR="$(TOPDIR)/../buildroot-ccache" BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_EXTERNAL=y BR2_TOOLCHAIN_EXTERNAL_CUSTOM=y -BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/toolchain/vss" +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/toolchain/vss2" BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="arm-buildroot-linux-gnueabihf" BR2_TOOLCHAIN_EXTERNAL_GCC_5=y BR2_TOOLCHAIN_EXTERNAL_HEADERS_4_4=y @@ -18,12 +18,14 @@ BR2_INIT_NONE=y BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/bcm/vss.sh" # BR2_PACKAGE_BUSYBOX is not set BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y @@ -38,42 +40,36 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_MEMSTAT=y +BR2_PACKAGE_STRACE=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_VSS_SDK=y -BR2_PACKAGE_OPUS=y +BR2_PACKAGE_OPENSSL=y BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PORT="82" -BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/flash/metrological/persistent" -BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/mnt/flash/metrological/usr/share/WPEFramework" -BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/mnt/flash/metrological/usr/lib/wpeframework/plugins" -BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/mnt/flash/metrological/usr/lib/wpeframework/proxystubs" +BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/flash/persistent" +BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/home/metrological/usr/share/WPEFramework" +BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/home/metrological/usr/lib/wpeframework/plugins" +BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/home/metrological/usr/lib/wpeframework/proxystubs" BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD=y BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y BR2_PACKAGE_WPEFRAMEWORK_EGLTEST=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y -BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -# BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set -BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y -BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y BR2_PACKAGE_C_ARES=y diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index 759f912d804f..ee453513f35f 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -4,6 +4,8 @@ # ################################################################################ +#$(eval $(virtual-package)) + BUILDROOT_FLAGS = .stamp_downloaded \ .stamp_extracted \ .applied_patches_list \ @@ -15,12 +17,105 @@ BUILDROOT_FLAGS = .stamp_downloaded \ .br_filelist_after \ .stamp_target_installed \ .stamp_host_installed \ - .stamp_images_installed + .stamp_images_installed define VSS_EXCLUDE_PACKAGE $(info "Excluding ${${1}_NAME}-${${1}_VERSION} from build, provided by SDK") - mkdir -p $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION}/ - $(foreach flag,$(BUILDROOT_FLAGS), touch $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION}/$(flag);) + rm -rf $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION} + ln -sf $(@D)/br_flags $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION} +endef + +define VSS_WRITE_FLAGS + mkdir -p $(@D)/br_flags/ + $(foreach flag,$(BUILDROOT_FLAGS), touch $(@D)/br_flags/$(flag);) +endef + +define VSS_EXCLUDE_PACKAGE_LIST + $(call VSS_EXCLUDE_PACKAGE,FREETYPE) + $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) + $(call VSS_EXCLUDE_PACKAGE,ICU) + $(call VSS_EXCLUDE_PACKAGE,ICUDATA) +endef + +define VSS_EXCLUDE_UNKNOWN_LIST + $(call VSS_EXCLUDE_PACKAGE,FREETYPE) + $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) + $(call VSS_EXCLUDE_PACKAGE,OPENSSL) + $(call VSS_EXCLUDE_PACKAGE,ZLIB) + $(call VSS_EXCLUDE_PACKAGE,LIBPNG) + $(call VSS_EXCLUDE_PACKAGE,LIBJPEG) + $(call VSS_EXCLUDE_PACKAGE,JPEG_TURBO) + $(call VSS_EXCLUDE_PACKAGE,EXPAT) + $(call VSS_EXCLUDE_PACKAGE,C_ARES) + $(call VSS_EXCLUDE_PACKAGE,LIBCURL) + $(call VSS_EXCLUDE_PACKAGE,LIBXKBCOMMON) + $(call VSS_EXCLUDE_PACKAGE,LIBSOUP) + $(call VSS_EXCLUDE_PACKAGE,LIBGLIB2) + $(call VSS_EXCLUDE_PACKAGE,LIBFFI) + $(call VSS_EXCLUDE_PACKAGE,ICU) + $(call VSS_EXCLUDE_PACKAGE,ICUDATA) + $(call VSS_EXCLUDE_PACKAGE,ORC) + $(call VSS_EXCLUDE_PACKAGE,SQLITE) + $(call VSS_EXCLUDE_PACKAGE,KMOD) + $(call VSS_EXCLUDE_PACKAGE,SHARED_MIME_INFO) + # cairo-gl.h missing --> ACCELERATED_2D_CANVAS=OFF + $(call VSS_EXCLUDE_PACKAGE,CAIRO) + $(call VSS_EXCLUDE_PACKAGE,MPG123) + $(call VSS_EXCLUDE_PACKAGE,PANGO) + $(call VSS_EXCLUDE_PACKAGE,OPUS) + $(call VSS_EXCLUDE_PACKAGE,LIBMNG) + $(call VSS_EXCLUDE_PACKAGE,PIXMAN) + $(call VSS_EXCLUDE_PACKAGE,WEBP) + $(call VSS_EXCLUDE_PACKAGE,BITSTREAM_VERA) + $(call VSS_EXCLUDE_PACKAGE,DASH) + $(call VSS_EXCLUDE_PACKAGE,UTIL_LINUX) + $(call VSS_EXCLUDE_PACKAGE,XUTIL_UTIL_MACROS) + $(call VSS_EXCLUDE_PACKAGE,EUDEV) + $(call VSS_EXCLUDE_PACKAGE,GST1_BCM) +endef + +define VSS_SDK_WRONG_PKG + # libgraphite2.so missing + $(call VSS_EXCLUDE_PACKAGE,GRAPHITE2) + # libharfbuzz-icu.so missing + $(call VSS_EXCLUDE_PACKAGE,HARFBUZZ) + # MSE needs this https://bugzilla.gnome.org/show_bug.cgi?id=768852 https://github.com/GStreamer/gst-plugins-base/commit/c6722c06a040a333188793d7f4403dd983c04815 + $(call VSS_EXCLUDE_PACKAGE,GSTREAMER1) + $(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BASE) + $(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_GOOD) + $(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_BAD) + $(call VSS_EXCLUDE_PACKAGE,GST1_PLUGINS_UGLY) + $(call VSS_EXCLUDE_PACKAGE,FAAD2) + # missing libgiognutls.so + $(call VSS_EXCLUDE_PACKAGE,NETTLE) + $(call VSS_EXCLUDE_PACKAGE,GMP) + $(call VSS_EXCLUDE_PACKAGE,GNUTLS) + $(call VSS_EXCLUDE_PACKAGE,GLIB_NETWORKING) + # missing on box only + # - /usr/lib/libxslt.so + # - /usr/lib/libgcrypt.so + # v1.6.5 => ENABLE_WEB_CRYPTO=OFF preferable +v1.7.0 + $(call VSS_EXCLUDE_PACKAGE,LIBGCRYPT) + $(call VSS_EXCLUDE_PACKAGE,LIBGPG_ERROR) + $(call VSS_EXCLUDE_PACKAGE,LIBXML2) + $(call VSS_EXCLUDE_PACKAGE,LIBXSLT) + $(call VSS_EXCLUDE_PACKAGE,LIBTASN1) + $(call VSS_EXCLUDE_PACKAGE,LIBUNISTRING) + $(call VSS_EXCLUDE_PACKAGE,PCRE) +endef + +define VSS_SDK_BUILD_CMDS + $(call VSS_WRITE_FLAGS) + $(call VSS_EXCLUDE_PACKAGE_LIST) +endef + +define VSS_SDK_INSTALL_STAGING_CMDS +endef + +define VSS_SDK_INSTALL_STAGING_CMDS +endef + +define VSS_SDK_INSTALL_TARGET_CMDS endef -$(eval $(virtual-package)) +$(eval $(generic-package)) From 13694762ff64ba0f75cc66f7d8edc611c91ec839 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 22 Jun 2018 10:21:51 +0200 Subject: [PATCH 247/614] [wpebackend-rdk] Remove unneeded patch --- .../0001-add-nxclient-switch.patch | 20 ------------------- 1 file changed, 20 deletions(-) delete mode 100644 package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch diff --git a/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch b/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch deleted file mode 100644 index 32b08a49305d..000000000000 --- a/package/wpe/wpebackend-rdk/0001-add-nxclient-switch.patch +++ /dev/null @@ -1,20 +0,0 @@ -diff --git a/src/bcm-nexus/CMakeLists.txt b/src/bcm-nexus/CMakeLists.txt -index 57ec6ff..5dd8916 100644 ---- a/src/bcm-nexus/CMakeLists.txt -+++ b/src/bcm-nexus/CMakeLists.txt -@@ -12,6 +12,15 @@ if (EGL_LIBRARIES_nxclient) - list(APPEND WPE_PLATFORM_LIBRARIES nxclient) - endif() - -+# TODO: write a pc file for this. -+if (NEXUS_CLIENT_MODE) -+ message(STATUS "Building with nexus in client mode" ) -+ list(APPEND WPE_PLATFORM_LIBRARIES nexus_client) -+else () -+ message(STATUS "Building with nexus in proxy mode" ) -+ list(APPEND WPE_PLATFORM_LIBRARIES nexus) -+endif () -+ - list(APPEND WPE_PLATFORM_SOURCES - src/bcm-nexus/renderer-backend.cpp - src/bcm-nexus/view-backend.cpp From 4a66fb804bc493a56c634133c2c280e2c2c01a48 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Fri, 22 Jun 2018 18:14:06 +0200 Subject: [PATCH 248/614] [ArrisRDK] Copying index.html post build --- board/bcm/index.html | 2 +- board/bcm/post-build.sh | 15 +++++++++++++++ configs/bcm72604_wpe_ml_defconfig | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) create mode 100755 board/bcm/post-build.sh diff --git a/board/bcm/index.html b/board/bcm/index.html index 6c4d2198132c..b018cdb0845e 120000 --- a/board/bcm/index.html +++ b/board/bcm/index.html @@ -1 +1 @@ -board/raspberrypi/index.html \ No newline at end of file +../raspberrypi/index.html \ No newline at end of file diff --git a/board/bcm/post-build.sh b/board/bcm/post-build.sh new file mode 100755 index 000000000000..9da698abe273 --- /dev/null +++ b/board/bcm/post-build.sh @@ -0,0 +1,15 @@ +#!/bin/bash + + +set -u +set -e + +echo "Post-build: processing $@" + +BOARD_DIR="$(dirname $0)" + +# Copy index.html page for WPE Framework +if [ -f "${BOARD_DIR}/index.html" ]; then + mkdir -p "${TARGET_DIR}/var/www/" + cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/var/www/" +fi diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index 621917f108bc..f1475ac30dea 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -16,6 +16,7 @@ BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" BR2_SYSTEM_DHCP="eth0" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" From b0d18623bc4648278c3f7b432a2ced02d1f99b0f Mon Sep 17 00:00:00 2001 From: Srinivas Kakarla Date: Fri, 29 Jun 2018 17:29:10 +0530 Subject: [PATCH 249/614] Added Playgiga client --- package/Config.in | 1 + package/playgiga/Config.in | 8 ++++++++ package/playgiga/playgiga.mk | 30 ++++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+) create mode 100644 package/playgiga/Config.in create mode 100644 package/playgiga/playgiga.mk diff --git a/package/Config.in b/package/Config.in index e097a66f6f2b..6fe4b6b9bc1d 100644 --- a/package/Config.in +++ b/package/Config.in @@ -9,6 +9,7 @@ menu "Audio and video applications" source "package/aumix/Config.in" source "package/bellagio/Config.in" source "package/cobalt/Config.in" + source "package/playgiga/Config.in" source "package/dvblast/Config.in" source "package/dvdauthor/Config.in" source "package/dvdrw-tools/Config.in" diff --git a/package/playgiga/Config.in b/package/playgiga/Config.in new file mode 100644 index 000000000000..855da7a2ab66 --- /dev/null +++ b/package/playgiga/Config.in @@ -0,0 +1,8 @@ +config BR2_PACKAGE_PLAYGIGA + bool "playgiga" + depends on BR2_TOOLCHAIN_GCC_AT_LEAST_6 + select BR2_PACKAGE_LIBCURL + select BR2_PACKAGE_OPUS + +comment "playgiga client source needs a toolchain gcc >= 6.0" + diff --git a/package/playgiga/playgiga.mk b/package/playgiga/playgiga.mk new file mode 100644 index 000000000000..25da027e3e64 --- /dev/null +++ b/package/playgiga/playgiga.mk @@ -0,0 +1,30 @@ +################################################################################ +# +# PLAYGIGA +# +################################################################################ + +PLAYGIGA_VERSION = 897d0e9bbd1eef86554599c03a817d0d8c8c5c84 +PLAYGIGA_SITE_METHOD = git +PLAYGIGA_SITE = https://github.com/Metrological/playgiga +PLAYGIGA_INSTALL_STAGING = YES +PLAYGIGA_DEPENDENCIES = host-cmake gstreamer1 gst1-plugins-base gst1-plugins-good gst1-plugins-bad libcurl opus + +export BUILDROOT_HOST_PATH=$(HOST_DIR) + +PLATFORM_DIR = wpe + +define PLAYGIGA_INSTALL_IMAGE + cp -a $(@D)/$(PLATFORM_DIR)/bin/pgclient $(TARGET_DIR)/usr/bin +endef + +define PLAYGIGA_BUILD_CMDS + $(BUILDROOT_HOST_PATH)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt -DBUILDROOT_HOST_PATH=$(BUILDROOT_HOST_PATH) + $(MAKE) -C $(@D)/$(PLATFORM_DIR) +endef + +define PLAYGIGA_INSTALL_TARGET_CMDS + $(call PLAYGIGA_INSTALL_IMAGE) +endef + +$(eval $(generic-package)) From a0f07ed932a6b430536499b6d607a56e15939e99 Mon Sep 17 00:00:00 2001 From: Charlie Turner Date: Fri, 15 Jun 2018 12:00:44 +0100 Subject: [PATCH 250/614] [gstreamer] Add patches for parsing key ids out of mss manifests. --- .../0012-mssdemux-parse-protection-data.patch | 325 ++++++++++++++++++ .../0014-qtdemux-default-key-ids.patch | 134 ++++++++ 2 files changed, 459 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0012-mssdemux-parse-protection-data.patch create mode 100644 package/gstreamer1/gst1-plugins-good/0014-qtdemux-default-key-ids.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0012-mssdemux-parse-protection-data.patch b/package/gstreamer1/gst1-plugins-bad/0012-mssdemux-parse-protection-data.patch new file mode 100644 index 000000000000..46862b09731e --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0012-mssdemux-parse-protection-data.patch @@ -0,0 +1,325 @@ +From d67528ffbff0e1ae2558557e14eba800df57ecb6 Mon Sep 17 00:00:00 2001 +From: Charlie Turner +Date: Fri, 25 May 2018 09:43:30 +0100 +Subject: [PATCH] [mssdemux] Parse playready payload. + +Look at the playready specific data payload to extract default key ids +for decrypting samples. The format of this payload seems to be +proprietary. +--- + ext/smoothstreaming/gstmssdemux.c | 19 +++- + ext/smoothstreaming/gstmssmanifest.c | 155 +++++++++++++++++++++++++-- + ext/smoothstreaming/gstmssmanifest.h | 1 + + 3 files changed, 164 insertions(+), 11 deletions(-) + +diff --git a/ext/smoothstreaming/gstmssdemux.c b/ext/smoothstreaming/gstmssdemux.c +index 26147fd8b..5802c98ff 100644 +--- a/ext/smoothstreaming/gstmssdemux.c ++++ b/ext/smoothstreaming/gstmssdemux.c +@@ -465,7 +465,7 @@ gst_mss_demux_setup_streams (GstAdaptiveDemux * demux) + gst_adaptive_demux_stream_new (GST_ADAPTIVE_DEMUX_CAST (mssdemux), + srcpad); + stream->manifest_stream = manifeststream; +- stream->adapter = gst_adapter_new(); ++ stream->adapter = gst_adapter_new (); + gst_mss_stream_set_active (manifeststream, TRUE); + active_streams = g_slist_prepend (active_streams, stream); + } +@@ -508,6 +508,18 @@ gst_mss_demux_setup_streams (GstAdaptiveDemux * demux) + gst_event_new_protection (protection_system_id, protection_buffer, + "smooth-streaming"); + ++ GstBuffer *key_id = gst_mss_manifest_get_key_id (mssdemux->manifest); ++ if (!gst_buffer_get_size (key_id)) { ++ GST_WARNING_OBJECT (stream, ++ "protected manifest, but no key ids available"); ++ } else { ++ GST_LOG_OBJECT (stream, ++ "Adding key id to the protection event of size %lu", ++ gst_buffer_get_size (key_id)); ++ GstStructure *structure = gst_event_writable_structure (event); ++ gst_structure_set (structure, "key_id", GST_TYPE_BUFFER, key_id, NULL); ++ } ++ + GST_LOG_OBJECT (stream, "Queuing Protection event on source pad"); + gst_adaptive_demux_stream_queue_event ((GstAdaptiveDemuxStream *) stream, + event); +@@ -700,7 +712,7 @@ gst_mss_demux_update_manifest_data (GstAdaptiveDemux * demux, + + static GstFlowReturn + gst_mss_demux_data_received (GstAdaptiveDemux * demux, +- GstAdaptiveDemuxStream * stream, GstBuffer *buffer) ++ GstAdaptiveDemuxStream * stream, GstBuffer * buffer) + { + GstMssDemux *mssdemux = GST_MSS_DEMUX_CAST (demux); + GstMssDemuxStream *mssstream = (GstMssDemuxStream *) stream; +@@ -732,7 +744,8 @@ gst_mss_demux_data_received (GstAdaptiveDemux * demux, + } + } + +- return GST_ADAPTIVE_DEMUX_CLASS (parent_class)->data_received (demux, stream, buffer); ++ return GST_ADAPTIVE_DEMUX_CLASS (parent_class)->data_received (demux, stream, ++ buffer); + } + + static gboolean +diff --git a/ext/smoothstreaming/gstmssmanifest.c b/ext/smoothstreaming/gstmssmanifest.c +index ebbf45482..1ab19daa1 100644 +--- a/ext/smoothstreaming/gstmssmanifest.c ++++ b/ext/smoothstreaming/gstmssmanifest.c +@@ -28,6 +28,8 @@ + #include + #include + #include ++#include ++#include + + /* for parsing h264 codec data */ + #include +@@ -109,6 +111,10 @@ struct _GstMssManifest + GString *protection_system_id; + gchar *protection_data; + ++ // FIXME: There can be multiple key ids present in protected manifests. ++ gchar *key_id; ++ gsize key_id_len; ++ + GSList *streams; + }; + +@@ -283,17 +289,18 @@ _gst_mss_stream_init (GstMssManifest * manifest, GstMssStream * stream, + GstClockTime accumulated_time, look_ahead_estimation_time; + + if (first_fragment_time == GST_CLOCK_TIME_NONE && builder.fragments) +- first_fragment_time = builder.fragment_time_accum; ++ first_fragment_time = builder.fragment_time_accum; + accumulated_time = + (builder.fragment_time_accum +- + ((GstMssStreamFragment*)builder.fragments->data)->duration ++ + ((GstMssStreamFragment *) builder.fragments->data)->duration + - first_fragment_time) * GST_SECOND / DEFAULT_TIMESCALE; + look_ahead_estimation_time = accumulated_time +- * (builder.fragment_number + manifest->look_ahead_fragment_count + 5) ++ * (builder.fragment_number + manifest->look_ahead_fragment_count + ++ 5) + / builder.fragment_number; + if (dvr_window == GST_CLOCK_TIME_NONE + || look_ahead_estimation_time >= dvr_window) +- break; ++ break; + } + } else if (node_has_type (iter, MSS_NODE_STREAM_QUALITY)) { + GstMssStreamQuality *quality = gst_mss_stream_quality_new (iter); +@@ -305,10 +312,10 @@ _gst_mss_stream_init (GstMssManifest * manifest, GstMssStream * stream, + + if (stream->has_live_fragments) { + /* Skip all fragments except the first one (more recently added) */ +- GList* skipped; ++ GList *skipped; + + stream->fragments = builder.fragments; +- skipped = g_list_remove_link(builder.fragments, builder.fragments); ++ skipped = g_list_remove_link (builder.fragments, builder.fragments); + g_list_free_full (skipped, g_free); + + g_queue_init (&stream->live_fragments); +@@ -333,6 +340,122 @@ _gst_mss_stream_init (GstMssManifest * manifest, GstMssStream * stream, + gst_mss_fragment_parser_init (&stream->fragment_parser); + } + ++static void ++_gst_mss_parse_protection_data (GstMssManifest * manifest) ++{ ++ guchar *decoded_protection_data = NULL; ++ gsize decoded_protection_data_len = 0; ++ xmlChar *protection_data_text = NULL; ++ int protection_data_text_len = 0; ++ xmlDocPtr protection_data_xml = NULL; ++ // Note, this does not need to free'd, freeing the doc ptr will free this. ++ xmlNode *protection_data_root_element = NULL; ++ const xmlChar *protection_data_namespace = NULL; ++ xmlXPathContextPtr xpath_ctx = NULL; ++ xmlXPathObjectPtr xpath_obj = NULL; ++ xmlNodeSetPtr key_id_node = NULL; ++ gsize protection_data_xml_len = 0; ++ guchar *start_tag = NULL; ++ ++ decoded_protection_data = ++ g_base64_decode (manifest->protection_data, &decoded_protection_data_len); ++ ++ start_tag = decoded_protection_data; ++ ++ // The protection data starts with a 10-byte PlayReady version ++ // header that needs to be skipped over to avoid XML parsing ++ // errors. ++ while (start_tag && *start_tag != '<') ++ start_tag++; ++ ++ if (!start_tag) { ++ GST_ERROR ("failed to find a start tag in protection data payload"); ++ goto beach; ++ } ++ ++ protection_data_xml_len = ++ decoded_protection_data_len - (start_tag - decoded_protection_data); ++ protection_data_xml = ++ xmlReadMemory ((const gchar *) start_tag, protection_data_xml_len, ++ "protection_data", "utf-16", 0); ++ ++ if (!protection_data_xml) { ++ GST_ERROR ("failed to parse protection data XML"); ++ goto beach; ++ } ++ ++ if (gst_debug_category_get_threshold (GST_CAT_DEFAULT) >= GST_LEVEL_MEMDUMP) { ++ xmlDocDumpMemoryEnc (protection_data_xml, &protection_data_text, ++ &protection_data_text_len, "utf8"); ++ GST_MEMDUMP ("protection data XML", protection_data_text, ++ protection_data_text_len); ++ xmlFree (protection_data_text); ++ } ++ ++ protection_data_root_element = xmlDocGetRootElement (protection_data_xml); ++ if (protection_data_root_element->type != XML_ELEMENT_NODE || ++ xmlStrcmp (protection_data_root_element->name, ++ (const xmlChar *) "WRMHEADER") || !protection_data_root_element->ns) { ++ GST_ERROR ("invalid protection data XML"); ++ goto beach; ++ } ++ ++ xpath_ctx = xmlXPathNewContext (protection_data_xml); ++ if (!xpath_ctx) { ++ GST_ERROR ("failed to create xpath context"); ++ goto beach; ++ } ++ ++ protection_data_namespace = protection_data_root_element->ns->href; ++ if (xmlXPathRegisterNs (xpath_ctx, (const xmlChar *) "prhdr", ++ protection_data_namespace) < 0) { ++ GST_ERROR ("failed to register XML namespace"); ++ goto beach; ++ } ++ ++ xpath_obj = ++ xmlXPathEvalExpression ((const xmlChar *) "//prhdr:KID", xpath_ctx); ++ if (!xpath_obj) { ++ GST_DEBUG ("failed to eval XPath expression"); ++ goto beach; ++ } ++ ++ key_id_node = xpath_obj->nodesetval; ++ int num_key_ids = key_id_node ? key_id_node->nodeNr : 0; ++ ++ GST_DEBUG ("found %d key ids", num_key_ids); ++ ++ if (num_key_ids != 0 && (key_id_node->nodeTab[0]->type == XML_ELEMENT_NODE)) { ++ xmlChar *encoded_key_id = xmlNodeGetContent (key_id_node->nodeTab[0]); ++ gsize decoded_key_id_len; ++ guchar *decoded_key_id = ++ g_base64_decode ((const gchar *) encoded_key_id, &decoded_key_id_len); ++ ++ GST_MEMDUMP ("key retrieved", decoded_key_id, decoded_key_id_len); ++ ++ manifest->key_id = g_realloc (manifest->key_id, decoded_key_id_len); ++ memcpy (manifest->key_id, decoded_key_id, decoded_key_id_len); ++ manifest->key_id_len = decoded_key_id_len; ++ ++ xmlFree (encoded_key_id); ++ g_free (decoded_key_id); ++ } else { ++ GST_ERROR ("invalid XML payload"); ++ goto beach; ++ } ++ ++beach: ++ if (decoded_protection_data) ++ g_free (decoded_protection_data); ++ if (xpath_ctx) ++ xmlXPathFreeContext (xpath_ctx); ++ if (xpath_obj) ++ xmlXPathFreeObject (xpath_obj); ++ if (protection_data_xml) ++ xmlFreeDoc (protection_data_xml); ++ ++ return; ++} + + static void + _gst_mss_parse_protection (GstMssManifest * manifest, +@@ -362,6 +485,7 @@ _gst_mss_parse_protection (GstMssManifest * manifest, + + manifest->protection_system_id = system_id; + manifest->protection_data = (gchar *) xmlNodeGetContent (nodeiter); ++ _gst_mss_parse_protection_data (manifest); + xmlFree (system_id_attribute); + break; + } +@@ -418,6 +542,9 @@ gst_mss_manifest_new (GstBuffer * data) + } + } + ++ manifest->key_id = NULL; ++ manifest->key_id_len = 0; ++ + for (nodeiter = root->children; nodeiter; nodeiter = nodeiter->next) { + if (nodeiter->type == XML_ELEMENT_NODE + && (strcmp ((const char *) nodeiter->name, "StreamIndex") == 0)) { +@@ -464,6 +591,9 @@ gst_mss_manifest_free (GstMssManifest * manifest) + + g_slist_free_full (manifest->streams, (GDestroyNotify) gst_mss_stream_free); + ++ if (manifest->key_id) ++ g_free (manifest->key_id); ++ + if (manifest->protection_system_id != NULL) + g_string_free (manifest->protection_system_id, TRUE); + xmlFree (manifest->protection_data); +@@ -486,6 +616,15 @@ gst_mss_manifest_get_protection_data (GstMssManifest * manifest) + return manifest->protection_data; + } + ++GstBuffer * ++gst_mss_manifest_get_key_id (GstMssManifest * manifest) ++{ ++ GstBuffer *key_id_buffer = ++ gst_buffer_new_allocate (NULL, manifest->key_id_len, NULL); ++ gst_buffer_fill (key_id_buffer, 0, manifest->key_id, manifest->key_id_len); ++ return key_id_buffer; ++} ++ + GSList * + gst_mss_manifest_get_streams (GstMssManifest * manifest) + { +@@ -1267,7 +1406,7 @@ gst_mss_stream_seek (GstMssStream * stream, gboolean forward, + GST_DEBUG ("Stream %s seeking to %" G_GUINT64_FORMAT, stream->url, time); + for (iter = stream->fragments; iter; iter = g_list_next (iter)) { + fragment = iter->data; +- if(stream->has_live_fragments){ ++ if (stream->has_live_fragments) { + if (fragment->time + fragment->repetitions * fragment->duration > time) + stream->current_fragment = iter; + break; +@@ -1583,7 +1722,7 @@ gst_mss_stream_fragment_parse (GstMssStream * stream, GstBuffer * buffer) + GstMssStreamFragment *fragment; + + if (last == NULL) +- break; ++ break; + fragment = g_new (GstMssStreamFragment, 1); + fragment->number = last->number + 1; + fragment->repetitions = 1; +diff --git a/ext/smoothstreaming/gstmssmanifest.h b/ext/smoothstreaming/gstmssmanifest.h +index 29545af88..3f9f49ada 100644 +--- a/ext/smoothstreaming/gstmssmanifest.h ++++ b/ext/smoothstreaming/gstmssmanifest.h +@@ -55,6 +55,7 @@ GstClockTime gst_mss_manifest_get_min_fragment_duration (GstMssManifest * manife + const gchar * gst_mss_manifest_get_protection_system_id (GstMssManifest * manifest); + const gchar * gst_mss_manifest_get_protection_data (GstMssManifest * manifest); + gboolean gst_mss_manifest_get_live_seek_range (GstMssManifest * manifest, gint64 * start, gint64 * stop); ++GstBuffer * gst_mss_manifest_get_key_id (GstMssManifest * manifest); + + GstMssStreamType gst_mss_stream_get_type (GstMssStream *stream); + GstCaps * gst_mss_stream_get_caps (GstMssStream * stream); +-- +2.17.1 + diff --git a/package/gstreamer1/gst1-plugins-good/0014-qtdemux-default-key-ids.patch b/package/gstreamer1/gst1-plugins-good/0014-qtdemux-default-key-ids.patch new file mode 100644 index 000000000000..ae2fd2dd4879 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-good/0014-qtdemux-default-key-ids.patch @@ -0,0 +1,134 @@ +From 15f68f30b47fa510b73dc6fa96f4dadd929b384e Mon Sep 17 00:00:00 2001 +From: Charlie Turner +Date: Fri, 25 May 2018 14:08:17 +0100 +Subject: [PATCH] [qtdemux] Check if an upstream demuxer provided a default + kid. + +Smooth streaming demuxers do not send boxes containing metadata about +the stream. They have to send metadata "out-of-band". + +For piff encoded streams, if no box has been found containing a default +kid for the sample, check if an upstream demuxer has provided one via a +protection event, and use this as a fallback. +--- + gst/isomp4/qtdemux.c | 55 ++++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 51 insertions(+), 4 deletions(-) + +diff --git a/gst/isomp4/qtdemux.c b/gst/isomp4/qtdemux.c +index bad9ca759..d033f98fd 100644 +--- a/gst/isomp4/qtdemux.c ++++ b/gst/isomp4/qtdemux.c +@@ -407,6 +407,9 @@ struct _QtDemuxStream + guint32 protection_scheme_type; + guint32 protection_scheme_version; + gpointer protection_scheme_info; /* specific to the protection scheme */ ++ ++ GstBuffer *default_kid; ++ + GQueue protection_scheme_event_queue; + }; + +@@ -1854,6 +1857,7 @@ _create_stream (void) + stream->alignment = 1; + stream->duration_last_moof = 0; + g_queue_init (&stream->protection_scheme_event_queue); ++ stream->default_kid = NULL; + return stream; + } + +@@ -2284,6 +2288,32 @@ gst_qtdemux_handle_sink_event (GstPad * sinkpad, GstObject * parent, + case GST_EVENT_PROTECTION: + { + const gchar *system_id = NULL; ++ GstBuffer *default_key_id = NULL; ++ const GstStructure *structure; ++ QtDemuxStream *stream = NULL; ++ GstMapInfo map; ++ ++ structure = gst_event_get_structure (event); ++ if (gst_structure_has_field_typed (structure, "key_id", GST_TYPE_BUFFER)) { ++ gst_structure_get (structure, "key_id", GST_TYPE_BUFFER, ++ &default_key_id, NULL); ++ GST_DEBUG_OBJECT (demux, ++ "received a default key id of size %" G_GSIZE_FORMAT, ++ gst_buffer_get_size (default_key_id)); ++ ++ if (gst_debug_category_get_threshold (GST_CAT_DEFAULT) >= ++ GST_LEVEL_MEMDUMP) { ++ gst_buffer_map (default_key_id, &map, GST_MAP_READ); ++ GST_MEMDUMP_OBJECT (demux, "default key id", (guint8 *) map.data, ++ map.size); ++ gst_buffer_unmap (default_key_id, &map); ++ } ++ ++ if (demux->n_streams) { ++ stream = demux->streams[0]; ++ stream->default_kid = default_key_id; ++ } ++ } + + gst_event_parse_protection (event, &system_id, NULL, NULL); + GST_DEBUG_OBJECT (demux, "Received protection event for system ID %s", +@@ -2436,6 +2466,8 @@ gst_qtdemux_stream_clear (GstQTDemux * qtdemux, QtDemuxStream * stream) + g_queue_foreach (&stream->protection_scheme_event_queue, + (GFunc) gst_event_unref, NULL); + g_queue_clear (&stream->protection_scheme_event_queue); ++ if (stream->default_kid) ++ gst_buffer_unref (stream->default_kid); + gst_qtdemux_stream_flush_segments_data (qtdemux, stream); + gst_qtdemux_stream_flush_samples_data (qtdemux, stream); + } +@@ -2663,6 +2695,18 @@ qtdemux_parse_piff (GstQTDemux * qtdemux, const guint8 * buffer, gint length, + } else if ((flags & 0x000002)) { + uses_sub_sample_encryption = TRUE; + } ++ // In the case of smooth streaming, we never get moov boxes and their ++ // default encryption metadata. Instead, the demuxer has to parse this ++ // information out of the playready specific payloads and make it availble ++ // somehow to us. ++ if (!gst_structure_has_field (ss_info->default_properties, "kid")) { ++ if (!stream->default_kid) { ++ GST_WARNING_OBJECT (qtdemux, "No available key id for sample"); ++ } else { ++ gst_structure_set (ss_info->default_properties, "kid", GST_TYPE_BUFFER, ++ stream->default_kid, NULL); ++ } ++ } + + if (!gst_byte_reader_get_uint32_be (&br, &qtdemux->cenc_aux_sample_count)) { + GST_ERROR_OBJECT (qtdemux, "Error getting box's sample count field"); +@@ -5418,16 +5462,19 @@ gst_qtdemux_decorate_and_push_buffer (GstQTDemux * qtdemux, + } + + if (info->crypto_info == NULL) +- GST_DEBUG_OBJECT (qtdemux, "cenc metadata hasn't been parsed yet, pushing buffer as if it wasn't encrypted"); ++ GST_DEBUG_OBJECT (qtdemux, ++ "cenc metadata hasn't been parsed yet, pushing buffer as if it wasn't encrypted"); + else { +- index = stream->sample_index - (stream->n_samples - info->crypto_info->len); ++ index = ++ stream->sample_index - (stream->n_samples - info->crypto_info->len); + if (G_LIKELY (index >= 0 && index < info->crypto_info->len)) { + /* steal structure from array */ + crypto_info = g_ptr_array_index (info->crypto_info, index); + g_ptr_array_index (info->crypto_info, index) = NULL; + GST_LOG_OBJECT (qtdemux, "attaching cenc metadata [%u]", index); + if (!crypto_info || !gst_buffer_add_protection_meta (buf, crypto_info)) +- GST_ERROR_OBJECT (qtdemux, "failed to attach cenc metadata to buffer"); ++ GST_ERROR_OBJECT (qtdemux, ++ "failed to attach cenc metadata to buffer"); + } + } + } +@@ -8968,7 +9015,7 @@ done: + + /* push based does not handle segments, so act accordingly here, + * and warn if applicable */ +- if (!qtdemux->pullbased /* && !allow_pushbased_edts */) { ++ if (!qtdemux->pullbased /* && !allow_pushbased_edts */ ) { + GST_WARNING_OBJECT (qtdemux, "streaming; discarding edit list segments"); + /* remove and use default one below, we stream like it anyway */ + g_free (stream->segments); +-- +2.17.1 + From 8c7bdf0799a8361263986bda361d09bf25edafa8 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:07:22 +0200 Subject: [PATCH 251/614] [cdmi][clearkey] bump to latest version --- .../wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk index 055a60021d39..2f4da0980764 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_CLEARKEY_VERSION = 5ef8fc0c40d7c6dbe8344c93f20d3b25f5c39135 +WPEFRAMEWORK_CDMI_CLEARKEY_VERSION = e931c530883a46fb7e8f33b4ff7e841ab1762fb7 WPEFRAMEWORK_CDMI_CLEARKEY_SITE_METHOD = git WPEFRAMEWORK_CDMI_CLEARKEY_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Clearkey.git WPEFRAMEWORK_CDMI_CLEARKEY_INSTALL_STAGING = YES From 1418ce6f7ae2fabfc02de02c80d1dce1b5e8bbfe Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:07:57 +0200 Subject: [PATCH 252/614] [cdmi][pr-nexus] bump to latest version --- .../wpeframework-cdmi-playready-nexus.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk index 38aff267abef..65acdf12fa89 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_VERSION = d13d7e3cde6a8c4d9c8df85d51d75ed5e63e2e00 +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_VERSION = 65c2596207f69552111e5dd14629fac8943ccbf6 WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_INSTALL_STAGING = YES From 5e994d4219d4cbac1721f3ce4fd623bde37a5ceb Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:08:31 +0200 Subject: [PATCH 253/614] [cdmi][playready] bump to latest version --- .../wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk index 7e5bbba3ed6d..4e9a41379d9e 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VERSION = 089818c9f6db7cb0a8f7de9a4912a14fbd5f28dc +WPEFRAMEWORK_CDMI_PLAYREADY_VERSION = 078a10864b7bec277c3b5b18cc990bd43d2b0327 WPEFRAMEWORK_CDMI_PLAYREADY_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready.git WPEFRAMEWORK_CDMI_PLAYREADY_INSTALL_STAGING = YES From 7c344ffbf33943f9989e09b92b72cb47dc06aa54 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:08:50 +0200 Subject: [PATCH 254/614] [cdmi][widevine] bump to latest version --- .../wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk index f2dbb4eb8c14..8e3b4e4e25af 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = 0684a8564943a6f3b5fa5e07066f2d6a1059a3d6 +WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = e98b76aa8802dc9bd9dbdb1dd23613172d934fb5 WPEFRAMEWORK_CDMI_WIDEVINE_SITE_METHOD = git WPEFRAMEWORK_CDMI_WIDEVINE_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Widevine.git WPEFRAMEWORK_CDMI_WIDEVINE_INSTALL_STAGING = NO From 47c6707528bfe8708da1bdabb6a794a11f2c343a Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:09:15 +0200 Subject: [PATCH 255/614] [dialserver] bump to latest version --- .../wpeframework-dialserver/wpeframework-dialserver.mk | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk index cae1c5879d35..b3a05f53067c 100644 --- a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk +++ b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk @@ -1,4 +1,10 @@ -WPEFRAMEWORK_DIALSERVER_VERSION = 996317ec8abb9fbd9a96e6f0797fdbefd3b0f3bb +################################################################################ +# +# wpeframework-dialserver +# +################################################################################ + +WPEFRAMEWORK_DIALSERVER_VERSION = d9766822925b8f2cceafb08b4460826c2ba9d709 WPEFRAMEWORK_DIALSERVER_SITE_METHOD = git WPEFRAMEWORK_DIALSERVER_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginDIAL.git WPEFRAMEWORK_DIALSERVER_INSTALL_STAGING = YES From b4390168390ab9fc4063dea6938815e4739841f9 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:09:34 +0200 Subject: [PATCH 256/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 6bdabbfa2f80..effd21e83e4a 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 9b495a733fd71675da8feb3adbda9af2f38edef1 +WPEFRAMEWORK_VERSION = 6d1a615e514c2b447f3c55da19110ad3fbd6b73f WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 7ffa38c0911d1cf30c205dd73b832eb87ac994bc Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:09:49 +0200 Subject: [PATCH 257/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 694db6d3f74a..9f5967c7835e 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 06798236f6b6cf8f105dc28803dd6de80f270961 +WPEFRAMEWORK_PLUGINS_VERSION = fca316d03b53755e355d45677ffa95cd3f2f3675 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From db5c9e27591b03e2546d0ff31bb6bc695ae05a6d Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:10:07 +0200 Subject: [PATCH 258/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index cf5b5ea98f60..12949825b3a4 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = eb28ebcaae03738a74e7bd143055a936c00de2bb +WPEFRAMEWORK_UI_VERSION = c0b3857405947d443313cb875160d0828ad0448c WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From f05a86ee184d8b029070ee8dc141c1ad5fa06542 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:10:43 +0200 Subject: [PATCH 259/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 70aab78efaa0..e6eff5c9bfb6 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = 200a16b241ff0c6a73e239c45345057d011f0193 +WPEWEBKIT_VERSION_VALUE = 962747d5243b0be20b8a965ba918953e152e2318 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From d189bb79a4f52d62f0eb696615111231ded52009 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 29 Jun 2018 17:15:38 +0200 Subject: [PATCH 260/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index e6eff5c9bfb6..46446fc8c25a 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = 962747d5243b0be20b8a965ba918953e152e2318 +WPEWEBKIT_VERSION_VALUE = a0f5a8b284ad480b2c4b2769bc68ccd9feddc26e endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From f554c518a97df26e6af833708fe83ac0e35d7eaf Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Mon, 2 Jul 2018 09:25:42 +0200 Subject: [PATCH 261/614] [NETFLIX5] Bumps netflix5 - Removes unneeded dependencies - No longer always build in debug - Completes installation of library + required files --- package/netflix5/Config.in | 5 ----- package/netflix5/netflix5.mk | 24 +++++++++++++++++++----- 2 files changed, 19 insertions(+), 10 deletions(-) diff --git a/package/netflix5/Config.in b/package/netflix5/Config.in index d9de0a8163a9..e6b1db2e2fde 100644 --- a/package/netflix5/Config.in +++ b/package/netflix5/Config.in @@ -12,12 +12,7 @@ config BR2_PACKAGE_NETFLIX5 select BR2_PACKAGE_C_ARES select BR2_PACKAGE_LIBCURL select BR2_PACKAGE_GRAPHITE2 - select BR2_PACKAGE_LIBVPX - select BR2_PACKAGE_TREMOR - select BR2_PACKAGE_LIBVORBIS - select BR2_PACKAGE_LIBOGG select BR2_PACKAGE_NGHTTP2 - select BR2_PACKAGE_FFMPEG help Netflix5 diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 6257ce8034b2..0812b4d61e1e 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,12 +4,11 @@ # ################################################################################ -NETFLIX5_VERSION = 59992602fde52e21c33934010bbffe6348962c78 +NETFLIX5_VERSION = 40024f8efef90c22ca0d7e86256aaec0edd321a4 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY -# TODO: check if all deps are really needed, e.g. decoders once gstreamer sink is selected -NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 libvpx tremor libvorbis libogg nghttp2 ffmpeg wpeframework +NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework playready gst1-plugins-base NETFLIX5_INSTALL_TARGET = YES NETFLIX5_INSTALL_STAGING = YES NETFLIX5_SUBDIR = netflix @@ -20,7 +19,6 @@ NETFLIX_CONF_ENV += TARGET_CROSS="$(GNU_TARGET_NAME)-" # TODO: disable hardcoded build type, check if all args are really needed. NETFLIX5_CONF_OPTS = \ - -DCMAKE_BUILD_TYPE=Debug \ -DBUILD_DPI_DIRECTORY=$(@D)/partner/dpi \ -DCMAKE_INSTALL_PREFIX=$(@D)/release \ -DCMAKE_OBJCOPY="$(TARGET_CROSS)objcopy" \ @@ -37,7 +35,9 @@ NETFLIX5_CONF_OPTS = \ -DDPI_SINK_INTERFACE_IMPLEMENTATION=gstreamer \ -DBUILD_DEBUG=OFF -DNRDP_HAS_GIBBON_QA=ON -DNRDP_HAS_MUTEX_STACK=ON -DNRDP_HAS_OBJECTCOUNT=ON \ -DBUILD_PRODUCTION=OFF -DNRDP_HAS_QA=ON -DBUILD_SMALL=OFF -DBUILD_SYMBOLS=ON -DNRDP_HAS_TRACING=OFF \ - -DNRDP_CRASH_REPORTING=breakpad + -DNRDP_CRASH_REPORTING=breakpad \ + -DNRDP_HAS_AUDIOMIXER=OFF \ + -DDPI_SINK_INTERFACE_OVERRIDE_APPBOOT=ON ifeq ($(BR2_PACKAGE_NETFLIX5_LIB), y) NETFLIX5_CONF_OPTS += -DGIBBON_MODE=shared @@ -245,10 +245,24 @@ define NETFLIX5_INSTALL_STAGING_CMDS find output/staging/usr/include/netflix/nrdbase/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; find output/staging/usr/include/netflix/nrd/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; find output/staging/usr/include/netflix/nrdnet/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + + mkdir -p $(TARGET_DIR)/root/Netflix + cp -r $(@D)/netflix/src/platform/gibbon/resources/gibbon/fonts $(TARGET_DIR)/root/Netflix + cp -r $(@D)/netflix/resources/etc $(TARGET_DIR)/root/Netflix + mkdir -p $(TARGET_DIR)/root/Netflix/etc/conf + cp -r $(@D)/netflix/src/platform/gibbon/resources/configuration/* $(TARGET_DIR)/root/Netflix/etc/conf + cp -r $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu $(TARGET_DIR)/root/Netflix + cp -r $(@D)/netflix/src/platform/gibbon/resources $(TARGET_DIR)/root/Netflix + cp -r $(@D)/netflix/resources/configuration/* $(TARGET_DIR)/root/Netflix/etc/conf + cp $(@D)/partner/graphics/nexus/graphics.xml $(TARGET_DIR)/root/Netflix/etc/conf + cp $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu/icudt58l/debug/unames.icu $(TARGET_DIR)/root/Netflix/icu/icudt58l + cp $(@D)/netflix/src/platform/gibbon/*.js* $(TARGET_DIR)/root/Netflix/resources/js + cp $(@D)/netflix/src/platform/gibbon/resources/default/PartnerBridge.js $(TARGET_DIR)/root/Netflix/resources/js endef define NETFLIX5_INSTALL_TARGET_CMDS $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/libnetflix.so $(TARGET_DIR)/usr/lib + $(STRIPCMD) $(TARGET_DIR)/usr/lib/libnetflix.so endef else From 8a16bcf46c6d0fbcc1a1ab6458de160c75700e2a Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 09:41:25 +0200 Subject: [PATCH 262/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 9f5967c7835e..6942918673c9 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = fca316d03b53755e355d45677ffa95cd3f2f3675 +WPEFRAMEWORK_PLUGINS_VERSION = 13f3ee7ed67a4907cd49597050ce1ccce8738d85 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From f11cf1e0dd77d8d69ade8867bc491d35ed26836e Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 09:41:48 +0200 Subject: [PATCH 263/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 46446fc8c25a..2f7bfd1f07d0 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = a0f5a8b284ad480b2c4b2769bc68ccd9feddc26e +WPEWEBKIT_VERSION_VALUE = cefb55942ddf6cf9cfdd788284b4bae554dba71f endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From cc03d415bd056d1661dcaa498e56f5800ab05502 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 10:30:40 +0200 Subject: [PATCH 264/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index effd21e83e4a..b82ac9c805fc 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 6d1a615e514c2b447f3c55da19110ad3fbd6b73f +WPEFRAMEWORK_VERSION = be047c9e599cde1e859df51d0c690c7c1f78bc06 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From ab25b7becfbf12f462cc7ec7a53b8ebf271e7797 Mon Sep 17 00:00:00 2001 From: Carlos Garcia Campos Date: Mon, 2 Jul 2018 10:49:27 +0200 Subject: [PATCH 265/614] [libsoup] Fix cookies limit patch The patch was for a newer version of libsoup that uses a different way to get the GObject private structure. Also add the patch to set a limit of the cookie size. --- ...add-API-to-set-a-limit-of-cookies-in.patch | 23 ++++---- ...cookie-jar-limit-the-cookie-size-too.patch | 53 +++++++++++++++++++ 2 files changed, 65 insertions(+), 11 deletions(-) create mode 100644 package/libsoup/0002-soup-cookie-jar-limit-the-cookie-size-too.patch diff --git a/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch b/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch index 6fa1a527b13c..746c7375f398 100644 --- a/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch +++ b/package/libsoup/0001-soup-cookie-jar-add-API-to-set-a-limit-of-cookies-in.patch @@ -1,7 +1,8 @@ -From 8bbfc986086dd74bd512ed481e412b6ffc86ae71 Mon Sep 17 00:00:00 2001 +From 19e02587185eb53e37faf16b8d6bfe08955742b5 Mon Sep 17 00:00:00 2001 From: Carlos Garcia Campos Date: Thu, 17 May 2018 08:18:33 +0200 -Subject: [PATCH] soup-cookie-jar: add API to set a limit of cookies in a jar +Subject: [PATCH 1/2] soup-cookie-jar: add API to set a limit of cookies in a + jar --- libsoup/soup-cookie-jar.c | 25 ++++++++++++++++++++++++- @@ -9,19 +10,19 @@ Subject: [PATCH] soup-cookie-jar: add API to set a limit of cookies in a jar 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/libsoup/soup-cookie-jar.c b/libsoup/soup-cookie-jar.c -index 2369c8a7..5c1570a3 100644 +index d12bc85a..a4d14a81 100644 --- a/libsoup/soup-cookie-jar.c +++ b/libsoup/soup-cookie-jar.c -@@ -50,6 +50,8 @@ typedef struct { +@@ -55,6 +55,8 @@ typedef struct { GHashTable *domains, *serials; guint serial; SoupCookieJarAcceptPolicy accept_policy; + guint64 n_cookies; + guint64 limit; } SoupCookieJarPrivate; + #define SOUP_COOKIE_JAR_GET_PRIVATE(o) (G_TYPE_INSTANCE_GET_PRIVATE ((o), SOUP_TYPE_COOKIE_JAR, SoupCookieJarPrivate)) - static void soup_cookie_jar_session_feature_init (SoupSessionFeatureInterface *feature_interface, gpointer interface_data); -@@ -234,6 +236,18 @@ soup_cookie_jar_new (void) +@@ -233,6 +235,18 @@ soup_cookie_jar_new (void) return g_object_new (SOUP_TYPE_COOKIE_JAR, NULL); } @@ -33,16 +34,16 @@ index 2369c8a7..5c1570a3 100644 + + g_return_if_fail (SOUP_IS_COOKIE_JAR (jar)); + -+ priv = soup_cookie_jar_get_instance_private (jar); ++ priv = SOUP_COOKIE_JAR_GET_PRIVATE (jar); + priv->limit = limit; +} + /** * soup_cookie_jar_save: * @jar: a #SoupCookieJar -@@ -258,10 +272,13 @@ soup_cookie_jar_changed (SoupCookieJar *jar, +@@ -257,10 +271,13 @@ soup_cookie_jar_changed (SoupCookieJar *jar, { - SoupCookieJarPrivate *priv = soup_cookie_jar_get_instance_private (jar); + SoupCookieJarPrivate *priv = SOUP_COOKIE_JAR_GET_PRIVATE (jar); - if (old && old != new) + if (old && old != new) { @@ -55,7 +56,7 @@ index 2369c8a7..5c1570a3 100644 g_hash_table_insert (priv->serials, new, GUINT_TO_POINTER (priv->serial)); } -@@ -499,6 +516,12 @@ soup_cookie_jar_add_cookie (SoupCookieJar *jar, SoupCookie *cookie) +@@ -498,6 +515,12 @@ soup_cookie_jar_add_cookie (SoupCookieJar *jar, SoupCookie *cookie) return; } @@ -83,5 +84,5 @@ index e77f8ab3..48256b16 100644 SoupURI *uri, gboolean for_http); -- -2.17.0 +2.18.0 diff --git a/package/libsoup/0002-soup-cookie-jar-limit-the-cookie-size-too.patch b/package/libsoup/0002-soup-cookie-jar-limit-the-cookie-size-too.patch new file mode 100644 index 000000000000..f554c2335e15 --- /dev/null +++ b/package/libsoup/0002-soup-cookie-jar-limit-the-cookie-size-too.patch @@ -0,0 +1,53 @@ +From dc43066b74c8327800c94bbb301bf89fc5027ee8 Mon Sep 17 00:00:00 2001 +From: Carlos Garcia Campos +Date: Mon, 2 Jul 2018 07:40:52 +0200 +Subject: [PATCH 2/2] soup-cookie-jar: limit the cookie size too + +--- + libsoup/soup-cookie-jar.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/libsoup/soup-cookie-jar.c b/libsoup/soup-cookie-jar.c +index a4d14a81..e28e4153 100644 +--- a/libsoup/soup-cookie-jar.c ++++ b/libsoup/soup-cookie-jar.c +@@ -60,6 +60,8 @@ typedef struct { + } SoupCookieJarPrivate; + #define SOUP_COOKIE_JAR_GET_PRIVATE(o) (G_TYPE_INSTANCE_GET_PRIVATE ((o), SOUP_TYPE_COOKIE_JAR, SoupCookieJarPrivate)) + ++#define MAX_COOKIE_SIZE 102400 /* 100K */ ++ + static void + soup_cookie_jar_init (SoupCookieJar *jar) + { +@@ -449,6 +451,15 @@ soup_cookie_jar_get_cookie_list (SoupCookieJar *jar, SoupURI *uri, gboolean for_ + return get_cookies (jar, uri, for_http, TRUE); + } + ++static unsigned cookie_size (SoupCookie *cookie) ++{ ++ /* Consider name, value, domain and path only for the size */ ++ return (cookie->name ? strlen(cookie->name) : 0) + ++ (cookie->value ? strlen(cookie->value) : 0) + ++ (cookie->domain ? strlen(cookie->domain) : 0) + ++ (cookie->path ? strlen(cookie->path) : 0); ++} ++ + /** + * soup_cookie_jar_add_cookie: + * @jar: a #SoupCookieJar +@@ -479,6 +490,11 @@ soup_cookie_jar_add_cookie (SoupCookieJar *jar, SoupCookie *cookie) + return; + } + ++ if (cookie_size (cookie) > MAX_COOKIE_SIZE) { ++ g_warning ("Trying to add a cookie for domain '%s', bigger than maximum allowed size %d, ignoring it", cookie->domain, MAX_COOKIE_SIZE); ++ return; ++ } ++ + priv = SOUP_COOKIE_JAR_GET_PRIVATE (jar); + old_cookies = g_hash_table_lookup (priv->domains, cookie->domain); + for (oc = old_cookies; oc; oc = oc->next) { +-- +2.18.0 + From eb26090f43eef3599227000b7a085b81e60fddf0 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 11:37:00 +0200 Subject: [PATCH 266/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 6942918673c9..357337f301b7 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 13f3ee7ed67a4907cd49597050ce1ccce8738d85 +WPEFRAMEWORK_PLUGINS_VERSION = 566c13393bf52dd0acb5c741ee7166341249b61f WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 5c1392bc42f4e20d0c0859f214ad2c22be7f50b8 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 11:37:17 +0200 Subject: [PATCH 267/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 12949825b3a4..626508620019 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = c0b3857405947d443313cb875160d0828ad0448c +WPEFRAMEWORK_UI_VERSION = 1f1806ae3a891e650bec84293350b0518a132d9f WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From 53c72a33ba96c4836628f4a8d13bf6a0f6edea94 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 2 Jul 2018 12:35:47 +0200 Subject: [PATCH 268/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 2f7bfd1f07d0..7f737b690520 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = cefb55942ddf6cf9cfdd788284b4bae554dba71f +WPEWEBKIT_VERSION_VALUE = f0307c3763d8a82e97ea80f971737c45c0bac36c endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From c37037ce702ecf65116b380468433ba4beb073f1 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 3 Jul 2018 23:22:19 +0200 Subject: [PATCH 269/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 357337f301b7..03f4fceed7ab 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 566c13393bf52dd0acb5c741ee7166341249b61f +WPEFRAMEWORK_PLUGINS_VERSION = 499183c2d2baf604a2662e3685b484174750840e WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 132f37e82cb43ffacb7204934a922378ee28a92e Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 4 Jul 2018 01:09:27 +0200 Subject: [PATCH 270/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 7f737b690520..a5ff12974c1c 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = f0307c3763d8a82e97ea80f971737c45c0bac36c +WPEWEBKIT_VERSION_VALUE = 03b02e8888ce87af850a76500a0ca38961dd5d20 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 5f9493e5a0e571a05ccf2d319bfd368d218912e5 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 4 Jul 2018 10:35:14 +0200 Subject: [PATCH 271/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 626508620019..cdbabf453397 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 1f1806ae3a891e650bec84293350b0518a132d9f +WPEFRAMEWORK_UI_VERSION = e28398918ba92e4f54b6430c7f705d11d4e033ca WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From 7be99d39cb1a63d6cfb01be7c63934a461a3efe4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Wed, 4 Jul 2018 14:13:44 +0000 Subject: [PATCH 272/614] gst1-plugins-bad: mssdemux: Fix for SmoothStreaming crash --- ...sdemux-Fix-for-SmoothStreaming-crash.patch | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0013-mssdemux-Fix-for-SmoothStreaming-crash.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0013-mssdemux-Fix-for-SmoothStreaming-crash.patch b/package/gstreamer1/gst1-plugins-bad/0013-mssdemux-Fix-for-SmoothStreaming-crash.patch new file mode 100644 index 000000000000..06ed8f6feee3 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0013-mssdemux-Fix-for-SmoothStreaming-crash.patch @@ -0,0 +1,61 @@ +From fa7e224a2c8c24c169e6d6f0bf49c805be0baeb5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= +Date: Wed, 4 Jul 2018 13:54:07 +0000 +Subject: [PATCH] mssdemux: Fix for SmoothStreaming crash + +--- + ext/smoothstreaming/gstmssdemux.c | 2 +- + ext/smoothstreaming/gstmssfragmentparser.c | 10 +++++++++- + 2 files changed, 10 insertions(+), 2 deletions(-) + +diff --git a/ext/smoothstreaming/gstmssdemux.c b/ext/smoothstreaming/gstmssdemux.c +index 26147fd..3f18b4d 100644 +--- a/ext/smoothstreaming/gstmssdemux.c ++++ b/ext/smoothstreaming/gstmssdemux.c +@@ -720,7 +720,7 @@ gst_mss_demux_data_received (GstAdaptiveDemux * demux, + + available = gst_adapter_available (mssstream->adapter); + // FIXME: try to reduce this minimal size. +- if (available < 4096) { ++ if (available < 8192) { + return GST_FLOW_OK; + } else { + // We use here the accumulated buffer from the adapter instead o the +diff --git a/ext/smoothstreaming/gstmssfragmentparser.c b/ext/smoothstreaming/gstmssfragmentparser.c +index 7de9947..62c505b 100644 +--- a/ext/smoothstreaming/gstmssfragmentparser.c ++++ b/ext/smoothstreaming/gstmssfragmentparser.c +@@ -139,6 +139,7 @@ gst_mss_fragment_parser_add_buffer (GstMssFragmentParser * parser, + GstMapInfo info; + guint32 size; + guint32 fourcc; ++ guint32 remaining; + const guint8 *uuid; + gboolean error = FALSE; + gboolean mdat_box_found = FALSE; +@@ -194,7 +195,8 @@ gst_mss_fragment_parser_add_buffer (GstMssFragmentParser * parser, + } + + while (!mdat_box_found) { +- GST_TRACE ("remaining data: %u", gst_byte_reader_get_remaining (&reader)); ++ remaining = gst_byte_reader_get_remaining (&reader); ++ GST_TRACE ("remaining data: %u", remaining); + if (!gst_byte_reader_get_uint32_be (&reader, &size)) { + GST_WARNING ("Failed to get box size, enough data?"); + error = TRUE; +@@ -210,6 +212,12 @@ gst_mss_fragment_parser_add_buffer (GstMssFragmentParser * parser, + break; + } + ++ if (size - 8 > remaining) { ++ GST_WARNING ("Not enough buffered data for parsing, try to raise the limit in gst_mss_demux_data_received()"); ++ error = TRUE; ++ break; ++ } ++ + if (fourcc != GST_MSS_FRAGMENT_FOURCC_UUID) { + GST_TRACE ("%" GST_FOURCC_FORMAT " box, skipping", GST_FOURCC_ARGS(fourcc)); + gst_byte_reader_skip_unchecked (&reader, size - 8); +-- +1.8.3.2 + From ab0508ba0488c87e5e8dfc09d91b47268e3d16c7 Mon Sep 17 00:00:00 2001 From: Srinivas Kakarla Date: Thu, 5 Jul 2018 20:02:25 +0530 Subject: [PATCH 273/614] Added westeros-sink support in the Playgiga client config --- package/playgiga/playgiga.mk | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/package/playgiga/playgiga.mk b/package/playgiga/playgiga.mk index 25da027e3e64..d78dc7d6b6e4 100644 --- a/package/playgiga/playgiga.mk +++ b/package/playgiga/playgiga.mk @@ -4,27 +4,40 @@ # ################################################################################ -PLAYGIGA_VERSION = 897d0e9bbd1eef86554599c03a817d0d8c8c5c84 +PLAYGIGA_VERSION = 6386e7ff7eabb4835da4c62ecfe4f5dd83521fea PLAYGIGA_SITE_METHOD = git PLAYGIGA_SITE = https://github.com/Metrological/playgiga PLAYGIGA_INSTALL_STAGING = YES -PLAYGIGA_DEPENDENCIES = host-cmake gstreamer1 gst1-plugins-base gst1-plugins-good gst1-plugins-bad libcurl opus - -export BUILDROOT_HOST_PATH=$(HOST_DIR) +PLAYGIGA_DEPENDENCIES = host-cmake gstreamer1 gst1-plugins-base \ + gst1-plugins-good gst1-plugins-bad libcurl opus PLATFORM_DIR = wpe +ifeq ($(BR2_PACKAGE_WESTEROS),y) +PLAYGIGA_DEPENDENCIES += westeros +ifeq ($(BR2_PACKAGE_WESTEROS_SINK),y) +PLAYGIGA_DEPENDENCIES += westeros-sink +PLAYGIGA_FLAGS += -DUSE_WESTEROS_SINK:BOOL=ON +else +PLAYGIGA_FLAGS += -DUSE_WESTEROS_SINK:BOOL=OFF +endif +endif + +PLAYGIGA_CONF_OPTS = \ + $(PLAYGIGA_FLAGS) + define PLAYGIGA_INSTALL_IMAGE - cp -a $(@D)/$(PLATFORM_DIR)/bin/pgclient $(TARGET_DIR)/usr/bin + cp -a $(@D)/$(PLATFORM_DIR)/bin/pgclient $(TARGET_DIR)/usr/bin endef define PLAYGIGA_BUILD_CMDS - $(BUILDROOT_HOST_PATH)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt -DBUILDROOT_HOST_PATH=$(BUILDROOT_HOST_PATH) - $(MAKE) -C $(@D)/$(PLATFORM_DIR) + $(HOST_DIR)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt \ + -DBUILDROOT_HOST_PATH=$(HOST_DIR) $(PLAYGIGA_CONF_OPTS) + $(MAKE) -C $(@D)/$(PLATFORM_DIR) endef define PLAYGIGA_INSTALL_TARGET_CMDS - $(call PLAYGIGA_INSTALL_IMAGE) + $(call PLAYGIGA_INSTALL_IMAGE) endef $(eval $(generic-package)) From e134a852d31cd85a0bd5274c27c82bf3b0c25dab Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Sat, 7 Jul 2018 15:57:04 +0200 Subject: [PATCH 274/614] [NETFLIX5] Bumps Netflix5 --- package/netflix5/netflix5.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 0812b4d61e1e..9b26e2426841 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,7 +4,7 @@ # ################################################################################ -NETFLIX5_VERSION = 40024f8efef90c22ca0d7e86256aaec0edd321a4 +NETFLIX5_VERSION = d3208dc8eb9b6e4c1586db00ee975150a49d0bb8 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY From 779082bda02d576bb1a0fe4e4af4cc67467415c8 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Mon, 9 Jul 2018 19:20:45 +0200 Subject: [PATCH 275/614] [greenpeak] refactored archive --- package/greenpeak/Config.in | 35 +++++------ package/greenpeak/greenpeak.mk | 110 +++++++++++++-------------------- 2 files changed, 60 insertions(+), 85 deletions(-) diff --git a/package/greenpeak/Config.in b/package/greenpeak/Config.in index 2e0d816e4b0b..0463d26ced29 100644 --- a/package/greenpeak/Config.in +++ b/package/greenpeak/Config.in @@ -1,28 +1,29 @@ config BR2_PACKAGE_GREENPEAK bool "greenpeak" - depends on BR2_arm help Greenpeak kernel drivers. if BR2_PACKAGE_GREENPEAK -config BR2_PACKAGE_GREENPEAK_USERLANDLIB +config BR2_PACKAGE_GREENPEAK_KERNEL_MODULE + bool "kernel module" + help + Build the kernel module + +config BR2_PACKAGE_GREENPEAK_LIB bool "userland library" help Build a Rf4ce library for use by appplications working with the greenpeak chip in stead of building an application that reads keys from an Rf4ce remote and ingest them into the linux input system. - -config BR2_PACKAGE_GREENPEAK_TEST_TOOLS - bool "test tools" - help - Build a few test tool for greenpeak module. - -config BR2_PACKAGE_GREENPEAK_RPI_FIRMWARE - bool "Install GreenPeak RPi firmware" + +config BR2_PACKAGE_GREENPEAK_DEVICE_NODE_PATH + string "device node" + default /dev/gpK5 if BR2_PACKAGE_GREENPEAK_GP501 || BR2_PACKAGE_GREENPEAK_GP510 || BR2_PACKAGE_GREENPEAK_GP711 + default /dev/gpK7C if BR2_PACKAGE_GREENPEAK_GP502 || BR2_PACKAGE_GREENPEAK_GP712 help - Overwrite current firmware with GreenPeak RPi compatible firmware. + Full path to the greenpeak device node that is on the system. choice prompt "Greenpeak Type" @@ -30,18 +31,15 @@ choice help Select the version of uClibc you wish to use. - config BR2_PACKAGE_GREENPEAK_GP500 - bool "GP500" - config BR2_PACKAGE_GREENPEAK_GP501 bool "GP501" + config BR2_PACKAGE_GREENPEAK_GP502 + bool "GP502" + config BR2_PACKAGE_GREENPEAK_GP510 bool "GP510" - config BR2_PACKAGE_GREENPEAK_GP710 - bool "GP710" - config BR2_PACKAGE_GREENPEAK_GP711 bool "GP711" @@ -52,10 +50,9 @@ endchoice config BR2_PACKAGE_GREENPEAK_TYPE string - default GP500 if BR2_PACKAGE_GREENPEAK_GP500 default GP501 if BR2_PACKAGE_GREENPEAK_GP501 + default GP502 if BR2_PACKAGE_GREENPEAK_GP502 default GP510 if BR2_PACKAGE_GREENPEAK_GP510 - default GP710 if BR2_PACKAGE_GREENPEAK_GP710 default GP711 if BR2_PACKAGE_GREENPEAK_GP711 default GP712 if BR2_PACKAGE_GREENPEAK_GP712 diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index 23cf48ea77db..29411fc2ea2c 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -3,56 +3,45 @@ # greenpeak rf4ce # ################################################################################ -GREENPEAK_VERSION = 63da7153b7d484b877b7b22bec6c5b32fc4c9da9 +GREENPEAK_CHIP = $(call qstrip,$(BR2_PACKAGE_GREENPEAK_TYPE)) GREENPEAK_SITE_METHOD = git GREENPEAK_SITE = git@github.com:Metrological/greenpeak.git -GREENPEAK_DEPENDENCIES = linux rpi-firmware - -GREENPEAK_CHIP = $(call qstrip,$(BR2_PACKAGE_GREENPEAK_TYPE)) +GREENPEAK_DEPENDENCIES = linux +GREENPEAK_INSTALL_STAGING = YES +GREENPEAK_REPO_VERSION = 1.0 -ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) -GREENPEAK_DEPENDENCIES += rpi-firmware +ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) + GREENPEAK_PLATFORM = brcm +else ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) + GREENPEAK_PLATFORM = rpi +else + $(error "Chosen platform is not supported.") endif -ifeq ($(BR2_PACKAGE_GREENPEAK_USERLANDLIB),y) -GREENPEAK_ARTIFACT = libRf4ce.a -GREENPEAK_INSTALL_STAGING = YES - -ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) -define GREENPEAK_INSTALL_DTS - $(INSTALL) -D -m 0644 $(@D)/devicetree/gp501.dtbo $(BINARIES_DIR)/rpi-firmware/overlays/ -endef +ifneq (,$(findstring $(GREENPEAK_CHIP), GP501 GP510 GP711)) + GREENPEAK_CHIP_REPO = gp501 +else ifneq (,$(findstring $(GREENPEAK_CHIP), GP502 GP712)) + GREENPEAK_CHIP_REPO = gp712 +else + $(error "Chip ${GREENPEAK_CHIP} is not supported.") endif -define GREENPEAK_INSTALL_STAGING_CMDS - $(INSTALL) -d -m 755 $(STAGING_DIR)/usr/include/greenpeak - $(INSTALL) -D -m 0644 $(@D)/ZRCTarget_GP501_RPi/libRf4ce.a $(STAGING_DIR)/usr/lib/ - $(INSTALL) -D -m 0644 $(@D)/ZRCTarget_GP501_RPi/code/Work/ZRCTarget_GP501_RPi/libZRCTarget_GP501_RPi.a $(STAGING_DIR)/usr/lib/libGP501.a - $(INSTALL) -D package/greenpeak/rf4ce.pc $(STAGING_DIR)/usr/lib/pkgconfig/rf4ce.pc - cp -r $(@D)/ZRCTarget_GP501_RPi/code/BaseComps/v2.4.5.2/comps/* $(STAGING_DIR)/usr/include/greenpeak; - cp -r $(@D)/ZRCTarget_GP501_RPi/code/BaseComps/v2.4.5.2/inc/* $(STAGING_DIR)/usr/include/greenpeak; -endef +GREENPEAK_VERSION = ${GREENPEAK_CHIP_REPO}_${GREENPEAK_PLATFORM}_${ARCH}_${GREENPEAK_REPO_VERSION} -define GREENPEAK_INSTALL_TARGET_CMDS - $(INSTALL) -D -m 0755 package/greenpeak/S40greenpeak $(TARGET_DIR)/etc/init.d - $(GREENPEAK_INSTALL_MODULE) - $(GREENPEAK_INSTALL_DTS) - $(GREENPEAK_INSTALL_UEI_REF) - $(GREENPEAK_INSTALL_GREENPEAK_RPI_FIRMWARE) +ifeq ($(BR2_PACKAGE_GREENPEAK_KERNEL_MODULE),y) +GREENPEAK_EXTRA_MOD_CFLAGS = \ + -D$(GREENPEAK_CHIP) \ + +define GREENPEAK_BUILD_MODULE + $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) GP_CHIP=$(GREENPEAK_CHIP) EXTRA_CFLAGS="$(GREENPEAK_EXTRA_MOD_CFLAGS)" M=$(@D)/Driver modules endef -else - -GREENPEAK_ARTIFACT = "GP_APPLICATION=1" - -define GREENPEAK_INSTALL_TARGET_CMDS - $(INSTALL) -D -m 0755 $(@D)/ZRCTarget_GP501_RPi/Work/ZRCTarget_GP501_RPi.elf $(TARGET_DIR)/usr/bin/zrc - $(INSTALL) -D -m 0755 package/greenpeak/S40greenpeak $(TARGET_DIR)/etc/init.d - $(GREENPEAK_INSTALL_MODULE) - $(GREENPEAK_INSTALL_GREENPEAK_RPI_FIRMWARE) +define GREENPEAK_INSTALL_MODULE + $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) M=$(@D)/Driver modules_install endef endif +ifeq ($(BR2_PACKAGE_GREENPEAK_LIB),y) GREENPEAK_EXTRA_CFLAGS = \ -std=gnu99 \ -fomit-frame-pointer \ @@ -60,45 +49,34 @@ GREENPEAK_EXTRA_CFLAGS = \ -fPIC \ -ffreestanding \ -DGP_NVM_PATH=/root/gp \ - -DGP_NVM_FILENAME=/root/gp/gpNvm.dat - -GREENPEAK_EXTRA_MOD_CFLAGS = \ - -D$(GREENPEAK_CHIP) \ - -I$(@D)/driver/RPi_3_2_27 \ - -define GREENPEAK_BUILD_MODULE - $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) GP_CHIP=$(GREENPEAK_CHIP) EXTRA_CFLAGS="$(GREENPEAK_EXTRA_MOD_CFLAGS)" M=$(@D)/driver modules -endef + -DGP_NVM_FILENAME=/root/gp/gpNvm.dat + -DGP_DEVICE_PATH=${BR2_PACKAGE_GREENPEAK_DEVICE_NODE_PATH} -define GREENPEAK_INSTALL_MODULE - $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) M=$(@D)/driver modules_install +define GREENPEAK_BUILD_LIB + $(info "Building RF4CE lib") + $(MAKE1) -C $(@D)/Stack clean + COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/Stack archive endef -ifeq ($(BR2_PACKAGE_GREENPEAK_RPI_FIRMWARE),y) -define GREENPEAK_INSTALL_GREENPEAK_RPI_FIRMWARE - $(INSTALL) -D -m 0644 $(@D)/rpi-firmware/start.elf $(BINARIES_DIR)/gp-rpi-firmware/start.elf - $(INSTALL) -D -m 0644 $(@D)/rpi-firmware/fixup.dat $(BINARIES_DIR)/gp-rpi-firmware/fixup.dat - $(INSTALL) -D -m 0644 $(@D)/rpi-firmware/config.txt $(BINARIES_DIR)/gp-rpi-firmware/config.txt +define GREENPEAK_INSTALL_LIB_DEV + $(INSTALL) -m 755 -d $(1)/usr/include/qorvo + cp -a $(@D)/Stack/Work/bin/include/* $(1)/usr/include/qorvo + $(INSTALL) -m 750 -D $(@D)/Stack/Work/bin/qorvo-rf4ce.pc $(1)/usr/lib/pkgconfig/rf4ce.pc + $(INSTALL) -m 750 -D $(@D)/Stack/Work/bin/*.a $(1)/usr/lib endef endif -ifeq ($(BR2_PACKAGE_GREENPEAK_TEST_TOOLS),y) -define GREENPEAK_BUILD_UEI_REF - COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/testapp all - COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/RefTarget_ZRC_MSO_$(GREENPEAK_CHIP)_RPi all - COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/ZRCTarget_$(GREENPEAK_CHIP)_RPi "GP_APPLICATION=1" +define GREENPEAK_INSTALL_STAGING_CMDS + $(call GREENPEAK_INSTALL_LIB_DEV, $(STAGING_DIR)) endef -define GREENPEAK_INSTALL_UEI_REF - $(INSTALL) -D -m 0755 $(@D)/RefTarget_ZRC_MSO_$(GREENPEAK_CHIP)_RPi/Work/RefTarget_ZRC_MSO_GP501_RPi.elf $(TARGET_DIR)/usr/bin - $(INSTALL) -D -m 0755 $(@D)/ZRCTarget_GP501_RPi/Work/ZRCTarget_GP501_RPi.elf $(TARGET_DIR)/usr/bin - $(INSTALL) -D -m 0755 $(@D)/testapp/work/TestKernelDriver_GP501_RPi.elf $(TARGET_DIR)/usr/bin + +define GREENPEAK_INSTALL_TARGET_CMDS + $(call GREENPEAK_INSTALL_MODULE) endef -endif define GREENPEAK_BUILD_CMDS - COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/ZRCTarget_$(GREENPEAK_CHIP)_RPi ${GREENPEAK_ARTIFACT} - $(GREENPEAK_BUILD_MODULE) - $(GREENPEAK_BUILD_UEI_REF) + $(call GREENPEAK_BUILD_MODULE) + $(call GREENPEAK_BUILD_LIB) endef $(eval $(generic-package)) From 3c08df9c0ac08d6eaf86e96cd4a390e8e45bc316 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Mon, 9 Jul 2018 18:02:18 -0700 Subject: [PATCH 276/614] [TVCONTROL] Re-enable TVControl --- package/bcm-refsw/nxserver.inc | 1 + package/wpe/wpeframework-plugins/Config.in | 84 +++++++++++++++++++ .../wpeframework-plugins.mk | 34 +++++++- package/wpe/wpetvplatform-bcm/Config.in | 6 ++ .../wpetvplatform-bcm/wpetvplatform-bcm.mk | 21 +++++ 5 files changed, 142 insertions(+), 4 deletions(-) create mode 100644 package/wpe/wpetvplatform-bcm/Config.in create mode 100644 package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk diff --git a/package/bcm-refsw/nxserver.inc b/package/bcm-refsw/nxserver.inc index 4a84da0c4639..193f56337e8f 100644 --- a/package/bcm-refsw/nxserver.inc +++ b/package/bcm-refsw/nxserver.inc @@ -42,6 +42,7 @@ define BCM_REFSW_INSTALL_NXSERVER_DEV $(call BCM_REFSW_INSTALL_NXSERVER,$(STAGING_DIR)) $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/include/refsw $(INSTALL) -m 644 -D $(BCM_REFSW_BIN)/libnxserver.a $(STAGING_DIR)/usr/lib/libnxserver.a + $(INSTALL) -m 644 $(BCM_REFSW_DIR)/BSEAV/lib/mpeg2_ts_parse/ts_psi.h $(STAGING_DIR)/usr/include/refsw/ $(INSTALL) -m 644 $(BCM_REFSW_DIR)/nexus/nxclient/server/*.h $(STAGING_DIR)/usr/include/refsw/ $(INSTALL) -m 644 $(BCM_REFSW_DIR)/nexus/nxclient/include/*.h $(STAGING_DIR)/usr/include/refsw/ endef diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 14a8136e5d45..9f453f697981 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -339,4 +339,88 @@ config BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL help WifiControl Plugin for Wifi access, linked to Network Control +menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_SQLITE + select BR2_PACKAGE_DVB_APPS if BR2_PACKAGE_RPI_FIRMWARE + bool "TVControl" + help + TVControl Plugin + +if BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL +choice + bool "TVPlatform" + help + Choose TVPlatform + +menuconfig BR2_PACKAGE_TVPLATFORM_LINUXTV + bool "wpetvplatform-linuxtv" + depends on BR2_PACKAGE_DVB_APPS + help + Base library for TVPlatform Implementation for LinuxTV. + +source "package/wpe/wpetvplatform-bcm/Config.in" + +endchoice + +choice + bool "DBS Options" + default BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB + help + Choose the DBS flavor. + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB + bool "DVB" + help + Enable DVB DBS + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ATSC + select BR2_PACKAGE_DVB_APPS + bool "ATSC" + help + Enable ATSC DBS +endchoice + +if BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB + config BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ENABLE_BOUQUET_PARSING + bool "Enable Bouquet Parsing" + help + Enable Bouquet Table Parsing + +config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE + string "Country Code" + default "GBR" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the country code like + United Kingdom has 3-character code "GBR", which is coded as: + "0100 0111 0100 0010 0101 0010". + +config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID + string "Country Region ID" + default "0" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the country region id like + '0' - no time zone extension used, + '1'- time zone 1 (most easterly region)etc. +endif + +if BR2_PACKAGE_BCM_REFSW +config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM + string "Tune Param" + default "SYMBOL_RATE=6900000" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the Tuner Param, symbol rate. +endif + +config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST + string "Frequency List" + default "0" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the Frequency List for scanning in MHz using either ',' as the separator + or '-' to define the range. eg:- 354,362,370 or 354-370 +endif comment "External plugins below" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 03f4fceed7ab..996b1e22ce1e 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -177,11 +177,37 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WIFICONTROL=ON endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TUNER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TUNER=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL),y) +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += sqlite +ifeq ($(BR2_PACKAGE_RPI_FIRMWARE), y) +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += dvb-apps +endif +ifeq ($(BR2_PACKAGE_TVPLATFORM_BCM), y) +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpetvplatform-bcm +else ifeq ($(BR2_PACKAGE_TVPLATFORM_LINUXTV), y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_LINUXTV=ON +endif +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST)) + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_DVB=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID)) + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ENABLE_BOUQUET_PARSING), y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_ENABLE_BOUQUET_PARSING=true +endif + +ifeq ($(BR2_PACKAGE_BCM_REFSW), y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM)) +endif +else +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_DVB=false +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB),y) +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += dvb-apps endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_SICONTROL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_SICONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_RPCLINK),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RPCLINK=ON diff --git a/package/wpe/wpetvplatform-bcm/Config.in b/package/wpe/wpetvplatform-bcm/Config.in new file mode 100644 index 000000000000..10663508f5ac --- /dev/null +++ b/package/wpe/wpetvplatform-bcm/Config.in @@ -0,0 +1,6 @@ +menuconfig BR2_PACKAGE_WPETVPLATFORM_BCM + bool "wpetvplatform-bcm" + depends on (BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS) + help + Base library for TVPlatform Implementation for Broadcom. + diff --git a/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk new file mode 100644 index 000000000000..7785e9269a77 --- /dev/null +++ b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk @@ -0,0 +1,21 @@ +################################################################################ +# +# WPETVPlatform +# +################################################################################ + +#WPETVPLATFORM_BCM_VERSION = 83cd315a5373730abdeda7e4c06e2bd45ff6390e +#WPETVPLATFORM_BCM_SITE_METHOD = git +#WPETVPLATFORM_BCM_SITE = git@github.com:WebPlatformForEmbedded/WPETVPlatformBCM.git +WPETVPLATFORM_BCM_SITE_METHOD = local +WPETVPLATFORM_BCM_SITE = /space/metro/br/7425_TV/WPETVPlatformBCM +WPETVPLATFORM_BCM_INSTALL_STAGING = YES +WPETVPLATFORM_BCM_DEPENDENCIES = wpeframework + +WPETVPLATFORM_BCM_CONF_OPTS += -DBUILD_REFERENCE=${WPETVPLATFORM_BCM_VERSION} + +ifeq ($(BR2_PACKAGE_WPETVPLATFORM_BCM_DEBUG),y) +WPETVPLATFORM_BCM_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' +endif + +$(eval $(cmake-package)) From 2d29b652e3b44f0f3d66ed475a771977d1762584 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 10 Jul 2018 10:42:11 +0200 Subject: [PATCH 277/614] [greenpeak] Errors are only for noobie greenpeakers --- package/greenpeak/greenpeak.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index 29411fc2ea2c..1479199a7592 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -10,6 +10,7 @@ GREENPEAK_DEPENDENCIES = linux GREENPEAK_INSTALL_STAGING = YES GREENPEAK_REPO_VERSION = 1.0 +ifeq ($(BR2_PACKAGE_GREENPEAK),y) ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) GREENPEAK_PLATFORM = brcm else ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) @@ -25,6 +26,7 @@ else ifneq (,$(findstring $(GREENPEAK_CHIP), GP502 GP712)) else $(error "Chip ${GREENPEAK_CHIP} is not supported.") endif +endif GREENPEAK_VERSION = ${GREENPEAK_CHIP_REPO}_${GREENPEAK_PLATFORM}_${ARCH}_${GREENPEAK_REPO_VERSION} From fc6c04f971f9c633ee18ddd828aa1ba58e583d12 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 11 Jul 2018 17:08:03 +0200 Subject: [PATCH 278/614] [ArrisRDK] make name of the defconfig file consistent with the others --- configs/{ArrisRDK_wpe_ml_defconfig => arrisrdk_wpe_ml_defconfig} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename configs/{ArrisRDK_wpe_ml_defconfig => arrisrdk_wpe_ml_defconfig} (100%) diff --git a/configs/ArrisRDK_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig similarity index 100% rename from configs/ArrisRDK_wpe_ml_defconfig rename to configs/arrisrdk_wpe_ml_defconfig From 76f957a56daf90e5dcd40ee83bb721761af59d10 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 11 Jul 2018 17:46:42 +0200 Subject: [PATCH 279/614] [ArrisRDK] updated Config file --- configs/arrisrdk_wpe_ml_defconfig | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 39ba4f797573..6227b9eb8c93 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -9,40 +9,46 @@ BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y BR2_GLIBC_VERSION_2_23=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_TARGET_GENERIC_HOSTNAME="WPE" -BR2_TARGET_GENERIC_ISSUE="Welcome to BCM72604" +BR2_TARGET_GENERIC_ISSUE="Welcome to ArrisRDK" BR2_TARGET_GENERIC_CABUNDLE=y # BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" BR2_SYSTEM_DHCP="eth0" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="e217b1f183d2ae26bb9859c8bff5255e15fcec46" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +# BR2_PACKAGE_GST1_BCM_VP9_SUPPORT is not set BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NETFLIX=y +BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_WIDEVINE=y @@ -51,37 +57,46 @@ BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_3_RDK=y BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y +BR2_PACKAGE_NEXUS_REMOVE_OPUS=y +BR2_PACKAGE_BCM_REFSW_BOXMODE="4" # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_GRAPHITE2=y -BR2_PACKAGE_LIBMNG=y -BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="4" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE="200" BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_C_ARES=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From d8a364cb64c445e78dbe88ae81a465fdfce9f313 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 11 Jul 2018 18:16:49 +0200 Subject: [PATCH 280/614] [ArrisRDK] Update config file --- configs/arrisrdk_wpe_ml_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 6227b9eb8c93..538e338113f0 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -22,6 +22,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="e217b1f183d2ae26bb9859c8bff5255e15fcec46" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y From e526f71a653d2973aadc6c424db8594a7e0221e7 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 12 Jul 2018 16:40:11 +0200 Subject: [PATCH 281/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index b82ac9c805fc..4d67a3c6f626 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = be047c9e599cde1e859df51d0c690c7c1f78bc06 +WPEFRAMEWORK_VERSION = 9a878ca00ab3edb24973e26f72cdac468a6e5fd2 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From a1db8f03b67acb298f8424ed9925f71ea26e3f50 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 12 Jul 2018 16:40:29 +0200 Subject: [PATCH 282/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 4 ++++ package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 14a8136e5d45..04696e1e624d 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -300,6 +300,10 @@ config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER string "clientidentifier" default "" +config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING + string "threaded-painting" + default "" + endif comment "WebKitBrowser depends on WPE WebKit to be selected" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 03f4fceed7ab..4b1c9d98c8ac 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 499183c2d2baf604a2662e3685b484174750840e +WPEFRAMEWORK_PLUGINS_VERSION = 98402fba86935c73fe2cc1d44e43896c046d1448 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -155,6 +155,9 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_TRANSPAREN else WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_TRANSPARENT=false endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_THREADEDPAINTING=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING) +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON endif From 71bcee6034f12b636da1d85df33adea4c7a3c0d1 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 12 Jul 2018 16:42:20 +0200 Subject: [PATCH 283/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 4b1c9d98c8ac..5f2b2581ad46 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 98402fba86935c73fe2cc1d44e43896c046d1448 +WPEFRAMEWORK_PLUGINS_VERSION = 87bc5a391384a6a2ab60f2163ec7d7bc3dc75949 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 12602e52ae89ac0bc808fd6f429eaa5948fcdc84 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 12 Jul 2018 17:56:01 +0200 Subject: [PATCH 284/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index a5ff12974c1c..39b0173a2b68 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 else -WPEWEBKIT_VERSION_VALUE = 03b02e8888ce87af850a76500a0ca38961dd5d20 +WPEWEBKIT_VERSION_VALUE = 4f48e30f572e8f15f3b8d349e8e830c2153bc9f4 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From cb0411b3f556ecbe804bb306344abbfc5f375ad7 Mon Sep 17 00:00:00 2001 From: zak211 Date: Thu, 12 Jul 2018 10:08:50 -0700 Subject: [PATCH 285/614] [Homecast] release defconfig --- configs/homecast_wpe_defconfig | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/configs/homecast_wpe_defconfig b/configs/homecast_wpe_defconfig index 344fbad8718f..920a1cc4a589 100644 --- a/configs/homecast_wpe_defconfig +++ b/configs/homecast_wpe_defconfig @@ -19,32 +19,37 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="board/homecast/homecast.sh" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +# BR2_PACKAGE_GST1_BCM_VP9_SUPPORT is not set BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_HOMECAST_SDK=y +BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_JPEG_TURBO=y +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/tmp/nfs/metrological/persistent" BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/tmp/nfs/metrological/usr/share/WPEFramework" @@ -56,17 +61,17 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="homecast.json" BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y # BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y -BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD=y +# BR2_PACKAGE_WPEFRAMEWORK_UI is not set BR2_PACKAGE_WPEWEBKIT=y +# BR2_PACKAGE_WPEWEBKIT_USE_WEB_AUDIO is not set BR2_PACKAGE_LIBXKBCOMMON=y +BR2_PACKAGE_C_ARES=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From b28d86fdc87f252b3077b004aa7bb43a7393494b Mon Sep 17 00:00:00 2001 From: Wouter Meek Date: Fri, 13 Jul 2018 11:58:27 +0200 Subject: [PATCH 286/614] [VSS] update config, use correct toolchain path --- configs/vss_wpe_ml_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index 4fe98344ee4e..a07677835e98 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -6,7 +6,7 @@ BR2_CCACHE_DIR="$(TOPDIR)/../buildroot-ccache" BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_EXTERNAL=y BR2_TOOLCHAIN_EXTERNAL_CUSTOM=y -BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/toolchain/vss2" +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/toolchain/vss" BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="arm-buildroot-linux-gnueabihf" BR2_TOOLCHAIN_EXTERNAL_GCC_5=y BR2_TOOLCHAIN_EXTERNAL_HEADERS_4_4=y From 99cbf1039931685caed08b3968000fb2ed5d06bc Mon Sep 17 00:00:00 2001 From: Haseena Sainul Date: Thu, 12 Jul 2018 22:59:47 +0530 Subject: [PATCH 287/614] PlayGiga: lib and app build support added --- package/playgiga/Config.in | 10 +++++++++- package/playgiga/playgiga.mk | 8 ++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/package/playgiga/Config.in b/package/playgiga/Config.in index 855da7a2ab66..c034aaa4b35f 100644 --- a/package/playgiga/Config.in +++ b/package/playgiga/Config.in @@ -4,5 +4,13 @@ config BR2_PACKAGE_PLAYGIGA select BR2_PACKAGE_LIBCURL select BR2_PACKAGE_OPUS -comment "playgiga client source needs a toolchain gcc >= 6.0" +if BR2_PACKAGE_PLAYGIGA +config BR2_PACKAGE_PLAYGIGA_APP + bool "Create playgiga app" + default y + help + This option allows to create playgiga app, + default is playgiga shared library +endif +comment "playgiga client source needs a toolchain gcc >= 6.0" diff --git a/package/playgiga/playgiga.mk b/package/playgiga/playgiga.mk index d78dc7d6b6e4..d715e619e532 100644 --- a/package/playgiga/playgiga.mk +++ b/package/playgiga/playgiga.mk @@ -26,9 +26,17 @@ endif PLAYGIGA_CONF_OPTS = \ $(PLAYGIGA_FLAGS) +ifeq ($(BR2_PACKAGE_PLAYGIGA_APP),y) +PLAYGIGA_CONF_OPTS += -DPLAYGIGA_APP=true define PLAYGIGA_INSTALL_IMAGE cp -a $(@D)/$(PLATFORM_DIR)/bin/pgclient $(TARGET_DIR)/usr/bin endef +else +PLAYGIGA_CONF_OPTS += -DPLAYGIGA_APP=false +define PLAYGIGA_INSTALL_IMAGE + cp -a $(@D)/$(PLATFORM_DIR)/lib/libpgclient.so $(TARGET_DIR)/usr/lib +endef +endif define PLAYGIGA_BUILD_CMDS $(HOST_DIR)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt \ From 459a1916f51576f275ba4ce714fa25a4de4b48b3 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Fri, 13 Jul 2018 05:27:10 +0530 Subject: [PATCH 288/614] PlayGiga: wpeframework plugin changes added --- package/playgiga/playgiga.mk | 8 +++++++- package/wpe/wpeframework-playgiga/Config.in | 4 ++++ .../wpeframework-playgiga.mk | 20 +++++++++++++++++++ package/wpe/wpeframework/Config.in | 3 ++- 4 files changed, 33 insertions(+), 2 deletions(-) create mode 100644 package/wpe/wpeframework-playgiga/Config.in create mode 100644 package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk diff --git a/package/playgiga/playgiga.mk b/package/playgiga/playgiga.mk index d715e619e532..baade0a70aac 100644 --- a/package/playgiga/playgiga.mk +++ b/package/playgiga/playgiga.mk @@ -34,7 +34,10 @@ endef else PLAYGIGA_CONF_OPTS += -DPLAYGIGA_APP=false define PLAYGIGA_INSTALL_IMAGE - cp -a $(@D)/$(PLATFORM_DIR)/lib/libpgclient.so $(TARGET_DIR)/usr/lib + cp -a $(@D)/$(PLATFORM_DIR)/lib/libplaygiga.so $(TARGET_DIR)/usr/lib +endef +define PLAYGIGA_INSTALL_STAGING_IMAGE + cp -a $(@D)/$(PLATFORM_DIR)/lib/libplaygiga.so $(STAGING_DIR)/usr/lib endef endif @@ -48,4 +51,7 @@ define PLAYGIGA_INSTALL_TARGET_CMDS $(call PLAYGIGA_INSTALL_IMAGE) endef +define PLAYGIGA_INSTALL_STAGING_CMDS + $(call PLAYGIGA_INSTALL_STAGING_IMAGE) +endef $(eval $(generic-package)) diff --git a/package/wpe/wpeframework-playgiga/Config.in b/package/wpe/wpeframework-playgiga/Config.in new file mode 100644 index 000000000000..33569b12dc6a --- /dev/null +++ b/package/wpe/wpeframework-playgiga/Config.in @@ -0,0 +1,4 @@ +config BR2_PACKAGE_WPEFRAMEWORK_PLAYGIGA + bool "PlayGiga" + help + WPE Platform PlayGiga plugin diff --git a/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk new file mode 100644 index 000000000000..2c1189065977 --- /dev/null +++ b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk @@ -0,0 +1,20 @@ +################################################################################ +# +# wpeframework-playgiga +# +################################################################################ + +WPEFRAMEWORK_PLAYGIGA_VERSION = deadbadfb8c0c6cbea8a982ca43855b097039789 +WPEFRAMEWORK_PLAYGIGA_SITE_METHOD = git +WPEFRAMEWORK_PLAYGIGA_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginPlayGiga.git +WPEFRAMEWORK_PLAYGIGA_INSTALL_STAGING = YES +WPEFRAMEWORK_PLAYGIGA_DEPENDENCIES = wpeframework + +WPEFRAMEWORK_PLAYGIGA_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_PLAYGIGA_VERSION} + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) +WPEFRAMEWORK_PLAYGIGA_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' +endif + +$(eval $(cmake-package)) + diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index c4ab807e431f..ba7511959028 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -78,8 +78,9 @@ source "package/wpe/wpeframework-amazon/Config.in" source "package/wpe/wpeframework-cobalt/Config.in" source "package/wpe/wpeframework-dialserver/Config.in" source "package/wpe/wpeframework-netflix/Config.in" -source "package/wpe/wpeframework-power/Config.in" source "package/wpe/wpeframework-packager/Config.in" +source "package/wpe/wpeframework-playgiga/Config.in" +source "package/wpe/wpeframework-power/Config.in" source "package/wpe/wpeframework-provisioning/Config.in" source "package/wpe/wpeframework-spotify/Config.in" source "package/wpe/wpeframework-switchboard/Config.in" From 4d8b03201dee1e33df870fecf7e457d13cf0fb00 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Fri, 13 Jul 2018 16:35:09 +0200 Subject: [PATCH 289/614] [ArrisRDK] move to bcmref 17.4 and no debug --- configs/arrisrdk_wpe_ml_defconfig | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 538e338113f0..0b5f5eba79b0 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="e217b1f183d2ae26bb9859c8bff5255e15fcec46" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="1c8184cabe3e74c2dd746451920eb077f91ea58e" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" BR2_PACKAGE_BUSYBOX_SMP=y @@ -56,13 +56,12 @@ BR2_PACKAGE_WIDEVINE=y BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_17_3_RDK=y +BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y BR2_PACKAGE_NEXUS_REMOVE_OPUS=y BR2_PACKAGE_BCM_REFSW_BOXMODE="4" # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y From 8e8b34636fb29a55e1488d67a1a3c10595c5e5eb Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Fri, 13 Jul 2018 14:03:25 +0200 Subject: [PATCH 290/614] [BCM-REFSW] Allows to use all decoders of version 17.4 --- package/bcm-refsw/bcm-refsw.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 3ac788e30da1..196b3eb19ed0 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -27,7 +27,7 @@ BCM_REFSW_VERSION = 17.3-1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) BCM_REFSW_VERSION = 17.3-2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) -BCM_REFSW_VERSION = 17.4-2 +BCM_REFSW_VERSION = 17.4-3 else BCM_REFSW_VERSION = 16.2-7 endif From 20dd0d57e6e76159535ca3a9762ac6c95c879648 Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Fri, 13 Jul 2018 17:33:38 +0200 Subject: [PATCH 291/614] [NETFLIX5] Bumps Netflix5 --- package/netflix5/netflix5.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 9b26e2426841..b95ada9a6fca 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,7 +4,7 @@ # ################################################################################ -NETFLIX5_VERSION = d3208dc8eb9b6e4c1586db00ee975150a49d0bb8 +NETFLIX5_VERSION = ea2d825345af5477514f63ff2f54be73ab6fc055 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY From a077c389a6dea677a0d59fd52d153c28ff23899b Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Sat, 14 Jul 2018 02:09:12 +0530 Subject: [PATCH 292/614] bumbed to latest and playgiga app setting changed to default 'n' --- package/playgiga/Config.in | 2 +- package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/playgiga/Config.in b/package/playgiga/Config.in index c034aaa4b35f..6a3affb0b225 100644 --- a/package/playgiga/Config.in +++ b/package/playgiga/Config.in @@ -7,7 +7,7 @@ config BR2_PACKAGE_PLAYGIGA if BR2_PACKAGE_PLAYGIGA config BR2_PACKAGE_PLAYGIGA_APP bool "Create playgiga app" - default y + default n help This option allows to create playgiga app, default is playgiga shared library diff --git a/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk index 2c1189065977..c5ed4b6e2acc 100644 --- a/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk +++ b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLAYGIGA_VERSION = deadbadfb8c0c6cbea8a982ca43855b097039789 +WPEFRAMEWORK_PLAYGIGA_VERSION = 573d33347f89ee66faa727c0fe62c3eac3540405 WPEFRAMEWORK_PLAYGIGA_SITE_METHOD = git WPEFRAMEWORK_PLAYGIGA_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginPlayGiga.git WPEFRAMEWORK_PLAYGIGA_INSTALL_STAGING = YES From 5a117cd5db2b6dece77439c66f90130ea2400a79 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Sat, 14 Jul 2018 10:53:21 +0530 Subject: [PATCH 293/614] WPEPluginPlayGiga: bumbed to latest --- package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk index c5ed4b6e2acc..ec39b55a2997 100644 --- a/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk +++ b/package/wpe/wpeframework-playgiga/wpeframework-playgiga.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLAYGIGA_VERSION = 573d33347f89ee66faa727c0fe62c3eac3540405 +WPEFRAMEWORK_PLAYGIGA_VERSION = 9e04ca760cf904cfbe0b6245d00acd52819993f8 WPEFRAMEWORK_PLAYGIGA_SITE_METHOD = git WPEFRAMEWORK_PLAYGIGA_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginPlayGiga.git WPEFRAMEWORK_PLAYGIGA_INSTALL_STAGING = YES From a3728add4f7288c407a7664f1290f19f2d457653 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Mon, 16 Jul 2018 15:36:15 -0700 Subject: [PATCH 294/614] [TVCONTROL] Revert local change --- package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk index 7785e9269a77..f87e65c54d61 100644 --- a/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk +++ b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk @@ -4,11 +4,9 @@ # ################################################################################ -#WPETVPLATFORM_BCM_VERSION = 83cd315a5373730abdeda7e4c06e2bd45ff6390e -#WPETVPLATFORM_BCM_SITE_METHOD = git -#WPETVPLATFORM_BCM_SITE = git@github.com:WebPlatformForEmbedded/WPETVPlatformBCM.git -WPETVPLATFORM_BCM_SITE_METHOD = local -WPETVPLATFORM_BCM_SITE = /space/metro/br/7425_TV/WPETVPlatformBCM +WPETVPLATFORM_BCM_VERSION = 83cd315a5373730abdeda7e4c06e2bd45ff6390e +WPETVPLATFORM_BCM_SITE_METHOD = git +WPETVPLATFORM_BCM_SITE = git@github.com:WebPlatformForEmbedded/WPETVPlatformBCM.git WPETVPLATFORM_BCM_INSTALL_STAGING = YES WPETVPLATFORM_BCM_DEPENDENCIES = wpeframework From d3ecf9fa6a1e521fc713824f48fa72fecf45ccc5 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Wed, 18 Jul 2018 21:04:09 -0700 Subject: [PATCH 295/614] [bcm] Default to 17.x RefSW and apply changes from 7425 defconf --- configs/bcm7429_wpe_ml_defconfig | 36 ++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index 8e47befd9c27..a34894b53a9d 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -4,7 +4,6 @@ BR2_CCACHE=y BR2_OPTIMIZE_2=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_BINUTILS_VERSION_2_25_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_ENABLE_LOCALE_PURGE=y BR2_ENABLE_LOCALE_WHITELIST="C en_US" @@ -44,36 +43,26 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7429=y -BR2_PACKAGE_BCM_REFSW_16_2=y +BR2_PACKAGE_BCM_REFSW_17_4=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_ORC=y -BR2_PACKAGE_ICU_USE_ICUDATA=y -BR2_PACKAGE_SHARED_MIME_INFO=y -BR2_PACKAGE_DROPBEAR=y -BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_LIBPROVISION=y BR2_PACKAGE_NETFLIX=y BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y # BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC is not set -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y -BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" @@ -81,7 +70,22 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,netwo BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +#BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_IRNEXUS_MODE="16" +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y + +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_BCM_VP9_SUPPORT=n From 82eb06e24a25ba99f949fad2066f3f9e7c4ae33e Mon Sep 17 00:00:00 2001 From: Srinivas Kakarla Date: Thu, 19 Jul 2018 15:37:48 +0530 Subject: [PATCH 296/614] Added AVN-Client in the buildroot config --- package/Config.in | 1 + package/avn-client/Config.in | 4 ++++ package/avn-client/avn-client.mk | 31 +++++++++++++++++++++++++++++++ 3 files changed, 36 insertions(+) create mode 100644 package/avn-client/Config.in create mode 100644 package/avn-client/avn-client.mk diff --git a/package/Config.in b/package/Config.in index 6fe4b6b9bc1d..44b91fa5815a 100644 --- a/package/Config.in +++ b/package/Config.in @@ -10,6 +10,7 @@ menu "Audio and video applications" source "package/bellagio/Config.in" source "package/cobalt/Config.in" source "package/playgiga/Config.in" + source "package/avn-client/Config.in" source "package/dvblast/Config.in" source "package/dvdauthor/Config.in" source "package/dvdrw-tools/Config.in" diff --git a/package/avn-client/Config.in b/package/avn-client/Config.in new file mode 100644 index 000000000000..ef0985c03c91 --- /dev/null +++ b/package/avn-client/Config.in @@ -0,0 +1,4 @@ +config BR2_PACKAGE_AVN_CLIENT + bool "avn-client" + + diff --git a/package/avn-client/avn-client.mk b/package/avn-client/avn-client.mk new file mode 100644 index 000000000000..333df1ca0182 --- /dev/null +++ b/package/avn-client/avn-client.mk @@ -0,0 +1,31 @@ +################################################################################ +# +# AVN_CLIENT +# +################################################################################ + +AVN_CLIENT_VERSION = 67dfdb99668cca7242cfd2f02b16bab97ec937bd +AVN_CLIENT_SITE_METHOD = git +AVN_CLIENT_SITE = git@github.com:Metrological/avn-nanoclient.git +AVN_CLIENT_INSTALL_STAGING = YES +AVN_CLIENT_DEPENDENCIES = gstreamer1 gst1-plugins-base \ + gst1-plugins-good gst1-plugins-bad + +export SYSROOTPATH=$(STAGING_DIR) + +AVN_CLIENT_MAKE_OPTS = ARCH=$(BR2_ARCH) CC="$(TARGET_CC)" CXX="$(TARGET_CXX)" + +define AVN_CLIENT_INSTALL_IMAGE + cp -a $(@D)/output/linux/release/bin/mclient $(TARGET_DIR)/usr/bin +endef + +define AVN_CLIENT_BUILD_CMDS + $(MAKE) -C $(@D) clean + $(MAKE) -C $(@D) $(AVN_CLIENT_MAKE_OPTS) +endef + +define AVN_CLIENT_INSTALL_TARGET_CMDS + $(call AVN_CLIENT_INSTALL_IMAGE) +endef + +$(eval $(generic-package)) From 35d2784e2fa1494009fa3538da46bd4c98c49bfa Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Tue, 20 Mar 2018 06:40:56 +0000 Subject: [PATCH 297/614] [bluetooth-plugin] Enabling kernel and buildroot configuration needed for bluetooth plugin. --- board/raspberrypi/rpi23-linux-4.9.config | 11 +++++ configs/raspberrypi3_wpe_ml_defconfig | 1 + package/bluez5_utils/bluez5_utils.mk | 3 +- package/wpe/wpeframework-plugins/Config.in | 26 ++++++++++ .../S90WPEFrameworkBluetooth | 48 +++++++++++++++++++ .../wpeframework-plugins.mk | 14 ++++++ 6 files changed, 102 insertions(+), 1 deletion(-) create mode 100644 package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index d92f456198a5..3655f05a3a01 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -61,12 +61,21 @@ CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_VLAN_8021Q=y CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y CONFIG_BT_HCIUART=y CONFIG_BT_HCIUART_BCM=y CONFIG_CFG80211=y CONFIG_CFG80211_WEXT=y CONFIG_MAC80211=m CONFIG_MAC80211_MESH=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y CONFIG_RFKILL_REGULATOR=m CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y @@ -152,6 +161,8 @@ CONFIG_TOUCHSCREEN_ADS7846=m CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y CONFIG_BRCM_CHAR_DRIVERS=y CONFIG_BCM_VC_CMA=y CONFIG_BCM_VCIO=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 36e1da019185..a61896f892c9 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -56,6 +56,7 @@ BR2_PACKAGE_LINUX_FIRMWARE=y BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y BR2_PACKAGE_WPEFRAMEWORK=y diff --git a/package/bluez5_utils/bluez5_utils.mk b/package/bluez5_utils/bluez5_utils.mk index 4976983704c7..2dba27e03d9f 100644 --- a/package/bluez5_utils/bluez5_utils.mk +++ b/package/bluez5_utils/bluez5_utils.mk @@ -15,7 +15,8 @@ BLUEZ5_UTILS_LICENSE_FILES = COPYING COPYING.LIB BLUEZ5_UTILS_CONF_OPTS = \ --enable-tools \ --enable-library \ - --disable-cups + --disable-cups \ + --enable-deprecated BLUEZ5_UTILS_DEPENDENCIES += host-python diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index f2cca190e153..1e64516b0c10 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -136,6 +136,32 @@ if BR2_PACKAGE_WPEFRAMEWORK_CDMI source "package/wpe/wpeframework-cdmi/Config.in" endif +config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH + bool "Bluetooth" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_BLUEZ5_UTILS + default y + help + A Bluetooth plugin to interact with Bluetooth devices. + +if BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH +choice + bool "Select Platform" + default BR2_PACKAGE_PLATFORM_RASPBERRY_PI + help + Choose Platform. + +menuconfig BR2_PACKAGE_PLATFORM_RASPBERRY_PI + bool "Raspberry Pi" + help + Enable Raspberry Pi Platform. + +menuconfig BR2_PACKAGE_PLATFORM_BCMXXXX + bool "BCM Platform" + help + Enable BCM Platform. +endchoice +endif menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS diff --git a/package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth b/package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth new file mode 100644 index 000000000000..7add76810f84 --- /dev/null +++ b/package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth @@ -0,0 +1,48 @@ +#!/bin/sh + +start() { + echo -n "Running bluetooth startup script" + if [ -f /usr/bin/hciattach ]; then + echo -n "Flashing Blutooth firmware" + if [ $? != 0 ] + then + /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow + [ $? == 0 ] && echo "OK" || echo "FAIL" + else + echo "OK" + fi + fi + + if [ -f /usr/libexec/bluetooth/bluetoothd ]; then + echo -n "Starting bluetoothd daemon" + /usr/libexec/bluetooth/bluetoothd & + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi +} +stop() { + echo -n "Stopping bluetoothd daemon" + killall -9 bluetoothd + [ $? == 0 ] && echo "OK" || echo "FAIL" +} +restart() { + stop + sleep 3 + start +} + +case "$1" in + start) + start + ;; + stop) + stop + ;; + restart|reload) + restart + ;; + *) + echo "Usage: $0 {start|stop|restart}" + exit 1 +esac + +exit $? diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 3642f913d170..27f978a47787 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -81,6 +81,20 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_WIDEVINE=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-widevine endif endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_OOP=true +ifeq ($(BR2_PACKAGE_PLATFORM_RASPBERRY_PI),y) +WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD +define WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD + mkdir -p $(TARGET_DIR)/etc/init.d + $(INSTALL) -D -m 0755 package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth $(TARGET_DIR)/etc/init.d +endef +endif +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT),y) From 8af51377799e5fb9066cbc2fd993caeb65796010 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Mon, 7 May 2018 14:59:54 +0000 Subject: [PATCH 298/614] [bluetooth-plugin] Adding bluez-alsa package --- package/Config.in | 1 + package/bluez-alsa/Config.in | 36 +++++++++++++++++++++++++ package/bluez-alsa/bluez-alsa.hash | 3 +++ package/bluez-alsa/bluez-alsa.mk | 43 ++++++++++++++++++++++++++++++ 4 files changed, 83 insertions(+) create mode 100644 package/bluez-alsa/Config.in create mode 100644 package/bluez-alsa/bluez-alsa.hash create mode 100644 package/bluez-alsa/bluez-alsa.mk diff --git a/package/Config.in b/package/Config.in index 44b91fa5815a..d053f1e80fb6 100644 --- a/package/Config.in +++ b/package/Config.in @@ -8,6 +8,7 @@ menu "Audio and video applications" source "package/amazon/Config.in" source "package/aumix/Config.in" source "package/bellagio/Config.in" + source "package/bluez-alsa/Config.in" source "package/cobalt/Config.in" source "package/playgiga/Config.in" source "package/avn-client/Config.in" diff --git a/package/bluez-alsa/Config.in b/package/bluez-alsa/Config.in new file mode 100644 index 000000000000..4417bcf79e13 --- /dev/null +++ b/package/bluez-alsa/Config.in @@ -0,0 +1,36 @@ +config BR2_PACKAGE_BLUEZ_ALSA + bool "bluez-alsa" + depends on !BR2_STATIC_LIBS # bluez5 + depends on !BR2_PACKAGE_BLUEZ_UTILS # bluez5 + depends on BR2_TOOLCHAIN_HAS_THREADS_NPTL + depends on BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_4 # bluez5 + depends on BR2_TOOLCHAIN_HAS_SYNC_4 # bluez5 + depends on BR2_USE_MMU # bluez5 -> dbus + depends on BR2_USE_WCHAR # libglib2 + select BR2_PACKAGE_ALSA_LIB + select BR2_PACKAGE_BLUEZ5_UTILS + select BR2_PACKAGE_LIBGLIB2 + select BR2_PACKAGE_SBC + help + Bluetooth Audio ALSA Backend. + + https://github.com/Arkq/bluez-alsa + +if BR2_PACKAGE_BLUEZ_ALSA + +config BR2_PACKAGE_BLUEZ_ALSA_HCITOP + bool "hcitop" + depends on BR2_PACKAGE_LIBBSD_ARCH_SUPPORTS + select BR2_PACKAGE_LIBBSD + select BR2_PACKAGE_NCURSES + help + Enable top-like monitoring tool for HCI. + +endif + +comment "bluez-alsa needs a toolchain w/ wchar, NPTL, headers >= 3.4, dynamic library" + depends on !BR2_USE_WCHAR || !BR2_TOOLCHAIN_HAS_THREADS_NPTL || \ + !BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_4 || BR2_STATIC_LIBS + depends on BR2_TOOLCHAIN_HAS_SYNC_4 + depends on BR2_USE_MMU + depends on !BR2_PACKAGE_BLUEZ_UTILS diff --git a/package/bluez-alsa/bluez-alsa.hash b/package/bluez-alsa/bluez-alsa.hash new file mode 100644 index 000000000000..28a409f25ba5 --- /dev/null +++ b/package/bluez-alsa/bluez-alsa.hash @@ -0,0 +1,3 @@ +# Locally calculated: +sha256 7fb5953264766169066cba313ac51c243c90952c32b8ec56f8d825705a183431 bluez-alsa-88aefeea56b7ea20668796c2c7a8312bf595eef4.tar.gz +sha256 c90a0081b0526834f700d084e48819b18d11453ecb030c9b7de0d2cc3e3711a5 LICENSE.txt diff --git a/package/bluez-alsa/bluez-alsa.mk b/package/bluez-alsa/bluez-alsa.mk new file mode 100644 index 000000000000..7be8a5f2013f --- /dev/null +++ b/package/bluez-alsa/bluez-alsa.mk @@ -0,0 +1,43 @@ +################################################################################ +# +# bluez_alsa +# +################################################################################ + +BLUEZ_ALSA_VERSION = 88aefeea56b7ea20668796c2c7a8312bf595eef4 +BLUEZ_ALSA_SITE = $(call github,Arkq,bluez-alsa,$(BLUEZ_ALSA_VERSION)) +BLUEZ_ALSA_LICENSE = MIT +BLUEZ_ALSA_LICENSE_FILES = LICENSE.txt +BLUEZ_ALSA_DEPENDENCIES = alsa-lib bluez5_utils libglib2 sbc host-pkgconf + +# git repo, no configure +BLUEZ_ALSA_AUTORECONF = YES + +# Autoreconf requires an existing m4 directory +define BLUEZ_ALSA_MKDIR_M4 + mkdir -p $(@D)/m4 +endef +BLUEZ_ALSA_POST_PATCH_HOOKS += BLUEZ_ALSA_MKDIR_M4 + +BLUEZ_ALSA_CONF_OPTS = \ + --enable-aplay \ + --disable-debug-time \ + --disable-pcm-test \ + --with-alsaplugindir=/usr/lib/alsa-lib \ + --with-alsadatadir=/usr/share/alsa + +ifeq ($(BR2_PACKAGE_FDK_AAC),y) +BLUEZ_ALSA_DEPENDENCIES += fdk-aac +BLUEZ_ALSA_CONF_OPTS += --enable-aac +else +BLUEZ_ALSA_CONF_OPTS += --disable-aac +endif + +ifeq ($(BR2_PACKAGE_BLUEZ_ALSA_HCITOP),y) +BLUEZ_ALSA_DEPENDENCIES += libbsd ncurses +BLUEZ_ALSA_CONF_OPTS += --enable-hcitop +else +BLUEZ_ALSA_CONF_OPTS += --disable-hcitop +endif + +$(eval $(autotools-package)) From 609928d5e706cfbe9451f68c76f91aecca29c2e7 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Wed, 25 Jul 2018 12:53:47 +0000 Subject: [PATCH 299/614] [bluetooth-plugin] Running bluealsa daemon in bluetooth startup script --- ...rameworkBluetooth => S70WPEFrameworkBluetooth} | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) rename package/wpe/wpeframework-plugins/{S90WPEFrameworkBluetooth => S70WPEFrameworkBluetooth} (67%) diff --git a/package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth b/package/wpe/wpeframework-plugins/S70WPEFrameworkBluetooth similarity index 67% rename from package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth rename to package/wpe/wpeframework-plugins/S70WPEFrameworkBluetooth index 7add76810f84..f0c2b21f0d58 100644 --- a/package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth +++ b/package/wpe/wpeframework-plugins/S70WPEFrameworkBluetooth @@ -4,8 +4,9 @@ start() { echo -n "Running bluetooth startup script" if [ -f /usr/bin/hciattach ]; then echo -n "Flashing Blutooth firmware" - if [ $? != 0 ] - then + /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow + if [ ! -d "/sys/class/bluetooth/hci0" ]; then + sleep 3 /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow [ $? == 0 ] && echo "OK" || echo "FAIL" else @@ -18,11 +19,21 @@ start() { /usr/libexec/bluetooth/bluetoothd & [ $? == 0 ] && echo "OK" || echo "FAIL" fi + + if [ -f /usr/bin/bluealsa ]; then + echo -n "Starting bluealsa daemon" + /usr/bin/bluealsa & + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi } stop() { echo -n "Stopping bluetoothd daemon" killall -9 bluetoothd [ $? == 0 ] && echo "OK" || echo "FAIL" + + echo -n "Stopping bluealsa daemon" + killall -9 bluealsa + [ $? == 0 ] && echo "OK" || echo "FAIL" } restart() { stop From 92c50b9902a1b168e28bc504bb09f5c57e71c599 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Wed, 25 Jul 2018 17:24:18 +0000 Subject: [PATCH 300/614] [bluetooth-plugin] Running bluetooth startup script after initialising dbus --- .../{S70WPEFrameworkBluetooth => S35WPEFrameworkBluetooth} | 0 package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename package/wpe/wpeframework-plugins/{S70WPEFrameworkBluetooth => S35WPEFrameworkBluetooth} (100%) diff --git a/package/wpe/wpeframework-plugins/S70WPEFrameworkBluetooth b/package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth similarity index 100% rename from package/wpe/wpeframework-plugins/S70WPEFrameworkBluetooth rename to package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 27f978a47787..ef46914c81fd 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -90,7 +90,7 @@ ifeq ($(BR2_PACKAGE_PLATFORM_RASPBERRY_PI),y) WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD define WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD mkdir -p $(TARGET_DIR)/etc/init.d - $(INSTALL) -D -m 0755 package/wpe/wpeframework-plugins/S90WPEFrameworkBluetooth $(TARGET_DIR)/etc/init.d + $(INSTALL) -D -m 0755 package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth $(TARGET_DIR)/etc/init.d endef endif endif From 5a811fc6063bc0f3d2a118ff48e50e0e796743c2 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Thu, 26 Jul 2018 04:54:33 +0000 Subject: [PATCH 301/614] [bluetooth-plugin] Added bluealsa as depended of bluetooth plugin and enabled alsa support in gstreamer --- configs/raspberrypi3_wpe_ml_defconfig | 1 + package/wpe/wpeframework-plugins/Config.in | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index a61896f892c9..a71801cc1075 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -29,6 +29,7 @@ BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_ALSA=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 1e64516b0c10..f24cf2483ea8 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -140,6 +140,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH bool "Bluetooth" select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_BLUEZ5_UTILS + select BR2_PACKAGE_BLUEZ_ALSA default y help A Bluetooth plugin to interact with Bluetooth devices. From b57e423407c3f9917ef5aa682a0948aa40867940 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Thu, 26 Jul 2018 10:51:35 +0000 Subject: [PATCH 302/614] [bluetooth-plugin] Modifying config.txt and cmdline.txt to enable bluetooth in RPi --- board/raspberrypi/post-image.sh | 13 ++++++++----- package/rpi-firmware/cmdline.txt | 2 +- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 9776aad6ff40..6dea3dffee95 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -7,8 +7,9 @@ GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp" echo "Post-image: processing $@" +BLUETOOTH="$(grep ^BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH=y ${BR2_CONFIG})" COBALT="$(grep ^BR2_PACKAGE_COBALT=y ${BR2_CONFIG})" -if [ "x${COBALT}" != "x" ]; then +if [ "x${COBALT}" != "x" ] || [ "x${BLUETOOTH}" != "x" ]; then if ! grep -qE '^dtparam=audio=on' "${BINARIES_DIR}/rpi-firmware/config.txt"; then echo "Adding 'dtparam=audio=on' to config.txt." cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" @@ -33,14 +34,16 @@ __EOF__ fi ;; --add-pi3-miniuart-bt-overlay) - if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'dtoverlay=pi3-miniuart-bt' to config.txt (fixes ttyAMA0 serial console)." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" + if [ "x${BLUETOOTH}" == "x" ]; then + if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'dtoverlay=pi3-miniuart-bt' to config.txt (fixes ttyAMA0 serial console)." + cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" # Fixes rpi3 ttyAMA0 serial console dtoverlay=pi3-miniuart-bt __EOF__ - fi + fi + fi ;; --tvmode-720) if ! grep -qE '^hdmi_mode=4' "${BINARIES_DIR}/rpi-firmware/config.txt"; then diff --git a/package/rpi-firmware/cmdline.txt b/package/rpi-firmware/cmdline.txt index 4c119c1e279c..445567feca8f 100644 --- a/package/rpi-firmware/cmdline.txt +++ b/package/rpi-firmware/cmdline.txt @@ -1 +1 @@ -vt.global_cursor_default=0 root=/dev/mmcblk0p2 rootwait console=ttyAMA0,115200 quiet +vt.global_cursor_default=0 root=/dev/mmcblk0p2 rootwait console=tty0,115200 quiet From 0d77d21dcbae4955e5fd6f96e258ce1ec5fd07d4 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Thu, 26 Jul 2018 11:05:02 +0000 Subject: [PATCH 303/614] [bluetooth-plugin] Code cleanup --- board/raspberrypi/post-image.sh | 12 ++++++------ package/wpe/wpeframework-plugins/Config.in | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 6dea3dffee95..23d4e41b7d9c 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -34,16 +34,16 @@ __EOF__ fi ;; --add-pi3-miniuart-bt-overlay) - if [ "x${BLUETOOTH}" == "x" ]; then - if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'dtoverlay=pi3-miniuart-bt' to config.txt (fixes ttyAMA0 serial console)." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" + if [ "x${BLUETOOTH}" == "x" ]; then + if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'dtoverlay=pi3-miniuart-bt' to config.txt (fixes ttyAMA0 serial console)." + cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" # Fixes rpi3 ttyAMA0 serial console dtoverlay=pi3-miniuart-bt __EOF__ - fi - fi + fi + fi ;; --tvmode-720) if ! grep -qE '^hdmi_mode=4' "${BINARIES_DIR}/rpi-firmware/config.txt"; then diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index f24cf2483ea8..0ed3af8c4f51 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -140,7 +140,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH bool "Bluetooth" select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_BLUEZ5_UTILS - select BR2_PACKAGE_BLUEZ_ALSA + select BR2_PACKAGE_BLUEZ_ALSA default y help A Bluetooth plugin to interact with Bluetooth devices. From 2f803a7fec56fb9a72ec62473e703d69861e78aa Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Fri, 27 Jul 2018 07:02:30 +0530 Subject: [PATCH 304/614] LinearBroadcastPlayer: Integrated --- .../Config.in | 4 ++++ .../wpeframework-linearbroadcastplayer.mk | 20 +++++++++++++++++++ package/wpe/wpeframework/Config.in | 1 + 3 files changed, 25 insertions(+) create mode 100644 package/wpe/wpeframework-linearbroadcastplayer/Config.in create mode 100644 package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk diff --git a/package/wpe/wpeframework-linearbroadcastplayer/Config.in b/package/wpe/wpeframework-linearbroadcastplayer/Config.in new file mode 100644 index 000000000000..9b0c17a115d7 --- /dev/null +++ b/package/wpe/wpeframework-linearbroadcastplayer/Config.in @@ -0,0 +1,4 @@ +config BR2_PACKAGE_WPEFRAMEWORK_LINEARBROADCASTPLAYER + bool "LinearBroadcastPlayer" + help + WPE Platform LinearBroadcastPlayer plugin diff --git a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk new file mode 100644 index 000000000000..54e9f820c3ec --- /dev/null +++ b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk @@ -0,0 +1,20 @@ +################################################################################ +# +# wpeframework-linearbroadcastplayer +# +################################################################################ + +WPEFRAMEWORK_LINEARBROADCASTPLAYER_VERSION = 18595aeb9bb4115ff4f992a81dd4170705f13b12 +WPEFRAMEWORK_LINEARBROADCASTPLAYER_SITE_METHOD = git +WPEFRAMEWORK_LINEARBROADCASTPLAYER_SITE = git@github.com:WebPlatformForEmbedded/WPELinearBroadcastPlayer.git +WPEFRAMEWORK_LINEARBROADCASTPLAYER_INSTALL_STAGING = YES +WPEFRAMEWORK_LINEARBROADCASTPLAYER_DEPENDENCIES = wpeframework + +WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_LINEARBROADCASTPLAYER_VERSION} + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) +WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' +endif + +$(eval $(cmake-package)) + diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index ba7511959028..4943060b4ce0 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -77,6 +77,7 @@ source "package/wpe/wpeframework-plugins/Config.in" source "package/wpe/wpeframework-amazon/Config.in" source "package/wpe/wpeframework-cobalt/Config.in" source "package/wpe/wpeframework-dialserver/Config.in" +source "package/wpe/wpeframework-linearbroadcastplayer/Config.in" source "package/wpe/wpeframework-netflix/Config.in" source "package/wpe/wpeframework-packager/Config.in" source "package/wpe/wpeframework-playgiga/Config.in" From 42e850676cd6283cf5ff6f755b19bf31d8e3f511 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Thu, 26 Jul 2018 20:54:19 -0700 Subject: [PATCH 305/614] [PLGYGIGA] Removed hard-coded target specific values and use values set by cmake-package --- package/playgiga/playgiga.mk | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/package/playgiga/playgiga.mk b/package/playgiga/playgiga.mk index baade0a70aac..5b8646fd70e2 100644 --- a/package/playgiga/playgiga.mk +++ b/package/playgiga/playgiga.mk @@ -4,12 +4,12 @@ # ################################################################################ -PLAYGIGA_VERSION = 6386e7ff7eabb4835da4c62ecfe4f5dd83521fea +PLAYGIGA_VERSION = d8789e72d35c0ea68d70c1022a49ce1f10342bb2 PLAYGIGA_SITE_METHOD = git PLAYGIGA_SITE = https://github.com/Metrological/playgiga PLAYGIGA_INSTALL_STAGING = YES PLAYGIGA_DEPENDENCIES = host-cmake gstreamer1 gst1-plugins-base \ - gst1-plugins-good gst1-plugins-bad libcurl opus + gst1-plugins-good gst1-plugins-bad libcurl opus wpeframework PLATFORM_DIR = wpe @@ -29,29 +29,33 @@ PLAYGIGA_CONF_OPTS = \ ifeq ($(BR2_PACKAGE_PLAYGIGA_APP),y) PLAYGIGA_CONF_OPTS += -DPLAYGIGA_APP=true define PLAYGIGA_INSTALL_IMAGE - cp -a $(@D)/$(PLATFORM_DIR)/bin/pgclient $(TARGET_DIR)/usr/bin + cp -a $(@D)/bin/pgclient $(TARGET_DIR)/usr/bin endef else PLAYGIGA_CONF_OPTS += -DPLAYGIGA_APP=false + define PLAYGIGA_INSTALL_IMAGE - cp -a $(@D)/$(PLATFORM_DIR)/lib/libplaygiga.so $(TARGET_DIR)/usr/lib + cp -a $(@D)/lib/libplaygiga.so $(TARGET_DIR)/usr/lib endef + define PLAYGIGA_INSTALL_STAGING_IMAGE - cp -a $(@D)/$(PLATFORM_DIR)/lib/libplaygiga.so $(STAGING_DIR)/usr/lib + cp -a $(@D)/lib/libplaygiga.so $(STAGING_DIR)/usr/lib endef endif -define PLAYGIGA_BUILD_CMDS - $(HOST_DIR)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt \ - -DBUILDROOT_HOST_PATH=$(HOST_DIR) $(PLAYGIGA_CONF_OPTS) - $(MAKE) -C $(@D)/$(PLATFORM_DIR) -endef +#define PLAYGIGA_BUILD_CMDS +# $(HOST_DIR)/usr/bin/cmake $(@D)/$(PLATFORM_DIR)/CMakeLists.txt \ +# -DBUILDROOT_HOST_PATH=$(HOST_DIR) $(PLAYGIGA_CONF_OPTS) +# $(MAKE) -C $(@D)/$(PLATFORM_DIR) +#endef define PLAYGIGA_INSTALL_TARGET_CMDS $(call PLAYGIGA_INSTALL_IMAGE) endef define PLAYGIGA_INSTALL_STAGING_CMDS - $(call PLAYGIGA_INSTALL_STAGING_IMAGE) + $(call PLAYGIGA_INSTALL_STAGING_IMAGE) endef -$(eval $(generic-package)) + + +$(eval $(cmake-package)) From 49ef9b879f3986e8d330dae7bf68f090e735e492 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 27 Jul 2018 20:04:25 +0200 Subject: [PATCH 306/614] [rpi] post-image isn't bash --- board/raspberrypi/post-image.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 23d4e41b7d9c..839839464e71 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -34,7 +34,7 @@ __EOF__ fi ;; --add-pi3-miniuart-bt-overlay) - if [ "x${BLUETOOTH}" == "x" ]; then + if [ "x${BLUETOOTH}" = "x" ]; then if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then echo "Adding 'dtoverlay=pi3-miniuart-bt' to config.txt (fixes ttyAMA0 serial console)." cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" From ef3957396ccb4ace124889e2f864578f3e1fd417 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Sun, 29 Jul 2018 21:25:46 -0700 Subject: [PATCH 307/614] [wpeframework-plugins] Make bluetooth an optional plugin, not all toolchains support building the alsa-lib and bluez stack. Such as MIPS based devices. Bluetooth should be enabled explicitly from the config of the device that supports it --- package/wpe/wpeframework-plugins/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 0ed3af8c4f51..517bda39996b 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -141,7 +141,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_BLUEZ5_UTILS select BR2_PACKAGE_BLUEZ_ALSA - default y + default n help A Bluetooth plugin to interact with Bluetooth devices. From 76d02568c33754ccab5c26bfd9df8a8ef913fe2d Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Tue, 31 Jul 2018 06:59:50 +0200 Subject: [PATCH 308/614] [QORVO] Add additional search paths to build the kernel module. --- package/greenpeak/greenpeak.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index 1479199a7592..d2069db915a4 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -32,7 +32,7 @@ GREENPEAK_VERSION = ${GREENPEAK_CHIP_REPO}_${GREENPEAK_PLATFORM}_${ARCH}_${GREEN ifeq ($(BR2_PACKAGE_GREENPEAK_KERNEL_MODULE),y) GREENPEAK_EXTRA_MOD_CFLAGS = \ - -D$(GREENPEAK_CHIP) \ + -D$(GREENPEAK_CHIP) -I$(STAGING_DIR)/usr/include -I$(STAGING_DIR)/usr/include/linux -I$(STAGING_DIR)/usr/include/refsw \ define GREENPEAK_BUILD_MODULE $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) GP_CHIP=$(GREENPEAK_CHIP) EXTRA_CFLAGS="$(GREENPEAK_EXTRA_MOD_CFLAGS)" M=$(@D)/Driver modules From 380222dd8e1329a66ce6776dcf5309b63ac8e62f Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Tue, 31 Jul 2018 21:10:08 +0530 Subject: [PATCH 309/614] WPEFramework PlayGiga Plugin activation based on playgiga package --- package/wpe/wpeframework-playgiga/Config.in | 1 + 1 file changed, 1 insertion(+) diff --git a/package/wpe/wpeframework-playgiga/Config.in b/package/wpe/wpeframework-playgiga/Config.in index 33569b12dc6a..0c89b8b68946 100644 --- a/package/wpe/wpeframework-playgiga/Config.in +++ b/package/wpe/wpeframework-playgiga/Config.in @@ -1,4 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLAYGIGA bool "PlayGiga" + depends on BR2_PACKAGE_PLAYGIGA help WPE Platform PlayGiga plugin From 489a9eb36bb5a74a2c94766e0e4a3dc77e82f028 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Sat, 14 Jul 2018 17:20:59 +0530 Subject: [PATCH 310/614] AVN Client app with so creation support added --- package/avn-client/Config.in | 8 ++++++++ package/avn-client/avn-client.mk | 14 +++++++++++++ package/wpe/wpeframework-avnclient/Config.in | 5 +++++ .../wpeframework-avnclient.mk | 20 +++++++++++++++++++ package/wpe/wpeframework/Config.in | 1 + 5 files changed, 48 insertions(+) create mode 100644 package/wpe/wpeframework-avnclient/Config.in create mode 100644 package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk diff --git a/package/avn-client/Config.in b/package/avn-client/Config.in index ef0985c03c91..163e190374c2 100644 --- a/package/avn-client/Config.in +++ b/package/avn-client/Config.in @@ -1,4 +1,12 @@ config BR2_PACKAGE_AVN_CLIENT bool "avn-client" +if BR2_PACKAGE_AVN_CLIENT +config BR2_PACKAGE_AVN_CLIENT_APP + bool "Create AVN Client App" + default n + help + This option allows to create avn client app, + default is avn client library +endif diff --git a/package/avn-client/avn-client.mk b/package/avn-client/avn-client.mk index 333df1ca0182..a03d9a4642d8 100644 --- a/package/avn-client/avn-client.mk +++ b/package/avn-client/avn-client.mk @@ -15,9 +15,20 @@ export SYSROOTPATH=$(STAGING_DIR) AVN_CLIENT_MAKE_OPTS = ARCH=$(BR2_ARCH) CC="$(TARGET_CC)" CXX="$(TARGET_CXX)" +ifeq ($(BR2_PACKAGE_AVN_CLIENT_APP),y) +export AVNCLIENT_APP=true define AVN_CLIENT_INSTALL_IMAGE cp -a $(@D)/output/linux/release/bin/mclient $(TARGET_DIR)/usr/bin endef +else +export AVNCLIENT_APP=false +define AVN_CLIENT_INSTALL_IMAGE + cp -a $(@D)/output/linux/release/lib/libcloudtv_mclient.so $(TARGET_DIR)/usr/lib +endef +define AVN_CLIENT_INSTALL_STAGING_IMAGE + cp -a $(@D)/output/linux/release/lib/libcloudtv_mclient.so $(STAGING_DIR)/usr/lib +endef +endif define AVN_CLIENT_BUILD_CMDS $(MAKE) -C $(@D) clean @@ -28,4 +39,7 @@ define AVN_CLIENT_INSTALL_TARGET_CMDS $(call AVN_CLIENT_INSTALL_IMAGE) endef +define AVN_CLIENT_INSTALL_STAGING_CMDS + $(call AVN_CLIENT_INSTALL_STAGING_IMAGE) +endef $(eval $(generic-package)) diff --git a/package/wpe/wpeframework-avnclient/Config.in b/package/wpe/wpeframework-avnclient/Config.in new file mode 100644 index 000000000000..82875355bb47 --- /dev/null +++ b/package/wpe/wpeframework-avnclient/Config.in @@ -0,0 +1,5 @@ +config BR2_PACKAGE_WPEFRAMEWORK_AVNCLIENT + bool "AVNClient" + depends on BR2_PACKAGE_AVN_CLIENT + help + WPE Platform AVNClient plugin diff --git a/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk b/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk new file mode 100644 index 000000000000..c8c68f1bbc39 --- /dev/null +++ b/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk @@ -0,0 +1,20 @@ +################################################################################ +# +# wpeframework-avnclient +# +################################################################################ + +WPEFRAMEWORK_AVNCLIENT_VERSION = 7d3ded06b8fb4b77881e821d1426d603cba67d0a +WPEFRAMEWORK_AVNCLIENT_SITE_METHOD = git +WPEFRAMEWORK_AVNCLIENT_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginAVNClient.git +WPEFRAMEWORK_AVNCLIENT_INSTALL_STAGING = YES +WPEFRAMEWORK_AVNCLIENT_DEPENDENCIES = wpeframework + +WPEFRAMEWORK_AVNCLIENT_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_AVNCLIENT_VERSION} + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) +WPEFRAMEWORK_AVNCLIENT_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' +endif + +$(eval $(cmake-package)) + diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index ba7511959028..e8714370cee8 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -75,6 +75,7 @@ endmenu menu "Plugins" source "package/wpe/wpeframework-plugins/Config.in" source "package/wpe/wpeframework-amazon/Config.in" +source "package/wpe/wpeframework-avnclient/Config.in" source "package/wpe/wpeframework-cobalt/Config.in" source "package/wpe/wpeframework-dialserver/Config.in" source "package/wpe/wpeframework-netflix/Config.in" From ea8b7134fcf8503dbf75a258f67bcd7907d73203 Mon Sep 17 00:00:00 2001 From: Anjali Rajan Date: Wed, 1 Aug 2018 12:25:52 +0000 Subject: [PATCH 311/614] [WPEFramework Plug-in] Added configuration for Device Settings Resolution Plug-in --- package/wpe/wpeframework-plugins/Config.in | 8 ++++++++ package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 517bda39996b..8841902217c0 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -64,6 +64,14 @@ config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO help DeviceInfo Plugin +config BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION + depends on BR2_PACKAGE_WPEFRAMEWORK_DUMMYDSHAL + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "DSResolution" + default y + help + DSResolution Plugin + config BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "DHCPServer" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index ef46914c81fd..b34aff332888 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -25,6 +25,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DEVICEINFO=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DSRESOLUTION=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DHCPSERVER=ON endif From 610148feed9111c92afded9a0bb97d285b6e2aee Mon Sep 17 00:00:00 2001 From: Anjali Rajan Date: Wed, 1 Aug 2018 12:56:44 +0000 Subject: [PATCH 312/614] [WPEFramework Plug-in] Removed dependancy of Device Settings Resolution Plug-in --- package/wpe/wpeframework-plugins/Config.in | 1 - 1 file changed, 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 8841902217c0..374cb0ab70f7 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -65,7 +65,6 @@ config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO DeviceInfo Plugin config BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION - depends on BR2_PACKAGE_WPEFRAMEWORK_DUMMYDSHAL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "DSResolution" default y From 35fb1c53470f78a06c1a6fed795f9996d3d81e23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alicia=20Boya=20Garc=C3=ADa?= Date: Thu, 2 Aug 2018 08:19:31 +0000 Subject: [PATCH 313/614] [memoryleak] gst1-plugins-good: qtdemux: Sample table memory consumption issue --- ...ple-data-from-the-current-fragment-o.patch | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-good/0015-qtdemux-Keep-sample-data-from-the-current-fragment-o.patch diff --git a/package/gstreamer1/gst1-plugins-good/0015-qtdemux-Keep-sample-data-from-the-current-fragment-o.patch b/package/gstreamer1/gst1-plugins-good/0015-qtdemux-Keep-sample-data-from-the-current-fragment-o.patch new file mode 100644 index 000000000000..2e8f67ba42ac --- /dev/null +++ b/package/gstreamer1/gst1-plugins-good/0015-qtdemux-Keep-sample-data-from-the-current-fragment-o.patch @@ -0,0 +1,41 @@ +From bfa666506313715af71141c22ba301eec6f059a0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Alicia=20Boya=20Garc=C3=ADa?= +Date: Tue, 31 Jul 2018 12:52:36 +0200 +Subject: [PATCH] qtdemux: Keep sample data from the current fragment only + (push mode) + +This patch clears the sample table whenever the demuxing of a new +fragment begins. This avoids increasing memory usage for long videos. +This behavior was already present when upstream_format_is_time; this +patch extends it to all push mode operation (e.g. Media Source +Extensions). +--- + gst/isomp4/qtdemux.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/gst/isomp4/qtdemux.c b/gst/isomp4/qtdemux.c +index d033f98fd..7bc79388d 100644 +--- a/gst/isomp4/qtdemux.c ++++ b/gst/isomp4/qtdemux.c +@@ -3889,8 +3889,17 @@ qtdemux_parse_moof (GstQTDemux * qtdemux, const guint8 * buffer, guint length, + if (G_UNLIKELY (base_offset < -1)) + goto lost_offset; + +- if (qtdemux->upstream_format_is_time) ++ if (!qtdemux->pullbased) { ++ /* Sample tables can grow enough to be problematic if the system memory ++ * is very low (e.g. embedded devices) and the videos very long ++ * (~8 MiB/hour for 25-30 fps video + typical AAC audio frames). ++ * Fortunately, we can easily discard them for each new fragment when ++ * we know qtdemux will not receive seeks outside of the current fragment. ++ * adaptivedemux honors this assumption. ++ * This optimization is also useful for applications that use qtdemux as ++ * a push-based simple demuxer, like Media Source Extensions. */ + gst_qtdemux_stream_flush_samples_data (qtdemux, stream); ++ } + + /* initialise moof sample data */ + stream->n_samples_moof = 0; +-- +2.17.0 + From b509b0e266146bc3cd755204166191989bc65aa0 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:40 -0700 Subject: [PATCH 314/614] [wpewebkit] bump to latest --- package/wpe/wpewebkit/wpewebkit.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 39b0173a2b68..3e8b2625364f 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -6,9 +6,9 @@ # If enabled, choose the development version hash. ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) -WPEWEBKIT_VERSION_VALUE = 80e8471a70f139b69dc3abc622a7d71beb650773 +WPEWEBKIT_VERSION_VALUE = a9d380f24c4a7553a5461e62022cad01375d1920 else -WPEWEBKIT_VERSION_VALUE = 4f48e30f572e8f15f3b8d349e8e830c2153bc9f4 +WPEWEBKIT_VERSION_VALUE = a9d380f24c4a7553a5461e62022cad01375d1920 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 2b14eec8302fb9e5dc61664f37606c8aa940df6c Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:41 -0700 Subject: [PATCH 315/614] [wpebackend-rdk] bump to latest --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 79d6b54cded2..f8ef908037c7 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = da25a833689c42613cc8a75200112f548f7cb3e0 +WPEBACKEND_RDK_VERSION = 91bb2a743a22f6416aa12a1641c7a9c662d5f19b WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From d786e79b4ce052dbd0ab70db89d7e605e47b74ee Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:42 -0700 Subject: [PATCH 316/614] [wpeframework] bump to latest --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 4d67a3c6f626..d343093a6b00 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 9a878ca00ab3edb24973e26f72cdac468a6e5fd2 +WPEFRAMEWORK_VERSION = c9b40d44d22e7be0a0ad99cd8570f521570ba2b6 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 20ff81e62ff2b474d52f39fda9e081ec3ae462e3 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:43 -0700 Subject: [PATCH 317/614] [wpeframework-plugins] bump to latest --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index ef46914c81fd..55cc7bddd052 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 87bc5a391384a6a2ab60f2163ec7d7bc3dc75949 +WPEFRAMEWORK_PLUGINS_VERSION = c64c925f19b3283cfb72ecef7b23710462d9dc03 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From d951fc8eb63770e3e86bf28dbc216278b0295315 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:44 -0700 Subject: [PATCH 318/614] [wpeframework-netflix] bump to latest --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index fd79518655f3..24c3f65126f9 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -4,11 +4,11 @@ # ################################################################################ -WPEFRAMEWORK_NETFLIX_VERSION = 9735202436138fd1438d47cdd5e17618290990ff +WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = ca237132a3ce7d6be01fbe941fdf9a65bebc2c42 +WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git From 9e03f900589fc7e03072a3dfc162d16c9e7c7c78 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:45 -0700 Subject: [PATCH 319/614] [wpeframework-provisioning] bump to latest --- .../wpe/wpeframework-provisioning/wpeframework-provisioning.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk index f05b09f31b5c..0de4f658b4cb 100644 --- a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk +++ b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PROVISIONING_VERSION = d7aa48c4e71b0888f1a5f0b59349433046c75da9 +WPEFRAMEWORK_PROVISIONING_VERSION = 43fac8ca8f208ef06ea1a0bda673318be17be5ff WPEFRAMEWORK_PROVISIONING_SITE_METHOD = git WPEFRAMEWORK_PROVISIONING_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginProvisioning.git WPEFRAMEWORK_PROVISIONING_INSTALL_STAGING = YES From bdb951fb1798fda97721fd21960698b8e22698eb Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Thu, 2 Aug 2018 22:08:47 -0700 Subject: [PATCH 320/614] [wpeframework-ui] bump to latest --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index cdbabf453397..e1cec0686b2e 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = e28398918ba92e4f54b6430c7f705d11d4e033ca +WPEFRAMEWORK_UI_VERSION = 2fa14b85a733bce7fcd2f6f6469ec4bf4b0c2553 WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From ab3632a3db79e70e9910fd84079886c32e596436 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Thu, 2 Aug 2018 07:56:42 +0530 Subject: [PATCH 321/614] Dictionary: Plugin ported from WebBridge to WPEFramework --- package/wpe/wpeframework-dictionary/Config.in | 6 ------ .../wpeframework-dictionary/wpeframework-dictionary.mk | 10 ---------- package/wpe/wpeframework-plugins/Config.in | 6 ++++++ .../wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 4 files changed, 10 insertions(+), 16 deletions(-) delete mode 100644 package/wpe/wpeframework-dictionary/Config.in delete mode 100644 package/wpe/wpeframework-dictionary/wpeframework-dictionary.mk diff --git a/package/wpe/wpeframework-dictionary/Config.in b/package/wpe/wpeframework-dictionary/Config.in deleted file mode 100644 index a8059028b283..000000000000 --- a/package/wpe/wpeframework-dictionary/Config.in +++ /dev/null @@ -1,6 +0,0 @@ -menuconfig BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY - bool "Dictionary" - - help - WPE Platform Dictionary plugin - diff --git a/package/wpe/wpeframework-dictionary/wpeframework-dictionary.mk b/package/wpe/wpeframework-dictionary/wpeframework-dictionary.mk deleted file mode 100644 index 3bc6659e9e1f..000000000000 --- a/package/wpe/wpeframework-dictionary/wpeframework-dictionary.mk +++ /dev/null @@ -1,10 +0,0 @@ -WPEFRAMEWORK_DICTIONARY_VERSION = ec53813357eab086b6dded6e02533bcc7c2141d0 -WPEFRAMEWORK_DICTIONARY_SITE_METHOD = git -WPEFRAMEWORK_DICTIONARY_SITE = git@github.com:Metrological/webbridge.git -WPEFRAMEWORK_DICTIONARY_INSTALL_STAGING = YES -WPEFRAMEWORK_DICTIONARY_DEPENDENCIES = WPEFramework - -WPEFRAMEWORK_DICTIONARY_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_DICTIONARY_VERSION} - -$(eval $(cmake-package)) - diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 517bda39996b..e135d2210a77 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -71,6 +71,12 @@ config BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER IPv4 DHCP server functionality. Distribute IPv4 addresses throughout the network. +config BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "Dictionary" + help + Dictionary Plugin. + menuconfig BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "LocationSync" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index ef46914c81fd..25d3f62ed566 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -29,6 +29,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DHCPSERVER=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DICTIONARY=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_EGLTEST),y) WPEFRAMEWORK_COMMON_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_EGLTEST=ON endif From be66ed73b1276e11bd36ccf26f71a6bd3eeca920 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Fri, 3 Aug 2018 16:45:40 -0700 Subject: [PATCH 322/614] [spectrum] Enable frontend for TVControl --- board/spectrum/add_spectrum.py | 55 -- board/spectrum/hmx_bcmgenet.patch | 701 +++++++++++++++++ board/spectrum/hmx_bcmgenet_4.1-1.12.patch | 728 ++++++++++++++++++ board/spectrum/linux.config | 498 ++++++++++++ board/spectrum/rootfs/etc/init.d/S75spectrum | 34 - board/spectrum/rootfs/etc/init.d/periodicSync | 8 - configs/spectrum_wpe_defconfig | 83 +- package/bcm-refsw/platforms.inc | 18 +- 8 files changed, 1985 insertions(+), 140 deletions(-) delete mode 100755 board/spectrum/add_spectrum.py create mode 100644 board/spectrum/hmx_bcmgenet.patch create mode 100644 board/spectrum/hmx_bcmgenet_4.1-1.12.patch create mode 100644 board/spectrum/linux.config delete mode 100755 board/spectrum/rootfs/etc/init.d/S75spectrum delete mode 100755 board/spectrum/rootfs/etc/init.d/periodicSync diff --git a/board/spectrum/add_spectrum.py b/board/spectrum/add_spectrum.py deleted file mode 100755 index 94302af9ac88..000000000000 --- a/board/spectrum/add_spectrum.py +++ /dev/null @@ -1,55 +0,0 @@ -#!/usr/bin/python -import json, os, sys - -if (os.getenv('TARGET_DIR')): - webbridgePath = os.getenv('TARGET_DIR') + '/etc/webbridge/' -else: - webbridgePath = 'output/target/etc/webbridge/' - -webbridgeFile = webbridgePath + 'config.json' - -spectrumObj = { - 'callsign':'Spectrum', - 'locator':'libwebkitbrowser.so', - 'classname':'WebKitBrowser', - 'autostart':True, - 'configuration':{ - 'url':'http://8.19.32.245', - 'useragent':'Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Spectrum', - 'injectedbundle':'libWPEInjectedBundle.so', - 'transparent':True, - 'compositor':'noaa', - 'inspector':'0.0.0.0:9997', - 'fps':True, - 'cursor':False, - 'touch':False, - 'msebuffers':'audio:2m,video:15m,text:1m', - 'memoryprofile':150, - 'memorypressure':'databaseprocess:30m,networkprocess:50m,webprocess:300m,rpcprocess:50m', - 'mediadiskcache':False, - 'diskcache':'90m', - 'xhrcache':True - } -} - -print('Reading webbridge file at: ' + webbridgeFile) - -with open(webbridgeFile, 'r') as f: - data = json.load(f) - - -print('Successfully loaded webbridge config.json') -#print(json.dumps(data, indent=4, separators=(',',':'))) - -for plugin in data['plugins']: - #print('Checking ' + plugin['callsign']) - if (plugin['callsign'] == 'Spectrum'): - print('Already present in config.json') - sys.exit() - -data['plugins'].insert(-1, spectrumObj) -print('Successfully inserted plugin into webbridge config.json') -#print(json.dumps(data, indent=4, separators=(',',':'))) - -with open(webbridgeFile, 'w') as f: - json.dump(data, f, indent=4, separators=(',',':')) diff --git a/board/spectrum/hmx_bcmgenet.patch b/board/spectrum/hmx_bcmgenet.patch new file mode 100644 index 000000000000..5cee41725d64 --- /dev/null +++ b/board/spectrum/hmx_bcmgenet.patch @@ -0,0 +1,701 @@ +diff -urN linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet.c linux/drivers/net/ethernet/broadcom/genet/bcmgenet.c +--- linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet.c 2016-12-14 16:34:01.791568060 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet.c 2016-12-14 16:41:53.876938467 +0900 +@@ -61,6 +61,9 @@ + + #include "bcmgenet.h" + ++#ifdef CONFIG_BCMGENET_TAG ++#include "bcmgenet_tag.h" ++#endif + /* Maximum number of hardware queues, downsized if needed */ + #define GENET_MAX_MQ_CNT 4 + +@@ -1267,6 +1270,15 @@ + u16 dma_desc_flags; + int ret; + ++#ifdef CONFIG_BCMGENET_TAG ++ ret = bcmgenet_tag_fixup(skb, dev); ++ if (!ret) ++ { ++ dev = skb->dev; ++ priv = netdev_priv(dev); ++ } ++#endif ++ + index = skb_get_queue_mapping(skb); + /* Mapping strategy: + * queue_mapping = 0, unclassfieid, packet xmited through ring16 +@@ -1545,6 +1557,22 @@ + if (dma_flag & DMA_RX_MULT) + dev->stats.multicast++; + ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ { ++ int id = bcmgenet_tag_search(skb, dev); ++ if (id >= 0) ++ { ++ struct net_device *alt_dev; ++ alt_dev = bcmgenet_tag_netdev(id); ++ if (alt_dev == NULL) ++ printk(KERN_INFO "keep original interface " BCMGENET_TAG_PARENT "\n"); ++ else ++ skb->dev = alt_dev; ++ } ++ } ++#endif ++ + /* Notify kernel */ + napi_gro_receive(&priv->napi, skb); + cb->skb = NULL; +@@ -2863,6 +2891,24 @@ + if (err) + goto err_clk_disable; + ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ { ++ int ret; ++ ++ ret = bcmgenet_tag_create(&(pdev->dev), dev); ++ if (ret < 0) { ++ printk(KERN_ERR "%s: can't create bcmgenet tag for %s\n", ++ __func__, dev->name); ++ return ret; ++ } ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: bcmgenet %s alias created for %s\n", ++ __func__, dev->name); ++#endif ++ } ++#endif + return err; + + err_clk_disable: +diff -urN linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c +--- linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c 2016-12-14 16:36:30.119574300 +0900 +@@ -0,0 +1,547 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct tag_dev ++{ ++ unsigned int tag; ++ unsigned char *name; ++ unsigned char addr[4]; ++ struct net_device *dev; ++ bool enable; ++}; ++ ++struct tag_data ++{ ++ unsigned char len_h; ++ unsigned char len_l; ++ unsigned char magic; ++ unsigned char if_num; ++} __attribute((packed)); ++ ++#define MIN_PACKET_DATA_LEN 60 ++#define STB_TAG_LEN (sizeof(struct tag_data)) ++#define BRCM_TAG_LEN 0 ++ ++#define VDEV0_IFNUM 0x0 ++#define VDEV1_IFNUM 0x1 ++#define VDEV2_IFNUM 0x2 ++#define NUM_TAGS 0x03 ++#define TAG_MAGIC 0xAA ++ ++#define MAX_TAG_DEVS 3 ++ ++#include "bcmgenet.h" ++#include "bcmgenet_tag.h" ++ ++struct tag_priv ++{ ++ struct net_device *dev; ++ struct net_device *parent; ++ struct phy_device *phydev; ++}; ++ ++ ++struct tag_dev tag_devs[] = ++{ ++ { VDEV0_IFNUM, "bcm0", { 192, 168, 17, 10}, NULL, true }, ++ { VDEV1_IFNUM, "rgmii_2", { 0, 0, 0 ,0 }, NULL, false }, ++ { VDEV2_IFNUM, "rg0", { 192, 168, 0, 10}, NULL, true } ++}; ++ ++#ifdef DEBUG ++static void hex_dump(char *buf, int len) ++{ ++ print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, ++ 16, 1, buf, len, true); ++} ++#endif ++ ++void bcmgenet_tag_carrier_on() ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ dev = tag_devs[id].dev; ++ if (dev != NULL) ++ { ++ netif_carrier_on(tag_devs[id].dev); ++#ifdef DEBUG ++ printk(KERN_INFO "%s is now on\n", dev->name); ++#endif ++ } ++ } ++} ++ ++void bcmgenet_tag_carrier_off() ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ dev = tag_devs[id].dev; ++ if (dev != NULL) ++ { ++ netif_carrier_off(tag_devs[id].dev); ++#ifdef DEBUG ++ printk(KERN_INFO "%s is now off\n", dev->name); ++#endif ++ } ++ } ++} ++ ++int bcmgenet_tag_fixup(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ struct tag_data *stb_tag; ++ int origin, len, pad; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ if (skb->dev == tag_devs[id].dev) ++ break; ++ ++ if (id == MAX_TAG_DEVS) ++ { ++#ifdef DEBUG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ printk(KERN_ERR "Cannot find proper netdev for %s\n", dev->name); ++#endif ++ return -1; ++ } ++ ++ origin = skb->len; ++#ifdef DEBUG ++ printk(KERN_INFO "original packet length: %d\n", origin); ++#endif ++ ++ if (skb->len < (MIN_PACKET_DATA_LEN + STB_TAG_LEN + BRCM_TAG_LEN)) ++ { ++ int tailroom; ++ ++ pad = (MIN_PACKET_DATA_LEN + STB_TAG_LEN + BRCM_TAG_LEN) - skb->len; ++ tailroom = skb_tailroom(skb); ++ if (tailroom < pad) ++ { ++ int ret = pskb_expand_head(skb, 0, pad - skb_tailroom(skb), GFP_ATOMIC); ++ if (ret < 0) ++ { ++#ifdef DEBUG ++ printk(KERN_ERR "Cannot expand skb\n"); ++#endif ++ return ret; ++ } ++ } ++ skb_put(skb, pad); ++ len = MIN_PACKET_DATA_LEN; ++ } ++ else ++ { ++ pad = STB_TAG_LEN; ++ skb_put(skb, pad); ++ len = skb->len - STB_TAG_LEN; ++ } ++ ++ stb_tag = (struct tag_data *)(skb_tail_pointer(skb) - sizeof(struct tag_data)); ++ stb_tag->len_h = (unsigned char) (len >> 8); ++ stb_tag->len_l = (unsigned char) (len); ++ stb_tag->magic = (unsigned char) (TAG_MAGIC); ++ stb_tag->if_num = (unsigned char) tag_devs[id].tag; ++ ++ skb->dev = parent; ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: A packet is forwarded from %s to %s\n", __func__, dev->name, skb->dev->name); ++ printk(KERN_INFO "%s: dev=%s, origin=%d, len=%d (pad=%d)\n", ++ __func__, skb->dev->name, origin, skb->len, pad); ++ hex_dump(skb->data, skb->len); ++#endif ++ ++ return 0; ++} ++ ++int bcmgenet_tag_search(struct sk_buff *skb, struct net_device *dev) ++{ ++ unsigned int f_len; ++ int len = skb->len; ++ int id; ++ ++ if (strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ return -1; ++ ++ f_len = skb->data[len - 2]; ++ f_len <<= 8; ++ f_len |= skb->data[len - 1]; ++ f_len -= ETH_HLEN; ++ ++ id = ((len - f_len) / 2) - 1; ++ ++ if (id >= NUM_TAGS) ++ id = VDEV1_IFNUM; ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: dev=%s, id=%d, len=%d (pad=%d)\n", ++ __func__, skb->dev->name, id, skb->len, len - f_len); ++ hex_dump(skb->data, skb->len); ++#endif ++ ++ skb_trim(skb, f_len); ++ ++ return id; ++} ++ ++struct net_device* bcmgenet_tag_netdev(int id) ++{ ++ if (id < 0 || id > MAX_TAG_DEVS) ++ return NULL; ++ ++ return tag_devs[id].dev; ++} ++ ++/* ++ * netdev_ops ++ */ ++static int bcmgenet_tag_init(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ dev->iflink = p->parent->ifindex; ++ ++ return 0; ++} ++ ++static int bcmgenet_tag_open(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ int err; ++ ++ if (!(parent->flags & IFF_UP)) ++ return -ENETDOWN; ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) { ++ err = dev_uc_add(parent, dev->dev_addr); ++ if (err < 0) ++ goto out; ++ } ++ ++ if (dev->flags & IFF_ALLMULTI) { ++ err = dev_set_allmulti(parent, 1); ++ if (err < 0) ++ goto del_unicast; ++ } ++ if (dev->flags & IFF_PROMISC) { ++ err = dev_set_promiscuity(parent, 1); ++ if (err < 0) ++ goto clear_allmulti; ++ } ++ ++ return 0; ++ ++clear_allmulti: ++ if (dev->flags & IFF_ALLMULTI) ++ dev_set_allmulti(parent, -1); ++del_unicast: ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++out: ++ return err; ++} ++ ++static int bcmgenet_tag_close(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ dev_mc_unsync(parent, dev); ++ dev_uc_unsync(parent, dev); ++ if (dev->flags & IFF_ALLMULTI) ++ dev_set_allmulti(parent, -1); ++ if (dev->flags & IFF_PROMISC) ++ dev_set_promiscuity(parent, -1); ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++ ++ return 0; ++} ++ ++static void bcmgenet_tag_change_rx_flags(struct net_device *dev, int change) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (change & IFF_ALLMULTI) ++ dev_set_allmulti(parent, dev->flags & IFF_ALLMULTI ? 1 : -1); ++ if (change & IFF_PROMISC) ++ dev_set_promiscuity(parent, dev->flags & IFF_PROMISC ? 1 : -1); ++} ++ ++static void bcmgenet_tag_set_rx_mode(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ dev_mc_sync(parent, dev); ++ dev_uc_sync(parent, dev); ++} ++ ++static int bcmgenet_tag_set_mac_address(struct net_device *dev, void *a) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ struct sockaddr *addr = a; ++ int err; ++ ++ if (!is_valid_ether_addr(addr->sa_data)) ++ return -EADDRNOTAVAIL; ++ ++ if (!(dev->flags & IFF_UP)) ++ goto out; ++ ++ if (!ether_addr_equal(addr->sa_data, parent->dev_addr)) { ++ err = dev_uc_add(parent, addr->sa_data); ++ if (err < 0) ++ return err; ++ } ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++ ++out: ++ ether_addr_copy(dev->dev_addr, addr->sa_data); ++ ++ return 0; ++} ++ ++static int bcmgenet_tag_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) ++ return phy_mii_ioctl(p->phydev, ifr, cmd); ++ ++ return -EOPNOTSUPP; ++} ++ ++static netdev_tx_t bcmgenet_tag_xmit(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ return parent->netdev_ops->ndo_start_xmit(skb, dev); ++} ++ ++static const struct net_device_ops bcmgenet_tag_netdev_ops = { ++ .ndo_init = bcmgenet_tag_init, ++ .ndo_open = bcmgenet_tag_open, ++ .ndo_stop = bcmgenet_tag_close, ++ .ndo_start_xmit = bcmgenet_tag_xmit, ++ .ndo_change_rx_flags = bcmgenet_tag_change_rx_flags, ++ .ndo_set_rx_mode = bcmgenet_tag_set_rx_mode, ++ .ndo_set_mac_address = bcmgenet_tag_set_mac_address, ++ .ndo_do_ioctl = bcmgenet_tag_ioctl, ++}; ++ ++/* ++ * ethtool_ops ++ */ ++static int bcmgenet_tag_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ int err; ++ ++ err = -EOPNOTSUPP; ++ if (p->phydev != NULL) { ++ err = phy_read_status(p->phydev); ++ if (err == 0) ++ err = phy_ethtool_gset(p->phydev, cmd); ++ } ++ ++ return err; ++} ++ ++static int bcmgenet_tag_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) ++ return phy_ethtool_sset(p->phydev, cmd); ++ ++ return -EOPNOTSUPP; ++} ++ ++static void bcmgenet_tag_get_drvinfo(struct net_device *dev, ++ struct ethtool_drvinfo *drvinfo) ++{ ++ strlcpy(drvinfo->driver, "bcmgenet_tag", sizeof(drvinfo->driver)); ++ strlcpy(drvinfo->version, "0.1", sizeof(drvinfo->version)); ++ strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version)); ++ strlcpy(drvinfo->bus_info, "platform", sizeof(drvinfo->bus_info)); ++} ++ ++static int bcmgenet_tag_nway_reset(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) ++ return genphy_restart_aneg(p->phydev); ++ ++ return -EOPNOTSUPP; ++} ++ ++static u32 bcmgenet_tag_get_link(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) { ++ genphy_update_link(p->phydev); ++ return p->phydev->link; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static void bcmgenet_tag_get_strings(struct net_device *dev, ++ uint32_t stringset, uint8_t *data) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (stringset == ETH_SS_STATS) { ++ int len = ETH_GSTRING_LEN; ++ ++ strncpy(data, "tx_packets", len); ++ strncpy(data + len, "tx_bytes", len); ++ strncpy(data + 2 * len, "rx_packets", len); ++ strncpy(data + 3 * len, "rx_bytes", len); ++ if (parent->ethtool_ops->get_strings != NULL) ++ parent->ethtool_ops->get_strings(parent, stringset, data + 4 * len); ++ } ++} ++ ++static void bcmgenet_tag_get_ethtool_stats(struct net_device *dev, ++ struct ethtool_stats *stats, ++ uint64_t *data) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ data[0] = p->dev->stats.tx_packets; ++ data[1] = p->dev->stats.tx_bytes; ++ data[2] = p->dev->stats.rx_packets; ++ data[3] = p->dev->stats.rx_bytes; ++ if (parent->ethtool_ops->get_ethtool_stats != NULL) ++ parent->ethtool_ops->get_ethtool_stats(parent, stats, data + 4); ++} ++ ++static int bcmgenet_tag_get_sset_count(struct net_device *dev, int sset) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (sset == ETH_SS_STATS) { ++ int count; ++ ++ count = 4; ++ if (parent->ethtool_ops->get_sset_count != NULL) ++ count += parent->ethtool_ops->get_sset_count(parent, sset); ++ ++ return count; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static const struct ethtool_ops bcmgenet_tag_ethtool_ops = { ++ .get_settings = bcmgenet_tag_get_settings, ++ .set_settings = bcmgenet_tag_set_settings, ++ .get_drvinfo = bcmgenet_tag_get_drvinfo, ++ .nway_reset = bcmgenet_tag_nway_reset, ++ .get_link = bcmgenet_tag_get_link, ++ .get_strings = bcmgenet_tag_get_strings, ++ .get_ethtool_stats = bcmgenet_tag_get_ethtool_stats, ++ .get_sset_count = bcmgenet_tag_get_sset_count, ++}; ++ ++static struct net_device * ++bcmgenet_tag_create_netdev(struct device *pdev, struct net_device *parent, char*name) ++{ ++ struct bcmgenet_priv *pp = netdev_priv(parent); ++ struct net_device *dev; ++ struct tag_priv *p; ++ int ret; ++ ++ dev = alloc_netdev(sizeof(struct tag_priv), ++ name, ether_setup); ++ if (dev == NULL) ++ return NULL; ++ ++ dev->features = parent->vlan_features; ++ SET_ETHTOOL_OPS(dev, &bcmgenet_tag_ethtool_ops); ++ eth_hw_addr_inherit(dev, parent); ++ dev->tx_queue_len = 0; ++ dev->netdev_ops = &bcmgenet_tag_netdev_ops; ++ ++ SET_NETDEV_DEV(dev, pdev); ++ dev->vlan_features = parent->vlan_features; ++ ++ p = netdev_priv(dev); ++ p->dev = dev; ++ p->parent = parent; ++ p->phydev = pp->phydev; ++ ++ ret = register_netdev(dev); ++ if (ret) { ++ printk(KERN_ERR "%s: error %d registering interface %s\n", ++ parent->name, ret, dev->name); ++ free_netdev(dev); ++ return NULL; ++ } ++ ++ netif_carrier_off(dev); ++ ++ return dev; ++} ++ ++int bcmgenet_tag_create(struct device *pdev, struct net_device *parent) ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ if (tag_devs[id].enable) ++ { ++ dev = bcmgenet_tag_create_netdev(pdev, parent, tag_devs[id].name); ++ if (dev == NULL) ++ return -EINVAL; ++ ++ tag_devs[id].dev = dev; ++#ifdef DEBUG ++ printk(KERN_INFO "%s: create tag interface %s-%s\n", ++ __func__, parent->name, dev->name); ++#endif ++ } ++ } ++ ++ return 0; ++} +diff -urN linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h +--- linux.orig/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h 1970-01-01 09:00:00.000000000 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h 2016-12-14 16:36:30.119574300 +0900 +@@ -0,0 +1,12 @@ ++#ifndef _BCMGENET_TAG_H_ ++#define _BCMGENET_TAG_H_ ++ ++int bcmgenet_tag_create(struct device *pdev, struct net_device *parent); ++int bcmgenet_tag_fixup(struct sk_buff *skb, struct net_device *dev); ++int bcmgenet_tag_search(struct sk_buff *skb, struct net_device *dev); ++void bcmgenet_tag_carrier_on(void); ++void bcmgenet_tag_carrier_off(void); ++struct net_device* bcmgenet_tag_netdev(int id); ++ ++#define BCMGENET_TAG_PARENT "eth0" ++#endif +diff -urN linux.orig/drivers/net/ethernet/broadcom/genet/bcmmii.c linux/drivers/net/ethernet/broadcom/genet/bcmmii.c +--- linux.orig/drivers/net/ethernet/broadcom/genet/bcmmii.c 2016-12-14 16:34:01.783568059 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmmii.c 2016-12-14 16:45:05.969583659 +0900 +@@ -23,6 +23,7 @@ + */ + + #include "bcmgenet.h" ++#include "bcmgenet_tag.h" + + #include + #include +@@ -167,6 +168,11 @@ + CMD_TX_PAUSE_IGNORE); + reg |= cmd_bits; + bcmgenet_umac_writel(priv, reg, UMAC_CMD); ++ ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ bcmgenet_tag_carrier_on(); ++#endif + } else { + /* done if nothing has changed */ + if (!status_changed) +@@ -174,6 +180,11 @@ + + /* needed for MoCA fixed PHY to reflect correct link status */ + netif_carrier_off(dev); ++ ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ bcmgenet_tag_carrier_off(); ++#endif + } + + phy_print_status(phydev); +diff -urN linux.orig/drivers/net/ethernet/broadcom/genet/Makefile linux/drivers/net/ethernet/broadcom/genet/Makefile +--- linux.orig/drivers/net/ethernet/broadcom/genet/Makefile 2016-12-14 16:34:01.783568059 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/Makefile 2016-12-14 16:45:29.060735248 +0900 +@@ -1,2 +1,3 @@ + obj-$(CONFIG_BCMGENET) += genet.o ++obj-$(CONFIG_BCMGENET_TAG) += bcmgenet_tag.o + genet-objs := bcmgenet.o bcmmii.o bcmgenet_wol.o +diff -urN linux.orig/drivers/net/ethernet/broadcom/Kconfig linux/drivers/net/ethernet/broadcom/Kconfig +--- linux.orig/drivers/net/ethernet/broadcom/Kconfig 2016-12-14 16:34:01.807568060 +0900 ++++ linux/drivers/net/ethernet/broadcom/Kconfig 2016-12-14 16:45:43.900385282 +0900 +@@ -151,4 +151,11 @@ + compile this driver as a module, choose M here: the module + will be called bcmsysport. This is recommended. + ++config BCMGENET_TAG ++ tristate "Broadcom Ethernet Tagging support" ++ depends on BRCMSTB && BCMGENET ++ ---help--- ++ This driver is for the debugging purpose. ++ This is not recommended. ++ + endif # NET_VENDOR_BROADCOM diff --git a/board/spectrum/hmx_bcmgenet_4.1-1.12.patch b/board/spectrum/hmx_bcmgenet_4.1-1.12.patch new file mode 100644 index 000000000000..fd7c50bdcff1 --- /dev/null +++ b/board/spectrum/hmx_bcmgenet_4.1-1.12.patch @@ -0,0 +1,728 @@ +diff -urN linux.old/drivers/net/ethernet/broadcom/Kconfig linux/drivers/net/ethernet/broadcom/Kconfig +--- linux.old/drivers/net/ethernet/broadcom/Kconfig 2018-02-14 15:06:22.900096805 +0900 ++++ linux/drivers/net/ethernet/broadcom/Kconfig 2018-02-14 15:16:03.640118878 +0900 +@@ -162,4 +162,11 @@ + Broadcom BCM7xxx Set Top Box family chipset using an internal + Ethernet switch. + ++config BCMGENET_TAG ++ tristate "Broadcom Ethernet Tagging support" ++ depends on BRCMSTB && BCMGENET ++ ---help--- ++ This driver is for the debugging purpose. ++ This is not recommended. ++ + endif # NET_VENDOR_BROADCOM +diff -urN linux.old/drivers/net/ethernet/broadcom/genet/Makefile linux/drivers/net/ethernet/broadcom/genet/Makefile +--- linux.old/drivers/net/ethernet/broadcom/genet/Makefile 2018-02-14 15:06:22.828096803 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/Makefile 2018-02-14 15:15:26.932117483 +0900 +@@ -1,2 +1,3 @@ + obj-$(CONFIG_BCMGENET) += genet.o ++obj-$(CONFIG_BCMGENET_TAG) += bcmgenet_tag.o + genet-objs := bcmgenet.o bcmmii.o bcmgenet_wol.o +diff -urN linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet.c linux/drivers/net/ethernet/broadcom/genet/bcmgenet.c +--- linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet.c 2018-02-14 15:06:22.864096804 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet.c 2018-02-14 15:11:23.044108213 +0900 +@@ -48,6 +48,10 @@ + + #include "bcmgenet.h" + ++#ifdef CONFIG_BCMGENET_TAG ++#include "bcmgenet_tag.h" ++#endif ++ + /* Maximum number of hardware queues, downsized if needed */ + #define GENET_MAX_MQ_CNT 4 + +@@ -2186,6 +2190,15 @@ + int ret; + int i; + ++#ifdef CONFIG_BCMGENET_TAG ++ ret = bcmgenet_tag_fixup(skb, dev); ++ if (!ret) ++ { ++ dev = skb->dev; ++ priv = netdev_priv(dev); ++ } ++#endif ++ + index = skb_get_queue_mapping(skb); + /* Mapping strategy: + * queue_mapping = 0, unclassified, packet xmited through ring16 +@@ -2463,6 +2476,21 @@ + if (dma_flag & DMA_RX_MULT) + dev->stats.multicast++; + ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ { ++ int id = bcmgenet_tag_search(skb, dev); ++ if (id >= 0) ++ { ++ struct net_device *alt_dev; ++ alt_dev = bcmgenet_tag_netdev(id); ++ if (alt_dev == NULL) ++ printk(KERN_INFO "keep original interface " BCMGENET_TAG_PARENT "\n"); ++ else ++ skb->dev = alt_dev; ++ } ++ } ++#endif + /* Notify kernel */ + napi_gro_receive(&ring->napi, skb); + netif_dbg(priv, rx_status, dev, "pushed up to kernel\n"); +@@ -4147,6 +4175,24 @@ + if (err) + goto err; + ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ { ++ int ret; ++ ++ ret = bcmgenet_tag_create(&(pdev->dev), dev); ++ if (ret < 0) { ++ printk(KERN_ERR "%s: can't create bcmgenet tag for %s\n", ++ __func__, dev->name); ++ return ret; ++ } ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: bcmgenet %s alias created for %s\n", ++ __func__, dev->name); ++#endif ++ } ++#endif + return err; + + err_clk_disable: +diff -urN linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c +--- linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.c 2018-02-14 15:12:21.776110445 +0900 +@@ -0,0 +1,574 @@ ++/*#define DEBUG*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct tag_dev ++{ ++ unsigned int tag; ++ unsigned char *name; ++ unsigned char name_assign_type; ++ unsigned char addr[4]; ++ struct net_device *dev; ++ bool enable; ++}; ++ ++struct tag_data ++{ ++ unsigned char len_h; ++ unsigned char len_l; ++ unsigned char magic; ++ unsigned char if_num; ++} __attribute((packed)); ++ ++#define MIN_PACKET_DATA_LEN 60 ++#define STB_TAG_LEN (sizeof(struct tag_data)) ++#define BRCM_TAG_LEN 0 ++ ++#define VDEV0_IFNUM 0x0 ++#define VDEV1_IFNUM 0x1 ++#define VDEV2_IFNUM 0x2 ++#define NUM_TAGS 0x03 ++#define TAG_MAGIC 0xAA ++ ++#define MAX_TAG_DEVS 3 ++ ++#include "bcmgenet.h" ++#include "bcmgenet_tag.h" ++ ++struct tag_priv ++{ ++ struct net_device *dev; ++ struct net_device *parent; ++ struct phy_device *phydev; ++}; ++ ++ ++struct tag_dev tag_devs[] = ++{ ++ { VDEV0_IFNUM, "bcm0", NET_NAME_USER, { 192, 168, 17, 10}, NULL, true }, ++ { VDEV1_IFNUM, "rgmii_2", NET_NAME_USER, { 0, 0, 0 ,0 }, NULL, false }, ++ { VDEV2_IFNUM, "rg0", NET_NAME_USER, { 192, 168, 0, 10}, NULL, true } ++}; ++ ++#ifdef DEBUG ++static void hex_dump(char *buf, int len) ++{ ++ print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, ++ 16, 1, buf, len, true); ++} ++#endif ++ ++void bcmgenet_tag_carrier_on() ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ dev = tag_devs[id].dev; ++ if (dev != NULL) ++ { ++ netif_carrier_on(tag_devs[id].dev); ++#ifdef DEBUG ++ printk(KERN_INFO "%s is now on\n", dev->name); ++#endif ++ } ++ } ++} ++ ++void bcmgenet_tag_carrier_off() ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ dev = tag_devs[id].dev; ++ if (dev != NULL) ++ { ++ netif_carrier_off(tag_devs[id].dev); ++#ifdef DEBUG ++ printk(KERN_INFO "%s is now off\n", dev->name); ++#endif ++ } ++ } ++} ++ ++int bcmgenet_tag_fixup(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ struct tag_data *stb_tag; ++ int origin, tailroom, len, pad; ++ int id; ++ int ret; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ if (skb->dev == tag_devs[id].dev) ++ break; ++ ++ if (id == MAX_TAG_DEVS) ++ { ++#ifdef DEBUG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ printk(KERN_ERR "Cannot find proper netdev for %s\n", dev->name); ++#endif ++ return -1; ++ } ++ ++ origin = skb->len; ++#ifdef DEBUG ++ printk(KERN_INFO "original packet length: %d\n", origin); ++#endif ++ ++ ++ if (skb->len < (MIN_PACKET_DATA_LEN - STB_TAG_LEN)) ++ { ++ pad = (MIN_PACKET_DATA_LEN - STB_TAG_LEN) - skb->len; ++ tailroom = skb_tailroom(skb); ++ if (tailroom < pad) ++ { ++ int ret = pskb_expand_head(skb, 0, pad - skb_tailroom(skb), GFP_ATOMIC); ++ if (ret < 0) ++ { ++#ifdef DEBUG ++ printk(KERN_ERR "Cannot expand skb\n"); ++#endif ++ return ret; ++ } ++ } ++ skb_put(skb, pad); ++#ifdef DEBUG ++ printk(KERN_INFO "1st put packet length: %d\n", skb->len); ++#endif ++ } ++ ++ { ++ pad = STB_TAG_LEN; ++ tailroom = skb_tailroom(skb); ++ if (tailroom < pad) ++ { ++ int ret = pskb_expand_head(skb, 0, pad - skb_tailroom(skb), GFP_ATOMIC); ++ if (ret < 0) ++ { ++#ifdef DEBUG ++ printk(KERN_ERR "Cannot expand skb\n"); ++#endif ++ return ret; ++ } ++ } ++ skb_put(skb, pad); ++ len = skb->len - STB_TAG_LEN; ++ } ++ ++#ifdef DEBUG ++ printk(KERN_INFO "put packet length: %d\n", skb->len); ++#endif ++ ++ stb_tag = (struct tag_data *)(skb_tail_pointer(skb) - sizeof(struct tag_data)); ++ stb_tag->len_h = (unsigned char) (len >> 8); ++ stb_tag->len_l = (unsigned char) (len); ++ stb_tag->magic = (unsigned char) (TAG_MAGIC); ++ stb_tag->if_num = (unsigned char) tag_devs[id].tag; ++ ++ skb->dev = parent; ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: A packet is forwarded from %s to %s\n", __func__, dev->name, skb->dev->name); ++ printk(KERN_INFO "%s: dev=%s, origin=%d, len=%d (pad=%d)\n", ++ __func__, skb->dev->name, origin, skb->len, pad); ++ hex_dump(skb->data, skb->len); ++#endif ++ ++ return 0; ++} ++ ++int bcmgenet_tag_search(struct sk_buff *skb, struct net_device *dev) ++{ ++ unsigned int f_len; ++ int len = skb->len; ++ int id; ++ ++ if (strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ return -1; ++ ++ f_len = skb->data[len - 2]; ++ f_len <<= 8; ++ f_len |= skb->data[len - 1]; ++ f_len -= ETH_HLEN; ++ ++ id = ((len - f_len) / 2) - 1; ++ ++ if (id >= NUM_TAGS) ++ id = VDEV1_IFNUM; ++ ++#ifdef DEBUG ++ printk(KERN_INFO "%s: dev=%s, id=%d, len=%d (pad=%d)\n", ++ __func__, skb->dev->name, id, skb->len, len - f_len); ++ hex_dump(skb->data, skb->len); ++#endif ++ ++ skb_trim(skb, f_len); ++ ++ return id; ++} ++ ++struct net_device* bcmgenet_tag_netdev(int id) ++{ ++ if (id < 0 || id > MAX_TAG_DEVS) ++ return NULL; ++ ++ return tag_devs[id].dev; ++} ++ ++/* ++ * netdev_ops ++ */ ++static int bcmgenet_tag_init(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ dev->group = p->parent->ifindex; ++ ++ return 0; ++} ++ ++static int bcmgenet_tag_open(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ int err; ++ ++ if (!(parent->flags & IFF_UP)) ++ return -ENETDOWN; ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) { ++ err = dev_uc_add(parent, dev->dev_addr); ++ if (err < 0) ++ goto out; ++ } ++ ++ if (dev->flags & IFF_ALLMULTI) { ++ err = dev_set_allmulti(parent, 1); ++ if (err < 0) ++ goto del_unicast; ++ } ++ if (dev->flags & IFF_PROMISC) { ++ err = dev_set_promiscuity(parent, 1); ++ if (err < 0) ++ goto clear_allmulti; ++ } ++ ++ return 0; ++ ++clear_allmulti: ++ if (dev->flags & IFF_ALLMULTI) ++ dev_set_allmulti(parent, -1); ++del_unicast: ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++out: ++ return err; ++} ++ ++static int bcmgenet_tag_close(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ dev_mc_unsync(parent, dev); ++ dev_uc_unsync(parent, dev); ++ if (dev->flags & IFF_ALLMULTI) ++ dev_set_allmulti(parent, -1); ++ if (dev->flags & IFF_PROMISC) ++ dev_set_promiscuity(parent, -1); ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++ ++ return 0; ++} ++ ++static void bcmgenet_tag_change_rx_flags(struct net_device *dev, int change) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (change & IFF_ALLMULTI) ++ dev_set_allmulti(parent, dev->flags & IFF_ALLMULTI ? 1 : -1); ++ if (change & IFF_PROMISC) ++ dev_set_promiscuity(parent, dev->flags & IFF_PROMISC ? 1 : -1); ++} ++ ++static void bcmgenet_tag_set_rx_mode(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ dev_mc_sync(parent, dev); ++ dev_uc_sync(parent, dev); ++} ++ ++static int bcmgenet_tag_set_mac_address(struct net_device *dev, void *a) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ struct sockaddr *addr = a; ++ int err; ++ ++ if (!is_valid_ether_addr(addr->sa_data)) ++ return -EADDRNOTAVAIL; ++ ++ if (!(dev->flags & IFF_UP)) ++ goto out; ++ ++ if (!ether_addr_equal(addr->sa_data, parent->dev_addr)) { ++ err = dev_uc_add(parent, addr->sa_data); ++ if (err < 0) ++ return err; ++ } ++ ++ if (!ether_addr_equal(dev->dev_addr, parent->dev_addr)) ++ dev_uc_del(parent, dev->dev_addr); ++ ++out: ++ ether_addr_copy(dev->dev_addr, addr->sa_data); ++ ++ return 0; ++} ++ ++static int bcmgenet_tag_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (parent->phydev != NULL) ++ return phy_mii_ioctl(parent->phydev, ifr, cmd); ++ else{ ++ if(dev) ++ printk(KERN_ERR "bcmgenet_tag_ioctl: %s NULL\n" , dev->name); ++ else ++ printk(KERN_ERR "bcmgenet_tag_ioctl: dev is NULL\n"); ++ } ++ return -EOPNOTSUPP; ++} ++ ++static netdev_tx_t bcmgenet_tag_xmit(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ return parent->netdev_ops->ndo_start_xmit(skb, dev); ++} ++ ++static const struct net_device_ops bcmgenet_tag_netdev_ops = { ++ .ndo_init = bcmgenet_tag_init, ++ .ndo_open = bcmgenet_tag_open, ++ .ndo_stop = bcmgenet_tag_close, ++ .ndo_start_xmit = bcmgenet_tag_xmit, ++ .ndo_change_rx_flags = bcmgenet_tag_change_rx_flags, ++ .ndo_set_rx_mode = bcmgenet_tag_set_rx_mode, ++ .ndo_set_mac_address = bcmgenet_tag_set_mac_address, ++ .ndo_do_ioctl = bcmgenet_tag_ioctl, ++}; ++ ++/* ++ * ethtool_ops ++ */ ++static int bcmgenet_tag_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ int err; ++ ++ err = -EOPNOTSUPP; ++ if (p->phydev != NULL) { ++ err = phy_read_status(p->phydev); ++ if (err == 0) ++ err = phy_ethtool_gset(p->phydev, cmd); ++ } ++ ++ return err; ++} ++ ++static int bcmgenet_tag_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) ++ return phy_ethtool_sset(p->phydev, cmd); ++ ++ return -EOPNOTSUPP; ++} ++ ++static void bcmgenet_tag_get_drvinfo(struct net_device *dev, ++ struct ethtool_drvinfo *drvinfo) ++{ ++ strlcpy(drvinfo->driver, "bcmgenet_tag", sizeof(drvinfo->driver)); ++ strlcpy(drvinfo->version, "0.1", sizeof(drvinfo->version)); ++ strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version)); ++ strlcpy(drvinfo->bus_info, "platform", sizeof(drvinfo->bus_info)); ++} ++ ++static int bcmgenet_tag_nway_reset(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) ++ return genphy_restart_aneg(p->phydev); ++ ++ return -EOPNOTSUPP; ++} ++ ++static u32 bcmgenet_tag_get_link(struct net_device *dev) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ ++ if (p->phydev != NULL) { ++ genphy_update_link(p->phydev); ++ return p->phydev->link; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static void bcmgenet_tag_get_strings(struct net_device *dev, ++ uint32_t stringset, uint8_t *data) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (stringset == ETH_SS_STATS) { ++ int len = ETH_GSTRING_LEN; ++ ++ strncpy(data, "tx_packets", len); ++ strncpy(data + len, "tx_bytes", len); ++ strncpy(data + 2 * len, "rx_packets", len); ++ strncpy(data + 3 * len, "rx_bytes", len); ++ if (parent->ethtool_ops->get_strings != NULL) ++ parent->ethtool_ops->get_strings(parent, stringset, data + 4 * len); ++ } ++} ++ ++static void bcmgenet_tag_get_ethtool_stats(struct net_device *dev, ++ struct ethtool_stats *stats, ++ uint64_t *data) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ data[0] = p->dev->stats.tx_packets; ++ data[1] = p->dev->stats.tx_bytes; ++ data[2] = p->dev->stats.rx_packets; ++ data[3] = p->dev->stats.rx_bytes; ++ if (parent->ethtool_ops->get_ethtool_stats != NULL) ++ parent->ethtool_ops->get_ethtool_stats(parent, stats, data + 4); ++} ++ ++static int bcmgenet_tag_get_sset_count(struct net_device *dev, int sset) ++{ ++ struct tag_priv *p = netdev_priv(dev); ++ struct net_device *parent = p->parent; ++ ++ if (sset == ETH_SS_STATS) { ++ int count; ++ ++ count = 4; ++ if (parent->ethtool_ops->get_sset_count != NULL) ++ count += parent->ethtool_ops->get_sset_count(parent, sset); ++ ++ return count; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static const struct ethtool_ops bcmgenet_tag_ethtool_ops = { ++ .get_settings = bcmgenet_tag_get_settings, ++ .set_settings = bcmgenet_tag_set_settings, ++ .get_drvinfo = bcmgenet_tag_get_drvinfo, ++ .nway_reset = bcmgenet_tag_nway_reset, ++ .get_link = bcmgenet_tag_get_link, ++ .get_strings = bcmgenet_tag_get_strings, ++ .get_ethtool_stats = bcmgenet_tag_get_ethtool_stats, ++ .get_sset_count = bcmgenet_tag_get_sset_count, ++}; ++ ++static struct net_device * ++bcmgenet_tag_create_netdev(struct device *pdev, struct net_device *parent, char*name, char name_assign_type) ++{ ++ struct bcmgenet_priv *pp = netdev_priv(parent); ++ struct net_device *dev; ++ struct tag_priv *p; ++ int ret; ++ ++ dev = alloc_netdev(sizeof(struct tag_priv), ++ name, name_assign_type, ether_setup); ++ if (dev == NULL) ++ return NULL; ++ ++ dev->features = parent->vlan_features; ++ dev->ethtool_ops = &bcmgenet_tag_ethtool_ops; ++ eth_hw_addr_inherit(dev, parent); ++ dev->tx_queue_len = 0; ++ dev->netdev_ops = &bcmgenet_tag_netdev_ops; ++ ++ SET_NETDEV_DEV(dev, pdev); ++ dev->vlan_features = parent->vlan_features; ++ ++ p = netdev_priv(dev); ++ p->dev = dev; ++ p->parent = parent; ++ p->phydev = pp->phydev; ++ ++ ret = register_netdev(dev); ++ if (ret) { ++ printk(KERN_ERR "%s: error %d registering interface %s\n", ++ parent->name, ret, dev->name); ++ free_netdev(dev); ++ return NULL; ++ } ++ ++ netif_carrier_off(dev); ++ ++ return dev; ++} ++ ++int bcmgenet_tag_create(struct device *pdev, struct net_device *parent) ++{ ++ struct net_device *dev; ++ int id; ++ ++ for (id = 0; id < MAX_TAG_DEVS; id++) ++ { ++ if (tag_devs[id].enable) ++ { ++ dev = bcmgenet_tag_create_netdev(pdev, parent, tag_devs[id].name, tag_devs[id].name_assign_type); ++ if (dev == NULL) ++ return -EINVAL; ++ ++ tag_devs[id].dev = dev; ++#ifdef DEBUG ++ printk(KERN_INFO "%s: create tag interface %s-%s\n", ++ __func__, parent->name, dev->name); ++#endif ++ } ++ } ++ ++ return 0; ++} +diff -urN linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h +--- linux.old/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h 1970-01-01 09:00:00.000000000 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmgenet_tag.h 2018-02-14 15:12:21.792110446 +0900 +@@ -0,0 +1,12 @@ ++#ifndef _BCMGENET_TAG_H_ ++#define _BCMGENET_TAG_H_ ++ ++int bcmgenet_tag_create(struct device *pdev, struct net_device *parent); ++int bcmgenet_tag_fixup(struct sk_buff *skb, struct net_device *dev); ++int bcmgenet_tag_search(struct sk_buff *skb, struct net_device *dev); ++void bcmgenet_tag_carrier_on(void); ++void bcmgenet_tag_carrier_off(void); ++struct net_device* bcmgenet_tag_netdev(int id); ++ ++#define BCMGENET_TAG_PARENT "eth0" ++#endif +diff -urN linux.old/drivers/net/ethernet/broadcom/genet/bcmmii.c linux/drivers/net/ethernet/broadcom/genet/bcmmii.c +--- linux.old/drivers/net/ethernet/broadcom/genet/bcmmii.c 2018-02-14 15:06:22.812096802 +0900 ++++ linux/drivers/net/ethernet/broadcom/genet/bcmmii.c 2018-02-14 15:15:01.416116513 +0900 +@@ -26,6 +26,7 @@ + #include + + #include "bcmgenet.h" ++#include "bcmgenet_tag.h" + + /* read a value from the MII */ + static int bcmgenet_mii_read(struct mii_bus *bus, int phy_id, int location) +@@ -183,6 +184,11 @@ + CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE); + reg |= cmd_bits; + bcmgenet_umac_writel(priv, reg, UMAC_CMD); ++ ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ bcmgenet_tag_carrier_on(); ++#endif + } else { + /* done if nothing has changed */ + if (!status_changed) +@@ -190,6 +196,11 @@ + + /* needed for MoCA fixed PHY to reflect correct link status */ + netif_carrier_off(dev); ++ ++#ifdef CONFIG_BCMGENET_TAG ++ if (!strcmp(dev->name, BCMGENET_TAG_PARENT)) ++ bcmgenet_tag_carrier_off(); ++#endif + } + + phy_print_status(phydev); diff --git a/board/spectrum/linux.config b/board/spectrum/linux.config new file mode 100644 index 000000000000..d2459fcb71b4 --- /dev/null +++ b/board/spectrum/linux.config @@ -0,0 +1,498 @@ +CONFIG_KERNEL_XZ=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BRCMSTB=y +CONFIG_BCMGENET=y +CONFIG_ARM_LPAE=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +CONFIG_PCIE_BRCMSTB=y +CONFIG_SMP=y +CONFIG_ARM_PSCI=y +CONFIG_ARM_PTDUMP=y +CONFIG_HZ_1000=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_CFG80211=y +CONFIG_WIRELESS=y +CONFIG_CMA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +# CONFIG_KEXEC is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_BRCMSTB_CPUFREQ=y +CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPU_IDLE=y +CONFIG_CRAMFS=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_UDP_DIAG=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=y +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +CONFIG_BRIDGE=y +CONFIG_NET_DSA=y +CONFIG_NET_SWITCHDEV=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DMA_CMA=y +CONFIG_CMA_ALIGNMENT=9 +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_EEPROM_93CX6=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_BRCMSTB=y +CONFIG_NETDEVICES=y +CONFIG_NET_DSA_BCM_SF2=y +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set +CONFIG_SYSTEMPORT=y +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_E1000E=y +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_USB_PEGASUS=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_INPUT_EVDEV=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MPU3050=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_HW_RANDOM=y +CONFIG_I2C_CHARDEV=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_RESET=y +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_INTEL_POWERCLAMP=y +CONFIG_BRCMSTB_THERMAL=y +CONFIG_MFD_SYSCON=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_GSPCA=y +CONFIG_DRM=y +# CONFIG_VGA_ARB is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_BRCMSTB_BMEM=y +CONFIG_BRCMSTB_CMA=y +CONFIG_BRCMSTB_MEMORY_API=y +CONFIG_BRCMSTB_SRPD=y +CONFIG_BRCMSTB_WKTMR=y +CONFIG_BRCMSTB_NEXUS_API=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_BRCMSTB_SATA=y +CONFIG_EXT4_FS=y +CONFIG_JBD2_DEBUG=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_REDUCED=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_BRCMSTB_UART=y +CONFIG_EARLY_PRINTK=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set +CONFIG_CRC_CCITT=y +CONFIG_RTC_CLASS=y +CONFIG_USB_GADGET=y +CONFIG_USB_BDC_UDC=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_MASS_STORAGE=y +CONFIG_VDSO=n + +# devtmpfs + +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y + +# cgroups + +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_FREEZER=y + +# Autofs + +CONFIG_AUTOFS4_FS=y + +# fhandle + +CONFIG_FHANDLE=y + +# fnotify + +CONFIG_FANOTIFY=y + +# CONFIG_LEGACY_PTYS is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_INET_TUNNEL=y +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_BRIDGE_NETFILTER=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_ECN=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_ARPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_MANGLE=y + +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_NF_CONNTRACK_BROADCAST=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_TARGET_DSCP=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_TCPMSS=y +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_IPV4=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_H323=y +CONFIG_NF_NAT_SIP=y +CONFIG_VDSO=n + +# devtmpfs + +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y + +# cgroups + +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_FREEZER=y + +# Autofs + +CONFIG_AUTOFS4_FS=y + +# fhandle + +CONFIG_FHANDLE=y + +# fnotify + +CONFIG_FANOTIFY=y + +# CONFIG_LEGACY_PTYS is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_INET_TUNNEL=y +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +CONFIG_BRIDGE_NETFILTER=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_ECN=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_ARPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_MANGLE=y + +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_NF_CONNTRACK_BROADCAST=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_TARGET_DSCP=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_TCPMSS=y +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_IPV4=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_H323=y +CONFIG_NF_NAT_SIP=y + +CONFIG_BCMGENET_TAG=y diff --git a/board/spectrum/rootfs/etc/init.d/S75spectrum b/board/spectrum/rootfs/etc/init.d/S75spectrum deleted file mode 100755 index 25f6f4530502..000000000000 --- a/board/spectrum/rootfs/etc/init.d/S75spectrum +++ /dev/null @@ -1,34 +0,0 @@ -#!/bin/sh - -PERSISTENT=/root - -start() { - #sleep for nxserver to come up - sleep 2 - /etc/init.d/periodicSync & -} -stop() { - killall periodicSync -} -restart() { - stop - sleep 1 - start -} - -case "$1" in - start) - start - ;; - stop) - stop - ;; - restart|reload) - restart - ;; - *) - echo "Usage: $0 {start|stop|restart}" - exit 1 -esac - -exit $? diff --git a/board/spectrum/rootfs/etc/init.d/periodicSync b/board/spectrum/rootfs/etc/init.d/periodicSync deleted file mode 100755 index 85400c3672f6..000000000000 --- a/board/spectrum/rootfs/etc/init.d/periodicSync +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -while true -do - sync - sleep 3 -done - diff --git a/configs/spectrum_wpe_defconfig b/configs/spectrum_wpe_defconfig index 190c167992f9..8f6b81c10624 100644 --- a/configs/spectrum_wpe_defconfig +++ b/configs/spectrum_wpe_defconfig @@ -4,32 +4,33 @@ BR2_ARM_FPU_NEON_VFPV4=y BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_OPTIMIZE_2=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y +BR2_BINUTILS_VERSION_2_24_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_GCC_ENABLE_LTO=y +BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" BR2_SYSTEM_DHCP="eth1" BR2_ROOTFS_OVERLAY="board/spectrum/rootfs" -BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/clean-rootfs.sh board/spectrum/add_spectrum.py" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/clean-rootfs.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y -BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-3.14.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="3.14-1.14" -BR2_LINUX_KERNEL_PATCH="board/bcm/linux-7252.patch board/spectrum/hmx_bcmgenet.patch" -#BR2_LINUX_KERNEL_USE_DEFCONFIG=y -#BR2_LINUX_KERNEL_DEFCONFIG="brcmstb" -#BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="board/bcm/bcm_base_defconfig board/bcm/bcm7250_defconfig board/spectrum/hmx_bcmgenet.cfg" +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.9hf" +BR2_LINUX_KERNEL_PATCH="board/spectrum/hmx_bcmgenet_4.1-1.12.patch" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/spectrum/hmx_3.14-1.14_config.cfg" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/spectrum/linux.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y @@ -37,53 +38,61 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_16_2=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7250=y +BR2_PACKAGE_BCM_REFSW_17_3_RDK=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_ORC=y -BR2_PACKAGE_ICU_USE_ICUDATA=y -BR2_PACKAGE_SHARED_MIME_INFO=y -BR2_PACKAGE_DROPBEAR=y -BR2_PACKAGE_GESFTPSERVER=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_LIBPROVISION=y BR2_PACKAGE_NETFLIX=y BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_NETFLIX_KEYMAP="PartnerBridge_BCM.js" BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_WEBBRIDGE=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_TRACECONTROL=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_MONITOR=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_PROVISIONING=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBPROXY=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_REMOTECONTROL=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_IRNEXUS=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_IRNEXUS_MODE="4" -BR2_PACKAGE_WEBBRIDGE_PLUGIN_DEVICEINFO=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_NETFLIX=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_AUTOSTART=n -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_STARTURL="about:blank" -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Spectrum" -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,networkprocess:50m,webprocess:300m,rpcprocess:50m" -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_DISKCACHE="90m" -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_TRANSPARENT=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_XHRCACHE=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_YOUTUBE=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_DIALSERVER=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y +BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO=y +# BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC is not set +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,networkprocess:50m,webprocess:170m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_GST1_BCM_VP9_SUPPORT=n + BR2_TARGET_ROOTFS_UBIFS=y BR2_TARGET_ROOTFS_UBIFS_LEBSIZE=126976 BR2_TARGET_ROOTFS_UBIFS_MINIOSIZE=2048 diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index 1adde60952e4..e2b9699c6d61 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -6,7 +6,7 @@ BCM_REFSW_PLATFORM_REV = A0 BCM_REFSW_BCHP_CHIP = 7437 BCM_REFSW_BCHP_VER_LOWER = a0 BCM_REFSW_MAKE_ENV += \ - NEXUS_USE_74371_XID="y" + NEXUS_USE_74371_XID="y" else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7271),y) BCM_REFSW_PLATFORM = 97271 BCM_REFSW_PLATFORM_REV = B0 @@ -24,7 +24,13 @@ BCM_REFSW_PLATFORM_REV = B0 BCM_REFSW_PLATFORM_VC = vc5 BCM_REFSW_BCHP_CHIP = 7250 BCM_REFSW_BCHP_VER_LOWER = b0 -BCM_REFSW_MAKE_ENV += NEXUS_USE_7250_SV=y +BCM_REFSW_MAKE_ENV += ARM_PLATFORM='yes' \ + NEXUS_USE_7250_CABLE="y" \ + NEXUS_SECURITY_SUPPORT="n" \ + NEXUS_PLATFORM_7250_CABLE='y' \ + NEXUS_PLATFORM_DOCSIS_BCM33843_SUPPORT='y' \ + NEXUS_PLATFORM_DOCSIS_IB_SUPPORT='y' \ + NEXUS_PLATFORM_DOCSIS_OOB_SUPPORT='y' else BCM_REFSW_PLATFORM = 97439 BCM_REFSW_PLATFORM_REV = B0 @@ -34,14 +40,14 @@ BCM_REFSW_BCHP_CHIP = 7439 BCM_REFSW_BCHP_VER_LOWER = b0 endif BCM_REFSW_MAKE_ENV += \ - NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE + NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE else ifeq ($(BR2_mipsel),y) ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7425),y) BCM_REFSW_PLATFORM = 97425 BCM_REFSW_PLATFORM_REV = B2 BCM_REFSW_MAKE_ENV += \ - NEXUS_USE_7425_VMS_SFF=y \ - NEXUS_USE_FRONTEND_DAUGHTER_CARD=y + NEXUS_USE_7425_VMS_SFF=y \ + NEXUS_USE_FRONTEND_DAUGHTER_CARD=y else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7428),y) BCM_REFSW_PLATFORM = 97428 BCM_REFSW_PLATFORM_REV = B0 @@ -54,4 +60,4 @@ BCM_REFSW_PLATFORM_REV = B0 endif BCM_REFSW_PLATFORM_VC = v3d BCM_REFSW_MAKE_ENV += NEXUS_ENDIAN=BSTD_ENDIAN_BIG -endif \ No newline at end of file +endif From 1ce2754eb1d27eada3f0217fe791bbb806d6a3ff Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 6 Aug 2018 15:58:14 +0200 Subject: [PATCH 323/614] [uma]: update uma related build flags for refsw --- board/uma/linux-3-14.config | 2 +- package/bcm-refsw/bcm-refsw.mk | 8 +++++ package/bcm-refsw/nexus.inc | 54 ++++++++++++++++++++++++++++++++++ package/netflix5/netflix5.mk | 5 +++- 4 files changed, 67 insertions(+), 2 deletions(-) diff --git a/board/uma/linux-3-14.config b/board/uma/linux-3-14.config index 58030295f5b9..4ab72ec0d1e0 100644 --- a/board/uma/linux-3-14.config +++ b/board/uma/linux-3-14.config @@ -545,7 +545,7 @@ CONFIG_ATAGS=y CONFIG_ZBOOT_ROM_TEXT=0 CONFIG_ZBOOT_ROM_BSS=0 # CONFIG_ARM_APPENDED_DTB is not set -CONFIG_CMDLINE="vmalloc=342m bmem=659m@1389m" +#CONFIG_CMDLINE="vmalloc=342m bmem=659m@1389m" # CONFIG_CMDLINE_FROM_BOOTLOADER is not set CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 196b3eb19ed0..1cddcd7e3a05 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -84,6 +84,10 @@ endif ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE),y) BCM_REFSW_MAKE_ENV += SAGE_SUPPORT=y +BCM_REFSW_MAKE_ENV += NEXUS_COMMON_CRYPTO_SUPPORT=y \ + BMRC_ALLOW_XPT_TO_ACCESS_KERNEL=y \ + NEXUS_HDCP_SUPPORT=y \ + URSR_TOP="$(BCM_REFSW_DIR)" else BCM_REFSW_MAKE_ENV += SAGE_SUPPORT=n endif @@ -138,6 +142,8 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_PMLIB) $(BCM_REFSW_BUILD_GRAPHICS) $(BCM_REFSW_BUILD_EGLCUBE) + $(BCM_REFSW_BUILD_SAGE_SRAI) + $(BCM_REFSW_BUILD_SAGE_PRDY30_SVP) $(BCM_REFSW_BUILD_WAYLAND_EGL) $(BCM_REFSW_BUILD_NEXUS_LIBB_OS) endef @@ -147,6 +153,7 @@ define BCM_REFSW_INSTALL_STAGING_CMDS $(call BCM_REFSW_INSTALL_GRAPHICS_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NXSERVER_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_WAYLAND_EGL_DEV, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_SAGE_SRAI_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_PMLIB_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS_DEV, $(STAGING_DIR)) endef @@ -158,6 +165,7 @@ define BCM_REFSW_INSTALL_TARGET_CMDS $(call BCM_REFSW_INSTALL_NXSERVER, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_EGLCUBE, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_WAYLAND_EGL, $(TARGET_DIR)) + $(call BCM_REFSW_INSTALL_SAGE_SRAI, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS, $(TARGET_DIR)) endef diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index fec3b4a79193..87118d006cbd 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -55,6 +55,60 @@ define BCM_REFSW_BUILD_EGLCUBE endef endif +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE),y) + +BCM_NEXUS_SAGE_SRAI_DIR = /BSEAV/lib/security/sage/srai +BCM_MAGNUM_SAGE_SRAI_DIR = /magnum/syslib/sagelib +define BCM_REFSW_BUILD_SAGE_SRAI + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR) \ + LIBDIR=${BCM_REFSW_BIN} +endef +BCM_NEXUS_SAGE_UTILITY_DIR = /BSEAV/lib/security/sage/utility +define BCM_REFSW_BUILD_SAGE_UTILITY + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_UTILITY_DIR) all \ + LIBDIR=${BCM_REFSW_BIN} +endef + +BCM_NEXUS_SAGE_EXAMPLE_DIR = /BSEAV/lib/security/sage/utility/examples/heartbeat +define BCM_REFSW_BUILD_SAGE_EXAMPLE + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_EXAMPLE_DIR) \ + LIBDIR=${BCM_REFSW_BIN} +endef + +BCM_NEXUS_SAGE_PRDY30_SVP_DIR = /BSEAV/thirdparty/playready/3.0/examples +define BCM_REFSW_BUILD_SAGE_PRDY30_SVP + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_PRDY30_SVP_DIR) target=prdy30_svp all \ + LIBDIR=${BCM_REFSW_BIN} +endef + +define BCM_REFSW_INSTALL_SAGE_SRAI + $(INSTALL) -D $(BCM_REFSW_BIN)/libsrai.so $(1)/usr/lib/libsrai.so +endef + +define BCM_REFSW_INSTALL_SAGE_SRAI_DEV + $(call BCM_REFSW_INSTALL_SAGE_SRAI,$(1)) + $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ + $(INSTALL) -m 644 $(@D)/$(BCM_MAGNUM_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +endef +endif + + ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) define BCM_REFSW_INSTALL_WAKEUP $(INSTALL) -D -m 755 package/bcm-refsw/S11wakeup $1/etc/init.d/S11wakeup diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index b95ada9a6fca..a7a83e02d34a 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -8,7 +8,7 @@ NETFLIX5_VERSION = ea2d825345af5477514f63ff2f54be73ab6fc055 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY -NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework playready gst1-plugins-base +NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework gst1-plugins-base NETFLIX5_INSTALL_TARGET = YES NETFLIX5_INSTALL_STAGING = YES NETFLIX5_SUBDIR = netflix @@ -17,6 +17,9 @@ NETFLIX5_RESOURCE_LOC = $(call qstrip,${BR2_PACKAGE_NETFLIX5_RESOURCE_LOCATION}) NETFLIX5_CONF_ENV += TOOLCHAIN_DIRECTORY=$(STAGING_DIR)/usr LD=$(TARGET_CROSS)ld NETFLIX_CONF_ENV += TARGET_CROSS="$(GNU_TARGET_NAME)-" +ifeq ($(BR2_PACKAGE_PLAYREADY), y) +NETFLIX5_DEPENDENCIES += playready +endif # TODO: disable hardcoded build type, check if all args are really needed. NETFLIX5_CONF_OPTS = \ -DBUILD_DPI_DIRECTORY=$(@D)/partner/dpi \ From a90a1e4b5c5fdc59710078d4419779d1345a7ba4 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 17 Jul 2018 14:53:51 +0200 Subject: [PATCH 324/614] [wpeframework-plugins] nexus options depend on HAS_NEXUS instead of BCM_REFSW --- package/wpe/wpeframework-plugins/Config.in | 2 +- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 517bda39996b..6a30693623c0 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -27,7 +27,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER bool "Nexus server" - depends on BR2_PACKAGE_BCM_REFSW + depends on BR2_PACKAGE_HAS_NEXUS help Include a nxserver with the compositor. diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 55cc7bddd052..8a588f85c8de 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -237,8 +237,10 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATIO else ifeq ($(BR2_PACKAGE_BCM_REFSW),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += bcm-refsw WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus +else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus else -$(error Missing a compositor implemtation, please introduce one or disable WPEFRAMEWORK_PLUGIN_COMPOSITOR) +$(error Missing a compositor implemtation, please provide one or disable WPEFRAMEWORK_PLUGIN_COMPOSITOR) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS=true From cdf7b719952dfc46c250e47e422ba285aae095ef Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 17 Jul 2018 14:56:37 +0200 Subject: [PATCH 325/614] [board] Add Compositor to the copy list --- board/bcm/vss.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt index 1a1b4513f16f..336420a68af9 100644 --- a/board/bcm/vss.txt +++ b/board/bcm/vss.txt @@ -13,6 +13,7 @@ libWPEBackend-default.so libWPEBackend-rdk.so libWPEBackend.so libWPEFrameworkCore.so +libWPEFrameworkCompositor.so libWPEFrameworkCryptalgo.so libWPEFrameworkDIALServer.so libWPEFrameworkDeviceInfo.so From d85637569c10f6b5ea99131c28c3af825e102c8e Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 7 Aug 2018 12:18:08 +0200 Subject: [PATCH 326/614] [vgdrm] Add new package --- package/Config.in | 1 + package/vgdrm/Config.in | 4 ++++ package/vgdrm/vgdrm.mk | 26 ++++++++++++++++++++++++++ 3 files changed, 31 insertions(+) create mode 100644 package/vgdrm/Config.in create mode 100644 package/vgdrm/vgdrm.mk diff --git a/package/Config.in b/package/Config.in index d053f1e80fb6..eebe77f7b8d3 100644 --- a/package/Config.in +++ b/package/Config.in @@ -167,6 +167,7 @@ endmenu menu "Digital rights management" source "package/playready/Config.in" source "package/widevine/Config.in" + source "package/vgdrm/Config.in" endmenu menu "Filesystem and flash utilities" diff --git a/package/vgdrm/Config.in b/package/vgdrm/Config.in new file mode 100644 index 000000000000..ec7d511a7037 --- /dev/null +++ b/package/vgdrm/Config.in @@ -0,0 +1,4 @@ +config BR2_PACKAGE_VGDRM + bool "vgdrm" + help + Cisco VG DRM diff --git a/package/vgdrm/vgdrm.mk b/package/vgdrm/vgdrm.mk new file mode 100644 index 000000000000..1b0b65d17abc --- /dev/null +++ b/package/vgdrm/vgdrm.mk @@ -0,0 +1,26 @@ +################################################################################ +# +# vgdrm +# +################################################################################ +VGDRM_VERSION = 248e0d83b3c96adc6b2a530d96c2b9cc73035de1 +VGDRM_SITE = git@github.com:Metrological/vgdrm.git +VGDRM_SITE_METHOD = git +VGDRM_LICENSE = PROPRIETARY +VGDRM_INSTALL_STAGING = YES +VGDRM_INSTALL_TARGET = YES + +define VGDRM_BUILD_CMDS +endef + +define VGDRM_INSTALL_STAGING_CMDS + cp -av ${@D}/usr ${STAGING_DIR} + cp -av ${@D}/etc ${STAGING_DIR} +endef + +define VGDRM_INSTALL_TARGET_CMDS + cp -av ${@D}/usr/lib/lib*.so* ${STAGING_DIR}/usr/lib + cp -av ${@D}/etc ${TARGET_DIR} +endef + +$(eval $(generic-package)) From 13891be0b3fda084523ed63a6524cb1b709b7a83 Mon Sep 17 00:00:00 2001 From: Anjali Rajan Date: Tue, 7 Aug 2018 13:26:02 +0000 Subject: [PATCH 327/614] [WPEFramework Plug-in] Added configuration for dummy ds-hal library --- package/wpe/wpeframework-plugins/Config.in | 10 ++++++++++ .../wpe/wpeframework-plugins/wpeframework-plugins.mk | 3 +++ 2 files changed, 13 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 374cb0ab70f7..5d9b59dbc942 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -71,6 +71,16 @@ config BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION help DSResolution Plugin +if BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION + +config BR2_PACKAGE_DSRESOLUTION_WITH_DUMMY_DSHAL + bool "Create a Dummy ds-hal Lib" + default n + help + This option allows to create ds-hal.so, + +endif + config BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "DHCPServer" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index b34aff332888..3acc728a2092 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -27,6 +27,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DSRESOLUTION=ON +ifeq ($(BR2_PACKAGE_DSRESOLUTION_WITH_DUMMY_DSHAL), y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DDSRESOLUTION_WITH_DUMMY_DSHAL=ON +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER),y) From 951cd2b517102284bc17350a39caf6e96d49e98a Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 7 Aug 2018 22:14:01 +0200 Subject: [PATCH 328/614] [bcm-refsw] Now examples actually build --- package/bcm-refsw/nxserver.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/bcm-refsw/nxserver.inc b/package/bcm-refsw/nxserver.inc index 193f56337e8f..6d6c74bdbd59 100644 --- a/package/bcm-refsw/nxserver.inc +++ b/package/bcm-refsw/nxserver.inc @@ -8,7 +8,7 @@ define BCM_REFSW_BUILD_NXSERVER LIBDIR=${BCM_REFSW_BIN} endef -ifeq ($(BR2_PACKAGE_BCM_REFSW_BUILD_NXCLIENT_EXAMPLES),y) +ifeq ($(BR2_PACKAGE_BCM_REFSW_NXCLIENT_EXAMPLES),y) define BCM_REFSW_BUILD_NXCLIENT_EXAMPLES $(TARGET_CONFIGURE_OPTS) \ $(TARGET_MAKE_ENV) \ From 43edff2e6ce828bba10ea91ff7eda120679585cf Mon Sep 17 00:00:00 2001 From: modeveci Date: Wed, 8 Aug 2018 21:14:16 +0200 Subject: [PATCH 329/614] [uma]: update uma profile to use new kernel 4.1 and introduce some flags to make frontend building --- board/uma/linux-4.1.config | 267 + .../02_TT_USB_TestCommands.patch | 0 .../03_kstorman.patch | 0 .../04_jffs2_nooob_write.patch | 0 .../05_inherited-caps.patch | 0 .../06_manage-hardlink-incpio.patch | 0 .../09_make_initramfs_RO.patch | 0 .../10_bootargs_append_in_dtb.patch | 0 .../12_systool.patch | 0 ...40_espial_hardwire_ubictrl_minor_dev.patch | 0 .../41_espial_chardev_preassigned.patch | 0 .../42_espial_settime_security_check.patch | 0 .../43_max_dgram_qlen.patch | 0 .../44_espial_blkdev_preassigned.patch | 0 .../44_espial_read_kmsg_from_logger.patch | 0 ...c8a33eec78289b1b3f6e10874719c27ce0a7.patch | 0 ...3ee2517303afa54ad6cbd9342a2f748cf509.patch | 0 ...71887fcba470ff9265c65cff7d14d9e0e3f9.patch | 0 ...5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch | 0 ...571bb8940a189322cc5f51466bdab044a48b.patch | 0 ...8926f337ff4de49a8fb512aa4a55df0c502d.patch | 0 ...36bc4a2639af0e77b3a05460e8367e3187a4.patch | 0 ...70725339c41d1cd9be4da4ca0d968119d8ad.patch | 0 ...6496758d19de2431ebf163337fc7b92f8c45.patch | 0 ...c2905f745c8b1920a335cbb366ba6b0fc754.patch | 0 ...22a1b3b9e8ee231913c500f73c6988b1aff5.patch | 0 ...83be973dc990f3763de3667c4cd004e6e4f7.patch | 0 ...d05799976c0611dcb229649260504b2bdef5.patch | 0 ...71bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch | 0 .../99_kernel_stricter_compiler.patch | 0 ...t-legacy-driver-from-kernel-v3.14.28.patch | 57865 ++++++++++++++++ ...-brcmstb_nand-ucorrectable-ECC-error.patch | 28 + .../patches_4.1/04_jffs2_nooob_write.patch | 133 + board/uma/patches_4.1/brcm_usb_legacy.cfg | 4 + board/uma/patches_4.1/nand.cfg | 11 + board/uma/patches_4.1/spare_area_calc.patch | 26 + configs/uma7439_full_wpe_nf_defconfig | 15 +- package/bcm-refsw/bcm-refsw.mk | 1 - package/bcm-refsw/platforms.inc | 6 +- package/gstreamer1/gst1-bcm/Config.in | 13 + package/gstreamer1/gst1-bcm/gst1-bcm.mk | 7 + 41 files changed, 58368 insertions(+), 8 deletions(-) create mode 100644 board/uma/linux-4.1.config rename board/uma/{patches => patches_3.14}/02_TT_USB_TestCommands.patch (100%) rename board/uma/{patches => patches_3.14}/03_kstorman.patch (100%) rename board/uma/{patches => patches_3.14}/04_jffs2_nooob_write.patch (100%) rename board/uma/{patches => patches_3.14}/05_inherited-caps.patch (100%) rename board/uma/{patches => patches_3.14}/06_manage-hardlink-incpio.patch (100%) rename board/uma/{patches => patches_3.14}/09_make_initramfs_RO.patch (100%) rename board/uma/{patches => patches_3.14}/10_bootargs_append_in_dtb.patch (100%) rename board/uma/{patches => patches_3.14}/12_systool.patch (100%) rename board/uma/{patches => patches_3.14}/40_espial_hardwire_ubictrl_minor_dev.patch (100%) rename board/uma/{patches => patches_3.14}/41_espial_chardev_preassigned.patch (100%) rename board/uma/{patches => patches_3.14}/42_espial_settime_security_check.patch (100%) rename board/uma/{patches => patches_3.14}/43_max_dgram_qlen.patch (100%) rename board/uma/{patches => patches_3.14}/44_espial_blkdev_preassigned.patch (100%) rename board/uma/{patches => patches_3.14}/44_espial_read_kmsg_from_logger.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch (100%) rename board/uma/{patches => patches_3.14}/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch (100%) rename board/uma/{patches => patches_3.14}/99_kernel_stricter_compiler.patch (100%) create mode 100644 board/uma/patches_4.1/0001-usb-host-brcm-Support-legacy-driver-from-kernel-v3.14.28.patch create mode 100644 board/uma/patches_4.1/01_mtd-brcmstb_nand-ucorrectable-ECC-error.patch create mode 100644 board/uma/patches_4.1/04_jffs2_nooob_write.patch create mode 100644 board/uma/patches_4.1/brcm_usb_legacy.cfg create mode 100644 board/uma/patches_4.1/nand.cfg create mode 100644 board/uma/patches_4.1/spare_area_calc.patch diff --git a/board/uma/linux-4.1.config b/board/uma/linux-4.1.config new file mode 100644 index 000000000000..ab48839725e7 --- /dev/null +++ b/board/uma/linux-4.1.config @@ -0,0 +1,267 @@ +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BRCMSTB=y +CONFIG_BCM7439B0=y +CONFIG_BCMGENET=y +CONFIG_ARM_LPAE=y +CONFIG_ARM_KERNMEM_PERMS=y +# CONFIG_VDSO is not set +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_BRCMSTB=y +CONFIG_SMP=y +CONFIG_ARM_MODULE_PLTS=y +CONFIG_ARM_PSCI=y +CONFIG_ARM_PTDUMP=y +CONFIG_HZ_1000=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_CFG80211=y +CONFIG_WIRELESS=y +CONFIG_CMA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_CC_STACKPROTECTOR_STRONG=y +# CONFIG_KEXEC is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_BRCMSTB_CPUFREQ=y +CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPU_IDLE=y +CONFIG_CRAMFS=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_UDP_DIAG=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=y +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +# CONFIG_IPV6 is not set +CONFIG_BRIDGE=y +CONFIG_NET_DSA=y +CONFIG_NET_SWITCHDEV=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_ALIGNMENT=9 +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_EEPROM_93CX6=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_BRCMSTB=y +CONFIG_NETDEVICES=y +CONFIG_NET_DSA_BCM_SF2=y +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set +CONFIG_SYSTEMPORT=y +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_E1000E=y +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_USB_PEGASUS=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_INPUT_EVDEV=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MPU3050=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_HW_RANDOM=y +CONFIG_I2C_CHARDEV=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_RESET=y +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_INTEL_POWERCLAMP=y +CONFIG_BRCMSTB_THERMAL=y +CONFIG_MFD_SYSCON=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_GSPCA=y +CONFIG_DRM=y +# CONFIG_VGA_ARB is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_BRCMSTB_BMEM=y +CONFIG_BRCMSTB_CMA=y +CONFIG_BRCMSTB_MEMORY_API=y +CONFIG_BRCMSTB_SRPD=y +CONFIG_BRCMSTB_WKTMR=y +CONFIG_BRCMSTB_NEXUS_API=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_BRCMSTB_SATA=y +CONFIG_EXT4_FS=y +CONFIG_JBD2_DEBUG=y +CONFIG_FUSE_FS=y +CONFIG_FHANDLE=y +CONFIG_CGROUPS=y +CONFIG_CUSE=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_REDUCED=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_RODATA=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_BRCMSTB_UART=y +CONFIG_EARLY_PRINTK=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set +CONFIG_CRC_CCITT=y +CONFIG_RTC_CLASS=y +CONFIG_USB_GADGET=y +CONFIG_USB_BDC_UDC=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_MASS_STORAGE=y diff --git a/board/uma/patches/02_TT_USB_TestCommands.patch b/board/uma/patches_3.14/02_TT_USB_TestCommands.patch similarity index 100% rename from board/uma/patches/02_TT_USB_TestCommands.patch rename to board/uma/patches_3.14/02_TT_USB_TestCommands.patch diff --git a/board/uma/patches/03_kstorman.patch b/board/uma/patches_3.14/03_kstorman.patch similarity index 100% rename from board/uma/patches/03_kstorman.patch rename to board/uma/patches_3.14/03_kstorman.patch diff --git a/board/uma/patches/04_jffs2_nooob_write.patch b/board/uma/patches_3.14/04_jffs2_nooob_write.patch similarity index 100% rename from board/uma/patches/04_jffs2_nooob_write.patch rename to board/uma/patches_3.14/04_jffs2_nooob_write.patch diff --git a/board/uma/patches/05_inherited-caps.patch b/board/uma/patches_3.14/05_inherited-caps.patch similarity index 100% rename from board/uma/patches/05_inherited-caps.patch rename to board/uma/patches_3.14/05_inherited-caps.patch diff --git a/board/uma/patches/06_manage-hardlink-incpio.patch b/board/uma/patches_3.14/06_manage-hardlink-incpio.patch similarity index 100% rename from board/uma/patches/06_manage-hardlink-incpio.patch rename to board/uma/patches_3.14/06_manage-hardlink-incpio.patch diff --git a/board/uma/patches/09_make_initramfs_RO.patch b/board/uma/patches_3.14/09_make_initramfs_RO.patch similarity index 100% rename from board/uma/patches/09_make_initramfs_RO.patch rename to board/uma/patches_3.14/09_make_initramfs_RO.patch diff --git a/board/uma/patches/10_bootargs_append_in_dtb.patch b/board/uma/patches_3.14/10_bootargs_append_in_dtb.patch similarity index 100% rename from board/uma/patches/10_bootargs_append_in_dtb.patch rename to board/uma/patches_3.14/10_bootargs_append_in_dtb.patch diff --git a/board/uma/patches/12_systool.patch b/board/uma/patches_3.14/12_systool.patch similarity index 100% rename from board/uma/patches/12_systool.patch rename to board/uma/patches_3.14/12_systool.patch diff --git a/board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch b/board/uma/patches_3.14/40_espial_hardwire_ubictrl_minor_dev.patch similarity index 100% rename from board/uma/patches/40_espial_hardwire_ubictrl_minor_dev.patch rename to board/uma/patches_3.14/40_espial_hardwire_ubictrl_minor_dev.patch diff --git a/board/uma/patches/41_espial_chardev_preassigned.patch b/board/uma/patches_3.14/41_espial_chardev_preassigned.patch similarity index 100% rename from board/uma/patches/41_espial_chardev_preassigned.patch rename to board/uma/patches_3.14/41_espial_chardev_preassigned.patch diff --git a/board/uma/patches/42_espial_settime_security_check.patch b/board/uma/patches_3.14/42_espial_settime_security_check.patch similarity index 100% rename from board/uma/patches/42_espial_settime_security_check.patch rename to board/uma/patches_3.14/42_espial_settime_security_check.patch diff --git a/board/uma/patches/43_max_dgram_qlen.patch b/board/uma/patches_3.14/43_max_dgram_qlen.patch similarity index 100% rename from board/uma/patches/43_max_dgram_qlen.patch rename to board/uma/patches_3.14/43_max_dgram_qlen.patch diff --git a/board/uma/patches/44_espial_blkdev_preassigned.patch b/board/uma/patches_3.14/44_espial_blkdev_preassigned.patch similarity index 100% rename from board/uma/patches/44_espial_blkdev_preassigned.patch rename to board/uma/patches_3.14/44_espial_blkdev_preassigned.patch diff --git a/board/uma/patches/44_espial_read_kmsg_from_logger.patch b/board/uma/patches_3.14/44_espial_read_kmsg_from_logger.patch similarity index 100% rename from board/uma/patches/44_espial_read_kmsg_from_logger.patch rename to board/uma/patches_3.14/44_espial_read_kmsg_from_logger.patch diff --git a/board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch b/board/uma/patches_3.14/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-05-9d54c8a33eec78289b1b3f6e10874719c27ce0a7.patch diff --git a/board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch b/board/uma/patches_3.14/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-10-4d283ee2517303afa54ad6cbd9342a2f748cf509.patch diff --git a/board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch b/board/uma/patches_3.14/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-15-8af871887fcba470ff9265c65cff7d14d9e0e3f9.patch diff --git a/board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch b/board/uma/patches_3.14/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-20-463c5eedb4a13b9aa91f05498a0f2c20bd03f8c4.patch diff --git a/board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch b/board/uma/patches_3.14/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-25-0a3d571bb8940a189322cc5f51466bdab044a48b.patch diff --git a/board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch b/board/uma/patches_3.14/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-30-4df38926f337ff4de49a8fb512aa4a55df0c502d.patch diff --git a/board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch b/board/uma/patches_3.14/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-35-49e236bc4a2639af0e77b3a05460e8367e3187a4.patch diff --git a/board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch b/board/uma/patches_3.14/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-40-3df770725339c41d1cd9be4da4ca0d968119d8ad.patch diff --git a/board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch b/board/uma/patches_3.14/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-45-978d6496758d19de2431ebf163337fc7b92f8c45.patch diff --git a/board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch b/board/uma/patches_3.14/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-50-06d9c2905f745c8b1920a335cbb366ba6b0fc754.patch diff --git a/board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch b/board/uma/patches_3.14/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-55-fda322a1b3b9e8ee231913c500f73c6988b1aff5.patch diff --git a/board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch b/board/uma/patches_3.14/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-60-adfe83be973dc990f3763de3667c4cd004e6e4f7.patch diff --git a/board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch b/board/uma/patches_3.14/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-65-7fbbd05799976c0611dcb229649260504b2bdef5.patch diff --git a/board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch b/board/uma/patches_3.14/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch similarity index 100% rename from board/uma/patches/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch rename to board/uma/patches_3.14/50_kernel-ubiblock-70-b91671bb23a79c32a23b0ad5d6e6ad292bb21bdf.patch diff --git a/board/uma/patches/99_kernel_stricter_compiler.patch b/board/uma/patches_3.14/99_kernel_stricter_compiler.patch similarity index 100% rename from board/uma/patches/99_kernel_stricter_compiler.patch rename to board/uma/patches_3.14/99_kernel_stricter_compiler.patch diff --git a/board/uma/patches_4.1/0001-usb-host-brcm-Support-legacy-driver-from-kernel-v3.14.28.patch b/board/uma/patches_4.1/0001-usb-host-brcm-Support-legacy-driver-from-kernel-v3.14.28.patch new file mode 100644 index 000000000000..7db41eddcb5c --- /dev/null +++ b/board/uma/patches_4.1/0001-usb-host-brcm-Support-legacy-driver-from-kernel-v3.14.28.patch @@ -0,0 +1,57865 @@ +From 322ec93f76d980f95d1f4eb1b4de4c7c402f9ca6 Mon Sep 17 00:00:00 2001 +From: Ricardo Silva +Date: Sun, 13 May 2018 18:36:14 +0100 +Subject: [PATCH] usb: host: brcm: Support legacy driver from kernel v3.14.28 + +The Broadcom USB drivers are not working with NOS UMAv1 boards, from the +ARM BCM7439B0 family of boards/chips. + +The drivers available are not compatible with the device tree models +used in the boards. The drivers assume a phy driver must be instantiated +whereas the device tree uses another model based on the +'brcm,usb-instance' compatible driver, which is not available in this +tree. This causes the system to fail on having a functional USB +interface, because the HCI host drivers are never probed. + +It is know that the USB drivers in kernel v3.14.28 used currently in the +field for UMAv1 HW work fine with the device tree present on the boards, +resulting in a functional USB interface. + +This way, port the Broadcom USB drivers from kernel v3.14.28 into this +tree (v4.1.45), making the necessary adjustments for them to work with +this tree's kernel version (some minor API adjustments required). + +Selecting legacy versus new drivers is now done via the +CONFIG_BRCM_USB_LEGACY option, disabled by default for keeping backwards +compatibility. When enabled, a new configuration option for selecting +the chipset is required, e.g., CONFIG_BCM7439B0. This is needed by the +legacy USB drivers. + +The legacy drivers depend on header files that were not present in this +tree ('include/linux/brcmstb//*'), so take them from +the v3.14.28 tree and also adapt 'include/linux/brcmstb/brcmstb.h' to +include the chipset specific files depending on the chipset selected by +config. Also add to 'brcmstb.h' some macros ('DEV_*') present in +v3.14.28 and that are required by the legacy drivers as well. + +Legacy driver tested only on UMAv1 board (i.e., with CONFIG_BCM7439B0). + +Signed-off-by: Ricardo Silva +--- + arch/arm/mach-bcm/Kconfig | 38 + + drivers/usb/host/Kconfig | 9 + + drivers/usb/host/Makefile | 20 +- + drivers/usb/host/ehci-brcm-legacy.c | 251 + + drivers/usb/host/ohci-brcm-legacy.c | 160 + + drivers/usb/host/usb-brcm-common-init.c | 320 + + drivers/usb/host/usb-brcm-common-init.h | 21 + + drivers/usb/host/usb-brcm-legacy.c | 233 + + drivers/usb/host/usb-brcm-legacy.h | 40 + + drivers/usb/host/xhci-brcm-legacy.c | 202 + + include/linux/brcmstb/3390a0/bchp_common.h | 6355 +++++++++++++++ + include/linux/brcmstb/3390a0/bchp_usb_ctrl.h | 1670 ++++ + include/linux/brcmstb/7145b0/bchp_common.h | 6885 +++++++++++++++++ + include/linux/brcmstb/7145b0/bchp_usb_ctrl.h | 1490 ++++ + include/linux/brcmstb/7250b0/bchp_common.h | 3975 ++++++++++ + include/linux/brcmstb/7250b0/bchp_usb_ctrl.h | 1524 ++++ + include/linux/brcmstb/7364a0/bchp_common.h | 4400 +++++++++++ + include/linux/brcmstb/7364a0/bchp_usb_ctrl.h | 1544 ++++ + include/linux/brcmstb/7366b0/bchp_common.h | 4373 +++++++++++ + include/linux/brcmstb/7366b0/bchp_usb_ctrl.h | 1524 ++++ + include/linux/brcmstb/7366c0/bchp_common.h | 4379 +++++++++++ + include/linux/brcmstb/7366c0/bchp_usb_ctrl.h | 1510 ++++ + include/linux/brcmstb/74371a0/bchp_common.h | 3483 +++++++++ + include/linux/brcmstb/74371a0/bchp_usb_ctrl.h | 1296 ++++ + include/linux/brcmstb/7439b0/bchp_common.h | 4110 ++++++++++ + include/linux/brcmstb/7439b0/bchp_usb_ctrl.h | 1718 ++++ + include/linux/brcmstb/7445d0/bchp_common.h | 4535 +++++++++++ + include/linux/brcmstb/7445d0/bchp_usb_ctrl.h | 1450 ++++ + include/linux/brcmstb/brcmstb.h | 61 + + 29 files changed, 57572 insertions(+), 4 deletions(-) + create mode 100644 drivers/usb/host/ehci-brcm-legacy.c + create mode 100644 drivers/usb/host/ohci-brcm-legacy.c + create mode 100644 drivers/usb/host/usb-brcm-common-init.c + create mode 100644 drivers/usb/host/usb-brcm-common-init.h + create mode 100644 drivers/usb/host/usb-brcm-legacy.c + create mode 100644 drivers/usb/host/usb-brcm-legacy.h + create mode 100644 drivers/usb/host/xhci-brcm-legacy.c + create mode 100644 include/linux/brcmstb/3390a0/bchp_common.h + create mode 100644 include/linux/brcmstb/3390a0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7145b0/bchp_common.h + create mode 100644 include/linux/brcmstb/7145b0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7250b0/bchp_common.h + create mode 100644 include/linux/brcmstb/7250b0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7364a0/bchp_common.h + create mode 100644 include/linux/brcmstb/7364a0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7366b0/bchp_common.h + create mode 100644 include/linux/brcmstb/7366b0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7366c0/bchp_common.h + create mode 100644 include/linux/brcmstb/7366c0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/74371a0/bchp_common.h + create mode 100644 include/linux/brcmstb/74371a0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7439b0/bchp_common.h + create mode 100644 include/linux/brcmstb/7439b0/bchp_usb_ctrl.h + create mode 100644 include/linux/brcmstb/7445d0/bchp_common.h + create mode 100644 include/linux/brcmstb/7445d0/bchp_usb_ctrl.h + +diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig +index 8b37765e..4685f73d 100644 +--- a/arch/arm/mach-bcm/Kconfig ++++ b/arch/arm/mach-bcm/Kconfig +@@ -160,4 +160,42 @@ config ARCH_BRCMSTB + This enables support for Broadcom ARM-based set-top box chipsets, + including the 7445 family of chips. + ++choice ++ prompt "Chipset selection" ++ depends on BRCMSTB ++ help ++ Select the Broadcom STB chipset you are building for. ++ ++config BCM_NONE ++ bool "No specific chipset" ++ ++config BCM3390A0 ++ bool "3390 Ax" ++ ++config BCM7145B0 ++ bool "7145 Bx" ++ ++config BCM7250B0 ++ bool "7250 Bx" ++ ++config BCM7364A0 ++ bool "7364 Ax" ++ ++config BCM7366B0 ++ bool "7366 Bx" ++ ++config BCM7366C0 ++ bool "7366 Cx" ++ ++config BCM74371A0 ++ bool "74371 Ax" ++ ++config BCM7439B0 ++ bool "7439 Bx" ++ ++config BCM7445D0 ++ bool "7445 Dx" ++ ++endchoice ++ + endif +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index 1164084e..7b83835c 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -815,3 +815,12 @@ config BRCM_USB + + If your chipset supports power management, disabling this driver + will keep the device permanently powered down. ++ ++config BRCM_USB_LEGACY ++ tristate "Broadcom STB USB support with Legacy Drivers" ++ depends on BRCM_USB ++ default n ++ help ++ Say Y to use Broadcom STB USB legacy drivers instead of new ones. ++ The legacy drivers are based on the usb-instance driver instead of ++ phy based driver. +diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile +index 1b6d8dff..03b22e7d 100644 +--- a/drivers/usb/host/Makefile ++++ b/drivers/usb/host/Makefile +@@ -26,13 +26,25 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/ + + obj-$(CONFIG_PCI) += pci-quirks.o + +-obj-$(CONFIG_BRCM_USB) += usb-brcm.o ++# Choose between legacy and new Broadcom STB USB drivers depending on config. ++ifneq ($(CONFIG_BRCM_USB_LEGACY), ) ++ BRCM_USB_OBJS := usb-brcm-legacy.o usb-brcm-common-init.o ++ BRCM_USB_XHCI_OBJS := xhci-brcm-legacy.o ++ BRCM_USB_EHCI_OBJS := ehci-brcm-legacy.o ++ BRCM_USB_OHCI_OBJS := ohci-brcm-legacy.o ++else ++ BRCM_USB_OBJS := usb-brcm.o ++ BRCM_USB_XHCI_OBJS := xhci-brcm.o ++ BRCM_USB_EHCI_OBJS := ehci-brcm.o ++ BRCM_USB_OHCI_OBJS := ohci-brcm.o ++endif ++obj-$(CONFIG_BRCM_USB) += $(BRCM_USB_OBJS) + # The order is important here because it controls the order that + # the drivers will be initialized and we always need to init + # the drivers in the order XHCI, EHCI and OHCI. +-obj-$(CONFIG_BRCM_USB_XHCI) += xhci-brcm.o +-obj-$(CONFIG_BRCM_USB_EHCI) += ehci-brcm.o +-obj-$(CONFIG_BRCM_USB_OHCI) += ohci-brcm.o ++obj-$(CONFIG_BRCM_USB_XHCI) += $(BRCM_USB_XHCI_OBJS) ++obj-$(CONFIG_BRCM_USB_EHCI) += $(BRCM_USB_EHCI_OBJS) ++obj-$(CONFIG_BRCM_USB_OHCI) += $(BRCM_USB_OHCI_OBJS) + + obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o + obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o +diff --git a/drivers/usb/host/ehci-brcm-legacy.c b/drivers/usb/host/ehci-brcm-legacy.c +new file mode 100644 +index 00000000..e06d8e93 +--- /dev/null ++++ b/drivers/usb/host/ehci-brcm-legacy.c +@@ -0,0 +1,251 @@ ++/* ++ * Copyright (C) 2009 - 2014 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ehci.h" ++#include "usb-brcm-legacy.h" ++ ++#define BRCM_DRIVER_DESC "EHCI BRCM driver" ++ ++struct brcm_hcd { ++ struct clk *hcd_clk; ++}; ++ ++static const char brcm_hcd_name[] = "ehci-brcm"; ++ ++static int (*org_hub_control)(struct usb_hcd *hcd, ++ u16 typeReq, u16 wValue, u16 wIndex, ++ char *buf, u16 wLength); ++ ++/* ehci_brcm_wait_for_sof ++ * Wait for start of next microframe, then wait extra delay microseconds ++ */ ++static inline void ehci_brcm_wait_for_sof(struct ehci_hcd *ehci, u32 delay) ++{ ++ int frame_idx = ehci_readl(ehci, &ehci->regs->frame_index); ++ ++ while (frame_idx == ehci_readl(ehci, &ehci->regs->frame_index)) ++ ; ++ udelay(delay); ++} ++ ++/* ehci_brcm_hub_control ++ * Intercept echi-hcd request to complete RESUME and align it to the start ++ * of the next microframe. ++ * If RESUME is complete too late in the microframe, host controller ++ * detects babble on suspended port and resets the port afterwards. ++ * This s/w workaround allows to avoid this problem. ++ * See http://jira.broadcom.com/browse/SWLINUX-1909 for more details ++ */ ++static int ehci_brcm_hub_control( ++ struct usb_hcd *hcd, ++ u16 typeReq, ++ u16 wValue, ++ u16 wIndex, ++ char *buf, ++ u16 wLength) ++{ ++ struct ehci_hcd *ehci = hcd_to_ehci(hcd); ++ int ports = HCS_N_PORTS(ehci->hcs_params); ++ u32 __iomem *status_reg = &ehci->regs->port_status[ ++ (wIndex & 0xff) - 1]; ++ unsigned long flags; ++ int retval, irq_disabled = 0; ++ ++ /* RESUME is cleared when GetPortStatus() is called 20ms after start ++ of RESUME */ ++ if ((typeReq == GetPortStatus) && ++ (wIndex && wIndex <= ports) && ++ ehci->reset_done[wIndex-1] && ++ time_after_eq(jiffies, ehci->reset_done[wIndex-1]) && ++ (ehci_readl(ehci, status_reg) & PORT_RESUME)) { ++ /* to make sure we are not interrupted until RESUME bit ++ is cleared, disable interrupts on current CPU */ ++ ehci_dbg(ehci, "SOF alignment workaround\n"); ++ irq_disabled = 1; ++ local_irq_save(flags); ++ ehci_brcm_wait_for_sof(ehci, 5); ++ } ++ retval = (*org_hub_control)(hcd, typeReq, wValue, wIndex, buf, wLength); ++ if (irq_disabled) ++ local_irq_restore(flags); ++ return retval; ++} ++ ++static int ehci_brcm_reset(struct usb_hcd *hcd) ++{ ++ struct ehci_hcd *ehci = hcd_to_ehci(hcd); ++ ++ ehci->big_endian_mmio = 1; ++ ++ ehci->caps = (struct ehci_caps *) hcd->regs; ++ ehci->regs = (struct ehci_regs *) (hcd->regs + ++ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase))); ++ ++ /* This fixes the lockup during reboot due to prior interrupts */ ++ ehci_writel(ehci, CMD_RESET, &ehci->regs->command); ++ mdelay(10); ++ ++ /* ++ * SWLINUX-1705: Avoid OUT packet underflows during high memory ++ * bus usage ++ * port_status[0x0f] = Broadcom-proprietary USB_EHCI_INSNREG00 @ 0x90 ++ */ ++ ehci_writel(ehci, 0x00800040, &ehci->regs->port_status[0x10]); ++ ehci_writel(ehci, 0x00000001, &ehci->regs->port_status[0x12]); ++ ++ return ehci_setup(hcd); ++} ++ ++static struct hc_driver __read_mostly ehci_brcm_hc_driver; ++ ++static const struct ehci_driver_overrides brcm_overrides __initconst = { ++ ++ .reset = ehci_brcm_reset, ++ .extra_priv_size = sizeof(struct brcm_hcd), ++}; ++ ++static int ehci_brcm_probe(struct platform_device *dev) ++{ ++ int err; ++ struct brcm_hcd *brcm_hcd_ptr; ++ struct clk *usb_clk; ++ struct usb_hcd *hcd; ++ ++ err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)); ++ if (err) ++ return err; ++ ++ /* Hook the hub control routine to work around a bug */ ++ if (org_hub_control == NULL) ++ org_hub_control = ehci_brcm_hc_driver.hub_control; ++ ehci_brcm_hc_driver.hub_control = ehci_brcm_hub_control; ++ err = brcm_usb_probe(dev, &ehci_brcm_hc_driver, &hcd, &usb_clk); ++ if (err) ++ return err; ++ brcm_hcd_ptr = (struct brcm_hcd *)hcd_to_ehci(hcd)->priv; ++ brcm_hcd_ptr->hcd_clk = usb_clk; ++ ++ return err; ++} ++ ++static int ehci_brcm_remove(struct platform_device *dev) ++{ ++ struct usb_hcd *hcd = platform_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ehci(hcd)->priv; ++ ++ brcm_usb_remove(dev, brcm_hcd_ptr->hcd_clk); ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++ ++static int ehci_brcm_suspend(struct device *dev) ++{ ++ int ret; ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ehci(hcd)->priv; ++ bool do_wakeup = device_may_wakeup(dev); ++ ++ ret = ehci_suspend(hcd, do_wakeup); ++ clk_disable(brcm_hcd_ptr->hcd_clk); ++ ++ return ret; ++} ++ ++static int ehci_brcm_resume(struct device *dev) ++{ ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ehci(hcd)->priv; ++ struct ehci_hcd *ehci = hcd_to_ehci(hcd); ++ int err; ++ ++ err = clk_enable(brcm_hcd_ptr->hcd_clk); ++ if (err) ++ return err; ++ ++ /* ++ * SWLINUX-1705: Avoid OUT packet underflows during high memory ++ * bus usage ++ * port_status[0x0f] = Broadcom-proprietary USB_EHCI_INSNREG00 ++ * @ 0x90 ++ */ ++ ehci_writel(ehci, 0x00800040, &ehci->regs->port_status[0x10]); ++ ehci_writel(ehci, 0x00000001, &ehci->regs->port_status[0x12]); ++ ++ ehci_resume(hcd, false); ++ return 0; ++} ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(ehci_brcm_pm_ops, ehci_brcm_suspend, ++ ehci_brcm_resume); ++ ++#ifdef CONFIG_OF ++static const struct of_device_id brcm_ehci_of_match[] = { ++ { .compatible = "brcm,ehci-brcm", }, ++ {} ++}; ++ ++MODULE_DEVICE_TABLE(of, brcm_ehci_of_match); ++#endif /* CONFIG_OF */ ++ ++static struct platform_driver ehci_brcm_driver = { ++ .probe = ehci_brcm_probe, ++ .remove = ehci_brcm_remove, ++ .shutdown = usb_hcd_platform_shutdown, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "ehci-brcm", ++ .pm = &ehci_brcm_pm_ops, ++ .of_match_table = of_match_ptr(brcm_ehci_of_match), ++ } ++}; ++ ++static int __init ehci_brcm_init(void) ++{ ++ if (usb_disabled()) ++ return -ENODEV; ++ ++ pr_info("%s: " BRCM_DRIVER_DESC "\n", brcm_hcd_name); ++ ++ ehci_init_driver(&ehci_brcm_hc_driver, &brcm_overrides); ++ return platform_driver_register(&ehci_brcm_driver); ++} ++module_init(ehci_brcm_init); ++ ++static void __exit ehci_brcm_cleanup(void) ++{ ++ platform_driver_unregister(&ehci_brcm_driver); ++} ++module_exit(ehci_brcm_cleanup); ++ ++MODULE_DESCRIPTION(BRCM_DRIVER_DESC); ++MODULE_AUTHOR("Al Cooper"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/usb/host/ohci-brcm-legacy.c b/drivers/usb/host/ohci-brcm-legacy.c +new file mode 100644 +index 00000000..3572e0e2 +--- /dev/null ++++ b/drivers/usb/host/ohci-brcm-legacy.c +@@ -0,0 +1,160 @@ ++/* ++ * Copyright (C) 2009 - 2014 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ohci.h" ++#include "usb-brcm-legacy.h" ++ ++#define BRCM_DRIVER_DESC "OHCI BRCM driver" ++ ++static const char hcd_name[] = "ohci-brcm"; ++ ++struct brcm_hcd { ++ struct clk *hcd_clk; ++}; ++ ++static int ohci_brcm_reset(struct usb_hcd *hcd) ++{ ++ struct ohci_hcd *ohci = hcd_to_ohci(hcd); ++ ++ ohci->flags |= OHCI_QUIRK_BE_MMIO; ++ return ohci_setup(hcd); ++} ++ ++static struct hc_driver __read_mostly ohci_brcm_hc_driver; ++ ++static const struct ohci_driver_overrides brcm_overrides __initconst = { ++ .product_desc = "BRCM OHCI controller", ++ .reset = ohci_brcm_reset, ++ .extra_priv_size = sizeof(struct brcm_hcd), ++}; ++ ++static int ohci_brcm_probe(struct platform_device *dev) ++{ ++ int err; ++ struct usb_hcd *hcd; ++ struct brcm_hcd *brcm_hcd_ptr; ++ struct clk *usb_clk; ++ ++ err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); ++ if (err) ++ return err; ++ ++ err = brcm_usb_probe(dev, &ohci_brcm_hc_driver, &hcd, &usb_clk); ++ if (err) ++ return err; ++ ++ brcm_hcd_ptr = (struct brcm_hcd *)hcd_to_ohci(hcd)->priv; ++ brcm_hcd_ptr->hcd_clk = usb_clk; ++ ++ return err; ++} ++ ++static int ohci_brcm_remove(struct platform_device *dev) ++{ ++ struct usb_hcd *hcd = platform_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ohci(hcd)->priv; ++ ++ brcm_usb_remove(dev, brcm_hcd_ptr->hcd_clk); ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++ ++static int ohci_brcm_suspend(struct device *dev) ++{ ++ int ret; ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ohci(hcd)->priv; ++ bool do_wakeup = device_may_wakeup(dev); ++ ++ ret = ohci_suspend(hcd, do_wakeup); ++ clk_disable(brcm_hcd_ptr->hcd_clk); ++ return ret; ++} ++ ++static int ohci_brcm_resume(struct device *dev) ++{ ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct brcm_hcd *brcm_hcd_ptr = ++ (struct brcm_hcd *)hcd_to_ohci(hcd)->priv; ++ int err; ++ ++ err = clk_enable(brcm_hcd_ptr->hcd_clk); ++ if (err) ++ return err; ++ ohci_resume(hcd, false); ++ return 0; ++} ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(ohci_brcm_pm_ops, ohci_brcm_suspend, ++ ohci_brcm_resume); ++ ++#ifdef CONFIG_OF ++static const struct of_device_id brcm_ohci_of_match[] = { ++ { .compatible = "brcm,ohci-brcm", }, ++ {} ++}; ++ ++MODULE_DEVICE_TABLE(of, brcm_ohci_of_match); ++#endif /* CONFIG_OF */ ++ ++static struct platform_driver ohci_brcm_driver = { ++ .probe = ohci_brcm_probe, ++ .remove = ohci_brcm_remove, ++ .shutdown = usb_hcd_platform_shutdown, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "ohci-brcm", ++ .pm = &ohci_brcm_pm_ops, ++ .of_match_table = of_match_ptr(brcm_ohci_of_match), ++ } ++}; ++ ++static int __init ohci_brcm_init(void) ++{ ++ if (usb_disabled()) ++ return -ENODEV; ++ ++ pr_info("%s: " BRCM_DRIVER_DESC "\n", hcd_name); ++ ++ ohci_init_driver(&ohci_brcm_hc_driver, &brcm_overrides); ++ return platform_driver_register(&ohci_brcm_driver); ++} ++module_init(ohci_brcm_init); ++ ++static void __exit ohci_brcm_cleanup(void) ++{ ++ platform_driver_unregister(&ohci_brcm_driver); ++} ++module_exit(ohci_brcm_cleanup); ++ ++MODULE_DESCRIPTION(BRCM_DRIVER_DESC); ++MODULE_AUTHOR("Al Cooper"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/usb/host/usb-brcm-common-init.c b/drivers/usb/host/usb-brcm-common-init.c +new file mode 100644 +index 00000000..a52ae07b +--- /dev/null ++++ b/drivers/usb/host/usb-brcm-common-init.c +@@ -0,0 +1,320 @@ ++/* ++ * Copyright (C) 2014 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++/* ++ * This module is used by both the bootloader and Linux and ++ * contains USB initialization for power up and S3 resume. ++ */ ++ ++ ++#if defined(_BOLT_) ++#include "lib_types.h" ++#include "common.h" ++#include "bchp_common.h" ++#include "bchp_usb_ctrl.h" ++#include "timer.h" ++#define msleep bolt_msleep ++#define udelay bolt_usleep ++#if defined(BCHP_USB1_CTRL_REG_START) ++#include "bchp_usb1_ctrl.h" ++#endif ++#else ++#include ++#include ++#endif ++ ++#include "usb-brcm-common-init.h" ++ ++#if defined(BCHP_USB_CTRL_REG_START) ++#define USB_CTRL_REG(base, reg) (base + BCHP_USB_CTRL_##reg - \ ++ BCHP_USB_CTRL_SETUP) ++#define USB_CTRL_MASK(reg, field) (BCHP_USB_CTRL_##reg##_##field##_MASK) ++#define USB_CTRL_SHIFT(reg, field) (BCHP_USB_CTRL_##reg##_##field##_SHIFT) ++#elif defined(BCHP_USB1_CTRL_REG_START) ++#define USB_CTRL_REG(base, reg) (base + BCHP_USB1_CTRL_##reg - \ ++ BCHP_USB1_CTRL_SETUP) ++#define USB_CTRL_MASK(reg, field) (BCHP_USB1_CTRL_##reg##_##field##_MASK) ++#define USB_CTRL_SHIFT(reg, field) (BCHP_USB1_CTRL_##reg##_##field##_SHIFT) ++#endif ++ ++#define USB_CTRL_SET(base, reg, mask) DEV_SET(USB_CTRL_REG(base, reg), \ ++ USB_CTRL_MASK(reg, mask)) ++ ++#define USB_CTRL_UNSET(base, reg, mask) DEV_UNSET(USB_CTRL_REG(base, reg), \ ++ USB_CTRL_MASK(reg, mask)) ++ ++#define MDIO_USB2 0 ++#define MDIO_USB3 (1 << 31) ++ ++#define USB_CTRL_SETUP_CONDITIONAL_BITS ( \ ++ USB_CTRL_MASK(SETUP, BABO) | \ ++ USB_CTRL_MASK(SETUP, FNHW) | \ ++ USB_CTRL_MASK(SETUP, FNBO) | \ ++ USB_CTRL_MASK(SETUP, WABO) | \ ++ USB_CTRL_MASK(SETUP, IOC) | \ ++ USB_CTRL_MASK(SETUP, IPP)) ++ ++#ifdef __LITTLE_ENDIAN ++#define ENDIAN_SETTINGS ( \ ++ USB_CTRL_MASK(SETUP, BABO) | \ ++ USB_CTRL_MASK(SETUP, FNHW)) ++#else ++#define ENDIAN_SETTINGS ( \ ++ USB_CTRL_MASK(SETUP, FNHW) | \ ++ USB_CTRL_MASK(SETUP, FNBO) | \ ++ USB_CTRL_MASK(SETUP, WABO)) ++#endif ++ ++static uint32_t usb_mdio_read(uintptr_t ctrl_base, uint32_t reg, int mode) ++{ ++ uint32_t data; ++ ++ data = (reg << 16) | mode; ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++ data |= (1 << 24); ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++ data &= ~(1 << 24); ++ udelay(10); ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++ udelay(10); ++ ++ return DEV_RD(USB_CTRL_REG(ctrl_base, MDIO2)) & 0xffff; ++} ++ ++static void usb_mdio_write(uintptr_t ctrl_base, uint32_t reg, ++ uint32_t val, int mode) ++{ ++ uint32_t data; ++ ++ data = (reg << 16) | val | mode; ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++ data |= (1 << 25); ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++ data &= ~(1 << 25); ++ udelay(10); ++ DEV_WR(USB_CTRL_REG(ctrl_base, MDIO), data); ++} ++ ++ ++static void usb_phy_ldo_fix(uintptr_t usbctrl) ++{ ++ USB_CTRL_UNSET(usbctrl, PLL_CTL, PLL_RESETB); ++ DEV_WR(USB_CTRL_REG(usbctrl, UTMI_CTL_1), 0); ++ DEV_WR(USB_CTRL_REG(usbctrl, PLL_LDO_CTL), ++ USB_CTRL_MASK(PLL_LDO_CTL, AFE_CORERDY_VDDC)); ++#if defined(BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK) || \ ++ defined(BCHP_USB1_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK) ++ USB_CTRL_SET(usbctrl, PLL_CTL, PLL_IDDQ_PWRDN); ++ msleep(10); ++ USB_CTRL_UNSET(usbctrl, PLL_CTL, PLL_IDDQ_PWRDN); ++#else ++ USB_CTRL_SET(usbctrl, USB_PM, USB_PWRDN); ++ msleep(10); ++ USB_CTRL_UNSET(usbctrl, USB_PM, USB_PWRDN); ++#endif ++ USB_CTRL_SET(usbctrl, PLL_LDO_CTL, AFE_BG_PWRDWNB); ++ USB_CTRL_SET(usbctrl, PLL_LDO_CTL, AFE_LDO_PWRDWNB); ++ msleep(1); ++ DEV_WR(USB_CTRL_REG(usbctrl, UTMI_CTL_1), ++ USB_CTRL_MASK(UTMI_CTL_1, UTMI_SOFT_RESETB) | ++ USB_CTRL_MASK(UTMI_CTL_1, UTMI_SOFT_RESETB_P1)); ++ USB_CTRL_SET(usbctrl, PLL_CTL, PLL_RESETB); ++} ++ ++static void usb2_eye_fix(uintptr_t ctrl_base) ++{ ++ /* Increase USB 2.0 TX level to meet spec requirement */ ++ usb_mdio_write(ctrl_base, 0x1f, 0x80a0, MDIO_USB2); ++ usb_mdio_write(ctrl_base, 0x0a, 0xc6a0, MDIO_USB2); ++} ++ ++ ++static void usb3_pll_fix(uintptr_t ctrl_base) ++{ ++ /* Set correct window for PLL lock detect */ ++ usb_mdio_write(ctrl_base, 0x1f, 0x8000, MDIO_USB3); ++ usb_mdio_write(ctrl_base, 0x07, 0x1503, MDIO_USB3); ++} ++ ++ ++static void usb3_ssc_enable(uintptr_t ctrl_base) ++{ ++ uint32_t val; ++ ++ /* Enable USB 3.0 TX spread spectrum */ ++ usb_mdio_write(ctrl_base, 0x1f, 0x8040, MDIO_USB3); ++ val = usb_mdio_read(ctrl_base, 0x01, MDIO_USB3) | 3; ++ usb_mdio_write(ctrl_base, 0x01, val, MDIO_USB3); ++} ++ ++ ++void brcm_usb_common_ctrl_xhci_soft_reset(uintptr_t ctrl, int on_off) ++{ ++#if defined(BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK) || \ ++ defined(BCHP_USB1_CTRL_USB_PM_xhc_soft_resetb_MASK) ++ /* Assert reset */ ++ if (on_off) { ++ DEV_UNSET(USB_CTRL_REG(ctrl, USB_PM), ++ USB_CTRL_MASK(USB_PM, xhc_soft_resetb)); ++ } ++ /* De-assert reset */ ++ else { ++ DEV_SET(USB_CTRL_REG(ctrl, USB_PM), ++ USB_CTRL_MASK(USB_PM, xhc_soft_resetb)); ++ } ++#else ++ /* Assert reset */ ++ if (on_off) { ++ DEV_UNSET(USB_CTRL_REG(ctrl, USB30_CTL1), ++ USB_CTRL_MASK(USB30_CTL1, xhc_soft_resetb)); ++ } ++ /* De-assert reset */ ++ else { ++ DEV_SET(USB_CTRL_REG(ctrl, USB30_CTL1), ++ USB_CTRL_MASK(USB30_CTL1, xhc_soft_resetb)); ++ } ++#endif ++} ++ ++ ++static void memc_fix(uintptr_t ctrl_base) ++{ ++#if defined(CONFIG_BCM7445D0) ++ /* ++ * This is a workaround for HW7445-1869 where a DMA write ends up ++ * doing a read pre-fetch after the end of the DMA buffer. This ++ * causes a problem when the DMA buffer is at the end of physical ++ * memory, causing the pre-fetch read to access non-existand memory, ++ * and the chip bondout has MEMC2 disabled. When the pre-fetch read ++ * tries to use the disabled MEMC2, it hangs the bus. The workaround ++ * is to disable MEMC2 access in the usb controller which avoids ++ * the hang. ++ */ ++ uint32_t prid; ++ ++ prid = BDEV_RD(BCHP_SUN_TOP_CTRL_PRODUCT_ID) & 0xfffff000; ++ switch (prid) { ++ case 0x72520000: ++ case 0x74480000: ++ case 0x74490000: ++ case 0x07252000: ++ case 0x07448000: ++ case 0x07449000: ++ USB_CTRL_UNSET(ctrl_base, SETUP, scb2_en); ++ } ++#endif ++} ++ ++void brcm_usb_common_ctrl_init(uintptr_t ctrl, int ioc, int ipp, int xhci) ++{ ++ uint32_t reg; ++ ++#if defined(CONFIG_BCM7366) ++ /* ++ * The PHY3_SOFT_RESETB bits default to the wrong state. ++ */ ++ DEV_SET(USB_CTRL_REG(ctrl, USB30_PCTL), 0x20002); ++#endif ++ ++#if defined(BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK) || \ ++ defined(BCHP_USB1_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK) ++ /* Take USB out of power down */ ++ DEV_UNSET(USB_CTRL_REG(ctrl, PLL_CTL), ++ USB_CTRL_MASK(PLL_CTL, PLL_IDDQ_PWRDN)); ++ /* 1 millisecond - for USB clocks to settle down */ ++ msleep(1); ++#else ++ /* Take USB out of power down */ ++ DEV_UNSET(USB_CTRL_REG(ctrl, USB_PM), ++ USB_CTRL_MASK(USB_PM, USB_PWRDN)); ++ /* 1 millisecond - for USB clocks to settle down */ ++ msleep(1); ++#endif ++ ++#if defined(CONFIG_BCM7445D0) ++ DEV_UNSET(USB_CTRL_REG(ctrl, UTMI_CTL_1), ++ USB_CTRL_MASK(UTMI_CTL_1, POWER_UP_FSM_EN_P1) | ++ USB_CTRL_MASK(UTMI_CTL_1, POWER_UP_FSM_EN)); ++#endif ++ ++#if defined(BCHP_USB_CTRL_USB30_CTL1_usb3_ipp_MASK) || \ ++ defined(BCHP_USB1_CTRL_USB30_CTL1_usb3_ipp_MASK) ++ /* Starting with the 7445d0, there are no longer separate 3.0 ++ * versions of IOC and IPP. ++ */ ++ DEV_SET(USB_CTRL_REG(ctrl, USB30_CTL1), ++ USB_CTRL_MASK(USB30_CTL1, usb3_ipp) | ++ USB_CTRL_MASK(USB30_CTL1, usb3_ioc)); ++#endif ++ ++#if !defined(CONFIG_BCM74371A0) && \ ++ !defined(CONFIG_BCM7364A0) ++ /* ++ * HW7439-637: 7439a0 and its derivatives do not have large enough ++ * descriptor storage for this. ++ */ ++ DEV_SET(USB_CTRL_REG(ctrl, SETUP), ++ USB_CTRL_MASK(SETUP, ss_ehci64bit_en)); ++#endif ++ /* Make sure it's low to insure a rising edge. */ ++ DEV_UNSET(USB_CTRL_REG(ctrl, USB30_CTL1), ++ USB_CTRL_MASK(USB30_CTL1, phy3_pll_seq_start)); ++ DEV_SET(USB_CTRL_REG(ctrl, USB30_CTL1), ++ USB_CTRL_MASK(USB30_CTL1, phy3_pll_seq_start)); ++ DEV_SET(USB_CTRL_REG(ctrl, PLL_CTL), ++ USB_CTRL_MASK(PLL_CTL, PLL_SUSPEND_EN)); ++ ++ usb2_eye_fix(ctrl); ++ usb_phy_ldo_fix(ctrl); ++ if (xhci) { ++ usb3_pll_fix(ctrl); ++ usb3_ssc_enable(ctrl); ++ } ++ ++ /* Setup the endian bits */ ++ reg = DEV_RD(USB_CTRL_REG(ctrl, SETUP)); ++ reg &= ~USB_CTRL_SETUP_CONDITIONAL_BITS; ++ reg |= ENDIAN_SETTINGS; ++ ++#if defined(CONFIG_BCM7364A0) ++ /* Suppress overcurrent indication from USB30 ports */ ++ reg |= BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK; ++#endif ++ ++ /* ++ * Make sure the the second and third memory controller ++ * interfaces are enabled. ++ */ ++ reg |= (USB_CTRL_MASK(SETUP, scb1_en) | ++ USB_CTRL_MASK(SETUP, scb2_en)); ++ ++ /* Override the default OC and PP polarity */ ++ if (ioc) ++ reg |= USB_CTRL_MASK(SETUP, IOC); ++ if (ipp) ++ reg |= USB_CTRL_MASK(SETUP, IPP); ++ DEV_WR(USB_CTRL_REG(ctrl, SETUP), reg); ++ ++ /* override lame bridge defaults */ ++ reg = DEV_RD(USB_CTRL_REG(ctrl, OBRIDGE)); ++ reg &= ~USB_CTRL_MASK(OBRIDGE, OBR_SEQ_EN); ++ DEV_WR(USB_CTRL_REG(ctrl, OBRIDGE), reg); ++ reg = DEV_RD(USB_CTRL_REG(ctrl, EBRIDGE)); ++ reg &= ~USB_CTRL_MASK(EBRIDGE, EBR_SEQ_EN); ++ reg &= ~USB_CTRL_MASK(EBRIDGE, EBR_SCB_SIZE); ++ reg |= (0x08 << USB_CTRL_SHIFT(EBRIDGE, EBR_SCB_SIZE)); ++ DEV_WR(USB_CTRL_REG(ctrl, EBRIDGE), reg); ++ memc_fix(ctrl); ++} ++ +diff --git a/drivers/usb/host/usb-brcm-common-init.h b/drivers/usb/host/usb-brcm-common-init.h +new file mode 100644 +index 00000000..a153c31d +--- /dev/null ++++ b/drivers/usb/host/usb-brcm-common-init.h +@@ -0,0 +1,21 @@ ++/* ++ * Copyright (C) 2014 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++ ++#ifndef _USB_BRCM_COMMON_INIT_H ++#define _USB_BRCM_COMMON_INIT_H ++ ++void brcm_usb_common_ctrl_init(uintptr_t ctrl, int ioc, int ipp, int xhci); ++void brcm_usb_common_ctrl_xhci_soft_reset(uintptr_t ctrl, int on_off); ++ ++#endif /* _USB_BRCM_COMMON_INIT_H */ +diff --git a/drivers/usb/host/usb-brcm-legacy.c b/drivers/usb/host/usb-brcm-legacy.c +new file mode 100644 +index 00000000..61069df4 +--- /dev/null ++++ b/drivers/usb/host/usb-brcm-legacy.c +@@ -0,0 +1,233 @@ ++/* ++ * Copyright (C) 2010 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "usb-brcm-common-init.h" ++ ++struct brcm_usb_instance { ++ void __iomem *ctrl_regs; ++ int ioc; ++ int ipp; ++ int has_xhci; ++ struct clk *usb_clk; ++}; ++ ++static const char msg_clk_not_found[] = "Clock not found in Device Tree\n"; ++ ++/*********************************************************************** ++ * Library functions ++ ***********************************************************************/ ++ ++int brcm_usb_probe(struct platform_device *pdev, ++ const struct hc_driver *hc_driver, ++ struct usb_hcd **hcdptr, ++ struct clk **hcd_clk_ptr) ++{ ++ struct resource *res_mem; ++ int irq; ++ struct usb_hcd *hcd; ++ struct device_node *dn = pdev->dev.of_node; ++ struct clk *usb_clk; ++ int err; ++ ++ if (usb_disabled()) ++ return -ENODEV; ++ ++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res_mem) { ++ dev_err(&pdev->dev, "platform_get_resource error.\n"); ++ return -ENODEV; ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "platform_get_irq error.\n"); ++ return -ENODEV; ++ } ++ ++ usb_clk = of_clk_get_by_name(dn, "sw_usb"); ++ if (IS_ERR(usb_clk)) { ++ dev_err(&pdev->dev, msg_clk_not_found); ++ usb_clk = NULL; ++ } ++ err = clk_prepare_enable(usb_clk); ++ if (err) ++ return err; ++ *hcd_clk_ptr = usb_clk; ++ ++ /* initialize hcd */ ++ hcd = usb_create_hcd(hc_driver, &pdev->dev, dev_name(&pdev->dev)); ++ if (!hcd) { ++ dev_err(&pdev->dev, "Failed to create hcd\n"); ++ clk_disable(usb_clk); ++ return -ENOMEM; ++ } ++ *hcdptr = hcd; ++ hcd->rsrc_start = res_mem->start; ++ hcd->rsrc_len = resource_size(res_mem); ++ ++ hcd->regs = devm_ioremap_resource(&pdev->dev, res_mem); ++ if (IS_ERR(hcd->regs)) { ++ err = PTR_ERR(hcd->regs); ++ goto err_put_hcd; ++ } ++ err = usb_add_hcd(hcd, irq, IRQF_SHARED); ++ if (err) ++ goto err_put_hcd; ++ ++ device_wakeup_enable(hcd->self.controller); ++ platform_set_drvdata(pdev, hcd); ++ return err; ++ ++err_put_hcd: ++ clk_disable(usb_clk); ++ usb_put_hcd(hcd); ++ ++ return err; ++} ++EXPORT_SYMBOL(brcm_usb_probe); ++ ++int brcm_usb_remove(struct platform_device *pdev, struct clk *hcd_clk) ++{ ++ struct usb_hcd *hcd = platform_get_drvdata(pdev); ++ usb_remove_hcd(hcd); ++ usb_put_hcd(hcd); ++ clk_disable(hcd_clk); ++ ++ return 0; ++} ++EXPORT_SYMBOL(brcm_usb_remove); ++ ++ ++#ifdef CONFIG_OF ++ ++/*********************************************************************** ++ * DT support for USB instances ++ ***********************************************************************/ ++ ++static int brcm_usb_instance_probe(struct platform_device *pdev) ++{ ++ struct device_node *dn = pdev->dev.of_node; ++ struct resource ctrl_res; ++ const u32 *prop; ++ struct brcm_usb_instance *priv; ++ struct device_node *node; ++ int err; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ dev_set_drvdata(&pdev->dev, priv); ++ ++ if (of_address_to_resource(dn, 0, &ctrl_res)) { ++ dev_err(&pdev->dev, "can't get USB_CTRL base address\n"); ++ return -EINVAL; ++ } ++ ++ priv->ctrl_regs = devm_ioremap_resource(&pdev->dev, &ctrl_res); ++ if (!priv->ctrl_regs) { ++ dev_err(&pdev->dev, "can't map register space\n"); ++ return -EINVAL; ++ } ++ ++ prop = of_get_property(dn, "ipp", NULL); ++ if (prop) ++ priv->ipp = be32_to_cpup(prop); ++ ++ prop = of_get_property(dn, "ioc", NULL); ++ if (prop) ++ priv->ioc = be32_to_cpup(prop); ++ ++ node = of_find_compatible_node(dn, NULL, "xhci-platform"); ++ of_node_put(node); ++ priv->has_xhci = node != NULL; ++ priv->usb_clk = of_clk_get_by_name(dn, "sw_usb"); ++ if (IS_ERR(priv->usb_clk)) { ++ dev_err(&pdev->dev, msg_clk_not_found); ++ priv->usb_clk = NULL; ++ } ++ err = clk_prepare_enable(priv->usb_clk); ++ if (err) ++ return err; ++ brcm_usb_common_ctrl_xhci_soft_reset((uintptr_t)priv->ctrl_regs, ++ !priv->has_xhci); ++ brcm_usb_common_ctrl_init((uintptr_t)priv->ctrl_regs, priv->ioc, ++ priv->ipp, priv->has_xhci); ++ return of_platform_populate(dn, NULL, NULL, NULL); ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int brcm_usb_instance_suspend(struct device *dev) ++{ ++ struct brcm_usb_instance *priv = dev_get_drvdata(dev); ++ ++ clk_disable(priv->usb_clk); ++ return 0; ++} ++ ++static int brcm_usb_instance_resume(struct device *dev) ++{ ++ struct brcm_usb_instance *priv = dev_get_drvdata(dev); ++ clk_enable(priv->usb_clk); ++ brcm_usb_common_ctrl_xhci_soft_reset((uintptr_t)priv->ctrl_regs, false); ++ brcm_usb_common_ctrl_init((uintptr_t)priv->ctrl_regs, priv->ioc, ++ priv->ipp, priv->has_xhci); ++ return 0; ++} ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(brcm_usb_instance_pm_ops, brcm_usb_instance_suspend, ++ brcm_usb_instance_resume); ++ ++static const struct of_device_id brcm_usb_instance_match[] = { ++ { .compatible = "brcm,usb-instance" }, ++ {}, ++}; ++ ++static struct platform_driver brcm_usb_instance_driver = { ++ .driver = { ++ .name = "usb-brcm", ++ .bus = &platform_bus_type, ++ .of_match_table = of_match_ptr(brcm_usb_instance_match), ++ .pm = &brcm_usb_instance_pm_ops, ++ } ++}; ++ ++/* ++ * We really don't want to try to undo of_platform_populate(), so it ++ * is not possible to unbind/deregister this driver. ++ */ ++static int __init brcm_usb_instance_init(void) ++{ ++ return platform_driver_probe(&brcm_usb_instance_driver, ++ brcm_usb_instance_probe); ++} ++module_init(brcm_usb_instance_init); ++ ++#endif ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Broadcom Corporation"); ++MODULE_DESCRIPTION("Broadcom USB common functions"); +diff --git a/drivers/usb/host/usb-brcm-legacy.h b/drivers/usb/host/usb-brcm-legacy.h +new file mode 100644 +index 00000000..638ab71d +--- /dev/null ++++ b/drivers/usb/host/usb-brcm-legacy.h +@@ -0,0 +1,40 @@ ++/* ++ * Copyright (C) 2010 Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#ifndef _USB_BRCM_H ++#define _USB_BRCM_H ++ ++#include ++#include ++#include ++#include ++ ++/* force non-byteswapping reads/writes on LE and BE alike */ ++#define CONFIG_USB_EHCI_BIG_ENDIAN_MMIO 1 ++#define CONFIG_USB_OHCI_BIG_ENDIAN_MMIO 1 ++#undef readl_be ++#undef writel_be ++#define readl_be(x) __raw_readl(x) ++#define writel_be(x, y) __raw_writel(x, y) ++ ++extern int brcm_usb_probe(struct platform_device *pdev, ++ const struct hc_driver *hc_driver, ++ struct usb_hcd **hcdptr, ++ struct clk **hcd_clk_ptr); ++extern int brcm_usb_remove(struct platform_device *pdev, struct clk *hcd_clk); ++ ++#endif /* _USB_BRCM_H */ +diff --git a/drivers/usb/host/xhci-brcm-legacy.c b/drivers/usb/host/xhci-brcm-legacy.c +new file mode 100644 +index 00000000..24093dc9 +--- /dev/null ++++ b/drivers/usb/host/xhci-brcm-legacy.c +@@ -0,0 +1,202 @@ ++/* ++ * xhci-brcm.c - xHCI host controller driver platform Bus Glue. ++ * ++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com ++ * Author: Sebastian Andrzej Siewior ++ * ++ * A lot of code borrowed from the Linux xHCI driver. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "xhci.h" ++#include "usb-brcm-legacy.h" ++ ++static struct hc_driver __read_mostly xhci_brcm_hc_driver; ++ ++ ++#define BRCM_DRIVER_DESC "xHCI BRCM driver" ++#define BRCM_DRIVER_NAME "xhci-brcm" ++ ++struct brcm_hcd { ++ /* ++ * xhci_hcd_ptr must always be the first entry ++ * because the XHCI driver expects this pointer ++ * to be at the beginning of the hcd_priv area ++ * in the usb_hcd structure. ++ */ ++ struct xhci_hcd *xhci_hcd_ptr; ++ struct clk *hcd_clk; ++}; ++ ++static struct brcm_hcd *hcd_to_brcm(struct usb_hcd *hcd) ++{ ++ return (struct brcm_hcd *)hcd->hcd_priv; ++} ++ ++static void xhci_brcm_quirks(struct device *dev, struct xhci_hcd *xhci) ++{ ++ /* ++ * As of now platform drivers don't provide MSI support so we ensure ++ * here that the generic code does not try to make a pci_dev from our ++ * dev struct in order to setup MSI ++ */ ++ xhci->quirks |= XHCI_PLAT; ++ ++ /* ++ * The Broadcom XHCI core does not support save/restore state ++ * so we need to reset on resume. ++ */ ++ xhci->quirks |= XHCI_RESET_ON_RESUME; ++} ++ ++/* called during probe() after chip reset completes */ ++static int xhci_brcm_setup(struct usb_hcd *hcd) ++{ ++ return xhci_gen_setup(hcd, xhci_brcm_quirks); ++} ++ ++static int xhci_brcm_probe(struct platform_device *pdev) ++{ ++ struct xhci_hcd *xhci; ++ struct usb_hcd *hcd; ++ struct clk *usb_clk; ++ struct brcm_hcd *brcm_hcd_ptr; ++ int ret; ++ ++ ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); ++ if (ret) ++ return ret; ++ ret = brcm_usb_probe(pdev, &xhci_brcm_hc_driver, &hcd, &usb_clk); ++ if (ret) ++ return ret; ++ brcm_hcd_ptr = hcd_to_brcm(hcd); ++ brcm_hcd_ptr->hcd_clk = usb_clk; ++ ++ /* USB 2.0 roothub is stored in the platform_device now. */ ++ hcd = platform_get_drvdata(pdev); ++ xhci = hcd_to_xhci(hcd); ++ xhci->shared_hcd = usb_create_shared_hcd(&xhci_brcm_hc_driver, ++ &pdev->dev, dev_name(&pdev->dev), hcd); ++ if (!xhci->shared_hcd) { ++ ret = -ENOMEM; ++ goto dealloc_usb2_hcd; ++ } ++ ++ /* ++ * Set the xHCI pointer before xhci_brcm_setup() (aka hcd_driver.reset) ++ * is called by usb_add_hcd(). ++ */ ++ *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci; ++ ++ ret = usb_add_hcd(xhci->shared_hcd, hcd->irq, IRQF_SHARED); ++ if (ret) ++ goto put_usb3_hcd; ++ brcm_hcd_ptr = hcd_to_brcm(hcd); ++ brcm_hcd_ptr->hcd_clk = usb_clk; ++ ++ return 0; ++ ++put_usb3_hcd: ++ usb_put_hcd(xhci->shared_hcd); ++ ++dealloc_usb2_hcd: ++ usb_remove_hcd(hcd); ++ usb_put_hcd(hcd); ++ ++ return ret; ++} ++ ++static int xhci_brcm_remove(struct platform_device *dev) ++{ ++ struct usb_hcd *hcd = platform_get_drvdata(dev); ++ struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct brcm_hcd *brcm_hcd_ptr = hcd_to_brcm(hcd); ++ ++ usb_remove_hcd(xhci->shared_hcd); ++ usb_put_hcd(xhci->shared_hcd); ++ ++ brcm_usb_remove(dev, brcm_hcd_ptr->hcd_clk); ++ kfree(xhci); ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int xhci_brcm_suspend(struct device *dev) ++{ ++ int ret; ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct brcm_hcd *brcm_hcd_ptr = hcd_to_brcm(hcd); ++ ++ ret = xhci_suspend(xhci, device_may_wakeup(dev)); ++ clk_disable(brcm_hcd_ptr->hcd_clk); ++ return ret; ++} ++ ++static int xhci_brcm_resume(struct device *dev) ++{ ++ struct usb_hcd *hcd = dev_get_drvdata(dev); ++ struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct brcm_hcd *brcm_hcd_ptr = hcd_to_brcm(hcd); ++ int err; ++ ++ err = clk_enable(brcm_hcd_ptr->hcd_clk); ++ if (err) ++ return err; ++ return xhci_resume(xhci, 0); ++} ++ ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(xhci_brcm_pm_ops, xhci_brcm_suspend, ++ xhci_brcm_resume); ++ ++#ifdef CONFIG_OF ++static const struct of_device_id brcm_xhci_of_match[] = { ++ { .compatible = "xhci-platform" }, ++ { .compatible = "brcm,xhci-brcm" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, brcm_xhci_of_match); ++#endif ++ ++static struct platform_driver xhci_brcm_driver = { ++ .probe = xhci_brcm_probe, ++ .remove = xhci_brcm_remove, ++ .driver = { ++ .name = BRCM_DRIVER_NAME, ++ .pm = &xhci_brcm_pm_ops, ++ .of_match_table = of_match_ptr(brcm_xhci_of_match), ++ }, ++}; ++ ++static int __init xhci_brcm_init(void) ++{ ++ if (usb_disabled()) ++ return -ENODEV; ++ pr_info("%s: " BRCM_DRIVER_DESC "\n", BRCM_DRIVER_NAME); ++ xhci_init_driver(&xhci_brcm_hc_driver, xhci_brcm_setup); ++ xhci_brcm_hc_driver.hcd_priv_size = sizeof(struct brcm_hcd); ++ return platform_driver_register(&xhci_brcm_driver); ++} ++module_init(xhci_brcm_init); ++ ++static void __exit xhci_brcm_cleanup(void) ++{ ++ platform_driver_unregister(&xhci_brcm_driver); ++} ++module_exit(xhci_brcm_cleanup); ++ ++MODULE_DESCRIPTION(BRCM_DRIVER_DESC); ++MODULE_AUTHOR("Al Cooper"); ++MODULE_LICENSE("GPL"); +diff --git a/include/linux/brcmstb/3390a0/bchp_common.h b/include/linux/brcmstb/3390a0/bchp_common.h +new file mode 100644 +index 00000000..d2018d72 +--- /dev/null ++++ b/include/linux/brcmstb/3390a0/bchp_common.h +@@ -0,0 +1,6355 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Sun Sep 14 03:14:19 2014 ++ * Full Compile MD5 Checksum ef22086ebd4065e4fea50dbc64f17e5e ++ * (minus title and desc) ++ * MD5 Checksum 39fcae49037a6337517df43bfc24b21f ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM3390_A0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xd0000000 ++#define BCHP_REGISTER_START 0x000000e0 /* MC_BPM_CTRL_0 is first */ ++#define BCHP_REGISTER_END 0x21584d1c /* PHY_ECC_LANE_1 is last */ ++#define BCHP_REGISTER_SIZE 0x0856130f /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_MC_BPM_CTRL_0_REG_START 0x000000e0 ++#define BCHP_MC_BPM_CTRL_0_REG_END 0x000000e4 ++#define BCHP_MC_BPM_CTRL_1_REG_START 0x002000e0 ++#define BCHP_MC_BPM_CTRL_1_REG_END 0x002000e4 ++#define BCHP_MBDMA_UNI3_REG_START 0x00400000 ++#define BCHP_MBDMA_UNI3_REG_END 0x00400508 ++#define BCHP_UNIMAC_INTERFACE0_UNI3_REG_START 0x00400600 ++#define BCHP_UNIMAC_INTERFACE0_UNI3_REG_END 0x00400710 ++#define BCHP_UNIMAC_CORE0_UNI3_REG_START 0x00400800 ++#define BCHP_UNIMAC_CORE0_UNI3_REG_END 0x00400b44 ++#define BCHP_MIB0_UNI3_REG_START 0x00400c00 ++#define BCHP_MIB0_UNI3_REG_END 0x00400cf4 ++#define BCHP_HFB0_UNI3_REG_START 0x00401000 ++#define BCHP_HFB0_UNI3_REG_END 0x00401ffc ++#define BCHP_DAVICMAC_DAV_REG_START 0x00600000 ++#define BCHP_DAVICMAC_DAV_REG_END 0x0060041c ++#define BCHP_DAVIC_DMA_CTRL_DAV_REG_START 0x00600800 ++#define BCHP_DAVIC_DMA_CTRL_DAV_REG_END 0x00600844 ++#define BCHP_DAVIC_DMA_CH1_DAV_REG_START 0x00600900 ++#define BCHP_DAVIC_DMA_CH1_DAV_REG_END 0x0060090c ++#define BCHP_DAVIC_DMA_CH2_DAV_REG_START 0x00600910 ++#define BCHP_DAVIC_DMA_CH2_DAV_REG_END 0x0060091c ++#define BCHP_DAVIC_DMA_CH3_DAV_REG_START 0x00600920 ++#define BCHP_DAVIC_DMA_CH3_DAV_REG_END 0x0060092c ++#define BCHP_DAVIC_DMA_CH4_DAV_REG_START 0x00600930 ++#define BCHP_DAVIC_DMA_CH4_DAV_REG_END 0x0060093c ++#define BCHP_DAVIC_DMA_CH5_DAV_REG_START 0x00600940 ++#define BCHP_DAVIC_DMA_CH5_DAV_REG_END 0x0060094c ++#define BCHP_DAVIC_DMA_CH6_DAV_REG_START 0x00600950 ++#define BCHP_DAVIC_DMA_CH6_DAV_REG_END 0x0060095c ++#define BCHP_DAVIC_DMA_CH7_DAV_REG_START 0x00600960 ++#define BCHP_DAVIC_DMA_CH7_DAV_REG_END 0x0060096c ++#define BCHP_DAVIC_DMA_CH8_DAV_REG_START 0x00600970 ++#define BCHP_DAVIC_DMA_CH8_DAV_REG_END 0x0060097c ++#define BCHP_DAVIC_DMA_CH9_DAV_REG_START 0x00600980 ++#define BCHP_DAVIC_DMA_CH9_DAV_REG_END 0x0060098c ++#define BCHP_DAVIC_DMA_CH10_DAV_REG_START 0x00600990 ++#define BCHP_DAVIC_DMA_CH10_DAV_REG_END 0x0060099c ++#define BCHP_DAVIC_DMA_CH1_STATE_DAV_REG_START 0x00600a00 ++#define BCHP_DAVIC_DMA_CH1_STATE_DAV_REG_END 0x00600a0c ++#define BCHP_DAVIC_DMA_CH2_STATE_DAV_REG_START 0x00600a10 ++#define BCHP_DAVIC_DMA_CH2_STATE_DAV_REG_END 0x00600a1c ++#define BCHP_DAVIC_DMA_CH3_STATE_DAV_REG_START 0x00600a20 ++#define BCHP_DAVIC_DMA_CH3_STATE_DAV_REG_END 0x00600a2c ++#define BCHP_DAVIC_DMA_CH4_STATE_DAV_REG_START 0x00600a30 ++#define BCHP_DAVIC_DMA_CH4_STATE_DAV_REG_END 0x00600a3c ++#define BCHP_DAVIC_DMA_CH5_STATE_DAV_REG_START 0x00600a40 ++#define BCHP_DAVIC_DMA_CH5_STATE_DAV_REG_END 0x00600a4c ++#define BCHP_DAVIC_DMA_CH6_STATE_DAV_REG_START 0x00600a50 ++#define BCHP_DAVIC_DMA_CH6_STATE_DAV_REG_END 0x00600a5c ++#define BCHP_DAVIC_DMA_CH7_STATE_DAV_REG_START 0x00600a60 ++#define BCHP_DAVIC_DMA_CH7_STATE_DAV_REG_END 0x00600a6c ++#define BCHP_DAVIC_DMA_CH8_STATE_DAV_REG_START 0x00600a70 ++#define BCHP_DAVIC_DMA_CH8_STATE_DAV_REG_END 0x00600a7c ++#define BCHP_DAVIC_DMA_CH9_STATE_DAV_REG_START 0x00600a80 ++#define BCHP_DAVIC_DMA_CH9_STATE_DAV_REG_END 0x00600a8c ++#define BCHP_DAVIC_DMA_CH10_STATE_DAV_REG_START 0x00600a90 ++#define BCHP_DAVIC_DMA_CH10_STATE_DAV_REG_END 0x00600a9c ++#define BCHP_BaseReserved_UTP_REG_START 0x00a00000 ++#define BCHP_BaseReserved_UTP_REG_END 0x00a00000 ++#define BCHP_Control_UTP_REG_START 0x00a01000 ++#define BCHP_Control_UTP_REG_END 0x00a010fc ++#define BCHP_OutgoingMessageFIFO_UTP_REG_START 0x00a01100 ++#define BCHP_OutgoingMessageFIFO_UTP_REG_END 0x00a0117c ++#define BCHP_IncomingMessageFIFO_UTP_REG_START 0x00a01200 ++#define BCHP_IncomingMessageFIFO_UTP_REG_END 0x00a0127c ++#define BCHP_DMA0_UTP_REG_START 0x00a01300 ++#define BCHP_DMA0_UTP_REG_END 0x00a0131c ++#define BCHP_DMA1_UTP_REG_START 0x00a01320 ++#define BCHP_DMA1_UTP_REG_END 0x00a0133c ++#define BCHP_DMAHI0_UTP_REG_START 0x00a01340 ++#define BCHP_DMAHI0_UTP_REG_END 0x00a0134c ++#define BCHP_DMAHI1_UTP_REG_START 0x00a01350 ++#define BCHP_DMAHI1_UTP_REG_END 0x00a0135c ++#define BCHP_Token_UTP_REG_START 0x00a01400 ++#define BCHP_Token_UTP_REG_END 0x00a01420 ++#define BCHP_PerfPower_UTP_REG_START 0x00a01600 ++#define BCHP_PerfPower_UTP_REG_END 0x00a01640 ++#define BCHP_MessageID_UTP_REG_START 0x00a01700 ++#define BCHP_MessageID_UTP_REG_END 0x00a0177c ++#define BCHP_HWCounters_UTP_REG_START 0x00a01900 ++#define BCHP_HWCounters_UTP_REG_END 0x00a01944 ++#define BCHP_DQM_0_31_UTP_REG_START 0x00a01c00 ++#define BCHP_DQM_0_31_UTP_REG_END 0x00a01c48 ++#define BCHP_DQM_32_63_UTP_REG_START 0x00a01d00 ++#define BCHP_DQM_32_63_UTP_REG_END 0x00a01d48 ++#define BCHP_QUEUE_TIMER_UTP_REG_START 0x00a02000 ++#define BCHP_QUEUE_TIMER_UTP_REG_END 0x00a021fc ++#define BCHP_QUEUE_STATUS_0_31_UTP_REG_START 0x00a02800 ++#define BCHP_QUEUE_STATUS_0_31_UTP_REG_END 0x00a0287c ++#define BCHP_QUEUE_STATUS_32_63_UTP_REG_START 0x00a02900 ++#define BCHP_QUEUE_STATUS_32_63_UTP_REG_END 0x00a0297c ++#define BCHP_QUEUE_MIB_0_31_UTP_REG_START 0x00a03000 ++#define BCHP_QUEUE_MIB_0_31_UTP_REG_END 0x00a0317c ++#define BCHP_QUEUE_MIB_32_63_UTP_REG_START 0x00a03200 ++#define BCHP_QUEUE_MIB_32_63_UTP_REG_END 0x00a0337c ++#define BCHP_QUEUE_0_CNTRL_UTP_REG_START 0x00a04000 ++#define BCHP_QUEUE_0_CNTRL_UTP_REG_END 0x00a0400c ++#define BCHP_QUEUE_1_CNTRL_UTP_REG_START 0x00a04010 ++#define BCHP_QUEUE_1_CNTRL_UTP_REG_END 0x00a0401c ++#define BCHP_QUEUE_2_CNTRL_UTP_REG_START 0x00a04020 ++#define BCHP_QUEUE_2_CNTRL_UTP_REG_END 0x00a0402c ++#define BCHP_QUEUE_3_CNTRL_UTP_REG_START 0x00a04030 ++#define BCHP_QUEUE_3_CNTRL_UTP_REG_END 0x00a0403c ++#define BCHP_QUEUE_4_CNTRL_UTP_REG_START 0x00a04040 ++#define BCHP_QUEUE_4_CNTRL_UTP_REG_END 0x00a0404c ++#define BCHP_QUEUE_5_CNTRL_UTP_REG_START 0x00a04050 ++#define BCHP_QUEUE_5_CNTRL_UTP_REG_END 0x00a0405c ++#define BCHP_QUEUE_6_CNTRL_UTP_REG_START 0x00a04060 ++#define BCHP_QUEUE_6_CNTRL_UTP_REG_END 0x00a0406c ++#define BCHP_QUEUE_7_CNTRL_UTP_REG_START 0x00a04070 ++#define BCHP_QUEUE_7_CNTRL_UTP_REG_END 0x00a0407c ++#define BCHP_QUEUE_8_CNTRL_UTP_REG_START 0x00a04080 ++#define BCHP_QUEUE_8_CNTRL_UTP_REG_END 0x00a0408c ++#define BCHP_QUEUE_9_CNTRL_UTP_REG_START 0x00a04090 ++#define BCHP_QUEUE_9_CNTRL_UTP_REG_END 0x00a0409c ++#define BCHP_QUEUE_10_CNTRL_UTP_REG_START 0x00a040a0 ++#define BCHP_QUEUE_10_CNTRL_UTP_REG_END 0x00a040ac ++#define BCHP_QUEUE_11_CNTRL_UTP_REG_START 0x00a040b0 ++#define BCHP_QUEUE_11_CNTRL_UTP_REG_END 0x00a040bc ++#define BCHP_QUEUE_12_CNTRL_UTP_REG_START 0x00a040c0 ++#define BCHP_QUEUE_12_CNTRL_UTP_REG_END 0x00a040cc ++#define BCHP_QUEUE_13_CNTRL_UTP_REG_START 0x00a040d0 ++#define BCHP_QUEUE_13_CNTRL_UTP_REG_END 0x00a040dc ++#define BCHP_QUEUE_14_CNTRL_UTP_REG_START 0x00a040e0 ++#define BCHP_QUEUE_14_CNTRL_UTP_REG_END 0x00a040ec ++#define BCHP_QUEUE_15_CNTRL_UTP_REG_START 0x00a040f0 ++#define BCHP_QUEUE_15_CNTRL_UTP_REG_END 0x00a040fc ++#define BCHP_QUEUE_16_CNTRL_UTP_REG_START 0x00a04100 ++#define BCHP_QUEUE_16_CNTRL_UTP_REG_END 0x00a0410c ++#define BCHP_QUEUE_17_CNTRL_UTP_REG_START 0x00a04110 ++#define BCHP_QUEUE_17_CNTRL_UTP_REG_END 0x00a0411c ++#define BCHP_QUEUE_18_CNTRL_UTP_REG_START 0x00a04120 ++#define BCHP_QUEUE_18_CNTRL_UTP_REG_END 0x00a0412c ++#define BCHP_QUEUE_19_CNTRL_UTP_REG_START 0x00a04130 ++#define BCHP_QUEUE_19_CNTRL_UTP_REG_END 0x00a0413c ++#define BCHP_QUEUE_20_CNTRL_UTP_REG_START 0x00a04140 ++#define BCHP_QUEUE_20_CNTRL_UTP_REG_END 0x00a0414c ++#define BCHP_QUEUE_21_CNTRL_UTP_REG_START 0x00a04150 ++#define BCHP_QUEUE_21_CNTRL_UTP_REG_END 0x00a0415c ++#define BCHP_QUEUE_22_CNTRL_UTP_REG_START 0x00a04160 ++#define BCHP_QUEUE_22_CNTRL_UTP_REG_END 0x00a0416c ++#define BCHP_QUEUE_23_CNTRL_UTP_REG_START 0x00a04170 ++#define BCHP_QUEUE_23_CNTRL_UTP_REG_END 0x00a0417c ++#define BCHP_QUEUE_24_CNTRL_UTP_REG_START 0x00a04180 ++#define BCHP_QUEUE_24_CNTRL_UTP_REG_END 0x00a0418c ++#define BCHP_QUEUE_25_CNTRL_UTP_REG_START 0x00a04190 ++#define BCHP_QUEUE_25_CNTRL_UTP_REG_END 0x00a0419c ++#define BCHP_QUEUE_26_CNTRL_UTP_REG_START 0x00a041a0 ++#define BCHP_QUEUE_26_CNTRL_UTP_REG_END 0x00a041ac ++#define BCHP_QUEUE_27_CNTRL_UTP_REG_START 0x00a041b0 ++#define BCHP_QUEUE_27_CNTRL_UTP_REG_END 0x00a041bc ++#define BCHP_QUEUE_28_CNTRL_UTP_REG_START 0x00a041c0 ++#define BCHP_QUEUE_28_CNTRL_UTP_REG_END 0x00a041cc ++#define BCHP_QUEUE_29_CNTRL_UTP_REG_START 0x00a041d0 ++#define BCHP_QUEUE_29_CNTRL_UTP_REG_END 0x00a041dc ++#define BCHP_QUEUE_30_CNTRL_UTP_REG_START 0x00a041e0 ++#define BCHP_QUEUE_30_CNTRL_UTP_REG_END 0x00a041ec ++#define BCHP_QUEUE_31_CNTRL_UTP_REG_START 0x00a041f0 ++#define BCHP_QUEUE_31_CNTRL_UTP_REG_END 0x00a041fc ++#define BCHP_QUEUE_32_CNTRL_UTP_REG_START 0x00a04200 ++#define BCHP_QUEUE_32_CNTRL_UTP_REG_END 0x00a0420c ++#define BCHP_QUEUE_33_CNTRL_UTP_REG_START 0x00a04210 ++#define BCHP_QUEUE_33_CNTRL_UTP_REG_END 0x00a0421c ++#define BCHP_QUEUE_34_CNTRL_UTP_REG_START 0x00a04220 ++#define BCHP_QUEUE_34_CNTRL_UTP_REG_END 0x00a0422c ++#define BCHP_QUEUE_35_CNTRL_UTP_REG_START 0x00a04230 ++#define BCHP_QUEUE_35_CNTRL_UTP_REG_END 0x00a0423c ++#define BCHP_QUEUE_36_CNTRL_UTP_REG_START 0x00a04240 ++#define BCHP_QUEUE_36_CNTRL_UTP_REG_END 0x00a0424c ++#define BCHP_QUEUE_37_CNTRL_UTP_REG_START 0x00a04250 ++#define BCHP_QUEUE_37_CNTRL_UTP_REG_END 0x00a0425c ++#define BCHP_QUEUE_38_CNTRL_UTP_REG_START 0x00a04260 ++#define BCHP_QUEUE_38_CNTRL_UTP_REG_END 0x00a0426c ++#define BCHP_QUEUE_39_CNTRL_UTP_REG_START 0x00a04270 ++#define BCHP_QUEUE_39_CNTRL_UTP_REG_END 0x00a0427c ++#define BCHP_QUEUE_40_CNTRL_UTP_REG_START 0x00a04280 ++#define BCHP_QUEUE_40_CNTRL_UTP_REG_END 0x00a0428c ++#define BCHP_QUEUE_41_CNTRL_UTP_REG_START 0x00a04290 ++#define BCHP_QUEUE_41_CNTRL_UTP_REG_END 0x00a0429c ++#define BCHP_QUEUE_42_CNTRL_UTP_REG_START 0x00a042a0 ++#define BCHP_QUEUE_42_CNTRL_UTP_REG_END 0x00a042ac ++#define BCHP_QUEUE_43_CNTRL_UTP_REG_START 0x00a042b0 ++#define BCHP_QUEUE_43_CNTRL_UTP_REG_END 0x00a042bc ++#define BCHP_QUEUE_44_CNTRL_UTP_REG_START 0x00a042c0 ++#define BCHP_QUEUE_44_CNTRL_UTP_REG_END 0x00a042cc ++#define BCHP_QUEUE_45_CNTRL_UTP_REG_START 0x00a042d0 ++#define BCHP_QUEUE_45_CNTRL_UTP_REG_END 0x00a042dc ++#define BCHP_QUEUE_46_CNTRL_UTP_REG_START 0x00a042e0 ++#define BCHP_QUEUE_46_CNTRL_UTP_REG_END 0x00a042ec ++#define BCHP_QUEUE_47_CNTRL_UTP_REG_START 0x00a042f0 ++#define BCHP_QUEUE_47_CNTRL_UTP_REG_END 0x00a042fc ++#define BCHP_QUEUE_48_CNTRL_UTP_REG_START 0x00a04300 ++#define BCHP_QUEUE_48_CNTRL_UTP_REG_END 0x00a0430c ++#define BCHP_QUEUE_49_CNTRL_UTP_REG_START 0x00a04310 ++#define BCHP_QUEUE_49_CNTRL_UTP_REG_END 0x00a0431c ++#define BCHP_QUEUE_50_CNTRL_UTP_REG_START 0x00a04320 ++#define BCHP_QUEUE_50_CNTRL_UTP_REG_END 0x00a0432c ++#define BCHP_QUEUE_51_CNTRL_UTP_REG_START 0x00a04330 ++#define BCHP_QUEUE_51_CNTRL_UTP_REG_END 0x00a0433c ++#define BCHP_QUEUE_52_CNTRL_UTP_REG_START 0x00a04340 ++#define BCHP_QUEUE_52_CNTRL_UTP_REG_END 0x00a0434c ++#define BCHP_QUEUE_53_CNTRL_UTP_REG_START 0x00a04350 ++#define BCHP_QUEUE_53_CNTRL_UTP_REG_END 0x00a0435c ++#define BCHP_QUEUE_54_CNTRL_UTP_REG_START 0x00a04360 ++#define BCHP_QUEUE_54_CNTRL_UTP_REG_END 0x00a0436c ++#define BCHP_QUEUE_55_CNTRL_UTP_REG_START 0x00a04370 ++#define BCHP_QUEUE_55_CNTRL_UTP_REG_END 0x00a0437c ++#define BCHP_QUEUE_56_CNTRL_UTP_REG_START 0x00a04380 ++#define BCHP_QUEUE_56_CNTRL_UTP_REG_END 0x00a0438c ++#define BCHP_QUEUE_57_CNTRL_UTP_REG_START 0x00a04390 ++#define BCHP_QUEUE_57_CNTRL_UTP_REG_END 0x00a0439c ++#define BCHP_QUEUE_58_CNTRL_UTP_REG_START 0x00a043a0 ++#define BCHP_QUEUE_58_CNTRL_UTP_REG_END 0x00a043ac ++#define BCHP_QUEUE_59_CNTRL_UTP_REG_START 0x00a043b0 ++#define BCHP_QUEUE_59_CNTRL_UTP_REG_END 0x00a043bc ++#define BCHP_QUEUE_60_CNTRL_UTP_REG_START 0x00a043c0 ++#define BCHP_QUEUE_60_CNTRL_UTP_REG_END 0x00a043cc ++#define BCHP_QUEUE_61_CNTRL_UTP_REG_START 0x00a043d0 ++#define BCHP_QUEUE_61_CNTRL_UTP_REG_END 0x00a043dc ++#define BCHP_QUEUE_62_CNTRL_UTP_REG_START 0x00a043e0 ++#define BCHP_QUEUE_62_CNTRL_UTP_REG_END 0x00a043ec ++#define BCHP_QUEUE_63_CNTRL_UTP_REG_START 0x00a043f0 ++#define BCHP_QUEUE_63_CNTRL_UTP_REG_END 0x00a043fc ++#define BCHP_QUEUE_0_DATA_UTP_REG_START 0x00a05000 ++#define BCHP_QUEUE_0_DATA_UTP_REG_END 0x00a0500c ++#define BCHP_QUEUE_1_DATA_UTP_REG_START 0x00a05010 ++#define BCHP_QUEUE_1_DATA_UTP_REG_END 0x00a0501c ++#define BCHP_QUEUE_2_DATA_UTP_REG_START 0x00a05020 ++#define BCHP_QUEUE_2_DATA_UTP_REG_END 0x00a0502c ++#define BCHP_QUEUE_3_DATA_UTP_REG_START 0x00a05030 ++#define BCHP_QUEUE_3_DATA_UTP_REG_END 0x00a0503c ++#define BCHP_QUEUE_4_DATA_UTP_REG_START 0x00a05040 ++#define BCHP_QUEUE_4_DATA_UTP_REG_END 0x00a0504c ++#define BCHP_QUEUE_5_DATA_UTP_REG_START 0x00a05050 ++#define BCHP_QUEUE_5_DATA_UTP_REG_END 0x00a0505c ++#define BCHP_QUEUE_6_DATA_UTP_REG_START 0x00a05060 ++#define BCHP_QUEUE_6_DATA_UTP_REG_END 0x00a0506c ++#define BCHP_QUEUE_7_DATA_UTP_REG_START 0x00a05070 ++#define BCHP_QUEUE_7_DATA_UTP_REG_END 0x00a0507c ++#define BCHP_QUEUE_8_DATA_UTP_REG_START 0x00a05080 ++#define BCHP_QUEUE_8_DATA_UTP_REG_END 0x00a0508c ++#define BCHP_QUEUE_9_DATA_UTP_REG_START 0x00a05090 ++#define BCHP_QUEUE_9_DATA_UTP_REG_END 0x00a0509c ++#define BCHP_QUEUE_10_DATA_UTP_REG_START 0x00a050a0 ++#define BCHP_QUEUE_10_DATA_UTP_REG_END 0x00a050ac ++#define BCHP_QUEUE_11_DATA_UTP_REG_START 0x00a050b0 ++#define BCHP_QUEUE_11_DATA_UTP_REG_END 0x00a050bc ++#define BCHP_QUEUE_12_DATA_UTP_REG_START 0x00a050c0 ++#define BCHP_QUEUE_12_DATA_UTP_REG_END 0x00a050cc ++#define BCHP_QUEUE_13_DATA_UTP_REG_START 0x00a050d0 ++#define BCHP_QUEUE_13_DATA_UTP_REG_END 0x00a050dc ++#define BCHP_QUEUE_14_DATA_UTP_REG_START 0x00a050e0 ++#define BCHP_QUEUE_14_DATA_UTP_REG_END 0x00a050ec ++#define BCHP_QUEUE_15_DATA_UTP_REG_START 0x00a050f0 ++#define BCHP_QUEUE_15_DATA_UTP_REG_END 0x00a050fc ++#define BCHP_QUEUE_16_DATA_UTP_REG_START 0x00a05100 ++#define BCHP_QUEUE_16_DATA_UTP_REG_END 0x00a0510c ++#define BCHP_QUEUE_17_DATA_UTP_REG_START 0x00a05110 ++#define BCHP_QUEUE_17_DATA_UTP_REG_END 0x00a0511c ++#define BCHP_QUEUE_18_DATA_UTP_REG_START 0x00a05120 ++#define BCHP_QUEUE_18_DATA_UTP_REG_END 0x00a0512c ++#define BCHP_QUEUE_19_DATA_UTP_REG_START 0x00a05130 ++#define BCHP_QUEUE_19_DATA_UTP_REG_END 0x00a0513c ++#define BCHP_QUEUE_20_DATA_UTP_REG_START 0x00a05140 ++#define BCHP_QUEUE_20_DATA_UTP_REG_END 0x00a0514c ++#define BCHP_QUEUE_21_DATA_UTP_REG_START 0x00a05150 ++#define BCHP_QUEUE_21_DATA_UTP_REG_END 0x00a0515c ++#define BCHP_QUEUE_22_DATA_UTP_REG_START 0x00a05160 ++#define BCHP_QUEUE_22_DATA_UTP_REG_END 0x00a0516c ++#define BCHP_QUEUE_23_DATA_UTP_REG_START 0x00a05170 ++#define BCHP_QUEUE_23_DATA_UTP_REG_END 0x00a0517c ++#define BCHP_QUEUE_24_DATA_UTP_REG_START 0x00a05180 ++#define BCHP_QUEUE_24_DATA_UTP_REG_END 0x00a0518c ++#define BCHP_QUEUE_25_DATA_UTP_REG_START 0x00a05190 ++#define BCHP_QUEUE_25_DATA_UTP_REG_END 0x00a0519c ++#define BCHP_QUEUE_26_DATA_UTP_REG_START 0x00a051a0 ++#define BCHP_QUEUE_26_DATA_UTP_REG_END 0x00a051ac ++#define BCHP_QUEUE_27_DATA_UTP_REG_START 0x00a051b0 ++#define BCHP_QUEUE_27_DATA_UTP_REG_END 0x00a051bc ++#define BCHP_QUEUE_28_DATA_UTP_REG_START 0x00a051c0 ++#define BCHP_QUEUE_28_DATA_UTP_REG_END 0x00a051cc ++#define BCHP_QUEUE_29_DATA_UTP_REG_START 0x00a051d0 ++#define BCHP_QUEUE_29_DATA_UTP_REG_END 0x00a051dc ++#define BCHP_QUEUE_30_DATA_UTP_REG_START 0x00a051e0 ++#define BCHP_QUEUE_30_DATA_UTP_REG_END 0x00a051ec ++#define BCHP_QUEUE_31_DATA_UTP_REG_START 0x00a051f0 ++#define BCHP_QUEUE_31_DATA_UTP_REG_END 0x00a051fc ++#define BCHP_QUEUE_32_DATA_UTP_REG_START 0x00a05200 ++#define BCHP_QUEUE_32_DATA_UTP_REG_END 0x00a0520c ++#define BCHP_QUEUE_33_DATA_UTP_REG_START 0x00a05210 ++#define BCHP_QUEUE_33_DATA_UTP_REG_END 0x00a0521c ++#define BCHP_QUEUE_34_DATA_UTP_REG_START 0x00a05220 ++#define BCHP_QUEUE_34_DATA_UTP_REG_END 0x00a0522c ++#define BCHP_QUEUE_35_DATA_UTP_REG_START 0x00a05230 ++#define BCHP_QUEUE_35_DATA_UTP_REG_END 0x00a0523c ++#define BCHP_QUEUE_36_DATA_UTP_REG_START 0x00a05240 ++#define BCHP_QUEUE_36_DATA_UTP_REG_END 0x00a0524c ++#define BCHP_QUEUE_37_DATA_UTP_REG_START 0x00a05250 ++#define BCHP_QUEUE_37_DATA_UTP_REG_END 0x00a0525c ++#define BCHP_QUEUE_38_DATA_UTP_REG_START 0x00a05260 ++#define BCHP_QUEUE_38_DATA_UTP_REG_END 0x00a0526c ++#define BCHP_QUEUE_39_DATA_UTP_REG_START 0x00a05270 ++#define BCHP_QUEUE_39_DATA_UTP_REG_END 0x00a0527c ++#define BCHP_QUEUE_40_DATA_UTP_REG_START 0x00a05280 ++#define BCHP_QUEUE_40_DATA_UTP_REG_END 0x00a0528c ++#define BCHP_QUEUE_41_DATA_UTP_REG_START 0x00a05290 ++#define BCHP_QUEUE_41_DATA_UTP_REG_END 0x00a0529c ++#define BCHP_QUEUE_42_DATA_UTP_REG_START 0x00a052a0 ++#define BCHP_QUEUE_42_DATA_UTP_REG_END 0x00a052ac ++#define BCHP_QUEUE_43_DATA_UTP_REG_START 0x00a052b0 ++#define BCHP_QUEUE_43_DATA_UTP_REG_END 0x00a052bc ++#define BCHP_QUEUE_44_DATA_UTP_REG_START 0x00a052c0 ++#define BCHP_QUEUE_44_DATA_UTP_REG_END 0x00a052cc ++#define BCHP_QUEUE_45_DATA_UTP_REG_START 0x00a052d0 ++#define BCHP_QUEUE_45_DATA_UTP_REG_END 0x00a052dc ++#define BCHP_QUEUE_46_DATA_UTP_REG_START 0x00a052e0 ++#define BCHP_QUEUE_46_DATA_UTP_REG_END 0x00a052ec ++#define BCHP_QUEUE_47_DATA_UTP_REG_START 0x00a052f0 ++#define BCHP_QUEUE_47_DATA_UTP_REG_END 0x00a052fc ++#define BCHP_QUEUE_48_DATA_UTP_REG_START 0x00a05300 ++#define BCHP_QUEUE_48_DATA_UTP_REG_END 0x00a0530c ++#define BCHP_QUEUE_49_DATA_UTP_REG_START 0x00a05310 ++#define BCHP_QUEUE_49_DATA_UTP_REG_END 0x00a0531c ++#define BCHP_QUEUE_50_DATA_UTP_REG_START 0x00a05320 ++#define BCHP_QUEUE_50_DATA_UTP_REG_END 0x00a0532c ++#define BCHP_QUEUE_51_DATA_UTP_REG_START 0x00a05330 ++#define BCHP_QUEUE_51_DATA_UTP_REG_END 0x00a0533c ++#define BCHP_QUEUE_52_DATA_UTP_REG_START 0x00a05340 ++#define BCHP_QUEUE_52_DATA_UTP_REG_END 0x00a0534c ++#define BCHP_QUEUE_53_DATA_UTP_REG_START 0x00a05350 ++#define BCHP_QUEUE_53_DATA_UTP_REG_END 0x00a0535c ++#define BCHP_QUEUE_54_DATA_UTP_REG_START 0x00a05360 ++#define BCHP_QUEUE_54_DATA_UTP_REG_END 0x00a0536c ++#define BCHP_QUEUE_55_DATA_UTP_REG_START 0x00a05370 ++#define BCHP_QUEUE_55_DATA_UTP_REG_END 0x00a0537c ++#define BCHP_QUEUE_56_DATA_UTP_REG_START 0x00a05380 ++#define BCHP_QUEUE_56_DATA_UTP_REG_END 0x00a0538c ++#define BCHP_QUEUE_57_DATA_UTP_REG_START 0x00a05390 ++#define BCHP_QUEUE_57_DATA_UTP_REG_END 0x00a0539c ++#define BCHP_QUEUE_58_DATA_UTP_REG_START 0x00a053a0 ++#define BCHP_QUEUE_58_DATA_UTP_REG_END 0x00a053ac ++#define BCHP_QUEUE_59_DATA_UTP_REG_START 0x00a053b0 ++#define BCHP_QUEUE_59_DATA_UTP_REG_END 0x00a053bc ++#define BCHP_QUEUE_60_DATA_UTP_REG_START 0x00a053c0 ++#define BCHP_QUEUE_60_DATA_UTP_REG_END 0x00a053cc ++#define BCHP_QUEUE_61_DATA_UTP_REG_START 0x00a053d0 ++#define BCHP_QUEUE_61_DATA_UTP_REG_END 0x00a053dc ++#define BCHP_QUEUE_62_DATA_UTP_REG_START 0x00a053e0 ++#define BCHP_QUEUE_62_DATA_UTP_REG_END 0x00a053ec ++#define BCHP_QUEUE_63_DATA_UTP_REG_START 0x00a053f0 ++#define BCHP_QUEUE_63_DATA_UTP_REG_END 0x00a053fc ++#define BCHP_OL_DQM_UTP_REG_START 0x00a06c00 ++#define BCHP_OL_DQM_UTP_REG_END 0x00a06c30 ++#define BCHP_OL_QUEUE_STATUS_UTP_REG_START 0x00a07400 ++#define BCHP_OL_QUEUE_STATUS_UTP_REG_END 0x00a0747c ++#define BCHP_OL_QUEUE_0_CNTRL_UTP_REG_START 0x00a08000 ++#define BCHP_OL_QUEUE_0_CNTRL_UTP_REG_END 0x00a0801c ++#define BCHP_OL_QUEUE_1_CNTRL_UTP_REG_START 0x00a08020 ++#define BCHP_OL_QUEUE_1_CNTRL_UTP_REG_END 0x00a0803c ++#define BCHP_OL_QUEUE_2_CNTRL_UTP_REG_START 0x00a08040 ++#define BCHP_OL_QUEUE_2_CNTRL_UTP_REG_END 0x00a0805c ++#define BCHP_OL_QUEUE_3_CNTRL_UTP_REG_START 0x00a08060 ++#define BCHP_OL_QUEUE_3_CNTRL_UTP_REG_END 0x00a0807c ++#define BCHP_OL_QUEUE_4_CNTRL_UTP_REG_START 0x00a08080 ++#define BCHP_OL_QUEUE_4_CNTRL_UTP_REG_END 0x00a0809c ++#define BCHP_OL_QUEUE_5_CNTRL_UTP_REG_START 0x00a080a0 ++#define BCHP_OL_QUEUE_5_CNTRL_UTP_REG_END 0x00a080bc ++#define BCHP_OL_QUEUE_6_CNTRL_UTP_REG_START 0x00a080c0 ++#define BCHP_OL_QUEUE_6_CNTRL_UTP_REG_END 0x00a080dc ++#define BCHP_OL_QUEUE_7_CNTRL_UTP_REG_START 0x00a080e0 ++#define BCHP_OL_QUEUE_7_CNTRL_UTP_REG_END 0x00a080fc ++#define BCHP_OL_QUEUE_8_CNTRL_UTP_REG_START 0x00a08100 ++#define BCHP_OL_QUEUE_8_CNTRL_UTP_REG_END 0x00a0811c ++#define BCHP_OL_QUEUE_9_CNTRL_UTP_REG_START 0x00a08120 ++#define BCHP_OL_QUEUE_9_CNTRL_UTP_REG_END 0x00a0813c ++#define BCHP_OL_QUEUE_10_CNTRL_UTP_REG_START 0x00a08140 ++#define BCHP_OL_QUEUE_10_CNTRL_UTP_REG_END 0x00a0815c ++#define BCHP_OL_QUEUE_11_CNTRL_UTP_REG_START 0x00a08160 ++#define BCHP_OL_QUEUE_11_CNTRL_UTP_REG_END 0x00a0817c ++#define BCHP_OL_QUEUE_12_CNTRL_UTP_REG_START 0x00a08180 ++#define BCHP_OL_QUEUE_12_CNTRL_UTP_REG_END 0x00a0819c ++#define BCHP_OL_QUEUE_13_CNTRL_UTP_REG_START 0x00a081a0 ++#define BCHP_OL_QUEUE_13_CNTRL_UTP_REG_END 0x00a081bc ++#define BCHP_OL_QUEUE_14_CNTRL_UTP_REG_START 0x00a081c0 ++#define BCHP_OL_QUEUE_14_CNTRL_UTP_REG_END 0x00a081dc ++#define BCHP_OL_QUEUE_15_CNTRL_UTP_REG_START 0x00a081e0 ++#define BCHP_OL_QUEUE_15_CNTRL_UTP_REG_END 0x00a081fc ++#define BCHP_OL_QUEUE_16_CNTRL_UTP_REG_START 0x00a08200 ++#define BCHP_OL_QUEUE_16_CNTRL_UTP_REG_END 0x00a0821c ++#define BCHP_OL_QUEUE_17_CNTRL_UTP_REG_START 0x00a08220 ++#define BCHP_OL_QUEUE_17_CNTRL_UTP_REG_END 0x00a0823c ++#define BCHP_OL_QUEUE_18_CNTRL_UTP_REG_START 0x00a08240 ++#define BCHP_OL_QUEUE_18_CNTRL_UTP_REG_END 0x00a0825c ++#define BCHP_OL_QUEUE_19_CNTRL_UTP_REG_START 0x00a08260 ++#define BCHP_OL_QUEUE_19_CNTRL_UTP_REG_END 0x00a0827c ++#define BCHP_OL_QUEUE_20_CNTRL_UTP_REG_START 0x00a08280 ++#define BCHP_OL_QUEUE_20_CNTRL_UTP_REG_END 0x00a0829c ++#define BCHP_OL_QUEUE_21_CNTRL_UTP_REG_START 0x00a082a0 ++#define BCHP_OL_QUEUE_21_CNTRL_UTP_REG_END 0x00a082bc ++#define BCHP_OL_QUEUE_22_CNTRL_UTP_REG_START 0x00a082c0 ++#define BCHP_OL_QUEUE_22_CNTRL_UTP_REG_END 0x00a082dc ++#define BCHP_OL_QUEUE_23_CNTRL_UTP_REG_START 0x00a082e0 ++#define BCHP_OL_QUEUE_23_CNTRL_UTP_REG_END 0x00a082fc ++#define BCHP_OL_QUEUE_24_CNTRL_UTP_REG_START 0x00a08300 ++#define BCHP_OL_QUEUE_24_CNTRL_UTP_REG_END 0x00a0831c ++#define BCHP_OL_QUEUE_25_CNTRL_UTP_REG_START 0x00a08320 ++#define BCHP_OL_QUEUE_25_CNTRL_UTP_REG_END 0x00a0833c ++#define BCHP_OL_QUEUE_26_CNTRL_UTP_REG_START 0x00a08340 ++#define BCHP_OL_QUEUE_26_CNTRL_UTP_REG_END 0x00a0835c ++#define BCHP_OL_QUEUE_27_CNTRL_UTP_REG_START 0x00a08360 ++#define BCHP_OL_QUEUE_27_CNTRL_UTP_REG_END 0x00a0837c ++#define BCHP_OL_QUEUE_28_CNTRL_UTP_REG_START 0x00a08380 ++#define BCHP_OL_QUEUE_28_CNTRL_UTP_REG_END 0x00a0839c ++#define BCHP_OL_QUEUE_29_CNTRL_UTP_REG_START 0x00a083a0 ++#define BCHP_OL_QUEUE_29_CNTRL_UTP_REG_END 0x00a083bc ++#define BCHP_OL_QUEUE_30_CNTRL_UTP_REG_START 0x00a083c0 ++#define BCHP_OL_QUEUE_30_CNTRL_UTP_REG_END 0x00a083dc ++#define BCHP_OL_QUEUE_31_CNTRL_UTP_REG_START 0x00a083e0 ++#define BCHP_OL_QUEUE_31_CNTRL_UTP_REG_END 0x00a083fc ++#define BCHP_OL_QUEUE_0_DATA_UTP_REG_START 0x00a09000 ++#define BCHP_OL_QUEUE_0_DATA_UTP_REG_END 0x00a0901c ++#define BCHP_OL_QUEUE_1_DATA_UTP_REG_START 0x00a09020 ++#define BCHP_OL_QUEUE_1_DATA_UTP_REG_END 0x00a0903c ++#define BCHP_OL_QUEUE_2_DATA_UTP_REG_START 0x00a09040 ++#define BCHP_OL_QUEUE_2_DATA_UTP_REG_END 0x00a0905c ++#define BCHP_OL_QUEUE_3_DATA_UTP_REG_START 0x00a09060 ++#define BCHP_OL_QUEUE_3_DATA_UTP_REG_END 0x00a0907c ++#define BCHP_OL_QUEUE_4_DATA_UTP_REG_START 0x00a09080 ++#define BCHP_OL_QUEUE_4_DATA_UTP_REG_END 0x00a0909c ++#define BCHP_OL_QUEUE_5_DATA_UTP_REG_START 0x00a090a0 ++#define BCHP_OL_QUEUE_5_DATA_UTP_REG_END 0x00a090bc ++#define BCHP_OL_QUEUE_6_DATA_UTP_REG_START 0x00a090c0 ++#define BCHP_OL_QUEUE_6_DATA_UTP_REG_END 0x00a090dc ++#define BCHP_OL_QUEUE_7_DATA_UTP_REG_START 0x00a090e0 ++#define BCHP_OL_QUEUE_7_DATA_UTP_REG_END 0x00a090fc ++#define BCHP_OL_QUEUE_8_DATA_UTP_REG_START 0x00a09100 ++#define BCHP_OL_QUEUE_8_DATA_UTP_REG_END 0x00a0911c ++#define BCHP_OL_QUEUE_9_DATA_UTP_REG_START 0x00a09120 ++#define BCHP_OL_QUEUE_9_DATA_UTP_REG_END 0x00a0913c ++#define BCHP_OL_QUEUE_10_DATA_UTP_REG_START 0x00a09140 ++#define BCHP_OL_QUEUE_10_DATA_UTP_REG_END 0x00a0915c ++#define BCHP_OL_QUEUE_11_DATA_UTP_REG_START 0x00a09160 ++#define BCHP_OL_QUEUE_11_DATA_UTP_REG_END 0x00a0917c ++#define BCHP_OL_QUEUE_12_DATA_UTP_REG_START 0x00a09180 ++#define BCHP_OL_QUEUE_12_DATA_UTP_REG_END 0x00a0919c ++#define BCHP_OL_QUEUE_13_DATA_UTP_REG_START 0x00a091a0 ++#define BCHP_OL_QUEUE_13_DATA_UTP_REG_END 0x00a091bc ++#define BCHP_OL_QUEUE_14_DATA_UTP_REG_START 0x00a091c0 ++#define BCHP_OL_QUEUE_14_DATA_UTP_REG_END 0x00a091dc ++#define BCHP_OL_QUEUE_15_DATA_UTP_REG_START 0x00a091e0 ++#define BCHP_OL_QUEUE_15_DATA_UTP_REG_END 0x00a091fc ++#define BCHP_OL_QUEUE_16_DATA_UTP_REG_START 0x00a09200 ++#define BCHP_OL_QUEUE_16_DATA_UTP_REG_END 0x00a0921c ++#define BCHP_OL_QUEUE_17_DATA_UTP_REG_START 0x00a09220 ++#define BCHP_OL_QUEUE_17_DATA_UTP_REG_END 0x00a0923c ++#define BCHP_OL_QUEUE_18_DATA_UTP_REG_START 0x00a09240 ++#define BCHP_OL_QUEUE_18_DATA_UTP_REG_END 0x00a0925c ++#define BCHP_OL_QUEUE_19_DATA_UTP_REG_START 0x00a09260 ++#define BCHP_OL_QUEUE_19_DATA_UTP_REG_END 0x00a0927c ++#define BCHP_OL_QUEUE_20_DATA_UTP_REG_START 0x00a09280 ++#define BCHP_OL_QUEUE_20_DATA_UTP_REG_END 0x00a0929c ++#define BCHP_OL_QUEUE_21_DATA_UTP_REG_START 0x00a092a0 ++#define BCHP_OL_QUEUE_21_DATA_UTP_REG_END 0x00a092bc ++#define BCHP_OL_QUEUE_22_DATA_UTP_REG_START 0x00a092c0 ++#define BCHP_OL_QUEUE_22_DATA_UTP_REG_END 0x00a092dc ++#define BCHP_OL_QUEUE_23_DATA_UTP_REG_START 0x00a092e0 ++#define BCHP_OL_QUEUE_23_DATA_UTP_REG_END 0x00a092fc ++#define BCHP_OL_QUEUE_24_DATA_UTP_REG_START 0x00a09300 ++#define BCHP_OL_QUEUE_24_DATA_UTP_REG_END 0x00a0931c ++#define BCHP_OL_QUEUE_25_DATA_UTP_REG_START 0x00a09320 ++#define BCHP_OL_QUEUE_25_DATA_UTP_REG_END 0x00a0933c ++#define BCHP_OL_QUEUE_26_DATA_UTP_REG_START 0x00a09340 ++#define BCHP_OL_QUEUE_26_DATA_UTP_REG_END 0x00a0935c ++#define BCHP_OL_QUEUE_27_DATA_UTP_REG_START 0x00a09360 ++#define BCHP_OL_QUEUE_27_DATA_UTP_REG_END 0x00a0937c ++#define BCHP_OL_QUEUE_28_DATA_UTP_REG_START 0x00a09380 ++#define BCHP_OL_QUEUE_28_DATA_UTP_REG_END 0x00a0939c ++#define BCHP_OL_QUEUE_29_DATA_UTP_REG_START 0x00a093a0 ++#define BCHP_OL_QUEUE_29_DATA_UTP_REG_END 0x00a093bc ++#define BCHP_OL_QUEUE_30_DATA_UTP_REG_START 0x00a093c0 ++#define BCHP_OL_QUEUE_30_DATA_UTP_REG_END 0x00a093dc ++#define BCHP_OL_QUEUE_31_DATA_UTP_REG_START 0x00a093e0 ++#define BCHP_OL_QUEUE_31_DATA_UTP_REG_END 0x00a093fc ++#define BCHP_OL_QUEUE_MIB_UTP_REG_START 0x00a0a000 ++#define BCHP_OL_QUEUE_MIB_UTP_REG_END 0x00a0a17c ++#define BCHP_SEGDMA_CONFIG_UTP_REG_START 0x00a20000 ++#define BCHP_SEGDMA_CONFIG_UTP_REG_END 0x00a2003c ++#define BCHP_SEGDMA_IRQ_HOST_UTP_REG_START 0x00a20100 ++#define BCHP_SEGDMA_IRQ_HOST_UTP_REG_END 0x00a2013c ++#define BCHP_SEGDMA_IRQ_UTP_UTP_REG_START 0x00a20200 ++#define BCHP_SEGDMA_IRQ_UTP_UTP_REG_END 0x00a2023c ++#define BCHP_SEGDMA_STAT_UTP_REG_START 0x00a20300 ++#define BCHP_SEGDMA_STAT_UTP_REG_END 0x00a203a4 ++#define BCHP_SEGDMA_TEST_UTP_REG_START 0x00a20400 ++#define BCHP_SEGDMA_TEST_UTP_REG_END 0x00a2045c ++#define BCHP_SEGDMA_CHAN0_UTP_REG_START 0x00a21000 ++#define BCHP_SEGDMA_CHAN0_UTP_REG_END 0x00a2103c ++#define BCHP_SEGDMA_CHAN1_UTP_REG_START 0x00a21100 ++#define BCHP_SEGDMA_CHAN1_UTP_REG_END 0x00a2113c ++#define BCHP_SEGDMA_CHAN2_UTP_REG_START 0x00a21200 ++#define BCHP_SEGDMA_CHAN2_UTP_REG_END 0x00a2123c ++#define BCHP_SEGDMA_CHAN3_UTP_REG_START 0x00a21300 ++#define BCHP_SEGDMA_CHAN3_UTP_REG_END 0x00a2133c ++#define BCHP_SEGDMA_CHAN4_UTP_REG_START 0x00a21400 ++#define BCHP_SEGDMA_CHAN4_UTP_REG_END 0x00a2143c ++#define BCHP_SEGDMA_CHAN5_UTP_REG_START 0x00a21500 ++#define BCHP_SEGDMA_CHAN5_UTP_REG_END 0x00a2153c ++#define BCHP_SEGDMA_CHAN6_UTP_REG_START 0x00a21600 ++#define BCHP_SEGDMA_CHAN6_UTP_REG_END 0x00a2163c ++#define BCHP_SEGDMA_CHAN7_UTP_REG_START 0x00a21700 ++#define BCHP_SEGDMA_CHAN7_UTP_REG_END 0x00a2173c ++#define BCHP_SEGDMA_CHAN8_UTP_REG_START 0x00a21800 ++#define BCHP_SEGDMA_CHAN8_UTP_REG_END 0x00a2183c ++#define BCHP_SEGDMA_CHAN9_UTP_REG_START 0x00a21900 ++#define BCHP_SEGDMA_CHAN9_UTP_REG_END 0x00a2193c ++#define BCHP_SEGDMA_FLOW0_UTP_REG_START 0x00a22000 ++#define BCHP_SEGDMA_FLOW0_UTP_REG_END 0x00a2207c ++#define BCHP_SEGDMA_FLOW1_UTP_REG_START 0x00a22100 ++#define BCHP_SEGDMA_FLOW1_UTP_REG_END 0x00a2217c ++#define BCHP_SEGDMA_FLOW2_UTP_REG_START 0x00a22200 ++#define BCHP_SEGDMA_FLOW2_UTP_REG_END 0x00a2227c ++#define BCHP_SEGDMA_FLOW3_UTP_REG_START 0x00a22300 ++#define BCHP_SEGDMA_FLOW3_UTP_REG_END 0x00a2237c ++#define BCHP_SEGDMA_FLOW4_UTP_REG_START 0x00a22400 ++#define BCHP_SEGDMA_FLOW4_UTP_REG_END 0x00a2247c ++#define BCHP_SEGDMA_FLOW5_UTP_REG_START 0x00a22500 ++#define BCHP_SEGDMA_FLOW5_UTP_REG_END 0x00a2257c ++#define BCHP_SEGDMA_FLOW6_UTP_REG_START 0x00a22600 ++#define BCHP_SEGDMA_FLOW6_UTP_REG_END 0x00a2267c ++#define BCHP_SEGDMA_FLOW7_UTP_REG_START 0x00a22700 ++#define BCHP_SEGDMA_FLOW7_UTP_REG_END 0x00a2277c ++#define BCHP_SEGDMA_FLOW8_UTP_REG_START 0x00a22800 ++#define BCHP_SEGDMA_FLOW8_UTP_REG_END 0x00a2287c ++#define BCHP_SEGDMA_FLOW9_UTP_REG_START 0x00a22900 ++#define BCHP_SEGDMA_FLOW9_UTP_REG_END 0x00a2297c ++#define BCHP_SEGDMA_FLOW10_UTP_REG_START 0x00a22a00 ++#define BCHP_SEGDMA_FLOW10_UTP_REG_END 0x00a22a7c ++#define BCHP_SEGDMA_FLOW11_UTP_REG_START 0x00a22b00 ++#define BCHP_SEGDMA_FLOW11_UTP_REG_END 0x00a22b7c ++#define BCHP_SEGDMA_FLOW12_UTP_REG_START 0x00a22c00 ++#define BCHP_SEGDMA_FLOW12_UTP_REG_END 0x00a22c7c ++#define BCHP_SEGDMA_FLOW13_UTP_REG_START 0x00a22d00 ++#define BCHP_SEGDMA_FLOW13_UTP_REG_END 0x00a22d7c ++#define BCHP_SEGDMA_FLOW14_UTP_REG_START 0x00a22e00 ++#define BCHP_SEGDMA_FLOW14_UTP_REG_END 0x00a22e7c ++#define BCHP_SEGDMA_FLOW15_UTP_REG_START 0x00a22f00 ++#define BCHP_SEGDMA_FLOW15_UTP_REG_END 0x00a22f7c ++#define BCHP_SEGDMA_FLOW16_UTP_REG_START 0x00a23000 ++#define BCHP_SEGDMA_FLOW16_UTP_REG_END 0x00a2307c ++#define BCHP_SEGDMA_FLOW17_UTP_REG_START 0x00a23100 ++#define BCHP_SEGDMA_FLOW17_UTP_REG_END 0x00a2317c ++#define BCHP_SEGDMA_FLOW18_UTP_REG_START 0x00a23200 ++#define BCHP_SEGDMA_FLOW18_UTP_REG_END 0x00a2327c ++#define BCHP_SEGDMA_FLOW19_UTP_REG_START 0x00a23300 ++#define BCHP_SEGDMA_FLOW19_UTP_REG_END 0x00a2337c ++#define BCHP_SEGDMA_FLOW20_UTP_REG_START 0x00a23400 ++#define BCHP_SEGDMA_FLOW20_UTP_REG_END 0x00a2347c ++#define BCHP_SEGDMA_FLOW21_UTP_REG_START 0x00a23500 ++#define BCHP_SEGDMA_FLOW21_UTP_REG_END 0x00a2357c ++#define BCHP_SEGDMA_FLOW22_UTP_REG_START 0x00a23600 ++#define BCHP_SEGDMA_FLOW22_UTP_REG_END 0x00a2367c ++#define BCHP_SEGDMA_FLOW23_UTP_REG_START 0x00a23700 ++#define BCHP_SEGDMA_FLOW23_UTP_REG_END 0x00a2377c ++#define BCHP_SEGDMA_FLOW24_UTP_REG_START 0x00a23800 ++#define BCHP_SEGDMA_FLOW24_UTP_REG_END 0x00a2387c ++#define BCHP_SEGDMA_FLOW25_UTP_REG_START 0x00a23900 ++#define BCHP_SEGDMA_FLOW25_UTP_REG_END 0x00a2397c ++#define BCHP_SEGDMA_FLOW26_UTP_REG_START 0x00a23a00 ++#define BCHP_SEGDMA_FLOW26_UTP_REG_END 0x00a23a7c ++#define BCHP_SEGDMA_FLOW27_UTP_REG_START 0x00a23b00 ++#define BCHP_SEGDMA_FLOW27_UTP_REG_END 0x00a23b7c ++#define BCHP_SEGDMA_FLOW28_UTP_REG_START 0x00a23c00 ++#define BCHP_SEGDMA_FLOW28_UTP_REG_END 0x00a23c7c ++#define BCHP_SEGDMA_FLOW29_UTP_REG_START 0x00a23d00 ++#define BCHP_SEGDMA_FLOW29_UTP_REG_END 0x00a23d7c ++#define BCHP_SEGDMA_FLOW30_UTP_REG_START 0x00a23e00 ++#define BCHP_SEGDMA_FLOW30_UTP_REG_END 0x00a23e7c ++#define BCHP_SEGDMA_FLOW31_UTP_REG_START 0x00a23f00 ++#define BCHP_SEGDMA_FLOW31_UTP_REG_END 0x00a23f7c ++#define BCHP_SEGDMA_TEST_FLOW_UTP_REG_START 0x00a24000 ++#define BCHP_SEGDMA_TEST_FLOW_UTP_REG_END 0x00a2407c ++#define BCHP_SEGDMA_TEST_FIFO_UTP_REG_START 0x00a24100 ++#define BCHP_SEGDMA_TEST_FIFO_UTP_REG_END 0x00a24108 ++#define BCHP_CRYPTO_UTP_REG_START 0x00a30000 ++#define BCHP_CRYPTO_UTP_REG_END 0x00a3d000 ++#define BCHP_QueueSharedMem_UTP_REG_START 0x00a40000 ++#define BCHP_QueueSharedMem_UTP_REG_END 0x00a4bffc ++#define BCHP_PacketSharedMemory_UTP_REG_START 0x00a80000 ++#define BCHP_PacketSharedMemory_UTP_REG_END 0x00a80ffc ++#define BCHP_QListMem_UTP_REG_START 0x00b00000 ++#define BCHP_QListMem_UTP_REG_END 0x00b03ffc ++#define BCHP_QueueListConfig_UTP_REG_START 0x00b05000 ++#define BCHP_QueueListConfig_UTP_REG_END 0x00b0521c ++#define BCHP_QiThreshold_UTP_REG_START 0x00b05400 ++#define BCHP_QiThreshold_UTP_REG_END 0x00b0547c ++#define BCHP_AckCelMaxCnt_UTP_REG_START 0x00b05500 ++#define BCHP_AckCelMaxCnt_UTP_REG_END 0x00b0553c ++#define BCHP_MIBs_UTP_REG_START 0x00b05600 ++#define BCHP_MIBs_UTP_REG_END 0x00b05634 ++#define BCHP_UTPIncomingMessageFIFO_UTP_REG_START 0x00b05700 ++#define BCHP_UTPIncomingMessageFIFO_UTP_REG_END 0x00b05740 ++#define BCHP_QueueListHeadTail_UTP_REG_START 0x00b05800 ++#define BCHP_QueueListHeadTail_UTP_REG_END 0x00b058fc ++#define BCHP_TokenInsertion_UTP_REG_START 0x00b05a00 ++#define BCHP_TokenInsertion_UTP_REG_END 0x00b05a1c ++#define BCHP_TokenDeletion_UTP_REG_START 0x00b05a20 ++#define BCHP_TokenDeletion_UTP_REG_END 0x00b05a30 ++#define BCHP_TamMisc_UTP_REG_START 0x00b05a40 ++#define BCHP_TamMisc_UTP_REG_END 0x00b05aa0 ++#define BCHP_QueueAvailSize_UTP_REG_START 0x00b05b00 ++#define BCHP_QueueAvailSize_UTP_REG_END 0x00b05bfc ++#define BCHP_UTPMaxRate_FLOW0_UTP_REG_START 0x00b05c00 ++#define BCHP_UTPMaxRate_FLOW0_UTP_REG_END 0x00b05c0c ++#define BCHP_UTPMaxRate_FLOW1_UTP_REG_START 0x00b05c10 ++#define BCHP_UTPMaxRate_FLOW1_UTP_REG_END 0x00b05c1c ++#define BCHP_UTPMaxRate_FLOW2_UTP_REG_START 0x00b05c20 ++#define BCHP_UTPMaxRate_FLOW2_UTP_REG_END 0x00b05c2c ++#define BCHP_UTPMaxRate_FLOW3_UTP_REG_START 0x00b05c30 ++#define BCHP_UTPMaxRate_FLOW3_UTP_REG_END 0x00b05c3c ++#define BCHP_UTPMaxRate_FLOW4_UTP_REG_START 0x00b05c40 ++#define BCHP_UTPMaxRate_FLOW4_UTP_REG_END 0x00b05c4c ++#define BCHP_UTPMaxRate_FLOW5_UTP_REG_START 0x00b05c50 ++#define BCHP_UTPMaxRate_FLOW5_UTP_REG_END 0x00b05c5c ++#define BCHP_UTPMaxRate_FLOW6_UTP_REG_START 0x00b05c60 ++#define BCHP_UTPMaxRate_FLOW6_UTP_REG_END 0x00b05c6c ++#define BCHP_UTPMaxRate_FLOW7_UTP_REG_START 0x00b05c70 ++#define BCHP_UTPMaxRate_FLOW7_UTP_REG_END 0x00b05c7c ++#define BCHP_UTPMaxRate_FLOW8_UTP_REG_START 0x00b05c80 ++#define BCHP_UTPMaxRate_FLOW8_UTP_REG_END 0x00b05c8c ++#define BCHP_UTPMaxRate_FLOW9_UTP_REG_START 0x00b05c90 ++#define BCHP_UTPMaxRate_FLOW9_UTP_REG_END 0x00b05c9c ++#define BCHP_UTPMaxRate_FLOW10_UTP_REG_START 0x00b05ca0 ++#define BCHP_UTPMaxRate_FLOW10_UTP_REG_END 0x00b05cac ++#define BCHP_UTPMaxRate_FLOW11_UTP_REG_START 0x00b05cb0 ++#define BCHP_UTPMaxRate_FLOW11_UTP_REG_END 0x00b05cbc ++#define BCHP_UTPMaxRate_FLOW12_UTP_REG_START 0x00b05cc0 ++#define BCHP_UTPMaxRate_FLOW12_UTP_REG_END 0x00b05ccc ++#define BCHP_UTPMaxRate_FLOW13_UTP_REG_START 0x00b05cd0 ++#define BCHP_UTPMaxRate_FLOW13_UTP_REG_END 0x00b05cdc ++#define BCHP_UTPMaxRate_FLOW14_UTP_REG_START 0x00b05ce0 ++#define BCHP_UTPMaxRate_FLOW14_UTP_REG_END 0x00b05cec ++#define BCHP_UTPMaxRate_FLOW15_UTP_REG_START 0x00b05cf0 ++#define BCHP_UTPMaxRate_FLOW15_UTP_REG_END 0x00b05cfc ++#define BCHP_UTPPeakRate_FLOW0_UTP_REG_START 0x00b05d00 ++#define BCHP_UTPPeakRate_FLOW0_UTP_REG_END 0x00b05d0c ++#define BCHP_UTPPeakRate_FLOW1_UTP_REG_START 0x00b05d10 ++#define BCHP_UTPPeakRate_FLOW1_UTP_REG_END 0x00b05d1c ++#define BCHP_UTPPeakRate_FLOW2_UTP_REG_START 0x00b05d20 ++#define BCHP_UTPPeakRate_FLOW2_UTP_REG_END 0x00b05d2c ++#define BCHP_UTPPeakRate_FLOW3_UTP_REG_START 0x00b05d30 ++#define BCHP_UTPPeakRate_FLOW3_UTP_REG_END 0x00b05d3c ++#define BCHP_UTPPeakRate_FLOW4_UTP_REG_START 0x00b05d40 ++#define BCHP_UTPPeakRate_FLOW4_UTP_REG_END 0x00b05d4c ++#define BCHP_UTPPeakRate_FLOW5_UTP_REG_START 0x00b05d50 ++#define BCHP_UTPPeakRate_FLOW5_UTP_REG_END 0x00b05d5c ++#define BCHP_UTPPeakRate_FLOW6_UTP_REG_START 0x00b05d60 ++#define BCHP_UTPPeakRate_FLOW6_UTP_REG_END 0x00b05d6c ++#define BCHP_UTPPeakRate_FLOW7_UTP_REG_START 0x00b05d70 ++#define BCHP_UTPPeakRate_FLOW7_UTP_REG_END 0x00b05d7c ++#define BCHP_UTPPeakRate_FLOW8_UTP_REG_START 0x00b05d80 ++#define BCHP_UTPPeakRate_FLOW8_UTP_REG_END 0x00b05d8c ++#define BCHP_UTPPeakRate_FLOW9_UTP_REG_START 0x00b05d90 ++#define BCHP_UTPPeakRate_FLOW9_UTP_REG_END 0x00b05d9c ++#define BCHP_UTPPeakRate_FLOW10_UTP_REG_START 0x00b05da0 ++#define BCHP_UTPPeakRate_FLOW10_UTP_REG_END 0x00b05dac ++#define BCHP_UTPPeakRate_FLOW11_UTP_REG_START 0x00b05db0 ++#define BCHP_UTPPeakRate_FLOW11_UTP_REG_END 0x00b05dbc ++#define BCHP_UTPPeakRate_FLOW12_UTP_REG_START 0x00b05dc0 ++#define BCHP_UTPPeakRate_FLOW12_UTP_REG_END 0x00b05dcc ++#define BCHP_UTPPeakRate_FLOW13_UTP_REG_START 0x00b05dd0 ++#define BCHP_UTPPeakRate_FLOW13_UTP_REG_END 0x00b05ddc ++#define BCHP_UTPPeakRate_FLOW14_UTP_REG_START 0x00b05de0 ++#define BCHP_UTPPeakRate_FLOW14_UTP_REG_END 0x00b05dec ++#define BCHP_UTPPeakRate_FLOW15_UTP_REG_START 0x00b05df0 ++#define BCHP_UTPPeakRate_FLOW15_UTP_REG_END 0x00b05dfc ++#define BCHP_UTPTimer_0_UTP_REG_START 0x00b05e00 ++#define BCHP_UTPTimer_0_UTP_REG_END 0x00b05e04 ++#define BCHP_UTPTimer_1_UTP_REG_START 0x00b05e08 ++#define BCHP_UTPTimer_1_UTP_REG_END 0x00b05e0c ++#define BCHP_UTPTimer_2_UTP_REG_START 0x00b05e10 ++#define BCHP_UTPTimer_2_UTP_REG_END 0x00b05e14 ++#define BCHP_UTPTimer_3_UTP_REG_START 0x00b05e18 ++#define BCHP_UTPTimer_3_UTP_REG_END 0x00b05e1c ++#define BCHP_UTPTimer_4_UTP_REG_START 0x00b05e20 ++#define BCHP_UTPTimer_4_UTP_REG_END 0x00b05e24 ++#define BCHP_UTPTimer_5_UTP_REG_START 0x00b05e28 ++#define BCHP_UTPTimer_5_UTP_REG_END 0x00b05e2c ++#define BCHP_UTPTimer_6_UTP_REG_START 0x00b05e30 ++#define BCHP_UTPTimer_6_UTP_REG_END 0x00b05e34 ++#define BCHP_UTPTimer_7_UTP_REG_START 0x00b05e38 ++#define BCHP_UTPTimer_7_UTP_REG_END 0x00b05e3c ++#define BCHP_UTPTimer_8_UTP_REG_START 0x00b05e40 ++#define BCHP_UTPTimer_8_UTP_REG_END 0x00b05e44 ++#define BCHP_UTPTimer_9_UTP_REG_START 0x00b05e48 ++#define BCHP_UTPTimer_9_UTP_REG_END 0x00b05e4c ++#define BCHP_UTPTimer_10_UTP_REG_START 0x00b05e50 ++#define BCHP_UTPTimer_10_UTP_REG_END 0x00b05e54 ++#define BCHP_UTPTimer_11_UTP_REG_START 0x00b05e58 ++#define BCHP_UTPTimer_11_UTP_REG_END 0x00b05e5c ++#define BCHP_UTPTimer_12_UTP_REG_START 0x00b05e60 ++#define BCHP_UTPTimer_12_UTP_REG_END 0x00b05e64 ++#define BCHP_UTPTimer_13_UTP_REG_START 0x00b05e68 ++#define BCHP_UTPTimer_13_UTP_REG_END 0x00b05e6c ++#define BCHP_UTPTimer_14_UTP_REG_START 0x00b05e70 ++#define BCHP_UTPTimer_14_UTP_REG_END 0x00b05e74 ++#define BCHP_UTPTimer_15_UTP_REG_START 0x00b05e78 ++#define BCHP_UTPTimer_15_UTP_REG_END 0x00b05e7c ++#define BCHP_UTPTimer_16_UTP_REG_START 0x00b05e80 ++#define BCHP_UTPTimer_16_UTP_REG_END 0x00b05e84 ++#define BCHP_UTPTimer_17_UTP_REG_START 0x00b05e88 ++#define BCHP_UTPTimer_17_UTP_REG_END 0x00b05e8c ++#define BCHP_UTPBytesSent_FLOW0_UTP_REG_START 0x00b05f00 ++#define BCHP_UTPBytesSent_FLOW0_UTP_REG_END 0x00b05f04 ++#define BCHP_UTPBytesSent_FLOW1_UTP_REG_START 0x00b05f08 ++#define BCHP_UTPBytesSent_FLOW1_UTP_REG_END 0x00b05f0c ++#define BCHP_UTPBytesSent_FLOW2_UTP_REG_START 0x00b05f10 ++#define BCHP_UTPBytesSent_FLOW2_UTP_REG_END 0x00b05f14 ++#define BCHP_UTPBytesSent_FLOW3_UTP_REG_START 0x00b05f18 ++#define BCHP_UTPBytesSent_FLOW3_UTP_REG_END 0x00b05f1c ++#define BCHP_UTPBytesSent_FLOW4_UTP_REG_START 0x00b05f20 ++#define BCHP_UTPBytesSent_FLOW4_UTP_REG_END 0x00b05f24 ++#define BCHP_UTPBytesSent_FLOW5_UTP_REG_START 0x00b05f28 ++#define BCHP_UTPBytesSent_FLOW5_UTP_REG_END 0x00b05f2c ++#define BCHP_UTPBytesSent_FLOW6_UTP_REG_START 0x00b05f30 ++#define BCHP_UTPBytesSent_FLOW6_UTP_REG_END 0x00b05f34 ++#define BCHP_UTPBytesSent_FLOW7_UTP_REG_START 0x00b05f38 ++#define BCHP_UTPBytesSent_FLOW7_UTP_REG_END 0x00b05f3c ++#define BCHP_UTPBytesSent_FLOW8_UTP_REG_START 0x00b05f40 ++#define BCHP_UTPBytesSent_FLOW8_UTP_REG_END 0x00b05f44 ++#define BCHP_UTPBytesSent_FLOW9_UTP_REG_START 0x00b05f48 ++#define BCHP_UTPBytesSent_FLOW9_UTP_REG_END 0x00b05f4c ++#define BCHP_UTPBytesSent_FLOW10_UTP_REG_START 0x00b05f50 ++#define BCHP_UTPBytesSent_FLOW10_UTP_REG_END 0x00b05f54 ++#define BCHP_UTPBytesSent_FLOW11_UTP_REG_START 0x00b05f58 ++#define BCHP_UTPBytesSent_FLOW11_UTP_REG_END 0x00b05f5c ++#define BCHP_UTPBytesSent_FLOW12_UTP_REG_START 0x00b05f60 ++#define BCHP_UTPBytesSent_FLOW12_UTP_REG_END 0x00b05f64 ++#define BCHP_UTPBytesSent_FLOW13_UTP_REG_START 0x00b05f68 ++#define BCHP_UTPBytesSent_FLOW13_UTP_REG_END 0x00b05f6c ++#define BCHP_UTPBytesSent_FLOW14_UTP_REG_START 0x00b05f70 ++#define BCHP_UTPBytesSent_FLOW14_UTP_REG_END 0x00b05f74 ++#define BCHP_UTPBytesSent_FLOW15_UTP_REG_START 0x00b05f78 ++#define BCHP_UTPBytesSent_FLOW15_UTP_REG_END 0x00b05f7c ++#define BCHP_UTPBytesSent_FLOW16_UTP_REG_START 0x00b05f80 ++#define BCHP_UTPBytesSent_FLOW16_UTP_REG_END 0x00b05f84 ++#define BCHP_UTPBytesSent_FLOW17_UTP_REG_START 0x00b05f88 ++#define BCHP_UTPBytesSent_FLOW17_UTP_REG_END 0x00b05f8c ++#define BCHP_UTPBytesSent_FLOW18_UTP_REG_START 0x00b05f90 ++#define BCHP_UTPBytesSent_FLOW18_UTP_REG_END 0x00b05f94 ++#define BCHP_UTPBytesSent_FLOW19_UTP_REG_START 0x00b05f98 ++#define BCHP_UTPBytesSent_FLOW19_UTP_REG_END 0x00b05f9c ++#define BCHP_UTPBytesSent_FLOW20_UTP_REG_START 0x00b05fa0 ++#define BCHP_UTPBytesSent_FLOW20_UTP_REG_END 0x00b05fa4 ++#define BCHP_UTPBytesSent_FLOW21_UTP_REG_START 0x00b05fa8 ++#define BCHP_UTPBytesSent_FLOW21_UTP_REG_END 0x00b05fac ++#define BCHP_UTPBytesSent_FLOW22_UTP_REG_START 0x00b05fb0 ++#define BCHP_UTPBytesSent_FLOW22_UTP_REG_END 0x00b05fb4 ++#define BCHP_UTPBytesSent_FLOW23_UTP_REG_START 0x00b05fb8 ++#define BCHP_UTPBytesSent_FLOW23_UTP_REG_END 0x00b05fbc ++#define BCHP_UTPBytesSent_FLOW24_UTP_REG_START 0x00b05fc0 ++#define BCHP_UTPBytesSent_FLOW24_UTP_REG_END 0x00b05fc4 ++#define BCHP_UTPBytesSent_FLOW25_UTP_REG_START 0x00b05fc8 ++#define BCHP_UTPBytesSent_FLOW25_UTP_REG_END 0x00b05fcc ++#define BCHP_UTPBytesSent_FLOW26_UTP_REG_START 0x00b05fd0 ++#define BCHP_UTPBytesSent_FLOW26_UTP_REG_END 0x00b05fd4 ++#define BCHP_UTPBytesSent_FLOW27_UTP_REG_START 0x00b05fd8 ++#define BCHP_UTPBytesSent_FLOW27_UTP_REG_END 0x00b05fdc ++#define BCHP_UTPBytesSent_FLOW28_UTP_REG_START 0x00b05fe0 ++#define BCHP_UTPBytesSent_FLOW28_UTP_REG_END 0x00b05fe4 ++#define BCHP_UTPBytesSent_FLOW29_UTP_REG_START 0x00b05fe8 ++#define BCHP_UTPBytesSent_FLOW29_UTP_REG_END 0x00b05fec ++#define BCHP_UTPBytesSent_FLOW30_UTP_REG_START 0x00b05ff0 ++#define BCHP_UTPBytesSent_FLOW30_UTP_REG_END 0x00b05ff4 ++#define BCHP_UTPBytesSent_FLOW31_UTP_REG_START 0x00b05ff8 ++#define BCHP_UTPBytesSent_FLOW31_UTP_REG_END 0x00b05ffc ++#define BCHP_UTPTokensInserted0_UTP_REG_START 0x00b06000 ++#define BCHP_UTPTokensInserted0_UTP_REG_END 0x00b06004 ++#define BCHP_UTPTokensInserted1_UTP_REG_START 0x00b06008 ++#define BCHP_UTPTokensInserted1_UTP_REG_END 0x00b0600c ++#define BCHP_UTPTokensInserted2_UTP_REG_START 0x00b06010 ++#define BCHP_UTPTokensInserted2_UTP_REG_END 0x00b06014 ++#define BCHP_UTPTokensInserted3_UTP_REG_START 0x00b06018 ++#define BCHP_UTPTokensInserted3_UTP_REG_END 0x00b0601c ++#define BCHP_UTPTokensInserted4_UTP_REG_START 0x00b06020 ++#define BCHP_UTPTokensInserted4_UTP_REG_END 0x00b06024 ++#define BCHP_UTPTokensInserted5_UTP_REG_START 0x00b06028 ++#define BCHP_UTPTokensInserted5_UTP_REG_END 0x00b0602c ++#define BCHP_UTPTokensInserted6_UTP_REG_START 0x00b06030 ++#define BCHP_UTPTokensInserted6_UTP_REG_END 0x00b06034 ++#define BCHP_UTPTokensInserted7_UTP_REG_START 0x00b06038 ++#define BCHP_UTPTokensInserted7_UTP_REG_END 0x00b0603c ++#define BCHP_UTPTokensInserted8_UTP_REG_START 0x00b06040 ++#define BCHP_UTPTokensInserted8_UTP_REG_END 0x00b06044 ++#define BCHP_UTPTokensInserted9_UTP_REG_START 0x00b06048 ++#define BCHP_UTPTokensInserted9_UTP_REG_END 0x00b0604c ++#define BCHP_UTPTokensInserted10_UTP_REG_START 0x00b06050 ++#define BCHP_UTPTokensInserted10_UTP_REG_END 0x00b06054 ++#define BCHP_UTPTokensInserted11_UTP_REG_START 0x00b06058 ++#define BCHP_UTPTokensInserted11_UTP_REG_END 0x00b0605c ++#define BCHP_UTPTokensInserted12_UTP_REG_START 0x00b06060 ++#define BCHP_UTPTokensInserted12_UTP_REG_END 0x00b06064 ++#define BCHP_UTPTokensInserted13_UTP_REG_START 0x00b06068 ++#define BCHP_UTPTokensInserted13_UTP_REG_END 0x00b0606c ++#define BCHP_UTPTokensInserted14_UTP_REG_START 0x00b06070 ++#define BCHP_UTPTokensInserted14_UTP_REG_END 0x00b06074 ++#define BCHP_UTPTokensInserted15_UTP_REG_START 0x00b06078 ++#define BCHP_UTPTokensInserted15_UTP_REG_END 0x00b0607c ++#define BCHP_UTPTokensInserted16_UTP_REG_START 0x00b06080 ++#define BCHP_UTPTokensInserted16_UTP_REG_END 0x00b06084 ++#define BCHP_UTPTokensInserted17_UTP_REG_START 0x00b06088 ++#define BCHP_UTPTokensInserted17_UTP_REG_END 0x00b0608c ++#define BCHP_UTPTokensInserted18_UTP_REG_START 0x00b06090 ++#define BCHP_UTPTokensInserted18_UTP_REG_END 0x00b06094 ++#define BCHP_UTPTokensInserted19_UTP_REG_START 0x00b06098 ++#define BCHP_UTPTokensInserted19_UTP_REG_END 0x00b0609c ++#define BCHP_UTPTokensInserted20_UTP_REG_START 0x00b060a0 ++#define BCHP_UTPTokensInserted20_UTP_REG_END 0x00b060a4 ++#define BCHP_UTPTokensInserted21_UTP_REG_START 0x00b060a8 ++#define BCHP_UTPTokensInserted21_UTP_REG_END 0x00b060ac ++#define BCHP_UTPTokensInserted22_UTP_REG_START 0x00b060b0 ++#define BCHP_UTPTokensInserted22_UTP_REG_END 0x00b060b4 ++#define BCHP_UTPTokensInserted23_UTP_REG_START 0x00b060b8 ++#define BCHP_UTPTokensInserted23_UTP_REG_END 0x00b060bc ++#define BCHP_UTPTokensInserted24_UTP_REG_START 0x00b060c0 ++#define BCHP_UTPTokensInserted24_UTP_REG_END 0x00b060c4 ++#define BCHP_UTPTokensInserted25_UTP_REG_START 0x00b060c8 ++#define BCHP_UTPTokensInserted25_UTP_REG_END 0x00b060cc ++#define BCHP_UTPTokensInserted26_UTP_REG_START 0x00b060d0 ++#define BCHP_UTPTokensInserted26_UTP_REG_END 0x00b060d4 ++#define BCHP_UTPTokensInserted27_UTP_REG_START 0x00b060d8 ++#define BCHP_UTPTokensInserted27_UTP_REG_END 0x00b060dc ++#define BCHP_UTPTokensInserted28_UTP_REG_START 0x00b060e0 ++#define BCHP_UTPTokensInserted28_UTP_REG_END 0x00b060e4 ++#define BCHP_UTPTokensInserted29_UTP_REG_START 0x00b060e8 ++#define BCHP_UTPTokensInserted29_UTP_REG_END 0x00b060ec ++#define BCHP_UTPTokensInserted30_UTP_REG_START 0x00b060f0 ++#define BCHP_UTPTokensInserted30_UTP_REG_END 0x00b060f4 ++#define BCHP_UTPTokensInserted31_UTP_REG_START 0x00b060f8 ++#define BCHP_UTPTokensInserted31_UTP_REG_END 0x00b060fc ++#define BCHP_UTPTokensDeleted_UTP_REG_START 0x00b06100 ++#define BCHP_UTPTokensDeleted_UTP_REG_END 0x00b0617c ++#define BCHP_UTPTokensReplaced_UTP_REG_START 0x00b06180 ++#define BCHP_UTPTokensReplaced_UTP_REG_END 0x00b061fc ++#define BCHP_IncMsgFifoCntr_UTP_REG_START 0x00b06200 ++#define BCHP_IncMsgFifoCntr_UTP_REG_END 0x00b0627c ++#define BCHP_UTPAutoDelete_UTP_REG_START 0x00b06400 ++#define BCHP_UTPAutoDelete_UTP_REG_END 0x00b06418 ++#define BCHP_UTPInMsgEngine_UTP_REG_START 0x00b06500 ++#define BCHP_UTPInMsgEngine_UTP_REG_END 0x00b06594 ++#define BCHP_UTPDQMMsgEngine_UTP_REG_START 0x00b06600 ++#define BCHP_UTPDQMMsgEngine_UTP_REG_END 0x00b06698 ++#define BCHP_UTPMIBCounters_UTP_REG_START 0x00b06700 ++#define BCHP_UTPMIBCounters_UTP_REG_END 0x00b06cbc ++#define BCHP_UTPAQMEngine_UTP_REG_START 0x00b07000 ++#define BCHP_UTPAQMEngine_UTP_REG_END 0x00b07218 ++#define BCHP_TokenMem_UTP_REG_START 0x00b10000 ++#define BCHP_TokenMem_UTP_REG_END 0x00b1fffc ++#define BCHP_LEGACY_MAC_USM20_REG_START 0x00e00000 ++#define BCHP_LEGACY_MAC_USM20_REG_END 0x00e00a00 ++#define BCHP_TC_0_REG_START 0x00e08000 ++#define BCHP_TC_0_REG_END 0x00e080bc ++#define BCHP_TC_BANK0_0_REG_START 0x00e08100 ++#define BCHP_TC_BANK0_0_REG_END 0x00e0811c ++#define BCHP_TC_BANK1_0_REG_START 0x00e08120 ++#define BCHP_TC_BANK1_0_REG_END 0x00e0813c ++#define BCHP_TC_BANK2_0_REG_START 0x00e08140 ++#define BCHP_TC_BANK2_0_REG_END 0x00e0815c ++#define BCHP_TC_BANK3_0_REG_START 0x00e08160 ++#define BCHP_TC_BANK3_0_REG_END 0x00e0817c ++#define BCHP_TC_BANK4_0_REG_START 0x00e08180 ++#define BCHP_TC_BANK4_0_REG_END 0x00e0819c ++#define BCHP_TC_BANK5_0_REG_START 0x00e081a0 ++#define BCHP_TC_BANK5_0_REG_END 0x00e081bc ++#define BCHP_TC_BANK6_0_REG_START 0x00e081c0 ++#define BCHP_TC_BANK6_0_REG_END 0x00e081dc ++#define BCHP_TC_BANK7_0_REG_START 0x00e081e0 ++#define BCHP_TC_BANK7_0_REG_END 0x00e081fc ++#define BCHP_TC_BANK8_0_REG_START 0x00e08200 ++#define BCHP_TC_BANK8_0_REG_END 0x00e0821c ++#define BCHP_TC_AUX_0_REG_START 0x00e08300 ++#define BCHP_TC_AUX_0_REG_END 0x00e08394 ++#define BCHP_TC_PRMBL_0_REG_START 0x00e08400 ++#define BCHP_TC_PRMBL_0_REG_END 0x00e084bc ++#define BCHP_TC_AUX_EXT_0_REG_START 0x00e084f0 ++#define BCHP_TC_AUX_EXT_0_REG_END 0x00e084f4 ++#define BCHP_TC_1_REG_START 0x00e09000 ++#define BCHP_TC_1_REG_END 0x00e090bc ++#define BCHP_TC_BANK0_1_REG_START 0x00e09100 ++#define BCHP_TC_BANK0_1_REG_END 0x00e0911c ++#define BCHP_TC_BANK1_1_REG_START 0x00e09120 ++#define BCHP_TC_BANK1_1_REG_END 0x00e0913c ++#define BCHP_TC_BANK2_1_REG_START 0x00e09140 ++#define BCHP_TC_BANK2_1_REG_END 0x00e0915c ++#define BCHP_TC_BANK3_1_REG_START 0x00e09160 ++#define BCHP_TC_BANK3_1_REG_END 0x00e0917c ++#define BCHP_TC_BANK4_1_REG_START 0x00e09180 ++#define BCHP_TC_BANK4_1_REG_END 0x00e0919c ++#define BCHP_TC_BANK5_1_REG_START 0x00e091a0 ++#define BCHP_TC_BANK5_1_REG_END 0x00e091bc ++#define BCHP_TC_BANK6_1_REG_START 0x00e091c0 ++#define BCHP_TC_BANK6_1_REG_END 0x00e091dc ++#define BCHP_TC_BANK7_1_REG_START 0x00e091e0 ++#define BCHP_TC_BANK7_1_REG_END 0x00e091fc ++#define BCHP_TC_BANK8_1_REG_START 0x00e09200 ++#define BCHP_TC_BANK8_1_REG_END 0x00e0921c ++#define BCHP_TC_AUX_1_REG_START 0x00e09300 ++#define BCHP_TC_AUX_1_REG_END 0x00e09394 ++#define BCHP_TC_PRMBL_1_REG_START 0x00e09400 ++#define BCHP_TC_PRMBL_1_REG_END 0x00e094bc ++#define BCHP_TC_AUX_EXT_1_REG_START 0x00e094f0 ++#define BCHP_TC_AUX_EXT_1_REG_END 0x00e094f4 ++#define BCHP_TC_2_REG_START 0x00e0a000 ++#define BCHP_TC_2_REG_END 0x00e0a0bc ++#define BCHP_TC_BANK0_2_REG_START 0x00e0a100 ++#define BCHP_TC_BANK0_2_REG_END 0x00e0a11c ++#define BCHP_TC_BANK1_2_REG_START 0x00e0a120 ++#define BCHP_TC_BANK1_2_REG_END 0x00e0a13c ++#define BCHP_TC_BANK2_2_REG_START 0x00e0a140 ++#define BCHP_TC_BANK2_2_REG_END 0x00e0a15c ++#define BCHP_TC_BANK3_2_REG_START 0x00e0a160 ++#define BCHP_TC_BANK3_2_REG_END 0x00e0a17c ++#define BCHP_TC_BANK4_2_REG_START 0x00e0a180 ++#define BCHP_TC_BANK4_2_REG_END 0x00e0a19c ++#define BCHP_TC_BANK5_2_REG_START 0x00e0a1a0 ++#define BCHP_TC_BANK5_2_REG_END 0x00e0a1bc ++#define BCHP_TC_BANK6_2_REG_START 0x00e0a1c0 ++#define BCHP_TC_BANK6_2_REG_END 0x00e0a1dc ++#define BCHP_TC_BANK7_2_REG_START 0x00e0a1e0 ++#define BCHP_TC_BANK7_2_REG_END 0x00e0a1fc ++#define BCHP_TC_BANK8_2_REG_START 0x00e0a200 ++#define BCHP_TC_BANK8_2_REG_END 0x00e0a21c ++#define BCHP_TC_AUX_2_REG_START 0x00e0a300 ++#define BCHP_TC_AUX_2_REG_END 0x00e0a394 ++#define BCHP_TC_PRMBL_2_REG_START 0x00e0a400 ++#define BCHP_TC_PRMBL_2_REG_END 0x00e0a4bc ++#define BCHP_TC_AUX_EXT_2_REG_START 0x00e0a4f0 ++#define BCHP_TC_AUX_EXT_2_REG_END 0x00e0a4f4 ++#define BCHP_TC_3_REG_START 0x00e0b000 ++#define BCHP_TC_3_REG_END 0x00e0b0bc ++#define BCHP_TC_BANK0_3_REG_START 0x00e0b100 ++#define BCHP_TC_BANK0_3_REG_END 0x00e0b11c ++#define BCHP_TC_BANK1_3_REG_START 0x00e0b120 ++#define BCHP_TC_BANK1_3_REG_END 0x00e0b13c ++#define BCHP_TC_BANK2_3_REG_START 0x00e0b140 ++#define BCHP_TC_BANK2_3_REG_END 0x00e0b15c ++#define BCHP_TC_BANK3_3_REG_START 0x00e0b160 ++#define BCHP_TC_BANK3_3_REG_END 0x00e0b17c ++#define BCHP_TC_BANK4_3_REG_START 0x00e0b180 ++#define BCHP_TC_BANK4_3_REG_END 0x00e0b19c ++#define BCHP_TC_BANK5_3_REG_START 0x00e0b1a0 ++#define BCHP_TC_BANK5_3_REG_END 0x00e0b1bc ++#define BCHP_TC_BANK6_3_REG_START 0x00e0b1c0 ++#define BCHP_TC_BANK6_3_REG_END 0x00e0b1dc ++#define BCHP_TC_BANK7_3_REG_START 0x00e0b1e0 ++#define BCHP_TC_BANK7_3_REG_END 0x00e0b1fc ++#define BCHP_TC_BANK8_3_REG_START 0x00e0b200 ++#define BCHP_TC_BANK8_3_REG_END 0x00e0b21c ++#define BCHP_TC_AUX_3_REG_START 0x00e0b300 ++#define BCHP_TC_AUX_3_REG_END 0x00e0b394 ++#define BCHP_TC_PRMBL_3_REG_START 0x00e0b400 ++#define BCHP_TC_PRMBL_3_REG_END 0x00e0b4bc ++#define BCHP_TC_AUX_EXT_3_REG_START 0x00e0b4f0 ++#define BCHP_TC_AUX_EXT_3_REG_END 0x00e0b4f4 ++#define BCHP_TC_4_REG_START 0x00e0c000 ++#define BCHP_TC_4_REG_END 0x00e0c0bc ++#define BCHP_TC_BANK0_4_REG_START 0x00e0c100 ++#define BCHP_TC_BANK0_4_REG_END 0x00e0c11c ++#define BCHP_TC_BANK1_4_REG_START 0x00e0c120 ++#define BCHP_TC_BANK1_4_REG_END 0x00e0c13c ++#define BCHP_TC_BANK2_4_REG_START 0x00e0c140 ++#define BCHP_TC_BANK2_4_REG_END 0x00e0c15c ++#define BCHP_TC_BANK3_4_REG_START 0x00e0c160 ++#define BCHP_TC_BANK3_4_REG_END 0x00e0c17c ++#define BCHP_TC_BANK4_4_REG_START 0x00e0c180 ++#define BCHP_TC_BANK4_4_REG_END 0x00e0c19c ++#define BCHP_TC_BANK5_4_REG_START 0x00e0c1a0 ++#define BCHP_TC_BANK5_4_REG_END 0x00e0c1bc ++#define BCHP_TC_BANK6_4_REG_START 0x00e0c1c0 ++#define BCHP_TC_BANK6_4_REG_END 0x00e0c1dc ++#define BCHP_TC_BANK7_4_REG_START 0x00e0c1e0 ++#define BCHP_TC_BANK7_4_REG_END 0x00e0c1fc ++#define BCHP_TC_BANK8_4_REG_START 0x00e0c200 ++#define BCHP_TC_BANK8_4_REG_END 0x00e0c21c ++#define BCHP_TC_AUX_4_REG_START 0x00e0c300 ++#define BCHP_TC_AUX_4_REG_END 0x00e0c394 ++#define BCHP_TC_PRMBL_4_REG_START 0x00e0c400 ++#define BCHP_TC_PRMBL_4_REG_END 0x00e0c4bc ++#define BCHP_TC_AUX_EXT_4_REG_START 0x00e0c4f0 ++#define BCHP_TC_AUX_EXT_4_REG_END 0x00e0c4f4 ++#define BCHP_TC_5_REG_START 0x00e0d000 ++#define BCHP_TC_5_REG_END 0x00e0d0bc ++#define BCHP_TC_BANK0_5_REG_START 0x00e0d100 ++#define BCHP_TC_BANK0_5_REG_END 0x00e0d11c ++#define BCHP_TC_BANK1_5_REG_START 0x00e0d120 ++#define BCHP_TC_BANK1_5_REG_END 0x00e0d13c ++#define BCHP_TC_BANK2_5_REG_START 0x00e0d140 ++#define BCHP_TC_BANK2_5_REG_END 0x00e0d15c ++#define BCHP_TC_BANK3_5_REG_START 0x00e0d160 ++#define BCHP_TC_BANK3_5_REG_END 0x00e0d17c ++#define BCHP_TC_BANK4_5_REG_START 0x00e0d180 ++#define BCHP_TC_BANK4_5_REG_END 0x00e0d19c ++#define BCHP_TC_BANK5_5_REG_START 0x00e0d1a0 ++#define BCHP_TC_BANK5_5_REG_END 0x00e0d1bc ++#define BCHP_TC_BANK6_5_REG_START 0x00e0d1c0 ++#define BCHP_TC_BANK6_5_REG_END 0x00e0d1dc ++#define BCHP_TC_BANK7_5_REG_START 0x00e0d1e0 ++#define BCHP_TC_BANK7_5_REG_END 0x00e0d1fc ++#define BCHP_TC_BANK8_5_REG_START 0x00e0d200 ++#define BCHP_TC_BANK8_5_REG_END 0x00e0d21c ++#define BCHP_TC_AUX_5_REG_START 0x00e0d300 ++#define BCHP_TC_AUX_5_REG_END 0x00e0d394 ++#define BCHP_TC_PRMBL_5_REG_START 0x00e0d400 ++#define BCHP_TC_PRMBL_5_REG_END 0x00e0d4bc ++#define BCHP_TC_AUX_EXT_5_REG_START 0x00e0d4f0 ++#define BCHP_TC_AUX_EXT_5_REG_END 0x00e0d4f4 ++#define BCHP_TC_6_REG_START 0x00e0e000 ++#define BCHP_TC_6_REG_END 0x00e0e0bc ++#define BCHP_TC_BANK0_6_REG_START 0x00e0e100 ++#define BCHP_TC_BANK0_6_REG_END 0x00e0e11c ++#define BCHP_TC_BANK1_6_REG_START 0x00e0e120 ++#define BCHP_TC_BANK1_6_REG_END 0x00e0e13c ++#define BCHP_TC_BANK2_6_REG_START 0x00e0e140 ++#define BCHP_TC_BANK2_6_REG_END 0x00e0e15c ++#define BCHP_TC_BANK3_6_REG_START 0x00e0e160 ++#define BCHP_TC_BANK3_6_REG_END 0x00e0e17c ++#define BCHP_TC_BANK4_6_REG_START 0x00e0e180 ++#define BCHP_TC_BANK4_6_REG_END 0x00e0e19c ++#define BCHP_TC_BANK5_6_REG_START 0x00e0e1a0 ++#define BCHP_TC_BANK5_6_REG_END 0x00e0e1bc ++#define BCHP_TC_BANK6_6_REG_START 0x00e0e1c0 ++#define BCHP_TC_BANK6_6_REG_END 0x00e0e1dc ++#define BCHP_TC_BANK7_6_REG_START 0x00e0e1e0 ++#define BCHP_TC_BANK7_6_REG_END 0x00e0e1fc ++#define BCHP_TC_BANK8_6_REG_START 0x00e0e200 ++#define BCHP_TC_BANK8_6_REG_END 0x00e0e21c ++#define BCHP_TC_AUX_6_REG_START 0x00e0e300 ++#define BCHP_TC_AUX_6_REG_END 0x00e0e394 ++#define BCHP_TC_PRMBL_6_REG_START 0x00e0e400 ++#define BCHP_TC_PRMBL_6_REG_END 0x00e0e4bc ++#define BCHP_TC_AUX_EXT_6_REG_START 0x00e0e4f0 ++#define BCHP_TC_AUX_EXT_6_REG_END 0x00e0e4f4 ++#define BCHP_TC_7_REG_START 0x00e0f000 ++#define BCHP_TC_7_REG_END 0x00e0f0bc ++#define BCHP_TC_BANK0_7_REG_START 0x00e0f100 ++#define BCHP_TC_BANK0_7_REG_END 0x00e0f11c ++#define BCHP_TC_BANK1_7_REG_START 0x00e0f120 ++#define BCHP_TC_BANK1_7_REG_END 0x00e0f13c ++#define BCHP_TC_BANK2_7_REG_START 0x00e0f140 ++#define BCHP_TC_BANK2_7_REG_END 0x00e0f15c ++#define BCHP_TC_BANK3_7_REG_START 0x00e0f160 ++#define BCHP_TC_BANK3_7_REG_END 0x00e0f17c ++#define BCHP_TC_BANK4_7_REG_START 0x00e0f180 ++#define BCHP_TC_BANK4_7_REG_END 0x00e0f19c ++#define BCHP_TC_BANK5_7_REG_START 0x00e0f1a0 ++#define BCHP_TC_BANK5_7_REG_END 0x00e0f1bc ++#define BCHP_TC_BANK6_7_REG_START 0x00e0f1c0 ++#define BCHP_TC_BANK6_7_REG_END 0x00e0f1dc ++#define BCHP_TC_BANK7_7_REG_START 0x00e0f1e0 ++#define BCHP_TC_BANK7_7_REG_END 0x00e0f1fc ++#define BCHP_TC_BANK8_7_REG_START 0x00e0f200 ++#define BCHP_TC_BANK8_7_REG_END 0x00e0f21c ++#define BCHP_TC_AUX_7_REG_START 0x00e0f300 ++#define BCHP_TC_AUX_7_REG_END 0x00e0f394 ++#define BCHP_TC_PRMBL_7_REG_START 0x00e0f400 ++#define BCHP_TC_PRMBL_7_REG_END 0x00e0f4bc ++#define BCHP_TC_AUX_EXT_7_REG_START 0x00e0f4f0 ++#define BCHP_TC_AUX_EXT_7_REG_END 0x00e0f4f4 ++#define BCHP_US_TOP_REG_START 0x00e10000 ++#define BCHP_US_TOP_REG_END 0x00e107fc ++#define BCHP_US_MBSC_REG_START 0x00e10c00 ++#define BCHP_US_MBSC_REG_END 0x00e10c7c ++#define BCHP_US_NOISE_REG_START 0x00e10d00 ++#define BCHP_US_NOISE_REG_END 0x00e10dfc ++#define BCHP_US_RF_CLIP_REG_START 0x00e11000 ++#define BCHP_US_RF_CLIP_REG_END 0x00e113fc ++#define BCHP_US_WDAC0_REG_START 0x00e11c00 ++#define BCHP_US_WDAC0_REG_END 0x00e11cfc ++#define BCHP_US_WDAC1_REG_START 0x00e11d00 ++#define BCHP_US_WDAC1_REG_END 0x00e11dfc ++#define BCHP_US_OFDM0_REG_START 0x00e12000 ++#define BCHP_US_OFDM0_REG_END 0x00e12204 ++#define BCHP_US_OFDM1_REG_START 0x00e12400 ++#define BCHP_US_OFDM1_REG_END 0x00e12604 ++#define BCHP_US_PDAC0_REG_START 0x00e13800 ++#define BCHP_US_PDAC0_REG_END 0x00e138fc ++#define BCHP_US_PDAC1_REG_START 0x00e13900 ++#define BCHP_US_PDAC1_REG_END 0x00e139fc ++#define BCHP_US_PDAC2_REG_START 0x00e13a00 ++#define BCHP_US_PDAC2_REG_END 0x00e13afc ++#define BCHP_US_PDAC3_REG_START 0x00e13b00 ++#define BCHP_US_PDAC3_REG_END 0x00e13bfc ++#define BCHP_US_CORE0_REG_START 0x00e14000 ++#define BCHP_US_CORE0_REG_END 0x00e143fc ++#define BCHP_US_CORE1_REG_START 0x00e14400 ++#define BCHP_US_CORE1_REG_END 0x00e147fc ++#define BCHP_US_CORE2_REG_START 0x00e14800 ++#define BCHP_US_CORE2_REG_END 0x00e14bfc ++#define BCHP_US_CORE3_REG_START 0x00e14c00 ++#define BCHP_US_CORE3_REG_END 0x00e14ffc ++#define BCHP_US_CORE4_REG_START 0x00e15000 ++#define BCHP_US_CORE4_REG_END 0x00e153fc ++#define BCHP_US_CORE5_REG_START 0x00e15400 ++#define BCHP_US_CORE5_REG_END 0x00e157fc ++#define BCHP_US_CORE6_REG_START 0x00e15800 ++#define BCHP_US_CORE6_REG_END 0x00e15bfc ++#define BCHP_US_CORE7_REG_START 0x00e15c00 ++#define BCHP_US_CORE7_REG_END 0x00e15ffc ++#define BCHP_ChannelRegs_USM30_REG_START 0x00e18000 ++#define BCHP_ChannelRegs_USM30_REG_END 0x00e183bc ++#define BCHP_ChannelQueRegs_USM30_REG_START 0x00e18600 ++#define BCHP_ChannelQueRegs_USM30_REG_END 0x00e1902b ++#define BCHP_QueueRegs_USM30_REG_START 0x00e19100 ++#define BCHP_QueueRegs_USM30_REG_END 0x00e194fc ++#define BCHP_SIDRegs_USM30_REG_START 0x00e1a000 ++#define BCHP_SIDRegs_USM30_REG_END 0x00e1a7f2 ++#define BCHP_GroupSIDRegs_USM30_REG_START 0x00e1a800 ++#define BCHP_GroupSIDRegs_USM30_REG_END 0x00e1a81e ++#define BCHP_CalcPhyRegs_USM30_REG_START 0x00e1a900 ++#define BCHP_CalcPhyRegs_USM30_REG_END 0x00e1a934 ++#define BCHP_SimControlRegs_USM30_REG_START 0x00e1aa00 ++#define BCHP_SimControlRegs_USM30_REG_END 0x00e1aa84 ++#define BCHP_InterruptRegs_USM30_REG_START 0x00e1ab00 ++#define BCHP_InterruptRegs_USM30_REG_END 0x00e1ab99 ++#define BCHP_MiscRegs_USM30_REG_START 0x00e1ac00 ++#define BCHP_MiscRegs_USM30_REG_END 0x00e1accc ++#define BCHP_QueueRegs_ReadOnly_USM30_REG_START 0x00e1b000 ++#define BCHP_QueueRegs_ReadOnly_USM30_REG_END 0x00e1b3f0 ++#define BCHP_MIBCountersRegs_USM30_REG_START 0x00e1b800 ++#define BCHP_MIBCountersRegs_USM30_REG_END 0x00e1bffc ++#define BCHP_FlowDiagMIBCountersRegs_USM30_REG_START 0x00e1c300 ++#define BCHP_FlowDiagMIBCountersRegs_USM30_REG_END 0x00e1c4fc ++#define BCHP_DiagConfigRegs_USM30_REG_START 0x00e1c500 ++#define BCHP_DiagConfigRegs_USM30_REG_END 0x00e1c54c ++#define BCHP_DiagMsgRegs_USM30_REG_START 0x00e1c600 ++#define BCHP_DiagMsgRegs_USM30_REG_END 0x00e1c710 ++#define BCHP_BaseReserved_DTP_REG_START 0x01000000 ++#define BCHP_BaseReserved_DTP_REG_END 0x01000000 ++#define BCHP_Control_DTP_REG_START 0x01001000 ++#define BCHP_Control_DTP_REG_END 0x010010fc ++#define BCHP_OutgoingMessageFIFO_DTP_REG_START 0x01001100 ++#define BCHP_OutgoingMessageFIFO_DTP_REG_END 0x0100117c ++#define BCHP_IncomingMessageFIFO_DTP_REG_START 0x01001200 ++#define BCHP_IncomingMessageFIFO_DTP_REG_END 0x0100127c ++#define BCHP_DMA0_DTP_REG_START 0x01001300 ++#define BCHP_DMA0_DTP_REG_END 0x0100131c ++#define BCHP_DMA1_DTP_REG_START 0x01001320 ++#define BCHP_DMA1_DTP_REG_END 0x0100133c ++#define BCHP_DMAHI0_DTP_REG_START 0x01001340 ++#define BCHP_DMAHI0_DTP_REG_END 0x0100134c ++#define BCHP_DMAHI1_DTP_REG_START 0x01001350 ++#define BCHP_DMAHI1_DTP_REG_END 0x0100135c ++#define BCHP_Token_DTP_REG_START 0x01001400 ++#define BCHP_Token_DTP_REG_END 0x01001420 ++#define BCHP_PerfPower_DTP_REG_START 0x01001600 ++#define BCHP_PerfPower_DTP_REG_END 0x01001640 ++#define BCHP_MessageID_DTP_REG_START 0x01001700 ++#define BCHP_MessageID_DTP_REG_END 0x0100177c ++#define BCHP_HWCounters_DTP_REG_START 0x01001900 ++#define BCHP_HWCounters_DTP_REG_END 0x01001944 ++#define BCHP_DQM_0_31_DTP_REG_START 0x01001c00 ++#define BCHP_DQM_0_31_DTP_REG_END 0x01001c48 ++#define BCHP_DQM_32_63_DTP_REG_START 0x01001d00 ++#define BCHP_DQM_32_63_DTP_REG_END 0x01001d48 ++#define BCHP_QUEUE_TIMER_DTP_REG_START 0x01002000 ++#define BCHP_QUEUE_TIMER_DTP_REG_END 0x010021fc ++#define BCHP_QUEUE_STATUS_0_31_DTP_REG_START 0x01002800 ++#define BCHP_QUEUE_STATUS_0_31_DTP_REG_END 0x0100287c ++#define BCHP_QUEUE_STATUS_32_63_DTP_REG_START 0x01002900 ++#define BCHP_QUEUE_STATUS_32_63_DTP_REG_END 0x0100297c ++#define BCHP_QUEUE_MIB_0_31_DTP_REG_START 0x01003000 ++#define BCHP_QUEUE_MIB_0_31_DTP_REG_END 0x0100317c ++#define BCHP_QUEUE_MIB_32_63_DTP_REG_START 0x01003200 ++#define BCHP_QUEUE_MIB_32_63_DTP_REG_END 0x0100337c ++#define BCHP_QUEUE_0_CNTRL_DTP_REG_START 0x01004000 ++#define BCHP_QUEUE_0_CNTRL_DTP_REG_END 0x0100400c ++#define BCHP_QUEUE_1_CNTRL_DTP_REG_START 0x01004010 ++#define BCHP_QUEUE_1_CNTRL_DTP_REG_END 0x0100401c ++#define BCHP_QUEUE_2_CNTRL_DTP_REG_START 0x01004020 ++#define BCHP_QUEUE_2_CNTRL_DTP_REG_END 0x0100402c ++#define BCHP_QUEUE_3_CNTRL_DTP_REG_START 0x01004030 ++#define BCHP_QUEUE_3_CNTRL_DTP_REG_END 0x0100403c ++#define BCHP_QUEUE_4_CNTRL_DTP_REG_START 0x01004040 ++#define BCHP_QUEUE_4_CNTRL_DTP_REG_END 0x0100404c ++#define BCHP_QUEUE_5_CNTRL_DTP_REG_START 0x01004050 ++#define BCHP_QUEUE_5_CNTRL_DTP_REG_END 0x0100405c ++#define BCHP_QUEUE_6_CNTRL_DTP_REG_START 0x01004060 ++#define BCHP_QUEUE_6_CNTRL_DTP_REG_END 0x0100406c ++#define BCHP_QUEUE_7_CNTRL_DTP_REG_START 0x01004070 ++#define BCHP_QUEUE_7_CNTRL_DTP_REG_END 0x0100407c ++#define BCHP_QUEUE_8_CNTRL_DTP_REG_START 0x01004080 ++#define BCHP_QUEUE_8_CNTRL_DTP_REG_END 0x0100408c ++#define BCHP_QUEUE_9_CNTRL_DTP_REG_START 0x01004090 ++#define BCHP_QUEUE_9_CNTRL_DTP_REG_END 0x0100409c ++#define BCHP_QUEUE_10_CNTRL_DTP_REG_START 0x010040a0 ++#define BCHP_QUEUE_10_CNTRL_DTP_REG_END 0x010040ac ++#define BCHP_QUEUE_11_CNTRL_DTP_REG_START 0x010040b0 ++#define BCHP_QUEUE_11_CNTRL_DTP_REG_END 0x010040bc ++#define BCHP_QUEUE_12_CNTRL_DTP_REG_START 0x010040c0 ++#define BCHP_QUEUE_12_CNTRL_DTP_REG_END 0x010040cc ++#define BCHP_QUEUE_13_CNTRL_DTP_REG_START 0x010040d0 ++#define BCHP_QUEUE_13_CNTRL_DTP_REG_END 0x010040dc ++#define BCHP_QUEUE_14_CNTRL_DTP_REG_START 0x010040e0 ++#define BCHP_QUEUE_14_CNTRL_DTP_REG_END 0x010040ec ++#define BCHP_QUEUE_15_CNTRL_DTP_REG_START 0x010040f0 ++#define BCHP_QUEUE_15_CNTRL_DTP_REG_END 0x010040fc ++#define BCHP_QUEUE_16_CNTRL_DTP_REG_START 0x01004100 ++#define BCHP_QUEUE_16_CNTRL_DTP_REG_END 0x0100410c ++#define BCHP_QUEUE_17_CNTRL_DTP_REG_START 0x01004110 ++#define BCHP_QUEUE_17_CNTRL_DTP_REG_END 0x0100411c ++#define BCHP_QUEUE_18_CNTRL_DTP_REG_START 0x01004120 ++#define BCHP_QUEUE_18_CNTRL_DTP_REG_END 0x0100412c ++#define BCHP_QUEUE_19_CNTRL_DTP_REG_START 0x01004130 ++#define BCHP_QUEUE_19_CNTRL_DTP_REG_END 0x0100413c ++#define BCHP_QUEUE_20_CNTRL_DTP_REG_START 0x01004140 ++#define BCHP_QUEUE_20_CNTRL_DTP_REG_END 0x0100414c ++#define BCHP_QUEUE_21_CNTRL_DTP_REG_START 0x01004150 ++#define BCHP_QUEUE_21_CNTRL_DTP_REG_END 0x0100415c ++#define BCHP_QUEUE_22_CNTRL_DTP_REG_START 0x01004160 ++#define BCHP_QUEUE_22_CNTRL_DTP_REG_END 0x0100416c ++#define BCHP_QUEUE_23_CNTRL_DTP_REG_START 0x01004170 ++#define BCHP_QUEUE_23_CNTRL_DTP_REG_END 0x0100417c ++#define BCHP_QUEUE_24_CNTRL_DTP_REG_START 0x01004180 ++#define BCHP_QUEUE_24_CNTRL_DTP_REG_END 0x0100418c ++#define BCHP_QUEUE_25_CNTRL_DTP_REG_START 0x01004190 ++#define BCHP_QUEUE_25_CNTRL_DTP_REG_END 0x0100419c ++#define BCHP_QUEUE_26_CNTRL_DTP_REG_START 0x010041a0 ++#define BCHP_QUEUE_26_CNTRL_DTP_REG_END 0x010041ac ++#define BCHP_QUEUE_27_CNTRL_DTP_REG_START 0x010041b0 ++#define BCHP_QUEUE_27_CNTRL_DTP_REG_END 0x010041bc ++#define BCHP_QUEUE_28_CNTRL_DTP_REG_START 0x010041c0 ++#define BCHP_QUEUE_28_CNTRL_DTP_REG_END 0x010041cc ++#define BCHP_QUEUE_29_CNTRL_DTP_REG_START 0x010041d0 ++#define BCHP_QUEUE_29_CNTRL_DTP_REG_END 0x010041dc ++#define BCHP_QUEUE_30_CNTRL_DTP_REG_START 0x010041e0 ++#define BCHP_QUEUE_30_CNTRL_DTP_REG_END 0x010041ec ++#define BCHP_QUEUE_31_CNTRL_DTP_REG_START 0x010041f0 ++#define BCHP_QUEUE_31_CNTRL_DTP_REG_END 0x010041fc ++#define BCHP_QUEUE_32_CNTRL_DTP_REG_START 0x01004200 ++#define BCHP_QUEUE_32_CNTRL_DTP_REG_END 0x0100420c ++#define BCHP_QUEUE_33_CNTRL_DTP_REG_START 0x01004210 ++#define BCHP_QUEUE_33_CNTRL_DTP_REG_END 0x0100421c ++#define BCHP_QUEUE_34_CNTRL_DTP_REG_START 0x01004220 ++#define BCHP_QUEUE_34_CNTRL_DTP_REG_END 0x0100422c ++#define BCHP_QUEUE_35_CNTRL_DTP_REG_START 0x01004230 ++#define BCHP_QUEUE_35_CNTRL_DTP_REG_END 0x0100423c ++#define BCHP_QUEUE_36_CNTRL_DTP_REG_START 0x01004240 ++#define BCHP_QUEUE_36_CNTRL_DTP_REG_END 0x0100424c ++#define BCHP_QUEUE_37_CNTRL_DTP_REG_START 0x01004250 ++#define BCHP_QUEUE_37_CNTRL_DTP_REG_END 0x0100425c ++#define BCHP_QUEUE_38_CNTRL_DTP_REG_START 0x01004260 ++#define BCHP_QUEUE_38_CNTRL_DTP_REG_END 0x0100426c ++#define BCHP_QUEUE_39_CNTRL_DTP_REG_START 0x01004270 ++#define BCHP_QUEUE_39_CNTRL_DTP_REG_END 0x0100427c ++#define BCHP_QUEUE_40_CNTRL_DTP_REG_START 0x01004280 ++#define BCHP_QUEUE_40_CNTRL_DTP_REG_END 0x0100428c ++#define BCHP_QUEUE_41_CNTRL_DTP_REG_START 0x01004290 ++#define BCHP_QUEUE_41_CNTRL_DTP_REG_END 0x0100429c ++#define BCHP_QUEUE_42_CNTRL_DTP_REG_START 0x010042a0 ++#define BCHP_QUEUE_42_CNTRL_DTP_REG_END 0x010042ac ++#define BCHP_QUEUE_43_CNTRL_DTP_REG_START 0x010042b0 ++#define BCHP_QUEUE_43_CNTRL_DTP_REG_END 0x010042bc ++#define BCHP_QUEUE_44_CNTRL_DTP_REG_START 0x010042c0 ++#define BCHP_QUEUE_44_CNTRL_DTP_REG_END 0x010042cc ++#define BCHP_QUEUE_45_CNTRL_DTP_REG_START 0x010042d0 ++#define BCHP_QUEUE_45_CNTRL_DTP_REG_END 0x010042dc ++#define BCHP_QUEUE_46_CNTRL_DTP_REG_START 0x010042e0 ++#define BCHP_QUEUE_46_CNTRL_DTP_REG_END 0x010042ec ++#define BCHP_QUEUE_47_CNTRL_DTP_REG_START 0x010042f0 ++#define BCHP_QUEUE_47_CNTRL_DTP_REG_END 0x010042fc ++#define BCHP_QUEUE_48_CNTRL_DTP_REG_START 0x01004300 ++#define BCHP_QUEUE_48_CNTRL_DTP_REG_END 0x0100430c ++#define BCHP_QUEUE_49_CNTRL_DTP_REG_START 0x01004310 ++#define BCHP_QUEUE_49_CNTRL_DTP_REG_END 0x0100431c ++#define BCHP_QUEUE_50_CNTRL_DTP_REG_START 0x01004320 ++#define BCHP_QUEUE_50_CNTRL_DTP_REG_END 0x0100432c ++#define BCHP_QUEUE_51_CNTRL_DTP_REG_START 0x01004330 ++#define BCHP_QUEUE_51_CNTRL_DTP_REG_END 0x0100433c ++#define BCHP_QUEUE_52_CNTRL_DTP_REG_START 0x01004340 ++#define BCHP_QUEUE_52_CNTRL_DTP_REG_END 0x0100434c ++#define BCHP_QUEUE_53_CNTRL_DTP_REG_START 0x01004350 ++#define BCHP_QUEUE_53_CNTRL_DTP_REG_END 0x0100435c ++#define BCHP_QUEUE_54_CNTRL_DTP_REG_START 0x01004360 ++#define BCHP_QUEUE_54_CNTRL_DTP_REG_END 0x0100436c ++#define BCHP_QUEUE_55_CNTRL_DTP_REG_START 0x01004370 ++#define BCHP_QUEUE_55_CNTRL_DTP_REG_END 0x0100437c ++#define BCHP_QUEUE_56_CNTRL_DTP_REG_START 0x01004380 ++#define BCHP_QUEUE_56_CNTRL_DTP_REG_END 0x0100438c ++#define BCHP_QUEUE_57_CNTRL_DTP_REG_START 0x01004390 ++#define BCHP_QUEUE_57_CNTRL_DTP_REG_END 0x0100439c ++#define BCHP_QUEUE_58_CNTRL_DTP_REG_START 0x010043a0 ++#define BCHP_QUEUE_58_CNTRL_DTP_REG_END 0x010043ac ++#define BCHP_QUEUE_59_CNTRL_DTP_REG_START 0x010043b0 ++#define BCHP_QUEUE_59_CNTRL_DTP_REG_END 0x010043bc ++#define BCHP_QUEUE_60_CNTRL_DTP_REG_START 0x010043c0 ++#define BCHP_QUEUE_60_CNTRL_DTP_REG_END 0x010043cc ++#define BCHP_QUEUE_61_CNTRL_DTP_REG_START 0x010043d0 ++#define BCHP_QUEUE_61_CNTRL_DTP_REG_END 0x010043dc ++#define BCHP_QUEUE_62_CNTRL_DTP_REG_START 0x010043e0 ++#define BCHP_QUEUE_62_CNTRL_DTP_REG_END 0x010043ec ++#define BCHP_QUEUE_63_CNTRL_DTP_REG_START 0x010043f0 ++#define BCHP_QUEUE_63_CNTRL_DTP_REG_END 0x010043fc ++#define BCHP_QUEUE_0_DATA_DTP_REG_START 0x01005000 ++#define BCHP_QUEUE_0_DATA_DTP_REG_END 0x0100500c ++#define BCHP_QUEUE_1_DATA_DTP_REG_START 0x01005010 ++#define BCHP_QUEUE_1_DATA_DTP_REG_END 0x0100501c ++#define BCHP_QUEUE_2_DATA_DTP_REG_START 0x01005020 ++#define BCHP_QUEUE_2_DATA_DTP_REG_END 0x0100502c ++#define BCHP_QUEUE_3_DATA_DTP_REG_START 0x01005030 ++#define BCHP_QUEUE_3_DATA_DTP_REG_END 0x0100503c ++#define BCHP_QUEUE_4_DATA_DTP_REG_START 0x01005040 ++#define BCHP_QUEUE_4_DATA_DTP_REG_END 0x0100504c ++#define BCHP_QUEUE_5_DATA_DTP_REG_START 0x01005050 ++#define BCHP_QUEUE_5_DATA_DTP_REG_END 0x0100505c ++#define BCHP_QUEUE_6_DATA_DTP_REG_START 0x01005060 ++#define BCHP_QUEUE_6_DATA_DTP_REG_END 0x0100506c ++#define BCHP_QUEUE_7_DATA_DTP_REG_START 0x01005070 ++#define BCHP_QUEUE_7_DATA_DTP_REG_END 0x0100507c ++#define BCHP_QUEUE_8_DATA_DTP_REG_START 0x01005080 ++#define BCHP_QUEUE_8_DATA_DTP_REG_END 0x0100508c ++#define BCHP_QUEUE_9_DATA_DTP_REG_START 0x01005090 ++#define BCHP_QUEUE_9_DATA_DTP_REG_END 0x0100509c ++#define BCHP_QUEUE_10_DATA_DTP_REG_START 0x010050a0 ++#define BCHP_QUEUE_10_DATA_DTP_REG_END 0x010050ac ++#define BCHP_QUEUE_11_DATA_DTP_REG_START 0x010050b0 ++#define BCHP_QUEUE_11_DATA_DTP_REG_END 0x010050bc ++#define BCHP_QUEUE_12_DATA_DTP_REG_START 0x010050c0 ++#define BCHP_QUEUE_12_DATA_DTP_REG_END 0x010050cc ++#define BCHP_QUEUE_13_DATA_DTP_REG_START 0x010050d0 ++#define BCHP_QUEUE_13_DATA_DTP_REG_END 0x010050dc ++#define BCHP_QUEUE_14_DATA_DTP_REG_START 0x010050e0 ++#define BCHP_QUEUE_14_DATA_DTP_REG_END 0x010050ec ++#define BCHP_QUEUE_15_DATA_DTP_REG_START 0x010050f0 ++#define BCHP_QUEUE_15_DATA_DTP_REG_END 0x010050fc ++#define BCHP_QUEUE_16_DATA_DTP_REG_START 0x01005100 ++#define BCHP_QUEUE_16_DATA_DTP_REG_END 0x0100510c ++#define BCHP_QUEUE_17_DATA_DTP_REG_START 0x01005110 ++#define BCHP_QUEUE_17_DATA_DTP_REG_END 0x0100511c ++#define BCHP_QUEUE_18_DATA_DTP_REG_START 0x01005120 ++#define BCHP_QUEUE_18_DATA_DTP_REG_END 0x0100512c ++#define BCHP_QUEUE_19_DATA_DTP_REG_START 0x01005130 ++#define BCHP_QUEUE_19_DATA_DTP_REG_END 0x0100513c ++#define BCHP_QUEUE_20_DATA_DTP_REG_START 0x01005140 ++#define BCHP_QUEUE_20_DATA_DTP_REG_END 0x0100514c ++#define BCHP_QUEUE_21_DATA_DTP_REG_START 0x01005150 ++#define BCHP_QUEUE_21_DATA_DTP_REG_END 0x0100515c ++#define BCHP_QUEUE_22_DATA_DTP_REG_START 0x01005160 ++#define BCHP_QUEUE_22_DATA_DTP_REG_END 0x0100516c ++#define BCHP_QUEUE_23_DATA_DTP_REG_START 0x01005170 ++#define BCHP_QUEUE_23_DATA_DTP_REG_END 0x0100517c ++#define BCHP_QUEUE_24_DATA_DTP_REG_START 0x01005180 ++#define BCHP_QUEUE_24_DATA_DTP_REG_END 0x0100518c ++#define BCHP_QUEUE_25_DATA_DTP_REG_START 0x01005190 ++#define BCHP_QUEUE_25_DATA_DTP_REG_END 0x0100519c ++#define BCHP_QUEUE_26_DATA_DTP_REG_START 0x010051a0 ++#define BCHP_QUEUE_26_DATA_DTP_REG_END 0x010051ac ++#define BCHP_QUEUE_27_DATA_DTP_REG_START 0x010051b0 ++#define BCHP_QUEUE_27_DATA_DTP_REG_END 0x010051bc ++#define BCHP_QUEUE_28_DATA_DTP_REG_START 0x010051c0 ++#define BCHP_QUEUE_28_DATA_DTP_REG_END 0x010051cc ++#define BCHP_QUEUE_29_DATA_DTP_REG_START 0x010051d0 ++#define BCHP_QUEUE_29_DATA_DTP_REG_END 0x010051dc ++#define BCHP_QUEUE_30_DATA_DTP_REG_START 0x010051e0 ++#define BCHP_QUEUE_30_DATA_DTP_REG_END 0x010051ec ++#define BCHP_QUEUE_31_DATA_DTP_REG_START 0x010051f0 ++#define BCHP_QUEUE_31_DATA_DTP_REG_END 0x010051fc ++#define BCHP_QUEUE_32_DATA_DTP_REG_START 0x01005200 ++#define BCHP_QUEUE_32_DATA_DTP_REG_END 0x0100520c ++#define BCHP_QUEUE_33_DATA_DTP_REG_START 0x01005210 ++#define BCHP_QUEUE_33_DATA_DTP_REG_END 0x0100521c ++#define BCHP_QUEUE_34_DATA_DTP_REG_START 0x01005220 ++#define BCHP_QUEUE_34_DATA_DTP_REG_END 0x0100522c ++#define BCHP_QUEUE_35_DATA_DTP_REG_START 0x01005230 ++#define BCHP_QUEUE_35_DATA_DTP_REG_END 0x0100523c ++#define BCHP_QUEUE_36_DATA_DTP_REG_START 0x01005240 ++#define BCHP_QUEUE_36_DATA_DTP_REG_END 0x0100524c ++#define BCHP_QUEUE_37_DATA_DTP_REG_START 0x01005250 ++#define BCHP_QUEUE_37_DATA_DTP_REG_END 0x0100525c ++#define BCHP_QUEUE_38_DATA_DTP_REG_START 0x01005260 ++#define BCHP_QUEUE_38_DATA_DTP_REG_END 0x0100526c ++#define BCHP_QUEUE_39_DATA_DTP_REG_START 0x01005270 ++#define BCHP_QUEUE_39_DATA_DTP_REG_END 0x0100527c ++#define BCHP_QUEUE_40_DATA_DTP_REG_START 0x01005280 ++#define BCHP_QUEUE_40_DATA_DTP_REG_END 0x0100528c ++#define BCHP_QUEUE_41_DATA_DTP_REG_START 0x01005290 ++#define BCHP_QUEUE_41_DATA_DTP_REG_END 0x0100529c ++#define BCHP_QUEUE_42_DATA_DTP_REG_START 0x010052a0 ++#define BCHP_QUEUE_42_DATA_DTP_REG_END 0x010052ac ++#define BCHP_QUEUE_43_DATA_DTP_REG_START 0x010052b0 ++#define BCHP_QUEUE_43_DATA_DTP_REG_END 0x010052bc ++#define BCHP_QUEUE_44_DATA_DTP_REG_START 0x010052c0 ++#define BCHP_QUEUE_44_DATA_DTP_REG_END 0x010052cc ++#define BCHP_QUEUE_45_DATA_DTP_REG_START 0x010052d0 ++#define BCHP_QUEUE_45_DATA_DTP_REG_END 0x010052dc ++#define BCHP_QUEUE_46_DATA_DTP_REG_START 0x010052e0 ++#define BCHP_QUEUE_46_DATA_DTP_REG_END 0x010052ec ++#define BCHP_QUEUE_47_DATA_DTP_REG_START 0x010052f0 ++#define BCHP_QUEUE_47_DATA_DTP_REG_END 0x010052fc ++#define BCHP_QUEUE_48_DATA_DTP_REG_START 0x01005300 ++#define BCHP_QUEUE_48_DATA_DTP_REG_END 0x0100530c ++#define BCHP_QUEUE_49_DATA_DTP_REG_START 0x01005310 ++#define BCHP_QUEUE_49_DATA_DTP_REG_END 0x0100531c ++#define BCHP_QUEUE_50_DATA_DTP_REG_START 0x01005320 ++#define BCHP_QUEUE_50_DATA_DTP_REG_END 0x0100532c ++#define BCHP_QUEUE_51_DATA_DTP_REG_START 0x01005330 ++#define BCHP_QUEUE_51_DATA_DTP_REG_END 0x0100533c ++#define BCHP_QUEUE_52_DATA_DTP_REG_START 0x01005340 ++#define BCHP_QUEUE_52_DATA_DTP_REG_END 0x0100534c ++#define BCHP_QUEUE_53_DATA_DTP_REG_START 0x01005350 ++#define BCHP_QUEUE_53_DATA_DTP_REG_END 0x0100535c ++#define BCHP_QUEUE_54_DATA_DTP_REG_START 0x01005360 ++#define BCHP_QUEUE_54_DATA_DTP_REG_END 0x0100536c ++#define BCHP_QUEUE_55_DATA_DTP_REG_START 0x01005370 ++#define BCHP_QUEUE_55_DATA_DTP_REG_END 0x0100537c ++#define BCHP_QUEUE_56_DATA_DTP_REG_START 0x01005380 ++#define BCHP_QUEUE_56_DATA_DTP_REG_END 0x0100538c ++#define BCHP_QUEUE_57_DATA_DTP_REG_START 0x01005390 ++#define BCHP_QUEUE_57_DATA_DTP_REG_END 0x0100539c ++#define BCHP_QUEUE_58_DATA_DTP_REG_START 0x010053a0 ++#define BCHP_QUEUE_58_DATA_DTP_REG_END 0x010053ac ++#define BCHP_QUEUE_59_DATA_DTP_REG_START 0x010053b0 ++#define BCHP_QUEUE_59_DATA_DTP_REG_END 0x010053bc ++#define BCHP_QUEUE_60_DATA_DTP_REG_START 0x010053c0 ++#define BCHP_QUEUE_60_DATA_DTP_REG_END 0x010053cc ++#define BCHP_QUEUE_61_DATA_DTP_REG_START 0x010053d0 ++#define BCHP_QUEUE_61_DATA_DTP_REG_END 0x010053dc ++#define BCHP_QUEUE_62_DATA_DTP_REG_START 0x010053e0 ++#define BCHP_QUEUE_62_DATA_DTP_REG_END 0x010053ec ++#define BCHP_QUEUE_63_DATA_DTP_REG_START 0x010053f0 ++#define BCHP_QUEUE_63_DATA_DTP_REG_END 0x010053fc ++#define BCHP_OL_DQM_DTP_REG_START 0x01006c00 ++#define BCHP_OL_DQM_DTP_REG_END 0x01006c30 ++#define BCHP_OL_QUEUE_STATUS_DTP_REG_START 0x01007400 ++#define BCHP_OL_QUEUE_STATUS_DTP_REG_END 0x0100747c ++#define BCHP_OL_QUEUE_0_CNTRL_DTP_REG_START 0x01008000 ++#define BCHP_OL_QUEUE_0_CNTRL_DTP_REG_END 0x0100801c ++#define BCHP_OL_QUEUE_1_CNTRL_DTP_REG_START 0x01008020 ++#define BCHP_OL_QUEUE_1_CNTRL_DTP_REG_END 0x0100803c ++#define BCHP_OL_QUEUE_2_CNTRL_DTP_REG_START 0x01008040 ++#define BCHP_OL_QUEUE_2_CNTRL_DTP_REG_END 0x0100805c ++#define BCHP_OL_QUEUE_3_CNTRL_DTP_REG_START 0x01008060 ++#define BCHP_OL_QUEUE_3_CNTRL_DTP_REG_END 0x0100807c ++#define BCHP_OL_QUEUE_4_CNTRL_DTP_REG_START 0x01008080 ++#define BCHP_OL_QUEUE_4_CNTRL_DTP_REG_END 0x0100809c ++#define BCHP_OL_QUEUE_5_CNTRL_DTP_REG_START 0x010080a0 ++#define BCHP_OL_QUEUE_5_CNTRL_DTP_REG_END 0x010080bc ++#define BCHP_OL_QUEUE_6_CNTRL_DTP_REG_START 0x010080c0 ++#define BCHP_OL_QUEUE_6_CNTRL_DTP_REG_END 0x010080dc ++#define BCHP_OL_QUEUE_7_CNTRL_DTP_REG_START 0x010080e0 ++#define BCHP_OL_QUEUE_7_CNTRL_DTP_REG_END 0x010080fc ++#define BCHP_OL_QUEUE_8_CNTRL_DTP_REG_START 0x01008100 ++#define BCHP_OL_QUEUE_8_CNTRL_DTP_REG_END 0x0100811c ++#define BCHP_OL_QUEUE_9_CNTRL_DTP_REG_START 0x01008120 ++#define BCHP_OL_QUEUE_9_CNTRL_DTP_REG_END 0x0100813c ++#define BCHP_OL_QUEUE_10_CNTRL_DTP_REG_START 0x01008140 ++#define BCHP_OL_QUEUE_10_CNTRL_DTP_REG_END 0x0100815c ++#define BCHP_OL_QUEUE_11_CNTRL_DTP_REG_START 0x01008160 ++#define BCHP_OL_QUEUE_11_CNTRL_DTP_REG_END 0x0100817c ++#define BCHP_OL_QUEUE_12_CNTRL_DTP_REG_START 0x01008180 ++#define BCHP_OL_QUEUE_12_CNTRL_DTP_REG_END 0x0100819c ++#define BCHP_OL_QUEUE_13_CNTRL_DTP_REG_START 0x010081a0 ++#define BCHP_OL_QUEUE_13_CNTRL_DTP_REG_END 0x010081bc ++#define BCHP_OL_QUEUE_14_CNTRL_DTP_REG_START 0x010081c0 ++#define BCHP_OL_QUEUE_14_CNTRL_DTP_REG_END 0x010081dc ++#define BCHP_OL_QUEUE_15_CNTRL_DTP_REG_START 0x010081e0 ++#define BCHP_OL_QUEUE_15_CNTRL_DTP_REG_END 0x010081fc ++#define BCHP_OL_QUEUE_16_CNTRL_DTP_REG_START 0x01008200 ++#define BCHP_OL_QUEUE_16_CNTRL_DTP_REG_END 0x0100821c ++#define BCHP_OL_QUEUE_17_CNTRL_DTP_REG_START 0x01008220 ++#define BCHP_OL_QUEUE_17_CNTRL_DTP_REG_END 0x0100823c ++#define BCHP_OL_QUEUE_18_CNTRL_DTP_REG_START 0x01008240 ++#define BCHP_OL_QUEUE_18_CNTRL_DTP_REG_END 0x0100825c ++#define BCHP_OL_QUEUE_19_CNTRL_DTP_REG_START 0x01008260 ++#define BCHP_OL_QUEUE_19_CNTRL_DTP_REG_END 0x0100827c ++#define BCHP_OL_QUEUE_20_CNTRL_DTP_REG_START 0x01008280 ++#define BCHP_OL_QUEUE_20_CNTRL_DTP_REG_END 0x0100829c ++#define BCHP_OL_QUEUE_21_CNTRL_DTP_REG_START 0x010082a0 ++#define BCHP_OL_QUEUE_21_CNTRL_DTP_REG_END 0x010082bc ++#define BCHP_OL_QUEUE_22_CNTRL_DTP_REG_START 0x010082c0 ++#define BCHP_OL_QUEUE_22_CNTRL_DTP_REG_END 0x010082dc ++#define BCHP_OL_QUEUE_23_CNTRL_DTP_REG_START 0x010082e0 ++#define BCHP_OL_QUEUE_23_CNTRL_DTP_REG_END 0x010082fc ++#define BCHP_OL_QUEUE_24_CNTRL_DTP_REG_START 0x01008300 ++#define BCHP_OL_QUEUE_24_CNTRL_DTP_REG_END 0x0100831c ++#define BCHP_OL_QUEUE_25_CNTRL_DTP_REG_START 0x01008320 ++#define BCHP_OL_QUEUE_25_CNTRL_DTP_REG_END 0x0100833c ++#define BCHP_OL_QUEUE_26_CNTRL_DTP_REG_START 0x01008340 ++#define BCHP_OL_QUEUE_26_CNTRL_DTP_REG_END 0x0100835c ++#define BCHP_OL_QUEUE_27_CNTRL_DTP_REG_START 0x01008360 ++#define BCHP_OL_QUEUE_27_CNTRL_DTP_REG_END 0x0100837c ++#define BCHP_OL_QUEUE_28_CNTRL_DTP_REG_START 0x01008380 ++#define BCHP_OL_QUEUE_28_CNTRL_DTP_REG_END 0x0100839c ++#define BCHP_OL_QUEUE_29_CNTRL_DTP_REG_START 0x010083a0 ++#define BCHP_OL_QUEUE_29_CNTRL_DTP_REG_END 0x010083bc ++#define BCHP_OL_QUEUE_30_CNTRL_DTP_REG_START 0x010083c0 ++#define BCHP_OL_QUEUE_30_CNTRL_DTP_REG_END 0x010083dc ++#define BCHP_OL_QUEUE_31_CNTRL_DTP_REG_START 0x010083e0 ++#define BCHP_OL_QUEUE_31_CNTRL_DTP_REG_END 0x010083fc ++#define BCHP_OL_QUEUE_0_DATA_DTP_REG_START 0x01009000 ++#define BCHP_OL_QUEUE_0_DATA_DTP_REG_END 0x0100901c ++#define BCHP_OL_QUEUE_1_DATA_DTP_REG_START 0x01009020 ++#define BCHP_OL_QUEUE_1_DATA_DTP_REG_END 0x0100903c ++#define BCHP_OL_QUEUE_2_DATA_DTP_REG_START 0x01009040 ++#define BCHP_OL_QUEUE_2_DATA_DTP_REG_END 0x0100905c ++#define BCHP_OL_QUEUE_3_DATA_DTP_REG_START 0x01009060 ++#define BCHP_OL_QUEUE_3_DATA_DTP_REG_END 0x0100907c ++#define BCHP_OL_QUEUE_4_DATA_DTP_REG_START 0x01009080 ++#define BCHP_OL_QUEUE_4_DATA_DTP_REG_END 0x0100909c ++#define BCHP_OL_QUEUE_5_DATA_DTP_REG_START 0x010090a0 ++#define BCHP_OL_QUEUE_5_DATA_DTP_REG_END 0x010090bc ++#define BCHP_OL_QUEUE_6_DATA_DTP_REG_START 0x010090c0 ++#define BCHP_OL_QUEUE_6_DATA_DTP_REG_END 0x010090dc ++#define BCHP_OL_QUEUE_7_DATA_DTP_REG_START 0x010090e0 ++#define BCHP_OL_QUEUE_7_DATA_DTP_REG_END 0x010090fc ++#define BCHP_OL_QUEUE_8_DATA_DTP_REG_START 0x01009100 ++#define BCHP_OL_QUEUE_8_DATA_DTP_REG_END 0x0100911c ++#define BCHP_OL_QUEUE_9_DATA_DTP_REG_START 0x01009120 ++#define BCHP_OL_QUEUE_9_DATA_DTP_REG_END 0x0100913c ++#define BCHP_OL_QUEUE_10_DATA_DTP_REG_START 0x01009140 ++#define BCHP_OL_QUEUE_10_DATA_DTP_REG_END 0x0100915c ++#define BCHP_OL_QUEUE_11_DATA_DTP_REG_START 0x01009160 ++#define BCHP_OL_QUEUE_11_DATA_DTP_REG_END 0x0100917c ++#define BCHP_OL_QUEUE_12_DATA_DTP_REG_START 0x01009180 ++#define BCHP_OL_QUEUE_12_DATA_DTP_REG_END 0x0100919c ++#define BCHP_OL_QUEUE_13_DATA_DTP_REG_START 0x010091a0 ++#define BCHP_OL_QUEUE_13_DATA_DTP_REG_END 0x010091bc ++#define BCHP_OL_QUEUE_14_DATA_DTP_REG_START 0x010091c0 ++#define BCHP_OL_QUEUE_14_DATA_DTP_REG_END 0x010091dc ++#define BCHP_OL_QUEUE_15_DATA_DTP_REG_START 0x010091e0 ++#define BCHP_OL_QUEUE_15_DATA_DTP_REG_END 0x010091fc ++#define BCHP_OL_QUEUE_16_DATA_DTP_REG_START 0x01009200 ++#define BCHP_OL_QUEUE_16_DATA_DTP_REG_END 0x0100921c ++#define BCHP_OL_QUEUE_17_DATA_DTP_REG_START 0x01009220 ++#define BCHP_OL_QUEUE_17_DATA_DTP_REG_END 0x0100923c ++#define BCHP_OL_QUEUE_18_DATA_DTP_REG_START 0x01009240 ++#define BCHP_OL_QUEUE_18_DATA_DTP_REG_END 0x0100925c ++#define BCHP_OL_QUEUE_19_DATA_DTP_REG_START 0x01009260 ++#define BCHP_OL_QUEUE_19_DATA_DTP_REG_END 0x0100927c ++#define BCHP_OL_QUEUE_20_DATA_DTP_REG_START 0x01009280 ++#define BCHP_OL_QUEUE_20_DATA_DTP_REG_END 0x0100929c ++#define BCHP_OL_QUEUE_21_DATA_DTP_REG_START 0x010092a0 ++#define BCHP_OL_QUEUE_21_DATA_DTP_REG_END 0x010092bc ++#define BCHP_OL_QUEUE_22_DATA_DTP_REG_START 0x010092c0 ++#define BCHP_OL_QUEUE_22_DATA_DTP_REG_END 0x010092dc ++#define BCHP_OL_QUEUE_23_DATA_DTP_REG_START 0x010092e0 ++#define BCHP_OL_QUEUE_23_DATA_DTP_REG_END 0x010092fc ++#define BCHP_OL_QUEUE_24_DATA_DTP_REG_START 0x01009300 ++#define BCHP_OL_QUEUE_24_DATA_DTP_REG_END 0x0100931c ++#define BCHP_OL_QUEUE_25_DATA_DTP_REG_START 0x01009320 ++#define BCHP_OL_QUEUE_25_DATA_DTP_REG_END 0x0100933c ++#define BCHP_OL_QUEUE_26_DATA_DTP_REG_START 0x01009340 ++#define BCHP_OL_QUEUE_26_DATA_DTP_REG_END 0x0100935c ++#define BCHP_OL_QUEUE_27_DATA_DTP_REG_START 0x01009360 ++#define BCHP_OL_QUEUE_27_DATA_DTP_REG_END 0x0100937c ++#define BCHP_OL_QUEUE_28_DATA_DTP_REG_START 0x01009380 ++#define BCHP_OL_QUEUE_28_DATA_DTP_REG_END 0x0100939c ++#define BCHP_OL_QUEUE_29_DATA_DTP_REG_START 0x010093a0 ++#define BCHP_OL_QUEUE_29_DATA_DTP_REG_END 0x010093bc ++#define BCHP_OL_QUEUE_30_DATA_DTP_REG_START 0x010093c0 ++#define BCHP_OL_QUEUE_30_DATA_DTP_REG_END 0x010093dc ++#define BCHP_OL_QUEUE_31_DATA_DTP_REG_START 0x010093e0 ++#define BCHP_OL_QUEUE_31_DATA_DTP_REG_END 0x010093fc ++#define BCHP_OL_QUEUE_MIB_DTP_REG_START 0x0100a000 ++#define BCHP_OL_QUEUE_MIB_DTP_REG_END 0x0100a17c ++#define BCHP_QueueSharedMem_DTP_REG_START 0x01040000 ++#define BCHP_QueueSharedMem_DTP_REG_END 0x0104bffc ++#define BCHP_PacketSharedMemory_DTP_REG_START 0x01080000 ++#define BCHP_PacketSharedMemory_DTP_REG_END 0x01080ffc ++#define BCHP_DSRM_DTP_REG_START 0x01100000 ++#define BCHP_DSRM_DTP_REG_END 0x011006ec ++#define BCHP_DSRM_MAX_RATE_DTP_REG_START 0x01100700 ++#define BCHP_DSRM_MAX_RATE_DTP_REG_END 0x0110070c ++#define BCHP_DSRM_PEAK_RATE_DTP_REG_START 0x01100710 ++#define BCHP_DSRM_PEAK_RATE_DTP_REG_END 0x0110071c ++#define BCHP_DSRM_TAG_CACHE_MEM_DTP_REG_START 0x01100800 ++#define BCHP_DSRM_TAG_CACHE_MEM_DTP_REG_END 0x011008fc ++#define BCHP_DSRM_STATE_MEM_DTP_REG_START 0x01101000 ++#define BCHP_DSRM_STATE_MEM_DTP_REG_END 0x011017fc ++#define BCHP_DSRM_STATS_MEM_DTP_REG_START 0x01102000 ++#define BCHP_DSRM_STATS_MEM_DTP_REG_END 0x01102ffc ++#define BCHP_DSRM_TMOUT_MEM_DTP_REG_START 0x01103000 ++#define BCHP_DSRM_TMOUT_MEM_DTP_REG_END 0x01103ffc ++#define BCHP_DSRM_TAG_MEM_DTP_REG_START 0x01104000 ++#define BCHP_DSRM_TAG_MEM_DTP_REG_END 0x011057fc ++#define BCHP_DSRM_RLD_MEM_DTP_REG_START 0x01106000 ++#define BCHP_DSRM_RLD_MEM_DTP_REG_END 0x01107fc4 ++#define BCHP_DSRM_FREE_CLSTR_MEM_DTP_REG_START 0x01108000 ++#define BCHP_DSRM_FREE_CLSTR_MEM_DTP_REG_END 0x011082fc ++#define BCHP_DSRM_CLSTR_MEM_DTP_REG_START 0x01110000 ++#define BCHP_DSRM_CLSTR_MEM_DTP_REG_END 0x01117ffc ++#define BCHP_DSRM_SPARSE_ARY_MEM_DTP_REG_START 0x01180000 ++#define BCHP_DSRM_SPARSE_ARY_MEM_DTP_REG_END 0x011afffc ++#define BCHP_DSRM_SPARSE_ARY_AUX_MEM_DTP_REG_START 0x011c0000 ++#define BCHP_DSRM_SPARSE_ARY_AUX_MEM_DTP_REG_END 0x011efffc ++#define BCHP_BaseReserved_DFAP_REG_START 0x01200000 ++#define BCHP_BaseReserved_DFAP_REG_END 0x01200000 ++#define BCHP_Control_DFAP_REG_START 0x01201000 ++#define BCHP_Control_DFAP_REG_END 0x012010fc ++#define BCHP_OutgoingMessageFIFO_DFAP_REG_START 0x01201100 ++#define BCHP_OutgoingMessageFIFO_DFAP_REG_END 0x0120117c ++#define BCHP_IncomingMessageFIFO_DFAP_REG_START 0x01201200 ++#define BCHP_IncomingMessageFIFO_DFAP_REG_END 0x0120127c ++#define BCHP_DMA0_DFAP_REG_START 0x01201300 ++#define BCHP_DMA0_DFAP_REG_END 0x0120131c ++#define BCHP_DMA1_DFAP_REG_START 0x01201320 ++#define BCHP_DMA1_DFAP_REG_END 0x0120133c ++#define BCHP_DMAHI0_DFAP_REG_START 0x01201340 ++#define BCHP_DMAHI0_DFAP_REG_END 0x0120134c ++#define BCHP_DMAHI1_DFAP_REG_START 0x01201350 ++#define BCHP_DMAHI1_DFAP_REG_END 0x0120135c ++#define BCHP_Token_DFAP_REG_START 0x01201400 ++#define BCHP_Token_DFAP_REG_END 0x01201420 ++#define BCHP_PerfPower_DFAP_REG_START 0x01201600 ++#define BCHP_PerfPower_DFAP_REG_END 0x01201640 ++#define BCHP_MessageID_DFAP_REG_START 0x01201700 ++#define BCHP_MessageID_DFAP_REG_END 0x0120177c ++#define BCHP_HWCounters_DFAP_REG_START 0x01201900 ++#define BCHP_HWCounters_DFAP_REG_END 0x01201944 ++#define BCHP_DQM_0_31_DFAP_REG_START 0x01201c00 ++#define BCHP_DQM_0_31_DFAP_REG_END 0x01201c48 ++#define BCHP_DQM_32_63_DFAP_REG_START 0x01201d00 ++#define BCHP_DQM_32_63_DFAP_REG_END 0x01201d48 ++#define BCHP_QUEUE_TIMER_DFAP_REG_START 0x01202000 ++#define BCHP_QUEUE_TIMER_DFAP_REG_END 0x012021fc ++#define BCHP_QUEUE_STATUS_0_31_DFAP_REG_START 0x01202800 ++#define BCHP_QUEUE_STATUS_0_31_DFAP_REG_END 0x0120287c ++#define BCHP_QUEUE_STATUS_32_63_DFAP_REG_START 0x01202900 ++#define BCHP_QUEUE_STATUS_32_63_DFAP_REG_END 0x0120297c ++#define BCHP_QUEUE_MIB_0_31_DFAP_REG_START 0x01203000 ++#define BCHP_QUEUE_MIB_0_31_DFAP_REG_END 0x0120317c ++#define BCHP_QUEUE_MIB_32_63_DFAP_REG_START 0x01203200 ++#define BCHP_QUEUE_MIB_32_63_DFAP_REG_END 0x0120337c ++#define BCHP_QUEUE_0_CNTRL_DFAP_REG_START 0x01204000 ++#define BCHP_QUEUE_0_CNTRL_DFAP_REG_END 0x0120400c ++#define BCHP_QUEUE_1_CNTRL_DFAP_REG_START 0x01204010 ++#define BCHP_QUEUE_1_CNTRL_DFAP_REG_END 0x0120401c ++#define BCHP_QUEUE_2_CNTRL_DFAP_REG_START 0x01204020 ++#define BCHP_QUEUE_2_CNTRL_DFAP_REG_END 0x0120402c ++#define BCHP_QUEUE_3_CNTRL_DFAP_REG_START 0x01204030 ++#define BCHP_QUEUE_3_CNTRL_DFAP_REG_END 0x0120403c ++#define BCHP_QUEUE_4_CNTRL_DFAP_REG_START 0x01204040 ++#define BCHP_QUEUE_4_CNTRL_DFAP_REG_END 0x0120404c ++#define BCHP_QUEUE_5_CNTRL_DFAP_REG_START 0x01204050 ++#define BCHP_QUEUE_5_CNTRL_DFAP_REG_END 0x0120405c ++#define BCHP_QUEUE_6_CNTRL_DFAP_REG_START 0x01204060 ++#define BCHP_QUEUE_6_CNTRL_DFAP_REG_END 0x0120406c ++#define BCHP_QUEUE_7_CNTRL_DFAP_REG_START 0x01204070 ++#define BCHP_QUEUE_7_CNTRL_DFAP_REG_END 0x0120407c ++#define BCHP_QUEUE_8_CNTRL_DFAP_REG_START 0x01204080 ++#define BCHP_QUEUE_8_CNTRL_DFAP_REG_END 0x0120408c ++#define BCHP_QUEUE_9_CNTRL_DFAP_REG_START 0x01204090 ++#define BCHP_QUEUE_9_CNTRL_DFAP_REG_END 0x0120409c ++#define BCHP_QUEUE_10_CNTRL_DFAP_REG_START 0x012040a0 ++#define BCHP_QUEUE_10_CNTRL_DFAP_REG_END 0x012040ac ++#define BCHP_QUEUE_11_CNTRL_DFAP_REG_START 0x012040b0 ++#define BCHP_QUEUE_11_CNTRL_DFAP_REG_END 0x012040bc ++#define BCHP_QUEUE_12_CNTRL_DFAP_REG_START 0x012040c0 ++#define BCHP_QUEUE_12_CNTRL_DFAP_REG_END 0x012040cc ++#define BCHP_QUEUE_13_CNTRL_DFAP_REG_START 0x012040d0 ++#define BCHP_QUEUE_13_CNTRL_DFAP_REG_END 0x012040dc ++#define BCHP_QUEUE_14_CNTRL_DFAP_REG_START 0x012040e0 ++#define BCHP_QUEUE_14_CNTRL_DFAP_REG_END 0x012040ec ++#define BCHP_QUEUE_15_CNTRL_DFAP_REG_START 0x012040f0 ++#define BCHP_QUEUE_15_CNTRL_DFAP_REG_END 0x012040fc ++#define BCHP_QUEUE_16_CNTRL_DFAP_REG_START 0x01204100 ++#define BCHP_QUEUE_16_CNTRL_DFAP_REG_END 0x0120410c ++#define BCHP_QUEUE_17_CNTRL_DFAP_REG_START 0x01204110 ++#define BCHP_QUEUE_17_CNTRL_DFAP_REG_END 0x0120411c ++#define BCHP_QUEUE_18_CNTRL_DFAP_REG_START 0x01204120 ++#define BCHP_QUEUE_18_CNTRL_DFAP_REG_END 0x0120412c ++#define BCHP_QUEUE_19_CNTRL_DFAP_REG_START 0x01204130 ++#define BCHP_QUEUE_19_CNTRL_DFAP_REG_END 0x0120413c ++#define BCHP_QUEUE_20_CNTRL_DFAP_REG_START 0x01204140 ++#define BCHP_QUEUE_20_CNTRL_DFAP_REG_END 0x0120414c ++#define BCHP_QUEUE_21_CNTRL_DFAP_REG_START 0x01204150 ++#define BCHP_QUEUE_21_CNTRL_DFAP_REG_END 0x0120415c ++#define BCHP_QUEUE_22_CNTRL_DFAP_REG_START 0x01204160 ++#define BCHP_QUEUE_22_CNTRL_DFAP_REG_END 0x0120416c ++#define BCHP_QUEUE_23_CNTRL_DFAP_REG_START 0x01204170 ++#define BCHP_QUEUE_23_CNTRL_DFAP_REG_END 0x0120417c ++#define BCHP_QUEUE_24_CNTRL_DFAP_REG_START 0x01204180 ++#define BCHP_QUEUE_24_CNTRL_DFAP_REG_END 0x0120418c ++#define BCHP_QUEUE_25_CNTRL_DFAP_REG_START 0x01204190 ++#define BCHP_QUEUE_25_CNTRL_DFAP_REG_END 0x0120419c ++#define BCHP_QUEUE_26_CNTRL_DFAP_REG_START 0x012041a0 ++#define BCHP_QUEUE_26_CNTRL_DFAP_REG_END 0x012041ac ++#define BCHP_QUEUE_27_CNTRL_DFAP_REG_START 0x012041b0 ++#define BCHP_QUEUE_27_CNTRL_DFAP_REG_END 0x012041bc ++#define BCHP_QUEUE_28_CNTRL_DFAP_REG_START 0x012041c0 ++#define BCHP_QUEUE_28_CNTRL_DFAP_REG_END 0x012041cc ++#define BCHP_QUEUE_29_CNTRL_DFAP_REG_START 0x012041d0 ++#define BCHP_QUEUE_29_CNTRL_DFAP_REG_END 0x012041dc ++#define BCHP_QUEUE_30_CNTRL_DFAP_REG_START 0x012041e0 ++#define BCHP_QUEUE_30_CNTRL_DFAP_REG_END 0x012041ec ++#define BCHP_QUEUE_31_CNTRL_DFAP_REG_START 0x012041f0 ++#define BCHP_QUEUE_31_CNTRL_DFAP_REG_END 0x012041fc ++#define BCHP_QUEUE_32_CNTRL_DFAP_REG_START 0x01204200 ++#define BCHP_QUEUE_32_CNTRL_DFAP_REG_END 0x0120420c ++#define BCHP_QUEUE_33_CNTRL_DFAP_REG_START 0x01204210 ++#define BCHP_QUEUE_33_CNTRL_DFAP_REG_END 0x0120421c ++#define BCHP_QUEUE_34_CNTRL_DFAP_REG_START 0x01204220 ++#define BCHP_QUEUE_34_CNTRL_DFAP_REG_END 0x0120422c ++#define BCHP_QUEUE_35_CNTRL_DFAP_REG_START 0x01204230 ++#define BCHP_QUEUE_35_CNTRL_DFAP_REG_END 0x0120423c ++#define BCHP_QUEUE_36_CNTRL_DFAP_REG_START 0x01204240 ++#define BCHP_QUEUE_36_CNTRL_DFAP_REG_END 0x0120424c ++#define BCHP_QUEUE_37_CNTRL_DFAP_REG_START 0x01204250 ++#define BCHP_QUEUE_37_CNTRL_DFAP_REG_END 0x0120425c ++#define BCHP_QUEUE_38_CNTRL_DFAP_REG_START 0x01204260 ++#define BCHP_QUEUE_38_CNTRL_DFAP_REG_END 0x0120426c ++#define BCHP_QUEUE_39_CNTRL_DFAP_REG_START 0x01204270 ++#define BCHP_QUEUE_39_CNTRL_DFAP_REG_END 0x0120427c ++#define BCHP_QUEUE_40_CNTRL_DFAP_REG_START 0x01204280 ++#define BCHP_QUEUE_40_CNTRL_DFAP_REG_END 0x0120428c ++#define BCHP_QUEUE_41_CNTRL_DFAP_REG_START 0x01204290 ++#define BCHP_QUEUE_41_CNTRL_DFAP_REG_END 0x0120429c ++#define BCHP_QUEUE_42_CNTRL_DFAP_REG_START 0x012042a0 ++#define BCHP_QUEUE_42_CNTRL_DFAP_REG_END 0x012042ac ++#define BCHP_QUEUE_43_CNTRL_DFAP_REG_START 0x012042b0 ++#define BCHP_QUEUE_43_CNTRL_DFAP_REG_END 0x012042bc ++#define BCHP_QUEUE_44_CNTRL_DFAP_REG_START 0x012042c0 ++#define BCHP_QUEUE_44_CNTRL_DFAP_REG_END 0x012042cc ++#define BCHP_QUEUE_45_CNTRL_DFAP_REG_START 0x012042d0 ++#define BCHP_QUEUE_45_CNTRL_DFAP_REG_END 0x012042dc ++#define BCHP_QUEUE_46_CNTRL_DFAP_REG_START 0x012042e0 ++#define BCHP_QUEUE_46_CNTRL_DFAP_REG_END 0x012042ec ++#define BCHP_QUEUE_47_CNTRL_DFAP_REG_START 0x012042f0 ++#define BCHP_QUEUE_47_CNTRL_DFAP_REG_END 0x012042fc ++#define BCHP_QUEUE_48_CNTRL_DFAP_REG_START 0x01204300 ++#define BCHP_QUEUE_48_CNTRL_DFAP_REG_END 0x0120430c ++#define BCHP_QUEUE_49_CNTRL_DFAP_REG_START 0x01204310 ++#define BCHP_QUEUE_49_CNTRL_DFAP_REG_END 0x0120431c ++#define BCHP_QUEUE_50_CNTRL_DFAP_REG_START 0x01204320 ++#define BCHP_QUEUE_50_CNTRL_DFAP_REG_END 0x0120432c ++#define BCHP_QUEUE_51_CNTRL_DFAP_REG_START 0x01204330 ++#define BCHP_QUEUE_51_CNTRL_DFAP_REG_END 0x0120433c ++#define BCHP_QUEUE_52_CNTRL_DFAP_REG_START 0x01204340 ++#define BCHP_QUEUE_52_CNTRL_DFAP_REG_END 0x0120434c ++#define BCHP_QUEUE_53_CNTRL_DFAP_REG_START 0x01204350 ++#define BCHP_QUEUE_53_CNTRL_DFAP_REG_END 0x0120435c ++#define BCHP_QUEUE_54_CNTRL_DFAP_REG_START 0x01204360 ++#define BCHP_QUEUE_54_CNTRL_DFAP_REG_END 0x0120436c ++#define BCHP_QUEUE_55_CNTRL_DFAP_REG_START 0x01204370 ++#define BCHP_QUEUE_55_CNTRL_DFAP_REG_END 0x0120437c ++#define BCHP_QUEUE_56_CNTRL_DFAP_REG_START 0x01204380 ++#define BCHP_QUEUE_56_CNTRL_DFAP_REG_END 0x0120438c ++#define BCHP_QUEUE_57_CNTRL_DFAP_REG_START 0x01204390 ++#define BCHP_QUEUE_57_CNTRL_DFAP_REG_END 0x0120439c ++#define BCHP_QUEUE_58_CNTRL_DFAP_REG_START 0x012043a0 ++#define BCHP_QUEUE_58_CNTRL_DFAP_REG_END 0x012043ac ++#define BCHP_QUEUE_59_CNTRL_DFAP_REG_START 0x012043b0 ++#define BCHP_QUEUE_59_CNTRL_DFAP_REG_END 0x012043bc ++#define BCHP_QUEUE_60_CNTRL_DFAP_REG_START 0x012043c0 ++#define BCHP_QUEUE_60_CNTRL_DFAP_REG_END 0x012043cc ++#define BCHP_QUEUE_61_CNTRL_DFAP_REG_START 0x012043d0 ++#define BCHP_QUEUE_61_CNTRL_DFAP_REG_END 0x012043dc ++#define BCHP_QUEUE_62_CNTRL_DFAP_REG_START 0x012043e0 ++#define BCHP_QUEUE_62_CNTRL_DFAP_REG_END 0x012043ec ++#define BCHP_QUEUE_63_CNTRL_DFAP_REG_START 0x012043f0 ++#define BCHP_QUEUE_63_CNTRL_DFAP_REG_END 0x012043fc ++#define BCHP_QUEUE_0_DATA_DFAP_REG_START 0x01205000 ++#define BCHP_QUEUE_0_DATA_DFAP_REG_END 0x0120500c ++#define BCHP_QUEUE_1_DATA_DFAP_REG_START 0x01205010 ++#define BCHP_QUEUE_1_DATA_DFAP_REG_END 0x0120501c ++#define BCHP_QUEUE_2_DATA_DFAP_REG_START 0x01205020 ++#define BCHP_QUEUE_2_DATA_DFAP_REG_END 0x0120502c ++#define BCHP_QUEUE_3_DATA_DFAP_REG_START 0x01205030 ++#define BCHP_QUEUE_3_DATA_DFAP_REG_END 0x0120503c ++#define BCHP_QUEUE_4_DATA_DFAP_REG_START 0x01205040 ++#define BCHP_QUEUE_4_DATA_DFAP_REG_END 0x0120504c ++#define BCHP_QUEUE_5_DATA_DFAP_REG_START 0x01205050 ++#define BCHP_QUEUE_5_DATA_DFAP_REG_END 0x0120505c ++#define BCHP_QUEUE_6_DATA_DFAP_REG_START 0x01205060 ++#define BCHP_QUEUE_6_DATA_DFAP_REG_END 0x0120506c ++#define BCHP_QUEUE_7_DATA_DFAP_REG_START 0x01205070 ++#define BCHP_QUEUE_7_DATA_DFAP_REG_END 0x0120507c ++#define BCHP_QUEUE_8_DATA_DFAP_REG_START 0x01205080 ++#define BCHP_QUEUE_8_DATA_DFAP_REG_END 0x0120508c ++#define BCHP_QUEUE_9_DATA_DFAP_REG_START 0x01205090 ++#define BCHP_QUEUE_9_DATA_DFAP_REG_END 0x0120509c ++#define BCHP_QUEUE_10_DATA_DFAP_REG_START 0x012050a0 ++#define BCHP_QUEUE_10_DATA_DFAP_REG_END 0x012050ac ++#define BCHP_QUEUE_11_DATA_DFAP_REG_START 0x012050b0 ++#define BCHP_QUEUE_11_DATA_DFAP_REG_END 0x012050bc ++#define BCHP_QUEUE_12_DATA_DFAP_REG_START 0x012050c0 ++#define BCHP_QUEUE_12_DATA_DFAP_REG_END 0x012050cc ++#define BCHP_QUEUE_13_DATA_DFAP_REG_START 0x012050d0 ++#define BCHP_QUEUE_13_DATA_DFAP_REG_END 0x012050dc ++#define BCHP_QUEUE_14_DATA_DFAP_REG_START 0x012050e0 ++#define BCHP_QUEUE_14_DATA_DFAP_REG_END 0x012050ec ++#define BCHP_QUEUE_15_DATA_DFAP_REG_START 0x012050f0 ++#define BCHP_QUEUE_15_DATA_DFAP_REG_END 0x012050fc ++#define BCHP_QUEUE_16_DATA_DFAP_REG_START 0x01205100 ++#define BCHP_QUEUE_16_DATA_DFAP_REG_END 0x0120510c ++#define BCHP_QUEUE_17_DATA_DFAP_REG_START 0x01205110 ++#define BCHP_QUEUE_17_DATA_DFAP_REG_END 0x0120511c ++#define BCHP_QUEUE_18_DATA_DFAP_REG_START 0x01205120 ++#define BCHP_QUEUE_18_DATA_DFAP_REG_END 0x0120512c ++#define BCHP_QUEUE_19_DATA_DFAP_REG_START 0x01205130 ++#define BCHP_QUEUE_19_DATA_DFAP_REG_END 0x0120513c ++#define BCHP_QUEUE_20_DATA_DFAP_REG_START 0x01205140 ++#define BCHP_QUEUE_20_DATA_DFAP_REG_END 0x0120514c ++#define BCHP_QUEUE_21_DATA_DFAP_REG_START 0x01205150 ++#define BCHP_QUEUE_21_DATA_DFAP_REG_END 0x0120515c ++#define BCHP_QUEUE_22_DATA_DFAP_REG_START 0x01205160 ++#define BCHP_QUEUE_22_DATA_DFAP_REG_END 0x0120516c ++#define BCHP_QUEUE_23_DATA_DFAP_REG_START 0x01205170 ++#define BCHP_QUEUE_23_DATA_DFAP_REG_END 0x0120517c ++#define BCHP_QUEUE_24_DATA_DFAP_REG_START 0x01205180 ++#define BCHP_QUEUE_24_DATA_DFAP_REG_END 0x0120518c ++#define BCHP_QUEUE_25_DATA_DFAP_REG_START 0x01205190 ++#define BCHP_QUEUE_25_DATA_DFAP_REG_END 0x0120519c ++#define BCHP_QUEUE_26_DATA_DFAP_REG_START 0x012051a0 ++#define BCHP_QUEUE_26_DATA_DFAP_REG_END 0x012051ac ++#define BCHP_QUEUE_27_DATA_DFAP_REG_START 0x012051b0 ++#define BCHP_QUEUE_27_DATA_DFAP_REG_END 0x012051bc ++#define BCHP_QUEUE_28_DATA_DFAP_REG_START 0x012051c0 ++#define BCHP_QUEUE_28_DATA_DFAP_REG_END 0x012051cc ++#define BCHP_QUEUE_29_DATA_DFAP_REG_START 0x012051d0 ++#define BCHP_QUEUE_29_DATA_DFAP_REG_END 0x012051dc ++#define BCHP_QUEUE_30_DATA_DFAP_REG_START 0x012051e0 ++#define BCHP_QUEUE_30_DATA_DFAP_REG_END 0x012051ec ++#define BCHP_QUEUE_31_DATA_DFAP_REG_START 0x012051f0 ++#define BCHP_QUEUE_31_DATA_DFAP_REG_END 0x012051fc ++#define BCHP_QUEUE_32_DATA_DFAP_REG_START 0x01205200 ++#define BCHP_QUEUE_32_DATA_DFAP_REG_END 0x0120520c ++#define BCHP_QUEUE_33_DATA_DFAP_REG_START 0x01205210 ++#define BCHP_QUEUE_33_DATA_DFAP_REG_END 0x0120521c ++#define BCHP_QUEUE_34_DATA_DFAP_REG_START 0x01205220 ++#define BCHP_QUEUE_34_DATA_DFAP_REG_END 0x0120522c ++#define BCHP_QUEUE_35_DATA_DFAP_REG_START 0x01205230 ++#define BCHP_QUEUE_35_DATA_DFAP_REG_END 0x0120523c ++#define BCHP_QUEUE_36_DATA_DFAP_REG_START 0x01205240 ++#define BCHP_QUEUE_36_DATA_DFAP_REG_END 0x0120524c ++#define BCHP_QUEUE_37_DATA_DFAP_REG_START 0x01205250 ++#define BCHP_QUEUE_37_DATA_DFAP_REG_END 0x0120525c ++#define BCHP_QUEUE_38_DATA_DFAP_REG_START 0x01205260 ++#define BCHP_QUEUE_38_DATA_DFAP_REG_END 0x0120526c ++#define BCHP_QUEUE_39_DATA_DFAP_REG_START 0x01205270 ++#define BCHP_QUEUE_39_DATA_DFAP_REG_END 0x0120527c ++#define BCHP_QUEUE_40_DATA_DFAP_REG_START 0x01205280 ++#define BCHP_QUEUE_40_DATA_DFAP_REG_END 0x0120528c ++#define BCHP_QUEUE_41_DATA_DFAP_REG_START 0x01205290 ++#define BCHP_QUEUE_41_DATA_DFAP_REG_END 0x0120529c ++#define BCHP_QUEUE_42_DATA_DFAP_REG_START 0x012052a0 ++#define BCHP_QUEUE_42_DATA_DFAP_REG_END 0x012052ac ++#define BCHP_QUEUE_43_DATA_DFAP_REG_START 0x012052b0 ++#define BCHP_QUEUE_43_DATA_DFAP_REG_END 0x012052bc ++#define BCHP_QUEUE_44_DATA_DFAP_REG_START 0x012052c0 ++#define BCHP_QUEUE_44_DATA_DFAP_REG_END 0x012052cc ++#define BCHP_QUEUE_45_DATA_DFAP_REG_START 0x012052d0 ++#define BCHP_QUEUE_45_DATA_DFAP_REG_END 0x012052dc ++#define BCHP_QUEUE_46_DATA_DFAP_REG_START 0x012052e0 ++#define BCHP_QUEUE_46_DATA_DFAP_REG_END 0x012052ec ++#define BCHP_QUEUE_47_DATA_DFAP_REG_START 0x012052f0 ++#define BCHP_QUEUE_47_DATA_DFAP_REG_END 0x012052fc ++#define BCHP_QUEUE_48_DATA_DFAP_REG_START 0x01205300 ++#define BCHP_QUEUE_48_DATA_DFAP_REG_END 0x0120530c ++#define BCHP_QUEUE_49_DATA_DFAP_REG_START 0x01205310 ++#define BCHP_QUEUE_49_DATA_DFAP_REG_END 0x0120531c ++#define BCHP_QUEUE_50_DATA_DFAP_REG_START 0x01205320 ++#define BCHP_QUEUE_50_DATA_DFAP_REG_END 0x0120532c ++#define BCHP_QUEUE_51_DATA_DFAP_REG_START 0x01205330 ++#define BCHP_QUEUE_51_DATA_DFAP_REG_END 0x0120533c ++#define BCHP_QUEUE_52_DATA_DFAP_REG_START 0x01205340 ++#define BCHP_QUEUE_52_DATA_DFAP_REG_END 0x0120534c ++#define BCHP_QUEUE_53_DATA_DFAP_REG_START 0x01205350 ++#define BCHP_QUEUE_53_DATA_DFAP_REG_END 0x0120535c ++#define BCHP_QUEUE_54_DATA_DFAP_REG_START 0x01205360 ++#define BCHP_QUEUE_54_DATA_DFAP_REG_END 0x0120536c ++#define BCHP_QUEUE_55_DATA_DFAP_REG_START 0x01205370 ++#define BCHP_QUEUE_55_DATA_DFAP_REG_END 0x0120537c ++#define BCHP_QUEUE_56_DATA_DFAP_REG_START 0x01205380 ++#define BCHP_QUEUE_56_DATA_DFAP_REG_END 0x0120538c ++#define BCHP_QUEUE_57_DATA_DFAP_REG_START 0x01205390 ++#define BCHP_QUEUE_57_DATA_DFAP_REG_END 0x0120539c ++#define BCHP_QUEUE_58_DATA_DFAP_REG_START 0x012053a0 ++#define BCHP_QUEUE_58_DATA_DFAP_REG_END 0x012053ac ++#define BCHP_QUEUE_59_DATA_DFAP_REG_START 0x012053b0 ++#define BCHP_QUEUE_59_DATA_DFAP_REG_END 0x012053bc ++#define BCHP_QUEUE_60_DATA_DFAP_REG_START 0x012053c0 ++#define BCHP_QUEUE_60_DATA_DFAP_REG_END 0x012053cc ++#define BCHP_QUEUE_61_DATA_DFAP_REG_START 0x012053d0 ++#define BCHP_QUEUE_61_DATA_DFAP_REG_END 0x012053dc ++#define BCHP_QUEUE_62_DATA_DFAP_REG_START 0x012053e0 ++#define BCHP_QUEUE_62_DATA_DFAP_REG_END 0x012053ec ++#define BCHP_QUEUE_63_DATA_DFAP_REG_START 0x012053f0 ++#define BCHP_QUEUE_63_DATA_DFAP_REG_END 0x012053fc ++#define BCHP_OL_DQM_DFAP_REG_START 0x01206c00 ++#define BCHP_OL_DQM_DFAP_REG_END 0x01206c30 ++#define BCHP_OL_QUEUE_STATUS_DFAP_REG_START 0x01207400 ++#define BCHP_OL_QUEUE_STATUS_DFAP_REG_END 0x0120747c ++#define BCHP_OL_QUEUE_0_CNTRL_DFAP_REG_START 0x01208000 ++#define BCHP_OL_QUEUE_0_CNTRL_DFAP_REG_END 0x0120801c ++#define BCHP_OL_QUEUE_1_CNTRL_DFAP_REG_START 0x01208020 ++#define BCHP_OL_QUEUE_1_CNTRL_DFAP_REG_END 0x0120803c ++#define BCHP_OL_QUEUE_2_CNTRL_DFAP_REG_START 0x01208040 ++#define BCHP_OL_QUEUE_2_CNTRL_DFAP_REG_END 0x0120805c ++#define BCHP_OL_QUEUE_3_CNTRL_DFAP_REG_START 0x01208060 ++#define BCHP_OL_QUEUE_3_CNTRL_DFAP_REG_END 0x0120807c ++#define BCHP_OL_QUEUE_4_CNTRL_DFAP_REG_START 0x01208080 ++#define BCHP_OL_QUEUE_4_CNTRL_DFAP_REG_END 0x0120809c ++#define BCHP_OL_QUEUE_5_CNTRL_DFAP_REG_START 0x012080a0 ++#define BCHP_OL_QUEUE_5_CNTRL_DFAP_REG_END 0x012080bc ++#define BCHP_OL_QUEUE_6_CNTRL_DFAP_REG_START 0x012080c0 ++#define BCHP_OL_QUEUE_6_CNTRL_DFAP_REG_END 0x012080dc ++#define BCHP_OL_QUEUE_7_CNTRL_DFAP_REG_START 0x012080e0 ++#define BCHP_OL_QUEUE_7_CNTRL_DFAP_REG_END 0x012080fc ++#define BCHP_OL_QUEUE_8_CNTRL_DFAP_REG_START 0x01208100 ++#define BCHP_OL_QUEUE_8_CNTRL_DFAP_REG_END 0x0120811c ++#define BCHP_OL_QUEUE_9_CNTRL_DFAP_REG_START 0x01208120 ++#define BCHP_OL_QUEUE_9_CNTRL_DFAP_REG_END 0x0120813c ++#define BCHP_OL_QUEUE_10_CNTRL_DFAP_REG_START 0x01208140 ++#define BCHP_OL_QUEUE_10_CNTRL_DFAP_REG_END 0x0120815c ++#define BCHP_OL_QUEUE_11_CNTRL_DFAP_REG_START 0x01208160 ++#define BCHP_OL_QUEUE_11_CNTRL_DFAP_REG_END 0x0120817c ++#define BCHP_OL_QUEUE_12_CNTRL_DFAP_REG_START 0x01208180 ++#define BCHP_OL_QUEUE_12_CNTRL_DFAP_REG_END 0x0120819c ++#define BCHP_OL_QUEUE_13_CNTRL_DFAP_REG_START 0x012081a0 ++#define BCHP_OL_QUEUE_13_CNTRL_DFAP_REG_END 0x012081bc ++#define BCHP_OL_QUEUE_14_CNTRL_DFAP_REG_START 0x012081c0 ++#define BCHP_OL_QUEUE_14_CNTRL_DFAP_REG_END 0x012081dc ++#define BCHP_OL_QUEUE_15_CNTRL_DFAP_REG_START 0x012081e0 ++#define BCHP_OL_QUEUE_15_CNTRL_DFAP_REG_END 0x012081fc ++#define BCHP_OL_QUEUE_16_CNTRL_DFAP_REG_START 0x01208200 ++#define BCHP_OL_QUEUE_16_CNTRL_DFAP_REG_END 0x0120821c ++#define BCHP_OL_QUEUE_17_CNTRL_DFAP_REG_START 0x01208220 ++#define BCHP_OL_QUEUE_17_CNTRL_DFAP_REG_END 0x0120823c ++#define BCHP_OL_QUEUE_18_CNTRL_DFAP_REG_START 0x01208240 ++#define BCHP_OL_QUEUE_18_CNTRL_DFAP_REG_END 0x0120825c ++#define BCHP_OL_QUEUE_19_CNTRL_DFAP_REG_START 0x01208260 ++#define BCHP_OL_QUEUE_19_CNTRL_DFAP_REG_END 0x0120827c ++#define BCHP_OL_QUEUE_20_CNTRL_DFAP_REG_START 0x01208280 ++#define BCHP_OL_QUEUE_20_CNTRL_DFAP_REG_END 0x0120829c ++#define BCHP_OL_QUEUE_21_CNTRL_DFAP_REG_START 0x012082a0 ++#define BCHP_OL_QUEUE_21_CNTRL_DFAP_REG_END 0x012082bc ++#define BCHP_OL_QUEUE_22_CNTRL_DFAP_REG_START 0x012082c0 ++#define BCHP_OL_QUEUE_22_CNTRL_DFAP_REG_END 0x012082dc ++#define BCHP_OL_QUEUE_23_CNTRL_DFAP_REG_START 0x012082e0 ++#define BCHP_OL_QUEUE_23_CNTRL_DFAP_REG_END 0x012082fc ++#define BCHP_OL_QUEUE_24_CNTRL_DFAP_REG_START 0x01208300 ++#define BCHP_OL_QUEUE_24_CNTRL_DFAP_REG_END 0x0120831c ++#define BCHP_OL_QUEUE_25_CNTRL_DFAP_REG_START 0x01208320 ++#define BCHP_OL_QUEUE_25_CNTRL_DFAP_REG_END 0x0120833c ++#define BCHP_OL_QUEUE_26_CNTRL_DFAP_REG_START 0x01208340 ++#define BCHP_OL_QUEUE_26_CNTRL_DFAP_REG_END 0x0120835c ++#define BCHP_OL_QUEUE_27_CNTRL_DFAP_REG_START 0x01208360 ++#define BCHP_OL_QUEUE_27_CNTRL_DFAP_REG_END 0x0120837c ++#define BCHP_OL_QUEUE_28_CNTRL_DFAP_REG_START 0x01208380 ++#define BCHP_OL_QUEUE_28_CNTRL_DFAP_REG_END 0x0120839c ++#define BCHP_OL_QUEUE_29_CNTRL_DFAP_REG_START 0x012083a0 ++#define BCHP_OL_QUEUE_29_CNTRL_DFAP_REG_END 0x012083bc ++#define BCHP_OL_QUEUE_30_CNTRL_DFAP_REG_START 0x012083c0 ++#define BCHP_OL_QUEUE_30_CNTRL_DFAP_REG_END 0x012083dc ++#define BCHP_OL_QUEUE_31_CNTRL_DFAP_REG_START 0x012083e0 ++#define BCHP_OL_QUEUE_31_CNTRL_DFAP_REG_END 0x012083fc ++#define BCHP_OL_QUEUE_0_DATA_DFAP_REG_START 0x01209000 ++#define BCHP_OL_QUEUE_0_DATA_DFAP_REG_END 0x0120901c ++#define BCHP_OL_QUEUE_1_DATA_DFAP_REG_START 0x01209020 ++#define BCHP_OL_QUEUE_1_DATA_DFAP_REG_END 0x0120903c ++#define BCHP_OL_QUEUE_2_DATA_DFAP_REG_START 0x01209040 ++#define BCHP_OL_QUEUE_2_DATA_DFAP_REG_END 0x0120905c ++#define BCHP_OL_QUEUE_3_DATA_DFAP_REG_START 0x01209060 ++#define BCHP_OL_QUEUE_3_DATA_DFAP_REG_END 0x0120907c ++#define BCHP_OL_QUEUE_4_DATA_DFAP_REG_START 0x01209080 ++#define BCHP_OL_QUEUE_4_DATA_DFAP_REG_END 0x0120909c ++#define BCHP_OL_QUEUE_5_DATA_DFAP_REG_START 0x012090a0 ++#define BCHP_OL_QUEUE_5_DATA_DFAP_REG_END 0x012090bc ++#define BCHP_OL_QUEUE_6_DATA_DFAP_REG_START 0x012090c0 ++#define BCHP_OL_QUEUE_6_DATA_DFAP_REG_END 0x012090dc ++#define BCHP_OL_QUEUE_7_DATA_DFAP_REG_START 0x012090e0 ++#define BCHP_OL_QUEUE_7_DATA_DFAP_REG_END 0x012090fc ++#define BCHP_OL_QUEUE_8_DATA_DFAP_REG_START 0x01209100 ++#define BCHP_OL_QUEUE_8_DATA_DFAP_REG_END 0x0120911c ++#define BCHP_OL_QUEUE_9_DATA_DFAP_REG_START 0x01209120 ++#define BCHP_OL_QUEUE_9_DATA_DFAP_REG_END 0x0120913c ++#define BCHP_OL_QUEUE_10_DATA_DFAP_REG_START 0x01209140 ++#define BCHP_OL_QUEUE_10_DATA_DFAP_REG_END 0x0120915c ++#define BCHP_OL_QUEUE_11_DATA_DFAP_REG_START 0x01209160 ++#define BCHP_OL_QUEUE_11_DATA_DFAP_REG_END 0x0120917c ++#define BCHP_OL_QUEUE_12_DATA_DFAP_REG_START 0x01209180 ++#define BCHP_OL_QUEUE_12_DATA_DFAP_REG_END 0x0120919c ++#define BCHP_OL_QUEUE_13_DATA_DFAP_REG_START 0x012091a0 ++#define BCHP_OL_QUEUE_13_DATA_DFAP_REG_END 0x012091bc ++#define BCHP_OL_QUEUE_14_DATA_DFAP_REG_START 0x012091c0 ++#define BCHP_OL_QUEUE_14_DATA_DFAP_REG_END 0x012091dc ++#define BCHP_OL_QUEUE_15_DATA_DFAP_REG_START 0x012091e0 ++#define BCHP_OL_QUEUE_15_DATA_DFAP_REG_END 0x012091fc ++#define BCHP_OL_QUEUE_16_DATA_DFAP_REG_START 0x01209200 ++#define BCHP_OL_QUEUE_16_DATA_DFAP_REG_END 0x0120921c ++#define BCHP_OL_QUEUE_17_DATA_DFAP_REG_START 0x01209220 ++#define BCHP_OL_QUEUE_17_DATA_DFAP_REG_END 0x0120923c ++#define BCHP_OL_QUEUE_18_DATA_DFAP_REG_START 0x01209240 ++#define BCHP_OL_QUEUE_18_DATA_DFAP_REG_END 0x0120925c ++#define BCHP_OL_QUEUE_19_DATA_DFAP_REG_START 0x01209260 ++#define BCHP_OL_QUEUE_19_DATA_DFAP_REG_END 0x0120927c ++#define BCHP_OL_QUEUE_20_DATA_DFAP_REG_START 0x01209280 ++#define BCHP_OL_QUEUE_20_DATA_DFAP_REG_END 0x0120929c ++#define BCHP_OL_QUEUE_21_DATA_DFAP_REG_START 0x012092a0 ++#define BCHP_OL_QUEUE_21_DATA_DFAP_REG_END 0x012092bc ++#define BCHP_OL_QUEUE_22_DATA_DFAP_REG_START 0x012092c0 ++#define BCHP_OL_QUEUE_22_DATA_DFAP_REG_END 0x012092dc ++#define BCHP_OL_QUEUE_23_DATA_DFAP_REG_START 0x012092e0 ++#define BCHP_OL_QUEUE_23_DATA_DFAP_REG_END 0x012092fc ++#define BCHP_OL_QUEUE_24_DATA_DFAP_REG_START 0x01209300 ++#define BCHP_OL_QUEUE_24_DATA_DFAP_REG_END 0x0120931c ++#define BCHP_OL_QUEUE_25_DATA_DFAP_REG_START 0x01209320 ++#define BCHP_OL_QUEUE_25_DATA_DFAP_REG_END 0x0120933c ++#define BCHP_OL_QUEUE_26_DATA_DFAP_REG_START 0x01209340 ++#define BCHP_OL_QUEUE_26_DATA_DFAP_REG_END 0x0120935c ++#define BCHP_OL_QUEUE_27_DATA_DFAP_REG_START 0x01209360 ++#define BCHP_OL_QUEUE_27_DATA_DFAP_REG_END 0x0120937c ++#define BCHP_OL_QUEUE_28_DATA_DFAP_REG_START 0x01209380 ++#define BCHP_OL_QUEUE_28_DATA_DFAP_REG_END 0x0120939c ++#define BCHP_OL_QUEUE_29_DATA_DFAP_REG_START 0x012093a0 ++#define BCHP_OL_QUEUE_29_DATA_DFAP_REG_END 0x012093bc ++#define BCHP_OL_QUEUE_30_DATA_DFAP_REG_START 0x012093c0 ++#define BCHP_OL_QUEUE_30_DATA_DFAP_REG_END 0x012093dc ++#define BCHP_OL_QUEUE_31_DATA_DFAP_REG_START 0x012093e0 ++#define BCHP_OL_QUEUE_31_DATA_DFAP_REG_END 0x012093fc ++#define BCHP_OL_QUEUE_MIB_DFAP_REG_START 0x0120a000 ++#define BCHP_OL_QUEUE_MIB_DFAP_REG_END 0x0120a17c ++#define BCHP_QueueSharedMem_DFAP_REG_START 0x01240000 ++#define BCHP_QueueSharedMem_DFAP_REG_END 0x0124bffc ++#define BCHP_Memory_DFAP_REG_START 0x01280000 ++#define BCHP_Memory_DFAP_REG_END 0x01287ffc ++#define BCHP_DPE_BASIC_DFAP_REG_START 0x01300000 ++#define BCHP_DPE_BASIC_DFAP_REG_END 0x01300094 ++#define BCHP_DPE_MPEG_DFAP_REG_START 0x01300200 ++#define BCHP_DPE_MPEG_DFAP_REG_END 0x0130034c ++#define BCHP_DPE_HW_DFAP_REG_START 0x01300400 ++#define BCHP_DPE_HW_DFAP_REG_END 0x0130169c ++#define BCHP_DPE_EXT_DROP_DFAP_REG_START 0x01305000 ++#define BCHP_DPE_EXT_DROP_DFAP_REG_END 0x01305200 ++#define BCHP_NATC_REG_DFAP_REG_START 0x01306000 ++#define BCHP_NATC_REG_DFAP_REG_END 0x01306164 ++#define BCHP_NATC_SMEM_DFAP_REG_START 0x01307000 ++#define BCHP_NATC_SMEM_DFAP_REG_END 0x01307ffc ++#define BCHP_NATC_MEM_DFAP_REG_START 0x01308000 ++#define BCHP_NATC_MEM_DFAP_REG_END 0x0130fffc ++#define BCHP_FAP_PT_MEM_DFAP_REG_START 0x01310000 ++#define BCHP_FAP_PT_MEM_DFAP_REG_END 0x01317ffc ++#define BCHP_FPM_PT_CTRL_DFAP_REG_START 0x01320000 ++#define BCHP_FPM_PT_CTRL_DFAP_REG_END 0x0132014c ++#define BCHP_FPM_PT_POOL_DFAP_REG_START 0x01320200 ++#define BCHP_FPM_PT_POOL_DFAP_REG_END 0x01320224 ++#define BCHP_FPM_PT_SEARCH_DFAP_REG_START 0x01324000 ++#define BCHP_FPM_PT_SEARCH_DFAP_REG_END 0x013248b8 ++#define BCHP_FPM_PT_MULTI_DFAP_REG_START 0x01330000 ++#define BCHP_FPM_PT_MULTI_DFAP_REG_END 0x01333ff8 ++#define BCHP_FFE_N_0_DFAP_REG_START 0x01380000 ++#define BCHP_FFE_N_0_DFAP_REG_END 0x013803fc ++#define BCHP_FFE_P_0_DFAP_REG_START 0x01381000 ++#define BCHP_FFE_P_0_DFAP_REG_END 0x013817fc ++#define BCHP_FFE_I_0_DFAP_REG_START 0x01384000 ++#define BCHP_FFE_I_0_DFAP_REG_END 0x01387ffc ++#define BCHP_FFE_N_1_DFAP_REG_START 0x01390000 ++#define BCHP_FFE_N_1_DFAP_REG_END 0x013903fc ++#define BCHP_FFE_P_1_DFAP_REG_START 0x01391000 ++#define BCHP_FFE_P_1_DFAP_REG_END 0x013917fc ++#define BCHP_FFE_I_1_DFAP_REG_START 0x01394000 ++#define BCHP_FFE_I_1_DFAP_REG_END 0x01397ffc ++#define BCHP_FFE_N_2_DFAP_REG_START 0x013a0000 ++#define BCHP_FFE_N_2_DFAP_REG_END 0x013a03fc ++#define BCHP_FFE_P_2_DFAP_REG_START 0x013a1000 ++#define BCHP_FFE_P_2_DFAP_REG_END 0x013a17fc ++#define BCHP_FFE_I_2_DFAP_REG_START 0x013a4000 ++#define BCHP_FFE_I_2_DFAP_REG_END 0x013a7ffc ++#define BCHP_FFE_N_3_DFAP_REG_START 0x013b0000 ++#define BCHP_FFE_N_3_DFAP_REG_END 0x013b03fc ++#define BCHP_FFE_P_3_DFAP_REG_START 0x013b1000 ++#define BCHP_FFE_P_3_DFAP_REG_END 0x013b17fc ++#define BCHP_FFE_I_3_DFAP_REG_START 0x013b4000 ++#define BCHP_FFE_I_3_DFAP_REG_END 0x013b7ffc ++#define BCHP_FFE_N_4_DFAP_REG_START 0x013c0000 ++#define BCHP_FFE_N_4_DFAP_REG_END 0x013c03fc ++#define BCHP_FFE_P_4_DFAP_REG_START 0x013c1000 ++#define BCHP_FFE_P_4_DFAP_REG_END 0x013c17fc ++#define BCHP_FFE_I_4_DFAP_REG_START 0x013c4000 ++#define BCHP_FFE_I_4_DFAP_REG_END 0x013c7ffc ++#define BCHP_FFE_N_5_DFAP_REG_START 0x013d0000 ++#define BCHP_FFE_N_5_DFAP_REG_END 0x013d03fc ++#define BCHP_FFE_P_5_DFAP_REG_START 0x013d1000 ++#define BCHP_FFE_P_5_DFAP_REG_END 0x013d17fc ++#define BCHP_FFE_I_5_DFAP_REG_START 0x013d4000 ++#define BCHP_FFE_I_5_DFAP_REG_END 0x013d7ffc ++#define BCHP_FFE_N_6_DFAP_REG_START 0x013e0000 ++#define BCHP_FFE_N_6_DFAP_REG_END 0x013e03fc ++#define BCHP_FFE_P_6_DFAP_REG_START 0x013e1000 ++#define BCHP_FFE_P_6_DFAP_REG_END 0x013e17fc ++#define BCHP_FFE_I_6_DFAP_REG_START 0x013e4000 ++#define BCHP_FFE_I_6_DFAP_REG_END 0x013e7ffc ++#define BCHP_FFE_N_7_DFAP_REG_START 0x013f0000 ++#define BCHP_FFE_N_7_DFAP_REG_END 0x013f03fc ++#define BCHP_FFE_P_7_DFAP_REG_START 0x013f1000 ++#define BCHP_FFE_P_7_DFAP_REG_END 0x013f17fc ++#define BCHP_FFE_I_7_DFAP_REG_START 0x013f4000 ++#define BCHP_FFE_I_7_DFAP_REG_END 0x013f7ffc ++#define BCHP_DOWNSTREAM_REG_START 0x01400000 ++#define BCHP_DOWNSTREAM_REG_END 0x014073e0 ++#define BCHP_D31DSMAC_A_REG_START 0x01600000 ++#define BCHP_D31DSMAC_A_REG_END 0x016073e0 ++#define BCHP_D31DSMAC_B_REG_START 0x01800000 ++#define BCHP_D31DSMAC_B_REG_END 0x018073e0 ++#define BCHP_TCOFDM_0_REG_START 0x01a00000 ++#define BCHP_TCOFDM_0_REG_END 0x01a0086c ++#define BCHP_TCOFDM_1_REG_START 0x01a10000 ++#define BCHP_TCOFDM_1_REG_END 0x01a1086c ++#define BCHP_TCDTR_0_REG_START 0x01a20000 ++#define BCHP_TCDTR_0_REG_END 0x01a200fc ++#define BCHP_APM_COMMON_APM_REG_START 0x01c00000 ++#define BCHP_APM_COMMON_APM_REG_END 0x01c0005c ++#define BCHP_APM_ADC_BIST_APM_REG_START 0x01c00100 ++#define BCHP_APM_ADC_BIST_APM_REG_END 0x01c001a0 ++#define BCHP_APM_ACP_CMN_APM_REG_START 0x01c00400 ++#define BCHP_APM_ACP_CMN_APM_REG_END 0x01c00424 ++#define BCHP_APM_ACP_ChA_APM_REG_START 0x01c00500 ++#define BCHP_APM_ACP_ChA_APM_REG_END 0x01c0056c ++#define BCHP_APM_ACP_ChB_APM_REG_START 0x01c00600 ++#define BCHP_APM_ACP_ChB_APM_REG_END 0x01c0066c ++#define BCHP_APM_HVG_CMN_APM_REG_START 0x01c00800 ++#define BCHP_APM_HVG_CMN_APM_REG_END 0x01c00850 ++#define BCHP_APM_HVG_ChA_APM_REG_START 0x01c00900 ++#define BCHP_APM_HVG_ChA_APM_REG_END 0x01c00950 ++#define BCHP_APM_HVG_ChB_APM_REG_START 0x01c00a00 ++#define BCHP_APM_HVG_ChB_APM_REG_END 0x01c00a50 ++#define BCHP_APM_PCM_APM_REG_START 0x01c00c00 ++#define BCHP_APM_PCM_APM_REG_END 0x01c00c7c ++#define BCHP_APM_DMA_CTRL_APM_REG_START 0x01c01800 ++#define BCHP_APM_DMA_CTRL_APM_REG_END 0x01c01844 ++#define BCHP_APM_DMA_CH0_APM_REG_START 0x01c01a00 ++#define BCHP_APM_DMA_CH0_APM_REG_END 0x01c01a0c ++#define BCHP_APM_DMA_CH1_APM_REG_START 0x01c01a10 ++#define BCHP_APM_DMA_CH1_APM_REG_END 0x01c01a1c ++#define BCHP_APM_DMA_CH2_APM_REG_START 0x01c01a20 ++#define BCHP_APM_DMA_CH2_APM_REG_END 0x01c01a2c ++#define BCHP_APM_DMA_CH3_APM_REG_START 0x01c01a30 ++#define BCHP_APM_DMA_CH3_APM_REG_END 0x01c01a3c ++#define BCHP_APM_DMA_CH4_APM_REG_START 0x01c01a40 ++#define BCHP_APM_DMA_CH4_APM_REG_END 0x01c01a4c ++#define BCHP_APM_DMA_CH5_APM_REG_START 0x01c01a50 ++#define BCHP_APM_DMA_CH5_APM_REG_END 0x01c01a5c ++#define BCHP_APM_DMA_CH0_STATE_APM_REG_START 0x01c01c00 ++#define BCHP_APM_DMA_CH0_STATE_APM_REG_END 0x01c01c0c ++#define BCHP_APM_DMA_CH1_STATE_APM_REG_START 0x01c01c10 ++#define BCHP_APM_DMA_CH1_STATE_APM_REG_END 0x01c01c1c ++#define BCHP_APM_DMA_CH2_STATE_APM_REG_START 0x01c01c20 ++#define BCHP_APM_DMA_CH2_STATE_APM_REG_END 0x01c01c2c ++#define BCHP_APM_DMA_CH3_STATE_APM_REG_START 0x01c01c30 ++#define BCHP_APM_DMA_CH3_STATE_APM_REG_END 0x01c01c3c ++#define BCHP_APM_DMA_CH4_STATE_APM_REG_START 0x01c01c40 ++#define BCHP_APM_DMA_CH4_STATE_APM_REG_END 0x01c01c4c ++#define BCHP_APM_DMA_CH5_STATE_APM_REG_START 0x01c01c50 ++#define BCHP_APM_DMA_CH5_STATE_APM_REG_END 0x01c01c5c ++#define BCHP_APM_BMU_BMU_DMEM_APM_REG_START 0x01c02000 ++#define BCHP_APM_BMU_BMU_DMEM_APM_REG_END 0x01c023fc ++#define BCHP_APM_BMU_BMU_SMEM_APM_REG_START 0x01c02400 ++#define BCHP_APM_BMU_BMU_SMEM_APM_REG_END 0x01c025fc ++#define BCHP_APM_BMU_BMU_LS_APM_REG_START 0x01c02800 ++#define BCHP_APM_BMU_BMU_LS_APM_REG_END 0x01c0291c ++#define BCHP_APM_BMU_BMU_CP_APM_REG_START 0x01c02c00 ++#define BCHP_APM_BMU_BMU_CP_APM_REG_END 0x01c02d0c ++#define BCHP_APM_PICO_IMEM_APM_REG_START 0x01c10000 ++#define BCHP_APM_PICO_IMEM_APM_REG_END 0x01c127fc ++#define BCHP_DECT_AHB_DCT_REG_START 0x01e00000 ++#define BCHP_DECT_AHB_DCT_REG_END 0x01e07f80 ++#define BCHP_DECT_SHM_DCT_REG_START 0x01e10000 ++#define BCHP_DECT_SHM_DCT_REG_END 0x01e100ac ++#define BCHP_DECT_APB_DCT_REG_START 0x01e10800 ++#define BCHP_DECT_APB_DCT_REG_END 0x01e10802 ++#define BCHP_LEAP_ROM_REG_START 0x02000000 ++#define BCHP_LEAP_ROM_REG_END 0x02007ffc ++#define BCHP_LEAP_PROG0_MEM_REG_START 0x02040000 ++#define BCHP_LEAP_PROG0_MEM_REG_END 0x0204bffc ++#define BCHP_LEAP_CPU_CORE_REGS_REG_START 0x020a0000 ++#define BCHP_LEAP_CPU_CORE_REGS_REG_END 0x020a00fc ++#define BCHP_LEAP_CPU_AUX_REGS_REG_START 0x020c0000 ++#define BCHP_LEAP_CPU_AUX_REGS_REG_END 0x020c1058 ++#define BCHP_LEAP_HAB_MEM_REG_START 0x020c8000 ++#define BCHP_LEAP_HAB_MEM_REG_END 0x020c83fc ++#define BCHP_LEAP_UART_REG_START 0x020c9000 ++#define BCHP_LEAP_UART_REG_END 0x020c9ffc ++#define BCHP_LEAP_WDG_REG_START 0x020ca000 ++#define BCHP_LEAP_WDG_REG_END 0x020caffc ++#define BCHP_LEAP_CTRL_REG_START 0x02100000 ++#define BCHP_LEAP_CTRL_REG_END 0x02100310 ++#define BCHP_LEAP_L1_REG_START 0x02100400 ++#define BCHP_LEAP_L1_REG_END 0x0210041c ++#define BCHP_LEAP_L2_REG_START 0x02100500 ++#define BCHP_LEAP_L2_REG_END 0x02100514 ++#define BCHP_LEAP_HOST_L1_REG_START 0x02100600 ++#define BCHP_LEAP_HOST_L1_REG_END 0x0210061c ++#define BCHP_LEAP_HOST_L2_REG_START 0x02100700 ++#define BCHP_LEAP_HOST_L2_REG_END 0x0210072c ++#define BCHP_LEAP_CTRL_MISC_REG_START 0x02100800 ++#define BCHP_LEAP_CTRL_MISC_REG_END 0x0210084c ++#define BCHP_LEAP_HOST2_L1_REG_START 0x02100900 ++#define BCHP_LEAP_HOST2_L1_REG_END 0x0210091c ++#define BCHP_LEAP_ROM_PATCH_REG_START 0x02100a00 ++#define BCHP_LEAP_ROM_PATCH_REG_END 0x02100a3c ++#define BCHP_DS_A_MICRO_REG_START 0x02200000 ++#define BCHP_DS_A_MICRO_REG_END 0x0220001c ++#define BCHP_DS_A_TOPS_REG_START 0x02200100 ++#define BCHP_DS_A_TOPS_REG_END 0x02200148 ++#define BCHP_DS_A_TP_REG_START 0x02200400 ++#define BCHP_DS_A_TP_REG_END 0x02200418 ++#define BCHP_OOB_REG_START 0x02201000 ++#define BCHP_OOB_REG_END 0x022011f8 ++#define BCHP_DS_A_CHAN_FE_REG_START 0x02210000 ++#define BCHP_DS_A_CHAN_FE_REG_END 0x0221000c ++#define BCHP_DS_A_CHAN_ACI_ANXA_REG_START 0x02210100 ++#define BCHP_DS_A_CHAN_ACI_ANXA_REG_END 0x02210144 ++#define BCHP_DS_A_CHAN_ACI_ANXB_REG_START 0x02210200 ++#define BCHP_DS_A_CHAN_ACI_ANXB_REG_END 0x02210244 ++#define BCHP_DS_A_CHAN_OOB_ISW_MXR_REG_START 0x02210300 ++#define BCHP_DS_A_CHAN_OOB_ISW_MXR_REG_END 0x02210308 ++#define BCHP_DS_A_CHAN_OOB_ACI_AGF_REG_START 0x02210400 ++#define BCHP_DS_A_CHAN_OOB_ACI_AGF_REG_END 0x0221040c ++#define BCHP_DS_A_CHAN_SPECA_ISW_MXR_REG_START 0x02210500 ++#define BCHP_DS_A_CHAN_SPECA_ISW_MXR_REG_END 0x02210508 ++#define BCHP_DS_A_CHAN_SPECA_ACI_AGF_REG_START 0x02210600 ++#define BCHP_DS_A_CHAN_SPECA_ACI_AGF_REG_END 0x0221060c ++#define BCHP_DS_A_CHAN_SPARE_ISW_MXR_REG_START 0x02210700 ++#define BCHP_DS_A_CHAN_SPARE_ISW_MXR_REG_END 0x02210708 ++#define BCHP_DS_A_CHAN_SPARE_ACI_AGF_REG_START 0x02210800 ++#define BCHP_DS_A_CHAN_SPARE_ACI_AGF_REG_END 0x0221080c ++#define BCHP_DS_A_00_ISW_MXR_REG_START 0x02220000 ++#define BCHP_DS_A_00_ISW_MXR_REG_END 0x02220008 ++#define BCHP_DS_A_00_ACI_AGF_REG_START 0x02220200 ++#define BCHP_DS_A_00_ACI_AGF_REG_END 0x0222037c ++#define BCHP_DS_A_00_TRL_REG_START 0x02220400 ++#define BCHP_DS_A_00_TRL_REG_END 0x022206fc ++#define BCHP_DS_A_00_EQ_REG_START 0x02220800 ++#define BCHP_DS_A_00_EQ_REG_END 0x02220bbc ++#define BCHP_DS_A_00_FECF_REG_START 0x02220c00 ++#define BCHP_DS_A_00_FECF_REG_END 0x02220d7c ++#define BCHP_DS_A_00_FECB_REG_START 0x02220e00 ++#define BCHP_DS_A_00_FECB_REG_END 0x02220ebc ++#define BCHP_DS_A_00_FFT_REG_START 0x02221000 ++#define BCHP_DS_A_00_FFT_REG_END 0x0222117c ++#define BCHP_DS_A_00_OI_REG_START 0x02221200 ++#define BCHP_DS_A_00_OI_REG_END 0x0222123c ++#define BCHP_DS_A_00_IRQ_REG_START 0x02221300 ++#define BCHP_DS_A_00_IRQ_REG_END 0x02221314 ++#define BCHP_DS_A_01_ISW_MXR_REG_START 0x02222000 ++#define BCHP_DS_A_01_ISW_MXR_REG_END 0x02222008 ++#define BCHP_DS_A_01_ACI_AGF_REG_START 0x02222200 ++#define BCHP_DS_A_01_ACI_AGF_REG_END 0x0222237c ++#define BCHP_DS_A_01_TRL_REG_START 0x02222400 ++#define BCHP_DS_A_01_TRL_REG_END 0x022226fc ++#define BCHP_DS_A_01_EQ_REG_START 0x02222800 ++#define BCHP_DS_A_01_EQ_REG_END 0x02222bbc ++#define BCHP_DS_A_01_FECF_REG_START 0x02222c00 ++#define BCHP_DS_A_01_FECF_REG_END 0x02222d7c ++#define BCHP_DS_A_01_FECB_REG_START 0x02222e00 ++#define BCHP_DS_A_01_FECB_REG_END 0x02222ebc ++#define BCHP_DS_A_01_FFT_REG_START 0x02223000 ++#define BCHP_DS_A_01_FFT_REG_END 0x0222317c ++#define BCHP_DS_A_01_OI_REG_START 0x02223200 ++#define BCHP_DS_A_01_OI_REG_END 0x0222323c ++#define BCHP_DS_A_01_IRQ_REG_START 0x02223300 ++#define BCHP_DS_A_01_IRQ_REG_END 0x02223314 ++#define BCHP_DS_A_02_ISW_MXR_REG_START 0x02224000 ++#define BCHP_DS_A_02_ISW_MXR_REG_END 0x02224008 ++#define BCHP_DS_A_02_ACI_AGF_REG_START 0x02224200 ++#define BCHP_DS_A_02_ACI_AGF_REG_END 0x0222437c ++#define BCHP_DS_A_02_TRL_REG_START 0x02224400 ++#define BCHP_DS_A_02_TRL_REG_END 0x022246fc ++#define BCHP_DS_A_02_EQ_REG_START 0x02224800 ++#define BCHP_DS_A_02_EQ_REG_END 0x02224bbc ++#define BCHP_DS_A_02_FECF_REG_START 0x02224c00 ++#define BCHP_DS_A_02_FECF_REG_END 0x02224d7c ++#define BCHP_DS_A_02_FECB_REG_START 0x02224e00 ++#define BCHP_DS_A_02_FECB_REG_END 0x02224ebc ++#define BCHP_DS_A_02_FFT_REG_START 0x02225000 ++#define BCHP_DS_A_02_FFT_REG_END 0x0222517c ++#define BCHP_DS_A_02_OI_REG_START 0x02225200 ++#define BCHP_DS_A_02_OI_REG_END 0x0222523c ++#define BCHP_DS_A_02_IRQ_REG_START 0x02225300 ++#define BCHP_DS_A_02_IRQ_REG_END 0x02225314 ++#define BCHP_DS_A_03_ISW_MXR_REG_START 0x02226000 ++#define BCHP_DS_A_03_ISW_MXR_REG_END 0x02226008 ++#define BCHP_DS_A_03_ACI_AGF_REG_START 0x02226200 ++#define BCHP_DS_A_03_ACI_AGF_REG_END 0x0222637c ++#define BCHP_DS_A_03_TRL_REG_START 0x02226400 ++#define BCHP_DS_A_03_TRL_REG_END 0x022266fc ++#define BCHP_DS_A_03_EQ_REG_START 0x02226800 ++#define BCHP_DS_A_03_EQ_REG_END 0x02226bbc ++#define BCHP_DS_A_03_FECF_REG_START 0x02226c00 ++#define BCHP_DS_A_03_FECF_REG_END 0x02226d7c ++#define BCHP_DS_A_03_FECB_REG_START 0x02226e00 ++#define BCHP_DS_A_03_FECB_REG_END 0x02226ebc ++#define BCHP_DS_A_03_FFT_REG_START 0x02227000 ++#define BCHP_DS_A_03_FFT_REG_END 0x0222717c ++#define BCHP_DS_A_03_OI_REG_START 0x02227200 ++#define BCHP_DS_A_03_OI_REG_END 0x0222723c ++#define BCHP_DS_A_03_IRQ_REG_START 0x02227300 ++#define BCHP_DS_A_03_IRQ_REG_END 0x02227314 ++#define BCHP_DS_A_04_ISW_MXR_REG_START 0x02228000 ++#define BCHP_DS_A_04_ISW_MXR_REG_END 0x02228008 ++#define BCHP_DS_A_04_ACI_AGF_REG_START 0x02228200 ++#define BCHP_DS_A_04_ACI_AGF_REG_END 0x0222837c ++#define BCHP_DS_A_04_TRL_REG_START 0x02228400 ++#define BCHP_DS_A_04_TRL_REG_END 0x022286fc ++#define BCHP_DS_A_04_EQ_REG_START 0x02228800 ++#define BCHP_DS_A_04_EQ_REG_END 0x02228bbc ++#define BCHP_DS_A_04_FECF_REG_START 0x02228c00 ++#define BCHP_DS_A_04_FECF_REG_END 0x02228d7c ++#define BCHP_DS_A_04_FECB_REG_START 0x02228e00 ++#define BCHP_DS_A_04_FECB_REG_END 0x02228ebc ++#define BCHP_DS_A_04_FFT_REG_START 0x02229000 ++#define BCHP_DS_A_04_FFT_REG_END 0x0222917c ++#define BCHP_DS_A_04_OI_REG_START 0x02229200 ++#define BCHP_DS_A_04_OI_REG_END 0x0222923c ++#define BCHP_DS_A_04_IRQ_REG_START 0x02229300 ++#define BCHP_DS_A_04_IRQ_REG_END 0x02229314 ++#define BCHP_DS_A_05_ISW_MXR_REG_START 0x0222a000 ++#define BCHP_DS_A_05_ISW_MXR_REG_END 0x0222a008 ++#define BCHP_DS_A_05_ACI_AGF_REG_START 0x0222a200 ++#define BCHP_DS_A_05_ACI_AGF_REG_END 0x0222a37c ++#define BCHP_DS_A_05_TRL_REG_START 0x0222a400 ++#define BCHP_DS_A_05_TRL_REG_END 0x0222a6fc ++#define BCHP_DS_A_05_EQ_REG_START 0x0222a800 ++#define BCHP_DS_A_05_EQ_REG_END 0x0222abbc ++#define BCHP_DS_A_05_FECF_REG_START 0x0222ac00 ++#define BCHP_DS_A_05_FECF_REG_END 0x0222ad7c ++#define BCHP_DS_A_05_FECB_REG_START 0x0222ae00 ++#define BCHP_DS_A_05_FECB_REG_END 0x0222aebc ++#define BCHP_DS_A_05_FFT_REG_START 0x0222b000 ++#define BCHP_DS_A_05_FFT_REG_END 0x0222b17c ++#define BCHP_DS_A_05_OI_REG_START 0x0222b200 ++#define BCHP_DS_A_05_OI_REG_END 0x0222b23c ++#define BCHP_DS_A_05_IRQ_REG_START 0x0222b300 ++#define BCHP_DS_A_05_IRQ_REG_END 0x0222b314 ++#define BCHP_DS_A_06_ISW_MXR_REG_START 0x0222c000 ++#define BCHP_DS_A_06_ISW_MXR_REG_END 0x0222c008 ++#define BCHP_DS_A_06_ACI_AGF_REG_START 0x0222c200 ++#define BCHP_DS_A_06_ACI_AGF_REG_END 0x0222c37c ++#define BCHP_DS_A_06_TRL_REG_START 0x0222c400 ++#define BCHP_DS_A_06_TRL_REG_END 0x0222c6fc ++#define BCHP_DS_A_06_EQ_REG_START 0x0222c800 ++#define BCHP_DS_A_06_EQ_REG_END 0x0222cbbc ++#define BCHP_DS_A_06_FECF_REG_START 0x0222cc00 ++#define BCHP_DS_A_06_FECF_REG_END 0x0222cd7c ++#define BCHP_DS_A_06_FECB_REG_START 0x0222ce00 ++#define BCHP_DS_A_06_FECB_REG_END 0x0222cebc ++#define BCHP_DS_A_06_FFT_REG_START 0x0222d000 ++#define BCHP_DS_A_06_FFT_REG_END 0x0222d17c ++#define BCHP_DS_A_06_OI_REG_START 0x0222d200 ++#define BCHP_DS_A_06_OI_REG_END 0x0222d23c ++#define BCHP_DS_A_06_IRQ_REG_START 0x0222d300 ++#define BCHP_DS_A_06_IRQ_REG_END 0x0222d314 ++#define BCHP_DS_A_07_ISW_MXR_REG_START 0x0222e000 ++#define BCHP_DS_A_07_ISW_MXR_REG_END 0x0222e008 ++#define BCHP_DS_A_07_ACI_AGF_REG_START 0x0222e200 ++#define BCHP_DS_A_07_ACI_AGF_REG_END 0x0222e37c ++#define BCHP_DS_A_07_TRL_REG_START 0x0222e400 ++#define BCHP_DS_A_07_TRL_REG_END 0x0222e6fc ++#define BCHP_DS_A_07_EQ_REG_START 0x0222e800 ++#define BCHP_DS_A_07_EQ_REG_END 0x0222ebbc ++#define BCHP_DS_A_07_FECF_REG_START 0x0222ec00 ++#define BCHP_DS_A_07_FECF_REG_END 0x0222ed7c ++#define BCHP_DS_A_07_FECB_REG_START 0x0222ee00 ++#define BCHP_DS_A_07_FECB_REG_END 0x0222eebc ++#define BCHP_DS_A_07_FFT_REG_START 0x0222f000 ++#define BCHP_DS_A_07_FFT_REG_END 0x0222f17c ++#define BCHP_DS_A_07_OI_REG_START 0x0222f200 ++#define BCHP_DS_A_07_OI_REG_END 0x0222f23c ++#define BCHP_DS_A_07_IRQ_REG_START 0x0222f300 ++#define BCHP_DS_A_07_IRQ_REG_END 0x0222f314 ++#define BCHP_DS_A_08_ISW_MXR_REG_START 0x02230000 ++#define BCHP_DS_A_08_ISW_MXR_REG_END 0x02230008 ++#define BCHP_DS_A_08_ACI_AGF_REG_START 0x02230200 ++#define BCHP_DS_A_08_ACI_AGF_REG_END 0x0223037c ++#define BCHP_DS_A_08_TRL_REG_START 0x02230400 ++#define BCHP_DS_A_08_TRL_REG_END 0x022306fc ++#define BCHP_DS_A_08_EQ_REG_START 0x02230800 ++#define BCHP_DS_A_08_EQ_REG_END 0x02230bbc ++#define BCHP_DS_A_08_FECF_REG_START 0x02230c00 ++#define BCHP_DS_A_08_FECF_REG_END 0x02230d7c ++#define BCHP_DS_A_08_FECB_REG_START 0x02230e00 ++#define BCHP_DS_A_08_FECB_REG_END 0x02230ebc ++#define BCHP_DS_A_08_FFT_REG_START 0x02231000 ++#define BCHP_DS_A_08_FFT_REG_END 0x0223117c ++#define BCHP_DS_A_08_OI_REG_START 0x02231200 ++#define BCHP_DS_A_08_OI_REG_END 0x0223123c ++#define BCHP_DS_A_08_IRQ_REG_START 0x02231300 ++#define BCHP_DS_A_08_IRQ_REG_END 0x02231314 ++#define BCHP_DS_A_09_ISW_MXR_REG_START 0x02232000 ++#define BCHP_DS_A_09_ISW_MXR_REG_END 0x02232008 ++#define BCHP_DS_A_09_ACI_AGF_REG_START 0x02232200 ++#define BCHP_DS_A_09_ACI_AGF_REG_END 0x0223237c ++#define BCHP_DS_A_09_TRL_REG_START 0x02232400 ++#define BCHP_DS_A_09_TRL_REG_END 0x022326fc ++#define BCHP_DS_A_09_EQ_REG_START 0x02232800 ++#define BCHP_DS_A_09_EQ_REG_END 0x02232bbc ++#define BCHP_DS_A_09_FECF_REG_START 0x02232c00 ++#define BCHP_DS_A_09_FECF_REG_END 0x02232d7c ++#define BCHP_DS_A_09_FECB_REG_START 0x02232e00 ++#define BCHP_DS_A_09_FECB_REG_END 0x02232ebc ++#define BCHP_DS_A_09_FFT_REG_START 0x02233000 ++#define BCHP_DS_A_09_FFT_REG_END 0x0223317c ++#define BCHP_DS_A_09_OI_REG_START 0x02233200 ++#define BCHP_DS_A_09_OI_REG_END 0x0223323c ++#define BCHP_DS_A_09_IRQ_REG_START 0x02233300 ++#define BCHP_DS_A_09_IRQ_REG_END 0x02233314 ++#define BCHP_DS_A_10_ISW_MXR_REG_START 0x02234000 ++#define BCHP_DS_A_10_ISW_MXR_REG_END 0x02234008 ++#define BCHP_DS_A_10_ACI_AGF_REG_START 0x02234200 ++#define BCHP_DS_A_10_ACI_AGF_REG_END 0x0223437c ++#define BCHP_DS_A_10_TRL_REG_START 0x02234400 ++#define BCHP_DS_A_10_TRL_REG_END 0x022346fc ++#define BCHP_DS_A_10_EQ_REG_START 0x02234800 ++#define BCHP_DS_A_10_EQ_REG_END 0x02234bbc ++#define BCHP_DS_A_10_FECF_REG_START 0x02234c00 ++#define BCHP_DS_A_10_FECF_REG_END 0x02234d7c ++#define BCHP_DS_A_10_FECB_REG_START 0x02234e00 ++#define BCHP_DS_A_10_FECB_REG_END 0x02234ebc ++#define BCHP_DS_A_10_FFT_REG_START 0x02235000 ++#define BCHP_DS_A_10_FFT_REG_END 0x0223517c ++#define BCHP_DS_A_10_OI_REG_START 0x02235200 ++#define BCHP_DS_A_10_OI_REG_END 0x0223523c ++#define BCHP_DS_A_10_IRQ_REG_START 0x02235300 ++#define BCHP_DS_A_10_IRQ_REG_END 0x02235314 ++#define BCHP_DS_A_11_ISW_MXR_REG_START 0x02236000 ++#define BCHP_DS_A_11_ISW_MXR_REG_END 0x02236008 ++#define BCHP_DS_A_11_ACI_AGF_REG_START 0x02236200 ++#define BCHP_DS_A_11_ACI_AGF_REG_END 0x0223637c ++#define BCHP_DS_A_11_TRL_REG_START 0x02236400 ++#define BCHP_DS_A_11_TRL_REG_END 0x022366fc ++#define BCHP_DS_A_11_EQ_REG_START 0x02236800 ++#define BCHP_DS_A_11_EQ_REG_END 0x02236bbc ++#define BCHP_DS_A_11_FECF_REG_START 0x02236c00 ++#define BCHP_DS_A_11_FECF_REG_END 0x02236d7c ++#define BCHP_DS_A_11_FECB_REG_START 0x02236e00 ++#define BCHP_DS_A_11_FECB_REG_END 0x02236ebc ++#define BCHP_DS_A_11_FFT_REG_START 0x02237000 ++#define BCHP_DS_A_11_FFT_REG_END 0x0223717c ++#define BCHP_DS_A_11_OI_REG_START 0x02237200 ++#define BCHP_DS_A_11_OI_REG_END 0x0223723c ++#define BCHP_DS_A_11_IRQ_REG_START 0x02237300 ++#define BCHP_DS_A_11_IRQ_REG_END 0x02237314 ++#define BCHP_DS_A_12_ISW_MXR_REG_START 0x02238000 ++#define BCHP_DS_A_12_ISW_MXR_REG_END 0x02238008 ++#define BCHP_DS_A_12_ACI_AGF_REG_START 0x02238200 ++#define BCHP_DS_A_12_ACI_AGF_REG_END 0x0223837c ++#define BCHP_DS_A_12_TRL_REG_START 0x02238400 ++#define BCHP_DS_A_12_TRL_REG_END 0x022386fc ++#define BCHP_DS_A_12_EQ_REG_START 0x02238800 ++#define BCHP_DS_A_12_EQ_REG_END 0x02238bbc ++#define BCHP_DS_A_12_FECF_REG_START 0x02238c00 ++#define BCHP_DS_A_12_FECF_REG_END 0x02238d7c ++#define BCHP_DS_A_12_FECB_REG_START 0x02238e00 ++#define BCHP_DS_A_12_FECB_REG_END 0x02238ebc ++#define BCHP_DS_A_12_FFT_REG_START 0x02239000 ++#define BCHP_DS_A_12_FFT_REG_END 0x0223917c ++#define BCHP_DS_A_12_OI_REG_START 0x02239200 ++#define BCHP_DS_A_12_OI_REG_END 0x0223923c ++#define BCHP_DS_A_12_IRQ_REG_START 0x02239300 ++#define BCHP_DS_A_12_IRQ_REG_END 0x02239314 ++#define BCHP_DS_A_13_ISW_MXR_REG_START 0x0223a000 ++#define BCHP_DS_A_13_ISW_MXR_REG_END 0x0223a008 ++#define BCHP_DS_A_13_ACI_AGF_REG_START 0x0223a200 ++#define BCHP_DS_A_13_ACI_AGF_REG_END 0x0223a37c ++#define BCHP_DS_A_13_TRL_REG_START 0x0223a400 ++#define BCHP_DS_A_13_TRL_REG_END 0x0223a6fc ++#define BCHP_DS_A_13_EQ_REG_START 0x0223a800 ++#define BCHP_DS_A_13_EQ_REG_END 0x0223abbc ++#define BCHP_DS_A_13_FECF_REG_START 0x0223ac00 ++#define BCHP_DS_A_13_FECF_REG_END 0x0223ad7c ++#define BCHP_DS_A_13_FECB_REG_START 0x0223ae00 ++#define BCHP_DS_A_13_FECB_REG_END 0x0223aebc ++#define BCHP_DS_A_13_FFT_REG_START 0x0223b000 ++#define BCHP_DS_A_13_FFT_REG_END 0x0223b17c ++#define BCHP_DS_A_13_OI_REG_START 0x0223b200 ++#define BCHP_DS_A_13_OI_REG_END 0x0223b23c ++#define BCHP_DS_A_13_IRQ_REG_START 0x0223b300 ++#define BCHP_DS_A_13_IRQ_REG_END 0x0223b314 ++#define BCHP_DS_A_14_ISW_MXR_REG_START 0x0223c000 ++#define BCHP_DS_A_14_ISW_MXR_REG_END 0x0223c008 ++#define BCHP_DS_A_14_ACI_AGF_REG_START 0x0223c200 ++#define BCHP_DS_A_14_ACI_AGF_REG_END 0x0223c37c ++#define BCHP_DS_A_14_TRL_REG_START 0x0223c400 ++#define BCHP_DS_A_14_TRL_REG_END 0x0223c6fc ++#define BCHP_DS_A_14_EQ_REG_START 0x0223c800 ++#define BCHP_DS_A_14_EQ_REG_END 0x0223cbbc ++#define BCHP_DS_A_14_FECF_REG_START 0x0223cc00 ++#define BCHP_DS_A_14_FECF_REG_END 0x0223cd7c ++#define BCHP_DS_A_14_FECB_REG_START 0x0223ce00 ++#define BCHP_DS_A_14_FECB_REG_END 0x0223cebc ++#define BCHP_DS_A_14_FFT_REG_START 0x0223d000 ++#define BCHP_DS_A_14_FFT_REG_END 0x0223d17c ++#define BCHP_DS_A_14_OI_REG_START 0x0223d200 ++#define BCHP_DS_A_14_OI_REG_END 0x0223d23c ++#define BCHP_DS_A_14_IRQ_REG_START 0x0223d300 ++#define BCHP_DS_A_14_IRQ_REG_END 0x0223d314 ++#define BCHP_DS_A_15_ISW_MXR_REG_START 0x0223e000 ++#define BCHP_DS_A_15_ISW_MXR_REG_END 0x0223e008 ++#define BCHP_DS_A_15_ACI_AGF_REG_START 0x0223e200 ++#define BCHP_DS_A_15_ACI_AGF_REG_END 0x0223e37c ++#define BCHP_DS_A_15_TRL_REG_START 0x0223e400 ++#define BCHP_DS_A_15_TRL_REG_END 0x0223e6fc ++#define BCHP_DS_A_15_EQ_REG_START 0x0223e800 ++#define BCHP_DS_A_15_EQ_REG_END 0x0223ebbc ++#define BCHP_DS_A_15_FECF_REG_START 0x0223ec00 ++#define BCHP_DS_A_15_FECF_REG_END 0x0223ed7c ++#define BCHP_DS_A_15_FECB_REG_START 0x0223ee00 ++#define BCHP_DS_A_15_FECB_REG_END 0x0223eebc ++#define BCHP_DS_A_15_FFT_REG_START 0x0223f000 ++#define BCHP_DS_A_15_FFT_REG_END 0x0223f17c ++#define BCHP_DS_A_15_OI_REG_START 0x0223f200 ++#define BCHP_DS_A_15_OI_REG_END 0x0223f23c ++#define BCHP_DS_A_15_IRQ_REG_START 0x0223f300 ++#define BCHP_DS_A_15_IRQ_REG_END 0x0223f314 ++#define BCHP_DS_A_16_ISW_MXR_REG_START 0x02240000 ++#define BCHP_DS_A_16_ISW_MXR_REG_END 0x02240008 ++#define BCHP_DS_A_16_ACI_AGF_REG_START 0x02240200 ++#define BCHP_DS_A_16_ACI_AGF_REG_END 0x0224037c ++#define BCHP_DS_A_16_TRL_REG_START 0x02240400 ++#define BCHP_DS_A_16_TRL_REG_END 0x022406fc ++#define BCHP_DS_A_16_EQ_REG_START 0x02240800 ++#define BCHP_DS_A_16_EQ_REG_END 0x02240bbc ++#define BCHP_DS_A_16_FECF_REG_START 0x02240c00 ++#define BCHP_DS_A_16_FECF_REG_END 0x02240d7c ++#define BCHP_DS_A_16_FECB_REG_START 0x02240e00 ++#define BCHP_DS_A_16_FECB_REG_END 0x02240ebc ++#define BCHP_DS_A_16_FFT_REG_START 0x02241000 ++#define BCHP_DS_A_16_FFT_REG_END 0x0224117c ++#define BCHP_DS_A_16_OI_REG_START 0x02241200 ++#define BCHP_DS_A_16_OI_REG_END 0x0224123c ++#define BCHP_DS_A_16_IRQ_REG_START 0x02241300 ++#define BCHP_DS_A_16_IRQ_REG_END 0x02241314 ++#define BCHP_DS_A_17_ISW_MXR_REG_START 0x02242000 ++#define BCHP_DS_A_17_ISW_MXR_REG_END 0x02242008 ++#define BCHP_DS_A_17_ACI_AGF_REG_START 0x02242200 ++#define BCHP_DS_A_17_ACI_AGF_REG_END 0x0224237c ++#define BCHP_DS_A_17_TRL_REG_START 0x02242400 ++#define BCHP_DS_A_17_TRL_REG_END 0x022426fc ++#define BCHP_DS_A_17_EQ_REG_START 0x02242800 ++#define BCHP_DS_A_17_EQ_REG_END 0x02242bbc ++#define BCHP_DS_A_17_FECF_REG_START 0x02242c00 ++#define BCHP_DS_A_17_FECF_REG_END 0x02242d7c ++#define BCHP_DS_A_17_FECB_REG_START 0x02242e00 ++#define BCHP_DS_A_17_FECB_REG_END 0x02242ebc ++#define BCHP_DS_A_17_FFT_REG_START 0x02243000 ++#define BCHP_DS_A_17_FFT_REG_END 0x0224317c ++#define BCHP_DS_A_17_OI_REG_START 0x02243200 ++#define BCHP_DS_A_17_OI_REG_END 0x0224323c ++#define BCHP_DS_A_17_IRQ_REG_START 0x02243300 ++#define BCHP_DS_A_17_IRQ_REG_END 0x02243314 ++#define BCHP_DS_A_18_ISW_MXR_REG_START 0x02244000 ++#define BCHP_DS_A_18_ISW_MXR_REG_END 0x02244008 ++#define BCHP_DS_A_18_ACI_AGF_REG_START 0x02244200 ++#define BCHP_DS_A_18_ACI_AGF_REG_END 0x0224437c ++#define BCHP_DS_A_18_TRL_REG_START 0x02244400 ++#define BCHP_DS_A_18_TRL_REG_END 0x022446fc ++#define BCHP_DS_A_18_EQ_REG_START 0x02244800 ++#define BCHP_DS_A_18_EQ_REG_END 0x02244bbc ++#define BCHP_DS_A_18_FECF_REG_START 0x02244c00 ++#define BCHP_DS_A_18_FECF_REG_END 0x02244d7c ++#define BCHP_DS_A_18_FECB_REG_START 0x02244e00 ++#define BCHP_DS_A_18_FECB_REG_END 0x02244ebc ++#define BCHP_DS_A_18_FFT_REG_START 0x02245000 ++#define BCHP_DS_A_18_FFT_REG_END 0x0224517c ++#define BCHP_DS_A_18_OI_REG_START 0x02245200 ++#define BCHP_DS_A_18_OI_REG_END 0x0224523c ++#define BCHP_DS_A_18_IRQ_REG_START 0x02245300 ++#define BCHP_DS_A_18_IRQ_REG_END 0x02245314 ++#define BCHP_DS_A_19_ISW_MXR_REG_START 0x02246000 ++#define BCHP_DS_A_19_ISW_MXR_REG_END 0x02246008 ++#define BCHP_DS_A_19_ACI_AGF_REG_START 0x02246200 ++#define BCHP_DS_A_19_ACI_AGF_REG_END 0x0224637c ++#define BCHP_DS_A_19_TRL_REG_START 0x02246400 ++#define BCHP_DS_A_19_TRL_REG_END 0x022466fc ++#define BCHP_DS_A_19_EQ_REG_START 0x02246800 ++#define BCHP_DS_A_19_EQ_REG_END 0x02246bbc ++#define BCHP_DS_A_19_FECF_REG_START 0x02246c00 ++#define BCHP_DS_A_19_FECF_REG_END 0x02246d7c ++#define BCHP_DS_A_19_FECB_REG_START 0x02246e00 ++#define BCHP_DS_A_19_FECB_REG_END 0x02246ebc ++#define BCHP_DS_A_19_FFT_REG_START 0x02247000 ++#define BCHP_DS_A_19_FFT_REG_END 0x0224717c ++#define BCHP_DS_A_19_OI_REG_START 0x02247200 ++#define BCHP_DS_A_19_OI_REG_END 0x0224723c ++#define BCHP_DS_A_19_IRQ_REG_START 0x02247300 ++#define BCHP_DS_A_19_IRQ_REG_END 0x02247314 ++#define BCHP_DS_A_20_ISW_MXR_REG_START 0x02248000 ++#define BCHP_DS_A_20_ISW_MXR_REG_END 0x02248008 ++#define BCHP_DS_A_20_ACI_AGF_REG_START 0x02248200 ++#define BCHP_DS_A_20_ACI_AGF_REG_END 0x0224837c ++#define BCHP_DS_A_20_TRL_REG_START 0x02248400 ++#define BCHP_DS_A_20_TRL_REG_END 0x022486fc ++#define BCHP_DS_A_20_EQ_REG_START 0x02248800 ++#define BCHP_DS_A_20_EQ_REG_END 0x02248bbc ++#define BCHP_DS_A_20_FECF_REG_START 0x02248c00 ++#define BCHP_DS_A_20_FECF_REG_END 0x02248d7c ++#define BCHP_DS_A_20_FECB_REG_START 0x02248e00 ++#define BCHP_DS_A_20_FECB_REG_END 0x02248ebc ++#define BCHP_DS_A_20_FFT_REG_START 0x02249000 ++#define BCHP_DS_A_20_FFT_REG_END 0x0224917c ++#define BCHP_DS_A_20_OI_REG_START 0x02249200 ++#define BCHP_DS_A_20_OI_REG_END 0x0224923c ++#define BCHP_DS_A_20_IRQ_REG_START 0x02249300 ++#define BCHP_DS_A_20_IRQ_REG_END 0x02249314 ++#define BCHP_DS_A_21_ISW_MXR_REG_START 0x0224a000 ++#define BCHP_DS_A_21_ISW_MXR_REG_END 0x0224a008 ++#define BCHP_DS_A_21_ACI_AGF_REG_START 0x0224a200 ++#define BCHP_DS_A_21_ACI_AGF_REG_END 0x0224a37c ++#define BCHP_DS_A_21_TRL_REG_START 0x0224a400 ++#define BCHP_DS_A_21_TRL_REG_END 0x0224a6fc ++#define BCHP_DS_A_21_EQ_REG_START 0x0224a800 ++#define BCHP_DS_A_21_EQ_REG_END 0x0224abbc ++#define BCHP_DS_A_21_FECF_REG_START 0x0224ac00 ++#define BCHP_DS_A_21_FECF_REG_END 0x0224ad7c ++#define BCHP_DS_A_21_FECB_REG_START 0x0224ae00 ++#define BCHP_DS_A_21_FECB_REG_END 0x0224aebc ++#define BCHP_DS_A_21_FFT_REG_START 0x0224b000 ++#define BCHP_DS_A_21_FFT_REG_END 0x0224b17c ++#define BCHP_DS_A_21_OI_REG_START 0x0224b200 ++#define BCHP_DS_A_21_OI_REG_END 0x0224b23c ++#define BCHP_DS_A_21_IRQ_REG_START 0x0224b300 ++#define BCHP_DS_A_21_IRQ_REG_END 0x0224b314 ++#define BCHP_DS_A_22_ISW_MXR_REG_START 0x0224c000 ++#define BCHP_DS_A_22_ISW_MXR_REG_END 0x0224c008 ++#define BCHP_DS_A_22_ACI_AGF_REG_START 0x0224c200 ++#define BCHP_DS_A_22_ACI_AGF_REG_END 0x0224c37c ++#define BCHP_DS_A_22_TRL_REG_START 0x0224c400 ++#define BCHP_DS_A_22_TRL_REG_END 0x0224c6fc ++#define BCHP_DS_A_22_EQ_REG_START 0x0224c800 ++#define BCHP_DS_A_22_EQ_REG_END 0x0224cbbc ++#define BCHP_DS_A_22_FECF_REG_START 0x0224cc00 ++#define BCHP_DS_A_22_FECF_REG_END 0x0224cd7c ++#define BCHP_DS_A_22_FECB_REG_START 0x0224ce00 ++#define BCHP_DS_A_22_FECB_REG_END 0x0224cebc ++#define BCHP_DS_A_22_FFT_REG_START 0x0224d000 ++#define BCHP_DS_A_22_FFT_REG_END 0x0224d17c ++#define BCHP_DS_A_22_OI_REG_START 0x0224d200 ++#define BCHP_DS_A_22_OI_REG_END 0x0224d23c ++#define BCHP_DS_A_22_IRQ_REG_START 0x0224d300 ++#define BCHP_DS_A_22_IRQ_REG_END 0x0224d314 ++#define BCHP_DS_A_23_ISW_MXR_REG_START 0x0224e000 ++#define BCHP_DS_A_23_ISW_MXR_REG_END 0x0224e008 ++#define BCHP_DS_A_23_ACI_AGF_REG_START 0x0224e200 ++#define BCHP_DS_A_23_ACI_AGF_REG_END 0x0224e37c ++#define BCHP_DS_A_23_TRL_REG_START 0x0224e400 ++#define BCHP_DS_A_23_TRL_REG_END 0x0224e6fc ++#define BCHP_DS_A_23_EQ_REG_START 0x0224e800 ++#define BCHP_DS_A_23_EQ_REG_END 0x0224ebbc ++#define BCHP_DS_A_23_FECF_REG_START 0x0224ec00 ++#define BCHP_DS_A_23_FECF_REG_END 0x0224ed7c ++#define BCHP_DS_A_23_FECB_REG_START 0x0224ee00 ++#define BCHP_DS_A_23_FECB_REG_END 0x0224eebc ++#define BCHP_DS_A_23_FFT_REG_START 0x0224f000 ++#define BCHP_DS_A_23_FFT_REG_END 0x0224f17c ++#define BCHP_DS_A_23_OI_REG_START 0x0224f200 ++#define BCHP_DS_A_23_OI_REG_END 0x0224f23c ++#define BCHP_DS_A_23_IRQ_REG_START 0x0224f300 ++#define BCHP_DS_A_23_IRQ_REG_END 0x0224f314 ++#define BCHP_DS_A_24_ISW_MXR_REG_START 0x02250000 ++#define BCHP_DS_A_24_ISW_MXR_REG_END 0x02250008 ++#define BCHP_DS_A_24_ACI_AGF_REG_START 0x02250200 ++#define BCHP_DS_A_24_ACI_AGF_REG_END 0x0225037c ++#define BCHP_DS_A_24_TRL_REG_START 0x02250400 ++#define BCHP_DS_A_24_TRL_REG_END 0x022506fc ++#define BCHP_DS_A_24_EQ_REG_START 0x02250800 ++#define BCHP_DS_A_24_EQ_REG_END 0x02250bbc ++#define BCHP_DS_A_24_FECF_REG_START 0x02250c00 ++#define BCHP_DS_A_24_FECF_REG_END 0x02250d7c ++#define BCHP_DS_A_24_FECB_REG_START 0x02250e00 ++#define BCHP_DS_A_24_FECB_REG_END 0x02250ebc ++#define BCHP_DS_A_24_FFT_REG_START 0x02251000 ++#define BCHP_DS_A_24_FFT_REG_END 0x0225117c ++#define BCHP_DS_A_24_OI_REG_START 0x02251200 ++#define BCHP_DS_A_24_OI_REG_END 0x0225123c ++#define BCHP_DS_A_24_IRQ_REG_START 0x02251300 ++#define BCHP_DS_A_24_IRQ_REG_END 0x02251314 ++#define BCHP_DS_A_25_ISW_MXR_REG_START 0x02252000 ++#define BCHP_DS_A_25_ISW_MXR_REG_END 0x02252008 ++#define BCHP_DS_A_25_ACI_AGF_REG_START 0x02252200 ++#define BCHP_DS_A_25_ACI_AGF_REG_END 0x0225237c ++#define BCHP_DS_A_25_TRL_REG_START 0x02252400 ++#define BCHP_DS_A_25_TRL_REG_END 0x022526fc ++#define BCHP_DS_A_25_EQ_REG_START 0x02252800 ++#define BCHP_DS_A_25_EQ_REG_END 0x02252bbc ++#define BCHP_DS_A_25_FECF_REG_START 0x02252c00 ++#define BCHP_DS_A_25_FECF_REG_END 0x02252d7c ++#define BCHP_DS_A_25_FECB_REG_START 0x02252e00 ++#define BCHP_DS_A_25_FECB_REG_END 0x02252ebc ++#define BCHP_DS_A_25_FFT_REG_START 0x02253000 ++#define BCHP_DS_A_25_FFT_REG_END 0x0225317c ++#define BCHP_DS_A_25_OI_REG_START 0x02253200 ++#define BCHP_DS_A_25_OI_REG_END 0x0225323c ++#define BCHP_DS_A_25_IRQ_REG_START 0x02253300 ++#define BCHP_DS_A_25_IRQ_REG_END 0x02253314 ++#define BCHP_DS_A_26_ISW_MXR_REG_START 0x02254000 ++#define BCHP_DS_A_26_ISW_MXR_REG_END 0x02254008 ++#define BCHP_DS_A_26_ACI_AGF_REG_START 0x02254200 ++#define BCHP_DS_A_26_ACI_AGF_REG_END 0x0225437c ++#define BCHP_DS_A_26_TRL_REG_START 0x02254400 ++#define BCHP_DS_A_26_TRL_REG_END 0x022546fc ++#define BCHP_DS_A_26_EQ_REG_START 0x02254800 ++#define BCHP_DS_A_26_EQ_REG_END 0x02254bbc ++#define BCHP_DS_A_26_FECF_REG_START 0x02254c00 ++#define BCHP_DS_A_26_FECF_REG_END 0x02254d7c ++#define BCHP_DS_A_26_FECB_REG_START 0x02254e00 ++#define BCHP_DS_A_26_FECB_REG_END 0x02254ebc ++#define BCHP_DS_A_26_FFT_REG_START 0x02255000 ++#define BCHP_DS_A_26_FFT_REG_END 0x0225517c ++#define BCHP_DS_A_26_OI_REG_START 0x02255200 ++#define BCHP_DS_A_26_OI_REG_END 0x0225523c ++#define BCHP_DS_A_26_IRQ_REG_START 0x02255300 ++#define BCHP_DS_A_26_IRQ_REG_END 0x02255314 ++#define BCHP_DS_A_27_ISW_MXR_REG_START 0x02256000 ++#define BCHP_DS_A_27_ISW_MXR_REG_END 0x02256008 ++#define BCHP_DS_A_27_ACI_AGF_REG_START 0x02256200 ++#define BCHP_DS_A_27_ACI_AGF_REG_END 0x0225637c ++#define BCHP_DS_A_27_TRL_REG_START 0x02256400 ++#define BCHP_DS_A_27_TRL_REG_END 0x022566fc ++#define BCHP_DS_A_27_EQ_REG_START 0x02256800 ++#define BCHP_DS_A_27_EQ_REG_END 0x02256bbc ++#define BCHP_DS_A_27_FECF_REG_START 0x02256c00 ++#define BCHP_DS_A_27_FECF_REG_END 0x02256d7c ++#define BCHP_DS_A_27_FECB_REG_START 0x02256e00 ++#define BCHP_DS_A_27_FECB_REG_END 0x02256ebc ++#define BCHP_DS_A_27_FFT_REG_START 0x02257000 ++#define BCHP_DS_A_27_FFT_REG_END 0x0225717c ++#define BCHP_DS_A_27_OI_REG_START 0x02257200 ++#define BCHP_DS_A_27_OI_REG_END 0x0225723c ++#define BCHP_DS_A_27_IRQ_REG_START 0x02257300 ++#define BCHP_DS_A_27_IRQ_REG_END 0x02257314 ++#define BCHP_DS_A_28_ISW_MXR_REG_START 0x02258000 ++#define BCHP_DS_A_28_ISW_MXR_REG_END 0x02258008 ++#define BCHP_DS_A_28_ACI_AGF_REG_START 0x02258200 ++#define BCHP_DS_A_28_ACI_AGF_REG_END 0x0225837c ++#define BCHP_DS_A_28_TRL_REG_START 0x02258400 ++#define BCHP_DS_A_28_TRL_REG_END 0x022586fc ++#define BCHP_DS_A_28_EQ_REG_START 0x02258800 ++#define BCHP_DS_A_28_EQ_REG_END 0x02258bbc ++#define BCHP_DS_A_28_FECF_REG_START 0x02258c00 ++#define BCHP_DS_A_28_FECF_REG_END 0x02258d7c ++#define BCHP_DS_A_28_FECB_REG_START 0x02258e00 ++#define BCHP_DS_A_28_FECB_REG_END 0x02258ebc ++#define BCHP_DS_A_28_FFT_REG_START 0x02259000 ++#define BCHP_DS_A_28_FFT_REG_END 0x0225917c ++#define BCHP_DS_A_28_OI_REG_START 0x02259200 ++#define BCHP_DS_A_28_OI_REG_END 0x0225923c ++#define BCHP_DS_A_28_IRQ_REG_START 0x02259300 ++#define BCHP_DS_A_28_IRQ_REG_END 0x02259314 ++#define BCHP_DS_A_29_ISW_MXR_REG_START 0x0225a000 ++#define BCHP_DS_A_29_ISW_MXR_REG_END 0x0225a008 ++#define BCHP_DS_A_29_ACI_AGF_REG_START 0x0225a200 ++#define BCHP_DS_A_29_ACI_AGF_REG_END 0x0225a37c ++#define BCHP_DS_A_29_TRL_REG_START 0x0225a400 ++#define BCHP_DS_A_29_TRL_REG_END 0x0225a6fc ++#define BCHP_DS_A_29_EQ_REG_START 0x0225a800 ++#define BCHP_DS_A_29_EQ_REG_END 0x0225abbc ++#define BCHP_DS_A_29_FECF_REG_START 0x0225ac00 ++#define BCHP_DS_A_29_FECF_REG_END 0x0225ad7c ++#define BCHP_DS_A_29_FECB_REG_START 0x0225ae00 ++#define BCHP_DS_A_29_FECB_REG_END 0x0225aebc ++#define BCHP_DS_A_29_FFT_REG_START 0x0225b000 ++#define BCHP_DS_A_29_FFT_REG_END 0x0225b17c ++#define BCHP_DS_A_29_OI_REG_START 0x0225b200 ++#define BCHP_DS_A_29_OI_REG_END 0x0225b23c ++#define BCHP_DS_A_29_IRQ_REG_START 0x0225b300 ++#define BCHP_DS_A_29_IRQ_REG_END 0x0225b314 ++#define BCHP_DS_A_30_ISW_MXR_REG_START 0x0225c000 ++#define BCHP_DS_A_30_ISW_MXR_REG_END 0x0225c008 ++#define BCHP_DS_A_30_ACI_AGF_REG_START 0x0225c200 ++#define BCHP_DS_A_30_ACI_AGF_REG_END 0x0225c37c ++#define BCHP_DS_A_30_TRL_REG_START 0x0225c400 ++#define BCHP_DS_A_30_TRL_REG_END 0x0225c6fc ++#define BCHP_DS_A_30_EQ_REG_START 0x0225c800 ++#define BCHP_DS_A_30_EQ_REG_END 0x0225cbbc ++#define BCHP_DS_A_30_FECF_REG_START 0x0225cc00 ++#define BCHP_DS_A_30_FECF_REG_END 0x0225cd7c ++#define BCHP_DS_A_30_FECB_REG_START 0x0225ce00 ++#define BCHP_DS_A_30_FECB_REG_END 0x0225cebc ++#define BCHP_DS_A_30_FFT_REG_START 0x0225d000 ++#define BCHP_DS_A_30_FFT_REG_END 0x0225d17c ++#define BCHP_DS_A_30_OI_REG_START 0x0225d200 ++#define BCHP_DS_A_30_OI_REG_END 0x0225d23c ++#define BCHP_DS_A_30_IRQ_REG_START 0x0225d300 ++#define BCHP_DS_A_30_IRQ_REG_END 0x0225d314 ++#define BCHP_DS_A_31_ISW_MXR_REG_START 0x0225e000 ++#define BCHP_DS_A_31_ISW_MXR_REG_END 0x0225e008 ++#define BCHP_DS_A_31_ACI_AGF_REG_START 0x0225e200 ++#define BCHP_DS_A_31_ACI_AGF_REG_END 0x0225e37c ++#define BCHP_DS_A_31_TRL_REG_START 0x0225e400 ++#define BCHP_DS_A_31_TRL_REG_END 0x0225e6fc ++#define BCHP_DS_A_31_EQ_REG_START 0x0225e800 ++#define BCHP_DS_A_31_EQ_REG_END 0x0225ebbc ++#define BCHP_DS_A_31_FECF_REG_START 0x0225ec00 ++#define BCHP_DS_A_31_FECF_REG_END 0x0225ed7c ++#define BCHP_DS_A_31_FECB_REG_START 0x0225ee00 ++#define BCHP_DS_A_31_FECB_REG_END 0x0225eebc ++#define BCHP_DS_A_31_FFT_REG_START 0x0225f000 ++#define BCHP_DS_A_31_FFT_REG_END 0x0225f17c ++#define BCHP_DS_A_31_OI_REG_START 0x0225f200 ++#define BCHP_DS_A_31_OI_REG_END 0x0225f23c ++#define BCHP_DS_A_31_IRQ_REG_START 0x0225f300 ++#define BCHP_DS_A_31_IRQ_REG_END 0x0225f314 ++#define BCHP_DS_A_32_ISW_MXR_REG_START 0x02260000 ++#define BCHP_DS_A_32_ISW_MXR_REG_END 0x02260008 ++#define BCHP_DS_A_32_ACI_AGF_REG_START 0x02260200 ++#define BCHP_DS_A_32_ACI_AGF_REG_END 0x0226037c ++#define BCHP_DS_A_32_TRL_REG_START 0x02260400 ++#define BCHP_DS_A_32_TRL_REG_END 0x022606fc ++#define BCHP_DS_A_32_EQ_REG_START 0x02260800 ++#define BCHP_DS_A_32_EQ_REG_END 0x02260bbc ++#define BCHP_DS_A_32_FECF_REG_START 0x02260c00 ++#define BCHP_DS_A_32_FECF_REG_END 0x02260d7c ++#define BCHP_DS_A_32_FECB_REG_START 0x02260e00 ++#define BCHP_DS_A_32_FECB_REG_END 0x02260ebc ++#define BCHP_DS_A_32_FFT_REG_START 0x02261000 ++#define BCHP_DS_A_32_FFT_REG_END 0x0226117c ++#define BCHP_DS_A_32_OI_REG_START 0x02261200 ++#define BCHP_DS_A_32_OI_REG_END 0x0226123c ++#define BCHP_DS_A_32_IRQ_REG_START 0x02261300 ++#define BCHP_DS_A_32_IRQ_REG_END 0x02261314 ++#define BCHP_CMD_AFEC_GLOBAL_A_REG_START 0x022c0000 ++#define BCHP_CMD_AFEC_GLOBAL_A_REG_END 0x022c0010 ++#define BCHP_CMD_AFEC_A_REG_START 0x022c0100 ++#define BCHP_CMD_AFEC_A_REG_END 0x022c0158 ++#define BCHP_CMD_AFEC_STATS_A_REG_START 0x022c2000 ++#define BCHP_CMD_AFEC_STATS_A_REG_END 0x022c3048 ++#define BCHP_CMD_AFEC_INTR_CTRL2_0_A_REG_START 0x022c4000 ++#define BCHP_CMD_AFEC_INTR_CTRL2_0_A_REG_END 0x022c402c ++#define BCHP_CMD_AFEC_INTR_CTRL2_1_A_REG_START 0x022c4400 ++#define BCHP_CMD_AFEC_INTR_CTRL2_1_A_REG_END 0x022c442c ++#define BCHP_CMD_AFEC_GLOBAL_B_REG_START 0x022d0000 ++#define BCHP_CMD_AFEC_GLOBAL_B_REG_END 0x022d0010 ++#define BCHP_CMD_AFEC_B_REG_START 0x022d0100 ++#define BCHP_CMD_AFEC_B_REG_END 0x022d0158 ++#define BCHP_CMD_AFEC_STATS_B_REG_START 0x022d2000 ++#define BCHP_CMD_AFEC_STATS_B_REG_END 0x022d3048 ++#define BCHP_CMD_AFEC_INTR_CTRL2_0_B_REG_START 0x022d4000 ++#define BCHP_CMD_AFEC_INTR_CTRL2_0_B_REG_END 0x022d402c ++#define BCHP_CMD_AFEC_INTR_CTRL2_1_B_REG_START 0x022d4400 ++#define BCHP_CMD_AFEC_INTR_CTRL2_1_B_REG_END 0x022d442c ++#define BCHP_AIF_WB_CAB_CORE_REG_START 0x022e0000 ++#define BCHP_AIF_WB_CAB_CORE_REG_END 0x022e04e4 ++#define BCHP_AIF_WB_CAB_CORE_INTR2_REG_START 0x022e0800 ++#define BCHP_AIF_WB_CAB_CORE_INTR2_REG_END 0x022e082c ++#define BCHP_AIF_MDAC_CAL_CAB_CORE_REG_START 0x022e1000 ++#define BCHP_AIF_MDAC_CAL_CAB_CORE_REG_END 0x022e1138 ++#define BCHP_AIF_MDAC_CAL_CAB_CORE_INTR2_REG_START 0x022e1800 ++#define BCHP_AIF_MDAC_CAL_CAB_CORE_INTR2_REG_END 0x022e182c ++#define BCHP_AIF_WB_CAB_ANA_REG_START 0x022e2000 ++#define BCHP_AIF_WB_CAB_ANA_REG_END 0x022e20a4 ++#define BCHP_AIF_WB_CAB_DECFILT_REG_START 0x022e3000 ++#define BCHP_AIF_WB_CAB_DECFILT_REG_END 0x022e302c ++#define BCHP_WOD_CPU0_PROG_MEM_A_REG_START 0x02300000 ++#define BCHP_WOD_CPU0_PROG_MEM_A_REG_END 0x02307ffc ++#define BCHP_WOD_CPU0_DATA_MEM_A_REG_START 0x02320000 ++#define BCHP_WOD_CPU0_DATA_MEM_A_REG_END 0x0232affc ++#define BCHP_WOD_CPU0_CORE_REGS_A_REG_START 0x02340000 ++#define BCHP_WOD_CPU0_CORE_REGS_A_REG_END 0x023400fc ++#define BCHP_WOD_CPU0_AUX_REGS_A_REG_START 0x02342000 ++#define BCHP_WOD_CPU0_AUX_REGS_A_REG_END 0x02342a08 ++#define BCHP_WOD_CPU0_CTRL_A_REG_START 0x02344000 ++#define BCHP_WOD_CPU0_CTRL_A_REG_END 0x02344010 ++#define BCHP_WOD_CPU0_L1_A_REG_START 0x02344100 ++#define BCHP_WOD_CPU0_L1_A_REG_END 0x02344118 ++#define BCHP_WOD_INTR_A_REG_START 0x02346000 ++#define BCHP_WOD_INTR_A_REG_END 0x0234602c ++#define BCHP_WOD_INTR2_A_REG_START 0x02346040 ++#define BCHP_WOD_INTR2_A_REG_END 0x0234606c ++#define BCHP_WOD_MEM_CTRL_A_REG_START 0x02350000 ++#define BCHP_WOD_MEM_CTRL_A_REG_END 0x02350040 ++#define BCHP_WOD_MEM_PROC0_A_REG_START 0x02350100 ++#define BCHP_WOD_MEM_PROC0_A_REG_END 0x02350124 ++#define BCHP_WOD_MEM_PROC1_A_REG_START 0x02350140 ++#define BCHP_WOD_MEM_PROC1_A_REG_END 0x02350164 ++#define BCHP_WOD_MEM_PROC2_A_REG_START 0x02350180 ++#define BCHP_WOD_MEM_PROC2_A_REG_END 0x023501a4 ++#define BCHP_WOD_MEM_PROC3_A_REG_START 0x023501c0 ++#define BCHP_WOD_MEM_PROC3_A_REG_END 0x023501e4 ++#define BCHP_WOD_MEM_PROC4_A_REG_START 0x02350200 ++#define BCHP_WOD_MEM_PROC4_A_REG_END 0x02350224 ++#define BCHP_WOD_MEM_PROC5_A_REG_START 0x02350240 ++#define BCHP_WOD_MEM_PROC5_A_REG_END 0x02350264 ++#define BCHP_WOD_MEM_PROC6_A_REG_START 0x02350280 ++#define BCHP_WOD_MEM_PROC6_A_REG_END 0x023502a4 ++#define BCHP_WOD_MEM_PROC7_A_REG_START 0x023502c0 ++#define BCHP_WOD_MEM_PROC7_A_REG_END 0x023502e4 ++#define BCHP_WOD_MEM_PROC8_A_REG_START 0x02350300 ++#define BCHP_WOD_MEM_PROC8_A_REG_END 0x02350324 ++#define BCHP_WOD_MEM_PROC9_A_REG_START 0x02350340 ++#define BCHP_WOD_MEM_PROC9_A_REG_END 0x02350364 ++#define BCHP_WOD_MEM_PROC10_A_REG_START 0x02350380 ++#define BCHP_WOD_MEM_PROC10_A_REG_END 0x023503a4 ++#define BCHP_WOD_MEM_PROC11_A_REG_START 0x023503c0 ++#define BCHP_WOD_MEM_PROC11_A_REG_END 0x023503e4 ++#define BCHP_WOD_MEM_PROC12_A_REG_START 0x02350400 ++#define BCHP_WOD_MEM_PROC12_A_REG_END 0x02350424 ++#define BCHP_WOD_MEM_PROC13_A_REG_START 0x02350440 ++#define BCHP_WOD_MEM_PROC13_A_REG_END 0x02350464 ++#define BCHP_WOD_MEM_PROC14_A_REG_START 0x02350480 ++#define BCHP_WOD_MEM_PROC14_A_REG_END 0x023504a4 ++#define BCHP_WOD_MEM_PROC15_A_REG_START 0x023504c0 ++#define BCHP_WOD_MEM_PROC15_A_REG_END 0x023504e4 ++#define BCHP_WOD_GLB_A_REG_START 0x02350800 ++#define BCHP_WOD_GLB_A_REG_END 0x023508ac ++#define BCHP_WOD_CHAN_FE_A_REG_START 0x02351000 ++#define BCHP_WOD_CHAN_FE_A_REG_END 0x02351114 ++#define BCHP_WOD_OFDM_A_REG_START 0x02352000 ++#define BCHP_WOD_OFDM_A_REG_END 0x02352438 ++#define BCHP_WOD_LOCAL_A_REG_START 0x02353000 ++#define BCHP_WOD_LOCAL_A_REG_END 0x023530dc ++#define BCHP_WOD_INTR_LOC_A_A_REG_START 0x02354000 ++#define BCHP_WOD_INTR_LOC_A_A_REG_END 0x0235402c ++#define BCHP_WOD_INTR_LOC_B_A_REG_START 0x02354040 ++#define BCHP_WOD_INTR_LOC_B_A_REG_END 0x0235406c ++#define BCHP_WOD_INTR_LOC_A2_A_REG_START 0x02354080 ++#define BCHP_WOD_INTR_LOC_A2_A_REG_END 0x023540ac ++#define BCHP_WOD_TABLE_FFT_WIN_TAP_A_REG_START 0x02358000 ++#define BCHP_WOD_TABLE_FFT_WIN_TAP_A_REG_END 0x02358ffc ++#define BCHP_WOD_TABLE_PP_ACQ_MEM_A_REG_START 0x02359000 ++#define BCHP_WOD_TABLE_PP_ACQ_MEM_A_REG_END 0x02359ffc ++#define BCHP_WOD_TABLE_CTYPE_ACTIVE_CARR_A_REG_START 0x0235a000 ++#define BCHP_WOD_TABLE_CTYPE_ACTIVE_CARR_A_REG_END 0x0235a3fc ++#define BCHP_WOD_TABLE_CTYPE_CP_INDEX_A_REG_START 0x0235a400 ++#define BCHP_WOD_TABLE_CTYPE_CP_INDEX_A_REG_END 0x0235a4fc ++#define BCHP_WOD_TABLE_PP_CP_INDEX_A_REG_START 0x0235a500 ++#define BCHP_WOD_TABLE_PP_CP_INDEX_A_REG_END 0x0235a5fc ++#define BCHP_WOD_TABLE_GI_DFT_PHASE_A_REG_START 0x0235a600 ++#define BCHP_WOD_TABLE_GI_DFT_PHASE_A_REG_END 0x0235a69c ++#define BCHP_WOD_TABLE_FAVG_COEF_A_REG_START 0x0235a6c0 ++#define BCHP_WOD_TABLE_FAVG_COEF_A_REG_END 0x0235a6dc ++#define BCHP_WOD_DMEM0_A_REG_START 0x02360000 ++#define BCHP_WOD_DMEM0_A_REG_END 0x02367ffc ++#define BCHP_WOD_DMEM1_A_REG_START 0x02368000 ++#define BCHP_WOD_DMEM1_A_REG_END 0x0236fffc ++#define BCHP_WOD_DMEM2_A_REG_START 0x02370000 ++#define BCHP_WOD_DMEM2_A_REG_END 0x02377ffc ++#define BCHP_WOD_DMEM3_A_REG_START 0x02378000 ++#define BCHP_WOD_DMEM3_A_REG_END 0x0237fffc ++#define BCHP_WOD_CPU0_PROG_MEM_B_REG_START 0x02380000 ++#define BCHP_WOD_CPU0_PROG_MEM_B_REG_END 0x02387ffc ++#define BCHP_WOD_CPU0_DATA_MEM_B_REG_START 0x023a0000 ++#define BCHP_WOD_CPU0_DATA_MEM_B_REG_END 0x023aaffc ++#define BCHP_WOD_CPU0_CORE_REGS_B_REG_START 0x023c0000 ++#define BCHP_WOD_CPU0_CORE_REGS_B_REG_END 0x023c00fc ++#define BCHP_WOD_CPU0_AUX_REGS_B_REG_START 0x023c2000 ++#define BCHP_WOD_CPU0_AUX_REGS_B_REG_END 0x023c2a08 ++#define BCHP_WOD_CPU0_CTRL_B_REG_START 0x023c4000 ++#define BCHP_WOD_CPU0_CTRL_B_REG_END 0x023c4010 ++#define BCHP_WOD_CPU0_L1_B_REG_START 0x023c4100 ++#define BCHP_WOD_CPU0_L1_B_REG_END 0x023c4118 ++#define BCHP_WOD_INTR_B_REG_START 0x023c6000 ++#define BCHP_WOD_INTR_B_REG_END 0x023c602c ++#define BCHP_WOD_INTR2_B_REG_START 0x023c6040 ++#define BCHP_WOD_INTR2_B_REG_END 0x023c606c ++#define BCHP_WOD_MEM_CTRL_B_REG_START 0x023d0000 ++#define BCHP_WOD_MEM_CTRL_B_REG_END 0x023d0040 ++#define BCHP_WOD_MEM_PROC0_B_REG_START 0x023d0100 ++#define BCHP_WOD_MEM_PROC0_B_REG_END 0x023d0124 ++#define BCHP_WOD_MEM_PROC1_B_REG_START 0x023d0140 ++#define BCHP_WOD_MEM_PROC1_B_REG_END 0x023d0164 ++#define BCHP_WOD_MEM_PROC2_B_REG_START 0x023d0180 ++#define BCHP_WOD_MEM_PROC2_B_REG_END 0x023d01a4 ++#define BCHP_WOD_MEM_PROC3_B_REG_START 0x023d01c0 ++#define BCHP_WOD_MEM_PROC3_B_REG_END 0x023d01e4 ++#define BCHP_WOD_MEM_PROC4_B_REG_START 0x023d0200 ++#define BCHP_WOD_MEM_PROC4_B_REG_END 0x023d0224 ++#define BCHP_WOD_MEM_PROC5_B_REG_START 0x023d0240 ++#define BCHP_WOD_MEM_PROC5_B_REG_END 0x023d0264 ++#define BCHP_WOD_MEM_PROC6_B_REG_START 0x023d0280 ++#define BCHP_WOD_MEM_PROC6_B_REG_END 0x023d02a4 ++#define BCHP_WOD_MEM_PROC7_B_REG_START 0x023d02c0 ++#define BCHP_WOD_MEM_PROC7_B_REG_END 0x023d02e4 ++#define BCHP_WOD_MEM_PROC8_B_REG_START 0x023d0300 ++#define BCHP_WOD_MEM_PROC8_B_REG_END 0x023d0324 ++#define BCHP_WOD_MEM_PROC9_B_REG_START 0x023d0340 ++#define BCHP_WOD_MEM_PROC9_B_REG_END 0x023d0364 ++#define BCHP_WOD_MEM_PROC10_B_REG_START 0x023d0380 ++#define BCHP_WOD_MEM_PROC10_B_REG_END 0x023d03a4 ++#define BCHP_WOD_MEM_PROC11_B_REG_START 0x023d03c0 ++#define BCHP_WOD_MEM_PROC11_B_REG_END 0x023d03e4 ++#define BCHP_WOD_MEM_PROC12_B_REG_START 0x023d0400 ++#define BCHP_WOD_MEM_PROC12_B_REG_END 0x023d0424 ++#define BCHP_WOD_MEM_PROC13_B_REG_START 0x023d0440 ++#define BCHP_WOD_MEM_PROC13_B_REG_END 0x023d0464 ++#define BCHP_WOD_MEM_PROC14_B_REG_START 0x023d0480 ++#define BCHP_WOD_MEM_PROC14_B_REG_END 0x023d04a4 ++#define BCHP_WOD_MEM_PROC15_B_REG_START 0x023d04c0 ++#define BCHP_WOD_MEM_PROC15_B_REG_END 0x023d04e4 ++#define BCHP_WOD_GLB_B_REG_START 0x023d0800 ++#define BCHP_WOD_GLB_B_REG_END 0x023d08ac ++#define BCHP_WOD_CHAN_FE_B_REG_START 0x023d1000 ++#define BCHP_WOD_CHAN_FE_B_REG_END 0x023d1114 ++#define BCHP_WOD_OFDM_B_REG_START 0x023d2000 ++#define BCHP_WOD_OFDM_B_REG_END 0x023d2438 ++#define BCHP_WOD_LOCAL_B_REG_START 0x023d3000 ++#define BCHP_WOD_LOCAL_B_REG_END 0x023d30dc ++#define BCHP_WOD_INTR_LOC_A_B_REG_START 0x023d4000 ++#define BCHP_WOD_INTR_LOC_A_B_REG_END 0x023d402c ++#define BCHP_WOD_INTR_LOC_B_B_REG_START 0x023d4040 ++#define BCHP_WOD_INTR_LOC_B_B_REG_END 0x023d406c ++#define BCHP_WOD_INTR_LOC_A2_B_REG_START 0x023d4080 ++#define BCHP_WOD_INTR_LOC_A2_B_REG_END 0x023d40ac ++#define BCHP_WOD_TABLE_FFT_WIN_TAP_B_REG_START 0x023d8000 ++#define BCHP_WOD_TABLE_FFT_WIN_TAP_B_REG_END 0x023d8ffc ++#define BCHP_WOD_TABLE_PP_ACQ_MEM_B_REG_START 0x023d9000 ++#define BCHP_WOD_TABLE_PP_ACQ_MEM_B_REG_END 0x023d9ffc ++#define BCHP_WOD_TABLE_CTYPE_ACTIVE_CARR_B_REG_START 0x023da000 ++#define BCHP_WOD_TABLE_CTYPE_ACTIVE_CARR_B_REG_END 0x023da3fc ++#define BCHP_WOD_TABLE_CTYPE_CP_INDEX_B_REG_START 0x023da400 ++#define BCHP_WOD_TABLE_CTYPE_CP_INDEX_B_REG_END 0x023da4fc ++#define BCHP_WOD_TABLE_PP_CP_INDEX_B_REG_START 0x023da500 ++#define BCHP_WOD_TABLE_PP_CP_INDEX_B_REG_END 0x023da5fc ++#define BCHP_WOD_TABLE_GI_DFT_PHASE_B_REG_START 0x023da600 ++#define BCHP_WOD_TABLE_GI_DFT_PHASE_B_REG_END 0x023da69c ++#define BCHP_WOD_TABLE_FAVG_COEF_B_REG_START 0x023da6c0 ++#define BCHP_WOD_TABLE_FAVG_COEF_B_REG_END 0x023da6dc ++#define BCHP_WOD_DMEM0_B_REG_START 0x023e0000 ++#define BCHP_WOD_DMEM0_B_REG_END 0x023e7ffc ++#define BCHP_WOD_DMEM1_B_REG_START 0x023e8000 ++#define BCHP_WOD_DMEM1_B_REG_END 0x023efffc ++#define BCHP_WOD_DMEM2_B_REG_START 0x023f0000 ++#define BCHP_WOD_DMEM2_B_REG_END 0x023f7ffc ++#define BCHP_WOD_DMEM3_B_REG_START 0x023f8000 ++#define BCHP_WOD_DMEM3_B_REG_END 0x023ffffc ++#define BCHP_BaseReserved_EMC_REG_START 0x03600000 ++#define BCHP_BaseReserved_EMC_REG_END 0x03600000 ++#define BCHP_Control_EMC_REG_START 0x03601000 ++#define BCHP_Control_EMC_REG_END 0x036010fc ++#define BCHP_OutgoingMessageFIFO_EMC_REG_START 0x03601100 ++#define BCHP_OutgoingMessageFIFO_EMC_REG_END 0x0360117c ++#define BCHP_IncomingMessageFIFO_EMC_REG_START 0x03601200 ++#define BCHP_IncomingMessageFIFO_EMC_REG_END 0x0360127c ++#define BCHP_DMA0_EMC_REG_START 0x03601300 ++#define BCHP_DMA0_EMC_REG_END 0x0360131c ++#define BCHP_DMA1_EMC_REG_START 0x03601320 ++#define BCHP_DMA1_EMC_REG_END 0x0360133c ++#define BCHP_DMAHI0_EMC_REG_START 0x03601340 ++#define BCHP_DMAHI0_EMC_REG_END 0x0360134c ++#define BCHP_DMAHI1_EMC_REG_START 0x03601350 ++#define BCHP_DMAHI1_EMC_REG_END 0x0360135c ++#define BCHP_Token_EMC_REG_START 0x03601400 ++#define BCHP_Token_EMC_REG_END 0x03601420 ++#define BCHP_PerfPower_EMC_REG_START 0x03601600 ++#define BCHP_PerfPower_EMC_REG_END 0x03601640 ++#define BCHP_MessageID_EMC_REG_START 0x03601700 ++#define BCHP_MessageID_EMC_REG_END 0x0360177c ++#define BCHP_HWCounters_EMC_REG_START 0x03601900 ++#define BCHP_HWCounters_EMC_REG_END 0x03601944 ++#define BCHP_DQM_0_31_EMC_REG_START 0x03601c00 ++#define BCHP_DQM_0_31_EMC_REG_END 0x03601c48 ++#define BCHP_DQM_32_63_EMC_REG_START 0x03601d00 ++#define BCHP_DQM_32_63_EMC_REG_END 0x03601d48 ++#define BCHP_QUEUE_TIMER_EMC_REG_START 0x03602000 ++#define BCHP_QUEUE_TIMER_EMC_REG_END 0x036021fc ++#define BCHP_QUEUE_STATUS_0_31_EMC_REG_START 0x03602800 ++#define BCHP_QUEUE_STATUS_0_31_EMC_REG_END 0x0360287c ++#define BCHP_QUEUE_STATUS_32_63_EMC_REG_START 0x03602900 ++#define BCHP_QUEUE_STATUS_32_63_EMC_REG_END 0x0360297c ++#define BCHP_QUEUE_MIB_0_31_EMC_REG_START 0x03603000 ++#define BCHP_QUEUE_MIB_0_31_EMC_REG_END 0x0360317c ++#define BCHP_QUEUE_MIB_32_63_EMC_REG_START 0x03603200 ++#define BCHP_QUEUE_MIB_32_63_EMC_REG_END 0x0360337c ++#define BCHP_QUEUE_0_CNTRL_EMC_REG_START 0x03604000 ++#define BCHP_QUEUE_0_CNTRL_EMC_REG_END 0x0360400c ++#define BCHP_QUEUE_1_CNTRL_EMC_REG_START 0x03604010 ++#define BCHP_QUEUE_1_CNTRL_EMC_REG_END 0x0360401c ++#define BCHP_QUEUE_2_CNTRL_EMC_REG_START 0x03604020 ++#define BCHP_QUEUE_2_CNTRL_EMC_REG_END 0x0360402c ++#define BCHP_QUEUE_3_CNTRL_EMC_REG_START 0x03604030 ++#define BCHP_QUEUE_3_CNTRL_EMC_REG_END 0x0360403c ++#define BCHP_QUEUE_4_CNTRL_EMC_REG_START 0x03604040 ++#define BCHP_QUEUE_4_CNTRL_EMC_REG_END 0x0360404c ++#define BCHP_QUEUE_5_CNTRL_EMC_REG_START 0x03604050 ++#define BCHP_QUEUE_5_CNTRL_EMC_REG_END 0x0360405c ++#define BCHP_QUEUE_6_CNTRL_EMC_REG_START 0x03604060 ++#define BCHP_QUEUE_6_CNTRL_EMC_REG_END 0x0360406c ++#define BCHP_QUEUE_7_CNTRL_EMC_REG_START 0x03604070 ++#define BCHP_QUEUE_7_CNTRL_EMC_REG_END 0x0360407c ++#define BCHP_QUEUE_8_CNTRL_EMC_REG_START 0x03604080 ++#define BCHP_QUEUE_8_CNTRL_EMC_REG_END 0x0360408c ++#define BCHP_QUEUE_9_CNTRL_EMC_REG_START 0x03604090 ++#define BCHP_QUEUE_9_CNTRL_EMC_REG_END 0x0360409c ++#define BCHP_QUEUE_10_CNTRL_EMC_REG_START 0x036040a0 ++#define BCHP_QUEUE_10_CNTRL_EMC_REG_END 0x036040ac ++#define BCHP_QUEUE_11_CNTRL_EMC_REG_START 0x036040b0 ++#define BCHP_QUEUE_11_CNTRL_EMC_REG_END 0x036040bc ++#define BCHP_QUEUE_12_CNTRL_EMC_REG_START 0x036040c0 ++#define BCHP_QUEUE_12_CNTRL_EMC_REG_END 0x036040cc ++#define BCHP_QUEUE_13_CNTRL_EMC_REG_START 0x036040d0 ++#define BCHP_QUEUE_13_CNTRL_EMC_REG_END 0x036040dc ++#define BCHP_QUEUE_14_CNTRL_EMC_REG_START 0x036040e0 ++#define BCHP_QUEUE_14_CNTRL_EMC_REG_END 0x036040ec ++#define BCHP_QUEUE_15_CNTRL_EMC_REG_START 0x036040f0 ++#define BCHP_QUEUE_15_CNTRL_EMC_REG_END 0x036040fc ++#define BCHP_QUEUE_16_CNTRL_EMC_REG_START 0x03604100 ++#define BCHP_QUEUE_16_CNTRL_EMC_REG_END 0x0360410c ++#define BCHP_QUEUE_17_CNTRL_EMC_REG_START 0x03604110 ++#define BCHP_QUEUE_17_CNTRL_EMC_REG_END 0x0360411c ++#define BCHP_QUEUE_18_CNTRL_EMC_REG_START 0x03604120 ++#define BCHP_QUEUE_18_CNTRL_EMC_REG_END 0x0360412c ++#define BCHP_QUEUE_19_CNTRL_EMC_REG_START 0x03604130 ++#define BCHP_QUEUE_19_CNTRL_EMC_REG_END 0x0360413c ++#define BCHP_QUEUE_20_CNTRL_EMC_REG_START 0x03604140 ++#define BCHP_QUEUE_20_CNTRL_EMC_REG_END 0x0360414c ++#define BCHP_QUEUE_21_CNTRL_EMC_REG_START 0x03604150 ++#define BCHP_QUEUE_21_CNTRL_EMC_REG_END 0x0360415c ++#define BCHP_QUEUE_22_CNTRL_EMC_REG_START 0x03604160 ++#define BCHP_QUEUE_22_CNTRL_EMC_REG_END 0x0360416c ++#define BCHP_QUEUE_23_CNTRL_EMC_REG_START 0x03604170 ++#define BCHP_QUEUE_23_CNTRL_EMC_REG_END 0x0360417c ++#define BCHP_QUEUE_24_CNTRL_EMC_REG_START 0x03604180 ++#define BCHP_QUEUE_24_CNTRL_EMC_REG_END 0x0360418c ++#define BCHP_QUEUE_25_CNTRL_EMC_REG_START 0x03604190 ++#define BCHP_QUEUE_25_CNTRL_EMC_REG_END 0x0360419c ++#define BCHP_QUEUE_26_CNTRL_EMC_REG_START 0x036041a0 ++#define BCHP_QUEUE_26_CNTRL_EMC_REG_END 0x036041ac ++#define BCHP_QUEUE_27_CNTRL_EMC_REG_START 0x036041b0 ++#define BCHP_QUEUE_27_CNTRL_EMC_REG_END 0x036041bc ++#define BCHP_QUEUE_28_CNTRL_EMC_REG_START 0x036041c0 ++#define BCHP_QUEUE_28_CNTRL_EMC_REG_END 0x036041cc ++#define BCHP_QUEUE_29_CNTRL_EMC_REG_START 0x036041d0 ++#define BCHP_QUEUE_29_CNTRL_EMC_REG_END 0x036041dc ++#define BCHP_QUEUE_30_CNTRL_EMC_REG_START 0x036041e0 ++#define BCHP_QUEUE_30_CNTRL_EMC_REG_END 0x036041ec ++#define BCHP_QUEUE_31_CNTRL_EMC_REG_START 0x036041f0 ++#define BCHP_QUEUE_31_CNTRL_EMC_REG_END 0x036041fc ++#define BCHP_QUEUE_32_CNTRL_EMC_REG_START 0x03604200 ++#define BCHP_QUEUE_32_CNTRL_EMC_REG_END 0x0360420c ++#define BCHP_QUEUE_33_CNTRL_EMC_REG_START 0x03604210 ++#define BCHP_QUEUE_33_CNTRL_EMC_REG_END 0x0360421c ++#define BCHP_QUEUE_34_CNTRL_EMC_REG_START 0x03604220 ++#define BCHP_QUEUE_34_CNTRL_EMC_REG_END 0x0360422c ++#define BCHP_QUEUE_35_CNTRL_EMC_REG_START 0x03604230 ++#define BCHP_QUEUE_35_CNTRL_EMC_REG_END 0x0360423c ++#define BCHP_QUEUE_36_CNTRL_EMC_REG_START 0x03604240 ++#define BCHP_QUEUE_36_CNTRL_EMC_REG_END 0x0360424c ++#define BCHP_QUEUE_37_CNTRL_EMC_REG_START 0x03604250 ++#define BCHP_QUEUE_37_CNTRL_EMC_REG_END 0x0360425c ++#define BCHP_QUEUE_38_CNTRL_EMC_REG_START 0x03604260 ++#define BCHP_QUEUE_38_CNTRL_EMC_REG_END 0x0360426c ++#define BCHP_QUEUE_39_CNTRL_EMC_REG_START 0x03604270 ++#define BCHP_QUEUE_39_CNTRL_EMC_REG_END 0x0360427c ++#define BCHP_QUEUE_40_CNTRL_EMC_REG_START 0x03604280 ++#define BCHP_QUEUE_40_CNTRL_EMC_REG_END 0x0360428c ++#define BCHP_QUEUE_41_CNTRL_EMC_REG_START 0x03604290 ++#define BCHP_QUEUE_41_CNTRL_EMC_REG_END 0x0360429c ++#define BCHP_QUEUE_42_CNTRL_EMC_REG_START 0x036042a0 ++#define BCHP_QUEUE_42_CNTRL_EMC_REG_END 0x036042ac ++#define BCHP_QUEUE_43_CNTRL_EMC_REG_START 0x036042b0 ++#define BCHP_QUEUE_43_CNTRL_EMC_REG_END 0x036042bc ++#define BCHP_QUEUE_44_CNTRL_EMC_REG_START 0x036042c0 ++#define BCHP_QUEUE_44_CNTRL_EMC_REG_END 0x036042cc ++#define BCHP_QUEUE_45_CNTRL_EMC_REG_START 0x036042d0 ++#define BCHP_QUEUE_45_CNTRL_EMC_REG_END 0x036042dc ++#define BCHP_QUEUE_46_CNTRL_EMC_REG_START 0x036042e0 ++#define BCHP_QUEUE_46_CNTRL_EMC_REG_END 0x036042ec ++#define BCHP_QUEUE_47_CNTRL_EMC_REG_START 0x036042f0 ++#define BCHP_QUEUE_47_CNTRL_EMC_REG_END 0x036042fc ++#define BCHP_QUEUE_48_CNTRL_EMC_REG_START 0x03604300 ++#define BCHP_QUEUE_48_CNTRL_EMC_REG_END 0x0360430c ++#define BCHP_QUEUE_49_CNTRL_EMC_REG_START 0x03604310 ++#define BCHP_QUEUE_49_CNTRL_EMC_REG_END 0x0360431c ++#define BCHP_QUEUE_50_CNTRL_EMC_REG_START 0x03604320 ++#define BCHP_QUEUE_50_CNTRL_EMC_REG_END 0x0360432c ++#define BCHP_QUEUE_51_CNTRL_EMC_REG_START 0x03604330 ++#define BCHP_QUEUE_51_CNTRL_EMC_REG_END 0x0360433c ++#define BCHP_QUEUE_52_CNTRL_EMC_REG_START 0x03604340 ++#define BCHP_QUEUE_52_CNTRL_EMC_REG_END 0x0360434c ++#define BCHP_QUEUE_53_CNTRL_EMC_REG_START 0x03604350 ++#define BCHP_QUEUE_53_CNTRL_EMC_REG_END 0x0360435c ++#define BCHP_QUEUE_54_CNTRL_EMC_REG_START 0x03604360 ++#define BCHP_QUEUE_54_CNTRL_EMC_REG_END 0x0360436c ++#define BCHP_QUEUE_55_CNTRL_EMC_REG_START 0x03604370 ++#define BCHP_QUEUE_55_CNTRL_EMC_REG_END 0x0360437c ++#define BCHP_QUEUE_56_CNTRL_EMC_REG_START 0x03604380 ++#define BCHP_QUEUE_56_CNTRL_EMC_REG_END 0x0360438c ++#define BCHP_QUEUE_57_CNTRL_EMC_REG_START 0x03604390 ++#define BCHP_QUEUE_57_CNTRL_EMC_REG_END 0x0360439c ++#define BCHP_QUEUE_58_CNTRL_EMC_REG_START 0x036043a0 ++#define BCHP_QUEUE_58_CNTRL_EMC_REG_END 0x036043ac ++#define BCHP_QUEUE_59_CNTRL_EMC_REG_START 0x036043b0 ++#define BCHP_QUEUE_59_CNTRL_EMC_REG_END 0x036043bc ++#define BCHP_QUEUE_60_CNTRL_EMC_REG_START 0x036043c0 ++#define BCHP_QUEUE_60_CNTRL_EMC_REG_END 0x036043cc ++#define BCHP_QUEUE_61_CNTRL_EMC_REG_START 0x036043d0 ++#define BCHP_QUEUE_61_CNTRL_EMC_REG_END 0x036043dc ++#define BCHP_QUEUE_62_CNTRL_EMC_REG_START 0x036043e0 ++#define BCHP_QUEUE_62_CNTRL_EMC_REG_END 0x036043ec ++#define BCHP_QUEUE_63_CNTRL_EMC_REG_START 0x036043f0 ++#define BCHP_QUEUE_63_CNTRL_EMC_REG_END 0x036043fc ++#define BCHP_QUEUE_0_DATA_EMC_REG_START 0x03605000 ++#define BCHP_QUEUE_0_DATA_EMC_REG_END 0x0360500c ++#define BCHP_QUEUE_1_DATA_EMC_REG_START 0x03605010 ++#define BCHP_QUEUE_1_DATA_EMC_REG_END 0x0360501c ++#define BCHP_QUEUE_2_DATA_EMC_REG_START 0x03605020 ++#define BCHP_QUEUE_2_DATA_EMC_REG_END 0x0360502c ++#define BCHP_QUEUE_3_DATA_EMC_REG_START 0x03605030 ++#define BCHP_QUEUE_3_DATA_EMC_REG_END 0x0360503c ++#define BCHP_QUEUE_4_DATA_EMC_REG_START 0x03605040 ++#define BCHP_QUEUE_4_DATA_EMC_REG_END 0x0360504c ++#define BCHP_QUEUE_5_DATA_EMC_REG_START 0x03605050 ++#define BCHP_QUEUE_5_DATA_EMC_REG_END 0x0360505c ++#define BCHP_QUEUE_6_DATA_EMC_REG_START 0x03605060 ++#define BCHP_QUEUE_6_DATA_EMC_REG_END 0x0360506c ++#define BCHP_QUEUE_7_DATA_EMC_REG_START 0x03605070 ++#define BCHP_QUEUE_7_DATA_EMC_REG_END 0x0360507c ++#define BCHP_QUEUE_8_DATA_EMC_REG_START 0x03605080 ++#define BCHP_QUEUE_8_DATA_EMC_REG_END 0x0360508c ++#define BCHP_QUEUE_9_DATA_EMC_REG_START 0x03605090 ++#define BCHP_QUEUE_9_DATA_EMC_REG_END 0x0360509c ++#define BCHP_QUEUE_10_DATA_EMC_REG_START 0x036050a0 ++#define BCHP_QUEUE_10_DATA_EMC_REG_END 0x036050ac ++#define BCHP_QUEUE_11_DATA_EMC_REG_START 0x036050b0 ++#define BCHP_QUEUE_11_DATA_EMC_REG_END 0x036050bc ++#define BCHP_QUEUE_12_DATA_EMC_REG_START 0x036050c0 ++#define BCHP_QUEUE_12_DATA_EMC_REG_END 0x036050cc ++#define BCHP_QUEUE_13_DATA_EMC_REG_START 0x036050d0 ++#define BCHP_QUEUE_13_DATA_EMC_REG_END 0x036050dc ++#define BCHP_QUEUE_14_DATA_EMC_REG_START 0x036050e0 ++#define BCHP_QUEUE_14_DATA_EMC_REG_END 0x036050ec ++#define BCHP_QUEUE_15_DATA_EMC_REG_START 0x036050f0 ++#define BCHP_QUEUE_15_DATA_EMC_REG_END 0x036050fc ++#define BCHP_QUEUE_16_DATA_EMC_REG_START 0x03605100 ++#define BCHP_QUEUE_16_DATA_EMC_REG_END 0x0360510c ++#define BCHP_QUEUE_17_DATA_EMC_REG_START 0x03605110 ++#define BCHP_QUEUE_17_DATA_EMC_REG_END 0x0360511c ++#define BCHP_QUEUE_18_DATA_EMC_REG_START 0x03605120 ++#define BCHP_QUEUE_18_DATA_EMC_REG_END 0x0360512c ++#define BCHP_QUEUE_19_DATA_EMC_REG_START 0x03605130 ++#define BCHP_QUEUE_19_DATA_EMC_REG_END 0x0360513c ++#define BCHP_QUEUE_20_DATA_EMC_REG_START 0x03605140 ++#define BCHP_QUEUE_20_DATA_EMC_REG_END 0x0360514c ++#define BCHP_QUEUE_21_DATA_EMC_REG_START 0x03605150 ++#define BCHP_QUEUE_21_DATA_EMC_REG_END 0x0360515c ++#define BCHP_QUEUE_22_DATA_EMC_REG_START 0x03605160 ++#define BCHP_QUEUE_22_DATA_EMC_REG_END 0x0360516c ++#define BCHP_QUEUE_23_DATA_EMC_REG_START 0x03605170 ++#define BCHP_QUEUE_23_DATA_EMC_REG_END 0x0360517c ++#define BCHP_QUEUE_24_DATA_EMC_REG_START 0x03605180 ++#define BCHP_QUEUE_24_DATA_EMC_REG_END 0x0360518c ++#define BCHP_QUEUE_25_DATA_EMC_REG_START 0x03605190 ++#define BCHP_QUEUE_25_DATA_EMC_REG_END 0x0360519c ++#define BCHP_QUEUE_26_DATA_EMC_REG_START 0x036051a0 ++#define BCHP_QUEUE_26_DATA_EMC_REG_END 0x036051ac ++#define BCHP_QUEUE_27_DATA_EMC_REG_START 0x036051b0 ++#define BCHP_QUEUE_27_DATA_EMC_REG_END 0x036051bc ++#define BCHP_QUEUE_28_DATA_EMC_REG_START 0x036051c0 ++#define BCHP_QUEUE_28_DATA_EMC_REG_END 0x036051cc ++#define BCHP_QUEUE_29_DATA_EMC_REG_START 0x036051d0 ++#define BCHP_QUEUE_29_DATA_EMC_REG_END 0x036051dc ++#define BCHP_QUEUE_30_DATA_EMC_REG_START 0x036051e0 ++#define BCHP_QUEUE_30_DATA_EMC_REG_END 0x036051ec ++#define BCHP_QUEUE_31_DATA_EMC_REG_START 0x036051f0 ++#define BCHP_QUEUE_31_DATA_EMC_REG_END 0x036051fc ++#define BCHP_QUEUE_32_DATA_EMC_REG_START 0x03605200 ++#define BCHP_QUEUE_32_DATA_EMC_REG_END 0x0360520c ++#define BCHP_QUEUE_33_DATA_EMC_REG_START 0x03605210 ++#define BCHP_QUEUE_33_DATA_EMC_REG_END 0x0360521c ++#define BCHP_QUEUE_34_DATA_EMC_REG_START 0x03605220 ++#define BCHP_QUEUE_34_DATA_EMC_REG_END 0x0360522c ++#define BCHP_QUEUE_35_DATA_EMC_REG_START 0x03605230 ++#define BCHP_QUEUE_35_DATA_EMC_REG_END 0x0360523c ++#define BCHP_QUEUE_36_DATA_EMC_REG_START 0x03605240 ++#define BCHP_QUEUE_36_DATA_EMC_REG_END 0x0360524c ++#define BCHP_QUEUE_37_DATA_EMC_REG_START 0x03605250 ++#define BCHP_QUEUE_37_DATA_EMC_REG_END 0x0360525c ++#define BCHP_QUEUE_38_DATA_EMC_REG_START 0x03605260 ++#define BCHP_QUEUE_38_DATA_EMC_REG_END 0x0360526c ++#define BCHP_QUEUE_39_DATA_EMC_REG_START 0x03605270 ++#define BCHP_QUEUE_39_DATA_EMC_REG_END 0x0360527c ++#define BCHP_QUEUE_40_DATA_EMC_REG_START 0x03605280 ++#define BCHP_QUEUE_40_DATA_EMC_REG_END 0x0360528c ++#define BCHP_QUEUE_41_DATA_EMC_REG_START 0x03605290 ++#define BCHP_QUEUE_41_DATA_EMC_REG_END 0x0360529c ++#define BCHP_QUEUE_42_DATA_EMC_REG_START 0x036052a0 ++#define BCHP_QUEUE_42_DATA_EMC_REG_END 0x036052ac ++#define BCHP_QUEUE_43_DATA_EMC_REG_START 0x036052b0 ++#define BCHP_QUEUE_43_DATA_EMC_REG_END 0x036052bc ++#define BCHP_QUEUE_44_DATA_EMC_REG_START 0x036052c0 ++#define BCHP_QUEUE_44_DATA_EMC_REG_END 0x036052cc ++#define BCHP_QUEUE_45_DATA_EMC_REG_START 0x036052d0 ++#define BCHP_QUEUE_45_DATA_EMC_REG_END 0x036052dc ++#define BCHP_QUEUE_46_DATA_EMC_REG_START 0x036052e0 ++#define BCHP_QUEUE_46_DATA_EMC_REG_END 0x036052ec ++#define BCHP_QUEUE_47_DATA_EMC_REG_START 0x036052f0 ++#define BCHP_QUEUE_47_DATA_EMC_REG_END 0x036052fc ++#define BCHP_QUEUE_48_DATA_EMC_REG_START 0x03605300 ++#define BCHP_QUEUE_48_DATA_EMC_REG_END 0x0360530c ++#define BCHP_QUEUE_49_DATA_EMC_REG_START 0x03605310 ++#define BCHP_QUEUE_49_DATA_EMC_REG_END 0x0360531c ++#define BCHP_QUEUE_50_DATA_EMC_REG_START 0x03605320 ++#define BCHP_QUEUE_50_DATA_EMC_REG_END 0x0360532c ++#define BCHP_QUEUE_51_DATA_EMC_REG_START 0x03605330 ++#define BCHP_QUEUE_51_DATA_EMC_REG_END 0x0360533c ++#define BCHP_QUEUE_52_DATA_EMC_REG_START 0x03605340 ++#define BCHP_QUEUE_52_DATA_EMC_REG_END 0x0360534c ++#define BCHP_QUEUE_53_DATA_EMC_REG_START 0x03605350 ++#define BCHP_QUEUE_53_DATA_EMC_REG_END 0x0360535c ++#define BCHP_QUEUE_54_DATA_EMC_REG_START 0x03605360 ++#define BCHP_QUEUE_54_DATA_EMC_REG_END 0x0360536c ++#define BCHP_QUEUE_55_DATA_EMC_REG_START 0x03605370 ++#define BCHP_QUEUE_55_DATA_EMC_REG_END 0x0360537c ++#define BCHP_QUEUE_56_DATA_EMC_REG_START 0x03605380 ++#define BCHP_QUEUE_56_DATA_EMC_REG_END 0x0360538c ++#define BCHP_QUEUE_57_DATA_EMC_REG_START 0x03605390 ++#define BCHP_QUEUE_57_DATA_EMC_REG_END 0x0360539c ++#define BCHP_QUEUE_58_DATA_EMC_REG_START 0x036053a0 ++#define BCHP_QUEUE_58_DATA_EMC_REG_END 0x036053ac ++#define BCHP_QUEUE_59_DATA_EMC_REG_START 0x036053b0 ++#define BCHP_QUEUE_59_DATA_EMC_REG_END 0x036053bc ++#define BCHP_QUEUE_60_DATA_EMC_REG_START 0x036053c0 ++#define BCHP_QUEUE_60_DATA_EMC_REG_END 0x036053cc ++#define BCHP_QUEUE_61_DATA_EMC_REG_START 0x036053d0 ++#define BCHP_QUEUE_61_DATA_EMC_REG_END 0x036053dc ++#define BCHP_QUEUE_62_DATA_EMC_REG_START 0x036053e0 ++#define BCHP_QUEUE_62_DATA_EMC_REG_END 0x036053ec ++#define BCHP_QUEUE_63_DATA_EMC_REG_START 0x036053f0 ++#define BCHP_QUEUE_63_DATA_EMC_REG_END 0x036053fc ++#define BCHP_OL_DQM_EMC_REG_START 0x03606c00 ++#define BCHP_OL_DQM_EMC_REG_END 0x03606c30 ++#define BCHP_OL_QUEUE_STATUS_EMC_REG_START 0x03607400 ++#define BCHP_OL_QUEUE_STATUS_EMC_REG_END 0x0360747c ++#define BCHP_OL_QUEUE_0_CNTRL_EMC_REG_START 0x03608000 ++#define BCHP_OL_QUEUE_0_CNTRL_EMC_REG_END 0x0360801c ++#define BCHP_OL_QUEUE_1_CNTRL_EMC_REG_START 0x03608020 ++#define BCHP_OL_QUEUE_1_CNTRL_EMC_REG_END 0x0360803c ++#define BCHP_OL_QUEUE_2_CNTRL_EMC_REG_START 0x03608040 ++#define BCHP_OL_QUEUE_2_CNTRL_EMC_REG_END 0x0360805c ++#define BCHP_OL_QUEUE_3_CNTRL_EMC_REG_START 0x03608060 ++#define BCHP_OL_QUEUE_3_CNTRL_EMC_REG_END 0x0360807c ++#define BCHP_OL_QUEUE_4_CNTRL_EMC_REG_START 0x03608080 ++#define BCHP_OL_QUEUE_4_CNTRL_EMC_REG_END 0x0360809c ++#define BCHP_OL_QUEUE_5_CNTRL_EMC_REG_START 0x036080a0 ++#define BCHP_OL_QUEUE_5_CNTRL_EMC_REG_END 0x036080bc ++#define BCHP_OL_QUEUE_6_CNTRL_EMC_REG_START 0x036080c0 ++#define BCHP_OL_QUEUE_6_CNTRL_EMC_REG_END 0x036080dc ++#define BCHP_OL_QUEUE_7_CNTRL_EMC_REG_START 0x036080e0 ++#define BCHP_OL_QUEUE_7_CNTRL_EMC_REG_END 0x036080fc ++#define BCHP_OL_QUEUE_8_CNTRL_EMC_REG_START 0x03608100 ++#define BCHP_OL_QUEUE_8_CNTRL_EMC_REG_END 0x0360811c ++#define BCHP_OL_QUEUE_9_CNTRL_EMC_REG_START 0x03608120 ++#define BCHP_OL_QUEUE_9_CNTRL_EMC_REG_END 0x0360813c ++#define BCHP_OL_QUEUE_10_CNTRL_EMC_REG_START 0x03608140 ++#define BCHP_OL_QUEUE_10_CNTRL_EMC_REG_END 0x0360815c ++#define BCHP_OL_QUEUE_11_CNTRL_EMC_REG_START 0x03608160 ++#define BCHP_OL_QUEUE_11_CNTRL_EMC_REG_END 0x0360817c ++#define BCHP_OL_QUEUE_12_CNTRL_EMC_REG_START 0x03608180 ++#define BCHP_OL_QUEUE_12_CNTRL_EMC_REG_END 0x0360819c ++#define BCHP_OL_QUEUE_13_CNTRL_EMC_REG_START 0x036081a0 ++#define BCHP_OL_QUEUE_13_CNTRL_EMC_REG_END 0x036081bc ++#define BCHP_OL_QUEUE_14_CNTRL_EMC_REG_START 0x036081c0 ++#define BCHP_OL_QUEUE_14_CNTRL_EMC_REG_END 0x036081dc ++#define BCHP_OL_QUEUE_15_CNTRL_EMC_REG_START 0x036081e0 ++#define BCHP_OL_QUEUE_15_CNTRL_EMC_REG_END 0x036081fc ++#define BCHP_OL_QUEUE_16_CNTRL_EMC_REG_START 0x03608200 ++#define BCHP_OL_QUEUE_16_CNTRL_EMC_REG_END 0x0360821c ++#define BCHP_OL_QUEUE_17_CNTRL_EMC_REG_START 0x03608220 ++#define BCHP_OL_QUEUE_17_CNTRL_EMC_REG_END 0x0360823c ++#define BCHP_OL_QUEUE_18_CNTRL_EMC_REG_START 0x03608240 ++#define BCHP_OL_QUEUE_18_CNTRL_EMC_REG_END 0x0360825c ++#define BCHP_OL_QUEUE_19_CNTRL_EMC_REG_START 0x03608260 ++#define BCHP_OL_QUEUE_19_CNTRL_EMC_REG_END 0x0360827c ++#define BCHP_OL_QUEUE_20_CNTRL_EMC_REG_START 0x03608280 ++#define BCHP_OL_QUEUE_20_CNTRL_EMC_REG_END 0x0360829c ++#define BCHP_OL_QUEUE_21_CNTRL_EMC_REG_START 0x036082a0 ++#define BCHP_OL_QUEUE_21_CNTRL_EMC_REG_END 0x036082bc ++#define BCHP_OL_QUEUE_22_CNTRL_EMC_REG_START 0x036082c0 ++#define BCHP_OL_QUEUE_22_CNTRL_EMC_REG_END 0x036082dc ++#define BCHP_OL_QUEUE_23_CNTRL_EMC_REG_START 0x036082e0 ++#define BCHP_OL_QUEUE_23_CNTRL_EMC_REG_END 0x036082fc ++#define BCHP_OL_QUEUE_24_CNTRL_EMC_REG_START 0x03608300 ++#define BCHP_OL_QUEUE_24_CNTRL_EMC_REG_END 0x0360831c ++#define BCHP_OL_QUEUE_25_CNTRL_EMC_REG_START 0x03608320 ++#define BCHP_OL_QUEUE_25_CNTRL_EMC_REG_END 0x0360833c ++#define BCHP_OL_QUEUE_26_CNTRL_EMC_REG_START 0x03608340 ++#define BCHP_OL_QUEUE_26_CNTRL_EMC_REG_END 0x0360835c ++#define BCHP_OL_QUEUE_27_CNTRL_EMC_REG_START 0x03608360 ++#define BCHP_OL_QUEUE_27_CNTRL_EMC_REG_END 0x0360837c ++#define BCHP_OL_QUEUE_28_CNTRL_EMC_REG_START 0x03608380 ++#define BCHP_OL_QUEUE_28_CNTRL_EMC_REG_END 0x0360839c ++#define BCHP_OL_QUEUE_29_CNTRL_EMC_REG_START 0x036083a0 ++#define BCHP_OL_QUEUE_29_CNTRL_EMC_REG_END 0x036083bc ++#define BCHP_OL_QUEUE_30_CNTRL_EMC_REG_START 0x036083c0 ++#define BCHP_OL_QUEUE_30_CNTRL_EMC_REG_END 0x036083dc ++#define BCHP_OL_QUEUE_31_CNTRL_EMC_REG_START 0x036083e0 ++#define BCHP_OL_QUEUE_31_CNTRL_EMC_REG_END 0x036083fc ++#define BCHP_OL_QUEUE_0_DATA_EMC_REG_START 0x03609000 ++#define BCHP_OL_QUEUE_0_DATA_EMC_REG_END 0x0360901c ++#define BCHP_OL_QUEUE_1_DATA_EMC_REG_START 0x03609020 ++#define BCHP_OL_QUEUE_1_DATA_EMC_REG_END 0x0360903c ++#define BCHP_OL_QUEUE_2_DATA_EMC_REG_START 0x03609040 ++#define BCHP_OL_QUEUE_2_DATA_EMC_REG_END 0x0360905c ++#define BCHP_OL_QUEUE_3_DATA_EMC_REG_START 0x03609060 ++#define BCHP_OL_QUEUE_3_DATA_EMC_REG_END 0x0360907c ++#define BCHP_OL_QUEUE_4_DATA_EMC_REG_START 0x03609080 ++#define BCHP_OL_QUEUE_4_DATA_EMC_REG_END 0x0360909c ++#define BCHP_OL_QUEUE_5_DATA_EMC_REG_START 0x036090a0 ++#define BCHP_OL_QUEUE_5_DATA_EMC_REG_END 0x036090bc ++#define BCHP_OL_QUEUE_6_DATA_EMC_REG_START 0x036090c0 ++#define BCHP_OL_QUEUE_6_DATA_EMC_REG_END 0x036090dc ++#define BCHP_OL_QUEUE_7_DATA_EMC_REG_START 0x036090e0 ++#define BCHP_OL_QUEUE_7_DATA_EMC_REG_END 0x036090fc ++#define BCHP_OL_QUEUE_8_DATA_EMC_REG_START 0x03609100 ++#define BCHP_OL_QUEUE_8_DATA_EMC_REG_END 0x0360911c ++#define BCHP_OL_QUEUE_9_DATA_EMC_REG_START 0x03609120 ++#define BCHP_OL_QUEUE_9_DATA_EMC_REG_END 0x0360913c ++#define BCHP_OL_QUEUE_10_DATA_EMC_REG_START 0x03609140 ++#define BCHP_OL_QUEUE_10_DATA_EMC_REG_END 0x0360915c ++#define BCHP_OL_QUEUE_11_DATA_EMC_REG_START 0x03609160 ++#define BCHP_OL_QUEUE_11_DATA_EMC_REG_END 0x0360917c ++#define BCHP_OL_QUEUE_12_DATA_EMC_REG_START 0x03609180 ++#define BCHP_OL_QUEUE_12_DATA_EMC_REG_END 0x0360919c ++#define BCHP_OL_QUEUE_13_DATA_EMC_REG_START 0x036091a0 ++#define BCHP_OL_QUEUE_13_DATA_EMC_REG_END 0x036091bc ++#define BCHP_OL_QUEUE_14_DATA_EMC_REG_START 0x036091c0 ++#define BCHP_OL_QUEUE_14_DATA_EMC_REG_END 0x036091dc ++#define BCHP_OL_QUEUE_15_DATA_EMC_REG_START 0x036091e0 ++#define BCHP_OL_QUEUE_15_DATA_EMC_REG_END 0x036091fc ++#define BCHP_OL_QUEUE_16_DATA_EMC_REG_START 0x03609200 ++#define BCHP_OL_QUEUE_16_DATA_EMC_REG_END 0x0360921c ++#define BCHP_OL_QUEUE_17_DATA_EMC_REG_START 0x03609220 ++#define BCHP_OL_QUEUE_17_DATA_EMC_REG_END 0x0360923c ++#define BCHP_OL_QUEUE_18_DATA_EMC_REG_START 0x03609240 ++#define BCHP_OL_QUEUE_18_DATA_EMC_REG_END 0x0360925c ++#define BCHP_OL_QUEUE_19_DATA_EMC_REG_START 0x03609260 ++#define BCHP_OL_QUEUE_19_DATA_EMC_REG_END 0x0360927c ++#define BCHP_OL_QUEUE_20_DATA_EMC_REG_START 0x03609280 ++#define BCHP_OL_QUEUE_20_DATA_EMC_REG_END 0x0360929c ++#define BCHP_OL_QUEUE_21_DATA_EMC_REG_START 0x036092a0 ++#define BCHP_OL_QUEUE_21_DATA_EMC_REG_END 0x036092bc ++#define BCHP_OL_QUEUE_22_DATA_EMC_REG_START 0x036092c0 ++#define BCHP_OL_QUEUE_22_DATA_EMC_REG_END 0x036092dc ++#define BCHP_OL_QUEUE_23_DATA_EMC_REG_START 0x036092e0 ++#define BCHP_OL_QUEUE_23_DATA_EMC_REG_END 0x036092fc ++#define BCHP_OL_QUEUE_24_DATA_EMC_REG_START 0x03609300 ++#define BCHP_OL_QUEUE_24_DATA_EMC_REG_END 0x0360931c ++#define BCHP_OL_QUEUE_25_DATA_EMC_REG_START 0x03609320 ++#define BCHP_OL_QUEUE_25_DATA_EMC_REG_END 0x0360933c ++#define BCHP_OL_QUEUE_26_DATA_EMC_REG_START 0x03609340 ++#define BCHP_OL_QUEUE_26_DATA_EMC_REG_END 0x0360935c ++#define BCHP_OL_QUEUE_27_DATA_EMC_REG_START 0x03609360 ++#define BCHP_OL_QUEUE_27_DATA_EMC_REG_END 0x0360937c ++#define BCHP_OL_QUEUE_28_DATA_EMC_REG_START 0x03609380 ++#define BCHP_OL_QUEUE_28_DATA_EMC_REG_END 0x0360939c ++#define BCHP_OL_QUEUE_29_DATA_EMC_REG_START 0x036093a0 ++#define BCHP_OL_QUEUE_29_DATA_EMC_REG_END 0x036093bc ++#define BCHP_OL_QUEUE_30_DATA_EMC_REG_START 0x036093c0 ++#define BCHP_OL_QUEUE_30_DATA_EMC_REG_END 0x036093dc ++#define BCHP_OL_QUEUE_31_DATA_EMC_REG_START 0x036093e0 ++#define BCHP_OL_QUEUE_31_DATA_EMC_REG_END 0x036093fc ++#define BCHP_OL_QUEUE_MIB_EMC_REG_START 0x0360a000 ++#define BCHP_OL_QUEUE_MIB_EMC_REG_END 0x0360a17c ++#define BCHP_QueueSharedMem_EMC_REG_START 0x03640000 ++#define BCHP_QueueSharedMem_EMC_REG_END 0x0364bffc ++#define BCHP_PacketSharedMemory_EMC_REG_START 0x03680000 ++#define BCHP_PacketSharedMemory_EMC_REG_END 0x03680ffc ++#define BCHP_CPU_COMM_REGS_CPUC_REG_START 0x03800000 ++#define BCHP_CPU_COMM_REGS_CPUC_REG_END 0x0380007c ++#define BCHP_MBOX_CPUC_REG_START 0x03800080 ++#define BCHP_MBOX_CPUC_REG_END 0x038000fc ++#define BCHP_HW_COUNTER_CPUC_REG_START 0x03800100 ++#define BCHP_HW_COUNTER_CPUC_REG_END 0x03800184 ++#define BCHP_BTM_CPUC_REG_START 0x03800400 ++#define BCHP_BTM_CPUC_REG_END 0x03800440 ++#define BCHP_DQM_MDMA_CPUC_REG_START 0x03800480 ++#define BCHP_DQM_MDMA_CPUC_REG_END 0x0380057c ++#define BCHP_TRACEBUFF_CPUC_REG_START 0x03801000 ++#define BCHP_TRACEBUFF_CPUC_REG_END 0x03801028 ++#define BCHP_Token_CPUC_REG_START 0x03801400 ++#define BCHP_Token_CPUC_REG_END 0x03801420 ++#define BCHP_RNR_WKUP_CPUC_REG_START 0x03801800 ++#define BCHP_RNR_WKUP_CPUC_REG_END 0x03801984 ++#define BCHP_DQM_CPUC_REG_START 0x03801c00 ++#define BCHP_DQM_CPUC_REG_END 0x03801dfc ++#define BCHP_QUEUE_TIMER_CPUC_REG_START 0x03802000 ++#define BCHP_QUEUE_TIMER_CPUC_REG_END 0x038021fc ++#define BCHP_QUEUE_TIMER_96_CPUC_REG_START 0x03802200 ++#define BCHP_QUEUE_TIMER_96_CPUC_REG_END 0x038022fc ++#define BCHP_OL_QUEUE_STATUS_CPUC_REG_START 0x03807400 ++#define BCHP_OL_QUEUE_STATUS_CPUC_REG_END 0x0380747c ++#define BCHP_OL_QUEUE_STATUS_64_CPUC_REG_START 0x03807480 ++#define BCHP_OL_QUEUE_STATUS_64_CPUC_REG_END 0x038074fc ++#define BCHP_OL_QUEUE_STATUS_96_CPUC_REG_START 0x03807500 ++#define BCHP_OL_QUEUE_STATUS_96_CPUC_REG_END 0x0380757c ++#define BCHP_OL_QUEUE_0_CNTRL_CPUC_REG_START 0x03808000 ++#define BCHP_OL_QUEUE_0_CNTRL_CPUC_REG_END 0x0380801c ++#define BCHP_OL_QUEUE_1_CNTRL_CPUC_REG_START 0x03808020 ++#define BCHP_OL_QUEUE_1_CNTRL_CPUC_REG_END 0x0380803c ++#define BCHP_OL_QUEUE_2_CNTRL_CPUC_REG_START 0x03808040 ++#define BCHP_OL_QUEUE_2_CNTRL_CPUC_REG_END 0x0380805c ++#define BCHP_OL_QUEUE_3_CNTRL_CPUC_REG_START 0x03808060 ++#define BCHP_OL_QUEUE_3_CNTRL_CPUC_REG_END 0x0380807c ++#define BCHP_OL_QUEUE_4_CNTRL_CPUC_REG_START 0x03808080 ++#define BCHP_OL_QUEUE_4_CNTRL_CPUC_REG_END 0x0380809c ++#define BCHP_OL_QUEUE_5_CNTRL_CPUC_REG_START 0x038080a0 ++#define BCHP_OL_QUEUE_5_CNTRL_CPUC_REG_END 0x038080bc ++#define BCHP_OL_QUEUE_6_CNTRL_CPUC_REG_START 0x038080c0 ++#define BCHP_OL_QUEUE_6_CNTRL_CPUC_REG_END 0x038080dc ++#define BCHP_OL_QUEUE_7_CNTRL_CPUC_REG_START 0x038080e0 ++#define BCHP_OL_QUEUE_7_CNTRL_CPUC_REG_END 0x038080fc ++#define BCHP_OL_QUEUE_8_CNTRL_CPUC_REG_START 0x03808100 ++#define BCHP_OL_QUEUE_8_CNTRL_CPUC_REG_END 0x0380811c ++#define BCHP_OL_QUEUE_9_CNTRL_CPUC_REG_START 0x03808120 ++#define BCHP_OL_QUEUE_9_CNTRL_CPUC_REG_END 0x0380813c ++#define BCHP_OL_QUEUE_10_CNTRL_CPUC_REG_START 0x03808140 ++#define BCHP_OL_QUEUE_10_CNTRL_CPUC_REG_END 0x0380815c ++#define BCHP_OL_QUEUE_11_CNTRL_CPUC_REG_START 0x03808160 ++#define BCHP_OL_QUEUE_11_CNTRL_CPUC_REG_END 0x0380817c ++#define BCHP_OL_QUEUE_12_CNTRL_CPUC_REG_START 0x03808180 ++#define BCHP_OL_QUEUE_12_CNTRL_CPUC_REG_END 0x0380819c ++#define BCHP_OL_QUEUE_13_CNTRL_CPUC_REG_START 0x038081a0 ++#define BCHP_OL_QUEUE_13_CNTRL_CPUC_REG_END 0x038081bc ++#define BCHP_OL_QUEUE_14_CNTRL_CPUC_REG_START 0x038081c0 ++#define BCHP_OL_QUEUE_14_CNTRL_CPUC_REG_END 0x038081dc ++#define BCHP_OL_QUEUE_15_CNTRL_CPUC_REG_START 0x038081e0 ++#define BCHP_OL_QUEUE_15_CNTRL_CPUC_REG_END 0x038081fc ++#define BCHP_OL_QUEUE_16_CNTRL_CPUC_REG_START 0x03808200 ++#define BCHP_OL_QUEUE_16_CNTRL_CPUC_REG_END 0x0380821c ++#define BCHP_OL_QUEUE_17_CNTRL_CPUC_REG_START 0x03808220 ++#define BCHP_OL_QUEUE_17_CNTRL_CPUC_REG_END 0x0380823c ++#define BCHP_OL_QUEUE_18_CNTRL_CPUC_REG_START 0x03808240 ++#define BCHP_OL_QUEUE_18_CNTRL_CPUC_REG_END 0x0380825c ++#define BCHP_OL_QUEUE_19_CNTRL_CPUC_REG_START 0x03808260 ++#define BCHP_OL_QUEUE_19_CNTRL_CPUC_REG_END 0x0380827c ++#define BCHP_OL_QUEUE_20_CNTRL_CPUC_REG_START 0x03808280 ++#define BCHP_OL_QUEUE_20_CNTRL_CPUC_REG_END 0x0380829c ++#define BCHP_OL_QUEUE_21_CNTRL_CPUC_REG_START 0x038082a0 ++#define BCHP_OL_QUEUE_21_CNTRL_CPUC_REG_END 0x038082bc ++#define BCHP_OL_QUEUE_22_CNTRL_CPUC_REG_START 0x038082c0 ++#define BCHP_OL_QUEUE_22_CNTRL_CPUC_REG_END 0x038082dc ++#define BCHP_OL_QUEUE_23_CNTRL_CPUC_REG_START 0x038082e0 ++#define BCHP_OL_QUEUE_23_CNTRL_CPUC_REG_END 0x038082fc ++#define BCHP_OL_QUEUE_24_CNTRL_CPUC_REG_START 0x03808300 ++#define BCHP_OL_QUEUE_24_CNTRL_CPUC_REG_END 0x0380831c ++#define BCHP_OL_QUEUE_25_CNTRL_CPUC_REG_START 0x03808320 ++#define BCHP_OL_QUEUE_25_CNTRL_CPUC_REG_END 0x0380833c ++#define BCHP_OL_QUEUE_26_CNTRL_CPUC_REG_START 0x03808340 ++#define BCHP_OL_QUEUE_26_CNTRL_CPUC_REG_END 0x0380835c ++#define BCHP_OL_QUEUE_27_CNTRL_CPUC_REG_START 0x03808360 ++#define BCHP_OL_QUEUE_27_CNTRL_CPUC_REG_END 0x0380837c ++#define BCHP_OL_QUEUE_28_CNTRL_CPUC_REG_START 0x03808380 ++#define BCHP_OL_QUEUE_28_CNTRL_CPUC_REG_END 0x0380839c ++#define BCHP_OL_QUEUE_29_CNTRL_CPUC_REG_START 0x038083a0 ++#define BCHP_OL_QUEUE_29_CNTRL_CPUC_REG_END 0x038083bc ++#define BCHP_OL_QUEUE_30_CNTRL_CPUC_REG_START 0x038083c0 ++#define BCHP_OL_QUEUE_30_CNTRL_CPUC_REG_END 0x038083dc ++#define BCHP_OL_QUEUE_31_CNTRL_CPUC_REG_START 0x038083e0 ++#define BCHP_OL_QUEUE_31_CNTRL_CPUC_REG_END 0x038083fc ++#define BCHP_OL_QUEUE_32_CNTRL_CPUC_REG_START 0x03808400 ++#define BCHP_OL_QUEUE_32_CNTRL_CPUC_REG_END 0x0380841c ++#define BCHP_OL_QUEUE_33_CNTRL_CPUC_REG_START 0x03808420 ++#define BCHP_OL_QUEUE_33_CNTRL_CPUC_REG_END 0x0380843c ++#define BCHP_OL_QUEUE_34_CNTRL_CPUC_REG_START 0x03808440 ++#define BCHP_OL_QUEUE_34_CNTRL_CPUC_REG_END 0x0380845c ++#define BCHP_OL_QUEUE_35_CNTRL_CPUC_REG_START 0x03808460 ++#define BCHP_OL_QUEUE_35_CNTRL_CPUC_REG_END 0x0380847c ++#define BCHP_OL_QUEUE_36_CNTRL_CPUC_REG_START 0x03808480 ++#define BCHP_OL_QUEUE_36_CNTRL_CPUC_REG_END 0x0380849c ++#define BCHP_OL_QUEUE_37_CNTRL_CPUC_REG_START 0x038084a0 ++#define BCHP_OL_QUEUE_37_CNTRL_CPUC_REG_END 0x038084bc ++#define BCHP_OL_QUEUE_38_CNTRL_CPUC_REG_START 0x038084c0 ++#define BCHP_OL_QUEUE_38_CNTRL_CPUC_REG_END 0x038084dc ++#define BCHP_OL_QUEUE_39_CNTRL_CPUC_REG_START 0x038084e0 ++#define BCHP_OL_QUEUE_39_CNTRL_CPUC_REG_END 0x038084fc ++#define BCHP_OL_QUEUE_40_CNTRL_CPUC_REG_START 0x03808500 ++#define BCHP_OL_QUEUE_40_CNTRL_CPUC_REG_END 0x0380851c ++#define BCHP_OL_QUEUE_41_CNTRL_CPUC_REG_START 0x03808520 ++#define BCHP_OL_QUEUE_41_CNTRL_CPUC_REG_END 0x0380853c ++#define BCHP_OL_QUEUE_42_CNTRL_CPUC_REG_START 0x03808540 ++#define BCHP_OL_QUEUE_42_CNTRL_CPUC_REG_END 0x0380855c ++#define BCHP_OL_QUEUE_43_CNTRL_CPUC_REG_START 0x03808560 ++#define BCHP_OL_QUEUE_43_CNTRL_CPUC_REG_END 0x0380857c ++#define BCHP_OL_QUEUE_44_CNTRL_CPUC_REG_START 0x03808580 ++#define BCHP_OL_QUEUE_44_CNTRL_CPUC_REG_END 0x0380859c ++#define BCHP_OL_QUEUE_45_CNTRL_CPUC_REG_START 0x038085a0 ++#define BCHP_OL_QUEUE_45_CNTRL_CPUC_REG_END 0x038085bc ++#define BCHP_OL_QUEUE_46_CNTRL_CPUC_REG_START 0x038085c0 ++#define BCHP_OL_QUEUE_46_CNTRL_CPUC_REG_END 0x038085dc ++#define BCHP_OL_QUEUE_47_CNTRL_CPUC_REG_START 0x038085e0 ++#define BCHP_OL_QUEUE_47_CNTRL_CPUC_REG_END 0x038085fc ++#define BCHP_OL_QUEUE_48_CNTRL_CPUC_REG_START 0x03808600 ++#define BCHP_OL_QUEUE_48_CNTRL_CPUC_REG_END 0x0380861c ++#define BCHP_OL_QUEUE_49_CNTRL_CPUC_REG_START 0x03808620 ++#define BCHP_OL_QUEUE_49_CNTRL_CPUC_REG_END 0x0380863c ++#define BCHP_OL_QUEUE_50_CNTRL_CPUC_REG_START 0x03808640 ++#define BCHP_OL_QUEUE_50_CNTRL_CPUC_REG_END 0x0380865c ++#define BCHP_OL_QUEUE_51_CNTRL_CPUC_REG_START 0x03808660 ++#define BCHP_OL_QUEUE_51_CNTRL_CPUC_REG_END 0x0380867c ++#define BCHP_OL_QUEUE_52_CNTRL_CPUC_REG_START 0x03808680 ++#define BCHP_OL_QUEUE_52_CNTRL_CPUC_REG_END 0x0380869c ++#define BCHP_OL_QUEUE_53_CNTRL_CPUC_REG_START 0x038086a0 ++#define BCHP_OL_QUEUE_53_CNTRL_CPUC_REG_END 0x038086bc ++#define BCHP_OL_QUEUE_54_CNTRL_CPUC_REG_START 0x038086c0 ++#define BCHP_OL_QUEUE_54_CNTRL_CPUC_REG_END 0x038086dc ++#define BCHP_OL_QUEUE_55_CNTRL_CPUC_REG_START 0x038086e0 ++#define BCHP_OL_QUEUE_55_CNTRL_CPUC_REG_END 0x038086fc ++#define BCHP_OL_QUEUE_56_CNTRL_CPUC_REG_START 0x03808700 ++#define BCHP_OL_QUEUE_56_CNTRL_CPUC_REG_END 0x0380871c ++#define BCHP_OL_QUEUE_57_CNTRL_CPUC_REG_START 0x03808720 ++#define BCHP_OL_QUEUE_57_CNTRL_CPUC_REG_END 0x0380873c ++#define BCHP_OL_QUEUE_58_CNTRL_CPUC_REG_START 0x03808740 ++#define BCHP_OL_QUEUE_58_CNTRL_CPUC_REG_END 0x0380875c ++#define BCHP_OL_QUEUE_59_CNTRL_CPUC_REG_START 0x03808760 ++#define BCHP_OL_QUEUE_59_CNTRL_CPUC_REG_END 0x0380877c ++#define BCHP_OL_QUEUE_60_CNTRL_CPUC_REG_START 0x03808780 ++#define BCHP_OL_QUEUE_60_CNTRL_CPUC_REG_END 0x0380879c ++#define BCHP_OL_QUEUE_61_CNTRL_CPUC_REG_START 0x038087a0 ++#define BCHP_OL_QUEUE_61_CNTRL_CPUC_REG_END 0x038087bc ++#define BCHP_OL_QUEUE_62_CNTRL_CPUC_REG_START 0x038087c0 ++#define BCHP_OL_QUEUE_62_CNTRL_CPUC_REG_END 0x038087dc ++#define BCHP_OL_QUEUE_63_CNTRL_CPUC_REG_START 0x038087e0 ++#define BCHP_OL_QUEUE_63_CNTRL_CPUC_REG_END 0x038087fc ++#define BCHP_OL_QUEUE_64_CNTRL_CPUC_REG_START 0x03808800 ++#define BCHP_OL_QUEUE_64_CNTRL_CPUC_REG_END 0x0380881c ++#define BCHP_OL_QUEUE_65_CNTRL_CPUC_REG_START 0x03808820 ++#define BCHP_OL_QUEUE_65_CNTRL_CPUC_REG_END 0x0380883c ++#define BCHP_OL_QUEUE_66_CNTRL_CPUC_REG_START 0x03808840 ++#define BCHP_OL_QUEUE_66_CNTRL_CPUC_REG_END 0x0380885c ++#define BCHP_OL_QUEUE_67_CNTRL_CPUC_REG_START 0x03808860 ++#define BCHP_OL_QUEUE_67_CNTRL_CPUC_REG_END 0x0380887c ++#define BCHP_OL_QUEUE_68_CNTRL_CPUC_REG_START 0x03808880 ++#define BCHP_OL_QUEUE_68_CNTRL_CPUC_REG_END 0x0380889c ++#define BCHP_OL_QUEUE_69_CNTRL_CPUC_REG_START 0x038088a0 ++#define BCHP_OL_QUEUE_69_CNTRL_CPUC_REG_END 0x038088bc ++#define BCHP_OL_QUEUE_70_CNTRL_CPUC_REG_START 0x038088c0 ++#define BCHP_OL_QUEUE_70_CNTRL_CPUC_REG_END 0x038088dc ++#define BCHP_OL_QUEUE_71_CNTRL_CPUC_REG_START 0x038088e0 ++#define BCHP_OL_QUEUE_71_CNTRL_CPUC_REG_END 0x038088fc ++#define BCHP_OL_QUEUE_72_CNTRL_CPUC_REG_START 0x03808900 ++#define BCHP_OL_QUEUE_72_CNTRL_CPUC_REG_END 0x0380891c ++#define BCHP_OL_QUEUE_73_CNTRL_CPUC_REG_START 0x03808920 ++#define BCHP_OL_QUEUE_73_CNTRL_CPUC_REG_END 0x0380893c ++#define BCHP_OL_QUEUE_74_CNTRL_CPUC_REG_START 0x03808940 ++#define BCHP_OL_QUEUE_74_CNTRL_CPUC_REG_END 0x0380895c ++#define BCHP_OL_QUEUE_75_CNTRL_CPUC_REG_START 0x03808960 ++#define BCHP_OL_QUEUE_75_CNTRL_CPUC_REG_END 0x0380897c ++#define BCHP_OL_QUEUE_76_CNTRL_CPUC_REG_START 0x03808980 ++#define BCHP_OL_QUEUE_76_CNTRL_CPUC_REG_END 0x0380899c ++#define BCHP_OL_QUEUE_77_CNTRL_CPUC_REG_START 0x038089a0 ++#define BCHP_OL_QUEUE_77_CNTRL_CPUC_REG_END 0x038089bc ++#define BCHP_OL_QUEUE_78_CNTRL_CPUC_REG_START 0x038089c0 ++#define BCHP_OL_QUEUE_78_CNTRL_CPUC_REG_END 0x038089dc ++#define BCHP_OL_QUEUE_79_CNTRL_CPUC_REG_START 0x038089e0 ++#define BCHP_OL_QUEUE_79_CNTRL_CPUC_REG_END 0x038089fc ++#define BCHP_OL_QUEUE_80_CNTRL_CPUC_REG_START 0x03808a00 ++#define BCHP_OL_QUEUE_80_CNTRL_CPUC_REG_END 0x03808a1c ++#define BCHP_OL_QUEUE_81_CNTRL_CPUC_REG_START 0x03808a20 ++#define BCHP_OL_QUEUE_81_CNTRL_CPUC_REG_END 0x03808a3c ++#define BCHP_OL_QUEUE_82_CNTRL_CPUC_REG_START 0x03808a40 ++#define BCHP_OL_QUEUE_82_CNTRL_CPUC_REG_END 0x03808a5c ++#define BCHP_OL_QUEUE_83_CNTRL_CPUC_REG_START 0x03808a60 ++#define BCHP_OL_QUEUE_83_CNTRL_CPUC_REG_END 0x03808a7c ++#define BCHP_OL_QUEUE_84_CNTRL_CPUC_REG_START 0x03808a80 ++#define BCHP_OL_QUEUE_84_CNTRL_CPUC_REG_END 0x03808a9c ++#define BCHP_OL_QUEUE_85_CNTRL_CPUC_REG_START 0x03808aa0 ++#define BCHP_OL_QUEUE_85_CNTRL_CPUC_REG_END 0x03808abc ++#define BCHP_OL_QUEUE_86_CNTRL_CPUC_REG_START 0x03808ac0 ++#define BCHP_OL_QUEUE_86_CNTRL_CPUC_REG_END 0x03808adc ++#define BCHP_OL_QUEUE_87_CNTRL_CPUC_REG_START 0x03808ae0 ++#define BCHP_OL_QUEUE_87_CNTRL_CPUC_REG_END 0x03808afc ++#define BCHP_OL_QUEUE_88_CNTRL_CPUC_REG_START 0x03808b00 ++#define BCHP_OL_QUEUE_88_CNTRL_CPUC_REG_END 0x03808b1c ++#define BCHP_OL_QUEUE_89_CNTRL_CPUC_REG_START 0x03808b20 ++#define BCHP_OL_QUEUE_89_CNTRL_CPUC_REG_END 0x03808b3c ++#define BCHP_OL_QUEUE_90_CNTRL_CPUC_REG_START 0x03808b40 ++#define BCHP_OL_QUEUE_90_CNTRL_CPUC_REG_END 0x03808b5c ++#define BCHP_OL_QUEUE_91_CNTRL_CPUC_REG_START 0x03808b60 ++#define BCHP_OL_QUEUE_91_CNTRL_CPUC_REG_END 0x03808b7c ++#define BCHP_OL_QUEUE_92_CNTRL_CPUC_REG_START 0x03808b80 ++#define BCHP_OL_QUEUE_92_CNTRL_CPUC_REG_END 0x03808b9c ++#define BCHP_OL_QUEUE_93_CNTRL_CPUC_REG_START 0x03808ba0 ++#define BCHP_OL_QUEUE_93_CNTRL_CPUC_REG_END 0x03808bbc ++#define BCHP_OL_QUEUE_94_CNTRL_CPUC_REG_START 0x03808bc0 ++#define BCHP_OL_QUEUE_94_CNTRL_CPUC_REG_END 0x03808bdc ++#define BCHP_OL_QUEUE_95_CNTRL_CPUC_REG_START 0x03808be0 ++#define BCHP_OL_QUEUE_95_CNTRL_CPUC_REG_END 0x03808bfc ++#define BCHP_OL_QUEUE_0_DATA_CPUC_REG_START 0x03809000 ++#define BCHP_OL_QUEUE_0_DATA_CPUC_REG_END 0x0380901c ++#define BCHP_OL_QUEUE_1_DATA_CPUC_REG_START 0x03809020 ++#define BCHP_OL_QUEUE_1_DATA_CPUC_REG_END 0x0380903c ++#define BCHP_OL_QUEUE_2_DATA_CPUC_REG_START 0x03809040 ++#define BCHP_OL_QUEUE_2_DATA_CPUC_REG_END 0x0380905c ++#define BCHP_OL_QUEUE_3_DATA_CPUC_REG_START 0x03809060 ++#define BCHP_OL_QUEUE_3_DATA_CPUC_REG_END 0x0380907c ++#define BCHP_OL_QUEUE_4_DATA_CPUC_REG_START 0x03809080 ++#define BCHP_OL_QUEUE_4_DATA_CPUC_REG_END 0x0380909c ++#define BCHP_OL_QUEUE_5_DATA_CPUC_REG_START 0x038090a0 ++#define BCHP_OL_QUEUE_5_DATA_CPUC_REG_END 0x038090bc ++#define BCHP_OL_QUEUE_6_DATA_CPUC_REG_START 0x038090c0 ++#define BCHP_OL_QUEUE_6_DATA_CPUC_REG_END 0x038090dc ++#define BCHP_OL_QUEUE_7_DATA_CPUC_REG_START 0x038090e0 ++#define BCHP_OL_QUEUE_7_DATA_CPUC_REG_END 0x038090fc ++#define BCHP_OL_QUEUE_8_DATA_CPUC_REG_START 0x03809100 ++#define BCHP_OL_QUEUE_8_DATA_CPUC_REG_END 0x0380911c ++#define BCHP_OL_QUEUE_9_DATA_CPUC_REG_START 0x03809120 ++#define BCHP_OL_QUEUE_9_DATA_CPUC_REG_END 0x0380913c ++#define BCHP_OL_QUEUE_10_DATA_CPUC_REG_START 0x03809140 ++#define BCHP_OL_QUEUE_10_DATA_CPUC_REG_END 0x0380915c ++#define BCHP_OL_QUEUE_11_DATA_CPUC_REG_START 0x03809160 ++#define BCHP_OL_QUEUE_11_DATA_CPUC_REG_END 0x0380917c ++#define BCHP_OL_QUEUE_12_DATA_CPUC_REG_START 0x03809180 ++#define BCHP_OL_QUEUE_12_DATA_CPUC_REG_END 0x0380919c ++#define BCHP_OL_QUEUE_13_DATA_CPUC_REG_START 0x038091a0 ++#define BCHP_OL_QUEUE_13_DATA_CPUC_REG_END 0x038091bc ++#define BCHP_OL_QUEUE_14_DATA_CPUC_REG_START 0x038091c0 ++#define BCHP_OL_QUEUE_14_DATA_CPUC_REG_END 0x038091dc ++#define BCHP_OL_QUEUE_15_DATA_CPUC_REG_START 0x038091e0 ++#define BCHP_OL_QUEUE_15_DATA_CPUC_REG_END 0x038091fc ++#define BCHP_OL_QUEUE_16_DATA_CPUC_REG_START 0x03809200 ++#define BCHP_OL_QUEUE_16_DATA_CPUC_REG_END 0x0380921c ++#define BCHP_OL_QUEUE_17_DATA_CPUC_REG_START 0x03809220 ++#define BCHP_OL_QUEUE_17_DATA_CPUC_REG_END 0x0380923c ++#define BCHP_OL_QUEUE_18_DATA_CPUC_REG_START 0x03809240 ++#define BCHP_OL_QUEUE_18_DATA_CPUC_REG_END 0x0380925c ++#define BCHP_OL_QUEUE_19_DATA_CPUC_REG_START 0x03809260 ++#define BCHP_OL_QUEUE_19_DATA_CPUC_REG_END 0x0380927c ++#define BCHP_OL_QUEUE_20_DATA_CPUC_REG_START 0x03809280 ++#define BCHP_OL_QUEUE_20_DATA_CPUC_REG_END 0x0380929c ++#define BCHP_OL_QUEUE_21_DATA_CPUC_REG_START 0x038092a0 ++#define BCHP_OL_QUEUE_21_DATA_CPUC_REG_END 0x038092bc ++#define BCHP_OL_QUEUE_22_DATA_CPUC_REG_START 0x038092c0 ++#define BCHP_OL_QUEUE_22_DATA_CPUC_REG_END 0x038092dc ++#define BCHP_OL_QUEUE_23_DATA_CPUC_REG_START 0x038092e0 ++#define BCHP_OL_QUEUE_23_DATA_CPUC_REG_END 0x038092fc ++#define BCHP_OL_QUEUE_24_DATA_CPUC_REG_START 0x03809300 ++#define BCHP_OL_QUEUE_24_DATA_CPUC_REG_END 0x0380931c ++#define BCHP_OL_QUEUE_25_DATA_CPUC_REG_START 0x03809320 ++#define BCHP_OL_QUEUE_25_DATA_CPUC_REG_END 0x0380933c ++#define BCHP_OL_QUEUE_26_DATA_CPUC_REG_START 0x03809340 ++#define BCHP_OL_QUEUE_26_DATA_CPUC_REG_END 0x0380935c ++#define BCHP_OL_QUEUE_27_DATA_CPUC_REG_START 0x03809360 ++#define BCHP_OL_QUEUE_27_DATA_CPUC_REG_END 0x0380937c ++#define BCHP_OL_QUEUE_28_DATA_CPUC_REG_START 0x03809380 ++#define BCHP_OL_QUEUE_28_DATA_CPUC_REG_END 0x0380939c ++#define BCHP_OL_QUEUE_29_DATA_CPUC_REG_START 0x038093a0 ++#define BCHP_OL_QUEUE_29_DATA_CPUC_REG_END 0x038093bc ++#define BCHP_OL_QUEUE_30_DATA_CPUC_REG_START 0x038093c0 ++#define BCHP_OL_QUEUE_30_DATA_CPUC_REG_END 0x038093dc ++#define BCHP_OL_QUEUE_31_DATA_CPUC_REG_START 0x038093e0 ++#define BCHP_OL_QUEUE_31_DATA_CPUC_REG_END 0x038093fc ++#define BCHP_OL_QUEUE_32_DATA_CPUC_REG_START 0x03809400 ++#define BCHP_OL_QUEUE_32_DATA_CPUC_REG_END 0x0380941c ++#define BCHP_OL_QUEUE_33_DATA_CPUC_REG_START 0x03809420 ++#define BCHP_OL_QUEUE_33_DATA_CPUC_REG_END 0x0380943c ++#define BCHP_OL_QUEUE_34_DATA_CPUC_REG_START 0x03809440 ++#define BCHP_OL_QUEUE_34_DATA_CPUC_REG_END 0x0380945c ++#define BCHP_OL_QUEUE_35_DATA_CPUC_REG_START 0x03809460 ++#define BCHP_OL_QUEUE_35_DATA_CPUC_REG_END 0x0380947c ++#define BCHP_OL_QUEUE_36_DATA_CPUC_REG_START 0x03809480 ++#define BCHP_OL_QUEUE_36_DATA_CPUC_REG_END 0x0380949c ++#define BCHP_OL_QUEUE_37_DATA_CPUC_REG_START 0x038094a0 ++#define BCHP_OL_QUEUE_37_DATA_CPUC_REG_END 0x038094bc ++#define BCHP_OL_QUEUE_38_DATA_CPUC_REG_START 0x038094c0 ++#define BCHP_OL_QUEUE_38_DATA_CPUC_REG_END 0x038094dc ++#define BCHP_OL_QUEUE_39_DATA_CPUC_REG_START 0x038094e0 ++#define BCHP_OL_QUEUE_39_DATA_CPUC_REG_END 0x038094fc ++#define BCHP_OL_QUEUE_40_DATA_CPUC_REG_START 0x03809500 ++#define BCHP_OL_QUEUE_40_DATA_CPUC_REG_END 0x0380951c ++#define BCHP_OL_QUEUE_41_DATA_CPUC_REG_START 0x03809520 ++#define BCHP_OL_QUEUE_41_DATA_CPUC_REG_END 0x0380953c ++#define BCHP_OL_QUEUE_42_DATA_CPUC_REG_START 0x03809540 ++#define BCHP_OL_QUEUE_42_DATA_CPUC_REG_END 0x0380955c ++#define BCHP_OL_QUEUE_43_DATA_CPUC_REG_START 0x03809560 ++#define BCHP_OL_QUEUE_43_DATA_CPUC_REG_END 0x0380957c ++#define BCHP_OL_QUEUE_44_DATA_CPUC_REG_START 0x03809580 ++#define BCHP_OL_QUEUE_44_DATA_CPUC_REG_END 0x0380959c ++#define BCHP_OL_QUEUE_45_DATA_CPUC_REG_START 0x038095a0 ++#define BCHP_OL_QUEUE_45_DATA_CPUC_REG_END 0x038095bc ++#define BCHP_OL_QUEUE_46_DATA_CPUC_REG_START 0x038095c0 ++#define BCHP_OL_QUEUE_46_DATA_CPUC_REG_END 0x038095dc ++#define BCHP_OL_QUEUE_47_DATA_CPUC_REG_START 0x038095e0 ++#define BCHP_OL_QUEUE_47_DATA_CPUC_REG_END 0x038095fc ++#define BCHP_OL_QUEUE_48_DATA_CPUC_REG_START 0x03809600 ++#define BCHP_OL_QUEUE_48_DATA_CPUC_REG_END 0x0380961c ++#define BCHP_OL_QUEUE_49_DATA_CPUC_REG_START 0x03809620 ++#define BCHP_OL_QUEUE_49_DATA_CPUC_REG_END 0x0380963c ++#define BCHP_OL_QUEUE_50_DATA_CPUC_REG_START 0x03809640 ++#define BCHP_OL_QUEUE_50_DATA_CPUC_REG_END 0x0380965c ++#define BCHP_OL_QUEUE_51_DATA_CPUC_REG_START 0x03809660 ++#define BCHP_OL_QUEUE_51_DATA_CPUC_REG_END 0x0380967c ++#define BCHP_OL_QUEUE_52_DATA_CPUC_REG_START 0x03809680 ++#define BCHP_OL_QUEUE_52_DATA_CPUC_REG_END 0x0380969c ++#define BCHP_OL_QUEUE_53_DATA_CPUC_REG_START 0x038096a0 ++#define BCHP_OL_QUEUE_53_DATA_CPUC_REG_END 0x038096bc ++#define BCHP_OL_QUEUE_54_DATA_CPUC_REG_START 0x038096c0 ++#define BCHP_OL_QUEUE_54_DATA_CPUC_REG_END 0x038096dc ++#define BCHP_OL_QUEUE_55_DATA_CPUC_REG_START 0x038096e0 ++#define BCHP_OL_QUEUE_55_DATA_CPUC_REG_END 0x038096fc ++#define BCHP_OL_QUEUE_56_DATA_CPUC_REG_START 0x03809700 ++#define BCHP_OL_QUEUE_56_DATA_CPUC_REG_END 0x0380971c ++#define BCHP_OL_QUEUE_57_DATA_CPUC_REG_START 0x03809720 ++#define BCHP_OL_QUEUE_57_DATA_CPUC_REG_END 0x0380973c ++#define BCHP_OL_QUEUE_58_DATA_CPUC_REG_START 0x03809740 ++#define BCHP_OL_QUEUE_58_DATA_CPUC_REG_END 0x0380975c ++#define BCHP_OL_QUEUE_59_DATA_CPUC_REG_START 0x03809760 ++#define BCHP_OL_QUEUE_59_DATA_CPUC_REG_END 0x0380977c ++#define BCHP_OL_QUEUE_60_DATA_CPUC_REG_START 0x03809780 ++#define BCHP_OL_QUEUE_60_DATA_CPUC_REG_END 0x0380979c ++#define BCHP_OL_QUEUE_61_DATA_CPUC_REG_START 0x038097a0 ++#define BCHP_OL_QUEUE_61_DATA_CPUC_REG_END 0x038097bc ++#define BCHP_OL_QUEUE_62_DATA_CPUC_REG_START 0x038097c0 ++#define BCHP_OL_QUEUE_62_DATA_CPUC_REG_END 0x038097dc ++#define BCHP_OL_QUEUE_63_DATA_CPUC_REG_START 0x038097e0 ++#define BCHP_OL_QUEUE_63_DATA_CPUC_REG_END 0x038097fc ++#define BCHP_OL_QUEUE_64_DATA_CPUC_REG_START 0x03809800 ++#define BCHP_OL_QUEUE_64_DATA_CPUC_REG_END 0x0380981c ++#define BCHP_OL_QUEUE_65_DATA_CPUC_REG_START 0x03809820 ++#define BCHP_OL_QUEUE_65_DATA_CPUC_REG_END 0x0380983c ++#define BCHP_OL_QUEUE_66_DATA_CPUC_REG_START 0x03809840 ++#define BCHP_OL_QUEUE_66_DATA_CPUC_REG_END 0x0380985c ++#define BCHP_OL_QUEUE_67_DATA_CPUC_REG_START 0x03809860 ++#define BCHP_OL_QUEUE_67_DATA_CPUC_REG_END 0x0380987c ++#define BCHP_OL_QUEUE_68_DATA_CPUC_REG_START 0x03809880 ++#define BCHP_OL_QUEUE_68_DATA_CPUC_REG_END 0x0380989c ++#define BCHP_OL_QUEUE_69_DATA_CPUC_REG_START 0x038098a0 ++#define BCHP_OL_QUEUE_69_DATA_CPUC_REG_END 0x038098bc ++#define BCHP_OL_QUEUE_70_DATA_CPUC_REG_START 0x038098c0 ++#define BCHP_OL_QUEUE_70_DATA_CPUC_REG_END 0x038098dc ++#define BCHP_OL_QUEUE_71_DATA_CPUC_REG_START 0x038098e0 ++#define BCHP_OL_QUEUE_71_DATA_CPUC_REG_END 0x038098fc ++#define BCHP_OL_QUEUE_72_DATA_CPUC_REG_START 0x03809900 ++#define BCHP_OL_QUEUE_72_DATA_CPUC_REG_END 0x0380991c ++#define BCHP_OL_QUEUE_73_DATA_CPUC_REG_START 0x03809920 ++#define BCHP_OL_QUEUE_73_DATA_CPUC_REG_END 0x0380993c ++#define BCHP_OL_QUEUE_74_DATA_CPUC_REG_START 0x03809940 ++#define BCHP_OL_QUEUE_74_DATA_CPUC_REG_END 0x0380995c ++#define BCHP_OL_QUEUE_75_DATA_CPUC_REG_START 0x03809960 ++#define BCHP_OL_QUEUE_75_DATA_CPUC_REG_END 0x0380997c ++#define BCHP_OL_QUEUE_76_DATA_CPUC_REG_START 0x03809980 ++#define BCHP_OL_QUEUE_76_DATA_CPUC_REG_END 0x0380999c ++#define BCHP_OL_QUEUE_77_DATA_CPUC_REG_START 0x038099a0 ++#define BCHP_OL_QUEUE_77_DATA_CPUC_REG_END 0x038099bc ++#define BCHP_OL_QUEUE_78_DATA_CPUC_REG_START 0x038099c0 ++#define BCHP_OL_QUEUE_78_DATA_CPUC_REG_END 0x038099dc ++#define BCHP_OL_QUEUE_79_DATA_CPUC_REG_START 0x038099e0 ++#define BCHP_OL_QUEUE_79_DATA_CPUC_REG_END 0x038099fc ++#define BCHP_OL_QUEUE_80_DATA_CPUC_REG_START 0x03809a00 ++#define BCHP_OL_QUEUE_80_DATA_CPUC_REG_END 0x03809a1c ++#define BCHP_OL_QUEUE_81_DATA_CPUC_REG_START 0x03809a20 ++#define BCHP_OL_QUEUE_81_DATA_CPUC_REG_END 0x03809a3c ++#define BCHP_OL_QUEUE_82_DATA_CPUC_REG_START 0x03809a40 ++#define BCHP_OL_QUEUE_82_DATA_CPUC_REG_END 0x03809a5c ++#define BCHP_OL_QUEUE_83_DATA_CPUC_REG_START 0x03809a60 ++#define BCHP_OL_QUEUE_83_DATA_CPUC_REG_END 0x03809a7c ++#define BCHP_OL_QUEUE_84_DATA_CPUC_REG_START 0x03809a80 ++#define BCHP_OL_QUEUE_84_DATA_CPUC_REG_END 0x03809a9c ++#define BCHP_OL_QUEUE_85_DATA_CPUC_REG_START 0x03809aa0 ++#define BCHP_OL_QUEUE_85_DATA_CPUC_REG_END 0x03809abc ++#define BCHP_OL_QUEUE_86_DATA_CPUC_REG_START 0x03809ac0 ++#define BCHP_OL_QUEUE_86_DATA_CPUC_REG_END 0x03809adc ++#define BCHP_OL_QUEUE_87_DATA_CPUC_REG_START 0x03809ae0 ++#define BCHP_OL_QUEUE_87_DATA_CPUC_REG_END 0x03809afc ++#define BCHP_OL_QUEUE_88_DATA_CPUC_REG_START 0x03809b00 ++#define BCHP_OL_QUEUE_88_DATA_CPUC_REG_END 0x03809b1c ++#define BCHP_OL_QUEUE_89_DATA_CPUC_REG_START 0x03809b20 ++#define BCHP_OL_QUEUE_89_DATA_CPUC_REG_END 0x03809b3c ++#define BCHP_OL_QUEUE_90_DATA_CPUC_REG_START 0x03809b40 ++#define BCHP_OL_QUEUE_90_DATA_CPUC_REG_END 0x03809b5c ++#define BCHP_OL_QUEUE_91_DATA_CPUC_REG_START 0x03809b60 ++#define BCHP_OL_QUEUE_91_DATA_CPUC_REG_END 0x03809b7c ++#define BCHP_OL_QUEUE_92_DATA_CPUC_REG_START 0x03809b80 ++#define BCHP_OL_QUEUE_92_DATA_CPUC_REG_END 0x03809b9c ++#define BCHP_OL_QUEUE_93_DATA_CPUC_REG_START 0x03809ba0 ++#define BCHP_OL_QUEUE_93_DATA_CPUC_REG_END 0x03809bbc ++#define BCHP_OL_QUEUE_94_DATA_CPUC_REG_START 0x03809bc0 ++#define BCHP_OL_QUEUE_94_DATA_CPUC_REG_END 0x03809bdc ++#define BCHP_OL_QUEUE_95_DATA_CPUC_REG_START 0x03809be0 ++#define BCHP_OL_QUEUE_95_DATA_CPUC_REG_END 0x03809bfc ++#define BCHP_OL_QUEUE_MIB_CPUC_REG_START 0x0380a000 ++#define BCHP_OL_QUEUE_MIB_CPUC_REG_END 0x0380a17c ++#define BCHP_OL_QUEUE_MIB_64_CPUC_REG_START 0x0380a200 ++#define BCHP_OL_QUEUE_MIB_64_CPUC_REG_END 0x0380a37c ++#define BCHP_OL_QUEUE_MIB_96_CPUC_REG_START 0x0380a400 ++#define BCHP_OL_QUEUE_MIB_96_CPUC_REG_END 0x0380a57c ++#define BCHP_QueueSharedMem_CPUC_REG_START 0x03840000 ++#define BCHP_QueueSharedMem_CPUC_REG_END 0x0384bffc ++#define BCHP_CM_TOP_CTRL_REG_START 0x03880000 ++#define BCHP_CM_TOP_CTRL_REG_END 0x03880370 ++#define BCHP_RG_TOP_CTRL_REG_START 0x03881000 ++#define BCHP_RG_TOP_CTRL_REG_END 0x0388104c ++#define BCHP_UART_REG_START 0x03881800 ++#define BCHP_UART_REG_END 0x0388181c ++#define BCHP_CM_AON_CTRL_REG_START 0x03882000 ++#define BCHP_CM_AON_CTRL_REG_END 0x03882008 ++#define BCHP_PROD_OTP_GRB_UB_REG_START 0x03890000 ++#define BCHP_PROD_OTP_GRB_UB_REG_END 0x0389000c ++#define BCHP_JTAG_OTP_UB_REG_START 0x03890100 ++#define BCHP_JTAG_OTP_UB_REG_END 0x0389015c ++#define BCHP_RF4CE_CPU_PROG0_MEM_UB_REG_START 0x03900000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_UB_REG_END 0x0391fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_UB_REG_START 0x03920000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_UB_REG_END 0x0393fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_UB_REG_START 0x03940000 ++#define BCHP_RF4CE_CPU_DATA_MEM_UB_REG_END 0x03947ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_UB_REG_START 0x03950000 ++#define BCHP_RF4CE_CPU_CORE_REGS_UB_REG_END 0x039500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_UB_REG_START 0x03951000 ++#define BCHP_RF4CE_CPU_AUX_REGS_UB_REG_END 0x03951a08 ++#define BCHP_RF4CE_CPU_UART_UB_REG_START 0x03952000 ++#define BCHP_RF4CE_CPU_UART_UB_REG_END 0x03952ffc ++#define BCHP_RF4CE_CPU_WDG_UB_REG_START 0x03953000 ++#define BCHP_RF4CE_CPU_WDG_UB_REG_END 0x03953ffc ++#define BCHP_RF4CE_CPU_CTRL_UB_REG_START 0x03980000 ++#define BCHP_RF4CE_CPU_CTRL_UB_REG_END 0x0398008c ++#define BCHP_RF4CE_CPU_L2_UB_REG_START 0x03980300 ++#define BCHP_RF4CE_CPU_L2_UB_REG_END 0x03980314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_UB_REG_START 0x03980500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_UB_REG_END 0x0398052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_UB_REG_START 0x03980800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_UB_REG_END 0x0398082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_UB_REG_START 0x03980a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_UB_REG_END 0x03980a2c ++#define BCHP_TX_UB_REG_START 0x039c0000 ++#define BCHP_TX_UB_REG_END 0x039c0020 ++#define BCHP_RX_UB_REG_START 0x039d0000 ++#define BCHP_RX_UB_REG_END 0x039d0254 ++#define BCHP_RF_UB_REG_START 0x039e0000 ++#define BCHP_RF_UB_REG_END 0x039e00a4 ++#define BCHP_VCOCAL_UB_REG_START 0x039e0100 ++#define BCHP_VCOCAL_UB_REG_END 0x039e0174 ++#define BCHP_KVCO_UB_REG_START 0x039e0200 ++#define BCHP_KVCO_UB_REG_END 0x039e0224 ++#define BCHP_PA_UB_REG_START 0x039e0300 ++#define BCHP_PA_UB_REG_END 0x039e0314 ++#define BCHP_MAC_UB_REG_START 0x039e0400 ++#define BCHP_MAC_UB_REG_END 0x039e0564 ++#define BCHP_PWR_MGT_L2_UB_REG_START 0x039e0600 ++#define BCHP_PWR_MGT_L2_UB_REG_END 0x039e0614 ++#define BCHP_MISC_L2_UB_REG_START 0x039e0700 ++#define BCHP_MISC_L2_UB_REG_END 0x039e0714 ++#define BCHP_IQCAL_CCA_CCM_L2_UB_REG_START 0x039e0800 ++#define BCHP_IQCAL_CCA_CCM_L2_UB_REG_END 0x039e0814 ++#define BCHP_SYMCNT6_L2_UB_REG_START 0x039e0900 ++#define BCHP_SYMCNT6_L2_UB_REG_END 0x039e0914 ++#define BCHP_TX_DONE_L2_UB_REG_START 0x039e0a00 ++#define BCHP_TX_DONE_L2_UB_REG_END 0x039e0a14 ++#define BCHP_RX_DONE_L2_UB_REG_START 0x039e0b00 ++#define BCHP_RX_DONE_L2_UB_REG_END 0x039e0b14 ++#define BCHP_RX_START_L2_UB_REG_START 0x039e0c00 ++#define BCHP_RX_START_L2_UB_REG_END 0x039e0c14 ++#define BCHP_SYMCNT7_L2_UB_REG_START 0x039e0d00 ++#define BCHP_SYMCNT7_L2_UB_REG_END 0x039e0d14 ++#define BCHP_GCI_0_UB_REG_START 0x039e1000 ++#define BCHP_GCI_0_UB_REG_END 0x039e120c ++#define BCHP_GCI_1_UB_REG_START 0x039e1400 ++#define BCHP_GCI_1_UB_REG_END 0x039e1604 ++#define BCHP_GCI_2_UB_REG_START 0x039e1800 ++#define BCHP_GCI_2_UB_REG_END 0x039e1a04 ++#define BCHP_FPM_CTRL_FPM_REG_START 0x03a00000 ++#define BCHP_FPM_CTRL_FPM_REG_END 0x03a0014c ++#define BCHP_FPM_POOL_FPM_REG_START 0x03a00200 ++#define BCHP_FPM_POOL_FPM_REG_END 0x03a00224 ++#define BCHP_FPM_POOL_0_FPM_REG_START 0x03a00400 ++#define BCHP_FPM_POOL_0_FPM_REG_END 0x03a00424 ++#define BCHP_FPM_POOL_1_FPM_REG_START 0x03a00600 ++#define BCHP_FPM_POOL_1_FPM_REG_END 0x03a00624 ++#define BCHP_FPM_SEARCH_0_FPM_REG_START 0x03a04000 ++#define BCHP_FPM_SEARCH_0_FPM_REG_END 0x03a048b8 ++#define BCHP_FPM_SEARCH_1_FPM_REG_START 0x03a05000 ++#define BCHP_FPM_SEARCH_1_FPM_REG_END 0x03a058b8 ++#define BCHP_FPM_MULTI_0_FPM_REG_START 0x03a10000 ++#define BCHP_FPM_MULTI_0_FPM_REG_END 0x03a13ff8 ++#define BCHP_FPM_MULTI_1_FPM_REG_START 0x03a20000 ++#define BCHP_FPM_MULTI_1_FPM_REG_END 0x03a23ff8 ++#define BCHP_REGS_FPM_REG_START 0x03a30000 ++#define BCHP_REGS_FPM_REG_END 0x03a30130 ++#define BCHP_GenInt_PER_REG_START 0x03c00000 ++#define BCHP_GenInt_PER_REG_END 0x03c00048 ++#define BCHP_IntSet0_PER_REG_START 0x03c00100 ++#define BCHP_IntSet0_PER_REG_END 0x03c0018c ++#define BCHP_IntSet1_PER_REG_START 0x03c00200 ++#define BCHP_IntSet1_PER_REG_END 0x03c0028c ++#define BCHP_IntSet2_PER_REG_START 0x03c00300 ++#define BCHP_IntSet2_PER_REG_END 0x03c0038c ++#define BCHP_PERIPH_TIMER_PER_REG_START 0x03c00400 ++#define BCHP_PERIPH_TIMER_PER_REG_END 0x03c00438 ++#define BCHP_GPIO_PER_REG_START 0x03c00500 ++#define BCHP_GPIO_PER_REG_END 0x03c00578 ++#define BCHP_BROM_GEN_PER_REG_START 0x03c00600 ++#define BCHP_BROM_GEN_PER_REG_END 0x03c00608 ++#define BCHP_BROM_SEC1_PER_REG_START 0x03c00620 ++#define BCHP_BROM_SEC1_PER_REG_END 0x03c00630 ++#define BCHP_UART0_PER_REG_START 0x03c00640 ++#define BCHP_UART0_PER_REG_END 0x03c00654 ++#define BCHP_UART1_PER_REG_START 0x03c00660 ++#define BCHP_UART1_PER_REG_END 0x03c00674 ++#define BCHP_I2C_DUAL_CORE1_PER_REG_START 0x03c00700 ++#define BCHP_I2C_DUAL_CORE1_PER_REG_END 0x03c00754 ++#define BCHP_I2C_DUAL_CORE2_PER_REG_START 0x03c00780 ++#define BCHP_I2C_DUAL_CORE2_PER_REG_END 0x03c007d4 ++#define BCHP_LED_PER_REG_START 0x03c009c0 ++#define BCHP_LED_PER_REG_END 0x03c009ec ++#define BCHP_DIAG_MEM_TOP_PER_REG_START 0x03c00a00 ++#define BCHP_DIAG_MEM_TOP_PER_REG_END 0x03c00b00 ++#define BCHP_GLOBALCNTRL_PER_REG_START 0x03c01000 ++#define BCHP_GLOBALCNTRL_PER_REG_END 0x03c01018 ++#define BCHP_PINGPONG_0_PER_REG_START 0x03c01080 ++#define BCHP_PINGPONG_0_PER_REG_END 0x03c010bc ++#define BCHP_PINGPONG_1_PER_REG_START 0x03c010c0 ++#define BCHP_PINGPONG_1_PER_REG_END 0x03c010fc ++#define BCHP_PROFILE_0_PER_REG_START 0x03c01100 ++#define BCHP_PROFILE_0_PER_REG_END 0x03c0111c ++#define BCHP_PROFILE_1_PER_REG_START 0x03c01120 ++#define BCHP_PROFILE_1_PER_REG_END 0x03c0113c ++#define BCHP_PROFILE_2_PER_REG_START 0x03c01140 ++#define BCHP_PROFILE_2_PER_REG_END 0x03c0115c ++#define BCHP_PROFILE_3_PER_REG_START 0x03c01160 ++#define BCHP_PROFILE_3_PER_REG_END 0x03c0117c ++#define BCHP_PROFILE_4_PER_REG_START 0x03c01180 ++#define BCHP_PROFILE_4_PER_REG_END 0x03c0119c ++#define BCHP_PROFILE_5_PER_REG_START 0x03c011a0 ++#define BCHP_PROFILE_5_PER_REG_END 0x03c011bc ++#define BCHP_PROFILE_6_PER_REG_START 0x03c011c0 ++#define BCHP_PROFILE_6_PER_REG_END 0x03c011dc ++#define BCHP_PROFILE_7_PER_REG_START 0x03c011e0 ++#define BCHP_PROFILE_7_PER_REG_END 0x03c011fc ++#define BCHP_FIFO_0_PER_REG_START 0x03c01200 ++#define BCHP_FIFO_0_PER_REG_END 0x03c013ff ++#define BCHP_FIFO_1_PER_REG_START 0x03c01400 ++#define BCHP_FIFO_1_PER_REG_END 0x03c015ff ++#define BCHP_PERIPH_MISC_PER_REG_START 0x03c02600 ++#define BCHP_PERIPH_MISC_PER_REG_END 0x03c026d0 ++#define BCHP_PMB_MASTER_PER_REG_START 0x03c03000 ++#define BCHP_PMB_MASTER_PER_REG_END 0x03c0300c ++#define BCHP_DTP_CFGCTL_PER_REG_START 0x03c03100 ++#define BCHP_DTP_CFGCTL_PER_REG_END 0x03c0310c ++#define BCHP_DTP_RESERVED_PER_REG_START 0x03c03110 ++#define BCHP_DTP_RESERVED_PER_REG_END 0x03c0311c ++#define BCHP_DTP_SOFTRESET_PER_REG_START 0x03c03120 ++#define BCHP_DTP_SOFTRESET_PER_REG_END 0x03c03120 ++#define BCHP_DTP_ZONE0_PER_REG_START 0x03c03140 ++#define BCHP_DTP_ZONE0_PER_REG_END 0x03c0314c ++#define BCHP_DTP_ZONE1_PER_REG_START 0x03c03150 ++#define BCHP_DTP_ZONE1_PER_REG_END 0x03c0315c ++#define BCHP_DTP_ZONE2_PER_REG_START 0x03c03160 ++#define BCHP_DTP_ZONE2_PER_REG_END 0x03c0316c ++#define BCHP_DFAP_CFGCTL_PER_REG_START 0x03c07100 ++#define BCHP_DFAP_CFGCTL_PER_REG_END 0x03c0710c ++#define BCHP_DFAP_RESERVED_PER_REG_START 0x03c07110 ++#define BCHP_DFAP_RESERVED_PER_REG_END 0x03c0711c ++#define BCHP_DFAP_SOFTRESET_PER_REG_START 0x03c07120 ++#define BCHP_DFAP_SOFTRESET_PER_REG_END 0x03c07120 ++#define BCHP_DFAP_ZONE0_PER_REG_START 0x03c07140 ++#define BCHP_DFAP_ZONE0_PER_REG_END 0x03c0714c ++#define BCHP_DFAP_ZONE1_PER_REG_START 0x03c07150 ++#define BCHP_DFAP_ZONE1_PER_REG_END 0x03c0715c ++#define BCHP_DFAP_ZONE2_PER_REG_START 0x03c07160 ++#define BCHP_DFAP_ZONE2_PER_REG_END 0x03c0716c ++#define BCHP_D3DSMAC32_CFGCTL_PER_REG_START 0x03c0b100 ++#define BCHP_D3DSMAC32_CFGCTL_PER_REG_END 0x03c0b10c ++#define BCHP_D3DSMAC32_RESERVED_PER_REG_START 0x03c0b110 ++#define BCHP_D3DSMAC32_RESERVED_PER_REG_END 0x03c0b11c ++#define BCHP_D3DSMAC32_SOFTRESET_PER_REG_START 0x03c0b120 ++#define BCHP_D3DSMAC32_SOFTRESET_PER_REG_END 0x03c0b120 ++#define BCHP_D3DSMAC32_ZONE0_PER_REG_START 0x03c0b140 ++#define BCHP_D3DSMAC32_ZONE0_PER_REG_END 0x03c0b14c ++#define BCHP_D3DSMAC32_ZONE1_PER_REG_START 0x03c0b150 ++#define BCHP_D3DSMAC32_ZONE1_PER_REG_END 0x03c0b15c ++#define BCHP_D3DSMAC32_ZONE2_PER_REG_START 0x03c0b160 ++#define BCHP_D3DSMAC32_ZONE2_PER_REG_END 0x03c0b16c ++#define BCHP_D3DSMAC32_ZONE3_PER_REG_START 0x03c0b170 ++#define BCHP_D3DSMAC32_ZONE3_PER_REG_END 0x03c0b17c ++#define BCHP_D3DSMAC32_ZONE4_PER_REG_START 0x03c0b180 ++#define BCHP_D3DSMAC32_ZONE4_PER_REG_END 0x03c0b18c ++#define BCHP_D3DSMAC32_ZONE5_PER_REG_START 0x03c0b190 ++#define BCHP_D3DSMAC32_ZONE5_PER_REG_END 0x03c0b19c ++#define BCHP_DSMACOFDA_CFGCTL_PER_REG_START 0x03c0f100 ++#define BCHP_DSMACOFDA_CFGCTL_PER_REG_END 0x03c0f10c ++#define BCHP_DSMACOFDA_RESERVED_PER_REG_START 0x03c0f110 ++#define BCHP_DSMACOFDA_RESERVED_PER_REG_END 0x03c0f11c ++#define BCHP_DSMACOFDA_SOFTRESET_PER_REG_START 0x03c0f120 ++#define BCHP_DSMACOFDA_SOFTRESET_PER_REG_END 0x03c0f120 ++#define BCHP_DSMACOFDA_ZONE0_PER_REG_START 0x03c0f140 ++#define BCHP_DSMACOFDA_ZONE0_PER_REG_END 0x03c0f14c ++#define BCHP_DSMACSFDB_CFGCTL_PER_REG_START 0x03c13100 ++#define BCHP_DSMACSFDB_CFGCTL_PER_REG_END 0x03c1310c ++#define BCHP_DSMACSFDB_RESERVED_PER_REG_START 0x03c13110 ++#define BCHP_DSMACSFDB_RESERVED_PER_REG_END 0x03c1311c ++#define BCHP_DSMACSFDB_SOFTRESET_PER_REG_START 0x03c13120 ++#define BCHP_DSMACSFDB_SOFTRESET_PER_REG_END 0x03c13120 ++#define BCHP_DSMACSFDB_ZONE0_PER_REG_START 0x03c13140 ++#define BCHP_DSMACSFDB_ZONE0_PER_REG_END 0x03c1314c ++#define BCHP_UTP_CFGCTL_PER_REG_START 0x03c17100 ++#define BCHP_UTP_CFGCTL_PER_REG_END 0x03c1710c ++#define BCHP_UTP_RESERVED_PER_REG_START 0x03c17110 ++#define BCHP_UTP_RESERVED_PER_REG_END 0x03c1711c ++#define BCHP_UTP_SOFTRESET_PER_REG_START 0x03c17120 ++#define BCHP_UTP_SOFTRESET_PER_REG_END 0x03c17120 ++#define BCHP_UTP_ZONE0_PER_REG_START 0x03c17140 ++#define BCHP_UTP_ZONE0_PER_REG_END 0x03c1714c ++#define BCHP_UTP_ZONE1_PER_REG_START 0x03c17150 ++#define BCHP_UTP_ZONE1_PER_REG_END 0x03c1715c ++#define BCHP_UTP_ZONE2_PER_REG_START 0x03c17160 ++#define BCHP_UTP_ZONE2_PER_REG_END 0x03c1716c ++#define BCHP_UTP_ZONE3_PER_REG_START 0x03c17170 ++#define BCHP_UTP_ZONE3_PER_REG_END 0x03c1717c ++#define BCHP_UTP_ZONE4_PER_REG_START 0x03c17180 ++#define BCHP_UTP_ZONE4_PER_REG_END 0x03c1718c ++#define BCHP_PERIPH_CFGCTL_PER_REG_START 0x03c1b100 ++#define BCHP_PERIPH_CFGCTL_PER_REG_END 0x03c1b10c ++#define BCHP_PERIPH_RESERVED_PER_REG_START 0x03c1b110 ++#define BCHP_PERIPH_RESERVED_PER_REG_END 0x03c1b11c ++#define BCHP_PERIPH_SOFTRESET_PER_REG_START 0x03c1b120 ++#define BCHP_PERIPH_SOFTRESET_PER_REG_END 0x03c1b120 ++#define BCHP_PERIPH_ZONE0_PER_REG_START 0x03c1b140 ++#define BCHP_PERIPH_ZONE0_PER_REG_END 0x03c1b14c ++#define BCHP_PERIPH_ZONE1_PER_REG_START 0x03c1b150 ++#define BCHP_PERIPH_ZONE1_PER_REG_END 0x03c1b15c ++#define BCHP_PERIPH_ZONE2_PER_REG_START 0x03c1b160 ++#define BCHP_PERIPH_ZONE2_PER_REG_END 0x03c1b16c ++#define BCHP_FPM_CFGCTL_PER_REG_START 0x03c1f100 ++#define BCHP_FPM_CFGCTL_PER_REG_END 0x03c1f10c ++#define BCHP_FPM_RESERVED_PER_REG_START 0x03c1f110 ++#define BCHP_FPM_RESERVED_PER_REG_END 0x03c1f11c ++#define BCHP_FPM_SOFTRESET_PER_REG_START 0x03c1f120 ++#define BCHP_FPM_SOFTRESET_PER_REG_END 0x03c1f120 ++#define BCHP_FPM_ZONE0_PER_REG_START 0x03c1f140 ++#define BCHP_FPM_ZONE0_PER_REG_END 0x03c1f14c ++#define BCHP_CPUC_CFGCTL_PER_REG_START 0x03c23100 ++#define BCHP_CPUC_CFGCTL_PER_REG_END 0x03c2310c ++#define BCHP_CPUC_RESERVED_PER_REG_START 0x03c23110 ++#define BCHP_CPUC_RESERVED_PER_REG_END 0x03c2311c ++#define BCHP_CPUC_SOFTRESET_PER_REG_START 0x03c23120 ++#define BCHP_CPUC_SOFTRESET_PER_REG_END 0x03c23120 ++#define BCHP_CPUC_ZONE0_PER_REG_START 0x03c23140 ++#define BCHP_CPUC_ZONE0_PER_REG_END 0x03c2314c ++#define BCHP_DECT_CFGCTL_PER_REG_START 0x03c27100 ++#define BCHP_DECT_CFGCTL_PER_REG_END 0x03c2710c ++#define BCHP_DECT_RESERVED_PER_REG_START 0x03c27110 ++#define BCHP_DECT_RESERVED_PER_REG_END 0x03c2711c ++#define BCHP_DECT_SOFTRESET_PER_REG_START 0x03c27120 ++#define BCHP_DECT_SOFTRESET_PER_REG_END 0x03c27120 ++#define BCHP_DECT_ZONE0_PER_REG_START 0x03c27140 ++#define BCHP_DECT_ZONE0_PER_REG_END 0x03c2714c ++#define BCHP_APM_CFGCTL_PER_REG_START 0x03c2b100 ++#define BCHP_APM_CFGCTL_PER_REG_END 0x03c2b10c ++#define BCHP_APM_RESERVED_PER_REG_START 0x03c2b110 ++#define BCHP_APM_RESERVED_PER_REG_END 0x03c2b11c ++#define BCHP_APM_SOFTRESET_PER_REG_START 0x03c2b120 ++#define BCHP_APM_SOFTRESET_PER_REG_END 0x03c2b120 ++#define BCHP_APM_ZONE0_PER_REG_START 0x03c2b140 ++#define BCHP_APM_ZONE0_PER_REG_END 0x03c2b14c ++#define BCHP_APM_ZONE1_PER_REG_START 0x03c2b150 ++#define BCHP_APM_ZONE1_PER_REG_END 0x03c2b15c ++#define BCHP_APM_ZONE2_PER_REG_START 0x03c2b160 ++#define BCHP_APM_ZONE2_PER_REG_END 0x03c2b16c ++#define BCHP_APM_ZONE3_PER_REG_START 0x03c2b170 ++#define BCHP_APM_ZONE3_PER_REG_END 0x03c2b17c ++#define BCHP_APM_ZONE4_PER_REG_START 0x03c2b180 ++#define BCHP_APM_ZONE4_PER_REG_END 0x03c2b18c ++#define BCHP_UNIMAC_CFGCTL_PER_REG_START 0x03c2f100 ++#define BCHP_UNIMAC_CFGCTL_PER_REG_END 0x03c2f10c ++#define BCHP_UNIMAC_RESERVED_PER_REG_START 0x03c2f110 ++#define BCHP_UNIMAC_RESERVED_PER_REG_END 0x03c2f11c ++#define BCHP_UNIMAC_SOFTRESET_PER_REG_START 0x03c2f120 ++#define BCHP_UNIMAC_SOFTRESET_PER_REG_END 0x03c2f120 ++#define BCHP_UNIMAC_ZONE0_PER_REG_START 0x03c2f140 ++#define BCHP_UNIMAC_ZONE0_PER_REG_END 0x03c2f14c ++#define BCHP_USMAC_CFGCTL_PER_REG_START 0x03c33100 ++#define BCHP_USMAC_CFGCTL_PER_REG_END 0x03c3310c ++#define BCHP_USMAC_RESERVED_PER_REG_START 0x03c33110 ++#define BCHP_USMAC_RESERVED_PER_REG_END 0x03c3311c ++#define BCHP_USMAC_SOFTRESET_PER_REG_START 0x03c33120 ++#define BCHP_USMAC_SOFTRESET_PER_REG_END 0x03c33120 ++#define BCHP_USMAC_ZONE0_PER_REG_START 0x03c33140 ++#define BCHP_USMAC_ZONE0_PER_REG_END 0x03c3314c ++#define BCHP_USMAC_ZONE1_PER_REG_START 0x03c33150 ++#define BCHP_USMAC_ZONE1_PER_REG_END 0x03c3315c ++#define BCHP_USMAC_ZONE2_PER_REG_START 0x03c33160 ++#define BCHP_USMAC_ZONE2_PER_REG_END 0x03c3316c ++#define BCHP_USMAC_ZONE3_PER_REG_START 0x03c33170 ++#define BCHP_USMAC_ZONE3_PER_REG_END 0x03c3317c ++#define BCHP_USMAC_ZONE4_PER_REG_START 0x03c33180 ++#define BCHP_USMAC_ZONE4_PER_REG_END 0x03c3318c ++#define BCHP_USMAC_ZONE5_PER_REG_START 0x03c33190 ++#define BCHP_USMAC_ZONE5_PER_REG_END 0x03c3319c ++#define BCHP_USMAC_ZONE6_PER_REG_START 0x03c331a0 ++#define BCHP_USMAC_ZONE6_PER_REG_END 0x03c331ac ++#define BCHP_USMAC_ZONE7_PER_REG_START 0x03c331b0 ++#define BCHP_USMAC_ZONE7_PER_REG_END 0x03c331bc ++#define BCHP_USMAC_ZONE8_PER_REG_START 0x03c331c0 ++#define BCHP_USMAC_ZONE8_PER_REG_END 0x03c331cc ++#define BCHP_USMAC_ZONE9_PER_REG_START 0x03c331d0 ++#define BCHP_USMAC_ZONE9_PER_REG_END 0x03c331dc ++#define BCHP_USMAC_ZONE10_PER_REG_START 0x03c331e0 ++#define BCHP_USMAC_ZONE10_PER_REG_END 0x03c331ec ++#define BCHP_USMAC_ZONE11_PER_REG_START 0x03c331f0 ++#define BCHP_USMAC_ZONE11_PER_REG_END 0x03c331fc ++#define BCHP_USMAC_ZONE12_PER_REG_START 0x03c33200 ++#define BCHP_USMAC_ZONE12_PER_REG_END 0x03c3320c ++#define BCHP_TC8X_CFGCTL_PER_REG_START 0x03c37100 ++#define BCHP_TC8X_CFGCTL_PER_REG_END 0x03c3710c ++#define BCHP_TC8X_RESERVED_PER_REG_START 0x03c37110 ++#define BCHP_TC8X_RESERVED_PER_REG_END 0x03c3711c ++#define BCHP_TC8X_SOFTRESET_PER_REG_START 0x03c37120 ++#define BCHP_TC8X_SOFTRESET_PER_REG_END 0x03c37120 ++#define BCHP_TC8X_ZONE0_PER_REG_START 0x03c37140 ++#define BCHP_TC8X_ZONE0_PER_REG_END 0x03c3714c ++#define BCHP_TC8X_ZONE1_PER_REG_START 0x03c37150 ++#define BCHP_TC8X_ZONE1_PER_REG_END 0x03c3715c ++#define BCHP_TC8X_ZONE2_PER_REG_START 0x03c37160 ++#define BCHP_TC8X_ZONE2_PER_REG_END 0x03c3716c ++#define BCHP_TC8X_ZONE3_PER_REG_START 0x03c37170 ++#define BCHP_TC8X_ZONE3_PER_REG_END 0x03c3717c ++#define BCHP_TC8X_ZONE4_PER_REG_START 0x03c37180 ++#define BCHP_TC8X_ZONE4_PER_REG_END 0x03c3718c ++#define BCHP_TC8X_ZONE5_PER_REG_START 0x03c37190 ++#define BCHP_TC8X_ZONE5_PER_REG_END 0x03c3719c ++#define BCHP_TC8X_ZONE6_PER_REG_START 0x03c371a0 ++#define BCHP_TC8X_ZONE6_PER_REG_END 0x03c371ac ++#define BCHP_TC8X_ZONE7_PER_REG_START 0x03c371b0 ++#define BCHP_TC8X_ZONE7_PER_REG_END 0x03c371bc ++#define BCHP_TC8X_ZONE8_PER_REG_START 0x03c371c0 ++#define BCHP_TC8X_ZONE8_PER_REG_END 0x03c371cc ++#define BCHP_TCOFDM_CFGCTL_PER_REG_START 0x03c3b100 ++#define BCHP_TCOFDM_CFGCTL_PER_REG_END 0x03c3b10c ++#define BCHP_TCOFDM_RESERVED_PER_REG_START 0x03c3b110 ++#define BCHP_TCOFDM_RESERVED_PER_REG_END 0x03c3b11c ++#define BCHP_TCOFDM_SOFTRESET_PER_REG_START 0x03c3b120 ++#define BCHP_TCOFDM_SOFTRESET_PER_REG_END 0x03c3b120 ++#define BCHP_TCOFDM_ZONE0_PER_REG_START 0x03c3b140 ++#define BCHP_TCOFDM_ZONE0_PER_REG_END 0x03c3b14c ++#define BCHP_TCOFDM_ZONE1_PER_REG_START 0x03c3b150 ++#define BCHP_TCOFDM_ZONE1_PER_REG_END 0x03c3b15c ++#define BCHP_TCOFDM_ZONE2_PER_REG_START 0x03c3b160 ++#define BCHP_TCOFDM_ZONE2_PER_REG_END 0x03c3b16c ++#define BCHP_TCOFDM_ZONE3_PER_REG_START 0x03c3b170 ++#define BCHP_TCOFDM_ZONE3_PER_REG_END 0x03c3b17c ++#define BCHP_TCOFDM_ZONE4_PER_REG_START 0x03c3b180 ++#define BCHP_TCOFDM_ZONE4_PER_REG_END 0x03c3b18c ++#define BCHP_DAVIC_CFGCTL_PER_REG_START 0x03c3f100 ++#define BCHP_DAVIC_CFGCTL_PER_REG_END 0x03c3f10c ++#define BCHP_DAVIC_RESERVED_PER_REG_START 0x03c3f110 ++#define BCHP_DAVIC_RESERVED_PER_REG_END 0x03c3f11c ++#define BCHP_DAVIC_SOFTRESET_PER_REG_START 0x03c3f120 ++#define BCHP_DAVIC_SOFTRESET_PER_REG_END 0x03c3f120 ++#define BCHP_DAVIC_ZONE0_PER_REG_START 0x03c3f140 ++#define BCHP_DAVIC_ZONE0_PER_REG_END 0x03c3f14c ++#define BCHP_MIPS_CFGCTL_PER_REG_START 0x03c43100 ++#define BCHP_MIPS_CFGCTL_PER_REG_END 0x03c4310c ++#define BCHP_MIPS_RESERVED_PER_REG_START 0x03c43110 ++#define BCHP_MIPS_RESERVED_PER_REG_END 0x03c4311c ++#define BCHP_MIPS_SOFTRESET_PER_REG_START 0x03c43120 ++#define BCHP_MIPS_SOFTRESET_PER_REG_END 0x03c43120 ++#define BCHP_MIPS_ZONE0_PER_REG_START 0x03c43140 ++#define BCHP_MIPS_ZONE0_PER_REG_END 0x03c4314c ++#define BCHP_USTOP_CFGCTL_PER_REG_START 0x03c47100 ++#define BCHP_USTOP_CFGCTL_PER_REG_END 0x03c4710c ++#define BCHP_USTOP_RESERVED_PER_REG_START 0x03c47110 ++#define BCHP_USTOP_RESERVED_PER_REG_END 0x03c4711c ++#define BCHP_USTOP_SOFTRESET_PER_REG_START 0x03c47120 ++#define BCHP_USTOP_SOFTRESET_PER_REG_END 0x03c47120 ++#define BCHP_USTOP_ZONE0_PER_REG_START 0x03c47140 ++#define BCHP_USTOP_ZONE0_PER_REG_END 0x03c4714c ++#define BCHP_LEAP_CFGCTL_PER_REG_START 0x03c4b100 ++#define BCHP_LEAP_CFGCTL_PER_REG_END 0x03c4b10c ++#define BCHP_LEAP_RESERVED_PER_REG_START 0x03c4b110 ++#define BCHP_LEAP_RESERVED_PER_REG_END 0x03c4b11c ++#define BCHP_LEAP_SOFTRESET_PER_REG_START 0x03c4b120 ++#define BCHP_LEAP_SOFTRESET_PER_REG_END 0x03c4b120 ++#define BCHP_LEAP_ZONE0_PER_REG_START 0x03c4b140 ++#define BCHP_LEAP_ZONE0_PER_REG_END 0x03c4b14c ++#define BCHP_EMC_CFGCTL_PER_REG_START 0x03c4f100 ++#define BCHP_EMC_CFGCTL_PER_REG_END 0x03c4f10c ++#define BCHP_EMC_RESERVED_PER_REG_START 0x03c4f110 ++#define BCHP_EMC_RESERVED_PER_REG_END 0x03c4f11c ++#define BCHP_EMC_SOFTRESET_PER_REG_START 0x03c4f120 ++#define BCHP_EMC_SOFTRESET_PER_REG_END 0x03c4f120 ++#define BCHP_EMC_ZONE0_PER_REG_START 0x03c4f140 ++#define BCHP_EMC_ZONE0_PER_REG_END 0x03c4f14c ++#define BCHP_CNTLERRPORT_PERIPH_REG_START 0x03e00000 ++#define BCHP_CNTLERRPORT_PERIPH_REG_END 0x03e000e4 ++#define BCHP_REQA0_PERIPH_REG_START 0x03e00400 ++#define BCHP_REQA0_PERIPH_REG_END 0x03e0048c ++#define BCHP_REPA0_PERIPH_REG_START 0x03e00500 ++#define BCHP_REPA0_PERIPH_REG_END 0x03e0058c ++#define BCHP_REQA1_PERIPH_REG_START 0x03e00600 ++#define BCHP_REQA1_PERIPH_REG_END 0x03e0068c ++#define BCHP_REPA1_PERIPH_REG_START 0x03e00700 ++#define BCHP_REPA1_PERIPH_REG_END 0x03e0078c ++#define BCHP_REQB0_PERIPH_REG_START 0x03e00800 ++#define BCHP_REQB0_PERIPH_REG_END 0x03e0088c ++#define BCHP_REPB0_PERIPH_REG_START 0x03e00900 ++#define BCHP_REPB0_PERIPH_REG_END 0x03e0098c ++#define BCHP_REQB1_PERIPH_REG_START 0x03e00a00 ++#define BCHP_REQB1_PERIPH_REG_END 0x03e00a8c ++#define BCHP_REPB1_PERIPH_REG_START 0x03e00b00 ++#define BCHP_REPB1_PERIPH_REG_END 0x03e00b8c ++#define BCHP_REQC0_PERIPH_REG_START 0x03e00c00 ++#define BCHP_REQC0_PERIPH_REG_END 0x03e00c8c ++#define BCHP_REPC0_PERIPH_REG_START 0x03e00d00 ++#define BCHP_REPC0_PERIPH_REG_END 0x03e00d8c ++#define BCHP_REQC1_PERIPH_REG_START 0x03e00e00 ++#define BCHP_REQC1_PERIPH_REG_END 0x03e00e8c ++#define BCHP_REPC1_PERIPH_REG_START 0x03e00f00 ++#define BCHP_REPC1_PERIPH_REG_END 0x03e00f8c ++#define BCHP_SWITCH_CORE_REG_START 0x04e00000 ++#define BCHP_SWITCH_CORE_REG_END 0x04e3fffc ++#define BCHP_SWITCH_REG_REG_START 0x04e40000 ++#define BCHP_SWITCH_REG_REG_END 0x04e401b0 ++#define BCHP_SWITCH_INDIR_RW_REG_START 0x04e40300 ++#define BCHP_SWITCH_INDIR_RW_REG_END 0x04e40314 ++#define BCHP_SWITCH_INTRL2_0_REG_START 0x04e40340 ++#define BCHP_SWITCH_INTRL2_0_REG_END 0x04e4036c ++#define BCHP_SWITCH_INTRL2_1_REG_START 0x04e40380 ++#define BCHP_SWITCH_INTRL2_1_REG_END 0x04e403ac ++#define BCHP_SWITCH_MDIO_REG_START 0x04e403c0 ++#define BCHP_SWITCH_MDIO_REG_END 0x04e403c4 ++#define BCHP_SWITCH_FCB_REG_START 0x04e40400 ++#define BCHP_SWITCH_FCB_REG_END 0x04e40430 ++#define BCHP_SWITCH_ACB_REG_START 0x04e40600 ++#define BCHP_SWITCH_ACB_REG_END 0x04e40804 ++#define BCHP_MEM_COMMON_1_REG_START 0x05000000 ++#define BCHP_MEM_COMMON_1_REG_END 0x05000004 ++#define BCHP_MEM_PRIVATE_1_REG_START 0x05010000 ++#define BCHP_MEM_PRIVATE_1_REG_END 0x05010004 ++#define BCHP_MEM_INST_MAIN_1_REG_START 0x05020000 ++#define BCHP_MEM_INST_MAIN_1_REG_END 0x05020000 ++#define BCHP_MEM_CNTXT_MAIN_1_REG_START 0x05028000 ++#define BCHP_MEM_CNTXT_MAIN_1_REG_END 0x05028000 ++#define BCHP_MEM_PRED_MAIN_1_REG_START 0x0502c000 ++#define BCHP_MEM_PRED_MAIN_1_REG_END 0x0502c37e ++#define BCHP_MEM_INST_PICO_1_REG_START 0x05030000 ++#define BCHP_MEM_INST_PICO_1_REG_END 0x05030000 ++#define BCHP_MEM_CNTXT_PICO_1_REG_START 0x05038000 ++#define BCHP_MEM_CNTXT_PICO_1_REG_END 0x05038000 ++#define BCHP_MEM_PRED_PICO_1_REG_START 0x0503c000 ++#define BCHP_MEM_PRED_PICO_1_REG_END 0x0503c1fe ++#define BCHP_MEM_COMMON_2_REG_START 0x05040000 ++#define BCHP_MEM_COMMON_2_REG_END 0x05040004 ++#define BCHP_MEM_PRIVATE_2_REG_START 0x05050000 ++#define BCHP_MEM_PRIVATE_2_REG_END 0x05050004 ++#define BCHP_MEM_INST_MAIN_2_REG_START 0x05060000 ++#define BCHP_MEM_INST_MAIN_2_REG_END 0x05060000 ++#define BCHP_MEM_CNTXT_MAIN_2_REG_START 0x05068000 ++#define BCHP_MEM_CNTXT_MAIN_2_REG_END 0x05068000 ++#define BCHP_MEM_PRED_MAIN_2_REG_START 0x0506c000 ++#define BCHP_MEM_PRED_MAIN_2_REG_END 0x0506c37e ++#define BCHP_MEM_INST_PICO_2_REG_START 0x05070000 ++#define BCHP_MEM_INST_PICO_2_REG_END 0x05070000 ++#define BCHP_MEM_CNTXT_PICO_2_REG_START 0x05078000 ++#define BCHP_MEM_CNTXT_PICO_2_REG_END 0x05078000 ++#define BCHP_MEM_PRED_PICO_2_REG_START 0x0507c000 ++#define BCHP_MEM_PRED_PICO_2_REG_END 0x0507c1fe ++#define BCHP_CFG_REGS_1_REG_START 0x05099000 ++#define BCHP_CFG_REGS_1_REG_END 0x050991c8 ++#define BCHP_DBG_REGS_1_REG_START 0x050991d0 ++#define BCHP_DBG_REGS_1_REG_END 0x050992b8 ++#define BCHP_CFG_REGS_2_REG_START 0x0509a000 ++#define BCHP_CFG_REGS_2_REG_END 0x0509a1c8 ++#define BCHP_DBG_REGS_2_REG_START 0x0509a1d0 ++#define BCHP_DBG_REGS_2_REG_END 0x0509a2b8 ++#define BCHP_MEM_ENTRY_REG_START 0x050a0000 ++#define BCHP_MEM_ENTRY_REG_END 0x050a0000 ++#define BCHP_CONFIGURATIONS_REG_START 0x050c0000 ++#define BCHP_CONFIGURATIONS_REG_END 0x050c001c ++#define BCHP_PM_COUNTERS_REG_START 0x050c0100 ++#define BCHP_PM_COUNTERS_REG_END 0x050c01fc ++#define BCHP_DEBUG_REG_START 0x050c0200 ++#define BCHP_DEBUG_REG_END 0x050c0208 ++#define A0_BCHP_REGS_REG_START 0x050c4000 ++#define A0_BCHP_REGS_REG_END 0x050c4130 ++#define BCHP_REGS_REG_START 0x050c8000 ++#define BCHP_REGS_REG_END 0x050c81a8 ++#define BCHP_LOOKUP_CONFIGURATION_REG_START 0x050d0000 ++#define BCHP_LOOKUP_CONFIGURATION_REG_END 0x050d0250 ++#define BCHP_PARSER_CORE_CONFIGURATION_REG_START 0x050d0400 ++#define BCHP_PARSER_CORE_CONFIGURATION_REG_END 0x050d0560 ++#define BCHP_GENERAL_CONFIGURATION_REG_START 0x050d0800 ++#define BCHP_GENERAL_CONFIGURATION_REG_END 0x050d0ad0 ++#define BCHP_CONFIG_DMA_REGS_1_REG_START 0x050d1000 ++#define BCHP_CONFIG_DMA_REGS_1_REG_END 0x050d10a8 ++#define BCHP_DEBUG_DMA_REGS_1_REG_START 0x050d1100 ++#define BCHP_DEBUG_DMA_REGS_1_REG_END 0x050d1218 ++#define BCHP_CONFIG_DMA_REGS_2_REG_START 0x050d1800 ++#define BCHP_CONFIG_DMA_REGS_2_REG_END 0x050d18a8 ++#define BCHP_DEBUG_DMA_REGS_2_REG_START 0x050d1900 ++#define BCHP_DEBUG_DMA_REGS_2_REG_END 0x050d1a18 ++#define BCHP_BRDG_REG_UBUS_MASTER_1_REG_START 0x050d2000 ++#define BCHP_BRDG_REG_UBUS_MASTER_1_REG_END 0x050d2014 ++#define BCHP_BRDG_REG_UBUS_MASTER_2_REG_START 0x050d2400 ++#define BCHP_BRDG_REG_UBUS_MASTER_2_REG_END 0x050d2414 ++#define BCHP_BRDG_REG_UBUS_MASTER_3_REG_START 0x050d2800 ++#define BCHP_BRDG_REG_UBUS_MASTER_3_REG_END 0x050d2814 ++#define A0_BCHP_BRDG_REG_REG_START 0x050d2c00 ++#define A0_BCHP_BRDG_REG_REG_END 0x050d2c08 ++#define BCHP_EGPHY_REG_START 0x050d3000 ++#define BCHP_EGPHY_REG_END 0x050d3014 ++#define BCHP_BRDG_REG_REG_START 0x050d3c00 ++#define BCHP_BRDG_REG_REG_END 0x050d3c14 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_0_REG_START 0x050d4000 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_0_REG_END 0x050d464c ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_1_REG_START 0x050d5000 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_1_REG_END 0x050d564c ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_2_REG_START 0x050d6000 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_2_REG_END 0x050d664c ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_0Module_REG_START 0x050da000 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_0Module_REG_END 0x050da180 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_1Module_REG_START 0x050da400 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_1Module_REG_END 0x050da580 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_2Module_REG_START 0x050da800 ++#define BCHP_UNIMAC_CONFIGURATION_UMAC_MIB_2Module_REG_END 0x050da980 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_1_REG_START 0x050db800 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_1_REG_END 0x050db820 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_2_REG_START 0x050dbc00 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_2_REG_END 0x050dbc20 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_3_REG_START 0x050dc000 ++#define BCHP_UNIMAC_MISC_UNIMAC_TOP_3_REG_END 0x050dc020 ++#define BCHP_GENERAL_CONFIGURATION_RX_1_REG_START 0x050de000 ++#define BCHP_GENERAL_CONFIGURATION_RX_1_REG_END 0x050de094 ++#define BCHP_PM_COUNTERS_RX_1_REG_START 0x050de100 ++#define BCHP_PM_COUNTERS_RX_1_REG_END 0x050de144 ++#define BCHP_DEBUG_RX_1_REG_START 0x050de200 ++#define BCHP_DEBUG_RX_1_REG_END 0x050de2cc ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_1_REG_START 0x050de400 ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_1_REG_END 0x050de7fc ++#define BCHP_GENERAL_CONFIGURATION_RX_2_REG_START 0x050de800 ++#define BCHP_GENERAL_CONFIGURATION_RX_2_REG_END 0x050de894 ++#define BCHP_PM_COUNTERS_RX_2_REG_START 0x050de900 ++#define BCHP_PM_COUNTERS_RX_2_REG_END 0x050de944 ++#define BCHP_DEBUG_RX_2_REG_START 0x050dea00 ++#define BCHP_DEBUG_RX_2_REG_END 0x050deacc ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_2_REG_START 0x050dec00 ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_2_REG_END 0x050deffc ++#define BCHP_GENERAL_CONFIGURATION_RX_3_REG_START 0x050df000 ++#define BCHP_GENERAL_CONFIGURATION_RX_3_REG_END 0x050df094 ++#define BCHP_PM_COUNTERS_RX_3_REG_START 0x050df100 ++#define BCHP_PM_COUNTERS_RX_3_REG_END 0x050df144 ++#define BCHP_DEBUG_RX_3_REG_START 0x050df200 ++#define BCHP_DEBUG_RX_3_REG_END 0x050df2cc ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_3_REG_START 0x050df400 ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_3_REG_END 0x050df7fc ++#define BCHP_GENERAL_CONFIGURATION_RX_4_REG_START 0x050e1000 ++#define BCHP_GENERAL_CONFIGURATION_RX_4_REG_END 0x050e1094 ++#define BCHP_PM_COUNTERS_RX_4_REG_START 0x050e1100 ++#define BCHP_PM_COUNTERS_RX_4_REG_END 0x050e1144 ++#define BCHP_DEBUG_RX_4_REG_START 0x050e1200 ++#define BCHP_DEBUG_RX_4_REG_END 0x050e12cc ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_4_REG_START 0x050e1400 ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_4_REG_END 0x050e17fc ++#define BCHP_GENERAL_CONFIGURATION_RX_5_REG_START 0x050e2000 ++#define BCHP_GENERAL_CONFIGURATION_RX_5_REG_END 0x050e2094 ++#define BCHP_PM_COUNTERS_RX_5_REG_START 0x050e2100 ++#define BCHP_PM_COUNTERS_RX_5_REG_END 0x050e2144 ++#define BCHP_DEBUG_RX_5_REG_START 0x050e2200 ++#define BCHP_DEBUG_RX_5_REG_END 0x050e22cc ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_5_REG_START 0x050e2400 ++#define BCHP_PER_FLOW_PM_COUNTERS_RX_5_REG_END 0x050e27fc ++#define BCHP_CONFIGURATIONS_TX_1_REG_START 0x050e8000 ++#define BCHP_CONFIGURATIONS_TX_1_REG_END 0x050e8098 ++#define BCHP_DEBUG_TX_1_REG_START 0x050e8100 ++#define BCHP_DEBUG_TX_1_REG_END 0x050e81ec ++#define BCHP_PD_FIFO_TX_1_REG_START 0x050e8200 ++#define BCHP_PD_FIFO_TX_1_REG_END 0x050e85fc ++#define BCHP_CONTEXT_TX_1_REG_START 0x050e8600 ++#define BCHP_CONTEXT_TX_1_REG_END 0x050e869c ++#define BCHP_EPON_PD_FIFO_TX_1_REG_START 0x050e8700 ++#define BCHP_EPON_PD_FIFO_TX_1_REG_END 0x050e8efc ++#define BCHP_EPON_CFG_TX_1_REG_START 0x050e9000 ++#define BCHP_EPON_CFG_TX_1_REG_END 0x050e9054 ++#define BCHP_EPON_DBG_TX_1_REG_START 0x050e9100 ++#define BCHP_EPON_DBG_TX_1_REG_END 0x050e9204 ++#define BCHP_EPON_STS_FIFO_TX_1_REG_START 0x050e9700 ++#define BCHP_EPON_STS_FIFO_TX_1_REG_END 0x050e9efc ++#define BCHP_CONFIGURATIONS_TX_2_REG_START 0x050ea000 ++#define BCHP_CONFIGURATIONS_TX_2_REG_END 0x050ea098 ++#define BCHP_DEBUG_TX_2_REG_START 0x050ea100 ++#define BCHP_DEBUG_TX_2_REG_END 0x050ea1ec ++#define BCHP_PD_FIFO_TX_2_REG_START 0x050ea200 ++#define BCHP_PD_FIFO_TX_2_REG_END 0x050ea5fc ++#define BCHP_CONTEXT_TX_2_REG_START 0x050ea600 ++#define BCHP_CONTEXT_TX_2_REG_END 0x050ea69c ++#define BCHP_EPON_PD_FIFO_TX_2_REG_START 0x050ea700 ++#define BCHP_EPON_PD_FIFO_TX_2_REG_END 0x050eaefc ++#define BCHP_EPON_CFG_TX_2_REG_START 0x050eb000 ++#define BCHP_EPON_CFG_TX_2_REG_END 0x050eb054 ++#define BCHP_EPON_DBG_TX_2_REG_START 0x050eb100 ++#define BCHP_EPON_DBG_TX_2_REG_END 0x050eb204 ++#define BCHP_EPON_STS_FIFO_TX_2_REG_START 0x050eb700 ++#define BCHP_EPON_STS_FIFO_TX_2_REG_END 0x050ebefc ++#define BCHP_CONFIGURATIONS_TX_3_REG_START 0x050ec000 ++#define BCHP_CONFIGURATIONS_TX_3_REG_END 0x050ec098 ++#define BCHP_DEBUG_TX_3_REG_START 0x050ec100 ++#define BCHP_DEBUG_TX_3_REG_END 0x050ec1ec ++#define BCHP_PD_FIFO_TX_3_REG_START 0x050ec200 ++#define BCHP_PD_FIFO_TX_3_REG_END 0x050ec5fc ++#define BCHP_CONTEXT_TX_3_REG_START 0x050ec600 ++#define BCHP_CONTEXT_TX_3_REG_END 0x050ec69c ++#define BCHP_EPON_PD_FIFO_TX_3_REG_START 0x050ec700 ++#define BCHP_EPON_PD_FIFO_TX_3_REG_END 0x050ecefc ++#define BCHP_EPON_CFG_TX_3_REG_START 0x050ed000 ++#define BCHP_EPON_CFG_TX_3_REG_END 0x050ed054 ++#define BCHP_EPON_DBG_TX_3_REG_START 0x050ed100 ++#define BCHP_EPON_DBG_TX_3_REG_END 0x050ed204 ++#define BCHP_EPON_STS_FIFO_TX_3_REG_START 0x050ed700 ++#define BCHP_EPON_STS_FIFO_TX_3_REG_END 0x050edefc ++#define BCHP_CONFIGURATIONS_TX_4_REG_START 0x050f4000 ++#define BCHP_CONFIGURATIONS_TX_4_REG_END 0x050f4098 ++#define BCHP_DEBUG_TX_4_REG_START 0x050f4100 ++#define BCHP_DEBUG_TX_4_REG_END 0x050f41ec ++#define BCHP_PD_FIFO_TX_4_REG_START 0x050f4200 ++#define BCHP_PD_FIFO_TX_4_REG_END 0x050f45fc ++#define BCHP_CONTEXT_TX_4_REG_START 0x050f4600 ++#define BCHP_CONTEXT_TX_4_REG_END 0x050f469c ++#define BCHP_EPON_PD_FIFO_TX_4_REG_START 0x050f4700 ++#define BCHP_EPON_PD_FIFO_TX_4_REG_END 0x050f4efc ++#define BCHP_EPON_CFG_TX_4_REG_START 0x050f5000 ++#define BCHP_EPON_CFG_TX_4_REG_END 0x050f5054 ++#define BCHP_EPON_DBG_TX_4_REG_START 0x050f5100 ++#define BCHP_EPON_DBG_TX_4_REG_END 0x050f5204 ++#define BCHP_EPON_STS_FIFO_TX_4_REG_START 0x050f5700 ++#define BCHP_EPON_STS_FIFO_TX_4_REG_END 0x050f5efc ++#define BCHP_CONFIGURATIONS_TX_5_REG_START 0x050f6000 ++#define BCHP_CONFIGURATIONS_TX_5_REG_END 0x050f6098 ++#define BCHP_DEBUG_TX_5_REG_START 0x050f6100 ++#define BCHP_DEBUG_TX_5_REG_END 0x050f61ec ++#define BCHP_PD_FIFO_TX_5_REG_START 0x050f6200 ++#define BCHP_PD_FIFO_TX_5_REG_END 0x050f65fc ++#define BCHP_CONTEXT_TX_5_REG_START 0x050f6600 ++#define BCHP_CONTEXT_TX_5_REG_END 0x050f669c ++#define BCHP_EPON_PD_FIFO_TX_5_REG_START 0x050f6700 ++#define BCHP_EPON_PD_FIFO_TX_5_REG_END 0x050f6efc ++#define BCHP_EPON_CFG_TX_5_REG_START 0x050f7000 ++#define BCHP_EPON_CFG_TX_5_REG_END 0x050f7054 ++#define BCHP_EPON_DBG_TX_5_REG_START 0x050f7100 ++#define BCHP_EPON_DBG_TX_5_REG_END 0x050f7204 ++#define BCHP_EPON_STS_FIFO_TX_5_REG_START 0x050f7700 ++#define BCHP_EPON_STS_FIFO_TX_5_REG_END 0x050f7efc ++#define BCHP_NATCACHE_REG_START 0x050fc000 ++#define BCHP_NATCACHE_REG_END 0x050fc2b0 ++#define BCHP_NATCACHE_INDIR_RW_REG_START 0x050fc400 ++#define BCHP_NATCACHE_INDIR_RW_REG_END 0x050fc45c ++#define BCHP_CNTLERRPORT_G2U_REG_START 0x07e00000 ++#define BCHP_CNTLERRPORT_G2U_REG_END 0x07e000e4 ++#define BCHP_REQA0_G2U_REG_START 0x07e00400 ++#define BCHP_REQA0_G2U_REG_END 0x07e0048c ++#define BCHP_REPA0_G2U_REG_START 0x07e00500 ++#define BCHP_REPA0_G2U_REG_END 0x07e0058c ++#define BCHP_REQA1_G2U_REG_START 0x07e00600 ++#define BCHP_REQA1_G2U_REG_END 0x07e0068c ++#define BCHP_REPA1_G2U_REG_START 0x07e00700 ++#define BCHP_REPA1_G2U_REG_END 0x07e0078c ++#define BCHP_REQB0_G2U_REG_START 0x07e00800 ++#define BCHP_REQB0_G2U_REG_END 0x07e0088c ++#define BCHP_REPB0_G2U_REG_START 0x07e00900 ++#define BCHP_REPB0_G2U_REG_END 0x07e0098c ++#define BCHP_REQB1_G2U_REG_START 0x07e00a00 ++#define BCHP_REQB1_G2U_REG_END 0x07e00a8c ++#define BCHP_REPB1_G2U_REG_START 0x07e00b00 ++#define BCHP_REPB1_G2U_REG_END 0x07e00b8c ++#define BCHP_REQC0_G2U_REG_START 0x07e00c00 ++#define BCHP_REQC0_G2U_REG_END 0x07e00c8c ++#define BCHP_REPC0_G2U_REG_START 0x07e00d00 ++#define BCHP_REPC0_G2U_REG_END 0x07e00d8c ++#define BCHP_REQC1_G2U_REG_START 0x07e00e00 ++#define BCHP_REQC1_G2U_REG_END 0x07e00e8c ++#define BCHP_REPC1_G2U_REG_START 0x07e00f00 ++#define BCHP_REPC1_G2U_REG_END 0x07e00f8c ++#define BCHP_SCPU_LOCALRAM_REG_START 0x20300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x2030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x20310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x203103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x20310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x20310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x20310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x20310470 ++#define BCHP_SCPU_INTR1_REG_START 0x20310480 ++#define BCHP_SCPU_INTR1_REG_END 0x20310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x203104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x203104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x20310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x2031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x20310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x2031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x20311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x2031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x20311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x2031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x20312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x20312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x20312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x20312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x20312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x20312114 ++#define BCHP_SAGE_UART_REG_START 0x20312200 ++#define BCHP_SAGE_UART_REG_END 0x2031221c ++#define BCHP_SCPU_PM_REG_START 0x20312980 ++#define BCHP_SCPU_PM_REG_END 0x20312988 ++#define BCHP_SCPU_TIMER_REG_START 0x20312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x20312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x2032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x2032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x2032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x2032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x2032d300 ++#define BCHP_BSP_PKL_REG_END 0x2032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x2032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x2032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x2032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x2032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x2032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x2032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x20360000 ++#define BCHP_XPT_SECURITY_REG_END 0x2037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x20380000 ++#define BCHP_SECTOP_GRB_REG_END 0x2038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x20380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x203800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x20380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x2038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x20380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x203801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x20380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x203802c8 ++#define BCHP_S_MEMC_0_REG_START 0x203bc000 ++#define BCHP_S_MEMC_0_REG_END 0x203bc780 ++#define BCHP_MEMC_SECURE_UBUS_0_REG_START 0x203bd000 ++#define BCHP_MEMC_SECURE_UBUS_0_REG_END 0x203bd494 ++#define BCHP_S_MEMC_1_REG_START 0x203cc000 ++#define BCHP_S_MEMC_1_REG_END 0x203cc780 ++#define BCHP_MEMC_SECURE_UBUS_1_REG_START 0x203cd000 ++#define BCHP_MEMC_SECURE_UBUS_1_REG_END 0x203cd494 ++#define BCHP_SUN_GISB_ARB_REG_START 0x20400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x204007fc ++#define BCHP_SUN_GR_REG_START 0x20401000 ++#define BCHP_SUN_GR_REG_END 0x2040100c ++#define BCHP_SSP_RG_REG_START 0x20401200 ++#define BCHP_SSP_RG_REG_END 0x2040120c ++#define BCHP_SUN_RG_REG_START 0x20401400 ++#define BCHP_SUN_RG_REG_END 0x2040140c ++#define BCHP_RF4CE_GR_REG_START 0x20401600 ++#define BCHP_RF4CE_GR_REG_END 0x2040160c ++#define BCHP_TPCAP_REG_START 0x20401800 ++#define BCHP_TPCAP_REG_END 0x2040189c ++#define BCHP_SUN_L2_REG_START 0x20403000 ++#define BCHP_SUN_L2_REG_END 0x20403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x20404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x2040452c ++#define BCHP_BBSI_RG_REG_START 0x20405c00 ++#define BCHP_BBSI_RG_REG_END 0x20405c0c ++#define BCHP_PWM_REG_START 0x20408000 ++#define BCHP_PWM_REG_END 0x20408024 ++#define BCHP_PWMB_REG_START 0x20409000 ++#define BCHP_PWMB_REG_END 0x20409024 ++#define BCHP_GIO_REG_START 0x2040a000 ++#define BCHP_GIO_REG_END 0x2040a09c ++#define BCHP_TIMER_REG_START 0x2040a100 ++#define BCHP_TIMER_REG_END 0x2040a13c ++#define BCHP_WATCHDOG_REG_START 0x2040a200 ++#define BCHP_WATCHDOG_REG_END 0x2040a210 ++#define BCHP_BSCA_REG_START 0x2040a300 ++#define BCHP_BSCA_REG_END 0x2040a354 ++#define BCHP_BSCD_REG_START 0x2040a400 ++#define BCHP_BSCD_REG_END 0x2040a454 ++#define BCHP_BSCE_REG_START 0x2040a500 ++#define BCHP_BSCE_REG_END 0x2040a554 ++#define BCHP_IRQ0_REG_START 0x2040a600 ++#define BCHP_IRQ0_REG_END 0x2040a604 ++#define BCHP_IRQ1_REG_START 0x2040a640 ++#define BCHP_IRQ1_REG_END 0x2040a644 ++#define BCHP_PM_REG_START 0x2040a680 ++#define BCHP_PM_REG_END 0x2040a688 ++#define BCHP_UARTA_REG_START 0x2040a900 ++#define BCHP_UARTA_REG_END 0x2040a91c ++#define BCHP_UARTB_REG_START 0x2040a940 ++#define BCHP_UARTB_REG_END 0x2040a95c ++#define BCHP_UARTC_REG_START 0x2040a980 ++#define BCHP_UARTC_REG_END 0x2040a99c ++#define BCHP_SCA_REG_START 0x2040ac00 ++#define BCHP_SCA_REG_END 0x2040acbc ++#define BCHP_SCB_REG_START 0x2040ad00 ++#define BCHP_SCB_REG_END 0x2040adbc ++#define BCHP_SCIRQ0_REG_START 0x2040ae00 ++#define BCHP_SCIRQ0_REG_END 0x2040ae04 ++#define BCHP_SCIRQ1_REG_START 0x2040ae40 ++#define BCHP_SCIRQ1_REG_END 0x2040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x2040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x2040ae84 ++#define BCHP_MCIF_INTR2_REG_START 0x2040b000 ++#define BCHP_MCIF_INTR2_REG_END 0x2040b044 ++#define BCHP_MCIF_REG_START 0x2040b080 ++#define BCHP_MCIF_REG_END 0x2040b0a8 ++#define BCHP_MCIF1_REG_START 0x2040b0c0 ++#define BCHP_MCIF1_REG_END 0x2040b0e8 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x2040b100 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x2040b12c ++#define BCHP_UPG_UART_DMA_REG_START 0x2040b400 ++#define BCHP_UPG_UART_DMA_REG_END 0x2040b430 ++#define BCHP_AON_CTRL_REG_START 0x20410000 ++#define BCHP_AON_CTRL_REG_END 0x204105fc ++#define BCHP_AON_L2_REG_START 0x20410600 ++#define BCHP_AON_L2_REG_END 0x2041062c ++#define BCHP_AON_PM_L2_REG_START 0x20410640 ++#define BCHP_AON_PM_L2_REG_END 0x2041066c ++#define BCHP_AON_PM_BBM_L2_REG_START 0x20410680 ++#define BCHP_AON_PM_BBM_L2_REG_END 0x204106ac ++#define BCHP_AON_PIN_CTRL_REG_START 0x20410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x20410714 ++#define BCHP_CNTControlBase_REG_START 0x20412000 ++#define BCHP_CNTControlBase_REG_END 0x20412ffc ++#define BCHP_CNTReadBase_REG_START 0x20414000 ++#define BCHP_CNTReadBase_REG_END 0x20414ffc ++#define BCHP_MSPI_REG_START 0x20416000 ++#define BCHP_MSPI_REG_END 0x2041617c ++#define BCHP_GIO_AON_REG_START 0x20417000 ++#define BCHP_GIO_AON_REG_END 0x2041703c ++#define BCHP_LDK_REG_START 0x20417100 ++#define BCHP_LDK_REG_END 0x20417144 ++#define BCHP_BSCB_REG_START 0x20417180 ++#define BCHP_BSCB_REG_END 0x204171d4 ++#define BCHP_IRQ0_AON_REG_START 0x20417200 ++#define BCHP_IRQ0_AON_REG_END 0x20417204 ++#define BCHP_IRQ1_AON_REG_START 0x20417240 ++#define BCHP_IRQ1_AON_REG_END 0x20417244 ++#define BCHP_PM_AON_REG_START 0x20417280 ++#define BCHP_PM_AON_REG_END 0x20417288 ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x20417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x2041742c ++#define BCHP_WKTMR_REG_START 0x20417480 ++#define BCHP_WKTMR_REG_END 0x20417490 ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x20420000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x20422ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x20424000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x20424bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x20428000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x204280fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x2042a000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x2042b058 ++#define BCHP_AVS_UART_REG_START 0x20430000 ++#define BCHP_AVS_UART_REG_END 0x20430ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x20431100 ++#define BCHP_AVS_CPU_L2_REG_END 0x2043112c ++#define BCHP_AVS_HOST_L2_REG_START 0x20431200 ++#define BCHP_AVS_HOST_L2_REG_END 0x20431244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x20431300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x2043135c ++#define BCHP_AVS_BSTI_REG_START 0x20431400 ++#define BCHP_AVS_BSTI_REG_END 0x20431404 ++#define BCHP_AVS_TMON_REG_START 0x20431500 ++#define BCHP_AVS_TMON_REG_END 0x20431524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x20431800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x204318a8 ++#define BCHP_AVS_HW_MNTR_1_REG_START 0x20432000 ++#define BCHP_AVS_HW_MNTR_1_REG_END 0x204320c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_1_REG_START 0x20432100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_1_REG_END 0x20432124 ++#define BCHP_AVS_RO_REGISTERS_0_1_REG_START 0x20432200 ++#define BCHP_AVS_RO_REGISTERS_0_1_REG_END 0x204322e0 ++#define BCHP_AVS_RO_REGISTERS_1_1_REG_START 0x20432800 ++#define BCHP_AVS_RO_REGISTERS_1_1_REG_END 0x20432808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_1_REG_START 0x20432d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_1_REG_END 0x20432dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_1_REG_START 0x20432e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_1_REG_END 0x20432efc ++#define BCHP_AVS_HW_MNTR_2_REG_START 0x20434000 ++#define BCHP_AVS_HW_MNTR_2_REG_END 0x204340c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_2_REG_START 0x20434100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_2_REG_END 0x20434124 ++#define BCHP_AVS_RO_REGISTERS_0_2_REG_START 0x20434200 ++#define BCHP_AVS_RO_REGISTERS_0_2_REG_END 0x204342e0 ++#define BCHP_AVS_RO_REGISTERS_1_2_REG_START 0x20434800 ++#define BCHP_AVS_RO_REGISTERS_1_2_REG_END 0x20434808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_2_REG_START 0x20434d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_2_REG_END 0x20434dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_2_REG_START 0x20434e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_2_REG_END 0x20434efc ++#define BCHP_AVS_WDOG_REG_START 0x20436000 ++#define BCHP_AVS_WDOG_REG_END 0x20436ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x20438000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x20438024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x20438040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x20438064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x20438080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x204380a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x204380c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x204380e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x20438100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x20438124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x20438140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x20438164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x20438180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x204381a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x204381c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x204381e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x20438200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x20438224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x20438240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x20438264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x20438280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x204382a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x204382c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x204382e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x20438300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x20438324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x20438340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x20438364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x20438380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x204383a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x204383c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x204383e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x20438400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x20438424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x20438440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x20438464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x20438480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x204384a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x204384c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x204384e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x20438500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x20438524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x20438540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x20438564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x20438580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x204385a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x204385c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x204385e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x20438600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x20438624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x20438640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x20438664 ++#define BCHP_AVS_PMB_S_026_REG_START 0x20438680 ++#define BCHP_AVS_PMB_S_026_REG_END 0x204386a4 ++#define BCHP_AVS_PMB_S_027_REG_START 0x204386c0 ++#define BCHP_AVS_PMB_S_027_REG_END 0x204386e4 ++#define BCHP_AVS_PMB_S_028_REG_START 0x20438700 ++#define BCHP_AVS_PMB_S_028_REG_END 0x20438724 ++#define BCHP_AVS_PMB_S_029_REG_START 0x20438740 ++#define BCHP_AVS_PMB_S_029_REG_END 0x20438764 ++#define BCHP_AVS_PMB_S_030_REG_START 0x20438780 ++#define BCHP_AVS_PMB_S_030_REG_END 0x204387a4 ++#define BCHP_AVS_PMB_S_031_REG_START 0x204387c0 ++#define BCHP_AVS_PMB_S_031_REG_END 0x204387e4 ++#define BCHP_AVS_PMB_S_032_REG_START 0x20438800 ++#define BCHP_AVS_PMB_S_032_REG_END 0x20438824 ++#define BCHP_AVS_PMB_S_033_REG_START 0x20438840 ++#define BCHP_AVS_PMB_S_033_REG_END 0x20438864 ++#define BCHP_AVS_PMB_S_034_REG_START 0x20438880 ++#define BCHP_AVS_PMB_S_034_REG_END 0x204388a4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x2043a000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x2043a008 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x20440000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x204407fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x20440800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x20440804 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x20440900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x2044097c ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x20440a00 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x20440a58 ++#define BCHP_HIF_CONTINUATION_REG_START 0x20450000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x204500fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x20450800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x20450814 ++#define BCHP_CLKGEN_REG_START 0x20480000 ++#define BCHP_CLKGEN_REG_END 0x2048058c ++#define BCHP_CLKGEN_GR_REG_START 0x20483000 ++#define BCHP_CLKGEN_GR_REG_END 0x2048300c ++#define BCHP_SDIO_0_HOST_REG_START 0x204a0000 ++#define BCHP_SDIO_0_HOST_REG_END 0x204a00fc ++#define BCHP_SDIO_0_CFG_REG_START 0x204a0100 ++#define BCHP_SDIO_0_CFG_REG_END 0x204a01fc ++#define BCHP_SDIO_1_HOST_REG_START 0x204a0200 ++#define BCHP_SDIO_1_HOST_REG_END 0x204a02fc ++#define BCHP_SDIO_1_CFG_REG_START 0x204a0300 ++#define BCHP_SDIO_1_CFG_REG_END 0x204a03fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x204a0400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x204a043c ++#define BCHP_EBI_REG_START 0x204a0800 ++#define BCHP_EBI_REG_END 0x204a0bfc ++#define BCHP_HIF_INTR2_REG_START 0x204a1000 ++#define BCHP_HIF_INTR2_REG_END 0x204a102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x204a1500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x204a154c ++#define BCHP_HIF_RGR2_REG_START 0x204a1700 ++#define BCHP_HIF_RGR2_REG_END 0x204a1710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x204a1a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x204a1a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x204a2000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x204a203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x204a2100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x204a2110 ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x204a2200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x204a23fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x204a2400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x204a27fc ++#define BCHP_NAND_REG_START 0x204a2800 ++#define BCHP_NAND_REG_END 0x204a2dfc ++#define BCHP_FLASH_DMA_REG_START 0x204a3000 ++#define BCHP_FLASH_DMA_REG_END 0x204a3028 ++#define BCHP_BSPI_REG_START 0x204a3200 ++#define BCHP_BSPI_REG_END 0x204a324c ++#define BCHP_BSPI_RAF_REG_START 0x204a3300 ++#define BCHP_BSPI_RAF_REG_END 0x204a3320 ++#define BCHP_HIF_MSPI_REG_START 0x204a3400 ++#define BCHP_HIF_MSPI_REG_END 0x204a3584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x204a3600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x204a3604 ++#define BCHP_IPI0_INTR2_REG_START 0x204a4000 ++#define BCHP_IPI0_INTR2_REG_END 0x204a402c ++#define BCHP_IPI1_INTR2_REG_START 0x204a4100 ++#define BCHP_IPI1_INTR2_REG_END 0x204a412c ++#define BCHP_BOOTSRAM_TM_REG_START 0x204b0000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x204bfffc ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x204c0000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x204cfffc ++#define BCHP_ITCH0_REG_START 0x204d0000 ++#define BCHP_ITCH0_REG_END 0x204d0000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x204d0400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x204d0400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x204d0500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x204d0500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x204d0600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x204d0600 ++#define BCHP_NAND_SECURE_REG_START 0x204d0800 ++#define BCHP_NAND_SECURE_REG_END 0x204d0800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x204d0c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x204d0c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x204d0e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x204d0ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x204d1000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x204d1004 ++#define BCHP_ITCH1_REG_START 0x204d1200 ++#define BCHP_ITCH1_REG_END 0x204d1200 ++#define BCHP_PROD_OTP_GRB_REG_START 0x204e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x204e600c ++#define BCHP_JTAG_OTP_REG_START 0x204e6100 ++#define BCHP_JTAG_OTP_REG_END 0x204e615c ++#define BCHP_BOOTROM_REG_START 0x20500000 ++#define BCHP_BOOTROM_REG_END 0x20503ffc ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x20a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x20a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x20a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x20a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x20a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x20a001fc ++#define BCHP_XPT_PMU_REG_START 0x20a00200 ++#define BCHP_XPT_PMU_REG_END 0x20a00218 ++#define BCHP_XPT_GR_REG_START 0x20a00300 ++#define BCHP_XPT_GR_REG_END 0x20a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x20a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x20a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x20a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x20a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x20a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x20a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x20a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x20a02078 ++#define BCHP_XPT_DPCR1_REG_START 0x20a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x20a020f8 ++#define BCHP_XPT_DPCR2_REG_START 0x20a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x20a02178 ++#define BCHP_XPT_DPCR3_REG_START 0x20a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x20a021f8 ++#define BCHP_XPT_DPCR4_REG_START 0x20a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x20a02278 ++#define BCHP_XPT_DPCR5_REG_START 0x20a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x20a022f8 ++#define BCHP_XPT_DPCR6_REG_START 0x20a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x20a02378 ++#define BCHP_XPT_DPCR7_REG_START 0x20a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x20a023f8 ++#define BCHP_XPT_DPCR8_REG_START 0x20a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x20a02478 ++#define BCHP_XPT_DPCR9_REG_START 0x20a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x20a024f8 ++#define BCHP_XPT_DPCR10_REG_START 0x20a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x20a02578 ++#define BCHP_XPT_DPCR11_REG_START 0x20a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x20a025f8 ++#define BCHP_XPT_DPCR12_REG_START 0x20a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x20a02678 ++#define BCHP_XPT_DPCR13_REG_START 0x20a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x20a026f8 ++#define BCHP_XPT_DPCR_PP_REG_START 0x20a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x20a02804 ++#define BCHP_XPT_PSUB_REG_START 0x20a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x20a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x20a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x20a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x20a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x20a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x20a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x20a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x20a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x20a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x20a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x20a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x20a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x20a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x20a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x20a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x20a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x20a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x20a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x20a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x20a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x20a14050 ++#define BCHP_XPT_FE_REG_START 0x20a20000 ++#define BCHP_XPT_FE_REG_END 0x20a25ffc ++#define BCHP_XPT_MSG_REG_START 0x20a30000 ++#define BCHP_XPT_MSG_REG_END 0x20a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x20a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x20a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x20a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x20a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x20a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x20a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x20a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x20a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x20a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x20a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x20a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x20a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x20a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x20a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x20a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x20a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x20a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x20a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x20a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x20a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x20a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x20a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x20a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x20a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x20a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x20a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x20a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x20a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x20a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x20a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x20a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x20a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x20a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x20a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x20a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x20a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x20a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x20a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x20a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x20a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x20a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x20a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x20a40000 ++#define BCHP_XPT_RAVE_REG_END 0x20a4e178 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x20a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x20a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x20a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x20a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x20a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x20a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x20a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x20a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x20a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x20a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x20a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x20a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x20a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x20a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x20a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x20a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x20a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x20a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x20a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x20a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x20a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x20a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x20a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x20a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x20a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x20a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x20a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x20a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x20a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x20a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x20a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x20a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x20a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x20a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x20a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x20a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x20a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x20a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x20a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x20a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x20a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x20a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x20a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x20a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x20a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x20a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x20a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x20a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x20a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x20a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x20a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x20a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x20a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x20a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x20a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x20a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x20a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x20a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x20a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x20a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x20a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x20a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x20a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x20a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x20a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x20a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x20a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x20a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x20a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x20a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x20a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x20a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x20a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x20a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x20a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x20a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x20a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x20a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x20a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x20a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x20a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x20a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x20a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x20a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x20a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x20a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x20a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x20a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x20a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x20a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x20a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x20a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x20a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x20a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x20a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x20a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x20a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x20a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x20a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x20a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x20a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x20a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x20a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x20a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x20a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x20a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x20a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x20a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x20a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x20a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x20a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x20a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x20a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x20a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x20a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x20a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x20a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x20a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x20a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x20a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x20a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x20a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x20a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x20a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x20a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x20a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x20a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x20a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x20a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x20a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x20a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x20a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x20a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x20a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x20a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x20a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x20a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x20a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x20a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x20a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x20a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x20a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x20a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x20a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x20a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x20a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x20a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x20a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x20a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x20a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x20a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x20a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x20a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x20a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x20a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x20a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x20a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x20a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x20a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x20a69068 ++#define BCHP_XPT_WDMA_CH0_REG_START 0x20a6a000 ++#define BCHP_XPT_WDMA_CH0_REG_END 0x20a6a0fc ++#define BCHP_XPT_WDMA_CH1_REG_START 0x20a6a100 ++#define BCHP_XPT_WDMA_CH1_REG_END 0x20a6a1fc ++#define BCHP_XPT_WDMA_CH2_REG_START 0x20a6a200 ++#define BCHP_XPT_WDMA_CH2_REG_END 0x20a6a2fc ++#define BCHP_XPT_WDMA_CH3_REG_START 0x20a6a300 ++#define BCHP_XPT_WDMA_CH3_REG_END 0x20a6a3fc ++#define BCHP_XPT_WDMA_CH4_REG_START 0x20a6a400 ++#define BCHP_XPT_WDMA_CH4_REG_END 0x20a6a4fc ++#define BCHP_XPT_WDMA_CH5_REG_START 0x20a6a500 ++#define BCHP_XPT_WDMA_CH5_REG_END 0x20a6a5fc ++#define BCHP_XPT_WDMA_CH6_REG_START 0x20a6a600 ++#define BCHP_XPT_WDMA_CH6_REG_END 0x20a6a6fc ++#define BCHP_XPT_WDMA_CH7_REG_START 0x20a6a700 ++#define BCHP_XPT_WDMA_CH7_REG_END 0x20a6a7fc ++#define BCHP_XPT_WDMA_CH8_REG_START 0x20a6a800 ++#define BCHP_XPT_WDMA_CH8_REG_END 0x20a6a8fc ++#define BCHP_XPT_WDMA_CH9_REG_START 0x20a6a900 ++#define BCHP_XPT_WDMA_CH9_REG_END 0x20a6a9fc ++#define BCHP_XPT_WDMA_CH10_REG_START 0x20a6aa00 ++#define BCHP_XPT_WDMA_CH10_REG_END 0x20a6aafc ++#define BCHP_XPT_WDMA_CH11_REG_START 0x20a6ab00 ++#define BCHP_XPT_WDMA_CH11_REG_END 0x20a6abfc ++#define BCHP_XPT_WDMA_CH12_REG_START 0x20a6ac00 ++#define BCHP_XPT_WDMA_CH12_REG_END 0x20a6acfc ++#define BCHP_XPT_WDMA_CH13_REG_START 0x20a6ad00 ++#define BCHP_XPT_WDMA_CH13_REG_END 0x20a6adfc ++#define BCHP_XPT_WDMA_CH14_REG_START 0x20a6ae00 ++#define BCHP_XPT_WDMA_CH14_REG_END 0x20a6aefc ++#define BCHP_XPT_WDMA_CH15_REG_START 0x20a6af00 ++#define BCHP_XPT_WDMA_CH15_REG_END 0x20a6affc ++#define BCHP_XPT_WDMA_CH16_REG_START 0x20a6b000 ++#define BCHP_XPT_WDMA_CH16_REG_END 0x20a6b0fc ++#define BCHP_XPT_WDMA_CH17_REG_START 0x20a6b100 ++#define BCHP_XPT_WDMA_CH17_REG_END 0x20a6b1fc ++#define BCHP_XPT_WDMA_CH18_REG_START 0x20a6b200 ++#define BCHP_XPT_WDMA_CH18_REG_END 0x20a6b2fc ++#define BCHP_XPT_WDMA_CH19_REG_START 0x20a6b300 ++#define BCHP_XPT_WDMA_CH19_REG_END 0x20a6b3fc ++#define BCHP_XPT_WDMA_CH20_REG_START 0x20a6b400 ++#define BCHP_XPT_WDMA_CH20_REG_END 0x20a6b4fc ++#define BCHP_XPT_WDMA_CH21_REG_START 0x20a6b500 ++#define BCHP_XPT_WDMA_CH21_REG_END 0x20a6b5fc ++#define BCHP_XPT_WDMA_CH22_REG_START 0x20a6b600 ++#define BCHP_XPT_WDMA_CH22_REG_END 0x20a6b6fc ++#define BCHP_XPT_WDMA_CH23_REG_START 0x20a6b700 ++#define BCHP_XPT_WDMA_CH23_REG_END 0x20a6b7fc ++#define BCHP_XPT_WDMA_CH24_REG_START 0x20a6b800 ++#define BCHP_XPT_WDMA_CH24_REG_END 0x20a6b8fc ++#define BCHP_XPT_WDMA_CH25_REG_START 0x20a6b900 ++#define BCHP_XPT_WDMA_CH25_REG_END 0x20a6b9fc ++#define BCHP_XPT_WDMA_CH26_REG_START 0x20a6ba00 ++#define BCHP_XPT_WDMA_CH26_REG_END 0x20a6bafc ++#define BCHP_XPT_WDMA_CH27_REG_START 0x20a6bb00 ++#define BCHP_XPT_WDMA_CH27_REG_END 0x20a6bbfc ++#define BCHP_XPT_WDMA_CH28_REG_START 0x20a6bc00 ++#define BCHP_XPT_WDMA_CH28_REG_END 0x20a6bcfc ++#define BCHP_XPT_WDMA_CH29_REG_START 0x20a6bd00 ++#define BCHP_XPT_WDMA_CH29_REG_END 0x20a6bdfc ++#define BCHP_XPT_WDMA_CH30_REG_START 0x20a6be00 ++#define BCHP_XPT_WDMA_CH30_REG_END 0x20a6befc ++#define BCHP_XPT_WDMA_CH31_REG_START 0x20a6bf00 ++#define BCHP_XPT_WDMA_CH31_REG_END 0x20a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x20a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x20a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x20a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x20a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x20a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x20a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x20a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x20a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x20a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x20a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x20a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x20a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x20a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x20a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x20a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x20a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x20a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x20a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x20a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x20a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x20a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x20a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x20a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x20a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x20a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x20a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x20a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x20a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x20a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x20a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x20a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x20a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x20a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x20a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x20a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x20a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x20a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x20a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x20a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x20a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x20a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x20a704ac ++#define BCHP_XPT_MCPB_REG_START 0x20a70800 ++#define BCHP_XPT_MCPB_REG_END 0x20a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x20a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x20a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x20a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x20a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x20a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x20a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x20a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x20a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x20a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x20a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x20a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x20a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x20a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x20a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x20a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x20a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x20a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x20a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x20a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x20a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x20a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x20a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x20a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x20a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x20a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x20a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x20a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x20a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x20a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x20a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x20a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x20a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x20a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x20a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x20a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x20a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x20a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x20a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x20a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x20a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x20a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x20a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x20a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x20a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x20a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x20a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x20a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x20a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x20a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x20a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x20a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x20a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x20a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x20a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x20a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x20a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x20a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x20a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x20a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x20a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x20a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x20a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x20a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x20a74b5c ++#define BCHP_XPT_XPU_REG_START 0x20a78000 ++#define BCHP_XPT_XPU_REG_END 0x20a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x20a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x20a7f000 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x20a80200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x20a80204 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_START 0x20a80300 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_END 0x20a80304 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x20a81000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x20a81fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x20a82000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x20a837fc ++#define BCHP_SID_REG_START 0x20bc0100 ++#define BCHP_SID_REG_END 0x20bc019c ++#define BCHP_SID_RLE_REG_START 0x20bc0300 ++#define BCHP_SID_RLE_REG_END 0x20bc039c ++#define BCHP_SID_DQ_REG_START 0x20bc0400 ++#define BCHP_SID_DQ_REG_END 0x20bc04bc ++#define BCHP_SID_STRM_REG_START 0x20bc0800 ++#define BCHP_SID_STRM_REG_END 0x20bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x20bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x20bc0c40 ++#define BCHP_SID_ARC_REG_START 0x20bc0f00 ++#define BCHP_SID_ARC_REG_END 0x20bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x20bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x20bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x20bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x20bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x20bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x20bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x20bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x20bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x20bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x20bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x20bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x20bc39fc ++#define BCHP_SID_SYMB_REG_START 0x20bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x20bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x20bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x20bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x20bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x20bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x20bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x20bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x20bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x20bd5014 ++#define BCHP_SID_GR_REG_START 0x20be0000 ++#define BCHP_SID_GR_REG_END 0x20be000c ++#define BCHP_SID_L2_REG_START 0x20be0100 ++#define BCHP_SID_L2_REG_END 0x20be012c ++#define BCHP_SICH_REG_START 0x20be2000 ++#define BCHP_SICH_REG_END 0x20be203c ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_START 0x20e00000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_END 0x20e1fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_START 0x20e20000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_END 0x20e3fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_START 0x20e40000 ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_END 0x20e47ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_START 0x20e50000 ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_END 0x20e500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_START 0x20e51000 ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_END 0x20e51a08 ++#define BCHP_RF4CE_CPU_UART_REG_START 0x20e52000 ++#define BCHP_RF4CE_CPU_UART_REG_END 0x20e52ffc ++#define BCHP_RF4CE_CPU_WDG_REG_START 0x20e53000 ++#define BCHP_RF4CE_CPU_WDG_REG_END 0x20e53ffc ++#define BCHP_RF4CE_CPU_CTRL_REG_START 0x20e80000 ++#define BCHP_RF4CE_CPU_CTRL_REG_END 0x20e8008c ++#define BCHP_RF4CE_CPU_L2_REG_START 0x20e80300 ++#define BCHP_RF4CE_CPU_L2_REG_END 0x20e80314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_START 0x20e80500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_END 0x20e8052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_START 0x20e80800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_END 0x20e8082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_START 0x20e80a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_END 0x20e80a2c ++#define BCHP_TX_REG_START 0x20ec0000 ++#define BCHP_TX_REG_END 0x20ec0020 ++#define BCHP_RX_REG_START 0x20ed0000 ++#define BCHP_RX_REG_END 0x20ed0254 ++#define BCHP_RF_REG_START 0x20ee0000 ++#define BCHP_RF_REG_END 0x20ee00a4 ++#define BCHP_VCOCAL_REG_START 0x20ee0100 ++#define BCHP_VCOCAL_REG_END 0x20ee0174 ++#define BCHP_KVCO_REG_START 0x20ee0200 ++#define BCHP_KVCO_REG_END 0x20ee0224 ++#define BCHP_PA_REG_START 0x20ee0300 ++#define BCHP_PA_REG_END 0x20ee0314 ++#define BCHP_MAC_REG_START 0x20ee0400 ++#define BCHP_MAC_REG_END 0x20ee0564 ++#define BCHP_PWR_MGT_L2_REG_START 0x20ee0600 ++#define BCHP_PWR_MGT_L2_REG_END 0x20ee0614 ++#define BCHP_MISC_L2_REG_START 0x20ee0700 ++#define BCHP_MISC_L2_REG_END 0x20ee0714 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_START 0x20ee0800 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_END 0x20ee0814 ++#define BCHP_SYMCNT6_L2_REG_START 0x20ee0900 ++#define BCHP_SYMCNT6_L2_REG_END 0x20ee0914 ++#define BCHP_TX_DONE_L2_REG_START 0x20ee0a00 ++#define BCHP_TX_DONE_L2_REG_END 0x20ee0a14 ++#define BCHP_RX_DONE_L2_REG_START 0x20ee0b00 ++#define BCHP_RX_DONE_L2_REG_END 0x20ee0b14 ++#define BCHP_RX_START_L2_REG_START 0x20ee0c00 ++#define BCHP_RX_START_L2_REG_END 0x20ee0c14 ++#define BCHP_SYMCNT7_L2_REG_START 0x20ee0d00 ++#define BCHP_SYMCNT7_L2_REG_END 0x20ee0d14 ++#define BCHP_GCI_0_REG_START 0x20ee1000 ++#define BCHP_GCI_0_REG_END 0x20ee120c ++#define BCHP_GCI_1_REG_START 0x20ee1400 ++#define BCHP_GCI_1_REG_END 0x20ee1604 ++#define BCHP_GCI_2_REG_START 0x20ee1800 ++#define BCHP_GCI_2_REG_END 0x20ee1a04 ++#define BCHP_USB_CAPS_REG_START 0x21000000 ++#define BCHP_USB_CAPS_REG_END 0x2100002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x21000100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x2100010c ++#define BCHP_USB_INTR2_REG_START 0x21000180 ++#define BCHP_USB_INTR2_REG_END 0x210001ac ++#define BCHP_USB_CTRL_REG_START 0x21000200 ++#define BCHP_USB_CTRL_REG_END 0x210002fc ++#define BCHP_USB_EHCI_REG_START 0x21000300 ++#define BCHP_USB_EHCI_REG_END 0x210003a4 ++#define BCHP_USB_OHCI_REG_START 0x21000400 ++#define BCHP_USB_OHCI_REG_END 0x21000454 ++#define BCHP_USB_XHCI_REG_START 0x21001000 ++#define BCHP_USB_XHCI_REG_END 0x21001ffc ++#define BCHP_USB1_CAPS_REG_START 0x21010000 ++#define BCHP_USB1_CAPS_REG_END 0x2101002c ++#define BCHP_USB1_INTR2_REG_START 0x21010180 ++#define BCHP_USB1_INTR2_REG_END 0x210101ac ++#define BCHP_USB1_CTRL_REG_START 0x21010200 ++#define BCHP_USB1_CTRL_REG_END 0x210102fc ++#define BCHP_USB1_EHCI_REG_START 0x21010300 ++#define BCHP_USB1_EHCI_REG_END 0x210103a4 ++#define BCHP_USB1_OHCI_REG_START 0x21010400 ++#define BCHP_USB1_OHCI_REG_END 0x21010454 ++#define BCHP_USB1_XHCI_REG_START 0x21011000 ++#define BCHP_USB1_XHCI_REG_END 0x21011ffc ++#define BCHP_USB1_BDC_REG_START 0x21012000 ++#define BCHP_USB1_BDC_REG_END 0x21012fc0 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x21080000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x2108003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x21080048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x2108004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x210800ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x210800e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x21080100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x21080134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x21080160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x21080178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x21080180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x210801a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x21080404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x21080418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x21080428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x21080630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x21080800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x21080998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x21081000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x21081424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x21081800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x21081e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x21082000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x2108203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x21082048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x2108204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x21082050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x21082054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x21082058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x21082064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x210820a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x210820a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x210820ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x210820e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x21082100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x21082134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x2108213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x21082144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x21082150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x2108215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x21082160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x21082178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x21082180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x210821a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x21082404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x21082418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x21082428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x21082630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x21082800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x21082998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x21083000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x21083424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x21083800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x21083e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x21084000 ++#define BCHP_PCIE_0_MISC_REG_END 0x210840cc ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x21084100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x21084104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x21084200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x21084204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x21084300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x2108432c ++#define BCHP_PCIE_0_DMA_REG_START 0x21084400 ++#define BCHP_PCIE_0_DMA_REG_END 0x2108446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x21088000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x21089008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x21089200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x21089210 ++#define BCHP_PCIE_0_RG_REG_START 0x21089300 ++#define BCHP_PCIE_0_RG_REG_END 0x2108930c ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x21090000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x2109003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x21090048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x2109004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x210900ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x210900e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x21090100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x21090134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x21090160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x21090178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x21090180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x210901a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x21090404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x21090418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x21090428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x21090630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x21090800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x21090998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x21091000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x21091424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x21091800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x21091e1c ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_START 0x21092000 ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_END 0x2109203c ++#define BCHP_PCIE_1_EP_CFG_PM_REG_START 0x21092048 ++#define BCHP_PCIE_1_EP_CFG_PM_REG_END 0x2109204c ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_START 0x21092050 ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_END 0x21092054 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_START 0x21092058 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_END 0x21092064 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_START 0x210920a0 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_END 0x210920a8 ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_START 0x210920ac ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_END 0x210920e4 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_START 0x21092100 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_END 0x21092134 ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_START 0x2109213c ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_END 0x21092144 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_START 0x21092150 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_END 0x2109215c ++#define BCHP_PCIE_1_EP_CFG_VC_REG_START 0x21092160 ++#define BCHP_PCIE_1_EP_CFG_VC_REG_END 0x21092178 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_START 0x21092180 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_END 0x210921a4 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_START 0x21092404 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_END 0x21092418 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_START 0x21092428 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_END 0x21092630 ++#define BCHP_PCIE_1_EP_TL_REG_START 0x21092800 ++#define BCHP_PCIE_1_EP_TL_REG_END 0x21092998 ++#define BCHP_PCIE_1_EP_DL_REG_START 0x21093000 ++#define BCHP_PCIE_1_EP_DL_REG_END 0x21093424 ++#define BCHP_PCIE_1_EP_PL_REG_START 0x21093800 ++#define BCHP_PCIE_1_EP_PL_REG_END 0x21093e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x21094000 ++#define BCHP_PCIE_1_MISC_REG_END 0x210940cc ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x21094100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x21094104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x21094200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x21094204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x21094300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x2109432c ++#define BCHP_PCIE_1_DMA_REG_START 0x21094400 ++#define BCHP_PCIE_1_DMA_REG_END 0x2109446c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x21098000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x21099008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x21099200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x21099210 ++#define BCHP_PCIE_1_RG_REG_START 0x21099300 ++#define BCHP_PCIE_1_RG_REG_END 0x2109930c ++#define BCHP_G2U_REGS_REG_START 0x210a0000 ++#define BCHP_G2U_REGS_REG_END 0x210a0030 ++#define BCHP_WEBHIF_RGR_REG_START 0x210b0000 ++#define BCHP_WEBHIF_RGR_REG_END 0x210b0010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x210b0100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x210b012c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x210b0600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x210b064c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x210b0700 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x210b074c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x210b0800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x210b081c ++#define BCHP_WEBHIF_TIMER_REG_START 0x210b0900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x210b093c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x210b0a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x210b0a00 ++#define BCHP_RG_PM_REG_START 0x210b0e00 ++#define BCHP_RG_PM_REG_END 0x210b0e1c ++#define BCHP_PMBM_REG_START 0x210b0f00 ++#define BCHP_PMBM_REG_END 0x210b0f0c ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x210b1000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x210b102c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x210b2000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x210b202c ++#define BCHP_DATA_MEM_REG_START 0x21200000 ++#define BCHP_DATA_MEM_REG_END 0x21247ffc ++#define BCHP_CNTL_MEM_REG_START 0x21320000 ++#define BCHP_CNTL_MEM_REG_END 0x21367ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x213c0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x213c0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x213c0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x213c0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x213c0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x213c0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x213c0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x213c0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x213c0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x213c0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x213c0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x213c0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x213c0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x213c0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x213c0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x213c0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x213c0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x213c0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x213c0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x213c0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x213c00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x213c00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x213c00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x213c00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x213c00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x213c00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x213c00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x213c00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x213c00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x213c00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x213c00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x213c00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x213c0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x213c0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x213c0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x213c0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x213c0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x213c0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x213c0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x213c0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x213c0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x213c0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x213c4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x213c4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x213c4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x213c4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x213c4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x213c4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x213c4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x213c4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x213c4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x213c4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x213c4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x213c4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x213c4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x213c4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x213c4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x213c4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x213c4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x213c4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x213c4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x213c4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x213c40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x213c40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x213c40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x213c40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x213c40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x213c40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x213c40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x213c40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x213c40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x213c40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x213c40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x213c40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x213c4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x213c4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x213c4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x213c4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x213c4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x213c4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x213c4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x213c4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x213c4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x213c4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x213c4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x213c4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x213c4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x213c4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x213c4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x213c4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x213c4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x213c4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x213c4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x213c4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x213c4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x213c4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x213c4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x213c4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x213c4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x213c4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x213c4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x213c4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x213c4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x213c4c00 ++#define BCHP_MAC_AHB_REG_START 0x213c5000 ++#define BCHP_MAC_AHB_REG_END 0x213c500c ++#define BCHP_LLM_AHB_REG_START 0x213c8000 ++#define BCHP_LLM_AHB_REG_END 0x213c805c ++#define BCHP_PHY_REG_START 0x213e0000 ++#define BCHP_PHY_REG_END 0x213e47fc ++#define BCHP_ECL_REG_START 0x213e8000 ++#define BCHP_ECL_REG_END 0x213ecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x213ed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x213ed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x213ed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x213ed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x213ed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x213ed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x213ed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x213ed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x213ed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x213ed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x213ed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x213ed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x213ed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x213ed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x213ed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x213ed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x213ed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x213ed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x213ed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x213ed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x213ed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x213ed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x213ed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x213ed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x213ed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x213ed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x213ed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x213ed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x213ed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x213ed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x213ed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x213ed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x213ed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x213ed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x213ed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x213ed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x213ed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x213ed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x213ed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x213ed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x213ed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x213ed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x213ed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x213ed828 ++#define BCHP_GMII_REG_START 0x213edc00 ++#define BCHP_GMII_REG_END 0x213edc58 ++#define BCHP_MAC_APB_REG_START 0x213f0000 ++#define BCHP_MAC_APB_REG_END 0x213f14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x213f4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x213f4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x213f4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x213f406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x213f4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x213f40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x213f40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x213f40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x213f4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x213f412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x213f4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x213f416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x213f4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x213f41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x213f41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x213f41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x213f4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x213f422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x213f4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x213f426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x213f4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x213f42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x213f42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x213f42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x213f4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x213f432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x213f4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x213f436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x213f4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x213f43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x213f43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x213f43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x213f4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x213f442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x213f4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x213f446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x213f4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x213f44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x213f44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x213f44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x213f4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x213f452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x213f4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x213f4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x213f4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x213f486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x213f4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x213f48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x213f48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x213f48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x213f4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x213f492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x213f4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x213f496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x213f4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x213f49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x213f49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x213f49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x213f4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x213f4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x213f6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x213f6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x213f6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x213f6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x213f6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x213f6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x213f8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x213f8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x213f8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x213f8d84 ++#define BCHP_LLM_APB_REG_START 0x213fc000 ++#define BCHP_LLM_APB_REG_END 0x213fd00c ++#define BCHP_TRX_REG_START 0x213fe000 ++#define BCHP_TRX_REG_END 0x213fe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x213fe400 ++#define BCHP_MOCA_TIMER_REG_END 0x213fe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x213fe800 ++#define BCHP_MOCA_GPIO_REG_END 0x213fe818 ++#define BCHP_EXTRAS_REG_START 0x213fec00 ++#define BCHP_EXTRAS_REG_END 0x213fed18 ++#define BCHP_MOCA_BSC_REG_START 0x213ff000 ++#define BCHP_MOCA_BSC_REG_END 0x213ff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x213ffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x213ffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x213ffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x213ffc2c ++#define BCHP_MOCA_L2_REG_START 0x213ffc40 ++#define BCHP_MOCA_L2_REG_END 0x213ffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x213ffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x213ffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x213ffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x213ffd9c ++#define BCHP_MC_GLB_0_REG_START 0x21500000 ++#define BCHP_MC_GLB_0_REG_END 0x21500010 ++#define BCHP_MC_SRAM_REMAP_0_REG_START 0x21500020 ++#define BCHP_MC_SRAM_REMAP_0_REG_END 0x2150002c ++#define BCHP_MC_RBF_REORDER_0_0_REG_START 0x21500040 ++#define BCHP_MC_RBF_REORDER_0_0_REG_END 0x2150007c ++#define BCHP_MC_INTR2_0_REG_START 0x21500080 ++#define BCHP_MC_INTR2_0_REG_END 0x215000c4 ++#define BCHP_MC_BPM_0_REG_START 0x215000e0 ++#define BCHP_MC_BPM_0_REG_END 0x215000e4 ++#define BCHP_MC_CHN_CFG_0_REG_START 0x21500100 ++#define BCHP_MC_CHN_CFG_0_REG_END 0x21500198 ++#define BCHP_MC_CHN_TIM_0_REG_START 0x21500200 ++#define BCHP_MC_CHN_TIM_0_REG_END 0x2150023c ++#define BCHP_MC_ARB_0_REG_START 0x21500300 ++#define BCHP_MC_ARB_0_REG_END 0x21500394 ++#define BCHP_MC_UBUSIF_0_0_REG_START 0x21500400 ++#define BCHP_MC_UBUSIF_0_0_REG_END 0x2150041c ++#define BCHP_MC_UBUSIF_1_0_REG_START 0x21500440 ++#define BCHP_MC_UBUSIF_1_0_REG_END 0x2150045c ++#define BCHP_MC_MCPIF_0_0_REG_START 0x21500500 ++#define BCHP_MC_MCPIF_0_0_REG_END 0x21500520 ++#define BCHP_MC_EXACC_0_REG_START 0x21500580 ++#define BCHP_MC_EXACC_0_REG_END 0x215005dc ++#define BCHP_MC_LMBIF_0_0_REG_START 0x21500600 ++#define BCHP_MC_LMBIF_0_0_REG_END 0x2150060c ++#define BCHP_MC_EDIS_0_0_REG_START 0x21500800 ++#define BCHP_MC_EDIS_0_0_REG_END 0x215008fc ++#define BCHP_MC_EDIS_1_0_REG_START 0x21500900 ++#define BCHP_MC_EDIS_1_0_REG_END 0x215009fc ++#define BCHP_MC_STATS_0_REG_START 0x21500a00 ++#define BCHP_MC_STATS_0_REG_END 0x21500a30 ++#define BCHP_MC_CAP_0_REG_START 0x21500a80 ++#define BCHP_MC_CAP_0_REG_END 0x21500aec ++#define BCHP_MC_SEC_SRAM_REMAP_0_REG_START 0x21500b00 ++#define BCHP_MC_SEC_SRAM_REMAP_0_REG_END 0x21500b0c ++#define BCHP_MC_CORE_ATW_0_REG_START 0x21500c00 ++#define BCHP_MC_CORE_ATW_0_REG_END 0x21500db8 ++#define BCHP_MC_SEC_INTR2_0_REG_START 0x21500e00 ++#define BCHP_MC_SEC_INTR2_0_REG_END 0x21500e14 ++#define BCHP_MC_RGR_BRIDGE_0_REG_START 0x21500e80 ++#define BCHP_MC_RGR_BRIDGE_0_REG_END 0x21500e90 ++#define BCHP_MC_SCBARB_0_REG_START 0x21501000 ++#define BCHP_MC_SCBARB_0_REG_END 0x215014f0 ++#define BCHP_MC_UBUS_NONSEC_ARCH_REG_0_REG_START 0x21501800 ++#define BCHP_MC_UBUS_NONSEC_ARCH_REG_0_REG_END 0x21501b5c ++#define BCHP_MC_SCB_NONSEC_ARCH_REG_0_REG_START 0x21501c00 ++#define BCHP_MC_SCB_NONSEC_ARCH_REG_0_REG_END 0x21501f5c ++#define BCHP_MC_MSA_0_REG_START 0x21502000 ++#define BCHP_MC_MSA_0_REG_END 0x2150223c ++#define BCHP_PHY_CONTROL_REGS_0_REG_START 0x21504000 ++#define BCHP_PHY_CONTROL_REGS_0_REG_END 0x21504218 ++#define BCHP_PHY_BYTE_LANE_0_0_REG_START 0x21504400 ++#define BCHP_PHY_BYTE_LANE_0_0_REG_END 0x21504518 ++#define BCHP_PHY_BYTE_LANE_1_0_REG_START 0x21504600 ++#define BCHP_PHY_BYTE_LANE_1_0_REG_END 0x21504718 ++#define BCHP_PHY_BYTE_LANE_2_0_REG_START 0x21504800 ++#define BCHP_PHY_BYTE_LANE_2_0_REG_END 0x21504918 ++#define BCHP_PHY_BYTE_LANE_3_0_REG_START 0x21504a00 ++#define BCHP_PHY_BYTE_LANE_3_0_REG_END 0x21504b18 ++#define BCHP_PHY_ECC_LANE_0_REG_START 0x21504c00 ++#define BCHP_PHY_ECC_LANE_0_REG_END 0x21504d18 ++#define BCHP_MC_GLB_1_REG_START 0x21580000 ++#define BCHP_MC_GLB_1_REG_END 0x21580010 ++#define BCHP_MC_SRAM_REMAP_1_REG_START 0x21580020 ++#define BCHP_MC_SRAM_REMAP_1_REG_END 0x2158002c ++#define BCHP_MC_RBF_REORDER_0_1_REG_START 0x21580040 ++#define BCHP_MC_RBF_REORDER_0_1_REG_END 0x2158007c ++#define BCHP_MC_INTR2_1_REG_START 0x21580080 ++#define BCHP_MC_INTR2_1_REG_END 0x215800c4 ++#define BCHP_MC_BPM_1_REG_START 0x215800e0 ++#define BCHP_MC_BPM_1_REG_END 0x215800e4 ++#define BCHP_MC_CHN_CFG_1_REG_START 0x21580100 ++#define BCHP_MC_CHN_CFG_1_REG_END 0x21580198 ++#define BCHP_MC_CHN_TIM_1_REG_START 0x21580200 ++#define BCHP_MC_CHN_TIM_1_REG_END 0x2158023c ++#define BCHP_MC_ARB_1_REG_START 0x21580300 ++#define BCHP_MC_ARB_1_REG_END 0x21580394 ++#define BCHP_MC_UBUSIF_0_1_REG_START 0x21580400 ++#define BCHP_MC_UBUSIF_0_1_REG_END 0x2158041c ++#define BCHP_MC_UBUSIF_1_1_REG_START 0x21580440 ++#define BCHP_MC_UBUSIF_1_1_REG_END 0x2158045c ++#define BCHP_MC_MCPIF_0_1_REG_START 0x21580500 ++#define BCHP_MC_MCPIF_0_1_REG_END 0x21580520 ++#define BCHP_MC_EXACC_1_REG_START 0x21580580 ++#define BCHP_MC_EXACC_1_REG_END 0x215805dc ++#define BCHP_MC_LMBIF_0_1_REG_START 0x21580600 ++#define BCHP_MC_LMBIF_0_1_REG_END 0x2158060c ++#define BCHP_MC_EDIS_0_1_REG_START 0x21580800 ++#define BCHP_MC_EDIS_0_1_REG_END 0x215808fc ++#define BCHP_MC_EDIS_1_1_REG_START 0x21580900 ++#define BCHP_MC_EDIS_1_1_REG_END 0x215809fc ++#define BCHP_MC_STATS_1_REG_START 0x21580a00 ++#define BCHP_MC_STATS_1_REG_END 0x21580a30 ++#define BCHP_MC_CAP_1_REG_START 0x21580a80 ++#define BCHP_MC_CAP_1_REG_END 0x21580aec ++#define BCHP_MC_SEC_SRAM_REMAP_1_REG_START 0x21580b00 ++#define BCHP_MC_SEC_SRAM_REMAP_1_REG_END 0x21580b0c ++#define BCHP_MC_CORE_ATW_1_REG_START 0x21580c00 ++#define BCHP_MC_CORE_ATW_1_REG_END 0x21580db8 ++#define BCHP_MC_SEC_INTR2_1_REG_START 0x21580e00 ++#define BCHP_MC_SEC_INTR2_1_REG_END 0x21580e14 ++#define BCHP_MC_RGR_BRIDGE_1_REG_START 0x21580e80 ++#define BCHP_MC_RGR_BRIDGE_1_REG_END 0x21580e90 ++#define BCHP_MC_SCBARB_1_REG_START 0x21581000 ++#define BCHP_MC_SCBARB_1_REG_END 0x215814f0 ++#define BCHP_MC_UBUS_NONSEC_ARCH_REG_1_REG_START 0x21581800 ++#define BCHP_MC_UBUS_NONSEC_ARCH_REG_1_REG_END 0x21581b5c ++#define BCHP_MC_SCB_NONSEC_ARCH_REG_1_REG_START 0x21581c00 ++#define BCHP_MC_SCB_NONSEC_ARCH_REG_1_REG_END 0x21581f5c ++#define BCHP_MC_MSA_1_REG_START 0x21582000 ++#define BCHP_MC_MSA_1_REG_END 0x2158223c ++#define BCHP_PHY_CONTROL_REGS_1_REG_START 0x21584000 ++#define BCHP_PHY_CONTROL_REGS_1_REG_END 0x21584218 ++#define BCHP_PHY_BYTE_LANE_0_1_REG_START 0x21584400 ++#define BCHP_PHY_BYTE_LANE_0_1_REG_END 0x21584518 ++#define BCHP_PHY_BYTE_LANE_1_1_REG_START 0x21584600 ++#define BCHP_PHY_BYTE_LANE_1_1_REG_END 0x21584718 ++#define BCHP_PHY_BYTE_LANE_2_1_REG_START 0x21584800 ++#define BCHP_PHY_BYTE_LANE_2_1_REG_END 0x21584918 ++#define BCHP_PHY_BYTE_LANE_3_1_REG_START 0x21584a00 ++#define BCHP_PHY_BYTE_LANE_3_1_REG_END 0x21584b18 ++#define BCHP_PHY_ECC_LANE_1_REG_START 0x21584c00 ++#define BCHP_PHY_ECC_LANE_1_REG_END 0x21584d18 ++ ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/3390a0/bchp_usb_ctrl.h b/include/linux/brcmstb/3390a0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..7fd36f9f +--- /dev/null ++++ b/include/linux/brcmstb/3390a0/bchp_usb_ctrl.h +@@ -0,0 +1,1670 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Sun Sep 14 03:14:49 2014 ++ * Full Compile MD5 Checksum ef22086ebd4065e4fea50dbc64f17e5e ++ * (minus title and desc) ++ * MD5 Checksum 39fcae49037a6337517df43bfc24b21f ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x21000200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x21000204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x21000208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x2100020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x21000210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x21000214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x21000218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x2100021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x21000220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x21000224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x21000228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x2100022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x21000230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x21000234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x21000238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x2100023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x21000240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x21000244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x21000248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x2100024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x21000250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x21000254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x21000258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x2100025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x21000260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x21000264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x21000268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x2100026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x21000270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x21000274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x21000278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x2100027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1 0x21000290 /* USB DEVICE CONTROL Register 1 */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x210002a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x210002a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x210002a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x210002ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x210002b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x210002b4 /* SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB20_ID 0x210002f0 /* USB REVID */ ++#define BCHP_USB_CTRL_USB30_ID 0x210002f4 /* USB REVID */ ++#define BCHP_USB_CTRL_BDC_COREID 0x210002f8 /* USB REVID */ ++#define BCHP_USB_CTRL_USB_REVID 0x210002fc /* USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: strap_ipp_sel [25:25] */ ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_SHIFT 25 ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [24:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x01f00000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare1 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_CTL_SPARE1 [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:19] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ff80000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 19 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: ohci_memreq_disable [18:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_MASK 0x00040000 ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: MDIO2_SPARE [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: PHY_TPOUT_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [08:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000180 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: USB_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE2 [30:28] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_MASK 0x70000000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_p1 [27:27] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_SHIFT 27 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_p0 [26:26] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_SHIFT 26 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_usb30 [25:25] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_MASK 0x02000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_SHIFT 25 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_usb30_p1 [24:24] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xdc_soft_resetb [23:23] */ ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_SHIFT 23 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [22:22] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 22 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [21:21] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 21 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [19:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x000f0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:23] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_rxelectidle_sel [22:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: phy3_phystatus_override [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_rxstatus_override [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_DEVICE_CTL1 - USB DEVICE CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_ctl1_spare3 [31:20] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare3_MASK 0xfff00000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare3_SHIFT 20 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_spd [19:17] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_MASK 0x000e0000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_SHIFT 17 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_ndr [16:16] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_SHIFT 16 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_ctl1_spare2 [15:11] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_MASK 0x0000f800 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_SHIFT 11 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_vdd_retention [10:10] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_MASK 0x00000400 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_SHIFT 10 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_rmt_wkup [09:09] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_SHIFT 9 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_buspwr [08:08] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_SHIFT 8 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_ctl1_spare1 [07:04] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_SHIFT 4 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: device_pullup_dis [03:03] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_SHIFT 3 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usbphy_host_override [02:02] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_SHIFT 2 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: port_mode [01:00] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000f ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x0000000c ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x0000001b ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB20_ID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB20_ID :: USB20PHY_ID [31:16] */ ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_SHIFT 16 ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_DEFAULT 0x0000d034 ++ ++/* USB_CTRL :: USB20_ID :: SYNOPSYS_CORE_ID [15:00] */ ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_SHIFT 0 ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/*************************************************************************** ++ *USB30_ID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_ID :: USB30PHY_ID [31:16] */ ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_DEFAULT 0x0000c000 ++ ++/* USB_CTRL :: USB30_ID :: XHC_CORE_ID [15:00] */ ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_DEFAULT 0x00000200 ++ ++/*************************************************************************** ++ *BDC_COREID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: BDC_COREID :: BDC3_COREID [31:16] */ ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_SHIFT 16 ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_DEFAULT 0x0000c000 ++ ++/* USB_CTRL :: BDC_COREID :: BDC2_COREID [15:00] */ ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_SHIFT 0 ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_DEFAULT 0x00000200 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7145b0/bchp_common.h b/include/linux/brcmstb/7145b0/bchp_common.h +new file mode 100644 +index 00000000..893ad4f2 +--- /dev/null ++++ b/include/linux/brcmstb/7145b0/bchp_common.h +@@ -0,0 +1,6885 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Mon Oct 20 03:09:51 2014 ++ * Full Compile MD5 Checksum eb28ce4f1e21a5a2f696ae3965f6bf92 ++ * (minus title and desc) ++ * MD5 Checksum fb1aa74dc14cfad64e08221bb4891f7d ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7145_B0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xd0000000 ++#define BCHP_REGISTER_START 0x00400000 /* MBDMA_UNI3 is first */ ++#define BCHP_REGISTER_END 0x21600000 /* MEMC_SENTINEL_0_1 is last */ ++#define BCHP_REGISTER_SIZE 0x08480000 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_MBDMA_UNI3_REG_START 0x00400000 ++#define BCHP_MBDMA_UNI3_REG_END 0x00400508 ++#define BCHP_UNIMAC_INTERFACE0_UNI3_REG_START 0x00400600 ++#define BCHP_UNIMAC_INTERFACE0_UNI3_REG_END 0x00400710 ++#define BCHP_UNIMAC_CORE0_UNI3_REG_START 0x00400800 ++#define BCHP_UNIMAC_CORE0_UNI3_REG_END 0x00400b44 ++#define BCHP_MIB0_UNI3_REG_START 0x00400c00 ++#define BCHP_MIB0_UNI3_REG_END 0x00400cf4 ++#define BCHP_HFB0_UNI3_REG_START 0x00401000 ++#define BCHP_HFB0_UNI3_REG_END 0x00401ffc ++#define BCHP_DAVICMAC_DAV_REG_START 0x00600000 ++#define BCHP_DAVICMAC_DAV_REG_END 0x0060041c ++#define BCHP_DAVIC_DMA_CTRL_DAV_REG_START 0x00600800 ++#define BCHP_DAVIC_DMA_CTRL_DAV_REG_END 0x00600844 ++#define BCHP_DAVIC_DMA_CH1_DAV_REG_START 0x00600900 ++#define BCHP_DAVIC_DMA_CH1_DAV_REG_END 0x0060090c ++#define BCHP_DAVIC_DMA_CH2_DAV_REG_START 0x00600910 ++#define BCHP_DAVIC_DMA_CH2_DAV_REG_END 0x0060091c ++#define BCHP_DAVIC_DMA_CH3_DAV_REG_START 0x00600920 ++#define BCHP_DAVIC_DMA_CH3_DAV_REG_END 0x0060092c ++#define BCHP_DAVIC_DMA_CH4_DAV_REG_START 0x00600930 ++#define BCHP_DAVIC_DMA_CH4_DAV_REG_END 0x0060093c ++#define BCHP_DAVIC_DMA_CH5_DAV_REG_START 0x00600940 ++#define BCHP_DAVIC_DMA_CH5_DAV_REG_END 0x0060094c ++#define BCHP_DAVIC_DMA_CH6_DAV_REG_START 0x00600950 ++#define BCHP_DAVIC_DMA_CH6_DAV_REG_END 0x0060095c ++#define BCHP_DAVIC_DMA_CH7_DAV_REG_START 0x00600960 ++#define BCHP_DAVIC_DMA_CH7_DAV_REG_END 0x0060096c ++#define BCHP_DAVIC_DMA_CH8_DAV_REG_START 0x00600970 ++#define BCHP_DAVIC_DMA_CH8_DAV_REG_END 0x0060097c ++#define BCHP_DAVIC_DMA_CH9_DAV_REG_START 0x00600980 ++#define BCHP_DAVIC_DMA_CH9_DAV_REG_END 0x0060098c ++#define BCHP_DAVIC_DMA_CH10_DAV_REG_START 0x00600990 ++#define BCHP_DAVIC_DMA_CH10_DAV_REG_END 0x0060099c ++#define BCHP_DAVIC_DMA_CH1_STATE_DAV_REG_START 0x00600a00 ++#define BCHP_DAVIC_DMA_CH1_STATE_DAV_REG_END 0x00600a0c ++#define BCHP_DAVIC_DMA_CH2_STATE_DAV_REG_START 0x00600a10 ++#define BCHP_DAVIC_DMA_CH2_STATE_DAV_REG_END 0x00600a1c ++#define BCHP_DAVIC_DMA_CH3_STATE_DAV_REG_START 0x00600a20 ++#define BCHP_DAVIC_DMA_CH3_STATE_DAV_REG_END 0x00600a2c ++#define BCHP_DAVIC_DMA_CH4_STATE_DAV_REG_START 0x00600a30 ++#define BCHP_DAVIC_DMA_CH4_STATE_DAV_REG_END 0x00600a3c ++#define BCHP_DAVIC_DMA_CH5_STATE_DAV_REG_START 0x00600a40 ++#define BCHP_DAVIC_DMA_CH5_STATE_DAV_REG_END 0x00600a4c ++#define BCHP_DAVIC_DMA_CH6_STATE_DAV_REG_START 0x00600a50 ++#define BCHP_DAVIC_DMA_CH6_STATE_DAV_REG_END 0x00600a5c ++#define BCHP_DAVIC_DMA_CH7_STATE_DAV_REG_START 0x00600a60 ++#define BCHP_DAVIC_DMA_CH7_STATE_DAV_REG_END 0x00600a6c ++#define BCHP_DAVIC_DMA_CH8_STATE_DAV_REG_START 0x00600a70 ++#define BCHP_DAVIC_DMA_CH8_STATE_DAV_REG_END 0x00600a7c ++#define BCHP_DAVIC_DMA_CH9_STATE_DAV_REG_START 0x00600a80 ++#define BCHP_DAVIC_DMA_CH9_STATE_DAV_REG_END 0x00600a8c ++#define BCHP_DAVIC_DMA_CH10_STATE_DAV_REG_START 0x00600a90 ++#define BCHP_DAVIC_DMA_CH10_STATE_DAV_REG_END 0x00600a9c ++#define BCHP_BaseReserved_UTP_REG_START 0x00a00000 ++#define BCHP_BaseReserved_UTP_REG_END 0x00a00000 ++#define BCHP_Control_UTP_REG_START 0x00a01000 ++#define BCHP_Control_UTP_REG_END 0x00a010fc ++#define BCHP_OutgoingMessageFIFO_UTP_REG_START 0x00a01100 ++#define BCHP_OutgoingMessageFIFO_UTP_REG_END 0x00a0117c ++#define BCHP_IncomingMessageFIFO_UTP_REG_START 0x00a01200 ++#define BCHP_IncomingMessageFIFO_UTP_REG_END 0x00a0127c ++#define BCHP_DMA0_UTP_REG_START 0x00a01300 ++#define BCHP_DMA0_UTP_REG_END 0x00a0131c ++#define BCHP_DMA1_UTP_REG_START 0x00a01320 ++#define BCHP_DMA1_UTP_REG_END 0x00a0133c ++#define BCHP_Token_UTP_REG_START 0x00a01400 ++#define BCHP_Token_UTP_REG_END 0x00a0141c ++#define BCHP_PerfPower_UTP_REG_START 0x00a01600 ++#define BCHP_PerfPower_UTP_REG_END 0x00a01640 ++#define BCHP_MessageID_UTP_REG_START 0x00a01700 ++#define BCHP_MessageID_UTP_REG_END 0x00a0177c ++#define BCHP_DQM_UTP_REG_START 0x00a01800 ++#define BCHP_DQM_UTP_REG_END 0x00a01848 ++#define BCHP_HWCounters_UTP_REG_START 0x00a01900 ++#define BCHP_HWCounters_UTP_REG_END 0x00a01944 ++#define BCHP_QUEUE_0_CNTRL_UTP_REG_START 0x00a01a00 ++#define BCHP_QUEUE_0_CNTRL_UTP_REG_END 0x00a01a0c ++#define BCHP_QUEUE_1_CNTRL_UTP_REG_START 0x00a01a10 ++#define BCHP_QUEUE_1_CNTRL_UTP_REG_END 0x00a01a1c ++#define BCHP_QUEUE_2_CNTRL_UTP_REG_START 0x00a01a20 ++#define BCHP_QUEUE_2_CNTRL_UTP_REG_END 0x00a01a2c ++#define BCHP_QUEUE_3_CNTRL_UTP_REG_START 0x00a01a30 ++#define BCHP_QUEUE_3_CNTRL_UTP_REG_END 0x00a01a3c ++#define BCHP_QUEUE_4_CNTRL_UTP_REG_START 0x00a01a40 ++#define BCHP_QUEUE_4_CNTRL_UTP_REG_END 0x00a01a4c ++#define BCHP_QUEUE_5_CNTRL_UTP_REG_START 0x00a01a50 ++#define BCHP_QUEUE_5_CNTRL_UTP_REG_END 0x00a01a5c ++#define BCHP_QUEUE_6_CNTRL_UTP_REG_START 0x00a01a60 ++#define BCHP_QUEUE_6_CNTRL_UTP_REG_END 0x00a01a6c ++#define BCHP_QUEUE_7_CNTRL_UTP_REG_START 0x00a01a70 ++#define BCHP_QUEUE_7_CNTRL_UTP_REG_END 0x00a01a7c ++#define BCHP_QUEUE_8_CNTRL_UTP_REG_START 0x00a01a80 ++#define BCHP_QUEUE_8_CNTRL_UTP_REG_END 0x00a01a8c ++#define BCHP_QUEUE_9_CNTRL_UTP_REG_START 0x00a01a90 ++#define BCHP_QUEUE_9_CNTRL_UTP_REG_END 0x00a01a9c ++#define BCHP_QUEUE_10_CNTRL_UTP_REG_START 0x00a01aa0 ++#define BCHP_QUEUE_10_CNTRL_UTP_REG_END 0x00a01aac ++#define BCHP_QUEUE_11_CNTRL_UTP_REG_START 0x00a01ab0 ++#define BCHP_QUEUE_11_CNTRL_UTP_REG_END 0x00a01abc ++#define BCHP_QUEUE_12_CNTRL_UTP_REG_START 0x00a01ac0 ++#define BCHP_QUEUE_12_CNTRL_UTP_REG_END 0x00a01acc ++#define BCHP_QUEUE_13_CNTRL_UTP_REG_START 0x00a01ad0 ++#define BCHP_QUEUE_13_CNTRL_UTP_REG_END 0x00a01adc ++#define BCHP_QUEUE_14_CNTRL_UTP_REG_START 0x00a01ae0 ++#define BCHP_QUEUE_14_CNTRL_UTP_REG_END 0x00a01aec ++#define BCHP_QUEUE_15_CNTRL_UTP_REG_START 0x00a01af0 ++#define BCHP_QUEUE_15_CNTRL_UTP_REG_END 0x00a01afc ++#define BCHP_QUEUE_16_CNTRL_UTP_REG_START 0x00a01b00 ++#define BCHP_QUEUE_16_CNTRL_UTP_REG_END 0x00a01b0c ++#define BCHP_QUEUE_17_CNTRL_UTP_REG_START 0x00a01b10 ++#define BCHP_QUEUE_17_CNTRL_UTP_REG_END 0x00a01b1c ++#define BCHP_QUEUE_18_CNTRL_UTP_REG_START 0x00a01b20 ++#define BCHP_QUEUE_18_CNTRL_UTP_REG_END 0x00a01b2c ++#define BCHP_QUEUE_19_CNTRL_UTP_REG_START 0x00a01b30 ++#define BCHP_QUEUE_19_CNTRL_UTP_REG_END 0x00a01b3c ++#define BCHP_QUEUE_20_CNTRL_UTP_REG_START 0x00a01b40 ++#define BCHP_QUEUE_20_CNTRL_UTP_REG_END 0x00a01b4c ++#define BCHP_QUEUE_21_CNTRL_UTP_REG_START 0x00a01b50 ++#define BCHP_QUEUE_21_CNTRL_UTP_REG_END 0x00a01b5c ++#define BCHP_QUEUE_22_CNTRL_UTP_REG_START 0x00a01b60 ++#define BCHP_QUEUE_22_CNTRL_UTP_REG_END 0x00a01b6c ++#define BCHP_QUEUE_23_CNTRL_UTP_REG_START 0x00a01b70 ++#define BCHP_QUEUE_23_CNTRL_UTP_REG_END 0x00a01b7c ++#define BCHP_QUEUE_24_CNTRL_UTP_REG_START 0x00a01b80 ++#define BCHP_QUEUE_24_CNTRL_UTP_REG_END 0x00a01b8c ++#define BCHP_QUEUE_25_CNTRL_UTP_REG_START 0x00a01b90 ++#define BCHP_QUEUE_25_CNTRL_UTP_REG_END 0x00a01b9c ++#define BCHP_QUEUE_26_CNTRL_UTP_REG_START 0x00a01ba0 ++#define BCHP_QUEUE_26_CNTRL_UTP_REG_END 0x00a01bac ++#define BCHP_QUEUE_27_CNTRL_UTP_REG_START 0x00a01bb0 ++#define BCHP_QUEUE_27_CNTRL_UTP_REG_END 0x00a01bbc ++#define BCHP_QUEUE_28_CNTRL_UTP_REG_START 0x00a01bc0 ++#define BCHP_QUEUE_28_CNTRL_UTP_REG_END 0x00a01bcc ++#define BCHP_QUEUE_29_CNTRL_UTP_REG_START 0x00a01bd0 ++#define BCHP_QUEUE_29_CNTRL_UTP_REG_END 0x00a01bdc ++#define BCHP_QUEUE_30_CNTRL_UTP_REG_START 0x00a01be0 ++#define BCHP_QUEUE_30_CNTRL_UTP_REG_END 0x00a01bec ++#define BCHP_QUEUE_31_CNTRL_UTP_REG_START 0x00a01bf0 ++#define BCHP_QUEUE_31_CNTRL_UTP_REG_END 0x00a01bfc ++#define BCHP_QUEUE_0_DATA_UTP_REG_START 0x00a01c00 ++#define BCHP_QUEUE_0_DATA_UTP_REG_END 0x00a01c0c ++#define BCHP_QUEUE_1_DATA_UTP_REG_START 0x00a01c10 ++#define BCHP_QUEUE_1_DATA_UTP_REG_END 0x00a01c1c ++#define BCHP_QUEUE_2_DATA_UTP_REG_START 0x00a01c20 ++#define BCHP_QUEUE_2_DATA_UTP_REG_END 0x00a01c2c ++#define BCHP_QUEUE_3_DATA_UTP_REG_START 0x00a01c30 ++#define BCHP_QUEUE_3_DATA_UTP_REG_END 0x00a01c3c ++#define BCHP_QUEUE_4_DATA_UTP_REG_START 0x00a01c40 ++#define BCHP_QUEUE_4_DATA_UTP_REG_END 0x00a01c4c ++#define BCHP_QUEUE_5_DATA_UTP_REG_START 0x00a01c50 ++#define BCHP_QUEUE_5_DATA_UTP_REG_END 0x00a01c5c ++#define BCHP_QUEUE_6_DATA_UTP_REG_START 0x00a01c60 ++#define BCHP_QUEUE_6_DATA_UTP_REG_END 0x00a01c6c ++#define BCHP_QUEUE_7_DATA_UTP_REG_START 0x00a01c70 ++#define BCHP_QUEUE_7_DATA_UTP_REG_END 0x00a01c7c ++#define BCHP_QUEUE_8_DATA_UTP_REG_START 0x00a01c80 ++#define BCHP_QUEUE_8_DATA_UTP_REG_END 0x00a01c8c ++#define BCHP_QUEUE_9_DATA_UTP_REG_START 0x00a01c90 ++#define BCHP_QUEUE_9_DATA_UTP_REG_END 0x00a01c9c ++#define BCHP_QUEUE_10_DATA_UTP_REG_START 0x00a01ca0 ++#define BCHP_QUEUE_10_DATA_UTP_REG_END 0x00a01cac ++#define BCHP_QUEUE_11_DATA_UTP_REG_START 0x00a01cb0 ++#define BCHP_QUEUE_11_DATA_UTP_REG_END 0x00a01cbc ++#define BCHP_QUEUE_12_DATA_UTP_REG_START 0x00a01cc0 ++#define BCHP_QUEUE_12_DATA_UTP_REG_END 0x00a01ccc ++#define BCHP_QUEUE_13_DATA_UTP_REG_START 0x00a01cd0 ++#define BCHP_QUEUE_13_DATA_UTP_REG_END 0x00a01cdc ++#define BCHP_QUEUE_14_DATA_UTP_REG_START 0x00a01ce0 ++#define BCHP_QUEUE_14_DATA_UTP_REG_END 0x00a01cec ++#define BCHP_QUEUE_15_DATA_UTP_REG_START 0x00a01cf0 ++#define BCHP_QUEUE_15_DATA_UTP_REG_END 0x00a01cfc ++#define BCHP_QUEUE_16_DATA_UTP_REG_START 0x00a01d00 ++#define BCHP_QUEUE_16_DATA_UTP_REG_END 0x00a01d0c ++#define BCHP_QUEUE_17_DATA_UTP_REG_START 0x00a01d10 ++#define BCHP_QUEUE_17_DATA_UTP_REG_END 0x00a01d1c ++#define BCHP_QUEUE_18_DATA_UTP_REG_START 0x00a01d20 ++#define BCHP_QUEUE_18_DATA_UTP_REG_END 0x00a01d2c ++#define BCHP_QUEUE_19_DATA_UTP_REG_START 0x00a01d30 ++#define BCHP_QUEUE_19_DATA_UTP_REG_END 0x00a01d3c ++#define BCHP_QUEUE_20_DATA_UTP_REG_START 0x00a01d40 ++#define BCHP_QUEUE_20_DATA_UTP_REG_END 0x00a01d4c ++#define BCHP_QUEUE_21_DATA_UTP_REG_START 0x00a01d50 ++#define BCHP_QUEUE_21_DATA_UTP_REG_END 0x00a01d5c ++#define BCHP_QUEUE_22_DATA_UTP_REG_START 0x00a01d60 ++#define BCHP_QUEUE_22_DATA_UTP_REG_END 0x00a01d6c ++#define BCHP_QUEUE_23_DATA_UTP_REG_START 0x00a01d70 ++#define BCHP_QUEUE_23_DATA_UTP_REG_END 0x00a01d7c ++#define BCHP_QUEUE_24_DATA_UTP_REG_START 0x00a01d80 ++#define BCHP_QUEUE_24_DATA_UTP_REG_END 0x00a01d8c ++#define BCHP_QUEUE_25_DATA_UTP_REG_START 0x00a01d90 ++#define BCHP_QUEUE_25_DATA_UTP_REG_END 0x00a01d9c ++#define BCHP_QUEUE_26_DATA_UTP_REG_START 0x00a01da0 ++#define BCHP_QUEUE_26_DATA_UTP_REG_END 0x00a01dac ++#define BCHP_QUEUE_27_DATA_UTP_REG_START 0x00a01db0 ++#define BCHP_QUEUE_27_DATA_UTP_REG_END 0x00a01dbc ++#define BCHP_QUEUE_28_DATA_UTP_REG_START 0x00a01dc0 ++#define BCHP_QUEUE_28_DATA_UTP_REG_END 0x00a01dcc ++#define BCHP_QUEUE_29_DATA_UTP_REG_START 0x00a01dd0 ++#define BCHP_QUEUE_29_DATA_UTP_REG_END 0x00a01ddc ++#define BCHP_QUEUE_30_DATA_UTP_REG_START 0x00a01de0 ++#define BCHP_QUEUE_30_DATA_UTP_REG_END 0x00a01dec ++#define BCHP_QUEUE_31_DATA_UTP_REG_START 0x00a01df0 ++#define BCHP_QUEUE_31_DATA_UTP_REG_END 0x00a01dfc ++#define BCHP_QUEUE_STATUS_UTP_REG_START 0x00a01f00 ++#define BCHP_QUEUE_STATUS_UTP_REG_END 0x00a01f7c ++#define BCHP_QUEUE_MIB_UTP_REG_START 0x00a02000 ++#define BCHP_QUEUE_MIB_UTP_REG_END 0x00a0217c ++#define BCHP_DQM_LITE_UTP_REG_START 0x00a02200 ++#define BCHP_DQM_LITE_UTP_REG_END 0x00a02248 ++#define BCHP_QUEUE_0_CNTRL_LITE_UTP_REG_START 0x00a02400 ++#define BCHP_QUEUE_0_CNTRL_LITE_UTP_REG_END 0x00a0240c ++#define BCHP_QUEUE_1_CNTRL_LITE_UTP_REG_START 0x00a02410 ++#define BCHP_QUEUE_1_CNTRL_LITE_UTP_REG_END 0x00a0241c ++#define BCHP_QUEUE_2_CNTRL_LITE_UTP_REG_START 0x00a02420 ++#define BCHP_QUEUE_2_CNTRL_LITE_UTP_REG_END 0x00a0242c ++#define BCHP_QUEUE_3_CNTRL_LITE_UTP_REG_START 0x00a02430 ++#define BCHP_QUEUE_3_CNTRL_LITE_UTP_REG_END 0x00a0243c ++#define BCHP_QUEUE_4_CNTRL_LITE_UTP_REG_START 0x00a02440 ++#define BCHP_QUEUE_4_CNTRL_LITE_UTP_REG_END 0x00a0244c ++#define BCHP_QUEUE_5_CNTRL_LITE_UTP_REG_START 0x00a02450 ++#define BCHP_QUEUE_5_CNTRL_LITE_UTP_REG_END 0x00a0245c ++#define BCHP_QUEUE_6_CNTRL_LITE_UTP_REG_START 0x00a02460 ++#define BCHP_QUEUE_6_CNTRL_LITE_UTP_REG_END 0x00a0246c ++#define BCHP_QUEUE_7_CNTRL_LITE_UTP_REG_START 0x00a02470 ++#define BCHP_QUEUE_7_CNTRL_LITE_UTP_REG_END 0x00a0247c ++#define BCHP_QUEUE_8_CNTRL_LITE_UTP_REG_START 0x00a02480 ++#define BCHP_QUEUE_8_CNTRL_LITE_UTP_REG_END 0x00a0248c ++#define BCHP_QUEUE_9_CNTRL_LITE_UTP_REG_START 0x00a02490 ++#define BCHP_QUEUE_9_CNTRL_LITE_UTP_REG_END 0x00a0249c ++#define BCHP_QUEUE_10_CNTRL_LITE_UTP_REG_START 0x00a024a0 ++#define BCHP_QUEUE_10_CNTRL_LITE_UTP_REG_END 0x00a024ac ++#define BCHP_QUEUE_11_CNTRL_LITE_UTP_REG_START 0x00a024b0 ++#define BCHP_QUEUE_11_CNTRL_LITE_UTP_REG_END 0x00a024bc ++#define BCHP_QUEUE_12_CNTRL_LITE_UTP_REG_START 0x00a024c0 ++#define BCHP_QUEUE_12_CNTRL_LITE_UTP_REG_END 0x00a024cc ++#define BCHP_QUEUE_13_CNTRL_LITE_UTP_REG_START 0x00a024d0 ++#define BCHP_QUEUE_13_CNTRL_LITE_UTP_REG_END 0x00a024dc ++#define BCHP_QUEUE_14_CNTRL_LITE_UTP_REG_START 0x00a024e0 ++#define BCHP_QUEUE_14_CNTRL_LITE_UTP_REG_END 0x00a024ec ++#define BCHP_QUEUE_15_CNTRL_LITE_UTP_REG_START 0x00a024f0 ++#define BCHP_QUEUE_15_CNTRL_LITE_UTP_REG_END 0x00a024fc ++#define BCHP_QUEUE_0_DATA_LITE_UTP_REG_START 0x00a02600 ++#define BCHP_QUEUE_0_DATA_LITE_UTP_REG_END 0x00a0260c ++#define BCHP_QUEUE_1_DATA_LITE_UTP_REG_START 0x00a02610 ++#define BCHP_QUEUE_1_DATA_LITE_UTP_REG_END 0x00a0261c ++#define BCHP_QUEUE_2_DATA_LITE_UTP_REG_START 0x00a02620 ++#define BCHP_QUEUE_2_DATA_LITE_UTP_REG_END 0x00a0262c ++#define BCHP_QUEUE_3_DATA_LITE_UTP_REG_START 0x00a02630 ++#define BCHP_QUEUE_3_DATA_LITE_UTP_REG_END 0x00a0263c ++#define BCHP_QUEUE_4_DATA_LITE_UTP_REG_START 0x00a02640 ++#define BCHP_QUEUE_4_DATA_LITE_UTP_REG_END 0x00a0264c ++#define BCHP_QUEUE_5_DATA_LITE_UTP_REG_START 0x00a02650 ++#define BCHP_QUEUE_5_DATA_LITE_UTP_REG_END 0x00a0265c ++#define BCHP_QUEUE_6_DATA_LITE_UTP_REG_START 0x00a02660 ++#define BCHP_QUEUE_6_DATA_LITE_UTP_REG_END 0x00a0266c ++#define BCHP_QUEUE_7_DATA_LITE_UTP_REG_START 0x00a02670 ++#define BCHP_QUEUE_7_DATA_LITE_UTP_REG_END 0x00a0267c ++#define BCHP_QUEUE_8_DATA_LITE_UTP_REG_START 0x00a02680 ++#define BCHP_QUEUE_8_DATA_LITE_UTP_REG_END 0x00a0268c ++#define BCHP_QUEUE_9_DATA_LITE_UTP_REG_START 0x00a02690 ++#define BCHP_QUEUE_9_DATA_LITE_UTP_REG_END 0x00a0269c ++#define BCHP_QUEUE_10_DATA_LITE_UTP_REG_START 0x00a026a0 ++#define BCHP_QUEUE_10_DATA_LITE_UTP_REG_END 0x00a026ac ++#define BCHP_QUEUE_11_DATA_LITE_UTP_REG_START 0x00a026b0 ++#define BCHP_QUEUE_11_DATA_LITE_UTP_REG_END 0x00a026bc ++#define BCHP_QUEUE_12_DATA_LITE_UTP_REG_START 0x00a026c0 ++#define BCHP_QUEUE_12_DATA_LITE_UTP_REG_END 0x00a026cc ++#define BCHP_QUEUE_13_DATA_LITE_UTP_REG_START 0x00a026d0 ++#define BCHP_QUEUE_13_DATA_LITE_UTP_REG_END 0x00a026dc ++#define BCHP_QUEUE_14_DATA_LITE_UTP_REG_START 0x00a026e0 ++#define BCHP_QUEUE_14_DATA_LITE_UTP_REG_END 0x00a026ec ++#define BCHP_QUEUE_15_DATA_LITE_UTP_REG_START 0x00a026f0 ++#define BCHP_QUEUE_15_DATA_LITE_UTP_REG_END 0x00a026fc ++#define BCHP_QUEUE_STATUS_LITE_UTP_REG_START 0x00a02900 ++#define BCHP_QUEUE_STATUS_LITE_UTP_REG_END 0x00a0293c ++#define BCHP_QUEUE_MIB_LITE_UTP_REG_START 0x00a02a00 ++#define BCHP_QUEUE_MIB_LITE_UTP_REG_END 0x00a02b3c ++#define BCHP_SharedMem_UTP_REG_START 0x00a04000 ++#define BCHP_SharedMem_UTP_REG_END 0x00a0fffc ++#define BCHP_Memory_UTP_REG_START 0x00a14000 ++#define BCHP_Memory_UTP_REG_END 0x00a17ffc ++#define BCHP_QListMem_UTP_REG_START 0x00a40000 ++#define BCHP_QListMem_UTP_REG_END 0x00a43ffc ++#define BCHP_QueueListConfig_UTP_REG_START 0x00a45000 ++#define BCHP_QueueListConfig_UTP_REG_END 0x00a4521c ++#define BCHP_QiThreshold_UTP_REG_START 0x00a45400 ++#define BCHP_QiThreshold_UTP_REG_END 0x00a4547c ++#define BCHP_AckCelMaxCnt_UTP_REG_START 0x00a45500 ++#define BCHP_AckCelMaxCnt_UTP_REG_END 0x00a4553c ++#define BCHP_MIBs_UTP_REG_START 0x00a45600 ++#define BCHP_MIBs_UTP_REG_END 0x00a45618 ++#define BCHP_UTPIncomingMessageFIFO_UTP_REG_START 0x00a45700 ++#define BCHP_UTPIncomingMessageFIFO_UTP_REG_END 0x00a45740 ++#define BCHP_QueueListHeadTail_UTP_REG_START 0x00a45800 ++#define BCHP_QueueListHeadTail_UTP_REG_END 0x00a458fc ++#define BCHP_TokenInsertion_UTP_REG_START 0x00a45a00 ++#define BCHP_TokenInsertion_UTP_REG_END 0x00a45a1c ++#define BCHP_TokenDeletion_UTP_REG_START 0x00a45a20 ++#define BCHP_TokenDeletion_UTP_REG_END 0x00a45a30 ++#define BCHP_TamMisc_UTP_REG_START 0x00a45a40 ++#define BCHP_TamMisc_UTP_REG_END 0x00a45a8c ++#define BCHP_QueueAvailSize_UTP_REG_START 0x00a45b00 ++#define BCHP_QueueAvailSize_UTP_REG_END 0x00a45bfc ++#define BCHP_UTPMaxRate_FLOW0_UTP_REG_START 0x00a45c00 ++#define BCHP_UTPMaxRate_FLOW0_UTP_REG_END 0x00a45c0c ++#define BCHP_UTPMaxRate_FLOW1_UTP_REG_START 0x00a45c10 ++#define BCHP_UTPMaxRate_FLOW1_UTP_REG_END 0x00a45c1c ++#define BCHP_UTPMaxRate_FLOW2_UTP_REG_START 0x00a45c20 ++#define BCHP_UTPMaxRate_FLOW2_UTP_REG_END 0x00a45c2c ++#define BCHP_UTPMaxRate_FLOW3_UTP_REG_START 0x00a45c30 ++#define BCHP_UTPMaxRate_FLOW3_UTP_REG_END 0x00a45c3c ++#define BCHP_UTPMaxRate_FLOW4_UTP_REG_START 0x00a45c40 ++#define BCHP_UTPMaxRate_FLOW4_UTP_REG_END 0x00a45c4c ++#define BCHP_UTPMaxRate_FLOW5_UTP_REG_START 0x00a45c50 ++#define BCHP_UTPMaxRate_FLOW5_UTP_REG_END 0x00a45c5c ++#define BCHP_UTPMaxRate_FLOW6_UTP_REG_START 0x00a45c60 ++#define BCHP_UTPMaxRate_FLOW6_UTP_REG_END 0x00a45c6c ++#define BCHP_UTPMaxRate_FLOW7_UTP_REG_START 0x00a45c70 ++#define BCHP_UTPMaxRate_FLOW7_UTP_REG_END 0x00a45c7c ++#define BCHP_UTPMaxRate_FLOW8_UTP_REG_START 0x00a45c80 ++#define BCHP_UTPMaxRate_FLOW8_UTP_REG_END 0x00a45c8c ++#define BCHP_UTPMaxRate_FLOW9_UTP_REG_START 0x00a45c90 ++#define BCHP_UTPMaxRate_FLOW9_UTP_REG_END 0x00a45c9c ++#define BCHP_UTPMaxRate_FLOW10_UTP_REG_START 0x00a45ca0 ++#define BCHP_UTPMaxRate_FLOW10_UTP_REG_END 0x00a45cac ++#define BCHP_UTPMaxRate_FLOW11_UTP_REG_START 0x00a45cb0 ++#define BCHP_UTPMaxRate_FLOW11_UTP_REG_END 0x00a45cbc ++#define BCHP_UTPMaxRate_FLOW12_UTP_REG_START 0x00a45cc0 ++#define BCHP_UTPMaxRate_FLOW12_UTP_REG_END 0x00a45ccc ++#define BCHP_UTPMaxRate_FLOW13_UTP_REG_START 0x00a45cd0 ++#define BCHP_UTPMaxRate_FLOW13_UTP_REG_END 0x00a45cdc ++#define BCHP_UTPMaxRate_FLOW14_UTP_REG_START 0x00a45ce0 ++#define BCHP_UTPMaxRate_FLOW14_UTP_REG_END 0x00a45cec ++#define BCHP_UTPMaxRate_FLOW15_UTP_REG_START 0x00a45cf0 ++#define BCHP_UTPMaxRate_FLOW15_UTP_REG_END 0x00a45cfc ++#define BCHP_UTPPeakRate_FLOW0_UTP_REG_START 0x00a45d00 ++#define BCHP_UTPPeakRate_FLOW0_UTP_REG_END 0x00a45d0c ++#define BCHP_UTPPeakRate_FLOW1_UTP_REG_START 0x00a45d10 ++#define BCHP_UTPPeakRate_FLOW1_UTP_REG_END 0x00a45d1c ++#define BCHP_UTPPeakRate_FLOW2_UTP_REG_START 0x00a45d20 ++#define BCHP_UTPPeakRate_FLOW2_UTP_REG_END 0x00a45d2c ++#define BCHP_UTPPeakRate_FLOW3_UTP_REG_START 0x00a45d30 ++#define BCHP_UTPPeakRate_FLOW3_UTP_REG_END 0x00a45d3c ++#define BCHP_UTPPeakRate_FLOW4_UTP_REG_START 0x00a45d40 ++#define BCHP_UTPPeakRate_FLOW4_UTP_REG_END 0x00a45d4c ++#define BCHP_UTPPeakRate_FLOW5_UTP_REG_START 0x00a45d50 ++#define BCHP_UTPPeakRate_FLOW5_UTP_REG_END 0x00a45d5c ++#define BCHP_UTPPeakRate_FLOW6_UTP_REG_START 0x00a45d60 ++#define BCHP_UTPPeakRate_FLOW6_UTP_REG_END 0x00a45d6c ++#define BCHP_UTPPeakRate_FLOW7_UTP_REG_START 0x00a45d70 ++#define BCHP_UTPPeakRate_FLOW7_UTP_REG_END 0x00a45d7c ++#define BCHP_UTPPeakRate_FLOW8_UTP_REG_START 0x00a45d80 ++#define BCHP_UTPPeakRate_FLOW8_UTP_REG_END 0x00a45d8c ++#define BCHP_UTPPeakRate_FLOW9_UTP_REG_START 0x00a45d90 ++#define BCHP_UTPPeakRate_FLOW9_UTP_REG_END 0x00a45d9c ++#define BCHP_UTPPeakRate_FLOW10_UTP_REG_START 0x00a45da0 ++#define BCHP_UTPPeakRate_FLOW10_UTP_REG_END 0x00a45dac ++#define BCHP_UTPPeakRate_FLOW11_UTP_REG_START 0x00a45db0 ++#define BCHP_UTPPeakRate_FLOW11_UTP_REG_END 0x00a45dbc ++#define BCHP_UTPPeakRate_FLOW12_UTP_REG_START 0x00a45dc0 ++#define BCHP_UTPPeakRate_FLOW12_UTP_REG_END 0x00a45dcc ++#define BCHP_UTPPeakRate_FLOW13_UTP_REG_START 0x00a45dd0 ++#define BCHP_UTPPeakRate_FLOW13_UTP_REG_END 0x00a45ddc ++#define BCHP_UTPPeakRate_FLOW14_UTP_REG_START 0x00a45de0 ++#define BCHP_UTPPeakRate_FLOW14_UTP_REG_END 0x00a45dec ++#define BCHP_UTPPeakRate_FLOW15_UTP_REG_START 0x00a45df0 ++#define BCHP_UTPPeakRate_FLOW15_UTP_REG_END 0x00a45dfc ++#define BCHP_UTPTimer_0_UTP_REG_START 0x00a45e00 ++#define BCHP_UTPTimer_0_UTP_REG_END 0x00a45e04 ++#define BCHP_UTPTimer_1_UTP_REG_START 0x00a45e08 ++#define BCHP_UTPTimer_1_UTP_REG_END 0x00a45e0c ++#define BCHP_UTPTimer_2_UTP_REG_START 0x00a45e10 ++#define BCHP_UTPTimer_2_UTP_REG_END 0x00a45e14 ++#define BCHP_UTPTimer_3_UTP_REG_START 0x00a45e18 ++#define BCHP_UTPTimer_3_UTP_REG_END 0x00a45e1c ++#define BCHP_UTPTimer_4_UTP_REG_START 0x00a45e20 ++#define BCHP_UTPTimer_4_UTP_REG_END 0x00a45e24 ++#define BCHP_UTPTimer_5_UTP_REG_START 0x00a45e28 ++#define BCHP_UTPTimer_5_UTP_REG_END 0x00a45e2c ++#define BCHP_UTPTimer_6_UTP_REG_START 0x00a45e30 ++#define BCHP_UTPTimer_6_UTP_REG_END 0x00a45e34 ++#define BCHP_UTPTimer_7_UTP_REG_START 0x00a45e38 ++#define BCHP_UTPTimer_7_UTP_REG_END 0x00a45e3c ++#define BCHP_UTPTimer_8_UTP_REG_START 0x00a45e40 ++#define BCHP_UTPTimer_8_UTP_REG_END 0x00a45e44 ++#define BCHP_UTPTimer_9_UTP_REG_START 0x00a45e48 ++#define BCHP_UTPTimer_9_UTP_REG_END 0x00a45e4c ++#define BCHP_UTPTimer_10_UTP_REG_START 0x00a45e50 ++#define BCHP_UTPTimer_10_UTP_REG_END 0x00a45e54 ++#define BCHP_UTPTimer_11_UTP_REG_START 0x00a45e58 ++#define BCHP_UTPTimer_11_UTP_REG_END 0x00a45e5c ++#define BCHP_UTPTimer_12_UTP_REG_START 0x00a45e60 ++#define BCHP_UTPTimer_12_UTP_REG_END 0x00a45e64 ++#define BCHP_UTPTimer_13_UTP_REG_START 0x00a45e68 ++#define BCHP_UTPTimer_13_UTP_REG_END 0x00a45e6c ++#define BCHP_UTPTimer_14_UTP_REG_START 0x00a45e70 ++#define BCHP_UTPTimer_14_UTP_REG_END 0x00a45e74 ++#define BCHP_UTPTimer_15_UTP_REG_START 0x00a45e78 ++#define BCHP_UTPTimer_15_UTP_REG_END 0x00a45e7c ++#define BCHP_UTPTimer_16_UTP_REG_START 0x00a45e80 ++#define BCHP_UTPTimer_16_UTP_REG_END 0x00a45e84 ++#define BCHP_UTPBytesSent_FLOW0_UTP_REG_START 0x00a45f80 ++#define BCHP_UTPBytesSent_FLOW0_UTP_REG_END 0x00a45f84 ++#define BCHP_UTPBytesSent_FLOW1_UTP_REG_START 0x00a45f88 ++#define BCHP_UTPBytesSent_FLOW1_UTP_REG_END 0x00a45f8c ++#define BCHP_UTPBytesSent_FLOW2_UTP_REG_START 0x00a45f90 ++#define BCHP_UTPBytesSent_FLOW2_UTP_REG_END 0x00a45f94 ++#define BCHP_UTPBytesSent_FLOW3_UTP_REG_START 0x00a45f98 ++#define BCHP_UTPBytesSent_FLOW3_UTP_REG_END 0x00a45f9c ++#define BCHP_UTPBytesSent_FLOW4_UTP_REG_START 0x00a45fa0 ++#define BCHP_UTPBytesSent_FLOW4_UTP_REG_END 0x00a45fa4 ++#define BCHP_UTPBytesSent_FLOW5_UTP_REG_START 0x00a45fa8 ++#define BCHP_UTPBytesSent_FLOW5_UTP_REG_END 0x00a45fac ++#define BCHP_UTPBytesSent_FLOW6_UTP_REG_START 0x00a45fb0 ++#define BCHP_UTPBytesSent_FLOW6_UTP_REG_END 0x00a45fb4 ++#define BCHP_UTPBytesSent_FLOW7_UTP_REG_START 0x00a45fb8 ++#define BCHP_UTPBytesSent_FLOW7_UTP_REG_END 0x00a45fbc ++#define BCHP_UTPBytesSent_FLOW8_UTP_REG_START 0x00a45fc0 ++#define BCHP_UTPBytesSent_FLOW8_UTP_REG_END 0x00a45fc4 ++#define BCHP_UTPBytesSent_FLOW9_UTP_REG_START 0x00a45fc8 ++#define BCHP_UTPBytesSent_FLOW9_UTP_REG_END 0x00a45fcc ++#define BCHP_UTPBytesSent_FLOW10_UTP_REG_START 0x00a45fd0 ++#define BCHP_UTPBytesSent_FLOW10_UTP_REG_END 0x00a45fd4 ++#define BCHP_UTPBytesSent_FLOW11_UTP_REG_START 0x00a45fd8 ++#define BCHP_UTPBytesSent_FLOW11_UTP_REG_END 0x00a45fdc ++#define BCHP_UTPBytesSent_FLOW12_UTP_REG_START 0x00a45fe0 ++#define BCHP_UTPBytesSent_FLOW12_UTP_REG_END 0x00a45fe4 ++#define BCHP_UTPBytesSent_FLOW13_UTP_REG_START 0x00a45fe8 ++#define BCHP_UTPBytesSent_FLOW13_UTP_REG_END 0x00a45fec ++#define BCHP_UTPBytesSent_FLOW14_UTP_REG_START 0x00a45ff0 ++#define BCHP_UTPBytesSent_FLOW14_UTP_REG_END 0x00a45ff4 ++#define BCHP_UTPBytesSent_FLOW15_UTP_REG_START 0x00a45ff8 ++#define BCHP_UTPBytesSent_FLOW15_UTP_REG_END 0x00a45ffc ++#define BCHP_UTPTokensInserted0_UTP_REG_START 0x00a46000 ++#define BCHP_UTPTokensInserted0_UTP_REG_END 0x00a46004 ++#define BCHP_UTPTokensInserted1_UTP_REG_START 0x00a46008 ++#define BCHP_UTPTokensInserted1_UTP_REG_END 0x00a4600c ++#define BCHP_UTPTokensInserted2_UTP_REG_START 0x00a46010 ++#define BCHP_UTPTokensInserted2_UTP_REG_END 0x00a46014 ++#define BCHP_UTPTokensInserted3_UTP_REG_START 0x00a46018 ++#define BCHP_UTPTokensInserted3_UTP_REG_END 0x00a4601c ++#define BCHP_UTPTokensInserted4_UTP_REG_START 0x00a46020 ++#define BCHP_UTPTokensInserted4_UTP_REG_END 0x00a46024 ++#define BCHP_UTPTokensInserted5_UTP_REG_START 0x00a46028 ++#define BCHP_UTPTokensInserted5_UTP_REG_END 0x00a4602c ++#define BCHP_UTPTokensInserted6_UTP_REG_START 0x00a46030 ++#define BCHP_UTPTokensInserted6_UTP_REG_END 0x00a46034 ++#define BCHP_UTPTokensInserted7_UTP_REG_START 0x00a46038 ++#define BCHP_UTPTokensInserted7_UTP_REG_END 0x00a4603c ++#define BCHP_UTPTokensInserted8_UTP_REG_START 0x00a46040 ++#define BCHP_UTPTokensInserted8_UTP_REG_END 0x00a46044 ++#define BCHP_UTPTokensInserted9_UTP_REG_START 0x00a46048 ++#define BCHP_UTPTokensInserted9_UTP_REG_END 0x00a4604c ++#define BCHP_UTPTokensInserted10_UTP_REG_START 0x00a46050 ++#define BCHP_UTPTokensInserted10_UTP_REG_END 0x00a46054 ++#define BCHP_UTPTokensInserted11_UTP_REG_START 0x00a46058 ++#define BCHP_UTPTokensInserted11_UTP_REG_END 0x00a4605c ++#define BCHP_UTPTokensInserted12_UTP_REG_START 0x00a46060 ++#define BCHP_UTPTokensInserted12_UTP_REG_END 0x00a46064 ++#define BCHP_UTPTokensInserted13_UTP_REG_START 0x00a46068 ++#define BCHP_UTPTokensInserted13_UTP_REG_END 0x00a4606c ++#define BCHP_UTPTokensInserted14_UTP_REG_START 0x00a46070 ++#define BCHP_UTPTokensInserted14_UTP_REG_END 0x00a46074 ++#define BCHP_UTPTokensInserted15_UTP_REG_START 0x00a46078 ++#define BCHP_UTPTokensInserted15_UTP_REG_END 0x00a4607c ++#define BCHP_UTPTokensInserted16_UTP_REG_START 0x00a46080 ++#define BCHP_UTPTokensInserted16_UTP_REG_END 0x00a46084 ++#define BCHP_UTPTokensInserted17_UTP_REG_START 0x00a46088 ++#define BCHP_UTPTokensInserted17_UTP_REG_END 0x00a4608c ++#define BCHP_UTPTokensInserted18_UTP_REG_START 0x00a46090 ++#define BCHP_UTPTokensInserted18_UTP_REG_END 0x00a46094 ++#define BCHP_UTPTokensInserted19_UTP_REG_START 0x00a46098 ++#define BCHP_UTPTokensInserted19_UTP_REG_END 0x00a4609c ++#define BCHP_UTPTokensInserted20_UTP_REG_START 0x00a460a0 ++#define BCHP_UTPTokensInserted20_UTP_REG_END 0x00a460a4 ++#define BCHP_UTPTokensInserted21_UTP_REG_START 0x00a460a8 ++#define BCHP_UTPTokensInserted21_UTP_REG_END 0x00a460ac ++#define BCHP_UTPTokensInserted22_UTP_REG_START 0x00a460b0 ++#define BCHP_UTPTokensInserted22_UTP_REG_END 0x00a460b4 ++#define BCHP_UTPTokensInserted23_UTP_REG_START 0x00a460b8 ++#define BCHP_UTPTokensInserted23_UTP_REG_END 0x00a460bc ++#define BCHP_UTPTokensInserted24_UTP_REG_START 0x00a460c0 ++#define BCHP_UTPTokensInserted24_UTP_REG_END 0x00a460c4 ++#define BCHP_UTPTokensInserted25_UTP_REG_START 0x00a460c8 ++#define BCHP_UTPTokensInserted25_UTP_REG_END 0x00a460cc ++#define BCHP_UTPTokensInserted26_UTP_REG_START 0x00a460d0 ++#define BCHP_UTPTokensInserted26_UTP_REG_END 0x00a460d4 ++#define BCHP_UTPTokensInserted27_UTP_REG_START 0x00a460d8 ++#define BCHP_UTPTokensInserted27_UTP_REG_END 0x00a460dc ++#define BCHP_UTPTokensInserted28_UTP_REG_START 0x00a460e0 ++#define BCHP_UTPTokensInserted28_UTP_REG_END 0x00a460e4 ++#define BCHP_UTPTokensInserted29_UTP_REG_START 0x00a460e8 ++#define BCHP_UTPTokensInserted29_UTP_REG_END 0x00a460ec ++#define BCHP_UTPTokensInserted30_UTP_REG_START 0x00a460f0 ++#define BCHP_UTPTokensInserted30_UTP_REG_END 0x00a460f4 ++#define BCHP_UTPTokensInserted31_UTP_REG_START 0x00a460f8 ++#define BCHP_UTPTokensInserted31_UTP_REG_END 0x00a460fc ++#define BCHP_UTPTokensDeleted_UTP_REG_START 0x00a46100 ++#define BCHP_UTPTokensDeleted_UTP_REG_END 0x00a4617c ++#define BCHP_UTPTokensReplaced_UTP_REG_START 0x00a46180 ++#define BCHP_UTPTokensReplaced_UTP_REG_END 0x00a461fc ++#define BCHP_IncMsgFifoCntr_UTP_REG_START 0x00a46200 ++#define BCHP_IncMsgFifoCntr_UTP_REG_END 0x00a4627c ++#define BCHP_UTPAutoDelete_UTP_REG_START 0x00a46400 ++#define BCHP_UTPAutoDelete_UTP_REG_END 0x00a4640c ++#define BCHP_TokenMem_UTP_REG_START 0x00a50000 ++#define BCHP_TokenMem_UTP_REG_END 0x00a5fffc ++#define BCHP_SEGDMA_CONFIG_UTP_REG_START 0x00a80000 ++#define BCHP_SEGDMA_CONFIG_UTP_REG_END 0x00a8003c ++#define BCHP_SEGDMA_IRQ_HOST_UTP_REG_START 0x00a80100 ++#define BCHP_SEGDMA_IRQ_HOST_UTP_REG_END 0x00a8013c ++#define BCHP_SEGDMA_IRQ_UTP_UTP_REG_START 0x00a80200 ++#define BCHP_SEGDMA_IRQ_UTP_UTP_REG_END 0x00a8023c ++#define BCHP_SEGDMA_STAT_UTP_REG_START 0x00a80300 ++#define BCHP_SEGDMA_STAT_UTP_REG_END 0x00a8038c ++#define BCHP_SEGDMA_TEST_UTP_REG_START 0x00a80400 ++#define BCHP_SEGDMA_TEST_UTP_REG_END 0x00a8045c ++#define BCHP_SEGDMA_CHAN0_UTP_REG_START 0x00a81000 ++#define BCHP_SEGDMA_CHAN0_UTP_REG_END 0x00a8103c ++#define BCHP_SEGDMA_CHAN1_UTP_REG_START 0x00a81100 ++#define BCHP_SEGDMA_CHAN1_UTP_REG_END 0x00a8113c ++#define BCHP_SEGDMA_CHAN2_UTP_REG_START 0x00a81200 ++#define BCHP_SEGDMA_CHAN2_UTP_REG_END 0x00a8123c ++#define BCHP_SEGDMA_CHAN3_UTP_REG_START 0x00a81300 ++#define BCHP_SEGDMA_CHAN3_UTP_REG_END 0x00a8133c ++#define BCHP_SEGDMA_CHAN4_UTP_REG_START 0x00a81400 ++#define BCHP_SEGDMA_CHAN4_UTP_REG_END 0x00a8143c ++#define BCHP_SEGDMA_CHAN5_UTP_REG_START 0x00a81500 ++#define BCHP_SEGDMA_CHAN5_UTP_REG_END 0x00a8153c ++#define BCHP_SEGDMA_CHAN6_UTP_REG_START 0x00a81600 ++#define BCHP_SEGDMA_CHAN6_UTP_REG_END 0x00a8163c ++#define BCHP_SEGDMA_CHAN7_UTP_REG_START 0x00a81700 ++#define BCHP_SEGDMA_CHAN7_UTP_REG_END 0x00a8173c ++#define BCHP_SEGDMA_FLOW0_UTP_REG_START 0x00a82000 ++#define BCHP_SEGDMA_FLOW0_UTP_REG_END 0x00a8207c ++#define BCHP_SEGDMA_FLOW1_UTP_REG_START 0x00a82100 ++#define BCHP_SEGDMA_FLOW1_UTP_REG_END 0x00a8217c ++#define BCHP_SEGDMA_FLOW2_UTP_REG_START 0x00a82200 ++#define BCHP_SEGDMA_FLOW2_UTP_REG_END 0x00a8227c ++#define BCHP_SEGDMA_FLOW3_UTP_REG_START 0x00a82300 ++#define BCHP_SEGDMA_FLOW3_UTP_REG_END 0x00a8237c ++#define BCHP_SEGDMA_FLOW4_UTP_REG_START 0x00a82400 ++#define BCHP_SEGDMA_FLOW4_UTP_REG_END 0x00a8247c ++#define BCHP_SEGDMA_FLOW5_UTP_REG_START 0x00a82500 ++#define BCHP_SEGDMA_FLOW5_UTP_REG_END 0x00a8257c ++#define BCHP_SEGDMA_FLOW6_UTP_REG_START 0x00a82600 ++#define BCHP_SEGDMA_FLOW6_UTP_REG_END 0x00a8267c ++#define BCHP_SEGDMA_FLOW7_UTP_REG_START 0x00a82700 ++#define BCHP_SEGDMA_FLOW7_UTP_REG_END 0x00a8277c ++#define BCHP_SEGDMA_FLOW8_UTP_REG_START 0x00a82800 ++#define BCHP_SEGDMA_FLOW8_UTP_REG_END 0x00a8287c ++#define BCHP_SEGDMA_FLOW9_UTP_REG_START 0x00a82900 ++#define BCHP_SEGDMA_FLOW9_UTP_REG_END 0x00a8297c ++#define BCHP_SEGDMA_FLOW10_UTP_REG_START 0x00a82a00 ++#define BCHP_SEGDMA_FLOW10_UTP_REG_END 0x00a82a7c ++#define BCHP_SEGDMA_FLOW11_UTP_REG_START 0x00a82b00 ++#define BCHP_SEGDMA_FLOW11_UTP_REG_END 0x00a82b7c ++#define BCHP_SEGDMA_FLOW12_UTP_REG_START 0x00a82c00 ++#define BCHP_SEGDMA_FLOW12_UTP_REG_END 0x00a82c7c ++#define BCHP_SEGDMA_FLOW13_UTP_REG_START 0x00a82d00 ++#define BCHP_SEGDMA_FLOW13_UTP_REG_END 0x00a82d7c ++#define BCHP_SEGDMA_FLOW14_UTP_REG_START 0x00a82e00 ++#define BCHP_SEGDMA_FLOW14_UTP_REG_END 0x00a82e7c ++#define BCHP_SEGDMA_FLOW15_UTP_REG_START 0x00a82f00 ++#define BCHP_SEGDMA_FLOW15_UTP_REG_END 0x00a82f7c ++#define BCHP_SEGDMA_FLOW16_UTP_REG_START 0x00a83000 ++#define BCHP_SEGDMA_FLOW16_UTP_REG_END 0x00a8307c ++#define BCHP_SEGDMA_FLOW17_UTP_REG_START 0x00a83100 ++#define BCHP_SEGDMA_FLOW17_UTP_REG_END 0x00a8317c ++#define BCHP_SEGDMA_FLOW18_UTP_REG_START 0x00a83200 ++#define BCHP_SEGDMA_FLOW18_UTP_REG_END 0x00a8327c ++#define BCHP_SEGDMA_FLOW19_UTP_REG_START 0x00a83300 ++#define BCHP_SEGDMA_FLOW19_UTP_REG_END 0x00a8337c ++#define BCHP_SEGDMA_FLOW20_UTP_REG_START 0x00a83400 ++#define BCHP_SEGDMA_FLOW20_UTP_REG_END 0x00a8347c ++#define BCHP_SEGDMA_FLOW21_UTP_REG_START 0x00a83500 ++#define BCHP_SEGDMA_FLOW21_UTP_REG_END 0x00a8357c ++#define BCHP_SEGDMA_FLOW22_UTP_REG_START 0x00a83600 ++#define BCHP_SEGDMA_FLOW22_UTP_REG_END 0x00a8367c ++#define BCHP_SEGDMA_FLOW23_UTP_REG_START 0x00a83700 ++#define BCHP_SEGDMA_FLOW23_UTP_REG_END 0x00a8377c ++#define BCHP_SEGDMA_FLOW24_UTP_REG_START 0x00a83800 ++#define BCHP_SEGDMA_FLOW24_UTP_REG_END 0x00a8387c ++#define BCHP_SEGDMA_FLOW25_UTP_REG_START 0x00a83900 ++#define BCHP_SEGDMA_FLOW25_UTP_REG_END 0x00a8397c ++#define BCHP_SEGDMA_FLOW26_UTP_REG_START 0x00a83a00 ++#define BCHP_SEGDMA_FLOW26_UTP_REG_END 0x00a83a7c ++#define BCHP_SEGDMA_FLOW27_UTP_REG_START 0x00a83b00 ++#define BCHP_SEGDMA_FLOW27_UTP_REG_END 0x00a83b7c ++#define BCHP_SEGDMA_FLOW28_UTP_REG_START 0x00a83c00 ++#define BCHP_SEGDMA_FLOW28_UTP_REG_END 0x00a83c7c ++#define BCHP_SEGDMA_FLOW29_UTP_REG_START 0x00a83d00 ++#define BCHP_SEGDMA_FLOW29_UTP_REG_END 0x00a83d7c ++#define BCHP_SEGDMA_FLOW30_UTP_REG_START 0x00a83e00 ++#define BCHP_SEGDMA_FLOW30_UTP_REG_END 0x00a83e7c ++#define BCHP_SEGDMA_FLOW31_UTP_REG_START 0x00a83f00 ++#define BCHP_SEGDMA_FLOW31_UTP_REG_END 0x00a83f7c ++#define BCHP_CRYPTO_UTP_REG_START 0x00a90000 ++#define BCHP_CRYPTO_UTP_REG_END 0x00a9d000 ++#define BCHP_LEGACY_MAC_USM20_REG_START 0x00e00000 ++#define BCHP_LEGACY_MAC_USM20_REG_END 0x00e00a00 ++#define BCHP_ChannelRegs_USM30_REG_START 0x00e04000 ++#define BCHP_ChannelRegs_USM30_REG_END 0x00e0427c ++#define BCHP_ChannelQueRegs_USM30_REG_START 0x00e04300 ++#define BCHP_ChannelQueRegs_USM30_REG_END 0x00e043ab ++#define BCHP_QueueRegs_USM30_REG_START 0x00e04400 ++#define BCHP_QueueRegs_USM30_REG_END 0x00e047fc ++#define BCHP_SIDRegs_USM30_REG_START 0x00e04800 ++#define BCHP_SIDRegs_USM30_REG_END 0x00e04bfe ++#define BCHP_GroupSIDRegs_USM30_REG_START 0x00e04c00 ++#define BCHP_GroupSIDRegs_USM30_REG_END 0x00e04c1e ++#define BCHP_CalcPhyRegs_USM30_REG_START 0x00e05600 ++#define BCHP_CalcPhyRegs_USM30_REG_END 0x00e05634 ++#define BCHP_SimControlRegs_USM30_REG_START 0x00e05800 ++#define BCHP_SimControlRegs_USM30_REG_END 0x00e0587c ++#define BCHP_InterruptRegs_USM30_REG_START 0x00e05900 ++#define BCHP_InterruptRegs_USM30_REG_END 0x00e05997 ++#define BCHP_MiscRegs_USM30_REG_START 0x00e05a00 ++#define BCHP_MiscRegs_USM30_REG_END 0x00e05acc ++#define BCHP_QueueRegs_ReadOnly_USM30_REG_START 0x00e05c00 ++#define BCHP_QueueRegs_ReadOnly_USM30_REG_END 0x00e05ff0 ++#define BCHP_MIBCountersRegs_USM30_REG_START 0x00e06000 ++#define BCHP_MIBCountersRegs_USM30_REG_END 0x00e065fc ++#define BCHP_FlowDiagMIBCountersRegs_USM30_REG_START 0x00e06800 ++#define BCHP_FlowDiagMIBCountersRegs_USM30_REG_END 0x00e068fc ++#define BCHP_DiagConfigRegs_USM30_REG_START 0x00e07000 ++#define BCHP_DiagConfigRegs_USM30_REG_END 0x00e0704c ++#define BCHP_DiagMsgRegs_USM30_REG_START 0x00e07400 ++#define BCHP_DiagMsgRegs_USM30_REG_END 0x00e0743c ++#define BCHP_TC_0_REG_START 0x00e08000 ++#define BCHP_TC_0_REG_END 0x00e080c0 ++#define BCHP_TC_BANK0_0_REG_START 0x00e08100 ++#define BCHP_TC_BANK0_0_REG_END 0x00e0811c ++#define BCHP_TC_BANK1_0_REG_START 0x00e08120 ++#define BCHP_TC_BANK1_0_REG_END 0x00e0813c ++#define BCHP_TC_BANK2_0_REG_START 0x00e08140 ++#define BCHP_TC_BANK2_0_REG_END 0x00e0815c ++#define BCHP_TC_BANK3_0_REG_START 0x00e08160 ++#define BCHP_TC_BANK3_0_REG_END 0x00e0817c ++#define BCHP_TC_BANK4_0_REG_START 0x00e08180 ++#define BCHP_TC_BANK4_0_REG_END 0x00e0819c ++#define BCHP_TC_BANK5_0_REG_START 0x00e081a0 ++#define BCHP_TC_BANK5_0_REG_END 0x00e081bc ++#define BCHP_TC_BANK6_0_REG_START 0x00e081c0 ++#define BCHP_TC_BANK6_0_REG_END 0x00e081dc ++#define BCHP_TC_BANK7_0_REG_START 0x00e081e0 ++#define BCHP_TC_BANK7_0_REG_END 0x00e081fc ++#define BCHP_TC_BANK8_0_REG_START 0x00e08200 ++#define BCHP_TC_BANK8_0_REG_END 0x00e0821c ++#define BCHP_TC_AUX_0_REG_START 0x00e08300 ++#define BCHP_TC_AUX_0_REG_END 0x00e08394 ++#define BCHP_TC_PRMBL_0_REG_START 0x00e08400 ++#define BCHP_TC_PRMBL_0_REG_END 0x00e084bc ++#define BCHP_TC_AUX_EXT_0_REG_START 0x00e084f0 ++#define BCHP_TC_AUX_EXT_0_REG_END 0x00e084f4 ++#define BCHP_TC_1_REG_START 0x00e09000 ++#define BCHP_TC_1_REG_END 0x00e090c0 ++#define BCHP_TC_BANK0_1_REG_START 0x00e09100 ++#define BCHP_TC_BANK0_1_REG_END 0x00e0911c ++#define BCHP_TC_BANK1_1_REG_START 0x00e09120 ++#define BCHP_TC_BANK1_1_REG_END 0x00e0913c ++#define BCHP_TC_BANK2_1_REG_START 0x00e09140 ++#define BCHP_TC_BANK2_1_REG_END 0x00e0915c ++#define BCHP_TC_BANK3_1_REG_START 0x00e09160 ++#define BCHP_TC_BANK3_1_REG_END 0x00e0917c ++#define BCHP_TC_BANK4_1_REG_START 0x00e09180 ++#define BCHP_TC_BANK4_1_REG_END 0x00e0919c ++#define BCHP_TC_BANK5_1_REG_START 0x00e091a0 ++#define BCHP_TC_BANK5_1_REG_END 0x00e091bc ++#define BCHP_TC_BANK6_1_REG_START 0x00e091c0 ++#define BCHP_TC_BANK6_1_REG_END 0x00e091dc ++#define BCHP_TC_BANK7_1_REG_START 0x00e091e0 ++#define BCHP_TC_BANK7_1_REG_END 0x00e091fc ++#define BCHP_TC_BANK8_1_REG_START 0x00e09200 ++#define BCHP_TC_BANK8_1_REG_END 0x00e0921c ++#define BCHP_TC_AUX_1_REG_START 0x00e09300 ++#define BCHP_TC_AUX_1_REG_END 0x00e09394 ++#define BCHP_TC_PRMBL_1_REG_START 0x00e09400 ++#define BCHP_TC_PRMBL_1_REG_END 0x00e094bc ++#define BCHP_TC_AUX_EXT_1_REG_START 0x00e094f0 ++#define BCHP_TC_AUX_EXT_1_REG_END 0x00e094f4 ++#define BCHP_TC_2_REG_START 0x00e0a000 ++#define BCHP_TC_2_REG_END 0x00e0a0c0 ++#define BCHP_TC_BANK0_2_REG_START 0x00e0a100 ++#define BCHP_TC_BANK0_2_REG_END 0x00e0a11c ++#define BCHP_TC_BANK1_2_REG_START 0x00e0a120 ++#define BCHP_TC_BANK1_2_REG_END 0x00e0a13c ++#define BCHP_TC_BANK2_2_REG_START 0x00e0a140 ++#define BCHP_TC_BANK2_2_REG_END 0x00e0a15c ++#define BCHP_TC_BANK3_2_REG_START 0x00e0a160 ++#define BCHP_TC_BANK3_2_REG_END 0x00e0a17c ++#define BCHP_TC_BANK4_2_REG_START 0x00e0a180 ++#define BCHP_TC_BANK4_2_REG_END 0x00e0a19c ++#define BCHP_TC_BANK5_2_REG_START 0x00e0a1a0 ++#define BCHP_TC_BANK5_2_REG_END 0x00e0a1bc ++#define BCHP_TC_BANK6_2_REG_START 0x00e0a1c0 ++#define BCHP_TC_BANK6_2_REG_END 0x00e0a1dc ++#define BCHP_TC_BANK7_2_REG_START 0x00e0a1e0 ++#define BCHP_TC_BANK7_2_REG_END 0x00e0a1fc ++#define BCHP_TC_BANK8_2_REG_START 0x00e0a200 ++#define BCHP_TC_BANK8_2_REG_END 0x00e0a21c ++#define BCHP_TC_AUX_2_REG_START 0x00e0a300 ++#define BCHP_TC_AUX_2_REG_END 0x00e0a394 ++#define BCHP_TC_PRMBL_2_REG_START 0x00e0a400 ++#define BCHP_TC_PRMBL_2_REG_END 0x00e0a4bc ++#define BCHP_TC_AUX_EXT_2_REG_START 0x00e0a4f0 ++#define BCHP_TC_AUX_EXT_2_REG_END 0x00e0a4f4 ++#define BCHP_TC_3_REG_START 0x00e0b000 ++#define BCHP_TC_3_REG_END 0x00e0b0c0 ++#define BCHP_TC_BANK0_3_REG_START 0x00e0b100 ++#define BCHP_TC_BANK0_3_REG_END 0x00e0b11c ++#define BCHP_TC_BANK1_3_REG_START 0x00e0b120 ++#define BCHP_TC_BANK1_3_REG_END 0x00e0b13c ++#define BCHP_TC_BANK2_3_REG_START 0x00e0b140 ++#define BCHP_TC_BANK2_3_REG_END 0x00e0b15c ++#define BCHP_TC_BANK3_3_REG_START 0x00e0b160 ++#define BCHP_TC_BANK3_3_REG_END 0x00e0b17c ++#define BCHP_TC_BANK4_3_REG_START 0x00e0b180 ++#define BCHP_TC_BANK4_3_REG_END 0x00e0b19c ++#define BCHP_TC_BANK5_3_REG_START 0x00e0b1a0 ++#define BCHP_TC_BANK5_3_REG_END 0x00e0b1bc ++#define BCHP_TC_BANK6_3_REG_START 0x00e0b1c0 ++#define BCHP_TC_BANK6_3_REG_END 0x00e0b1dc ++#define BCHP_TC_BANK7_3_REG_START 0x00e0b1e0 ++#define BCHP_TC_BANK7_3_REG_END 0x00e0b1fc ++#define BCHP_TC_BANK8_3_REG_START 0x00e0b200 ++#define BCHP_TC_BANK8_3_REG_END 0x00e0b21c ++#define BCHP_TC_AUX_3_REG_START 0x00e0b300 ++#define BCHP_TC_AUX_3_REG_END 0x00e0b394 ++#define BCHP_TC_PRMBL_3_REG_START 0x00e0b400 ++#define BCHP_TC_PRMBL_3_REG_END 0x00e0b4bc ++#define BCHP_TC_AUX_EXT_3_REG_START 0x00e0b4f0 ++#define BCHP_TC_AUX_EXT_3_REG_END 0x00e0b4f4 ++#define BCHP_TC_4_REG_START 0x00e0c000 ++#define BCHP_TC_4_REG_END 0x00e0c0c0 ++#define BCHP_TC_BANK0_4_REG_START 0x00e0c100 ++#define BCHP_TC_BANK0_4_REG_END 0x00e0c11c ++#define BCHP_TC_BANK1_4_REG_START 0x00e0c120 ++#define BCHP_TC_BANK1_4_REG_END 0x00e0c13c ++#define BCHP_TC_BANK2_4_REG_START 0x00e0c140 ++#define BCHP_TC_BANK2_4_REG_END 0x00e0c15c ++#define BCHP_TC_BANK3_4_REG_START 0x00e0c160 ++#define BCHP_TC_BANK3_4_REG_END 0x00e0c17c ++#define BCHP_TC_BANK4_4_REG_START 0x00e0c180 ++#define BCHP_TC_BANK4_4_REG_END 0x00e0c19c ++#define BCHP_TC_BANK5_4_REG_START 0x00e0c1a0 ++#define BCHP_TC_BANK5_4_REG_END 0x00e0c1bc ++#define BCHP_TC_BANK6_4_REG_START 0x00e0c1c0 ++#define BCHP_TC_BANK6_4_REG_END 0x00e0c1dc ++#define BCHP_TC_BANK7_4_REG_START 0x00e0c1e0 ++#define BCHP_TC_BANK7_4_REG_END 0x00e0c1fc ++#define BCHP_TC_BANK8_4_REG_START 0x00e0c200 ++#define BCHP_TC_BANK8_4_REG_END 0x00e0c21c ++#define BCHP_TC_AUX_4_REG_START 0x00e0c300 ++#define BCHP_TC_AUX_4_REG_END 0x00e0c394 ++#define BCHP_TC_PRMBL_4_REG_START 0x00e0c400 ++#define BCHP_TC_PRMBL_4_REG_END 0x00e0c4bc ++#define BCHP_TC_AUX_EXT_4_REG_START 0x00e0c4f0 ++#define BCHP_TC_AUX_EXT_4_REG_END 0x00e0c4f4 ++#define BCHP_TC_5_REG_START 0x00e0d000 ++#define BCHP_TC_5_REG_END 0x00e0d0c0 ++#define BCHP_TC_BANK0_5_REG_START 0x00e0d100 ++#define BCHP_TC_BANK0_5_REG_END 0x00e0d11c ++#define BCHP_TC_BANK1_5_REG_START 0x00e0d120 ++#define BCHP_TC_BANK1_5_REG_END 0x00e0d13c ++#define BCHP_TC_BANK2_5_REG_START 0x00e0d140 ++#define BCHP_TC_BANK2_5_REG_END 0x00e0d15c ++#define BCHP_TC_BANK3_5_REG_START 0x00e0d160 ++#define BCHP_TC_BANK3_5_REG_END 0x00e0d17c ++#define BCHP_TC_BANK4_5_REG_START 0x00e0d180 ++#define BCHP_TC_BANK4_5_REG_END 0x00e0d19c ++#define BCHP_TC_BANK5_5_REG_START 0x00e0d1a0 ++#define BCHP_TC_BANK5_5_REG_END 0x00e0d1bc ++#define BCHP_TC_BANK6_5_REG_START 0x00e0d1c0 ++#define BCHP_TC_BANK6_5_REG_END 0x00e0d1dc ++#define BCHP_TC_BANK7_5_REG_START 0x00e0d1e0 ++#define BCHP_TC_BANK7_5_REG_END 0x00e0d1fc ++#define BCHP_TC_BANK8_5_REG_START 0x00e0d200 ++#define BCHP_TC_BANK8_5_REG_END 0x00e0d21c ++#define BCHP_TC_AUX_5_REG_START 0x00e0d300 ++#define BCHP_TC_AUX_5_REG_END 0x00e0d394 ++#define BCHP_TC_PRMBL_5_REG_START 0x00e0d400 ++#define BCHP_TC_PRMBL_5_REG_END 0x00e0d4bc ++#define BCHP_TC_AUX_EXT_5_REG_START 0x00e0d4f0 ++#define BCHP_TC_AUX_EXT_5_REG_END 0x00e0d4f4 ++#define BCHP_TC_6_REG_START 0x00e0e000 ++#define BCHP_TC_6_REG_END 0x00e0e0c0 ++#define BCHP_TC_BANK0_6_REG_START 0x00e0e100 ++#define BCHP_TC_BANK0_6_REG_END 0x00e0e11c ++#define BCHP_TC_BANK1_6_REG_START 0x00e0e120 ++#define BCHP_TC_BANK1_6_REG_END 0x00e0e13c ++#define BCHP_TC_BANK2_6_REG_START 0x00e0e140 ++#define BCHP_TC_BANK2_6_REG_END 0x00e0e15c ++#define BCHP_TC_BANK3_6_REG_START 0x00e0e160 ++#define BCHP_TC_BANK3_6_REG_END 0x00e0e17c ++#define BCHP_TC_BANK4_6_REG_START 0x00e0e180 ++#define BCHP_TC_BANK4_6_REG_END 0x00e0e19c ++#define BCHP_TC_BANK5_6_REG_START 0x00e0e1a0 ++#define BCHP_TC_BANK5_6_REG_END 0x00e0e1bc ++#define BCHP_TC_BANK6_6_REG_START 0x00e0e1c0 ++#define BCHP_TC_BANK6_6_REG_END 0x00e0e1dc ++#define BCHP_TC_BANK7_6_REG_START 0x00e0e1e0 ++#define BCHP_TC_BANK7_6_REG_END 0x00e0e1fc ++#define BCHP_TC_BANK8_6_REG_START 0x00e0e200 ++#define BCHP_TC_BANK8_6_REG_END 0x00e0e21c ++#define BCHP_TC_AUX_6_REG_START 0x00e0e300 ++#define BCHP_TC_AUX_6_REG_END 0x00e0e394 ++#define BCHP_TC_PRMBL_6_REG_START 0x00e0e400 ++#define BCHP_TC_PRMBL_6_REG_END 0x00e0e4bc ++#define BCHP_TC_AUX_EXT_6_REG_START 0x00e0e4f0 ++#define BCHP_TC_AUX_EXT_6_REG_END 0x00e0e4f4 ++#define BCHP_TC_7_REG_START 0x00e0f000 ++#define BCHP_TC_7_REG_END 0x00e0f0c0 ++#define BCHP_TC_BANK0_7_REG_START 0x00e0f100 ++#define BCHP_TC_BANK0_7_REG_END 0x00e0f11c ++#define BCHP_TC_BANK1_7_REG_START 0x00e0f120 ++#define BCHP_TC_BANK1_7_REG_END 0x00e0f13c ++#define BCHP_TC_BANK2_7_REG_START 0x00e0f140 ++#define BCHP_TC_BANK2_7_REG_END 0x00e0f15c ++#define BCHP_TC_BANK3_7_REG_START 0x00e0f160 ++#define BCHP_TC_BANK3_7_REG_END 0x00e0f17c ++#define BCHP_TC_BANK4_7_REG_START 0x00e0f180 ++#define BCHP_TC_BANK4_7_REG_END 0x00e0f19c ++#define BCHP_TC_BANK5_7_REG_START 0x00e0f1a0 ++#define BCHP_TC_BANK5_7_REG_END 0x00e0f1bc ++#define BCHP_TC_BANK6_7_REG_START 0x00e0f1c0 ++#define BCHP_TC_BANK6_7_REG_END 0x00e0f1dc ++#define BCHP_TC_BANK7_7_REG_START 0x00e0f1e0 ++#define BCHP_TC_BANK7_7_REG_END 0x00e0f1fc ++#define BCHP_TC_BANK8_7_REG_START 0x00e0f200 ++#define BCHP_TC_BANK8_7_REG_END 0x00e0f21c ++#define BCHP_TC_AUX_7_REG_START 0x00e0f300 ++#define BCHP_TC_AUX_7_REG_END 0x00e0f394 ++#define BCHP_TC_PRMBL_7_REG_START 0x00e0f400 ++#define BCHP_TC_PRMBL_7_REG_END 0x00e0f4bc ++#define BCHP_TC_AUX_EXT_7_REG_START 0x00e0f4f0 ++#define BCHP_TC_AUX_EXT_7_REG_END 0x00e0f4f4 ++#define BCHP_US_TOP_REG_START 0x00e10000 ++#define BCHP_US_TOP_REG_END 0x00e103fc ++#define BCHP_US_MBSC_REG_START 0x00e10400 ++#define BCHP_US_MBSC_REG_END 0x00e1047c ++#define BCHP_US_RF_CLIP_REG_START 0x00e10800 ++#define BCHP_US_RF_CLIP_REG_END 0x00e10bfc ++#define BCHP_US_PDAC0_REG_START 0x00e10c00 ++#define BCHP_US_PDAC0_REG_END 0x00e10c7c ++#define BCHP_US_PDAC1_REG_START 0x00e10c80 ++#define BCHP_US_PDAC1_REG_END 0x00e10cfc ++#define BCHP_US_PDAC2_REG_START 0x00e10d00 ++#define BCHP_US_PDAC2_REG_END 0x00e10d7c ++#define BCHP_US_PDAC3_REG_START 0x00e10d80 ++#define BCHP_US_PDAC3_REG_END 0x00e10dfc ++#define BCHP_US_CORE0_REG_START 0x00e11000 ++#define BCHP_US_CORE0_REG_END 0x00e113fc ++#define BCHP_US_CORE1_REG_START 0x00e11400 ++#define BCHP_US_CORE1_REG_END 0x00e117fc ++#define BCHP_US_CORE2_REG_START 0x00e11800 ++#define BCHP_US_CORE2_REG_END 0x00e11bfc ++#define BCHP_US_CORE3_REG_START 0x00e11c00 ++#define BCHP_US_CORE3_REG_END 0x00e11ffc ++#define BCHP_US_CORE4_REG_START 0x00e12000 ++#define BCHP_US_CORE4_REG_END 0x00e123fc ++#define BCHP_US_CORE5_REG_START 0x00e12400 ++#define BCHP_US_CORE5_REG_END 0x00e127fc ++#define BCHP_US_CORE6_REG_START 0x00e12800 ++#define BCHP_US_CORE6_REG_END 0x00e12bfc ++#define BCHP_US_CORE7_REG_START 0x00e12c00 ++#define BCHP_US_CORE7_REG_END 0x00e12ffc ++#define BCHP_BaseReserved_DTP_REG_START 0x01000000 ++#define BCHP_BaseReserved_DTP_REG_END 0x01000000 ++#define BCHP_Control_DTP_REG_START 0x01001000 ++#define BCHP_Control_DTP_REG_END 0x010010fc ++#define BCHP_OutgoingMessageFIFO_DTP_REG_START 0x01001100 ++#define BCHP_OutgoingMessageFIFO_DTP_REG_END 0x0100117c ++#define BCHP_IncomingMessageFIFO_DTP_REG_START 0x01001200 ++#define BCHP_IncomingMessageFIFO_DTP_REG_END 0x0100127c ++#define BCHP_DMA0_DTP_REG_START 0x01001300 ++#define BCHP_DMA0_DTP_REG_END 0x0100131c ++#define BCHP_DMA1_DTP_REG_START 0x01001320 ++#define BCHP_DMA1_DTP_REG_END 0x0100133c ++#define BCHP_Token_DTP_REG_START 0x01001400 ++#define BCHP_Token_DTP_REG_END 0x0100141c ++#define BCHP_PerfPower_DTP_REG_START 0x01001600 ++#define BCHP_PerfPower_DTP_REG_END 0x01001640 ++#define BCHP_MessageID_DTP_REG_START 0x01001700 ++#define BCHP_MessageID_DTP_REG_END 0x0100177c ++#define BCHP_DQM_DTP_REG_START 0x01001800 ++#define BCHP_DQM_DTP_REG_END 0x01001848 ++#define BCHP_HWCounters_DTP_REG_START 0x01001900 ++#define BCHP_HWCounters_DTP_REG_END 0x01001944 ++#define BCHP_QUEUE_0_CNTRL_DTP_REG_START 0x01001a00 ++#define BCHP_QUEUE_0_CNTRL_DTP_REG_END 0x01001a0c ++#define BCHP_QUEUE_1_CNTRL_DTP_REG_START 0x01001a10 ++#define BCHP_QUEUE_1_CNTRL_DTP_REG_END 0x01001a1c ++#define BCHP_QUEUE_2_CNTRL_DTP_REG_START 0x01001a20 ++#define BCHP_QUEUE_2_CNTRL_DTP_REG_END 0x01001a2c ++#define BCHP_QUEUE_3_CNTRL_DTP_REG_START 0x01001a30 ++#define BCHP_QUEUE_3_CNTRL_DTP_REG_END 0x01001a3c ++#define BCHP_QUEUE_4_CNTRL_DTP_REG_START 0x01001a40 ++#define BCHP_QUEUE_4_CNTRL_DTP_REG_END 0x01001a4c ++#define BCHP_QUEUE_5_CNTRL_DTP_REG_START 0x01001a50 ++#define BCHP_QUEUE_5_CNTRL_DTP_REG_END 0x01001a5c ++#define BCHP_QUEUE_6_CNTRL_DTP_REG_START 0x01001a60 ++#define BCHP_QUEUE_6_CNTRL_DTP_REG_END 0x01001a6c ++#define BCHP_QUEUE_7_CNTRL_DTP_REG_START 0x01001a70 ++#define BCHP_QUEUE_7_CNTRL_DTP_REG_END 0x01001a7c ++#define BCHP_QUEUE_8_CNTRL_DTP_REG_START 0x01001a80 ++#define BCHP_QUEUE_8_CNTRL_DTP_REG_END 0x01001a8c ++#define BCHP_QUEUE_9_CNTRL_DTP_REG_START 0x01001a90 ++#define BCHP_QUEUE_9_CNTRL_DTP_REG_END 0x01001a9c ++#define BCHP_QUEUE_10_CNTRL_DTP_REG_START 0x01001aa0 ++#define BCHP_QUEUE_10_CNTRL_DTP_REG_END 0x01001aac ++#define BCHP_QUEUE_11_CNTRL_DTP_REG_START 0x01001ab0 ++#define BCHP_QUEUE_11_CNTRL_DTP_REG_END 0x01001abc ++#define BCHP_QUEUE_12_CNTRL_DTP_REG_START 0x01001ac0 ++#define BCHP_QUEUE_12_CNTRL_DTP_REG_END 0x01001acc ++#define BCHP_QUEUE_13_CNTRL_DTP_REG_START 0x01001ad0 ++#define BCHP_QUEUE_13_CNTRL_DTP_REG_END 0x01001adc ++#define BCHP_QUEUE_14_CNTRL_DTP_REG_START 0x01001ae0 ++#define BCHP_QUEUE_14_CNTRL_DTP_REG_END 0x01001aec ++#define BCHP_QUEUE_15_CNTRL_DTP_REG_START 0x01001af0 ++#define BCHP_QUEUE_15_CNTRL_DTP_REG_END 0x01001afc ++#define BCHP_QUEUE_16_CNTRL_DTP_REG_START 0x01001b00 ++#define BCHP_QUEUE_16_CNTRL_DTP_REG_END 0x01001b0c ++#define BCHP_QUEUE_17_CNTRL_DTP_REG_START 0x01001b10 ++#define BCHP_QUEUE_17_CNTRL_DTP_REG_END 0x01001b1c ++#define BCHP_QUEUE_18_CNTRL_DTP_REG_START 0x01001b20 ++#define BCHP_QUEUE_18_CNTRL_DTP_REG_END 0x01001b2c ++#define BCHP_QUEUE_19_CNTRL_DTP_REG_START 0x01001b30 ++#define BCHP_QUEUE_19_CNTRL_DTP_REG_END 0x01001b3c ++#define BCHP_QUEUE_20_CNTRL_DTP_REG_START 0x01001b40 ++#define BCHP_QUEUE_20_CNTRL_DTP_REG_END 0x01001b4c ++#define BCHP_QUEUE_21_CNTRL_DTP_REG_START 0x01001b50 ++#define BCHP_QUEUE_21_CNTRL_DTP_REG_END 0x01001b5c ++#define BCHP_QUEUE_22_CNTRL_DTP_REG_START 0x01001b60 ++#define BCHP_QUEUE_22_CNTRL_DTP_REG_END 0x01001b6c ++#define BCHP_QUEUE_23_CNTRL_DTP_REG_START 0x01001b70 ++#define BCHP_QUEUE_23_CNTRL_DTP_REG_END 0x01001b7c ++#define BCHP_QUEUE_24_CNTRL_DTP_REG_START 0x01001b80 ++#define BCHP_QUEUE_24_CNTRL_DTP_REG_END 0x01001b8c ++#define BCHP_QUEUE_25_CNTRL_DTP_REG_START 0x01001b90 ++#define BCHP_QUEUE_25_CNTRL_DTP_REG_END 0x01001b9c ++#define BCHP_QUEUE_26_CNTRL_DTP_REG_START 0x01001ba0 ++#define BCHP_QUEUE_26_CNTRL_DTP_REG_END 0x01001bac ++#define BCHP_QUEUE_27_CNTRL_DTP_REG_START 0x01001bb0 ++#define BCHP_QUEUE_27_CNTRL_DTP_REG_END 0x01001bbc ++#define BCHP_QUEUE_28_CNTRL_DTP_REG_START 0x01001bc0 ++#define BCHP_QUEUE_28_CNTRL_DTP_REG_END 0x01001bcc ++#define BCHP_QUEUE_29_CNTRL_DTP_REG_START 0x01001bd0 ++#define BCHP_QUEUE_29_CNTRL_DTP_REG_END 0x01001bdc ++#define BCHP_QUEUE_30_CNTRL_DTP_REG_START 0x01001be0 ++#define BCHP_QUEUE_30_CNTRL_DTP_REG_END 0x01001bec ++#define BCHP_QUEUE_31_CNTRL_DTP_REG_START 0x01001bf0 ++#define BCHP_QUEUE_31_CNTRL_DTP_REG_END 0x01001bfc ++#define BCHP_QUEUE_0_DATA_DTP_REG_START 0x01001c00 ++#define BCHP_QUEUE_0_DATA_DTP_REG_END 0x01001c0c ++#define BCHP_QUEUE_1_DATA_DTP_REG_START 0x01001c10 ++#define BCHP_QUEUE_1_DATA_DTP_REG_END 0x01001c1c ++#define BCHP_QUEUE_2_DATA_DTP_REG_START 0x01001c20 ++#define BCHP_QUEUE_2_DATA_DTP_REG_END 0x01001c2c ++#define BCHP_QUEUE_3_DATA_DTP_REG_START 0x01001c30 ++#define BCHP_QUEUE_3_DATA_DTP_REG_END 0x01001c3c ++#define BCHP_QUEUE_4_DATA_DTP_REG_START 0x01001c40 ++#define BCHP_QUEUE_4_DATA_DTP_REG_END 0x01001c4c ++#define BCHP_QUEUE_5_DATA_DTP_REG_START 0x01001c50 ++#define BCHP_QUEUE_5_DATA_DTP_REG_END 0x01001c5c ++#define BCHP_QUEUE_6_DATA_DTP_REG_START 0x01001c60 ++#define BCHP_QUEUE_6_DATA_DTP_REG_END 0x01001c6c ++#define BCHP_QUEUE_7_DATA_DTP_REG_START 0x01001c70 ++#define BCHP_QUEUE_7_DATA_DTP_REG_END 0x01001c7c ++#define BCHP_QUEUE_8_DATA_DTP_REG_START 0x01001c80 ++#define BCHP_QUEUE_8_DATA_DTP_REG_END 0x01001c8c ++#define BCHP_QUEUE_9_DATA_DTP_REG_START 0x01001c90 ++#define BCHP_QUEUE_9_DATA_DTP_REG_END 0x01001c9c ++#define BCHP_QUEUE_10_DATA_DTP_REG_START 0x01001ca0 ++#define BCHP_QUEUE_10_DATA_DTP_REG_END 0x01001cac ++#define BCHP_QUEUE_11_DATA_DTP_REG_START 0x01001cb0 ++#define BCHP_QUEUE_11_DATA_DTP_REG_END 0x01001cbc ++#define BCHP_QUEUE_12_DATA_DTP_REG_START 0x01001cc0 ++#define BCHP_QUEUE_12_DATA_DTP_REG_END 0x01001ccc ++#define BCHP_QUEUE_13_DATA_DTP_REG_START 0x01001cd0 ++#define BCHP_QUEUE_13_DATA_DTP_REG_END 0x01001cdc ++#define BCHP_QUEUE_14_DATA_DTP_REG_START 0x01001ce0 ++#define BCHP_QUEUE_14_DATA_DTP_REG_END 0x01001cec ++#define BCHP_QUEUE_15_DATA_DTP_REG_START 0x01001cf0 ++#define BCHP_QUEUE_15_DATA_DTP_REG_END 0x01001cfc ++#define BCHP_QUEUE_16_DATA_DTP_REG_START 0x01001d00 ++#define BCHP_QUEUE_16_DATA_DTP_REG_END 0x01001d0c ++#define BCHP_QUEUE_17_DATA_DTP_REG_START 0x01001d10 ++#define BCHP_QUEUE_17_DATA_DTP_REG_END 0x01001d1c ++#define BCHP_QUEUE_18_DATA_DTP_REG_START 0x01001d20 ++#define BCHP_QUEUE_18_DATA_DTP_REG_END 0x01001d2c ++#define BCHP_QUEUE_19_DATA_DTP_REG_START 0x01001d30 ++#define BCHP_QUEUE_19_DATA_DTP_REG_END 0x01001d3c ++#define BCHP_QUEUE_20_DATA_DTP_REG_START 0x01001d40 ++#define BCHP_QUEUE_20_DATA_DTP_REG_END 0x01001d4c ++#define BCHP_QUEUE_21_DATA_DTP_REG_START 0x01001d50 ++#define BCHP_QUEUE_21_DATA_DTP_REG_END 0x01001d5c ++#define BCHP_QUEUE_22_DATA_DTP_REG_START 0x01001d60 ++#define BCHP_QUEUE_22_DATA_DTP_REG_END 0x01001d6c ++#define BCHP_QUEUE_23_DATA_DTP_REG_START 0x01001d70 ++#define BCHP_QUEUE_23_DATA_DTP_REG_END 0x01001d7c ++#define BCHP_QUEUE_24_DATA_DTP_REG_START 0x01001d80 ++#define BCHP_QUEUE_24_DATA_DTP_REG_END 0x01001d8c ++#define BCHP_QUEUE_25_DATA_DTP_REG_START 0x01001d90 ++#define BCHP_QUEUE_25_DATA_DTP_REG_END 0x01001d9c ++#define BCHP_QUEUE_26_DATA_DTP_REG_START 0x01001da0 ++#define BCHP_QUEUE_26_DATA_DTP_REG_END 0x01001dac ++#define BCHP_QUEUE_27_DATA_DTP_REG_START 0x01001db0 ++#define BCHP_QUEUE_27_DATA_DTP_REG_END 0x01001dbc ++#define BCHP_QUEUE_28_DATA_DTP_REG_START 0x01001dc0 ++#define BCHP_QUEUE_28_DATA_DTP_REG_END 0x01001dcc ++#define BCHP_QUEUE_29_DATA_DTP_REG_START 0x01001dd0 ++#define BCHP_QUEUE_29_DATA_DTP_REG_END 0x01001ddc ++#define BCHP_QUEUE_30_DATA_DTP_REG_START 0x01001de0 ++#define BCHP_QUEUE_30_DATA_DTP_REG_END 0x01001dec ++#define BCHP_QUEUE_31_DATA_DTP_REG_START 0x01001df0 ++#define BCHP_QUEUE_31_DATA_DTP_REG_END 0x01001dfc ++#define BCHP_QUEUE_STATUS_DTP_REG_START 0x01001f00 ++#define BCHP_QUEUE_STATUS_DTP_REG_END 0x01001f7c ++#define BCHP_QUEUE_MIB_DTP_REG_START 0x01002000 ++#define BCHP_QUEUE_MIB_DTP_REG_END 0x0100217c ++#define BCHP_QUEUE_TIMER_DTP_REG_START 0x01002c00 ++#define BCHP_QUEUE_TIMER_DTP_REG_END 0x01002cfc ++#define BCHP_SharedMem_DTP_REG_START 0x01004000 ++#define BCHP_SharedMem_DTP_REG_END 0x0100fffc ++#define BCHP_DSRM_DTP_REG_START 0x01040000 ++#define BCHP_DSRM_DTP_REG_END 0x010406ec ++#define BCHP_DSRM_TAG_CACHE_MEM_DTP_REG_START 0x01040700 ++#define BCHP_DSRM_TAG_CACHE_MEM_DTP_REG_END 0x010407fc ++#define BCHP_DSRM_STATE_MEM_DTP_REG_START 0x01041000 ++#define BCHP_DSRM_STATE_MEM_DTP_REG_END 0x010417fc ++#define BCHP_DSRM_STATS_MEM_DTP_REG_START 0x01042000 ++#define BCHP_DSRM_STATS_MEM_DTP_REG_END 0x01042ffc ++#define BCHP_DSRM_TMOUT_MEM_DTP_REG_START 0x01043000 ++#define BCHP_DSRM_TMOUT_MEM_DTP_REG_END 0x01043ffc ++#define BCHP_DSRM_TAG_MEM_DTP_REG_START 0x01044000 ++#define BCHP_DSRM_TAG_MEM_DTP_REG_END 0x01045ffc ++#define BCHP_DSRM_RLD_MEM_DTP_REG_START 0x01046000 ++#define BCHP_DSRM_RLD_MEM_DTP_REG_END 0x01046ffc ++#define BCHP_DSRM_FREE_CLSTR_MEM_DTP_REG_START 0x01047000 ++#define BCHP_DSRM_FREE_CLSTR_MEM_DTP_REG_END 0x010473fc ++#define BCHP_DSRM_CLSTR_MEM_DTP_REG_START 0x01050000 ++#define BCHP_DSRM_CLSTR_MEM_DTP_REG_END 0x01057ffc ++#define BCHP_DSRM_SPARSE_ARY_MEM_DTP_REG_START 0x01080000 ++#define BCHP_DSRM_SPARSE_ARY_MEM_DTP_REG_END 0x010bfffc ++#define BCHP_DSRM_SPARSE_ARY_AUX_MEM_DTP_REG_START 0x010c0000 ++#define BCHP_DSRM_SPARSE_ARY_AUX_MEM_DTP_REG_END 0x010ffffc ++#define BCHP_BaseReserved_DFAP_REG_START 0x01200000 ++#define BCHP_BaseReserved_DFAP_REG_END 0x01200000 ++#define BCHP_Control_DFAP_REG_START 0x01201000 ++#define BCHP_Control_DFAP_REG_END 0x012010fc ++#define BCHP_OutgoingMessageFIFO_DFAP_REG_START 0x01201100 ++#define BCHP_OutgoingMessageFIFO_DFAP_REG_END 0x0120117c ++#define BCHP_IncomingMessageFIFO_DFAP_REG_START 0x01201200 ++#define BCHP_IncomingMessageFIFO_DFAP_REG_END 0x0120127c ++#define BCHP_DMA0_DFAP_REG_START 0x01201300 ++#define BCHP_DMA0_DFAP_REG_END 0x0120131c ++#define BCHP_DMA1_DFAP_REG_START 0x01201320 ++#define BCHP_DMA1_DFAP_REG_END 0x0120133c ++#define BCHP_Token_DFAP_REG_START 0x01201400 ++#define BCHP_Token_DFAP_REG_END 0x0120141c ++#define BCHP_PerfPower_DFAP_REG_START 0x01201600 ++#define BCHP_PerfPower_DFAP_REG_END 0x01201640 ++#define BCHP_MessageID_DFAP_REG_START 0x01201700 ++#define BCHP_MessageID_DFAP_REG_END 0x0120177c ++#define BCHP_DQM_DFAP_REG_START 0x01201800 ++#define BCHP_DQM_DFAP_REG_END 0x01201848 ++#define BCHP_HWCounters_DFAP_REG_START 0x01201900 ++#define BCHP_HWCounters_DFAP_REG_END 0x01201944 ++#define BCHP_QUEUE_0_CNTRL_DFAP_REG_START 0x01201a00 ++#define BCHP_QUEUE_0_CNTRL_DFAP_REG_END 0x01201a0c ++#define BCHP_QUEUE_1_CNTRL_DFAP_REG_START 0x01201a10 ++#define BCHP_QUEUE_1_CNTRL_DFAP_REG_END 0x01201a1c ++#define BCHP_QUEUE_2_CNTRL_DFAP_REG_START 0x01201a20 ++#define BCHP_QUEUE_2_CNTRL_DFAP_REG_END 0x01201a2c ++#define BCHP_QUEUE_3_CNTRL_DFAP_REG_START 0x01201a30 ++#define BCHP_QUEUE_3_CNTRL_DFAP_REG_END 0x01201a3c ++#define BCHP_QUEUE_4_CNTRL_DFAP_REG_START 0x01201a40 ++#define BCHP_QUEUE_4_CNTRL_DFAP_REG_END 0x01201a4c ++#define BCHP_QUEUE_5_CNTRL_DFAP_REG_START 0x01201a50 ++#define BCHP_QUEUE_5_CNTRL_DFAP_REG_END 0x01201a5c ++#define BCHP_QUEUE_6_CNTRL_DFAP_REG_START 0x01201a60 ++#define BCHP_QUEUE_6_CNTRL_DFAP_REG_END 0x01201a6c ++#define BCHP_QUEUE_7_CNTRL_DFAP_REG_START 0x01201a70 ++#define BCHP_QUEUE_7_CNTRL_DFAP_REG_END 0x01201a7c ++#define BCHP_QUEUE_8_CNTRL_DFAP_REG_START 0x01201a80 ++#define BCHP_QUEUE_8_CNTRL_DFAP_REG_END 0x01201a8c ++#define BCHP_QUEUE_9_CNTRL_DFAP_REG_START 0x01201a90 ++#define BCHP_QUEUE_9_CNTRL_DFAP_REG_END 0x01201a9c ++#define BCHP_QUEUE_10_CNTRL_DFAP_REG_START 0x01201aa0 ++#define BCHP_QUEUE_10_CNTRL_DFAP_REG_END 0x01201aac ++#define BCHP_QUEUE_11_CNTRL_DFAP_REG_START 0x01201ab0 ++#define BCHP_QUEUE_11_CNTRL_DFAP_REG_END 0x01201abc ++#define BCHP_QUEUE_12_CNTRL_DFAP_REG_START 0x01201ac0 ++#define BCHP_QUEUE_12_CNTRL_DFAP_REG_END 0x01201acc ++#define BCHP_QUEUE_13_CNTRL_DFAP_REG_START 0x01201ad0 ++#define BCHP_QUEUE_13_CNTRL_DFAP_REG_END 0x01201adc ++#define BCHP_QUEUE_14_CNTRL_DFAP_REG_START 0x01201ae0 ++#define BCHP_QUEUE_14_CNTRL_DFAP_REG_END 0x01201aec ++#define BCHP_QUEUE_15_CNTRL_DFAP_REG_START 0x01201af0 ++#define BCHP_QUEUE_15_CNTRL_DFAP_REG_END 0x01201afc ++#define BCHP_QUEUE_16_CNTRL_DFAP_REG_START 0x01201b00 ++#define BCHP_QUEUE_16_CNTRL_DFAP_REG_END 0x01201b0c ++#define BCHP_QUEUE_17_CNTRL_DFAP_REG_START 0x01201b10 ++#define BCHP_QUEUE_17_CNTRL_DFAP_REG_END 0x01201b1c ++#define BCHP_QUEUE_18_CNTRL_DFAP_REG_START 0x01201b20 ++#define BCHP_QUEUE_18_CNTRL_DFAP_REG_END 0x01201b2c ++#define BCHP_QUEUE_19_CNTRL_DFAP_REG_START 0x01201b30 ++#define BCHP_QUEUE_19_CNTRL_DFAP_REG_END 0x01201b3c ++#define BCHP_QUEUE_20_CNTRL_DFAP_REG_START 0x01201b40 ++#define BCHP_QUEUE_20_CNTRL_DFAP_REG_END 0x01201b4c ++#define BCHP_QUEUE_21_CNTRL_DFAP_REG_START 0x01201b50 ++#define BCHP_QUEUE_21_CNTRL_DFAP_REG_END 0x01201b5c ++#define BCHP_QUEUE_22_CNTRL_DFAP_REG_START 0x01201b60 ++#define BCHP_QUEUE_22_CNTRL_DFAP_REG_END 0x01201b6c ++#define BCHP_QUEUE_23_CNTRL_DFAP_REG_START 0x01201b70 ++#define BCHP_QUEUE_23_CNTRL_DFAP_REG_END 0x01201b7c ++#define BCHP_QUEUE_24_CNTRL_DFAP_REG_START 0x01201b80 ++#define BCHP_QUEUE_24_CNTRL_DFAP_REG_END 0x01201b8c ++#define BCHP_QUEUE_25_CNTRL_DFAP_REG_START 0x01201b90 ++#define BCHP_QUEUE_25_CNTRL_DFAP_REG_END 0x01201b9c ++#define BCHP_QUEUE_26_CNTRL_DFAP_REG_START 0x01201ba0 ++#define BCHP_QUEUE_26_CNTRL_DFAP_REG_END 0x01201bac ++#define BCHP_QUEUE_27_CNTRL_DFAP_REG_START 0x01201bb0 ++#define BCHP_QUEUE_27_CNTRL_DFAP_REG_END 0x01201bbc ++#define BCHP_QUEUE_28_CNTRL_DFAP_REG_START 0x01201bc0 ++#define BCHP_QUEUE_28_CNTRL_DFAP_REG_END 0x01201bcc ++#define BCHP_QUEUE_29_CNTRL_DFAP_REG_START 0x01201bd0 ++#define BCHP_QUEUE_29_CNTRL_DFAP_REG_END 0x01201bdc ++#define BCHP_QUEUE_30_CNTRL_DFAP_REG_START 0x01201be0 ++#define BCHP_QUEUE_30_CNTRL_DFAP_REG_END 0x01201bec ++#define BCHP_QUEUE_31_CNTRL_DFAP_REG_START 0x01201bf0 ++#define BCHP_QUEUE_31_CNTRL_DFAP_REG_END 0x01201bfc ++#define BCHP_QUEUE_0_DATA_DFAP_REG_START 0x01201c00 ++#define BCHP_QUEUE_0_DATA_DFAP_REG_END 0x01201c0c ++#define BCHP_QUEUE_1_DATA_DFAP_REG_START 0x01201c10 ++#define BCHP_QUEUE_1_DATA_DFAP_REG_END 0x01201c1c ++#define BCHP_QUEUE_2_DATA_DFAP_REG_START 0x01201c20 ++#define BCHP_QUEUE_2_DATA_DFAP_REG_END 0x01201c2c ++#define BCHP_QUEUE_3_DATA_DFAP_REG_START 0x01201c30 ++#define BCHP_QUEUE_3_DATA_DFAP_REG_END 0x01201c3c ++#define BCHP_QUEUE_4_DATA_DFAP_REG_START 0x01201c40 ++#define BCHP_QUEUE_4_DATA_DFAP_REG_END 0x01201c4c ++#define BCHP_QUEUE_5_DATA_DFAP_REG_START 0x01201c50 ++#define BCHP_QUEUE_5_DATA_DFAP_REG_END 0x01201c5c ++#define BCHP_QUEUE_6_DATA_DFAP_REG_START 0x01201c60 ++#define BCHP_QUEUE_6_DATA_DFAP_REG_END 0x01201c6c ++#define BCHP_QUEUE_7_DATA_DFAP_REG_START 0x01201c70 ++#define BCHP_QUEUE_7_DATA_DFAP_REG_END 0x01201c7c ++#define BCHP_QUEUE_8_DATA_DFAP_REG_START 0x01201c80 ++#define BCHP_QUEUE_8_DATA_DFAP_REG_END 0x01201c8c ++#define BCHP_QUEUE_9_DATA_DFAP_REG_START 0x01201c90 ++#define BCHP_QUEUE_9_DATA_DFAP_REG_END 0x01201c9c ++#define BCHP_QUEUE_10_DATA_DFAP_REG_START 0x01201ca0 ++#define BCHP_QUEUE_10_DATA_DFAP_REG_END 0x01201cac ++#define BCHP_QUEUE_11_DATA_DFAP_REG_START 0x01201cb0 ++#define BCHP_QUEUE_11_DATA_DFAP_REG_END 0x01201cbc ++#define BCHP_QUEUE_12_DATA_DFAP_REG_START 0x01201cc0 ++#define BCHP_QUEUE_12_DATA_DFAP_REG_END 0x01201ccc ++#define BCHP_QUEUE_13_DATA_DFAP_REG_START 0x01201cd0 ++#define BCHP_QUEUE_13_DATA_DFAP_REG_END 0x01201cdc ++#define BCHP_QUEUE_14_DATA_DFAP_REG_START 0x01201ce0 ++#define BCHP_QUEUE_14_DATA_DFAP_REG_END 0x01201cec ++#define BCHP_QUEUE_15_DATA_DFAP_REG_START 0x01201cf0 ++#define BCHP_QUEUE_15_DATA_DFAP_REG_END 0x01201cfc ++#define BCHP_QUEUE_16_DATA_DFAP_REG_START 0x01201d00 ++#define BCHP_QUEUE_16_DATA_DFAP_REG_END 0x01201d0c ++#define BCHP_QUEUE_17_DATA_DFAP_REG_START 0x01201d10 ++#define BCHP_QUEUE_17_DATA_DFAP_REG_END 0x01201d1c ++#define BCHP_QUEUE_18_DATA_DFAP_REG_START 0x01201d20 ++#define BCHP_QUEUE_18_DATA_DFAP_REG_END 0x01201d2c ++#define BCHP_QUEUE_19_DATA_DFAP_REG_START 0x01201d30 ++#define BCHP_QUEUE_19_DATA_DFAP_REG_END 0x01201d3c ++#define BCHP_QUEUE_20_DATA_DFAP_REG_START 0x01201d40 ++#define BCHP_QUEUE_20_DATA_DFAP_REG_END 0x01201d4c ++#define BCHP_QUEUE_21_DATA_DFAP_REG_START 0x01201d50 ++#define BCHP_QUEUE_21_DATA_DFAP_REG_END 0x01201d5c ++#define BCHP_QUEUE_22_DATA_DFAP_REG_START 0x01201d60 ++#define BCHP_QUEUE_22_DATA_DFAP_REG_END 0x01201d6c ++#define BCHP_QUEUE_23_DATA_DFAP_REG_START 0x01201d70 ++#define BCHP_QUEUE_23_DATA_DFAP_REG_END 0x01201d7c ++#define BCHP_QUEUE_24_DATA_DFAP_REG_START 0x01201d80 ++#define BCHP_QUEUE_24_DATA_DFAP_REG_END 0x01201d8c ++#define BCHP_QUEUE_25_DATA_DFAP_REG_START 0x01201d90 ++#define BCHP_QUEUE_25_DATA_DFAP_REG_END 0x01201d9c ++#define BCHP_QUEUE_26_DATA_DFAP_REG_START 0x01201da0 ++#define BCHP_QUEUE_26_DATA_DFAP_REG_END 0x01201dac ++#define BCHP_QUEUE_27_DATA_DFAP_REG_START 0x01201db0 ++#define BCHP_QUEUE_27_DATA_DFAP_REG_END 0x01201dbc ++#define BCHP_QUEUE_28_DATA_DFAP_REG_START 0x01201dc0 ++#define BCHP_QUEUE_28_DATA_DFAP_REG_END 0x01201dcc ++#define BCHP_QUEUE_29_DATA_DFAP_REG_START 0x01201dd0 ++#define BCHP_QUEUE_29_DATA_DFAP_REG_END 0x01201ddc ++#define BCHP_QUEUE_30_DATA_DFAP_REG_START 0x01201de0 ++#define BCHP_QUEUE_30_DATA_DFAP_REG_END 0x01201dec ++#define BCHP_QUEUE_31_DATA_DFAP_REG_START 0x01201df0 ++#define BCHP_QUEUE_31_DATA_DFAP_REG_END 0x01201dfc ++#define BCHP_QUEUE_STATUS_DFAP_REG_START 0x01201f00 ++#define BCHP_QUEUE_STATUS_DFAP_REG_END 0x01201f7c ++#define BCHP_QUEUE_MIB_DFAP_REG_START 0x01202000 ++#define BCHP_QUEUE_MIB_DFAP_REG_END 0x0120217c ++#define BCHP_QUEUE_TIMER_DFAP_REG_START 0x01202c00 ++#define BCHP_QUEUE_TIMER_DFAP_REG_END 0x01202cfc ++#define BCHP_SharedMem_DFAP_REG_START 0x01204000 ++#define BCHP_SharedMem_DFAP_REG_END 0x0120fffc ++#define BCHP_Memory_DFAP_REG_START 0x01210000 ++#define BCHP_Memory_DFAP_REG_END 0x01217ffc ++#define BCHP_DPE_BASIC_DFAP_REG_START 0x01300000 ++#define BCHP_DPE_BASIC_DFAP_REG_END 0x01300094 ++#define BCHP_DPE_MPEG_DFAP_REG_START 0x01300200 ++#define BCHP_DPE_MPEG_DFAP_REG_END 0x0130034c ++#define BCHP_DPE_HW_DFAP_REG_START 0x01300400 ++#define BCHP_DPE_HW_DFAP_REG_END 0x01300f3c ++#define BCHP_FFE_N_0_DFAP_REG_START 0x01350000 ++#define BCHP_FFE_N_0_DFAP_REG_END 0x013503fc ++#define BCHP_FFE_P_0_DFAP_REG_START 0x01351000 ++#define BCHP_FFE_P_0_DFAP_REG_END 0x013517fc ++#define BCHP_FFE_I_0_DFAP_REG_START 0x01354000 ++#define BCHP_FFE_I_0_DFAP_REG_END 0x01357ffc ++#define BCHP_FFE_N_1_DFAP_REG_START 0x01370000 ++#define BCHP_FFE_N_1_DFAP_REG_END 0x013703fc ++#define BCHP_FFE_P_1_DFAP_REG_START 0x01371000 ++#define BCHP_FFE_P_1_DFAP_REG_END 0x013717fc ++#define BCHP_FFE_I_1_DFAP_REG_START 0x01374000 ++#define BCHP_FFE_I_1_DFAP_REG_END 0x01377ffc ++#define BCHP_DOWNSTREAM_0_REG_START 0x01400000 ++#define BCHP_DOWNSTREAM_0_REG_END 0x01405b7f ++#define BCHP_DOWNSTREAM_1_REG_START 0x01600000 ++#define BCHP_DOWNSTREAM_1_REG_END 0x01605b7f ++#define BCHP_DOWNSTREAM_2_REG_START 0x01800000 ++#define BCHP_DOWNSTREAM_2_REG_END 0x01805b7f ++#define BCHP_DOWNSTREAM_3_REG_START 0x01a00000 ++#define BCHP_DOWNSTREAM_3_REG_END 0x01a05b7f ++#define BCHP_APM_BASE_APM_REG_START 0x01c00000 ++#define BCHP_APM_BASE_APM_REG_END 0x01c001f8 ++#define BCHP_APM_PCM_APM_REG_START 0x01c00200 ++#define BCHP_APM_PCM_APM_REG_END 0x01c0027c ++#define BCHP_HVG_BASE_APM_REG_START 0x01c00300 ++#define BCHP_HVG_BASE_APM_REG_END 0x01c00460 ++#define BCHP_APM_DMA_CTRL_APM_REG_START 0x01c00800 ++#define BCHP_APM_DMA_CTRL_APM_REG_END 0x01c00844 ++#define BCHP_APM_DMA_CH1_APM_REG_START 0x01c00a00 ++#define BCHP_APM_DMA_CH1_APM_REG_END 0x01c00a0c ++#define BCHP_APM_DMA_CH2_APM_REG_START 0x01c00a10 ++#define BCHP_APM_DMA_CH2_APM_REG_END 0x01c00a1c ++#define BCHP_APM_DMA_CH3_APM_REG_START 0x01c00a20 ++#define BCHP_APM_DMA_CH3_APM_REG_END 0x01c00a2c ++#define BCHP_APM_DMA_CH4_APM_REG_START 0x01c00a30 ++#define BCHP_APM_DMA_CH4_APM_REG_END 0x01c00a3c ++#define BCHP_APM_DMA_CH5_APM_REG_START 0x01c00a40 ++#define BCHP_APM_DMA_CH5_APM_REG_END 0x01c00a4c ++#define BCHP_APM_DMA_CH6_APM_REG_START 0x01c00a50 ++#define BCHP_APM_DMA_CH6_APM_REG_END 0x01c00a5c ++#define BCHP_APM_DMA_CH1_STATE_APM_REG_START 0x01c00c00 ++#define BCHP_APM_DMA_CH1_STATE_APM_REG_END 0x01c00c0c ++#define BCHP_APM_DMA_CH2_STATE_APM_REG_START 0x01c00c10 ++#define BCHP_APM_DMA_CH2_STATE_APM_REG_END 0x01c00c1c ++#define BCHP_APM_DMA_CH3_STATE_APM_REG_START 0x01c00c20 ++#define BCHP_APM_DMA_CH3_STATE_APM_REG_END 0x01c00c2c ++#define BCHP_APM_DMA_CH4_STATE_APM_REG_START 0x01c00c30 ++#define BCHP_APM_DMA_CH4_STATE_APM_REG_END 0x01c00c3c ++#define BCHP_APM_DMA_CH5_STATE_APM_REG_START 0x01c00c40 ++#define BCHP_APM_DMA_CH5_STATE_APM_REG_END 0x01c00c4c ++#define BCHP_APM_DMA_CH6_STATE_APM_REG_START 0x01c00c50 ++#define BCHP_APM_DMA_CH6_STATE_APM_REG_END 0x01c00c5c ++#define BCHP_BMU_DMEM_BMU_REG_START 0x01c01000 ++#define BCHP_BMU_DMEM_BMU_REG_END 0x01c013fc ++#define BCHP_BMU_SMEM_BMU_REG_START 0x01c01400 ++#define BCHP_BMU_SMEM_BMU_REG_END 0x01c015fc ++#define BCHP_BMU_LS_BMU_REG_START 0x01c01800 ++#define BCHP_BMU_LS_BMU_REG_END 0x01c0191c ++#define BCHP_BMU_CP_BMU_REG_START 0x01c01c00 ++#define BCHP_BMU_CP_BMU_REG_END 0x01c01d0c ++#define BCHP_PICO_IMEM_PICO_REG_START 0x01c10000 ++#define BCHP_PICO_IMEM_PICO_REG_END 0x01c127fc ++#define BCHP_DECT_AHB_DCT_REG_START 0x01e00000 ++#define BCHP_DECT_AHB_DCT_REG_END 0x01e07f80 ++#define BCHP_DECT_SHM_DCT_REG_START 0x01e10000 ++#define BCHP_DECT_SHM_DCT_REG_END 0x01e100ac ++#define BCHP_DECT_APB_DCT_REG_START 0x01e10800 ++#define BCHP_DECT_APB_DCT_REG_END 0x01e10802 ++#define BCHP_LEAP_ROM_REG_START 0x02000000 ++#define BCHP_LEAP_ROM_REG_END 0x02007ffc ++#define BCHP_LEAP_PROG0_MEM_REG_START 0x02040000 ++#define BCHP_LEAP_PROG0_MEM_REG_END 0x02043ffc ++#define BCHP_LEAP_CPU_CORE_REGS_REG_START 0x02080000 ++#define BCHP_LEAP_CPU_CORE_REGS_REG_END 0x020800fc ++#define BCHP_LEAP_CPU_AUX_REGS_REG_START 0x020a0000 ++#define BCHP_LEAP_CPU_AUX_REGS_REG_END 0x020a1058 ++#define BCHP_LEAP_HAB_MEM_REG_START 0x020a8000 ++#define BCHP_LEAP_HAB_MEM_REG_END 0x020a83fc ++#define BCHP_LEAP_UART_REG_START 0x020a9000 ++#define BCHP_LEAP_UART_REG_END 0x020a9ffc ++#define BCHP_LEAP_WDG_REG_START 0x020aa000 ++#define BCHP_LEAP_WDG_REG_END 0x020aaffc ++#define BCHP_LEAP_CTRL_REG_START 0x02100000 ++#define BCHP_LEAP_CTRL_REG_END 0x021002fc ++#define BCHP_LEAP_L1_REG_START 0x02100400 ++#define BCHP_LEAP_L1_REG_END 0x02100418 ++#define BCHP_LEAP_L2_REG_START 0x02100500 ++#define BCHP_LEAP_L2_REG_END 0x02100514 ++#define BCHP_LEAP_HOST_L1_REG_START 0x02100600 ++#define BCHP_LEAP_HOST_L1_REG_END 0x02100618 ++#define BCHP_LEAP_HOST_L2_REG_START 0x02100700 ++#define BCHP_LEAP_HOST_L2_REG_END 0x02100714 ++#define BCHP_LEAP_ROM_PATCH_REG_START 0x02100a00 ++#define BCHP_LEAP_ROM_PATCH_REG_END 0x02100a3c ++#define BCHP_DS_WFE_MICRO_REG_START 0x02200000 ++#define BCHP_DS_WFE_MICRO_REG_END 0x02200074 ++#define BCHP_DS_WFE_FS_REG_START 0x02201400 ++#define BCHP_DS_WFE_FS_REG_END 0x02201444 ++#define BCHP_DS_WFE_FC_A_REG_START 0x02201800 ++#define BCHP_DS_WFE_FC_A_REG_END 0x02201844 ++#define BCHP_DS_WFE_FC_B_REG_START 0x02201c00 ++#define BCHP_DS_WFE_FC_B_REG_END 0x02201c44 ++#define BCHP_DS_WFE_CZ_0_REG_START 0x02202000 ++#define BCHP_DS_WFE_CZ_0_REG_END 0x02202010 ++#define BCHP_DS_WFE_CZ_1_REG_START 0x02202400 ++#define BCHP_DS_WFE_CZ_1_REG_END 0x02202410 ++#define BCHP_DS_WFE_CZ_2_REG_START 0x02202800 ++#define BCHP_DS_WFE_CZ_2_REG_END 0x02202810 ++#define BCHP_DS_WFE_CZ_3_REG_START 0x02202c00 ++#define BCHP_DS_WFE_CZ_3_REG_END 0x02202c10 ++#define BCHP_DS_WFE_CZ_4_REG_START 0x02203000 ++#define BCHP_DS_WFE_CZ_4_REG_END 0x02203010 ++#define BCHP_DS_WFE_CZ_5_REG_START 0x02203400 ++#define BCHP_DS_WFE_CZ_5_REG_END 0x02203410 ++#define BCHP_DS_WFE_CZ_6_REG_START 0x02203800 ++#define BCHP_DS_WFE_CZ_6_REG_END 0x02203810 ++#define BCHP_DS_WFE_CZ_7_REG_START 0x02203c00 ++#define BCHP_DS_WFE_CZ_7_REG_END 0x02203c10 ++#define BCHP_DS_WFE_CZ_8_REG_START 0x02204000 ++#define BCHP_DS_WFE_CZ_8_REG_END 0x02204010 ++#define BCHP_DS_WFE_CZ_9_REG_START 0x02204400 ++#define BCHP_DS_WFE_CZ_9_REG_END 0x02204410 ++#define BCHP_DS_WFE_CZ_10_REG_START 0x02204800 ++#define BCHP_DS_WFE_CZ_10_REG_END 0x02204810 ++#define BCHP_DS_WFE_CZ_11_REG_START 0x02204c00 ++#define BCHP_DS_WFE_CZ_11_REG_END 0x02204c10 ++#define BCHP_DS_WFE_CZ_12_REG_START 0x02205000 ++#define BCHP_DS_WFE_CZ_12_REG_END 0x02205010 ++#define BCHP_DS_WFE_CZ_13_REG_START 0x02205400 ++#define BCHP_DS_WFE_CZ_13_REG_END 0x02205410 ++#define BCHP_DS_WFE_CZ_14_REG_START 0x02205800 ++#define BCHP_DS_WFE_CZ_14_REG_END 0x02205810 ++#define BCHP_DS_WFE_CZ_15_REG_START 0x02205c00 ++#define BCHP_DS_WFE_CZ_15_REG_END 0x02205c10 ++#define BCHP_DS_WFE_CZ_16_REG_START 0x02206000 ++#define BCHP_DS_WFE_CZ_16_REG_END 0x02206010 ++#define BCHP_DS_WFE_CZ_17_REG_START 0x02206400 ++#define BCHP_DS_WFE_CZ_17_REG_END 0x02206410 ++#define BCHP_DS_WFE_CZ_18_REG_START 0x02206800 ++#define BCHP_DS_WFE_CZ_18_REG_END 0x02206810 ++#define BCHP_DS_WFE_CZ_19_REG_START 0x02206c00 ++#define BCHP_DS_WFE_CZ_19_REG_END 0x02206c10 ++#define BCHP_DS_WFE_CZ_20_REG_START 0x02207000 ++#define BCHP_DS_WFE_CZ_20_REG_END 0x02207010 ++#define BCHP_DS_WFE_CZ_21_REG_START 0x02207400 ++#define BCHP_DS_WFE_CZ_21_REG_END 0x02207410 ++#define BCHP_DS_WFE_CZ_22_REG_START 0x02207800 ++#define BCHP_DS_WFE_CZ_22_REG_END 0x02207810 ++#define BCHP_DS_WFE_CZ_23_REG_START 0x02207c00 ++#define BCHP_DS_WFE_CZ_23_REG_END 0x02207c10 ++#define BCHP_DS_WFE_CZ_24_REG_START 0x02208000 ++#define BCHP_DS_WFE_CZ_24_REG_END 0x02208010 ++#define BCHP_DS_WFE_CZ_25_REG_START 0x02208400 ++#define BCHP_DS_WFE_CZ_25_REG_END 0x02208410 ++#define BCHP_DS_WFE_CZ_26_REG_START 0x02208800 ++#define BCHP_DS_WFE_CZ_26_REG_END 0x02208810 ++#define BCHP_DS_WFE_CZ_27_REG_START 0x02208c00 ++#define BCHP_DS_WFE_CZ_27_REG_END 0x02208c10 ++#define BCHP_DS_WFE_CZ_28_REG_START 0x02209000 ++#define BCHP_DS_WFE_CZ_28_REG_END 0x02209010 ++#define BCHP_DS_WFE_CZ_29_REG_START 0x02209400 ++#define BCHP_DS_WFE_CZ_29_REG_END 0x02209410 ++#define BCHP_DS_WFE_CZ_30_REG_START 0x02209800 ++#define BCHP_DS_WFE_CZ_30_REG_END 0x02209810 ++#define BCHP_DS_WFE_CZ_31_REG_START 0x02209c00 ++#define BCHP_DS_WFE_CZ_31_REG_END 0x02209c10 ++#define BCHP_DS_WFE_CZ_32_REG_START 0x0220a000 ++#define BCHP_DS_WFE_CZ_32_REG_END 0x0220a010 ++#define BCHP_DS_WFE_CZ_33_REG_START 0x0220a400 ++#define BCHP_DS_WFE_CZ_33_REG_END 0x0220a410 ++#define BCHP_AIF_WB_DS_CORE_REG_START 0x0220e000 ++#define BCHP_AIF_WB_DS_CORE_REG_END 0x0220e21c ++#define BCHP_AIF_WB_DS_ANA_REG_START 0x0220e300 ++#define BCHP_AIF_WB_DS_ANA_REG_END 0x0220e39c ++#define BCHP_AIF_MDAC_CAL_CORE_REG_START 0x0220e400 ++#define BCHP_AIF_MDAC_CAL_CORE_REG_END 0x0220e4f0 ++#define BCHP_OOB_REG_START 0x02220000 ++#define BCHP_OOB_REG_END 0x022201f8 ++#define BCHP_DS_TOPM_REG_START 0x02222000 ++#define BCHP_DS_TOPM_REG_END 0x02222068 ++#define BCHP_DS_TOPS_REG_START 0x02223000 ++#define BCHP_DS_TOPS_REG_END 0x0222309c ++#define BCHP_DS_REG_START 0x02224000 ++#define BCHP_DS_REG_END 0x0222509c ++#define BCHP_DS_1_REG_START 0x02226000 ++#define BCHP_DS_1_REG_END 0x0222709c ++#define BCHP_DS_2_REG_START 0x02228000 ++#define BCHP_DS_2_REG_END 0x0222909c ++#define BCHP_DS_3_REG_START 0x0222a000 ++#define BCHP_DS_3_REG_END 0x0222b09c ++#define BCHP_DS_4_REG_START 0x0222c000 ++#define BCHP_DS_4_REG_END 0x0222d09c ++#define BCHP_DS_5_REG_START 0x0222e000 ++#define BCHP_DS_5_REG_END 0x0222f09c ++#define BCHP_DS_6_REG_START 0x02230000 ++#define BCHP_DS_6_REG_END 0x0223109c ++#define BCHP_DS_7_REG_START 0x02232000 ++#define BCHP_DS_7_REG_END 0x0223309c ++#define BCHP_DS_B_TOPM_REG_START 0x02242000 ++#define BCHP_DS_B_TOPM_REG_END 0x02242068 ++#define BCHP_DS_B_TOPS_REG_START 0x02243000 ++#define BCHP_DS_B_TOPS_REG_END 0x0224309c ++#define BCHP_DS_8_REG_START 0x02244000 ++#define BCHP_DS_8_REG_END 0x0224509c ++#define BCHP_DS_9_REG_START 0x02246000 ++#define BCHP_DS_9_REG_END 0x0224709c ++#define BCHP_DS_10_REG_START 0x02248000 ++#define BCHP_DS_10_REG_END 0x0224909c ++#define BCHP_DS_11_REG_START 0x0224a000 ++#define BCHP_DS_11_REG_END 0x0224b09c ++#define BCHP_DS_12_REG_START 0x0224c000 ++#define BCHP_DS_12_REG_END 0x0224d09c ++#define BCHP_DS_13_REG_START 0x0224e000 ++#define BCHP_DS_13_REG_END 0x0224f09c ++#define BCHP_DS_14_REG_START 0x02250000 ++#define BCHP_DS_14_REG_END 0x0225109c ++#define BCHP_DS_15_REG_START 0x02252000 ++#define BCHP_DS_15_REG_END 0x0225309c ++#define BCHP_DS_C_TOPM_REG_START 0x02262000 ++#define BCHP_DS_C_TOPM_REG_END 0x02262068 ++#define BCHP_DS_C_TOPS_REG_START 0x02263000 ++#define BCHP_DS_C_TOPS_REG_END 0x0226309c ++#define BCHP_DS_16_REG_START 0x02264000 ++#define BCHP_DS_16_REG_END 0x0226509c ++#define BCHP_DS_17_REG_START 0x02266000 ++#define BCHP_DS_17_REG_END 0x0226709c ++#define BCHP_DS_18_REG_START 0x02268000 ++#define BCHP_DS_18_REG_END 0x0226909c ++#define BCHP_DS_19_REG_START 0x0226a000 ++#define BCHP_DS_19_REG_END 0x0226b09c ++#define BCHP_DS_20_REG_START 0x0226c000 ++#define BCHP_DS_20_REG_END 0x0226d09c ++#define BCHP_DS_21_REG_START 0x0226e000 ++#define BCHP_DS_21_REG_END 0x0226f09c ++#define BCHP_DS_22_REG_START 0x02270000 ++#define BCHP_DS_22_REG_END 0x0227109c ++#define BCHP_DS_23_REG_START 0x02272000 ++#define BCHP_DS_23_REG_END 0x0227309c ++#define BCHP_DS_D_TOPM_REG_START 0x02282000 ++#define BCHP_DS_D_TOPM_REG_END 0x02282068 ++#define BCHP_DS_D_TOPS_REG_START 0x02283000 ++#define BCHP_DS_D_TOPS_REG_END 0x0228309c ++#define BCHP_DS_24_REG_START 0x02284000 ++#define BCHP_DS_24_REG_END 0x0228509c ++#define BCHP_DS_25_REG_START 0x02286000 ++#define BCHP_DS_25_REG_END 0x0228709c ++#define BCHP_DS_26_REG_START 0x02288000 ++#define BCHP_DS_26_REG_END 0x0228909c ++#define BCHP_DS_27_REG_START 0x0228a000 ++#define BCHP_DS_27_REG_END 0x0228b09c ++#define BCHP_DS_28_REG_START 0x0228c000 ++#define BCHP_DS_28_REG_END 0x0228d09c ++#define BCHP_DS_29_REG_START 0x0228e000 ++#define BCHP_DS_29_REG_END 0x0228f09c ++#define BCHP_DS_30_REG_START 0x02290000 ++#define BCHP_DS_30_REG_END 0x0229109c ++#define BCHP_DS_31_REG_START 0x02292000 ++#define BCHP_DS_31_REG_END 0x0229309c ++#define BCHP_MEMC_GEN_UB_REG_START 0x03800000 ++#define BCHP_MEMC_GEN_UB_REG_END 0x038007fc ++#define BCHP_MEMC_EDIS_UB_0_REG_START 0x03800800 ++#define BCHP_MEMC_EDIS_UB_0_REG_END 0x038008fc ++#define BCHP_MEMC_EDIS_UB_1_REG_START 0x03800a00 ++#define BCHP_MEMC_EDIS_UB_1_REG_END 0x03800afc ++#define BCHP_MEMC_ARC_UB_REG_START 0x03800c00 ++#define BCHP_MEMC_ARC_UB_REG_END 0x03800f74 ++#define BCHP_MEMC_ARB_UB_REG_START 0x03801000 ++#define BCHP_MEMC_ARB_UB_REG_END 0x038014cc ++#define BCHP_MEMC_DDR_UB_REG_START 0x03802000 ++#define BCHP_MEMC_DDR_UB_REG_END 0x038027fc ++#define BCHP_MEMC_L2_UB_0_REG_START 0x03803000 ++#define BCHP_MEMC_L2_UB_0_REG_END 0x03803044 ++#define BCHP_MEMC_L2_UB_1_REG_START 0x03803200 ++#define BCHP_MEMC_L2_UB_1_REG_END 0x03803244 ++#define BCHP_MEMC_L2_UB_2_REG_START 0x03803400 ++#define BCHP_MEMC_L2_UB_2_REG_END 0x03803444 ++#define BCHP_MEMC_TRACELOG_0_UB_REG_START 0x03803800 ++#define BCHP_MEMC_TRACELOG_0_UB_REG_END 0x038039fc ++#define BCHP_MEMC_RGRB_UB_REG_START 0x03804000 ++#define BCHP_MEMC_RGRB_UB_REG_END 0x03804010 ++#define BCHP_MEMC_MISC_UB_REG_START 0x03805000 ++#define BCHP_MEMC_MISC_UB_REG_END 0x03805010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_UB_REG_START 0x03806000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_UB_REG_END 0x03806218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_UB_REG_START 0x03806400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_UB_REG_END 0x03806518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_UB_REG_START 0x03806600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_UB_REG_END 0x03806718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_UB_REG_START 0x03806800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_UB_REG_END 0x03806918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_UB_REG_START 0x03806a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_UB_REG_END 0x03806b18 ++#define BCHP_DDR34_PHY_ECC_LANE_UB_REG_START 0x03806c00 ++#define BCHP_DDR34_PHY_ECC_LANE_UB_REG_END 0x03806d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_UB_REG_START 0x03808000 ++#define BCHP_SHIMPHY_ADDR_CNTL_UB_REG_END 0x038080e0 ++#define BCHP_MEMC_UBUS_UB_REG_START 0x03809000 ++#define BCHP_MEMC_UBUS_UB_REG_END 0x038094dc ++#define BCHP_MEMC_ATW_UBUS_UB_REG_START 0x03809800 ++#define BCHP_MEMC_ATW_UBUS_UB_REG_END 0x038099e0 ++#define BCHP_MEMC_SENTINEL_0_UB_REG_START 0x03840000 ++#define BCHP_MEMC_SENTINEL_0_UB_REG_END 0x0387fffc ++#define BCHP_CM_TOP_CTRL_REG_START 0x03880000 ++#define BCHP_CM_TOP_CTRL_REG_END 0x03880370 ++#define BCHP_RG_TOP_CTRL_REG_START 0x03881000 ++#define BCHP_RG_TOP_CTRL_REG_END 0x0388104c ++#define BCHP_UART_REG_START 0x03881800 ++#define BCHP_UART_REG_END 0x0388181c ++#define BCHP_CM_AON_CTRL_REG_START 0x03882000 ++#define BCHP_CM_AON_CTRL_REG_END 0x03882008 ++#define BCHP_PROD_OTP_GRB_UB_REG_START 0x03890000 ++#define BCHP_PROD_OTP_GRB_UB_REG_END 0x0389000c ++#define BCHP_JTAG_OTP_UB_REG_START 0x03890100 ++#define BCHP_JTAG_OTP_UB_REG_END 0x0389015c ++#define BCHP_CPU_COMM_REGS_CPUC_REG_START 0x038f0000 ++#define BCHP_CPU_COMM_REGS_CPUC_REG_END 0x038f007c ++#define BCHP_MBOX_CPUC_REG_START 0x038f0080 ++#define BCHP_MBOX_CPUC_REG_END 0x038f00fc ++#define BCHP_HW_COUNTER_CPUC_REG_START 0x038f0100 ++#define BCHP_HW_COUNTER_CPUC_REG_END 0x038f0184 ++#define BCHP_BTM_CPUC_REG_START 0x038f0200 ++#define BCHP_BTM_CPUC_REG_END 0x038f0240 ++#define BCHP_DQM_MDMA_CPUC_REG_START 0x038f0280 ++#define BCHP_DQM_MDMA_CPUC_REG_END 0x038f037c ++#define BCHP_DQM_CPUC_REG_START 0x038f0380 ++#define BCHP_DQM_CPUC_REG_END 0x038f03f0 ++#define BCHP_CPU_COMM_QUEUE_0_CNTRL_CPUC_REG_START 0x038f0400 ++#define BCHP_CPU_COMM_QUEUE_0_CNTRL_CPUC_REG_END 0x038f040c ++#define BCHP_CPU_COMM_QUEUE_1_CNTRL_CPUC_REG_START 0x038f0410 ++#define BCHP_CPU_COMM_QUEUE_1_CNTRL_CPUC_REG_END 0x038f041c ++#define BCHP_CPU_COMM_QUEUE_2_CNTRL_CPUC_REG_START 0x038f0420 ++#define BCHP_CPU_COMM_QUEUE_2_CNTRL_CPUC_REG_END 0x038f042c ++#define BCHP_CPU_COMM_QUEUE_3_CNTRL_CPUC_REG_START 0x038f0430 ++#define BCHP_CPU_COMM_QUEUE_3_CNTRL_CPUC_REG_END 0x038f043c ++#define BCHP_CPU_COMM_QUEUE_4_CNTRL_CPUC_REG_START 0x038f0440 ++#define BCHP_CPU_COMM_QUEUE_4_CNTRL_CPUC_REG_END 0x038f044c ++#define BCHP_CPU_COMM_QUEUE_5_CNTRL_CPUC_REG_START 0x038f0450 ++#define BCHP_CPU_COMM_QUEUE_5_CNTRL_CPUC_REG_END 0x038f045c ++#define BCHP_CPU_COMM_QUEUE_6_CNTRL_CPUC_REG_START 0x038f0460 ++#define BCHP_CPU_COMM_QUEUE_6_CNTRL_CPUC_REG_END 0x038f046c ++#define BCHP_CPU_COMM_QUEUE_7_CNTRL_CPUC_REG_START 0x038f0470 ++#define BCHP_CPU_COMM_QUEUE_7_CNTRL_CPUC_REG_END 0x038f047c ++#define BCHP_CPU_COMM_QUEUE_8_CNTRL_CPUC_REG_START 0x038f0480 ++#define BCHP_CPU_COMM_QUEUE_8_CNTRL_CPUC_REG_END 0x038f048c ++#define BCHP_CPU_COMM_QUEUE_9_CNTRL_CPUC_REG_START 0x038f0490 ++#define BCHP_CPU_COMM_QUEUE_9_CNTRL_CPUC_REG_END 0x038f049c ++#define BCHP_CPU_COMM_QUEUE_10_CNTRL_CPUC_REG_START 0x038f04a0 ++#define BCHP_CPU_COMM_QUEUE_10_CNTRL_CPUC_REG_END 0x038f04ac ++#define BCHP_CPU_COMM_QUEUE_11_CNTRL_CPUC_REG_START 0x038f04b0 ++#define BCHP_CPU_COMM_QUEUE_11_CNTRL_CPUC_REG_END 0x038f04bc ++#define BCHP_CPU_COMM_QUEUE_12_CNTRL_CPUC_REG_START 0x038f04c0 ++#define BCHP_CPU_COMM_QUEUE_12_CNTRL_CPUC_REG_END 0x038f04cc ++#define BCHP_CPU_COMM_QUEUE_13_CNTRL_CPUC_REG_START 0x038f04d0 ++#define BCHP_CPU_COMM_QUEUE_13_CNTRL_CPUC_REG_END 0x038f04dc ++#define BCHP_CPU_COMM_QUEUE_14_CNTRL_CPUC_REG_START 0x038f04e0 ++#define BCHP_CPU_COMM_QUEUE_14_CNTRL_CPUC_REG_END 0x038f04ec ++#define BCHP_CPU_COMM_QUEUE_15_CNTRL_CPUC_REG_START 0x038f04f0 ++#define BCHP_CPU_COMM_QUEUE_15_CNTRL_CPUC_REG_END 0x038f04fc ++#define BCHP_CPU_COMM_QUEUE_16_CNTRL_CPUC_REG_START 0x038f0500 ++#define BCHP_CPU_COMM_QUEUE_16_CNTRL_CPUC_REG_END 0x038f050c ++#define BCHP_CPU_COMM_QUEUE_17_CNTRL_CPUC_REG_START 0x038f0510 ++#define BCHP_CPU_COMM_QUEUE_17_CNTRL_CPUC_REG_END 0x038f051c ++#define BCHP_CPU_COMM_QUEUE_18_CNTRL_CPUC_REG_START 0x038f0520 ++#define BCHP_CPU_COMM_QUEUE_18_CNTRL_CPUC_REG_END 0x038f052c ++#define BCHP_CPU_COMM_QUEUE_19_CNTRL_CPUC_REG_START 0x038f0530 ++#define BCHP_CPU_COMM_QUEUE_19_CNTRL_CPUC_REG_END 0x038f053c ++#define BCHP_CPU_COMM_QUEUE_20_CNTRL_CPUC_REG_START 0x038f0540 ++#define BCHP_CPU_COMM_QUEUE_20_CNTRL_CPUC_REG_END 0x038f054c ++#define BCHP_CPU_COMM_QUEUE_21_CNTRL_CPUC_REG_START 0x038f0550 ++#define BCHP_CPU_COMM_QUEUE_21_CNTRL_CPUC_REG_END 0x038f055c ++#define BCHP_CPU_COMM_QUEUE_22_CNTRL_CPUC_REG_START 0x038f0560 ++#define BCHP_CPU_COMM_QUEUE_22_CNTRL_CPUC_REG_END 0x038f056c ++#define BCHP_CPU_COMM_QUEUE_23_CNTRL_CPUC_REG_START 0x038f0570 ++#define BCHP_CPU_COMM_QUEUE_23_CNTRL_CPUC_REG_END 0x038f057c ++#define BCHP_CPU_COMM_QUEUE_24_CNTRL_CPUC_REG_START 0x038f0580 ++#define BCHP_CPU_COMM_QUEUE_24_CNTRL_CPUC_REG_END 0x038f058c ++#define BCHP_CPU_COMM_QUEUE_25_CNTRL_CPUC_REG_START 0x038f0590 ++#define BCHP_CPU_COMM_QUEUE_25_CNTRL_CPUC_REG_END 0x038f059c ++#define BCHP_CPU_COMM_QUEUE_26_CNTRL_CPUC_REG_START 0x038f05a0 ++#define BCHP_CPU_COMM_QUEUE_26_CNTRL_CPUC_REG_END 0x038f05ac ++#define BCHP_CPU_COMM_QUEUE_27_CNTRL_CPUC_REG_START 0x038f05b0 ++#define BCHP_CPU_COMM_QUEUE_27_CNTRL_CPUC_REG_END 0x038f05bc ++#define BCHP_CPU_COMM_QUEUE_28_CNTRL_CPUC_REG_START 0x038f05c0 ++#define BCHP_CPU_COMM_QUEUE_28_CNTRL_CPUC_REG_END 0x038f05cc ++#define BCHP_CPU_COMM_QUEUE_29_CNTRL_CPUC_REG_START 0x038f05d0 ++#define BCHP_CPU_COMM_QUEUE_29_CNTRL_CPUC_REG_END 0x038f05dc ++#define BCHP_CPU_COMM_QUEUE_30_CNTRL_CPUC_REG_START 0x038f05e0 ++#define BCHP_CPU_COMM_QUEUE_30_CNTRL_CPUC_REG_END 0x038f05ec ++#define BCHP_CPU_COMM_QUEUE_31_CNTRL_CPUC_REG_START 0x038f05f0 ++#define BCHP_CPU_COMM_QUEUE_31_CNTRL_CPUC_REG_END 0x038f05fc ++#define BCHP_CPU_COMM_QUEUE_0_DATA_CPUC_REG_START 0x038f0800 ++#define BCHP_CPU_COMM_QUEUE_0_DATA_CPUC_REG_END 0x038f080c ++#define BCHP_CPU_COMM_QUEUE_1_DATA_CPUC_REG_START 0x038f0810 ++#define BCHP_CPU_COMM_QUEUE_1_DATA_CPUC_REG_END 0x038f081c ++#define BCHP_CPU_COMM_QUEUE_2_DATA_CPUC_REG_START 0x038f0820 ++#define BCHP_CPU_COMM_QUEUE_2_DATA_CPUC_REG_END 0x038f082c ++#define BCHP_CPU_COMM_QUEUE_3_DATA_CPUC_REG_START 0x038f0830 ++#define BCHP_CPU_COMM_QUEUE_3_DATA_CPUC_REG_END 0x038f083c ++#define BCHP_CPU_COMM_QUEUE_4_DATA_CPUC_REG_START 0x038f0840 ++#define BCHP_CPU_COMM_QUEUE_4_DATA_CPUC_REG_END 0x038f084c ++#define BCHP_CPU_COMM_QUEUE_5_DATA_CPUC_REG_START 0x038f0850 ++#define BCHP_CPU_COMM_QUEUE_5_DATA_CPUC_REG_END 0x038f085c ++#define BCHP_CPU_COMM_QUEUE_6_DATA_CPUC_REG_START 0x038f0860 ++#define BCHP_CPU_COMM_QUEUE_6_DATA_CPUC_REG_END 0x038f086c ++#define BCHP_CPU_COMM_QUEUE_7_DATA_CPUC_REG_START 0x038f0870 ++#define BCHP_CPU_COMM_QUEUE_7_DATA_CPUC_REG_END 0x038f087c ++#define BCHP_CPU_COMM_QUEUE_8_DATA_CPUC_REG_START 0x038f0880 ++#define BCHP_CPU_COMM_QUEUE_8_DATA_CPUC_REG_END 0x038f088c ++#define BCHP_CPU_COMM_QUEUE_9_DATA_CPUC_REG_START 0x038f0890 ++#define BCHP_CPU_COMM_QUEUE_9_DATA_CPUC_REG_END 0x038f089c ++#define BCHP_CPU_COMM_QUEUE_10_DATA_CPUC_REG_START 0x038f08a0 ++#define BCHP_CPU_COMM_QUEUE_10_DATA_CPUC_REG_END 0x038f08ac ++#define BCHP_CPU_COMM_QUEUE_11_DATA_CPUC_REG_START 0x038f08b0 ++#define BCHP_CPU_COMM_QUEUE_11_DATA_CPUC_REG_END 0x038f08bc ++#define BCHP_CPU_COMM_QUEUE_12_DATA_CPUC_REG_START 0x038f08c0 ++#define BCHP_CPU_COMM_QUEUE_12_DATA_CPUC_REG_END 0x038f08cc ++#define BCHP_CPU_COMM_QUEUE_13_DATA_CPUC_REG_START 0x038f08d0 ++#define BCHP_CPU_COMM_QUEUE_13_DATA_CPUC_REG_END 0x038f08dc ++#define BCHP_CPU_COMM_QUEUE_14_DATA_CPUC_REG_START 0x038f08e0 ++#define BCHP_CPU_COMM_QUEUE_14_DATA_CPUC_REG_END 0x038f08ec ++#define BCHP_CPU_COMM_QUEUE_15_DATA_CPUC_REG_START 0x038f08f0 ++#define BCHP_CPU_COMM_QUEUE_15_DATA_CPUC_REG_END 0x038f08fc ++#define BCHP_CPU_COMM_QUEUE_16_DATA_CPUC_REG_START 0x038f0900 ++#define BCHP_CPU_COMM_QUEUE_16_DATA_CPUC_REG_END 0x038f090c ++#define BCHP_CPU_COMM_QUEUE_17_DATA_CPUC_REG_START 0x038f0910 ++#define BCHP_CPU_COMM_QUEUE_17_DATA_CPUC_REG_END 0x038f091c ++#define BCHP_CPU_COMM_QUEUE_18_DATA_CPUC_REG_START 0x038f0920 ++#define BCHP_CPU_COMM_QUEUE_18_DATA_CPUC_REG_END 0x038f092c ++#define BCHP_CPU_COMM_QUEUE_19_DATA_CPUC_REG_START 0x038f0930 ++#define BCHP_CPU_COMM_QUEUE_19_DATA_CPUC_REG_END 0x038f093c ++#define BCHP_CPU_COMM_QUEUE_20_DATA_CPUC_REG_START 0x038f0940 ++#define BCHP_CPU_COMM_QUEUE_20_DATA_CPUC_REG_END 0x038f094c ++#define BCHP_CPU_COMM_QUEUE_21_DATA_CPUC_REG_START 0x038f0950 ++#define BCHP_CPU_COMM_QUEUE_21_DATA_CPUC_REG_END 0x038f095c ++#define BCHP_CPU_COMM_QUEUE_22_DATA_CPUC_REG_START 0x038f0960 ++#define BCHP_CPU_COMM_QUEUE_22_DATA_CPUC_REG_END 0x038f096c ++#define BCHP_CPU_COMM_QUEUE_23_DATA_CPUC_REG_START 0x038f0970 ++#define BCHP_CPU_COMM_QUEUE_23_DATA_CPUC_REG_END 0x038f097c ++#define BCHP_CPU_COMM_QUEUE_24_DATA_CPUC_REG_START 0x038f0980 ++#define BCHP_CPU_COMM_QUEUE_24_DATA_CPUC_REG_END 0x038f098c ++#define BCHP_CPU_COMM_QUEUE_25_DATA_CPUC_REG_START 0x038f0990 ++#define BCHP_CPU_COMM_QUEUE_25_DATA_CPUC_REG_END 0x038f099c ++#define BCHP_CPU_COMM_QUEUE_26_DATA_CPUC_REG_START 0x038f09a0 ++#define BCHP_CPU_COMM_QUEUE_26_DATA_CPUC_REG_END 0x038f09ac ++#define BCHP_CPU_COMM_QUEUE_27_DATA_CPUC_REG_START 0x038f09b0 ++#define BCHP_CPU_COMM_QUEUE_27_DATA_CPUC_REG_END 0x038f09bc ++#define BCHP_CPU_COMM_QUEUE_28_DATA_CPUC_REG_START 0x038f09c0 ++#define BCHP_CPU_COMM_QUEUE_28_DATA_CPUC_REG_END 0x038f09cc ++#define BCHP_CPU_COMM_QUEUE_29_DATA_CPUC_REG_START 0x038f09d0 ++#define BCHP_CPU_COMM_QUEUE_29_DATA_CPUC_REG_END 0x038f09dc ++#define BCHP_CPU_COMM_QUEUE_30_DATA_CPUC_REG_START 0x038f09e0 ++#define BCHP_CPU_COMM_QUEUE_30_DATA_CPUC_REG_END 0x038f09ec ++#define BCHP_CPU_COMM_QUEUE_31_DATA_CPUC_REG_START 0x038f09f0 ++#define BCHP_CPU_COMM_QUEUE_31_DATA_CPUC_REG_END 0x038f09fc ++#define BCHP_DQMQSTS_CPUC_REG_START 0x038f0b00 ++#define BCHP_DQMQSTS_CPUC_REG_END 0x038f0b7c ++#define BCHP_DQMQMIB_CPUC_REG_START 0x038f0c00 ++#define BCHP_DQMQMIB_CPUC_REG_END 0x038f0d7c ++#define BCHP_TRACEBUFF_CPUC_REG_START 0x038f1000 ++#define BCHP_TRACEBUFF_CPUC_REG_END 0x038f1028 ++#define BCHP_SharedMem_CPUC_REG_START 0x038f4000 ++#define BCHP_SharedMem_CPUC_REG_END 0x038f7ffc ++#define BCHP_RF4CE_CPU_PROG0_MEM_UB_REG_START 0x03900000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_UB_REG_END 0x0391fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_UB_REG_START 0x03920000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_UB_REG_END 0x0393fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_UB_REG_START 0x03940000 ++#define BCHP_RF4CE_CPU_DATA_MEM_UB_REG_END 0x03947ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_UB_REG_START 0x03950000 ++#define BCHP_RF4CE_CPU_CORE_REGS_UB_REG_END 0x039500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_UB_REG_START 0x03951000 ++#define BCHP_RF4CE_CPU_AUX_REGS_UB_REG_END 0x03951a08 ++#define BCHP_RF4CE_CPU_UART_UB_REG_START 0x03952000 ++#define BCHP_RF4CE_CPU_UART_UB_REG_END 0x03952ffc ++#define BCHP_RF4CE_CPU_WDG_UB_REG_START 0x03953000 ++#define BCHP_RF4CE_CPU_WDG_UB_REG_END 0x03953ffc ++#define BCHP_RF4CE_CPU_CTRL_UB_REG_START 0x03980000 ++#define BCHP_RF4CE_CPU_CTRL_UB_REG_END 0x0398008c ++#define BCHP_RF4CE_CPU_L2_UB_REG_START 0x03980300 ++#define BCHP_RF4CE_CPU_L2_UB_REG_END 0x03980314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_UB_REG_START 0x03980500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_UB_REG_END 0x0398052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_UB_REG_START 0x03980800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_UB_REG_END 0x0398082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_UB_REG_START 0x03980a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_UB_REG_END 0x03980a2c ++#define BCHP_TX_UB_REG_START 0x039c0000 ++#define BCHP_TX_UB_REG_END 0x039c0020 ++#define BCHP_RX_UB_REG_START 0x039d0000 ++#define BCHP_RX_UB_REG_END 0x039d01e0 ++#define BCHP_RF_UB_REG_START 0x039e0000 ++#define BCHP_RF_UB_REG_END 0x039e0098 ++#define BCHP_VCOCAL_UB_REG_START 0x039e0100 ++#define BCHP_VCOCAL_UB_REG_END 0x039e0174 ++#define BCHP_KVCO_UB_REG_START 0x039e0200 ++#define BCHP_KVCO_UB_REG_END 0x039e0224 ++#define BCHP_PA_UB_REG_START 0x039e0300 ++#define BCHP_PA_UB_REG_END 0x039e0314 ++#define BCHP_MAC_UB_REG_START 0x039e0400 ++#define BCHP_MAC_UB_REG_END 0x039e0564 ++#define BCHP_PWR_MGT_L2_UB_REG_START 0x039e0600 ++#define BCHP_PWR_MGT_L2_UB_REG_END 0x039e0614 ++#define BCHP_MISC_L2_UB_REG_START 0x039e0700 ++#define BCHP_MISC_L2_UB_REG_END 0x039e0714 ++#define BCHP_IQCAL_CCA_CCM_L2_UB_REG_START 0x039e0800 ++#define BCHP_IQCAL_CCA_CCM_L2_UB_REG_END 0x039e0814 ++#define BCHP_SYMCNT6_L2_UB_REG_START 0x039e0900 ++#define BCHP_SYMCNT6_L2_UB_REG_END 0x039e0914 ++#define BCHP_TX_DONE_L2_UB_REG_START 0x039e0a00 ++#define BCHP_TX_DONE_L2_UB_REG_END 0x039e0a14 ++#define BCHP_RX_DONE_L2_UB_REG_START 0x039e0b00 ++#define BCHP_RX_DONE_L2_UB_REG_END 0x039e0b14 ++#define BCHP_RX_START_L2_UB_REG_START 0x039e0c00 ++#define BCHP_RX_START_L2_UB_REG_END 0x039e0c14 ++#define BCHP_SYMCNT7_L2_UB_REG_START 0x039e0d00 ++#define BCHP_SYMCNT7_L2_UB_REG_END 0x039e0d14 ++#define BCHP_GCI_0_UB_REG_START 0x039e1000 ++#define BCHP_GCI_0_UB_REG_END 0x039e120c ++#define BCHP_GCI_1_UB_REG_START 0x039e1400 ++#define BCHP_GCI_1_UB_REG_END 0x039e1604 ++#define BCHP_GCI_2_UB_REG_START 0x039e1800 ++#define BCHP_GCI_2_UB_REG_END 0x039e1a04 ++#define BCHP_FPM_CTRL_FPM_REG_START 0x03a00000 ++#define BCHP_FPM_CTRL_FPM_REG_END 0x03a00144 ++#define BCHP_FPM_POOL_FPM_REG_START 0x03a00200 ++#define BCHP_FPM_POOL_FPM_REG_END 0x03a00224 ++#define BCHP_FPM_SEARCH_FPM_REG_START 0x03a04000 ++#define BCHP_FPM_SEARCH_FPM_REG_END 0x03a048b8 ++#define BCHP_FPM_MULTI_FPM_REG_START 0x03a10000 ++#define BCHP_FPM_MULTI_FPM_REG_END 0x03a13ff8 ++#define BCHP_INT_PER_REG_START 0x03c00000 ++#define BCHP_INT_PER_REG_END 0x03c000bc ++#define BCHP_PERIPH_TIMER_PER_REG_START 0x03c000c0 ++#define BCHP_PERIPH_TIMER_PER_REG_END 0x03c000ec ++#define BCHP_GPIO_PER_REG_START 0x03c00100 ++#define BCHP_GPIO_PER_REG_END 0x03c002ac ++#define BCHP_INT_EXT_PER_REG_START 0x03c00300 ++#define BCHP_INT_EXT_PER_REG_END 0x03c00358 ++#define BCHP_Dbg_PER_REG_START 0x03c003e0 ++#define BCHP_Dbg_PER_REG_END 0x03c003f4 ++#define BCHP_PER_SEC_TOP_PER_REG_START 0x03c00400 ++#define BCHP_PER_SEC_TOP_PER_REG_END 0x03c00420 ++#define BCHP_UART0_PER_REG_START 0x03c00500 ++#define BCHP_UART0_PER_REG_END 0x03c00514 ++#define BCHP_UART1_PER_REG_START 0x03c00520 ++#define BCHP_UART1_PER_REG_END 0x03c00534 ++#define BCHP_I2C_DUAL_CORE1_PER_REG_START 0x03c00800 ++#define BCHP_I2C_DUAL_CORE1_PER_REG_END 0x03c00854 ++#define BCHP_I2C_DUAL_CORE2_PER_REG_START 0x03c00900 ++#define BCHP_I2C_DUAL_CORE2_PER_REG_END 0x03c00954 ++#define BCHP_LED_PER_REG_START 0x03c00f00 ++#define BCHP_LED_PER_REG_END 0x03c00f2c ++#define BCHP_GLOBALCNTRL_PER_REG_START 0x03c01000 ++#define BCHP_GLOBALCNTRL_PER_REG_END 0x03c01018 ++#define BCHP_PINGPONG_0_PER_REG_START 0x03c01080 ++#define BCHP_PINGPONG_0_PER_REG_END 0x03c010bc ++#define BCHP_PINGPONG_1_PER_REG_START 0x03c010c0 ++#define BCHP_PINGPONG_1_PER_REG_END 0x03c010fc ++#define BCHP_PROFILE_0_PER_REG_START 0x03c01100 ++#define BCHP_PROFILE_0_PER_REG_END 0x03c0111c ++#define BCHP_PROFILE_1_PER_REG_START 0x03c01120 ++#define BCHP_PROFILE_1_PER_REG_END 0x03c0113c ++#define BCHP_PROFILE_2_PER_REG_START 0x03c01140 ++#define BCHP_PROFILE_2_PER_REG_END 0x03c0115c ++#define BCHP_PROFILE_3_PER_REG_START 0x03c01160 ++#define BCHP_PROFILE_3_PER_REG_END 0x03c0117c ++#define BCHP_PROFILE_4_PER_REG_START 0x03c01180 ++#define BCHP_PROFILE_4_PER_REG_END 0x03c0119c ++#define BCHP_PROFILE_5_PER_REG_START 0x03c011a0 ++#define BCHP_PROFILE_5_PER_REG_END 0x03c011bc ++#define BCHP_PROFILE_6_PER_REG_START 0x03c011c0 ++#define BCHP_PROFILE_6_PER_REG_END 0x03c011dc ++#define BCHP_PROFILE_7_PER_REG_START 0x03c011e0 ++#define BCHP_PROFILE_7_PER_REG_END 0x03c011fc ++#define BCHP_FIFO_0_PER_REG_START 0x03c01200 ++#define BCHP_FIFO_0_PER_REG_END 0x03c013ff ++#define BCHP_FIFO_1_PER_REG_START 0x03c01400 ++#define BCHP_FIFO_1_PER_REG_END 0x03c015ff ++#define BCHP_PMB_MASTER_PER_REG_START 0x03c03000 ++#define BCHP_PMB_MASTER_PER_REG_END 0x03c0300c ++#define BCHP_DTP_CFGCTL_PER_REG_START 0x03c03100 ++#define BCHP_DTP_CFGCTL_PER_REG_END 0x03c0310c ++#define BCHP_DTP_RESERVED_PER_REG_START 0x03c03110 ++#define BCHP_DTP_RESERVED_PER_REG_END 0x03c0311c ++#define BCHP_DTP_SOFTRESET_PER_REG_START 0x03c03120 ++#define BCHP_DTP_SOFTRESET_PER_REG_END 0x03c03120 ++#define BCHP_DTP_ZONE0_PER_REG_START 0x03c03140 ++#define BCHP_DTP_ZONE0_PER_REG_END 0x03c0314c ++#define BCHP_DTP_ZONE1_PER_REG_START 0x03c03150 ++#define BCHP_DTP_ZONE1_PER_REG_END 0x03c0315c ++#define BCHP_DTP_ZONE2_PER_REG_START 0x03c03160 ++#define BCHP_DTP_ZONE2_PER_REG_END 0x03c0316c ++#define BCHP_DFAP_CFGCTL_PER_REG_START 0x03c07100 ++#define BCHP_DFAP_CFGCTL_PER_REG_END 0x03c0710c ++#define BCHP_DFAP_RESERVED_PER_REG_START 0x03c07110 ++#define BCHP_DFAP_RESERVED_PER_REG_END 0x03c0711c ++#define BCHP_DFAP_SOFTRESET_PER_REG_START 0x03c07120 ++#define BCHP_DFAP_SOFTRESET_PER_REG_END 0x03c07120 ++#define BCHP_DFAP_ZONE0_PER_REG_START 0x03c07140 ++#define BCHP_DFAP_ZONE0_PER_REG_END 0x03c0714c ++#define BCHP_DFAP_ZONE1_PER_REG_START 0x03c07150 ++#define BCHP_DFAP_ZONE1_PER_REG_END 0x03c0715c ++#define BCHP_DFAP_ZONE2_PER_REG_START 0x03c07160 ++#define BCHP_DFAP_ZONE2_PER_REG_END 0x03c0716c ++#define BCHP_DSMAC_CFGCTL_PER_REG_START 0x03c0b100 ++#define BCHP_DSMAC_CFGCTL_PER_REG_END 0x03c0b10c ++#define BCHP_DSMAC_RESERVED_PER_REG_START 0x03c0b110 ++#define BCHP_DSMAC_RESERVED_PER_REG_END 0x03c0b11c ++#define BCHP_DSMAC_SOFTRESET_PER_REG_START 0x03c0b120 ++#define BCHP_DSMAC_SOFTRESET_PER_REG_END 0x03c0b120 ++#define BCHP_DSMAC_ZONE0_PER_REG_START 0x03c0b140 ++#define BCHP_DSMAC_ZONE0_PER_REG_END 0x03c0b14c ++#define BCHP_DSMAC_ZONE1_PER_REG_START 0x03c0b150 ++#define BCHP_DSMAC_ZONE1_PER_REG_END 0x03c0b15c ++#define BCHP_DSMAC_ZONE2_PER_REG_START 0x03c0b160 ++#define BCHP_DSMAC_ZONE2_PER_REG_END 0x03c0b16c ++#define BCHP_DSMAC_ZONE3_PER_REG_START 0x03c0b170 ++#define BCHP_DSMAC_ZONE3_PER_REG_END 0x03c0b17c ++#define BCHP_DSMAC_ZONE4_PER_REG_START 0x03c0b180 ++#define BCHP_DSMAC_ZONE4_PER_REG_END 0x03c0b18c ++#define BCHP_DSMAC_ZONE5_PER_REG_START 0x03c0b190 ++#define BCHP_DSMAC_ZONE5_PER_REG_END 0x03c0b19c ++#define BCHP_UTP_CFGCTL_PER_REG_START 0x03c0f100 ++#define BCHP_UTP_CFGCTL_PER_REG_END 0x03c0f10c ++#define BCHP_UTP_RESERVED_PER_REG_START 0x03c0f110 ++#define BCHP_UTP_RESERVED_PER_REG_END 0x03c0f11c ++#define BCHP_UTP_SOFTRESET_PER_REG_START 0x03c0f120 ++#define BCHP_UTP_SOFTRESET_PER_REG_END 0x03c0f120 ++#define BCHP_UTP_ZONE0_PER_REG_START 0x03c0f140 ++#define BCHP_UTP_ZONE0_PER_REG_END 0x03c0f14c ++#define BCHP_UTP_ZONE1_PER_REG_START 0x03c0f150 ++#define BCHP_UTP_ZONE1_PER_REG_END 0x03c0f15c ++#define BCHP_UTP_ZONE2_PER_REG_START 0x03c0f160 ++#define BCHP_UTP_ZONE2_PER_REG_END 0x03c0f16c ++#define BCHP_UTP_ZONE3_PER_REG_START 0x03c0f170 ++#define BCHP_UTP_ZONE3_PER_REG_END 0x03c0f17c ++#define BCHP_UTP_ZONE4_PER_REG_START 0x03c0f180 ++#define BCHP_UTP_ZONE4_PER_REG_END 0x03c0f18c ++#define BCHP_PERIPH_CFGCTL_PER_REG_START 0x03c13100 ++#define BCHP_PERIPH_CFGCTL_PER_REG_END 0x03c1310c ++#define BCHP_PERIPH_RESERVED_PER_REG_START 0x03c13110 ++#define BCHP_PERIPH_RESERVED_PER_REG_END 0x03c1311c ++#define BCHP_PERIPH_SOFTRESET_PER_REG_START 0x03c13120 ++#define BCHP_PERIPH_SOFTRESET_PER_REG_END 0x03c13120 ++#define BCHP_PERIPH_ZONE0_PER_REG_START 0x03c13140 ++#define BCHP_PERIPH_ZONE0_PER_REG_END 0x03c1314c ++#define BCHP_PERIPH_ZONE1_PER_REG_START 0x03c13150 ++#define BCHP_PERIPH_ZONE1_PER_REG_END 0x03c1315c ++#define BCHP_PERIPH_ZONE2_PER_REG_START 0x03c13160 ++#define BCHP_PERIPH_ZONE2_PER_REG_END 0x03c1316c ++#define BCHP_FPM_CFGCTL_PER_REG_START 0x03c17100 ++#define BCHP_FPM_CFGCTL_PER_REG_END 0x03c1710c ++#define BCHP_FPM_RESERVED_PER_REG_START 0x03c17110 ++#define BCHP_FPM_RESERVED_PER_REG_END 0x03c1711c ++#define BCHP_FPM_SOFTRESET_PER_REG_START 0x03c17120 ++#define BCHP_FPM_SOFTRESET_PER_REG_END 0x03c17120 ++#define BCHP_FPM_ZONE0_PER_REG_START 0x03c17140 ++#define BCHP_FPM_ZONE0_PER_REG_END 0x03c1714c ++#define BCHP_CPUC_CFGCTL_PER_REG_START 0x03c1b100 ++#define BCHP_CPUC_CFGCTL_PER_REG_END 0x03c1b10c ++#define BCHP_CPUC_RESERVED_PER_REG_START 0x03c1b110 ++#define BCHP_CPUC_RESERVED_PER_REG_END 0x03c1b11c ++#define BCHP_CPUC_SOFTRESET_PER_REG_START 0x03c1b120 ++#define BCHP_CPUC_SOFTRESET_PER_REG_END 0x03c1b120 ++#define BCHP_CPUC_ZONE0_PER_REG_START 0x03c1b140 ++#define BCHP_CPUC_ZONE0_PER_REG_END 0x03c1b14c ++#define BCHP_DECT_CFGCTL_PER_REG_START 0x03c1f100 ++#define BCHP_DECT_CFGCTL_PER_REG_END 0x03c1f10c ++#define BCHP_DECT_RESERVED_PER_REG_START 0x03c1f110 ++#define BCHP_DECT_RESERVED_PER_REG_END 0x03c1f11c ++#define BCHP_DECT_SOFTRESET_PER_REG_START 0x03c1f120 ++#define BCHP_DECT_SOFTRESET_PER_REG_END 0x03c1f120 ++#define BCHP_DECT_ZONE0_PER_REG_START 0x03c1f140 ++#define BCHP_DECT_ZONE0_PER_REG_END 0x03c1f14c ++#define BCHP_APM_CFGCTL_PER_REG_START 0x03c23100 ++#define BCHP_APM_CFGCTL_PER_REG_END 0x03c2310c ++#define BCHP_APM_RESERVED_PER_REG_START 0x03c23110 ++#define BCHP_APM_RESERVED_PER_REG_END 0x03c2311c ++#define BCHP_APM_SOFTRESET_PER_REG_START 0x03c23120 ++#define BCHP_APM_SOFTRESET_PER_REG_END 0x03c23120 ++#define BCHP_APM_ZONE0_PER_REG_START 0x03c23140 ++#define BCHP_APM_ZONE0_PER_REG_END 0x03c2314c ++#define BCHP_APM_ZONE1_PER_REG_START 0x03c23150 ++#define BCHP_APM_ZONE1_PER_REG_END 0x03c2315c ++#define BCHP_APM_ZONE2_PER_REG_START 0x03c23160 ++#define BCHP_APM_ZONE2_PER_REG_END 0x03c2316c ++#define BCHP_APM_ZONE3_PER_REG_START 0x03c23170 ++#define BCHP_APM_ZONE3_PER_REG_END 0x03c2317c ++#define BCHP_APM_ZONE4_PER_REG_START 0x03c23180 ++#define BCHP_APM_ZONE4_PER_REG_END 0x03c2318c ++#define BCHP_UNIMAC_CFGCTL_PER_REG_START 0x03c27100 ++#define BCHP_UNIMAC_CFGCTL_PER_REG_END 0x03c2710c ++#define BCHP_UNIMAC_RESERVED_PER_REG_START 0x03c27110 ++#define BCHP_UNIMAC_RESERVED_PER_REG_END 0x03c2711c ++#define BCHP_UNIMAC_SOFTRESET_PER_REG_START 0x03c27120 ++#define BCHP_UNIMAC_SOFTRESET_PER_REG_END 0x03c27120 ++#define BCHP_UNIMAC_ZONE0_PER_REG_START 0x03c27140 ++#define BCHP_UNIMAC_ZONE0_PER_REG_END 0x03c2714c ++#define BCHP_USMAC_CFGCTL_PER_REG_START 0x03c2b100 ++#define BCHP_USMAC_CFGCTL_PER_REG_END 0x03c2b10c ++#define BCHP_USMAC_RESERVED_PER_REG_START 0x03c2b110 ++#define BCHP_USMAC_RESERVED_PER_REG_END 0x03c2b11c ++#define BCHP_USMAC_SOFTRESET_PER_REG_START 0x03c2b120 ++#define BCHP_USMAC_SOFTRESET_PER_REG_END 0x03c2b120 ++#define BCHP_USMAC_ZONE0_PER_REG_START 0x03c2b140 ++#define BCHP_USMAC_ZONE0_PER_REG_END 0x03c2b14c ++#define BCHP_USMAC_ZONE1_PER_REG_START 0x03c2b150 ++#define BCHP_USMAC_ZONE1_PER_REG_END 0x03c2b15c ++#define BCHP_USMAC_ZONE2_PER_REG_START 0x03c2b160 ++#define BCHP_USMAC_ZONE2_PER_REG_END 0x03c2b16c ++#define BCHP_USMAC_ZONE3_PER_REG_START 0x03c2b170 ++#define BCHP_USMAC_ZONE3_PER_REG_END 0x03c2b17c ++#define BCHP_USMAC_ZONE4_PER_REG_START 0x03c2b180 ++#define BCHP_USMAC_ZONE4_PER_REG_END 0x03c2b18c ++#define BCHP_USMAC_ZONE5_PER_REG_START 0x03c2b190 ++#define BCHP_USMAC_ZONE5_PER_REG_END 0x03c2b19c ++#define BCHP_USMAC_ZONE6_PER_REG_START 0x03c2b1a0 ++#define BCHP_USMAC_ZONE6_PER_REG_END 0x03c2b1ac ++#define BCHP_USMAC_ZONE7_PER_REG_START 0x03c2b1b0 ++#define BCHP_USMAC_ZONE7_PER_REG_END 0x03c2b1bc ++#define BCHP_USMAC_ZONE8_PER_REG_START 0x03c2b1c0 ++#define BCHP_USMAC_ZONE8_PER_REG_END 0x03c2b1cc ++#define BCHP_USMAC_ZONE9_PER_REG_START 0x03c2b1d0 ++#define BCHP_USMAC_ZONE9_PER_REG_END 0x03c2b1dc ++#define BCHP_USMAC_ZONE10_PER_REG_START 0x03c2b1e0 ++#define BCHP_USMAC_ZONE10_PER_REG_END 0x03c2b1ec ++#define BCHP_TC8X_CFGCTL_PER_REG_START 0x03c2f100 ++#define BCHP_TC8X_CFGCTL_PER_REG_END 0x03c2f10c ++#define BCHP_TC8X_RESERVED_PER_REG_START 0x03c2f110 ++#define BCHP_TC8X_RESERVED_PER_REG_END 0x03c2f11c ++#define BCHP_TC8X_SOFTRESET_PER_REG_START 0x03c2f120 ++#define BCHP_TC8X_SOFTRESET_PER_REG_END 0x03c2f120 ++#define BCHP_TC8X_ZONE0_PER_REG_START 0x03c2f140 ++#define BCHP_TC8X_ZONE0_PER_REG_END 0x03c2f14c ++#define BCHP_TC8X_ZONE1_PER_REG_START 0x03c2f150 ++#define BCHP_TC8X_ZONE1_PER_REG_END 0x03c2f15c ++#define BCHP_TC8X_ZONE2_PER_REG_START 0x03c2f160 ++#define BCHP_TC8X_ZONE2_PER_REG_END 0x03c2f16c ++#define BCHP_TC8X_ZONE3_PER_REG_START 0x03c2f170 ++#define BCHP_TC8X_ZONE3_PER_REG_END 0x03c2f17c ++#define BCHP_TC8X_ZONE4_PER_REG_START 0x03c2f180 ++#define BCHP_TC8X_ZONE4_PER_REG_END 0x03c2f18c ++#define BCHP_TC8X_ZONE5_PER_REG_START 0x03c2f190 ++#define BCHP_TC8X_ZONE5_PER_REG_END 0x03c2f19c ++#define BCHP_TC8X_ZONE6_PER_REG_START 0x03c2f1a0 ++#define BCHP_TC8X_ZONE6_PER_REG_END 0x03c2f1ac ++#define BCHP_TC8X_ZONE7_PER_REG_START 0x03c2f1b0 ++#define BCHP_TC8X_ZONE7_PER_REG_END 0x03c2f1bc ++#define BCHP_TC8X_ZONE8_PER_REG_START 0x03c2f1c0 ++#define BCHP_TC8X_ZONE8_PER_REG_END 0x03c2f1cc ++#define BCHP_DAVIC_CFGCTL_PER_REG_START 0x03c33100 ++#define BCHP_DAVIC_CFGCTL_PER_REG_END 0x03c3310c ++#define BCHP_DAVIC_RESERVED_PER_REG_START 0x03c33110 ++#define BCHP_DAVIC_RESERVED_PER_REG_END 0x03c3311c ++#define BCHP_DAVIC_SOFTRESET_PER_REG_START 0x03c33120 ++#define BCHP_DAVIC_SOFTRESET_PER_REG_END 0x03c33120 ++#define BCHP_DAVIC_ZONE0_PER_REG_START 0x03c33140 ++#define BCHP_DAVIC_ZONE0_PER_REG_END 0x03c3314c ++#define BCHP_MIPS_CFGCTL_PER_REG_START 0x03c37100 ++#define BCHP_MIPS_CFGCTL_PER_REG_END 0x03c3710c ++#define BCHP_MIPS_RESERVED_PER_REG_START 0x03c37110 ++#define BCHP_MIPS_RESERVED_PER_REG_END 0x03c3711c ++#define BCHP_MIPS_SOFTRESET_PER_REG_START 0x03c37120 ++#define BCHP_MIPS_SOFTRESET_PER_REG_END 0x03c37120 ++#define BCHP_MIPS_ZONE0_PER_REG_START 0x03c37140 ++#define BCHP_MIPS_ZONE0_PER_REG_END 0x03c3714c ++#define BCHP_WFE_CFGCTL_PER_REG_START 0x03c3b100 ++#define BCHP_WFE_CFGCTL_PER_REG_END 0x03c3b10c ++#define BCHP_WFE_RESERVED_PER_REG_START 0x03c3b110 ++#define BCHP_WFE_RESERVED_PER_REG_END 0x03c3b11c ++#define BCHP_WFE_SOFTRESET_PER_REG_START 0x03c3b120 ++#define BCHP_WFE_SOFTRESET_PER_REG_END 0x03c3b120 ++#define BCHP_WFE_ZONE0_PER_REG_START 0x03c3b140 ++#define BCHP_WFE_ZONE0_PER_REG_END 0x03c3b14c ++#define BCHP_WFE_ZONE1_PER_REG_START 0x03c3b150 ++#define BCHP_WFE_ZONE1_PER_REG_END 0x03c3b15c ++#define BCHP_DSTOPA_CFGCTL_PER_REG_START 0x03c3f100 ++#define BCHP_DSTOPA_CFGCTL_PER_REG_END 0x03c3f10c ++#define BCHP_DSTOPA_RESERVED_PER_REG_START 0x03c3f110 ++#define BCHP_DSTOPA_RESERVED_PER_REG_END 0x03c3f11c ++#define BCHP_DSTOPA_SOFTRESET_PER_REG_START 0x03c3f120 ++#define BCHP_DSTOPA_SOFTRESET_PER_REG_END 0x03c3f120 ++#define BCHP_DSTOPA_ZONE0_PER_REG_START 0x03c3f140 ++#define BCHP_DSTOPA_ZONE0_PER_REG_END 0x03c3f14c ++#define BCHP_DSTOPA_ZONE1_PER_REG_START 0x03c3f150 ++#define BCHP_DSTOPA_ZONE1_PER_REG_END 0x03c3f15c ++#define BCHP_DSTOPA_ZONE2_PER_REG_START 0x03c3f160 ++#define BCHP_DSTOPA_ZONE2_PER_REG_END 0x03c3f16c ++#define BCHP_DSTOPA_ZONE3_PER_REG_START 0x03c3f170 ++#define BCHP_DSTOPA_ZONE3_PER_REG_END 0x03c3f17c ++#define BCHP_DSTOPA_ZONE4_PER_REG_START 0x03c3f180 ++#define BCHP_DSTOPA_ZONE4_PER_REG_END 0x03c3f18c ++#define BCHP_DSTOPA_ZONE5_PER_REG_START 0x03c3f190 ++#define BCHP_DSTOPA_ZONE5_PER_REG_END 0x03c3f19c ++#define BCHP_DSTOPA_ZONE6_PER_REG_START 0x03c3f1a0 ++#define BCHP_DSTOPA_ZONE6_PER_REG_END 0x03c3f1ac ++#define BCHP_DSTOPA_ZONE7_PER_REG_START 0x03c3f1b0 ++#define BCHP_DSTOPA_ZONE7_PER_REG_END 0x03c3f1bc ++#define BCHP_DSTOPA_ZONE8_PER_REG_START 0x03c3f1c0 ++#define BCHP_DSTOPA_ZONE8_PER_REG_END 0x03c3f1cc ++#define BCHP_DSTOPB_CFGCTL_PER_REG_START 0x03c43100 ++#define BCHP_DSTOPB_CFGCTL_PER_REG_END 0x03c4310c ++#define BCHP_DSTOPB_RESERVED_PER_REG_START 0x03c43110 ++#define BCHP_DSTOPB_RESERVED_PER_REG_END 0x03c4311c ++#define BCHP_DSTOPB_SOFTRESET_PER_REG_START 0x03c43120 ++#define BCHP_DSTOPB_SOFTRESET_PER_REG_END 0x03c43120 ++#define BCHP_DSTOPB_ZONE0_PER_REG_START 0x03c43140 ++#define BCHP_DSTOPB_ZONE0_PER_REG_END 0x03c4314c ++#define BCHP_DSTOPB_ZONE1_PER_REG_START 0x03c43150 ++#define BCHP_DSTOPB_ZONE1_PER_REG_END 0x03c4315c ++#define BCHP_DSTOPB_ZONE2_PER_REG_START 0x03c43160 ++#define BCHP_DSTOPB_ZONE2_PER_REG_END 0x03c4316c ++#define BCHP_DSTOPB_ZONE3_PER_REG_START 0x03c43170 ++#define BCHP_DSTOPB_ZONE3_PER_REG_END 0x03c4317c ++#define BCHP_DSTOPB_ZONE4_PER_REG_START 0x03c43180 ++#define BCHP_DSTOPB_ZONE4_PER_REG_END 0x03c4318c ++#define BCHP_DSTOPB_ZONE5_PER_REG_START 0x03c43190 ++#define BCHP_DSTOPB_ZONE5_PER_REG_END 0x03c4319c ++#define BCHP_DSTOPB_ZONE6_PER_REG_START 0x03c431a0 ++#define BCHP_DSTOPB_ZONE6_PER_REG_END 0x03c431ac ++#define BCHP_DSTOPB_ZONE7_PER_REG_START 0x03c431b0 ++#define BCHP_DSTOPB_ZONE7_PER_REG_END 0x03c431bc ++#define BCHP_DSTOPB_ZONE8_PER_REG_START 0x03c431c0 ++#define BCHP_DSTOPB_ZONE8_PER_REG_END 0x03c431cc ++#define BCHP_DSTOPC_CFGCTL_PER_REG_START 0x03c47100 ++#define BCHP_DSTOPC_CFGCTL_PER_REG_END 0x03c4710c ++#define BCHP_DSTOPC_RESERVED_PER_REG_START 0x03c47110 ++#define BCHP_DSTOPC_RESERVED_PER_REG_END 0x03c4711c ++#define BCHP_DSTOPC_SOFTRESET_PER_REG_START 0x03c47120 ++#define BCHP_DSTOPC_SOFTRESET_PER_REG_END 0x03c47120 ++#define BCHP_DSTOPC_ZONE0_PER_REG_START 0x03c47140 ++#define BCHP_DSTOPC_ZONE0_PER_REG_END 0x03c4714c ++#define BCHP_DSTOPC_ZONE1_PER_REG_START 0x03c47150 ++#define BCHP_DSTOPC_ZONE1_PER_REG_END 0x03c4715c ++#define BCHP_DSTOPC_ZONE2_PER_REG_START 0x03c47160 ++#define BCHP_DSTOPC_ZONE2_PER_REG_END 0x03c4716c ++#define BCHP_DSTOPC_ZONE3_PER_REG_START 0x03c47170 ++#define BCHP_DSTOPC_ZONE3_PER_REG_END 0x03c4717c ++#define BCHP_DSTOPC_ZONE4_PER_REG_START 0x03c47180 ++#define BCHP_DSTOPC_ZONE4_PER_REG_END 0x03c4718c ++#define BCHP_DSTOPC_ZONE5_PER_REG_START 0x03c47190 ++#define BCHP_DSTOPC_ZONE5_PER_REG_END 0x03c4719c ++#define BCHP_DSTOPC_ZONE6_PER_REG_START 0x03c471a0 ++#define BCHP_DSTOPC_ZONE6_PER_REG_END 0x03c471ac ++#define BCHP_DSTOPC_ZONE7_PER_REG_START 0x03c471b0 ++#define BCHP_DSTOPC_ZONE7_PER_REG_END 0x03c471bc ++#define BCHP_DSTOPC_ZONE8_PER_REG_START 0x03c471c0 ++#define BCHP_DSTOPC_ZONE8_PER_REG_END 0x03c471cc ++#define BCHP_DSTOPD_CFGCTL_PER_REG_START 0x03c4b100 ++#define BCHP_DSTOPD_CFGCTL_PER_REG_END 0x03c4b10c ++#define BCHP_DSTOPD_RESERVED_PER_REG_START 0x03c4b110 ++#define BCHP_DSTOPD_RESERVED_PER_REG_END 0x03c4b11c ++#define BCHP_DSTOPD_SOFTRESET_PER_REG_START 0x03c4b120 ++#define BCHP_DSTOPD_SOFTRESET_PER_REG_END 0x03c4b120 ++#define BCHP_DSTOPD_ZONE0_PER_REG_START 0x03c4b140 ++#define BCHP_DSTOPD_ZONE0_PER_REG_END 0x03c4b14c ++#define BCHP_DSTOPD_ZONE1_PER_REG_START 0x03c4b150 ++#define BCHP_DSTOPD_ZONE1_PER_REG_END 0x03c4b15c ++#define BCHP_DSTOPD_ZONE2_PER_REG_START 0x03c4b160 ++#define BCHP_DSTOPD_ZONE2_PER_REG_END 0x03c4b16c ++#define BCHP_DSTOPD_ZONE3_PER_REG_START 0x03c4b170 ++#define BCHP_DSTOPD_ZONE3_PER_REG_END 0x03c4b17c ++#define BCHP_DSTOPD_ZONE4_PER_REG_START 0x03c4b180 ++#define BCHP_DSTOPD_ZONE4_PER_REG_END 0x03c4b18c ++#define BCHP_DSTOPD_ZONE5_PER_REG_START 0x03c4b190 ++#define BCHP_DSTOPD_ZONE5_PER_REG_END 0x03c4b19c ++#define BCHP_DSTOPD_ZONE6_PER_REG_START 0x03c4b1a0 ++#define BCHP_DSTOPD_ZONE6_PER_REG_END 0x03c4b1ac ++#define BCHP_DSTOPD_ZONE7_PER_REG_START 0x03c4b1b0 ++#define BCHP_DSTOPD_ZONE7_PER_REG_END 0x03c4b1bc ++#define BCHP_DSTOPD_ZONE8_PER_REG_START 0x03c4b1c0 ++#define BCHP_DSTOPD_ZONE8_PER_REG_END 0x03c4b1cc ++#define BCHP_USTOP_CFGCTL_PER_REG_START 0x03c4f100 ++#define BCHP_USTOP_CFGCTL_PER_REG_END 0x03c4f10c ++#define BCHP_USTOP_RESERVED_PER_REG_START 0x03c4f110 ++#define BCHP_USTOP_RESERVED_PER_REG_END 0x03c4f11c ++#define BCHP_USTOP_SOFTRESET_PER_REG_START 0x03c4f120 ++#define BCHP_USTOP_SOFTRESET_PER_REG_END 0x03c4f120 ++#define BCHP_USTOP_ZONE0_PER_REG_START 0x03c4f140 ++#define BCHP_USTOP_ZONE0_PER_REG_END 0x03c4f14c ++#define BCHP_LEAP_CFGCTL_PER_REG_START 0x03c53100 ++#define BCHP_LEAP_CFGCTL_PER_REG_END 0x03c5310c ++#define BCHP_LEAP_RESERVED_PER_REG_START 0x03c53110 ++#define BCHP_LEAP_RESERVED_PER_REG_END 0x03c5311c ++#define BCHP_LEAP_SOFTRESET_PER_REG_START 0x03c53120 ++#define BCHP_LEAP_SOFTRESET_PER_REG_END 0x03c53120 ++#define BCHP_LEAP_ZONE0_PER_REG_START 0x03c53140 ++#define BCHP_LEAP_ZONE0_PER_REG_END 0x03c5314c ++#define BCHP_ERRORPORT_PERIPH_REG_START 0x03e00000 ++#define BCHP_ERRORPORT_PERIPH_REG_END 0x03e000bc ++#define BCHP_REQA0_PERIPH_REG_START 0x03e00400 ++#define BCHP_REQA0_PERIPH_REG_END 0x03e0048c ++#define BCHP_REPA0_PERIPH_REG_START 0x03e00500 ++#define BCHP_REPA0_PERIPH_REG_END 0x03e0058c ++#define BCHP_REQA1_PERIPH_REG_START 0x03e00600 ++#define BCHP_REQA1_PERIPH_REG_END 0x03e0068c ++#define BCHP_REPA1_PERIPH_REG_START 0x03e00700 ++#define BCHP_REPA1_PERIPH_REG_END 0x03e0078c ++#define BCHP_REQB0_PERIPH_REG_START 0x03e00800 ++#define BCHP_REQB0_PERIPH_REG_END 0x03e0088c ++#define BCHP_REPB0_PERIPH_REG_START 0x03e00900 ++#define BCHP_REPB0_PERIPH_REG_END 0x03e0098c ++#define BCHP_REQB1_PERIPH_REG_START 0x03e00a00 ++#define BCHP_REQB1_PERIPH_REG_END 0x03e00a8c ++#define BCHP_REPB1_PERIPH_REG_START 0x03e00b00 ++#define BCHP_REPB1_PERIPH_REG_END 0x03e00b8c ++#define BCHP_REQC0_PERIPH_REG_START 0x03e00c00 ++#define BCHP_REQC0_PERIPH_REG_END 0x03e00c8c ++#define BCHP_REPC0_PERIPH_REG_START 0x03e00d00 ++#define BCHP_REPC0_PERIPH_REG_END 0x03e00d8c ++#define BCHP_REQC1_PERIPH_REG_START 0x03e00e00 ++#define BCHP_REQC1_PERIPH_REG_END 0x03e00e8c ++#define BCHP_REPC1_PERIPH_REG_START 0x03e00f00 ++#define BCHP_REPC1_PERIPH_REG_END 0x03e00f8c ++#define BCHP_BaseReserved_GFAP_REG_START 0x04200000 ++#define BCHP_BaseReserved_GFAP_REG_END 0x04200000 ++#define BCHP_Control_GFAP_REG_START 0x04201000 ++#define BCHP_Control_GFAP_REG_END 0x042010fc ++#define BCHP_OutgoingMessageFIFO_GFAP_REG_START 0x04201100 ++#define BCHP_OutgoingMessageFIFO_GFAP_REG_END 0x0420117c ++#define BCHP_IncomingMessageFIFO_GFAP_REG_START 0x04201200 ++#define BCHP_IncomingMessageFIFO_GFAP_REG_END 0x0420127c ++#define BCHP_DMA0_GFAP_REG_START 0x04201300 ++#define BCHP_DMA0_GFAP_REG_END 0x0420131c ++#define BCHP_DMA1_GFAP_REG_START 0x04201320 ++#define BCHP_DMA1_GFAP_REG_END 0x0420133c ++#define BCHP_DMAHI0_GFAP_REG_START 0x04201340 ++#define BCHP_DMAHI0_GFAP_REG_END 0x0420134c ++#define BCHP_DMAHI1_GFAP_REG_START 0x04201350 ++#define BCHP_DMAHI1_GFAP_REG_END 0x0420135c ++#define BCHP_Token_GFAP_REG_START 0x04201400 ++#define BCHP_Token_GFAP_REG_END 0x0420141c ++#define BCHP_PerfPower_GFAP_REG_START 0x04201600 ++#define BCHP_PerfPower_GFAP_REG_END 0x04201640 ++#define BCHP_MessageID_GFAP_REG_START 0x04201700 ++#define BCHP_MessageID_GFAP_REG_END 0x0420177c ++#define BCHP_DQM_GFAP_REG_START 0x04201800 ++#define BCHP_DQM_GFAP_REG_END 0x04201848 ++#define BCHP_HWCounters_GFAP_REG_START 0x04201900 ++#define BCHP_HWCounters_GFAP_REG_END 0x04201944 ++#define BCHP_QUEUE_0_CNTRL_GFAP_REG_START 0x04201a00 ++#define BCHP_QUEUE_0_CNTRL_GFAP_REG_END 0x04201a0c ++#define BCHP_QUEUE_1_CNTRL_GFAP_REG_START 0x04201a10 ++#define BCHP_QUEUE_1_CNTRL_GFAP_REG_END 0x04201a1c ++#define BCHP_QUEUE_2_CNTRL_GFAP_REG_START 0x04201a20 ++#define BCHP_QUEUE_2_CNTRL_GFAP_REG_END 0x04201a2c ++#define BCHP_QUEUE_3_CNTRL_GFAP_REG_START 0x04201a30 ++#define BCHP_QUEUE_3_CNTRL_GFAP_REG_END 0x04201a3c ++#define BCHP_QUEUE_4_CNTRL_GFAP_REG_START 0x04201a40 ++#define BCHP_QUEUE_4_CNTRL_GFAP_REG_END 0x04201a4c ++#define BCHP_QUEUE_5_CNTRL_GFAP_REG_START 0x04201a50 ++#define BCHP_QUEUE_5_CNTRL_GFAP_REG_END 0x04201a5c ++#define BCHP_QUEUE_6_CNTRL_GFAP_REG_START 0x04201a60 ++#define BCHP_QUEUE_6_CNTRL_GFAP_REG_END 0x04201a6c ++#define BCHP_QUEUE_7_CNTRL_GFAP_REG_START 0x04201a70 ++#define BCHP_QUEUE_7_CNTRL_GFAP_REG_END 0x04201a7c ++#define BCHP_QUEUE_8_CNTRL_GFAP_REG_START 0x04201a80 ++#define BCHP_QUEUE_8_CNTRL_GFAP_REG_END 0x04201a8c ++#define BCHP_QUEUE_9_CNTRL_GFAP_REG_START 0x04201a90 ++#define BCHP_QUEUE_9_CNTRL_GFAP_REG_END 0x04201a9c ++#define BCHP_QUEUE_10_CNTRL_GFAP_REG_START 0x04201aa0 ++#define BCHP_QUEUE_10_CNTRL_GFAP_REG_END 0x04201aac ++#define BCHP_QUEUE_11_CNTRL_GFAP_REG_START 0x04201ab0 ++#define BCHP_QUEUE_11_CNTRL_GFAP_REG_END 0x04201abc ++#define BCHP_QUEUE_12_CNTRL_GFAP_REG_START 0x04201ac0 ++#define BCHP_QUEUE_12_CNTRL_GFAP_REG_END 0x04201acc ++#define BCHP_QUEUE_13_CNTRL_GFAP_REG_START 0x04201ad0 ++#define BCHP_QUEUE_13_CNTRL_GFAP_REG_END 0x04201adc ++#define BCHP_QUEUE_14_CNTRL_GFAP_REG_START 0x04201ae0 ++#define BCHP_QUEUE_14_CNTRL_GFAP_REG_END 0x04201aec ++#define BCHP_QUEUE_15_CNTRL_GFAP_REG_START 0x04201af0 ++#define BCHP_QUEUE_15_CNTRL_GFAP_REG_END 0x04201afc ++#define BCHP_QUEUE_16_CNTRL_GFAP_REG_START 0x04201b00 ++#define BCHP_QUEUE_16_CNTRL_GFAP_REG_END 0x04201b0c ++#define BCHP_QUEUE_17_CNTRL_GFAP_REG_START 0x04201b10 ++#define BCHP_QUEUE_17_CNTRL_GFAP_REG_END 0x04201b1c ++#define BCHP_QUEUE_18_CNTRL_GFAP_REG_START 0x04201b20 ++#define BCHP_QUEUE_18_CNTRL_GFAP_REG_END 0x04201b2c ++#define BCHP_QUEUE_19_CNTRL_GFAP_REG_START 0x04201b30 ++#define BCHP_QUEUE_19_CNTRL_GFAP_REG_END 0x04201b3c ++#define BCHP_QUEUE_20_CNTRL_GFAP_REG_START 0x04201b40 ++#define BCHP_QUEUE_20_CNTRL_GFAP_REG_END 0x04201b4c ++#define BCHP_QUEUE_21_CNTRL_GFAP_REG_START 0x04201b50 ++#define BCHP_QUEUE_21_CNTRL_GFAP_REG_END 0x04201b5c ++#define BCHP_QUEUE_22_CNTRL_GFAP_REG_START 0x04201b60 ++#define BCHP_QUEUE_22_CNTRL_GFAP_REG_END 0x04201b6c ++#define BCHP_QUEUE_23_CNTRL_GFAP_REG_START 0x04201b70 ++#define BCHP_QUEUE_23_CNTRL_GFAP_REG_END 0x04201b7c ++#define BCHP_QUEUE_24_CNTRL_GFAP_REG_START 0x04201b80 ++#define BCHP_QUEUE_24_CNTRL_GFAP_REG_END 0x04201b8c ++#define BCHP_QUEUE_25_CNTRL_GFAP_REG_START 0x04201b90 ++#define BCHP_QUEUE_25_CNTRL_GFAP_REG_END 0x04201b9c ++#define BCHP_QUEUE_26_CNTRL_GFAP_REG_START 0x04201ba0 ++#define BCHP_QUEUE_26_CNTRL_GFAP_REG_END 0x04201bac ++#define BCHP_QUEUE_27_CNTRL_GFAP_REG_START 0x04201bb0 ++#define BCHP_QUEUE_27_CNTRL_GFAP_REG_END 0x04201bbc ++#define BCHP_QUEUE_28_CNTRL_GFAP_REG_START 0x04201bc0 ++#define BCHP_QUEUE_28_CNTRL_GFAP_REG_END 0x04201bcc ++#define BCHP_QUEUE_29_CNTRL_GFAP_REG_START 0x04201bd0 ++#define BCHP_QUEUE_29_CNTRL_GFAP_REG_END 0x04201bdc ++#define BCHP_QUEUE_30_CNTRL_GFAP_REG_START 0x04201be0 ++#define BCHP_QUEUE_30_CNTRL_GFAP_REG_END 0x04201bec ++#define BCHP_QUEUE_31_CNTRL_GFAP_REG_START 0x04201bf0 ++#define BCHP_QUEUE_31_CNTRL_GFAP_REG_END 0x04201bfc ++#define BCHP_QUEUE_0_DATA_GFAP_REG_START 0x04201c00 ++#define BCHP_QUEUE_0_DATA_GFAP_REG_END 0x04201c0c ++#define BCHP_QUEUE_1_DATA_GFAP_REG_START 0x04201c10 ++#define BCHP_QUEUE_1_DATA_GFAP_REG_END 0x04201c1c ++#define BCHP_QUEUE_2_DATA_GFAP_REG_START 0x04201c20 ++#define BCHP_QUEUE_2_DATA_GFAP_REG_END 0x04201c2c ++#define BCHP_QUEUE_3_DATA_GFAP_REG_START 0x04201c30 ++#define BCHP_QUEUE_3_DATA_GFAP_REG_END 0x04201c3c ++#define BCHP_QUEUE_4_DATA_GFAP_REG_START 0x04201c40 ++#define BCHP_QUEUE_4_DATA_GFAP_REG_END 0x04201c4c ++#define BCHP_QUEUE_5_DATA_GFAP_REG_START 0x04201c50 ++#define BCHP_QUEUE_5_DATA_GFAP_REG_END 0x04201c5c ++#define BCHP_QUEUE_6_DATA_GFAP_REG_START 0x04201c60 ++#define BCHP_QUEUE_6_DATA_GFAP_REG_END 0x04201c6c ++#define BCHP_QUEUE_7_DATA_GFAP_REG_START 0x04201c70 ++#define BCHP_QUEUE_7_DATA_GFAP_REG_END 0x04201c7c ++#define BCHP_QUEUE_8_DATA_GFAP_REG_START 0x04201c80 ++#define BCHP_QUEUE_8_DATA_GFAP_REG_END 0x04201c8c ++#define BCHP_QUEUE_9_DATA_GFAP_REG_START 0x04201c90 ++#define BCHP_QUEUE_9_DATA_GFAP_REG_END 0x04201c9c ++#define BCHP_QUEUE_10_DATA_GFAP_REG_START 0x04201ca0 ++#define BCHP_QUEUE_10_DATA_GFAP_REG_END 0x04201cac ++#define BCHP_QUEUE_11_DATA_GFAP_REG_START 0x04201cb0 ++#define BCHP_QUEUE_11_DATA_GFAP_REG_END 0x04201cbc ++#define BCHP_QUEUE_12_DATA_GFAP_REG_START 0x04201cc0 ++#define BCHP_QUEUE_12_DATA_GFAP_REG_END 0x04201ccc ++#define BCHP_QUEUE_13_DATA_GFAP_REG_START 0x04201cd0 ++#define BCHP_QUEUE_13_DATA_GFAP_REG_END 0x04201cdc ++#define BCHP_QUEUE_14_DATA_GFAP_REG_START 0x04201ce0 ++#define BCHP_QUEUE_14_DATA_GFAP_REG_END 0x04201cec ++#define BCHP_QUEUE_15_DATA_GFAP_REG_START 0x04201cf0 ++#define BCHP_QUEUE_15_DATA_GFAP_REG_END 0x04201cfc ++#define BCHP_QUEUE_16_DATA_GFAP_REG_START 0x04201d00 ++#define BCHP_QUEUE_16_DATA_GFAP_REG_END 0x04201d0c ++#define BCHP_QUEUE_17_DATA_GFAP_REG_START 0x04201d10 ++#define BCHP_QUEUE_17_DATA_GFAP_REG_END 0x04201d1c ++#define BCHP_QUEUE_18_DATA_GFAP_REG_START 0x04201d20 ++#define BCHP_QUEUE_18_DATA_GFAP_REG_END 0x04201d2c ++#define BCHP_QUEUE_19_DATA_GFAP_REG_START 0x04201d30 ++#define BCHP_QUEUE_19_DATA_GFAP_REG_END 0x04201d3c ++#define BCHP_QUEUE_20_DATA_GFAP_REG_START 0x04201d40 ++#define BCHP_QUEUE_20_DATA_GFAP_REG_END 0x04201d4c ++#define BCHP_QUEUE_21_DATA_GFAP_REG_START 0x04201d50 ++#define BCHP_QUEUE_21_DATA_GFAP_REG_END 0x04201d5c ++#define BCHP_QUEUE_22_DATA_GFAP_REG_START 0x04201d60 ++#define BCHP_QUEUE_22_DATA_GFAP_REG_END 0x04201d6c ++#define BCHP_QUEUE_23_DATA_GFAP_REG_START 0x04201d70 ++#define BCHP_QUEUE_23_DATA_GFAP_REG_END 0x04201d7c ++#define BCHP_QUEUE_24_DATA_GFAP_REG_START 0x04201d80 ++#define BCHP_QUEUE_24_DATA_GFAP_REG_END 0x04201d8c ++#define BCHP_QUEUE_25_DATA_GFAP_REG_START 0x04201d90 ++#define BCHP_QUEUE_25_DATA_GFAP_REG_END 0x04201d9c ++#define BCHP_QUEUE_26_DATA_GFAP_REG_START 0x04201da0 ++#define BCHP_QUEUE_26_DATA_GFAP_REG_END 0x04201dac ++#define BCHP_QUEUE_27_DATA_GFAP_REG_START 0x04201db0 ++#define BCHP_QUEUE_27_DATA_GFAP_REG_END 0x04201dbc ++#define BCHP_QUEUE_28_DATA_GFAP_REG_START 0x04201dc0 ++#define BCHP_QUEUE_28_DATA_GFAP_REG_END 0x04201dcc ++#define BCHP_QUEUE_29_DATA_GFAP_REG_START 0x04201dd0 ++#define BCHP_QUEUE_29_DATA_GFAP_REG_END 0x04201ddc ++#define BCHP_QUEUE_30_DATA_GFAP_REG_START 0x04201de0 ++#define BCHP_QUEUE_30_DATA_GFAP_REG_END 0x04201dec ++#define BCHP_QUEUE_31_DATA_GFAP_REG_START 0x04201df0 ++#define BCHP_QUEUE_31_DATA_GFAP_REG_END 0x04201dfc ++#define BCHP_QUEUE_STATUS_GFAP_REG_START 0x04201f00 ++#define BCHP_QUEUE_STATUS_GFAP_REG_END 0x04201f7c ++#define BCHP_QUEUE_MIB_GFAP_REG_START 0x04202000 ++#define BCHP_QUEUE_MIB_GFAP_REG_END 0x0420217c ++#define BCHP_DQM_64_GFAP_REG_START 0x04202200 ++#define BCHP_DQM_64_GFAP_REG_END 0x04202248 ++#define BCHP_QUEUE_0_CNTRL_64_GFAP_REG_START 0x04202400 ++#define BCHP_QUEUE_0_CNTRL_64_GFAP_REG_END 0x0420240c ++#define BCHP_QUEUE_1_CNTRL_64_GFAP_REG_START 0x04202410 ++#define BCHP_QUEUE_1_CNTRL_64_GFAP_REG_END 0x0420241c ++#define BCHP_QUEUE_2_CNTRL_64_GFAP_REG_START 0x04202420 ++#define BCHP_QUEUE_2_CNTRL_64_GFAP_REG_END 0x0420242c ++#define BCHP_QUEUE_3_CNTRL_64_GFAP_REG_START 0x04202430 ++#define BCHP_QUEUE_3_CNTRL_64_GFAP_REG_END 0x0420243c ++#define BCHP_QUEUE_4_CNTRL_64_GFAP_REG_START 0x04202440 ++#define BCHP_QUEUE_4_CNTRL_64_GFAP_REG_END 0x0420244c ++#define BCHP_QUEUE_5_CNTRL_64_GFAP_REG_START 0x04202450 ++#define BCHP_QUEUE_5_CNTRL_64_GFAP_REG_END 0x0420245c ++#define BCHP_QUEUE_6_CNTRL_64_GFAP_REG_START 0x04202460 ++#define BCHP_QUEUE_6_CNTRL_64_GFAP_REG_END 0x0420246c ++#define BCHP_QUEUE_7_CNTRL_64_GFAP_REG_START 0x04202470 ++#define BCHP_QUEUE_7_CNTRL_64_GFAP_REG_END 0x0420247c ++#define BCHP_QUEUE_8_CNTRL_64_GFAP_REG_START 0x04202480 ++#define BCHP_QUEUE_8_CNTRL_64_GFAP_REG_END 0x0420248c ++#define BCHP_QUEUE_9_CNTRL_64_GFAP_REG_START 0x04202490 ++#define BCHP_QUEUE_9_CNTRL_64_GFAP_REG_END 0x0420249c ++#define BCHP_QUEUE_10_CNTRL_64_GFAP_REG_START 0x042024a0 ++#define BCHP_QUEUE_10_CNTRL_64_GFAP_REG_END 0x042024ac ++#define BCHP_QUEUE_11_CNTRL_64_GFAP_REG_START 0x042024b0 ++#define BCHP_QUEUE_11_CNTRL_64_GFAP_REG_END 0x042024bc ++#define BCHP_QUEUE_12_CNTRL_64_GFAP_REG_START 0x042024c0 ++#define BCHP_QUEUE_12_CNTRL_64_GFAP_REG_END 0x042024cc ++#define BCHP_QUEUE_13_CNTRL_64_GFAP_REG_START 0x042024d0 ++#define BCHP_QUEUE_13_CNTRL_64_GFAP_REG_END 0x042024dc ++#define BCHP_QUEUE_14_CNTRL_64_GFAP_REG_START 0x042024e0 ++#define BCHP_QUEUE_14_CNTRL_64_GFAP_REG_END 0x042024ec ++#define BCHP_QUEUE_15_CNTRL_64_GFAP_REG_START 0x042024f0 ++#define BCHP_QUEUE_15_CNTRL_64_GFAP_REG_END 0x042024fc ++#define BCHP_QUEUE_16_CNTRL_64_GFAP_REG_START 0x04202500 ++#define BCHP_QUEUE_16_CNTRL_64_GFAP_REG_END 0x0420250c ++#define BCHP_QUEUE_17_CNTRL_64_GFAP_REG_START 0x04202510 ++#define BCHP_QUEUE_17_CNTRL_64_GFAP_REG_END 0x0420251c ++#define BCHP_QUEUE_18_CNTRL_64_GFAP_REG_START 0x04202520 ++#define BCHP_QUEUE_18_CNTRL_64_GFAP_REG_END 0x0420252c ++#define BCHP_QUEUE_19_CNTRL_64_GFAP_REG_START 0x04202530 ++#define BCHP_QUEUE_19_CNTRL_64_GFAP_REG_END 0x0420253c ++#define BCHP_QUEUE_20_CNTRL_64_GFAP_REG_START 0x04202540 ++#define BCHP_QUEUE_20_CNTRL_64_GFAP_REG_END 0x0420254c ++#define BCHP_QUEUE_21_CNTRL_64_GFAP_REG_START 0x04202550 ++#define BCHP_QUEUE_21_CNTRL_64_GFAP_REG_END 0x0420255c ++#define BCHP_QUEUE_22_CNTRL_64_GFAP_REG_START 0x04202560 ++#define BCHP_QUEUE_22_CNTRL_64_GFAP_REG_END 0x0420256c ++#define BCHP_QUEUE_23_CNTRL_64_GFAP_REG_START 0x04202570 ++#define BCHP_QUEUE_23_CNTRL_64_GFAP_REG_END 0x0420257c ++#define BCHP_QUEUE_24_CNTRL_64_GFAP_REG_START 0x04202580 ++#define BCHP_QUEUE_24_CNTRL_64_GFAP_REG_END 0x0420258c ++#define BCHP_QUEUE_25_CNTRL_64_GFAP_REG_START 0x04202590 ++#define BCHP_QUEUE_25_CNTRL_64_GFAP_REG_END 0x0420259c ++#define BCHP_QUEUE_26_CNTRL_64_GFAP_REG_START 0x042025a0 ++#define BCHP_QUEUE_26_CNTRL_64_GFAP_REG_END 0x042025ac ++#define BCHP_QUEUE_27_CNTRL_64_GFAP_REG_START 0x042025b0 ++#define BCHP_QUEUE_27_CNTRL_64_GFAP_REG_END 0x042025bc ++#define BCHP_QUEUE_28_CNTRL_64_GFAP_REG_START 0x042025c0 ++#define BCHP_QUEUE_28_CNTRL_64_GFAP_REG_END 0x042025cc ++#define BCHP_QUEUE_29_CNTRL_64_GFAP_REG_START 0x042025d0 ++#define BCHP_QUEUE_29_CNTRL_64_GFAP_REG_END 0x042025dc ++#define BCHP_QUEUE_30_CNTRL_64_GFAP_REG_START 0x042025e0 ++#define BCHP_QUEUE_30_CNTRL_64_GFAP_REG_END 0x042025ec ++#define BCHP_QUEUE_31_CNTRL_64_GFAP_REG_START 0x042025f0 ++#define BCHP_QUEUE_31_CNTRL_64_GFAP_REG_END 0x042025fc ++#define BCHP_QUEUE_0_DATA_64_GFAP_REG_START 0x04202600 ++#define BCHP_QUEUE_0_DATA_64_GFAP_REG_END 0x0420260c ++#define BCHP_QUEUE_1_DATA_64_GFAP_REG_START 0x04202610 ++#define BCHP_QUEUE_1_DATA_64_GFAP_REG_END 0x0420261c ++#define BCHP_QUEUE_2_DATA_64_GFAP_REG_START 0x04202620 ++#define BCHP_QUEUE_2_DATA_64_GFAP_REG_END 0x0420262c ++#define BCHP_QUEUE_3_DATA_64_GFAP_REG_START 0x04202630 ++#define BCHP_QUEUE_3_DATA_64_GFAP_REG_END 0x0420263c ++#define BCHP_QUEUE_4_DATA_64_GFAP_REG_START 0x04202640 ++#define BCHP_QUEUE_4_DATA_64_GFAP_REG_END 0x0420264c ++#define BCHP_QUEUE_5_DATA_64_GFAP_REG_START 0x04202650 ++#define BCHP_QUEUE_5_DATA_64_GFAP_REG_END 0x0420265c ++#define BCHP_QUEUE_6_DATA_64_GFAP_REG_START 0x04202660 ++#define BCHP_QUEUE_6_DATA_64_GFAP_REG_END 0x0420266c ++#define BCHP_QUEUE_7_DATA_64_GFAP_REG_START 0x04202670 ++#define BCHP_QUEUE_7_DATA_64_GFAP_REG_END 0x0420267c ++#define BCHP_QUEUE_8_DATA_64_GFAP_REG_START 0x04202680 ++#define BCHP_QUEUE_8_DATA_64_GFAP_REG_END 0x0420268c ++#define BCHP_QUEUE_9_DATA_64_GFAP_REG_START 0x04202690 ++#define BCHP_QUEUE_9_DATA_64_GFAP_REG_END 0x0420269c ++#define BCHP_QUEUE_10_DATA_64_GFAP_REG_START 0x042026a0 ++#define BCHP_QUEUE_10_DATA_64_GFAP_REG_END 0x042026ac ++#define BCHP_QUEUE_11_DATA_64_GFAP_REG_START 0x042026b0 ++#define BCHP_QUEUE_11_DATA_64_GFAP_REG_END 0x042026bc ++#define BCHP_QUEUE_12_DATA_64_GFAP_REG_START 0x042026c0 ++#define BCHP_QUEUE_12_DATA_64_GFAP_REG_END 0x042026cc ++#define BCHP_QUEUE_13_DATA_64_GFAP_REG_START 0x042026d0 ++#define BCHP_QUEUE_13_DATA_64_GFAP_REG_END 0x042026dc ++#define BCHP_QUEUE_14_DATA_64_GFAP_REG_START 0x042026e0 ++#define BCHP_QUEUE_14_DATA_64_GFAP_REG_END 0x042026ec ++#define BCHP_QUEUE_15_DATA_64_GFAP_REG_START 0x042026f0 ++#define BCHP_QUEUE_15_DATA_64_GFAP_REG_END 0x042026fc ++#define BCHP_QUEUE_16_DATA_64_GFAP_REG_START 0x04202700 ++#define BCHP_QUEUE_16_DATA_64_GFAP_REG_END 0x0420270c ++#define BCHP_QUEUE_17_DATA_64_GFAP_REG_START 0x04202710 ++#define BCHP_QUEUE_17_DATA_64_GFAP_REG_END 0x0420271c ++#define BCHP_QUEUE_18_DATA_64_GFAP_REG_START 0x04202720 ++#define BCHP_QUEUE_18_DATA_64_GFAP_REG_END 0x0420272c ++#define BCHP_QUEUE_19_DATA_64_GFAP_REG_START 0x04202730 ++#define BCHP_QUEUE_19_DATA_64_GFAP_REG_END 0x0420273c ++#define BCHP_QUEUE_20_DATA_64_GFAP_REG_START 0x04202740 ++#define BCHP_QUEUE_20_DATA_64_GFAP_REG_END 0x0420274c ++#define BCHP_QUEUE_21_DATA_64_GFAP_REG_START 0x04202750 ++#define BCHP_QUEUE_21_DATA_64_GFAP_REG_END 0x0420275c ++#define BCHP_QUEUE_22_DATA_64_GFAP_REG_START 0x04202760 ++#define BCHP_QUEUE_22_DATA_64_GFAP_REG_END 0x0420276c ++#define BCHP_QUEUE_23_DATA_64_GFAP_REG_START 0x04202770 ++#define BCHP_QUEUE_23_DATA_64_GFAP_REG_END 0x0420277c ++#define BCHP_QUEUE_24_DATA_64_GFAP_REG_START 0x04202780 ++#define BCHP_QUEUE_24_DATA_64_GFAP_REG_END 0x0420278c ++#define BCHP_QUEUE_25_DATA_64_GFAP_REG_START 0x04202790 ++#define BCHP_QUEUE_25_DATA_64_GFAP_REG_END 0x0420279c ++#define BCHP_QUEUE_26_DATA_64_GFAP_REG_START 0x042027a0 ++#define BCHP_QUEUE_26_DATA_64_GFAP_REG_END 0x042027ac ++#define BCHP_QUEUE_27_DATA_64_GFAP_REG_START 0x042027b0 ++#define BCHP_QUEUE_27_DATA_64_GFAP_REG_END 0x042027bc ++#define BCHP_QUEUE_28_DATA_64_GFAP_REG_START 0x042027c0 ++#define BCHP_QUEUE_28_DATA_64_GFAP_REG_END 0x042027cc ++#define BCHP_QUEUE_29_DATA_64_GFAP_REG_START 0x042027d0 ++#define BCHP_QUEUE_29_DATA_64_GFAP_REG_END 0x042027dc ++#define BCHP_QUEUE_30_DATA_64_GFAP_REG_START 0x042027e0 ++#define BCHP_QUEUE_30_DATA_64_GFAP_REG_END 0x042027ec ++#define BCHP_QUEUE_31_DATA_64_GFAP_REG_START 0x042027f0 ++#define BCHP_QUEUE_31_DATA_64_GFAP_REG_END 0x042027fc ++#define BCHP_QUEUE_STATUS_64_GFAP_REG_START 0x04202900 ++#define BCHP_QUEUE_STATUS_64_GFAP_REG_END 0x0420297c ++#define BCHP_QUEUE_MIB_64_GFAP_REG_START 0x04202a00 ++#define BCHP_QUEUE_MIB_64_GFAP_REG_END 0x04202b7c ++#define BCHP_QUEUE_TIMER_GFAP_REG_START 0x04202c00 ++#define BCHP_QUEUE_TIMER_GFAP_REG_END 0x04202cfc ++#define BCHP_QUEUE_TIMER_64_GFAP_REG_START 0x04202d00 ++#define BCHP_QUEUE_TIMER_64_GFAP_REG_END 0x04202dfc ++#define BCHP_OL_QUEUE_0_CNTRL_GFAP_REG_START 0x04203000 ++#define BCHP_OL_QUEUE_0_CNTRL_GFAP_REG_END 0x04203010 ++#define BCHP_OL_QUEUE_1_CNTRL_GFAP_REG_START 0x04203020 ++#define BCHP_OL_QUEUE_1_CNTRL_GFAP_REG_END 0x04203030 ++#define BCHP_OL_QUEUE_2_CNTRL_GFAP_REG_START 0x04203040 ++#define BCHP_OL_QUEUE_2_CNTRL_GFAP_REG_END 0x04203050 ++#define BCHP_OL_QUEUE_3_CNTRL_GFAP_REG_START 0x04203060 ++#define BCHP_OL_QUEUE_3_CNTRL_GFAP_REG_END 0x04203070 ++#define BCHP_OL_QUEUE_4_CNTRL_GFAP_REG_START 0x04203080 ++#define BCHP_OL_QUEUE_4_CNTRL_GFAP_REG_END 0x04203090 ++#define BCHP_OL_QUEUE_5_CNTRL_GFAP_REG_START 0x042030a0 ++#define BCHP_OL_QUEUE_5_CNTRL_GFAP_REG_END 0x042030b0 ++#define BCHP_OL_QUEUE_6_CNTRL_GFAP_REG_START 0x042030c0 ++#define BCHP_OL_QUEUE_6_CNTRL_GFAP_REG_END 0x042030d0 ++#define BCHP_OL_QUEUE_7_CNTRL_GFAP_REG_START 0x042030e0 ++#define BCHP_OL_QUEUE_7_CNTRL_GFAP_REG_END 0x042030f0 ++#define BCHP_OL_QUEUE_8_CNTRL_GFAP_REG_START 0x04203100 ++#define BCHP_OL_QUEUE_8_CNTRL_GFAP_REG_END 0x04203110 ++#define BCHP_OL_QUEUE_9_CNTRL_GFAP_REG_START 0x04203120 ++#define BCHP_OL_QUEUE_9_CNTRL_GFAP_REG_END 0x04203130 ++#define BCHP_OL_QUEUE_10_CNTRL_GFAP_REG_START 0x04203140 ++#define BCHP_OL_QUEUE_10_CNTRL_GFAP_REG_END 0x04203150 ++#define BCHP_OL_QUEUE_11_CNTRL_GFAP_REG_START 0x04203160 ++#define BCHP_OL_QUEUE_11_CNTRL_GFAP_REG_END 0x04203170 ++#define BCHP_OL_QUEUE_12_CNTRL_GFAP_REG_START 0x04203180 ++#define BCHP_OL_QUEUE_12_CNTRL_GFAP_REG_END 0x04203190 ++#define BCHP_OL_QUEUE_13_CNTRL_GFAP_REG_START 0x042031a0 ++#define BCHP_OL_QUEUE_13_CNTRL_GFAP_REG_END 0x042031b0 ++#define BCHP_OL_QUEUE_14_CNTRL_GFAP_REG_START 0x042031c0 ++#define BCHP_OL_QUEUE_14_CNTRL_GFAP_REG_END 0x042031d0 ++#define BCHP_OL_QUEUE_15_CNTRL_GFAP_REG_START 0x042031e0 ++#define BCHP_OL_QUEUE_15_CNTRL_GFAP_REG_END 0x042031f0 ++#define BCHP_OL_QUEUE_16_CNTRL_GFAP_REG_START 0x04203200 ++#define BCHP_OL_QUEUE_16_CNTRL_GFAP_REG_END 0x04203210 ++#define BCHP_OL_QUEUE_17_CNTRL_GFAP_REG_START 0x04203220 ++#define BCHP_OL_QUEUE_17_CNTRL_GFAP_REG_END 0x04203230 ++#define BCHP_OL_QUEUE_18_CNTRL_GFAP_REG_START 0x04203240 ++#define BCHP_OL_QUEUE_18_CNTRL_GFAP_REG_END 0x04203250 ++#define BCHP_OL_QUEUE_19_CNTRL_GFAP_REG_START 0x04203260 ++#define BCHP_OL_QUEUE_19_CNTRL_GFAP_REG_END 0x04203270 ++#define BCHP_OL_QUEUE_20_CNTRL_GFAP_REG_START 0x04203280 ++#define BCHP_OL_QUEUE_20_CNTRL_GFAP_REG_END 0x04203290 ++#define BCHP_OL_QUEUE_21_CNTRL_GFAP_REG_START 0x042032a0 ++#define BCHP_OL_QUEUE_21_CNTRL_GFAP_REG_END 0x042032b0 ++#define BCHP_OL_QUEUE_22_CNTRL_GFAP_REG_START 0x042032c0 ++#define BCHP_OL_QUEUE_22_CNTRL_GFAP_REG_END 0x042032d0 ++#define BCHP_OL_QUEUE_23_CNTRL_GFAP_REG_START 0x042032e0 ++#define BCHP_OL_QUEUE_23_CNTRL_GFAP_REG_END 0x042032f0 ++#define BCHP_OL_QUEUE_24_CNTRL_GFAP_REG_START 0x04203300 ++#define BCHP_OL_QUEUE_24_CNTRL_GFAP_REG_END 0x04203310 ++#define BCHP_OL_QUEUE_25_CNTRL_GFAP_REG_START 0x04203320 ++#define BCHP_OL_QUEUE_25_CNTRL_GFAP_REG_END 0x04203330 ++#define BCHP_OL_QUEUE_26_CNTRL_GFAP_REG_START 0x04203340 ++#define BCHP_OL_QUEUE_26_CNTRL_GFAP_REG_END 0x04203350 ++#define BCHP_OL_QUEUE_27_CNTRL_GFAP_REG_START 0x04203360 ++#define BCHP_OL_QUEUE_27_CNTRL_GFAP_REG_END 0x04203370 ++#define BCHP_OL_QUEUE_28_CNTRL_GFAP_REG_START 0x04203380 ++#define BCHP_OL_QUEUE_28_CNTRL_GFAP_REG_END 0x04203390 ++#define BCHP_OL_QUEUE_29_CNTRL_GFAP_REG_START 0x042033a0 ++#define BCHP_OL_QUEUE_29_CNTRL_GFAP_REG_END 0x042033b0 ++#define BCHP_OL_QUEUE_30_CNTRL_GFAP_REG_START 0x042033c0 ++#define BCHP_OL_QUEUE_30_CNTRL_GFAP_REG_END 0x042033d0 ++#define BCHP_OL_QUEUE_31_CNTRL_GFAP_REG_START 0x042033e0 ++#define BCHP_OL_QUEUE_31_CNTRL_GFAP_REG_END 0x042033f0 ++#define BCHP_OL_QUEUE_0_DATA_GFAP_REG_START 0x04203800 ++#define BCHP_OL_QUEUE_0_DATA_GFAP_REG_END 0x0420381c ++#define BCHP_OL_QUEUE_1_DATA_GFAP_REG_START 0x04203820 ++#define BCHP_OL_QUEUE_1_DATA_GFAP_REG_END 0x0420383c ++#define BCHP_OL_QUEUE_2_DATA_GFAP_REG_START 0x04203840 ++#define BCHP_OL_QUEUE_2_DATA_GFAP_REG_END 0x0420385c ++#define BCHP_OL_QUEUE_3_DATA_GFAP_REG_START 0x04203860 ++#define BCHP_OL_QUEUE_3_DATA_GFAP_REG_END 0x0420387c ++#define BCHP_OL_QUEUE_4_DATA_GFAP_REG_START 0x04203880 ++#define BCHP_OL_QUEUE_4_DATA_GFAP_REG_END 0x0420389c ++#define BCHP_OL_QUEUE_5_DATA_GFAP_REG_START 0x042038a0 ++#define BCHP_OL_QUEUE_5_DATA_GFAP_REG_END 0x042038bc ++#define BCHP_OL_QUEUE_6_DATA_GFAP_REG_START 0x042038c0 ++#define BCHP_OL_QUEUE_6_DATA_GFAP_REG_END 0x042038dc ++#define BCHP_OL_QUEUE_7_DATA_GFAP_REG_START 0x042038e0 ++#define BCHP_OL_QUEUE_7_DATA_GFAP_REG_END 0x042038fc ++#define BCHP_OL_QUEUE_8_DATA_GFAP_REG_START 0x04203900 ++#define BCHP_OL_QUEUE_8_DATA_GFAP_REG_END 0x0420391c ++#define BCHP_OL_QUEUE_9_DATA_GFAP_REG_START 0x04203920 ++#define BCHP_OL_QUEUE_9_DATA_GFAP_REG_END 0x0420393c ++#define BCHP_OL_QUEUE_10_DATA_GFAP_REG_START 0x04203940 ++#define BCHP_OL_QUEUE_10_DATA_GFAP_REG_END 0x0420395c ++#define BCHP_OL_QUEUE_11_DATA_GFAP_REG_START 0x04203960 ++#define BCHP_OL_QUEUE_11_DATA_GFAP_REG_END 0x0420397c ++#define BCHP_OL_QUEUE_12_DATA_GFAP_REG_START 0x04203980 ++#define BCHP_OL_QUEUE_12_DATA_GFAP_REG_END 0x0420399c ++#define BCHP_OL_QUEUE_13_DATA_GFAP_REG_START 0x042039a0 ++#define BCHP_OL_QUEUE_13_DATA_GFAP_REG_END 0x042039bc ++#define BCHP_OL_QUEUE_14_DATA_GFAP_REG_START 0x042039c0 ++#define BCHP_OL_QUEUE_14_DATA_GFAP_REG_END 0x042039dc ++#define BCHP_OL_QUEUE_15_DATA_GFAP_REG_START 0x042039e0 ++#define BCHP_OL_QUEUE_15_DATA_GFAP_REG_END 0x042039fc ++#define BCHP_OL_QUEUE_16_DATA_GFAP_REG_START 0x04203a00 ++#define BCHP_OL_QUEUE_16_DATA_GFAP_REG_END 0x04203a1c ++#define BCHP_OL_QUEUE_17_DATA_GFAP_REG_START 0x04203a20 ++#define BCHP_OL_QUEUE_17_DATA_GFAP_REG_END 0x04203a3c ++#define BCHP_OL_QUEUE_18_DATA_GFAP_REG_START 0x04203a40 ++#define BCHP_OL_QUEUE_18_DATA_GFAP_REG_END 0x04203a5c ++#define BCHP_OL_QUEUE_19_DATA_GFAP_REG_START 0x04203a60 ++#define BCHP_OL_QUEUE_19_DATA_GFAP_REG_END 0x04203a7c ++#define BCHP_OL_QUEUE_20_DATA_GFAP_REG_START 0x04203a80 ++#define BCHP_OL_QUEUE_20_DATA_GFAP_REG_END 0x04203a9c ++#define BCHP_OL_QUEUE_21_DATA_GFAP_REG_START 0x04203aa0 ++#define BCHP_OL_QUEUE_21_DATA_GFAP_REG_END 0x04203abc ++#define BCHP_OL_QUEUE_22_DATA_GFAP_REG_START 0x04203ac0 ++#define BCHP_OL_QUEUE_22_DATA_GFAP_REG_END 0x04203adc ++#define BCHP_OL_QUEUE_23_DATA_GFAP_REG_START 0x04203ae0 ++#define BCHP_OL_QUEUE_23_DATA_GFAP_REG_END 0x04203afc ++#define BCHP_OL_QUEUE_24_DATA_GFAP_REG_START 0x04203b00 ++#define BCHP_OL_QUEUE_24_DATA_GFAP_REG_END 0x04203b1c ++#define BCHP_OL_QUEUE_25_DATA_GFAP_REG_START 0x04203b20 ++#define BCHP_OL_QUEUE_25_DATA_GFAP_REG_END 0x04203b3c ++#define BCHP_OL_QUEUE_26_DATA_GFAP_REG_START 0x04203b40 ++#define BCHP_OL_QUEUE_26_DATA_GFAP_REG_END 0x04203b5c ++#define BCHP_OL_QUEUE_27_DATA_GFAP_REG_START 0x04203b60 ++#define BCHP_OL_QUEUE_27_DATA_GFAP_REG_END 0x04203b7c ++#define BCHP_OL_QUEUE_28_DATA_GFAP_REG_START 0x04203b80 ++#define BCHP_OL_QUEUE_28_DATA_GFAP_REG_END 0x04203b9c ++#define BCHP_OL_QUEUE_29_DATA_GFAP_REG_START 0x04203ba0 ++#define BCHP_OL_QUEUE_29_DATA_GFAP_REG_END 0x04203bbc ++#define BCHP_OL_QUEUE_30_DATA_GFAP_REG_START 0x04203bc0 ++#define BCHP_OL_QUEUE_30_DATA_GFAP_REG_END 0x04203bdc ++#define BCHP_OL_QUEUE_31_DATA_GFAP_REG_START 0x04203be0 ++#define BCHP_OL_QUEUE_31_DATA_GFAP_REG_END 0x04203bfc ++#define BCHP_SharedMem_GFAP_REG_START 0x04204000 ++#define BCHP_SharedMem_GFAP_REG_END 0x0420fffc ++#define BCHP_Memory_GFAP_REG_START 0x04210000 ++#define BCHP_Memory_GFAP_REG_END 0x04217ffc ++#define BCHP_DPE_BASIC_GFAP_REG_START 0x04300000 ++#define BCHP_DPE_BASIC_GFAP_REG_END 0x04300094 ++#define BCHP_DPE_MPEG_GFAP_REG_START 0x04300200 ++#define BCHP_DPE_MPEG_GFAP_REG_END 0x0430034c ++#define BCHP_DPE_HW_GFAP_REG_START 0x04300400 ++#define BCHP_DPE_HW_GFAP_REG_END 0x04300f3c ++#define BCHP_NATC_REG_GFAP_REG_START 0x04301000 ++#define BCHP_NATC_REG_GFAP_REG_END 0x04301164 ++#define BCHP_NATC_SMEM_GFAP_REG_START 0x04307000 ++#define BCHP_NATC_SMEM_GFAP_REG_END 0x04307ffc ++#define BCHP_NATC_MEM_GFAP_REG_START 0x04308000 ++#define BCHP_NATC_MEM_GFAP_REG_END 0x0430fffc ++#define BCHP_FFE_N_0_GFAP_REG_START 0x04350000 ++#define BCHP_FFE_N_0_GFAP_REG_END 0x043503fc ++#define BCHP_FFE_P_0_GFAP_REG_START 0x04351000 ++#define BCHP_FFE_P_0_GFAP_REG_END 0x043517fc ++#define BCHP_FFE_I_0_GFAP_REG_START 0x04354000 ++#define BCHP_FFE_I_0_GFAP_REG_END 0x04357ffc ++#define BCHP_FFE_N_1_GFAP_REG_START 0x04370000 ++#define BCHP_FFE_N_1_GFAP_REG_END 0x043703fc ++#define BCHP_FFE_P_1_GFAP_REG_START 0x04371000 ++#define BCHP_FFE_P_1_GFAP_REG_END 0x043717fc ++#define BCHP_FFE_I_1_GFAP_REG_START 0x04374000 ++#define BCHP_FFE_I_1_GFAP_REG_END 0x04377ffc ++#define BCHP_FFE_N_2_GFAP_REG_START 0x04390000 ++#define BCHP_FFE_N_2_GFAP_REG_END 0x043903fc ++#define BCHP_FFE_P_2_GFAP_REG_START 0x04391000 ++#define BCHP_FFE_P_2_GFAP_REG_END 0x043917fc ++#define BCHP_FFE_I_2_GFAP_REG_START 0x04394000 ++#define BCHP_FFE_I_2_GFAP_REG_END 0x04397ffc ++#define BCHP_FFE_N_3_GFAP_REG_START 0x043b0000 ++#define BCHP_FFE_N_3_GFAP_REG_END 0x043b03fc ++#define BCHP_FFE_P_3_GFAP_REG_START 0x043b1000 ++#define BCHP_FFE_P_3_GFAP_REG_END 0x043b17fc ++#define BCHP_FFE_I_3_GFAP_REG_START 0x043b4000 ++#define BCHP_FFE_I_3_GFAP_REG_END 0x043b7ffc ++#define BCHP_MBDMA_UNI1_REG_START 0x04800000 ++#define BCHP_MBDMA_UNI1_REG_END 0x04800508 ++#define BCHP_UNIMAC_INTERFACE0_UNI1_REG_START 0x04800600 ++#define BCHP_UNIMAC_INTERFACE0_UNI1_REG_END 0x04800710 ++#define BCHP_UNIMAC_CORE0_UNI1_REG_START 0x04800800 ++#define BCHP_UNIMAC_CORE0_UNI1_REG_END 0x04800b44 ++#define BCHP_MIB0_UNI1_REG_START 0x04800c00 ++#define BCHP_MIB0_UNI1_REG_END 0x04800cf4 ++#define BCHP_HFB0_UNI1_REG_START 0x04801000 ++#define BCHP_HFB0_UNI1_REG_END 0x04801ffc ++#define BCHP_MBDMA_UNI0_REG_START 0x04a00000 ++#define BCHP_MBDMA_UNI0_REG_END 0x04a00508 ++#define BCHP_UNIMAC_INTERFACE0_UNI0_REG_START 0x04a00600 ++#define BCHP_UNIMAC_INTERFACE0_UNI0_REG_END 0x04a00710 ++#define BCHP_UNIMAC_CORE0_UNI0_REG_START 0x04a00800 ++#define BCHP_UNIMAC_CORE0_UNI0_REG_END 0x04a00b44 ++#define BCHP_MIB0_UNI0_REG_START 0x04a00c00 ++#define BCHP_MIB0_UNI0_REG_END 0x04a00cf4 ++#define BCHP_HFB0_UNI0_REG_START 0x04a01000 ++#define BCHP_HFB0_UNI0_REG_END 0x04a01ffc ++#define BCHP_MBDMA_UNI2_REG_START 0x04c00000 ++#define BCHP_MBDMA_UNI2_REG_END 0x04c00508 ++#define BCHP_UNIMAC_INTERFACE0_UNI2_REG_START 0x04c00600 ++#define BCHP_UNIMAC_INTERFACE0_UNI2_REG_END 0x04c00710 ++#define BCHP_UNIMAC_CORE0_UNI2_REG_START 0x04c00800 ++#define BCHP_UNIMAC_CORE0_UNI2_REG_END 0x04c00b44 ++#define BCHP_MIB0_UNI2_REG_START 0x04c00c00 ++#define BCHP_MIB0_UNI2_REG_END 0x04c00cf4 ++#define BCHP_HFB0_UNI2_REG_START 0x04c01000 ++#define BCHP_HFB0_UNI2_REG_END 0x04c01ffc ++#define BCHP_SWITCH_CORE_REG_START 0x04e00000 ++#define BCHP_SWITCH_CORE_REG_END 0x04e3fffc ++#define BCHP_SWITCH_REG_REG_START 0x04e40000 ++#define BCHP_SWITCH_REG_REG_END 0x04e400a8 ++#define BCHP_SWITCH_INDIR_RW_REG_START 0x04e40300 ++#define BCHP_SWITCH_INDIR_RW_REG_END 0x04e40314 ++#define BCHP_SWITCH_INTRL2_0_REG_START 0x04e40340 ++#define BCHP_SWITCH_INTRL2_0_REG_END 0x04e4036c ++#define BCHP_SWITCH_INTRL2_1_REG_START 0x04e40380 ++#define BCHP_SWITCH_INTRL2_1_REG_END 0x04e403ac ++#define BCHP_SWITCH_MDIO_REG_START 0x04e403c0 ++#define BCHP_SWITCH_MDIO_REG_END 0x04e403c4 ++#define BCHP_SWITCH_FCB_REG_START 0x04e40400 ++#define BCHP_SWITCH_FCB_REG_END 0x04e40430 ++#define BCHP_SWITCH_ACB_REG_START 0x04e40600 ++#define BCHP_SWITCH_ACB_REG_END 0x04e40804 ++#define BCHP_ERRORPORT_G2U_REG_START 0x07e00000 ++#define BCHP_ERRORPORT_G2U_REG_END 0x07e000bc ++#define BCHP_REQA0_G2U_REG_START 0x07e00400 ++#define BCHP_REQA0_G2U_REG_END 0x07e0048c ++#define BCHP_REPA0_G2U_REG_START 0x07e00500 ++#define BCHP_REPA0_G2U_REG_END 0x07e0058c ++#define BCHP_REQA1_G2U_REG_START 0x07e00600 ++#define BCHP_REQA1_G2U_REG_END 0x07e0068c ++#define BCHP_REPA1_G2U_REG_START 0x07e00700 ++#define BCHP_REPA1_G2U_REG_END 0x07e0078c ++#define BCHP_REQB0_G2U_REG_START 0x07e00800 ++#define BCHP_REQB0_G2U_REG_END 0x07e0088c ++#define BCHP_REPB0_G2U_REG_START 0x07e00900 ++#define BCHP_REPB0_G2U_REG_END 0x07e0098c ++#define BCHP_REQB1_G2U_REG_START 0x07e00a00 ++#define BCHP_REQB1_G2U_REG_END 0x07e00a8c ++#define BCHP_REPB1_G2U_REG_START 0x07e00b00 ++#define BCHP_REPB1_G2U_REG_END 0x07e00b8c ++#define BCHP_REQC0_G2U_REG_START 0x07e00c00 ++#define BCHP_REQC0_G2U_REG_END 0x07e00c8c ++#define BCHP_REPC0_G2U_REG_START 0x07e00d00 ++#define BCHP_REPC0_G2U_REG_END 0x07e00d8c ++#define BCHP_REQC1_G2U_REG_START 0x07e00e00 ++#define BCHP_REQC1_G2U_REG_END 0x07e00e8c ++#define BCHP_REPC1_G2U_REG_START 0x07e00f00 ++#define BCHP_REPC1_G2U_REG_END 0x07e00f8c ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x20000000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x20000108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x20000400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x20000440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x20000800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x20000ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x20001000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x20001028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x20008000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x2000fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x20010b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x20010bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x20012400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x200127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x20013000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x2001307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x20014000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x200151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x20020100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x200201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x20020300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x2002031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x20020320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x2002033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x20020340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x2002035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x20020400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x2002045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x20020500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x2002057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x20020600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x2002060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x20020620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x2002062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x20020700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x2002071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x20020720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x2002073c ++#define BCHP_DECODE_MB_0_REG_START 0x20020740 ++#define BCHP_DECODE_MB_0_REG_END 0x2002075c ++#define BCHP_DECODE_SINT_0_REG_START 0x20020c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x20020dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x20023000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x200231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x20024000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x20024030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x20024100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x200241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x20024200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x200242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x20024300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x200243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x20024400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x200244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x20024500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x200245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x20024f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x20024f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x20025000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x20025048 ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x20025100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x20025118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x20025200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x20025230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x20025400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x2002568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x20026000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x20026404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x20026800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x20026834 ++#define BCHP_HEVD_PFRI_0_REG_START 0x20026a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x20026b58 ++#define BCHP_RVC_0_REG_START 0x20026c00 ++#define BCHP_RVC_0_REG_END 0x20026c20 ++#define BCHP_ILS_REGS_0_REG_START 0x20027000 ++#define BCHP_ILS_REGS_0_REG_END 0x200270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x20027100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x2002710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x20027180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x20027184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x20027200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x2002738c ++#define BCHP_ILB_REGS_0_REG_START 0x20027400 ++#define BCHP_ILB_REGS_0_REG_END 0x20027410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x20028100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x200281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x20028300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x2002831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x20028320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x2002833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x20028400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x2002845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x20028500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x2002857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x20028700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x2002871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x20028720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x2002873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x20028740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x2002875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x20028c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x20028dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x20028e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x20028efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x2002c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x2002c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x2002c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x2002c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x2002c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x2002cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x2002d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x2002d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x20030000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x20030108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x20030400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x20030440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x20030800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x20030ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x20031000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x2003100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x20034000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x20037ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x20040100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x200401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x20040300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x2004031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x20040320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x2004033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x20040340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x2004035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x20040400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x2004045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x20040500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x2004057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x20040600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x2004060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x20040620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x2004062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x20040700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x2004071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x20040720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x2004073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x20040740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x2004075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x20040c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x20040dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x20043000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x200431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x20044000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x20044030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x20044100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x200441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x20044200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x200442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x20044300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x200443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x20044400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x200444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x20044500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x200445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x20044f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x20044f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x20045000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x20045048 ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x20045100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x20045118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x20045200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x20045230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x20045400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x2004568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x20046000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x20046404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x20046800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x20046834 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x20046a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x20046b58 ++#define BCHP_RVC_2_0_REG_START 0x20046c00 ++#define BCHP_RVC_2_0_REG_END 0x20046c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x20047000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x200470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x20047100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x2004710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x20047180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x20047184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x20047200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x2004738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x20047400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x20047410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x20048100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x200481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x20048300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x2004831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x20048320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x2004833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x20048400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x2004845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x20048500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x2004857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x20048700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x2004871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x20048720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x2004873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x20048740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x2004875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x20048c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x20048dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x20048e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x20048efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x2004c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x2004c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x2004c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x2004c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x2004c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x2004cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x2004d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x2004d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x20050000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x20050108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x20050400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x20050440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x20050800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x20050ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x20051000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x2005100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x20054000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x20057ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x20080000 ++#define BCHP_HVD_INTR2_0_REG_END 0x2008002c ++#define BCHP_HVD_RGR_0_REG_START 0x20080400 ++#define BCHP_HVD_RGR_0_REG_END 0x20080410 ++#define BCHP_VICH_0_REG_START 0x200a0000 ++#define BCHP_VICH_0_REG_END 0x200a008b ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_START 0x20100000 ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_END 0x20100108 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_START 0x20100400 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_END 0x20100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_START 0x20100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_END 0x20100ffc ++#define BCHP_HEVD_OL_SINT_1_REG_START 0x20101000 ++#define BCHP_HEVD_OL_SINT_1_REG_END 0x20101028 ++#define BCHP_HEVD_OL_LDST_1_REG_START 0x20108000 ++#define BCHP_HEVD_OL_LDST_1_REG_END 0x2010fffc ++#define BCHP_REG_CABAC2BINS_1_REG_START 0x20110b00 ++#define BCHP_REG_CABAC2BINS_1_REG_END 0x20110bfc ++#define BCHP_REG_CABAC2BINS2_1_REG_START 0x20112400 ++#define BCHP_REG_CABAC2BINS2_1_REG_END 0x201127fc ++#define BCHP_HEVD_CABAC_1_REG_START 0x20113000 ++#define BCHP_HEVD_CABAC_1_REG_END 0x2011307c ++#define BCHP_HEVD_OL_CTL_1_REG_START 0x20114000 ++#define BCHP_HEVD_OL_CTL_1_REG_END 0x201151fc ++#define BCHP_DECODE_MAIN_1_REG_START 0x20120100 ++#define BCHP_DECODE_MAIN_1_REG_END 0x201201fc ++#define BCHP_DECODE_MCOM_1_REG_START 0x20120300 ++#define BCHP_DECODE_MCOM_1_REG_END 0x2012031c ++#define BCHP_DECODE_SPRE_1_REG_START 0x20120320 ++#define BCHP_DECODE_SPRE_1_REG_END 0x2012033c ++#define BCHP_DECODE_WPRD_1_REG_START 0x20120340 ++#define BCHP_DECODE_WPRD_1_REG_END 0x2012035c ++#define BCHP_DECODE_DQNT_1_REG_START 0x20120400 ++#define BCHP_DECODE_DQNT_1_REG_END 0x2012045c ++#define BCHP_DECODE_DQNT_8X8_1_REG_START 0x20120500 ++#define BCHP_DECODE_DQNT_8X8_1_REG_END 0x2012057c ++#define BCHP_DECODE_VP8_XFRM_1_REG_START 0x20120600 ++#define BCHP_DECODE_VP8_XFRM_1_REG_END 0x2012060c ++#define BCHP_DECODE_VP6_DCP_1_REG_START 0x20120620 ++#define BCHP_DECODE_VP6_DCP_1_REG_END 0x2012062c ++#define BCHP_DECODE_XFRM_1_REG_START 0x20120700 ++#define BCHP_DECODE_XFRM_1_REG_END 0x2012071c ++#define BCHP_DECODE_DBLK_1_REG_START 0x20120720 ++#define BCHP_DECODE_DBLK_1_REG_END 0x2012073c ++#define BCHP_DECODE_MB_1_REG_START 0x20120740 ++#define BCHP_DECODE_MB_1_REG_END 0x2012075c ++#define BCHP_DECODE_SINT_1_REG_START 0x20120c00 ++#define BCHP_DECODE_SINT_1_REG_END 0x20120dfc ++#define BCHP_DECODE_WPTBL_1_REG_START 0x20123000 ++#define BCHP_DECODE_WPTBL_1_REG_END 0x201231fc ++#define BCHP_HEVD_BE_GLOBAL_1_REG_START 0x20124000 ++#define BCHP_HEVD_BE_GLOBAL_1_REG_END 0x20124030 ++#define BCHP_HEVD_IXFORM_1_REG_START 0x20124100 ++#define BCHP_HEVD_IXFORM_1_REG_END 0x201241fc ++#define BCHP_HEVD_MCOMP_1_REG_START 0x20124200 ++#define BCHP_HEVD_MCOMP_1_REG_END 0x201242fc ++#define BCHP_HEVD_SPRED_1_REG_START 0x20124300 ++#define BCHP_HEVD_SPRED_1_REG_END 0x201243f0 ++#define BCHP_HEVD_FILTER_1_REG_START 0x20124400 ++#define BCHP_HEVD_FILTER_1_REG_END 0x201244fc ++#define BCHP_HEVD_OUTPUT_1_REG_START 0x20124500 ++#define BCHP_HEVD_OUTPUT_1_REG_END 0x201245fc ++#define BCHP_HEVD_MARKER_1_REG_START 0x20124f00 ++#define BCHP_HEVD_MARKER_1_REG_END 0x20124f7c ++#define BCHP_HEVD_FE_CTRL_1_REG_START 0x20125000 ++#define BCHP_HEVD_FE_CTRL_1_REG_END 0x20125048 ++#define BCHP_HEVD_STRM_IN_1_REG_START 0x20125100 ++#define BCHP_HEVD_STRM_IN_1_REG_END 0x20125118 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_START 0x20125200 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_END 0x20125230 ++#define BCHP_HEVD_VECGEN_1_REG_START 0x20125400 ++#define BCHP_HEVD_VECGEN_1_REG_END 0x2012568c ++#define BCHP_DCD_PIPE_CTL_1_REG_START 0x20126000 ++#define BCHP_DCD_PIPE_CTL_1_REG_END 0x20126404 ++#define BCHP_HEVD_PCACHE_1_REG_START 0x20126800 ++#define BCHP_HEVD_PCACHE_1_REG_END 0x20126834 ++#define BCHP_HEVD_PFRI_1_REG_START 0x20126a00 ++#define BCHP_HEVD_PFRI_1_REG_END 0x20126b58 ++#define BCHP_RVC_1_REG_START 0x20126c00 ++#define BCHP_RVC_1_REG_END 0x20126c20 ++#define BCHP_ILS_REGS_1_REG_START 0x20127000 ++#define BCHP_ILS_REGS_1_REG_END 0x201270fc ++#define BCHP_ILS_SCALE_ADDR_1_REG_START 0x20127100 ++#define BCHP_ILS_SCALE_ADDR_1_REG_END 0x2012710c ++#define BCHP_ILS_SPSCALE_FILL_1_REG_START 0x20127180 ++#define BCHP_ILS_SPSCALE_FILL_1_REG_END 0x20127184 ++#define BCHP_ILS_MVSCALE_1_REG_START 0x20127200 ++#define BCHP_ILS_MVSCALE_1_REG_END 0x2012738c ++#define BCHP_ILB_REGS_1_REG_START 0x20127400 ++#define BCHP_ILB_REGS_1_REG_END 0x20127410 ++#define BCHP_BLD_DECODE_MAIN_1_REG_START 0x20128100 ++#define BCHP_BLD_DECODE_MAIN_1_REG_END 0x201281fc ++#define BCHP_BLD_DECODE_MCOM_1_REG_START 0x20128300 ++#define BCHP_BLD_DECODE_MCOM_1_REG_END 0x2012831c ++#define BCHP_BLD_DECODE_SPRE_1_REG_START 0x20128320 ++#define BCHP_BLD_DECODE_SPRE_1_REG_END 0x2012833c ++#define BCHP_BLD_DECODE_DQNT_1_REG_START 0x20128400 ++#define BCHP_BLD_DECODE_DQNT_1_REG_END 0x2012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_1_REG_START 0x20128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_1_REG_END 0x2012857c ++#define BCHP_BLD_DECODE_XFRM_1_REG_START 0x20128700 ++#define BCHP_BLD_DECODE_XFRM_1_REG_END 0x2012871c ++#define BCHP_BLD_DECODE_DBLK_1_REG_START 0x20128720 ++#define BCHP_BLD_DECODE_DBLK_1_REG_END 0x2012873c ++#define BCHP_BLD_DECODE_MB_1_REG_START 0x20128740 ++#define BCHP_BLD_DECODE_MB_1_REG_END 0x2012875c ++#define BCHP_BLD_DECODE_SINT_1_REG_START 0x20128c00 ++#define BCHP_BLD_DECODE_SINT_1_REG_END 0x20128dfc ++#define BCHP_BLD_DECODE_RVC_1_REG_START 0x20128e00 ++#define BCHP_BLD_DECODE_RVC_1_REG_END 0x20128efc ++#define BCHP_BLD_BL_CPU_REGS_1_REG_START 0x2012c000 ++#define BCHP_BLD_BL_CPU_REGS_1_REG_END 0x2012c108 ++#define BCHP_BLD_BL_CPU_DMA_1_REG_START 0x2012c400 ++#define BCHP_BLD_BL_CPU_DMA_1_REG_END 0x2012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_1_REG_START 0x2012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_1_REG_END 0x2012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_1_REG_START 0x2012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_1_REG_END 0x2012d090 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_START 0x20130000 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_END 0x20130108 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_START 0x20130400 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_END 0x20130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_START 0x20130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_END 0x20130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_START 0x20131000 ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_END 0x2013100c ++#define BCHP_HEVD_IL_LDST_1_REG_START 0x20134000 ++#define BCHP_HEVD_IL_LDST_1_REG_END 0x20137ffc ++#define BCHP_DECODE_MAIN_2_1_REG_START 0x20140100 ++#define BCHP_DECODE_MAIN_2_1_REG_END 0x201401fc ++#define BCHP_DECODE_MCOM_2_1_REG_START 0x20140300 ++#define BCHP_DECODE_MCOM_2_1_REG_END 0x2014031c ++#define BCHP_DECODE_SPRE_2_1_REG_START 0x20140320 ++#define BCHP_DECODE_SPRE_2_1_REG_END 0x2014033c ++#define BCHP_DECODE_WPRD_2_1_REG_START 0x20140340 ++#define BCHP_DECODE_WPRD_2_1_REG_END 0x2014035c ++#define BCHP_DECODE_DQNT_2_1_REG_START 0x20140400 ++#define BCHP_DECODE_DQNT_2_1_REG_END 0x2014045c ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_START 0x20140500 ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_END 0x2014057c ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_START 0x20140600 ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_END 0x2014060c ++#define BCHP_DECODE_VP6_DCP_2_1_REG_START 0x20140620 ++#define BCHP_DECODE_VP6_DCP_2_1_REG_END 0x2014062c ++#define BCHP_DECODE_XFRM_2_1_REG_START 0x20140700 ++#define BCHP_DECODE_XFRM_2_1_REG_END 0x2014071c ++#define BCHP_DECODE_DBLK_2_1_REG_START 0x20140720 ++#define BCHP_DECODE_DBLK_2_1_REG_END 0x2014073c ++#define BCHP_DECODE_MB_2_1_REG_START 0x20140740 ++#define BCHP_DECODE_MB_2_1_REG_END 0x2014075c ++#define BCHP_DECODE_SINT_2_1_REG_START 0x20140c00 ++#define BCHP_DECODE_SINT_2_1_REG_END 0x20140dfc ++#define BCHP_DECODE_WPTBL_2_1_REG_START 0x20143000 ++#define BCHP_DECODE_WPTBL_2_1_REG_END 0x201431fc ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_START 0x20144000 ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_END 0x20144030 ++#define BCHP_HEVD_IXFORM_2_1_REG_START 0x20144100 ++#define BCHP_HEVD_IXFORM_2_1_REG_END 0x201441fc ++#define BCHP_HEVD_MCOMP_2_1_REG_START 0x20144200 ++#define BCHP_HEVD_MCOMP_2_1_REG_END 0x201442fc ++#define BCHP_HEVD_SPRED_2_1_REG_START 0x20144300 ++#define BCHP_HEVD_SPRED_2_1_REG_END 0x201443f0 ++#define BCHP_HEVD_FILTER_2_1_REG_START 0x20144400 ++#define BCHP_HEVD_FILTER_2_1_REG_END 0x201444fc ++#define BCHP_HEVD_OUTPUT_2_1_REG_START 0x20144500 ++#define BCHP_HEVD_OUTPUT_2_1_REG_END 0x201445fc ++#define BCHP_HEVD_MARKER_2_1_REG_START 0x20144f00 ++#define BCHP_HEVD_MARKER_2_1_REG_END 0x20144f7c ++#define BCHP_HEVD_FE_CTRL_2_1_REG_START 0x20145000 ++#define BCHP_HEVD_FE_CTRL_2_1_REG_END 0x20145048 ++#define BCHP_HEVD_STRM_IN_2_1_REG_START 0x20145100 ++#define BCHP_HEVD_STRM_IN_2_1_REG_END 0x20145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_START 0x20145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_END 0x20145230 ++#define BCHP_HEVD_VECGEN_2_1_REG_START 0x20145400 ++#define BCHP_HEVD_VECGEN_2_1_REG_END 0x2014568c ++#define BCHP_DCD_PIPE_CTL_2_1_REG_START 0x20146000 ++#define BCHP_DCD_PIPE_CTL_2_1_REG_END 0x20146404 ++#define BCHP_HEVD_PCACHE_2_1_REG_START 0x20146800 ++#define BCHP_HEVD_PCACHE_2_1_REG_END 0x20146834 ++#define BCHP_HEVD_PFRI_2_1_REG_START 0x20146a00 ++#define BCHP_HEVD_PFRI_2_1_REG_END 0x20146b58 ++#define BCHP_RVC_2_1_REG_START 0x20146c00 ++#define BCHP_RVC_2_1_REG_END 0x20146c20 ++#define BCHP_ILS_REGS_2_1_REG_START 0x20147000 ++#define BCHP_ILS_REGS_2_1_REG_END 0x201470fc ++#define BCHP_ILS_SCALE_ADDR_2_1_REG_START 0x20147100 ++#define BCHP_ILS_SCALE_ADDR_2_1_REG_END 0x2014710c ++#define BCHP_ILS_SPSCALE_FILL_2_1_REG_START 0x20147180 ++#define BCHP_ILS_SPSCALE_FILL_2_1_REG_END 0x20147184 ++#define BCHP_ILS_MVSCALE_2_1_REG_START 0x20147200 ++#define BCHP_ILS_MVSCALE_2_1_REG_END 0x2014738c ++#define BCHP_ILB_REGS_2_1_REG_START 0x20147400 ++#define BCHP_ILB_REGS_2_1_REG_END 0x20147410 ++#define BCHP_BLD_DECODE_MAIN_2_1_REG_START 0x20148100 ++#define BCHP_BLD_DECODE_MAIN_2_1_REG_END 0x201481fc ++#define BCHP_BLD_DECODE_MCOM_2_1_REG_START 0x20148300 ++#define BCHP_BLD_DECODE_MCOM_2_1_REG_END 0x2014831c ++#define BCHP_BLD_DECODE_SPRE_2_1_REG_START 0x20148320 ++#define BCHP_BLD_DECODE_SPRE_2_1_REG_END 0x2014833c ++#define BCHP_BLD_DECODE_DQNT_2_1_REG_START 0x20148400 ++#define BCHP_BLD_DECODE_DQNT_2_1_REG_END 0x2014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_1_REG_START 0x20148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_1_REG_END 0x2014857c ++#define BCHP_BLD_DECODE_XFRM_2_1_REG_START 0x20148700 ++#define BCHP_BLD_DECODE_XFRM_2_1_REG_END 0x2014871c ++#define BCHP_BLD_DECODE_DBLK_2_1_REG_START 0x20148720 ++#define BCHP_BLD_DECODE_DBLK_2_1_REG_END 0x2014873c ++#define BCHP_BLD_DECODE_MB_2_1_REG_START 0x20148740 ++#define BCHP_BLD_DECODE_MB_2_1_REG_END 0x2014875c ++#define BCHP_BLD_DECODE_SINT_2_1_REG_START 0x20148c00 ++#define BCHP_BLD_DECODE_SINT_2_1_REG_END 0x20148dfc ++#define BCHP_BLD_DECODE_RVC_2_1_REG_START 0x20148e00 ++#define BCHP_BLD_DECODE_RVC_2_1_REG_END 0x20148efc ++#define BCHP_BLD_BL_CPU_REGS_2_1_REG_START 0x2014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_1_REG_END 0x2014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_1_REG_START 0x2014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_1_REG_END 0x2014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_1_REG_START 0x2014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_1_REG_END 0x2014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_1_REG_START 0x2014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_1_REG_END 0x2014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_START 0x20150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_END 0x20150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_START 0x20150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_END 0x20150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_START 0x20150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_END 0x20150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_START 0x20151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_END 0x2015100c ++#define BCHP_HEVD_IL_LDST_2_1_REG_START 0x20154000 ++#define BCHP_HEVD_IL_LDST_2_1_REG_END 0x20157ffc ++#define BCHP_HVD_INTR2_1_REG_START 0x20180000 ++#define BCHP_HVD_INTR2_1_REG_END 0x2018002c ++#define BCHP_HVD_RGR_1_REG_START 0x20180400 ++#define BCHP_HVD_RGR_1_REG_END 0x20180410 ++#define BCHP_VICH_1_REG_START 0x201a0000 ++#define BCHP_VICH_1_REG_END 0x201a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x20300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x2030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x20310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x203103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x20310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x20310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x20310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x20310470 ++#define BCHP_SCPU_INTR1_REG_START 0x20310480 ++#define BCHP_SCPU_INTR1_REG_END 0x20310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x203104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x203104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x20310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x2031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x20310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x2031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x20311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x2031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x20311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x2031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x20312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x20312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x20312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x20312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x20312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x20312114 ++#define BCHP_SAGE_UART_REG_START 0x20312200 ++#define BCHP_SAGE_UART_REG_END 0x2031221c ++#define BCHP_SCPU_PM_REG_START 0x20312980 ++#define BCHP_SCPU_PM_REG_END 0x20312988 ++#define BCHP_SCPU_TIMER_REG_START 0x20312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x20312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x2032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x2032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x2032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x2032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x2032d300 ++#define BCHP_BSP_PKL_REG_END 0x2032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x2032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x2032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x2032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x2032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x2032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x2032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x20360000 ++#define BCHP_XPT_SECURITY_REG_END 0x2037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x20380000 ++#define BCHP_SECTOP_GRB_REG_END 0x2038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x20380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x203800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x20380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x2038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x20380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x203801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x20380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x203802c8 ++#define BCHP_S_MEMC_0_REG_START 0x203bc000 ++#define BCHP_S_MEMC_0_REG_END 0x203bc780 ++#define BCHP_MEMC_SECURE_UBUS_0_REG_START 0x203bd000 ++#define BCHP_MEMC_SECURE_UBUS_0_REG_END 0x203bd494 ++#define BCHP_S_MEMC_1_REG_START 0x203cc000 ++#define BCHP_S_MEMC_1_REG_END 0x203cc780 ++#define BCHP_MEMC_SECURE_UBUS_1_REG_START 0x203cd000 ++#define BCHP_MEMC_SECURE_UBUS_1_REG_END 0x203cd494 ++#define BCHP_SUN_GISB_ARB_REG_START 0x20400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x204007fc ++#define BCHP_SUN_GR_REG_START 0x20401000 ++#define BCHP_SUN_GR_REG_END 0x2040100c ++#define BCHP_SSP_RG_REG_START 0x20401200 ++#define BCHP_SSP_RG_REG_END 0x2040120c ++#define BCHP_SUN_RG_REG_START 0x20401400 ++#define BCHP_SUN_RG_REG_END 0x2040140c ++#define BCHP_RF4CE_GR_REG_START 0x20401600 ++#define BCHP_RF4CE_GR_REG_END 0x2040160c ++#define BCHP_TPCAP_REG_START 0x20401800 ++#define BCHP_TPCAP_REG_END 0x2040189c ++#define BCHP_SUN_L2_REG_START 0x20403000 ++#define BCHP_SUN_L2_REG_END 0x20403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x20404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x20404524 ++#define BCHP_BBSI_RG_REG_START 0x20405c00 ++#define BCHP_BBSI_RG_REG_END 0x20405c0c ++#define BCHP_PWM_REG_START 0x20408000 ++#define BCHP_PWM_REG_END 0x20408024 ++#define BCHP_PWMB_REG_START 0x20409000 ++#define BCHP_PWMB_REG_END 0x20409024 ++#define BCHP_IRB_REG_START 0x2040a000 ++#define BCHP_IRB_REG_END 0x2040a138 ++#define BCHP_GIO_REG_START 0x2040a200 ++#define BCHP_GIO_REG_END 0x2040a29c ++#define BCHP_TIMER_REG_START 0x2040a300 ++#define BCHP_TIMER_REG_END 0x2040a33c ++#define BCHP_WATCHDOG_REG_START 0x2040a400 ++#define BCHP_WATCHDOG_REG_END 0x2040a410 ++#define BCHP_BSCA_REG_START 0x2040a500 ++#define BCHP_BSCA_REG_END 0x2040a554 ++#define BCHP_BSCD_REG_START 0x2040a600 ++#define BCHP_BSCD_REG_END 0x2040a654 ++#define BCHP_BSCE_REG_START 0x2040a700 ++#define BCHP_BSCE_REG_END 0x2040a754 ++#define BCHP_IRQ0_REG_START 0x2040a800 ++#define BCHP_IRQ0_REG_END 0x2040a804 ++#define BCHP_IRQ1_REG_START 0x2040a840 ++#define BCHP_IRQ1_REG_END 0x2040a844 ++#define BCHP_PM_REG_START 0x2040a880 ++#define BCHP_PM_REG_END 0x2040a888 ++#define BCHP_UARTA_REG_START 0x2040a900 ++#define BCHP_UARTA_REG_END 0x2040a91c ++#define BCHP_UARTB_REG_START 0x2040a940 ++#define BCHP_UARTB_REG_END 0x2040a95c ++#define BCHP_UARTC_REG_START 0x2040a980 ++#define BCHP_UARTC_REG_END 0x2040a99c ++#define BCHP_SCA_REG_START 0x2040ac00 ++#define BCHP_SCA_REG_END 0x2040acbc ++#define BCHP_SCB_REG_START 0x2040ad00 ++#define BCHP_SCB_REG_END 0x2040adbc ++#define BCHP_SCIRQ0_REG_START 0x2040ae00 ++#define BCHP_SCIRQ0_REG_END 0x2040ae04 ++#define BCHP_SCIRQ1_REG_START 0x2040ae40 ++#define BCHP_SCIRQ1_REG_END 0x2040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x2040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x2040ae84 ++#define BCHP_CTK_REG_START 0x2040b000 ++#define BCHP_CTK_REG_END 0x2040b178 ++#define BCHP_MCIF_INTR2_REG_START 0x2040b200 ++#define BCHP_MCIF_INTR2_REG_END 0x2040b244 ++#define BCHP_MCIF_REG_START 0x2040b280 ++#define BCHP_MCIF_REG_END 0x2040b2a8 ++#define BCHP_MCIF1_REG_START 0x2040b2c0 ++#define BCHP_MCIF1_REG_END 0x2040b2e8 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x2040b300 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x2040b32c ++#define BCHP_UPG_UART_DMA_REG_START 0x2040b400 ++#define BCHP_UPG_UART_DMA_REG_END 0x2040b430 ++#define BCHP_AON_CTRL_REG_START 0x20410000 ++#define BCHP_AON_CTRL_REG_END 0x204105fc ++#define BCHP_AON_L2_REG_START 0x20410600 ++#define BCHP_AON_L2_REG_END 0x2041062c ++#define BCHP_AON_PM_L2_REG_START 0x20410640 ++#define BCHP_AON_PM_L2_REG_END 0x2041066c ++#define BCHP_AON_PM_BBM_L2_REG_START 0x20410680 ++#define BCHP_AON_PM_BBM_L2_REG_END 0x204106ac ++#define BCHP_AON_PIN_CTRL_REG_START 0x20410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x20410718 ++#define BCHP_AON_HDMI_TX_REG_START 0x20410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x204108ac ++#define BCHP_AON_HDMI_RX_REG_START 0x20411000 ++#define BCHP_AON_HDMI_RX_REG_END 0x204110d4 ++#define BCHP_CNTControlBase_REG_START 0x20412000 ++#define BCHP_CNTControlBase_REG_END 0x20412ffc ++#define BCHP_CNTReadBase_REG_START 0x20414000 ++#define BCHP_CNTReadBase_REG_END 0x20414ffc ++#define BCHP_MSPI_REG_START 0x20416000 ++#define BCHP_MSPI_REG_END 0x2041617c ++#define BCHP_GIO_AON_REG_START 0x20417000 ++#define BCHP_GIO_AON_REG_END 0x2041703c ++#define BCHP_LDK_REG_START 0x20417100 ++#define BCHP_LDK_REG_END 0x20417144 ++#define BCHP_BSCB_REG_START 0x20417180 ++#define BCHP_BSCB_REG_END 0x204171d4 ++#define BCHP_IRQ0_AON_REG_START 0x20417200 ++#define BCHP_IRQ0_AON_REG_END 0x20417204 ++#define BCHP_IRQ1_AON_REG_START 0x20417240 ++#define BCHP_IRQ1_AON_REG_END 0x20417244 ++#define BCHP_ICAP_REG_START 0x20417280 ++#define BCHP_ICAP_REG_END 0x204172bc ++#define BCHP_PM_AON_REG_START 0x204172c0 ++#define BCHP_PM_AON_REG_END 0x204172c8 ++#define BCHP_KBD1_REG_START 0x20417300 ++#define BCHP_KBD1_REG_END 0x2041733c ++#define BCHP_KBD2_REG_START 0x20417340 ++#define BCHP_KBD2_REG_END 0x2041737c ++#define BCHP_KBD3_REG_START 0x20417380 ++#define BCHP_KBD3_REG_END 0x204173bc ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x20417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x2041742c ++#define BCHP_WKTMR_REG_START 0x20417480 ++#define BCHP_WKTMR_REG_END 0x20417490 ++#define BCHP_BICAP_REG_START 0x204174c0 ++#define BCHP_BICAP_REG_END 0x204174f8 ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x20420000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x20422ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x20424000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x20424bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x20428000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x204280fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x2042a000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x2042b058 ++#define BCHP_AVS_UART_REG_START 0x20430000 ++#define BCHP_AVS_UART_REG_END 0x20430ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x20431100 ++#define BCHP_AVS_CPU_L2_REG_END 0x2043112c ++#define BCHP_AVS_HOST_L2_REG_START 0x20431200 ++#define BCHP_AVS_HOST_L2_REG_END 0x20431244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x20431300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x2043135c ++#define BCHP_AVS_BSTI_REG_START 0x20431400 ++#define BCHP_AVS_BSTI_REG_END 0x20431404 ++#define BCHP_AVS_TMON_REG_START 0x20431500 ++#define BCHP_AVS_TMON_REG_END 0x20431524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x20431800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x20431908 ++#define BCHP_AVS_HW_MNTR_1_REG_START 0x20432000 ++#define BCHP_AVS_HW_MNTR_1_REG_END 0x204320c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_1_REG_START 0x20432100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_1_REG_END 0x20432124 ++#define BCHP_AVS_RO_REGISTERS_0_1_REG_START 0x20432200 ++#define BCHP_AVS_RO_REGISTERS_0_1_REG_END 0x204322e0 ++#define BCHP_AVS_RO_REGISTERS_1_1_REG_START 0x20432800 ++#define BCHP_AVS_RO_REGISTERS_1_1_REG_END 0x20432808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_1_REG_START 0x20432d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_1_REG_END 0x20432dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_1_REG_START 0x20432e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_1_REG_END 0x20432efc ++#define BCHP_AVS_HW_MNTR_2_REG_START 0x20434000 ++#define BCHP_AVS_HW_MNTR_2_REG_END 0x204340c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_2_REG_START 0x20434100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_2_REG_END 0x20434124 ++#define BCHP_AVS_RO_REGISTERS_0_2_REG_START 0x20434200 ++#define BCHP_AVS_RO_REGISTERS_0_2_REG_END 0x204342e0 ++#define BCHP_AVS_RO_REGISTERS_1_2_REG_START 0x20434800 ++#define BCHP_AVS_RO_REGISTERS_1_2_REG_END 0x20434808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_2_REG_START 0x20434d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_2_REG_END 0x20434dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_2_REG_START 0x20434e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_2_REG_END 0x20434efc ++#define BCHP_AVS_WDOG_REG_START 0x20436000 ++#define BCHP_AVS_WDOG_REG_END 0x20436ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x20438000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x20438024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x20438040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x20438064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x20438080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x204380a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x204380c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x204380e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x20438100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x20438124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x20438140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x20438164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x20438180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x204381a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x204381c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x204381e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x20438200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x20438224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x20438240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x20438264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x20438280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x204382a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x204382c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x204382e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x20438300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x20438324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x20438340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x20438364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x20438380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x204383a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x204383c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x204383e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x20438400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x20438424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x20438440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x20438464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x20438480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x204384a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x204384c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x204384e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x20438500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x20438524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x20438540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x20438564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x20438580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x204385a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x204385c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x204385e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x20438600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x20438624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x20438640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x20438664 ++#define BCHP_AVS_PMB_S_026_REG_START 0x20438680 ++#define BCHP_AVS_PMB_S_026_REG_END 0x204386a4 ++#define BCHP_AVS_PMB_S_027_REG_START 0x204386c0 ++#define BCHP_AVS_PMB_S_027_REG_END 0x204386e4 ++#define BCHP_AVS_PMB_S_028_REG_START 0x20438700 ++#define BCHP_AVS_PMB_S_028_REG_END 0x20438724 ++#define BCHP_AVS_PMB_S_029_REG_START 0x20438740 ++#define BCHP_AVS_PMB_S_029_REG_END 0x20438764 ++#define BCHP_AVS_PMB_S_030_REG_START 0x20438780 ++#define BCHP_AVS_PMB_S_030_REG_END 0x204387a4 ++#define BCHP_AVS_PMB_S_031_REG_START 0x204387c0 ++#define BCHP_AVS_PMB_S_031_REG_END 0x204387e4 ++#define BCHP_AVS_PMB_S_032_REG_START 0x20438800 ++#define BCHP_AVS_PMB_S_032_REG_END 0x20438824 ++#define BCHP_AVS_PMB_S_033_REG_START 0x20438840 ++#define BCHP_AVS_PMB_S_033_REG_END 0x20438864 ++#define BCHP_AVS_PMB_S_034_REG_START 0x20438880 ++#define BCHP_AVS_PMB_S_034_REG_END 0x204388a4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x2043a000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x2043a008 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x20440000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x204407fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x20440800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x20440804 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x20440900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x2044097c ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x20440a00 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x20440a58 ++#define BCHP_HIF_CONTINUATION_REG_START 0x20450000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x204500fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x20450800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x20450814 ++#define BCHP_RFM_SYSCLK_REG_START 0x2045a000 ++#define BCHP_RFM_SYSCLK_REG_END 0x2045a124 ++#define BCHP_RFM_CLK27_REG_START 0x2045a000 ++#define BCHP_RFM_CLK27_REG_END 0x2045a470 ++#define BCHP_RFM_L2_REG_START 0x2045ac00 ++#define BCHP_RFM_L2_REG_END 0x2045ac2c ++#define BCHP_RFM_GRB_REG_START 0x2045b000 ++#define BCHP_RFM_GRB_REG_END 0x2045b00c ++#define BCHP_CLKGEN_REG_START 0x20460000 ++#define BCHP_CLKGEN_REG_END 0x20460884 ++#define BCHP_VCXO_0_RM_REG_START 0x20462800 ++#define BCHP_VCXO_0_RM_REG_END 0x20462838 ++#define BCHP_VCXO_1_RM_REG_START 0x20462880 ++#define BCHP_VCXO_1_RM_REG_END 0x204628b8 ++#define BCHP_VCXO_2_RM_REG_START 0x20462900 ++#define BCHP_VCXO_2_RM_REG_END 0x20462938 ++#define BCHP_CLKGEN_GR_REG_START 0x20463000 ++#define BCHP_CLKGEN_GR_REG_END 0x2046300c ++#define BCHP_SDIO_0_HOST_REG_START 0x204a0000 ++#define BCHP_SDIO_0_HOST_REG_END 0x204a00fc ++#define BCHP_SDIO_0_CFG_REG_START 0x204a0100 ++#define BCHP_SDIO_0_CFG_REG_END 0x204a01fc ++#define BCHP_SDIO_1_HOST_REG_START 0x204a0200 ++#define BCHP_SDIO_1_HOST_REG_END 0x204a02fc ++#define BCHP_SDIO_1_CFG_REG_START 0x204a0300 ++#define BCHP_SDIO_1_CFG_REG_END 0x204a03fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x204a0400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x204a043c ++#define BCHP_EBI_REG_START 0x204a0800 ++#define BCHP_EBI_REG_END 0x204a0bfc ++#define BCHP_HIF_INTR2_REG_START 0x204a1000 ++#define BCHP_HIF_INTR2_REG_END 0x204a102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x204a1500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x204a154c ++#define BCHP_HIF_RGR2_REG_START 0x204a1700 ++#define BCHP_HIF_RGR2_REG_END 0x204a1710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x204a1a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x204a1a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x204a2000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x204a203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x204a2100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x204a2110 ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x204a2200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x204a23fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x204a2400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x204a27fc ++#define BCHP_NAND_REG_START 0x204a2800 ++#define BCHP_NAND_REG_END 0x204a2dfc ++#define BCHP_FLASH_DMA_REG_START 0x204a3000 ++#define BCHP_FLASH_DMA_REG_END 0x204a3028 ++#define BCHP_BSPI_REG_START 0x204a3200 ++#define BCHP_BSPI_REG_END 0x204a324c ++#define BCHP_BSPI_RAF_REG_START 0x204a3300 ++#define BCHP_BSPI_RAF_REG_END 0x204a3320 ++#define BCHP_HIF_MSPI_REG_START 0x204a3400 ++#define BCHP_HIF_MSPI_REG_END 0x204a3584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x204a3600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x204a3604 ++#define BCHP_IPI0_INTR2_REG_START 0x204a4000 ++#define BCHP_IPI0_INTR2_REG_END 0x204a402c ++#define BCHP_IPI1_INTR2_REG_START 0x204a4100 ++#define BCHP_IPI1_INTR2_REG_END 0x204a412c ++#define BCHP_BOOTSRAM_TM_REG_START 0x204b0000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x204bfffc ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x204c0000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x204cfffc ++#define BCHP_ITCH0_REG_START 0x204d0000 ++#define BCHP_ITCH0_REG_END 0x204d0000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x204d0400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x204d0400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x204d0500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x204d0500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x204d0600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x204d0600 ++#define BCHP_NAND_SECURE_REG_START 0x204d0800 ++#define BCHP_NAND_SECURE_REG_END 0x204d0800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x204d0c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x204d0c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x204d0e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x204d0ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x204d1000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x204d1004 ++#define BCHP_ITCH1_REG_START 0x204d1200 ++#define BCHP_ITCH1_REG_END 0x204d1200 ++#define BCHP_PROD_OTP_GRB_REG_START 0x204e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x204e600c ++#define BCHP_JTAG_OTP_REG_START 0x204e6100 ++#define BCHP_JTAG_OTP_REG_END 0x204e615c ++#define BCHP_BOOTROM_REG_START 0x20500000 ++#define BCHP_BOOTROM_REG_END 0x20500ffc ++#define BCHP_MFD_0_REG_START 0x20600000 ++#define BCHP_MFD_0_REG_END 0x206001fc ++#define BCHP_MFD_1_REG_START 0x20600400 ++#define BCHP_MFD_1_REG_END 0x206005fc ++#define BCHP_MFD_2_REG_START 0x20600800 ++#define BCHP_MFD_2_REG_END 0x206009fc ++#define BCHP_MFD_3_REG_START 0x20600c00 ++#define BCHP_MFD_3_REG_END 0x20600dfc ++#define BCHP_VFD_0_REG_START 0x20602000 ++#define BCHP_VFD_0_REG_END 0x206021fc ++#define BCHP_VFD_1_REG_START 0x20602200 ++#define BCHP_VFD_1_REG_END 0x206023fc ++#define BCHP_VFD_2_REG_START 0x20602400 ++#define BCHP_VFD_2_REG_END 0x206025fc ++#define BCHP_VFD_3_REG_START 0x20602600 ++#define BCHP_VFD_3_REG_END 0x206027fc ++#define BCHP_VFD_4_REG_START 0x20602800 ++#define BCHP_VFD_4_REG_END 0x206029fc ++#define BCHP_VFD_5_REG_START 0x20602a00 ++#define BCHP_VFD_5_REG_END 0x20602bfc ++#define BCHP_VFD_6_REG_START 0x20602c00 ++#define BCHP_VFD_6_REG_END 0x20602dfc ++#define BCHP_VFD_7_REG_START 0x20602e00 ++#define BCHP_VFD_7_REG_END 0x20602ffc ++#define BCHP_RDC_REG_START 0x20603000 ++#define BCHP_RDC_REG_END 0x20603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x20604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x2060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x20604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x2060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x20604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x2060432c ++#define BCHP_BVNF_INTR2_5_REG_START 0x20604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x2060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x20604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x2060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x20604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x2060472c ++#define BCHP_BVNF_INTR2_8_REG_START 0x20604800 ++#define BCHP_BVNF_INTR2_8_REG_END 0x2060482c ++#define BCHP_BVNF_INTR2_9_REG_START 0x20604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x2060492c ++#define BCHP_BVNF_INTR2_11_REG_START 0x20604b00 ++#define BCHP_BVNF_INTR2_11_REG_END 0x20604b2c ++#define BCHP_BVNF_INTR2_14_REG_START 0x20604e00 ++#define BCHP_BVNF_INTR2_14_REG_END 0x20604e2c ++#define BCHP_BVNF_INTR2_15_REG_START 0x20604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x20604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x20605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x2060502c ++#define BCHP_BVNF_INTR2_18_REG_START 0x20605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x2060522c ++#define BCHP_FMISC_REG_START 0x20606000 ++#define BCHP_FMISC_REG_END 0x20606020 ++#define BCHP_SCL_0_REG_START 0x20620000 ++#define BCHP_SCL_0_REG_END 0x206203fc ++#define BCHP_SCL_1_REG_START 0x20620400 ++#define BCHP_SCL_1_REG_END 0x206207fc ++#define BCHP_SCL_2_REG_START 0x20620800 ++#define BCHP_SCL_2_REG_END 0x20620bfc ++#define BCHP_SCL_3_REG_START 0x20620c00 ++#define BCHP_SCL_3_REG_END 0x20620ffc ++#define BCHP_SCL_4_REG_START 0x20621000 ++#define BCHP_SCL_4_REG_END 0x206213fc ++#define BCHP_SCL_5_REG_START 0x20621400 ++#define BCHP_SCL_5_REG_END 0x206217fc ++#define BCHP_SCL_6_REG_START 0x20621800 ++#define BCHP_SCL_6_REG_END 0x20621bfc ++#define BCHP_SCL_7_REG_START 0x20621c00 ++#define BCHP_SCL_7_REG_END 0x20621ffc ++#define BCHP_VNET_F_REG_START 0x20622000 ++#define BCHP_VNET_F_REG_END 0x206221fc ++#define BCHP_VNET_B_REG_START 0x20622200 ++#define BCHP_VNET_B_REG_END 0x206223fc ++#define BCHP_MMISC_REG_START 0x20622800 ++#define BCHP_MMISC_REG_END 0x20622820 ++#define BCHP_LBOX_0_REG_START 0x20624000 ++#define BCHP_LBOX_0_REG_END 0x20624070 ++#define BCHP_XSRC_0_REG_START 0x20624800 ++#define BCHP_XSRC_0_REG_END 0x20624888 ++#define BCHP_XSRC_1_REG_START 0x20624c00 ++#define BCHP_XSRC_1_REG_END 0x20624c88 ++#define BCHP_DNR_0_REG_START 0x20626000 ++#define BCHP_DNR_0_REG_END 0x206260a4 ++#define BCHP_DNR_1_REG_START 0x20626200 ++#define BCHP_DNR_1_REG_END 0x206262a4 ++#define BCHP_DNR_2_REG_START 0x20626400 ++#define BCHP_DNR_2_REG_END 0x206264a4 ++#define BCHP_DNR_3_REG_START 0x20626600 ++#define BCHP_DNR_3_REG_END 0x206266a4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x20627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x2062702c ++#define BCHP_BVNM_INTR2_1_REG_START 0x20627100 ++#define BCHP_BVNM_INTR2_1_REG_END 0x2062712c ++#define BCHP_CAP_0_REG_START 0x20640000 ++#define BCHP_CAP_0_REG_END 0x2064010c ++#define BCHP_CAP_1_REG_START 0x20640200 ++#define BCHP_CAP_1_REG_END 0x2064030c ++#define BCHP_CAP_2_REG_START 0x20640400 ++#define BCHP_CAP_2_REG_END 0x2064050c ++#define BCHP_CAP_3_REG_START 0x20640600 ++#define BCHP_CAP_3_REG_END 0x2064070c ++#define BCHP_CAP_4_REG_START 0x20640800 ++#define BCHP_CAP_4_REG_END 0x2064090c ++#define BCHP_CAP_5_REG_START 0x20640a00 ++#define BCHP_CAP_5_REG_END 0x20640b0c ++#define BCHP_CAP_6_REG_START 0x20640c00 ++#define BCHP_CAP_6_REG_END 0x20640d0c ++#define BCHP_CAP_7_REG_START 0x20640e00 ++#define BCHP_CAP_7_REG_END 0x20640f0c ++#define BCHP_GFD_0_REG_START 0x20641000 ++#define BCHP_GFD_0_REG_END 0x2064122c ++#define BCHP_GFD_1_REG_START 0x20641400 ++#define BCHP_GFD_1_REG_END 0x2064162c ++#define BCHP_GFD_2_REG_START 0x20641800 ++#define BCHP_GFD_2_REG_END 0x20641a2c ++#define BCHP_GFD_3_REG_START 0x20641c00 ++#define BCHP_GFD_3_REG_END 0x20641e2c ++#define BCHP_GFD_4_REG_START 0x20642000 ++#define BCHP_GFD_4_REG_END 0x2064222c ++#define BCHP_GFD_5_REG_START 0x20642400 ++#define BCHP_GFD_5_REG_END 0x2064262c ++#define BCHP_CMP_0_REG_START 0x20643000 ++#define BCHP_CMP_0_REG_END 0x206434c0 ++#define BCHP_CMP_1_REG_START 0x20643800 ++#define BCHP_CMP_1_REG_END 0x20643cb0 ++#define BCHP_CMP_2_REG_START 0x20644000 ++#define BCHP_CMP_2_REG_END 0x20644260 ++#define BCHP_CMP_3_REG_START 0x20644400 ++#define BCHP_CMP_3_REG_END 0x20644660 ++#define BCHP_CMP_4_REG_START 0x20644800 ++#define BCHP_CMP_4_REG_END 0x20644a60 ++#define BCHP_CMP_5_REG_START 0x20644c00 ++#define BCHP_CMP_5_REG_END 0x20644e60 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x20645800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x206458a4 ++#define BCHP_MASK_0_REG_START 0x20645c00 ++#define BCHP_MASK_0_REG_END 0x20645c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x20646000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x20647284 ++#define BCHP_BVNB_INTR2_REG_START 0x20648000 ++#define BCHP_BVNB_INTR2_REG_END 0x2064802c ++#define BCHP_BMISC_REG_START 0x20648400 ++#define BCHP_BMISC_REG_END 0x20648420 ++#define BCHP_DMISC_REG_START 0x20680000 ++#define BCHP_DMISC_REG_END 0x2068001c ++#define BCHP_MVP_TOP_0_REG_START 0x20688000 ++#define BCHP_MVP_TOP_0_REG_END 0x2068802c ++#define BCHP_SIOB_0_REG_START 0x20688200 ++#define BCHP_SIOB_0_REG_END 0x206882fc ++#define BCHP_HSCL_0_REG_START 0x20688400 ++#define BCHP_HSCL_0_REG_END 0x206887fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x20689000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x2068927c ++#define BCHP_HD_ANR_AND_0_REG_START 0x20689800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x20689888 ++#define BCHP_MDI_TOP_0_REG_START 0x2068a000 ++#define BCHP_MDI_TOP_0_REG_END 0x2068a0fc ++#define BCHP_MDI_FCB_0_REG_START 0x2068a400 ++#define BCHP_MDI_FCB_0_REG_END 0x2068a7fc ++#define BCHP_MDI_PPB_0_REG_START 0x2068a800 ++#define BCHP_MDI_PPB_0_REG_END 0x2068abfc ++#define BCHP_MDI_MEMC_0_REG_START 0x2068ac00 ++#define BCHP_MDI_MEMC_0_REG_END 0x2068adfc ++#define BCHP_MDI_FCN_0_REG_START 0x2068ae00 ++#define BCHP_MDI_FCN_0_REG_END 0x2068b1fc ++#define BCHP_MVP_TOP_1_REG_START 0x20690000 ++#define BCHP_MVP_TOP_1_REG_END 0x2069002c ++#define BCHP_SIOB_1_REG_START 0x20690200 ++#define BCHP_SIOB_1_REG_END 0x206902fc ++#define BCHP_HSCL_1_REG_START 0x20690400 ++#define BCHP_HSCL_1_REG_END 0x206907fc ++#define BCHP_MDI_TOP_1_REG_START 0x20692000 ++#define BCHP_MDI_TOP_1_REG_END 0x206920fc ++#define BCHP_MDI_PPB_1_REG_START 0x20692800 ++#define BCHP_MDI_PPB_1_REG_END 0x20692bfc ++#define BCHP_MDI_FCN_1_REG_START 0x20692c00 ++#define BCHP_MDI_FCN_1_REG_END 0x20692ffc ++#define BCHP_MVP_TOP_2_REG_START 0x20698000 ++#define BCHP_MVP_TOP_2_REG_END 0x2069802c ++#define BCHP_SIOB_2_REG_START 0x20698200 ++#define BCHP_SIOB_2_REG_END 0x206982fc ++#define BCHP_HSCL_2_REG_START 0x20698400 ++#define BCHP_HSCL_2_REG_END 0x206987fc ++#define BCHP_MDI_TOP_2_REG_START 0x2069a000 ++#define BCHP_MDI_TOP_2_REG_END 0x2069a0fc ++#define BCHP_MDI_PPB_2_REG_START 0x2069a800 ++#define BCHP_MDI_PPB_2_REG_END 0x2069abfc ++#define BCHP_MDI_FCN_2_REG_START 0x2069ac00 ++#define BCHP_MDI_FCN_2_REG_END 0x2069affc ++#define BCHP_MVP_TOP_3_REG_START 0x206a0000 ++#define BCHP_MVP_TOP_3_REG_END 0x206a002c ++#define BCHP_SIOB_3_REG_START 0x206a0200 ++#define BCHP_SIOB_3_REG_END 0x206a02fc ++#define BCHP_HSCL_3_REG_START 0x206a0400 ++#define BCHP_HSCL_3_REG_END 0x206a07fc ++#define BCHP_MDI_TOP_3_REG_START 0x206a2000 ++#define BCHP_MDI_TOP_3_REG_END 0x206a20fc ++#define BCHP_MDI_PPB_3_REG_START 0x206a2800 ++#define BCHP_MDI_PPB_3_REG_END 0x206a2bfc ++#define BCHP_MDI_FCN_3_REG_START 0x206a2c00 ++#define BCHP_MDI_FCN_3_REG_END 0x206a2ffc ++#define BCHP_MVP_TOP_4_REG_START 0x206a8000 ++#define BCHP_MVP_TOP_4_REG_END 0x206a802c ++#define BCHP_SIOB_4_REG_START 0x206a8200 ++#define BCHP_SIOB_4_REG_END 0x206a82fc ++#define BCHP_HSCL_4_REG_START 0x206a8400 ++#define BCHP_HSCL_4_REG_END 0x206a87fc ++#define BCHP_MDI_TOP_4_REG_START 0x206aa000 ++#define BCHP_MDI_TOP_4_REG_END 0x206aa0fc ++#define BCHP_MDI_PPB_4_REG_START 0x206aa800 ++#define BCHP_MDI_PPB_4_REG_END 0x206aabfc ++#define BCHP_MDI_FCN_4_REG_START 0x206aac00 ++#define BCHP_MDI_FCN_4_REG_END 0x206aaffc ++#define BCHP_MISC_REG_START 0x206b0000 ++#define BCHP_MISC_REG_END 0x206b00a8 ++#define BCHP_IT_0_REG_START 0x206b1000 ++#define BCHP_IT_0_REG_END 0x206b17fc ++#define BCHP_IT_1_REG_START 0x206b2000 ++#define BCHP_IT_1_REG_END 0x206b27fc ++#define BCHP_VF_0_REG_START 0x206b3000 ++#define BCHP_VF_0_REG_END 0x206b3134 ++#define BCHP_VF_1_REG_START 0x206b3200 ++#define BCHP_VF_1_REG_END 0x206b3334 ++#define BCHP_SECAM_0_REG_START 0x206b3400 ++#define BCHP_SECAM_0_REG_END 0x206b3414 ++#define BCHP_SM_0_REG_START 0x206b3480 ++#define BCHP_SM_0_REG_END 0x206b34ac ++#define BCHP_SDSRC_0_REG_START 0x206b3500 ++#define BCHP_SDSRC_0_REG_END 0x206b350c ++#define BCHP_HDSRC_0_REG_START 0x206b3520 ++#define BCHP_HDSRC_0_REG_END 0x206b353c ++#define BCHP_CSC_0_REG_START 0x206b3580 ++#define BCHP_CSC_0_REG_END 0x206b35b0 ++#define BCHP_CSC_1_REG_START 0x206b3600 ++#define BCHP_CSC_1_REG_END 0x206b3630 ++#define BCHP_RM_0_REG_START 0x206b3680 ++#define BCHP_RM_0_REG_END 0x206b36b0 ++#define BCHP_RM_1_REG_START 0x206b36c0 ++#define BCHP_RM_1_REG_END 0x206b36f0 ++#define BCHP_ANA_DEBUG_0_REG_START 0x206b3700 ++#define BCHP_ANA_DEBUG_0_REG_END 0x206b3744 ++#define BCHP_DVI_MISC_0_REG_START 0x206b3800 ++#define BCHP_DVI_MISC_0_REG_END 0x206b3800 ++#define BCHP_DVI_DTG_0_REG_START 0x206b4000 ++#define BCHP_DVI_DTG_0_REG_END 0x206b4488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x206b4800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x206b4830 ++#define BCHP_DVI_CSC_0_REG_START 0x206b4900 ++#define BCHP_DVI_CSC_0_REG_END 0x206b4930 ++#define BCHP_DVI_FC_0_REG_START 0x206b4a00 ++#define BCHP_DVI_FC_0_REG_END 0x206b4a04 ++#define BCHP_DVI_DVF_0_REG_START 0x206b4b00 ++#define BCHP_DVI_DVF_0_REG_END 0x206b4b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x206b4c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x206b4c44 ++#define BCHP_ITU656_DTG_0_REG_START 0x206b5000 ++#define BCHP_ITU656_DTG_0_REG_END 0x206b5488 ++#define BCHP_ITU656_CSC_0_REG_START 0x206b5600 ++#define BCHP_ITU656_CSC_0_REG_END 0x206b5630 ++#define BCHP_ITU656_DVF_0_REG_START 0x206b5700 ++#define BCHP_ITU656_DVF_0_REG_END 0x206b5718 ++#define BCHP_ITU656_0_REG_START 0x206b5800 ++#define BCHP_ITU656_0_REG_END 0x206b5820 ++#define BCHP_VEC_CFG_REG_START 0x206b5c00 ++#define BCHP_VEC_CFG_REG_END 0x206b5d9c ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x206b6000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x206b602c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x206b6200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x206b6320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x206b6400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x206b645c ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x206b6500 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x206b655c ++#define BCHP_VIDEO_ENC_STG_2_REG_START 0x206b6600 ++#define BCHP_VIDEO_ENC_STG_2_REG_END 0x206b665c ++#define BCHP_VIDEO_ENC_STG_3_REG_START 0x206b6700 ++#define BCHP_VIDEO_ENC_STG_3_REG_END 0x206b675c ++#define BCHP_DSCL_0_REG_START 0x206b6800 ++#define BCHP_DSCL_0_REG_END 0x206b6bfc ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x206b7000 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x206b7008 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x206b7100 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x206b712c ++#define BCHP_DVP_TVG_0_REG_START 0x206b7200 ++#define BCHP_DVP_TVG_0_REG_END 0x206b7288 ++#define BCHP_VBI_ENC_REG_START 0x206b8000 ++#define BCHP_VBI_ENC_REG_END 0x206b8074 ++#define BCHP_CCE_0_REG_START 0x206b8400 ++#define BCHP_CCE_0_REG_END 0x206b8458 ++#define BCHP_CCE_1_REG_START 0x206b8500 ++#define BCHP_CCE_1_REG_END 0x206b8558 ++#define BCHP_WSE_0_REG_START 0x206b8600 ++#define BCHP_WSE_0_REG_END 0x206b8614 ++#define BCHP_WSE_1_REG_START 0x206b8700 ++#define BCHP_WSE_1_REG_END 0x206b8714 ++#define BCHP_CGMSAE_0_REG_START 0x206b8800 ++#define BCHP_CGMSAE_0_REG_END 0x206b8858 ++#define BCHP_CGMSAE_1_REG_START 0x206b8900 ++#define BCHP_CGMSAE_1_REG_END 0x206b8958 ++#define BCHP_TTE_0_REG_START 0x206b8a00 ++#define BCHP_TTE_0_REG_END 0x206b8a28 ++#define BCHP_TTE_1_REG_START 0x206b8b00 ++#define BCHP_TTE_1_REG_END 0x206b8b28 ++#define BCHP_GSE_0_REG_START 0x206b8c00 ++#define BCHP_GSE_0_REG_END 0x206b8c80 ++#define BCHP_GSE_1_REG_START 0x206b8d00 ++#define BCHP_GSE_1_REG_END 0x206b8d80 ++#define BCHP_AMOLE_0_REG_START 0x206b8e00 ++#define BCHP_AMOLE_0_REG_END 0x206b8e8c ++#define BCHP_AMOLE_1_REG_START 0x206b8f00 ++#define BCHP_AMOLE_1_REG_END 0x206b8f8c ++#define BCHP_CCE_ANCIL_0_REG_START 0x206b9000 ++#define BCHP_CCE_ANCIL_0_REG_END 0x206b9054 ++#define BCHP_WSE_ANCIL_0_REG_START 0x206b9100 ++#define BCHP_WSE_ANCIL_0_REG_END 0x206b910c ++#define BCHP_TTE_ANCIL_0_REG_START 0x206b9200 ++#define BCHP_TTE_ANCIL_0_REG_END 0x206b9228 ++#define BCHP_GSE_ANCIL_0_REG_START 0x206b9300 ++#define BCHP_GSE_ANCIL_0_REG_END 0x206b9380 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x206b9400 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x206b948c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x206b9500 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x206b9524 ++#define BCHP_DVP_HR_REG_START 0x206c0000 ++#define BCHP_DVP_HR_REG_END 0x206c03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x206c0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x206c042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x206c0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x206c0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x206c0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x206c090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x206c0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x206c0c28 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x206c1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x206c11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x206c1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x206c13fc ++#define BCHP_HDMI_RX_0_REG_START 0x206c2000 ++#define BCHP_HDMI_RX_0_REG_END 0x206c27fc ++#define BCHP_HDCP2_RX_0_REG_START 0x206c2800 ++#define BCHP_HDCP2_RX_0_REG_END 0x206c29fc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x206c2a00 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x206c2a2c ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_START 0x206c2a40 ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_END 0x206c2a6c ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_START 0x206c2a80 ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_END 0x206c2aac ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_START 0x206c2ac0 ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_END 0x206c2ad4 ++#define BCHP_HD_DVI_0_REG_START 0x206c4000 ++#define BCHP_HD_DVI_0_REG_END 0x206c427c ++#define BCHP_DVP_HR_TMR_REG_START 0x206c4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x206c4cfc ++#define BCHP_DVP_HT_REG_START 0x206c8000 ++#define BCHP_DVP_HT_REG_END 0x206c8140 ++#define BCHP_HDMI_REG_START 0x206c8800 ++#define BCHP_HDMI_REG_END 0x206c8afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x206c8b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x206c8dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x206c8e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x206c8e7c ++#define BCHP_HDMI_RM_REG_START 0x206c8e80 ++#define BCHP_HDMI_RM_REG_END 0x206c8eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x206c8f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x206c8f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x206c8f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x206c8fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x206c9000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x206c902c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x206c9080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x206c90ac ++#define BCHP_HDMI_RAM_REG_START 0x206c9100 ++#define BCHP_HDMI_RAM_REG_END 0x206c92fc ++#define BCHP_BVN_RGR_REG_START 0x206ce000 ++#define BCHP_BVN_RGR_REG_END 0x206ce010 ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x20700000 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x207002ec ++#define BCHP_VICE2_CME_0_0_REG_START 0x20700400 ++#define BCHP_VICE2_CME_0_0_REG_END 0x207004a0 ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x20700800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x2070088c ++#define BCHP_VICE2_FME_0_0_REG_START 0x20701000 ++#define BCHP_VICE2_FME_0_0_REG_END 0x207010c0 ++#define BCHP_VICE2_HA_0_0_REG_START 0x20701400 ++#define BCHP_VICE2_HA_0_0_REG_END 0x2070148c ++#define BCHP_VICE2_IMD_0_0_REG_START 0x20701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x2070187c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x20701c00 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x20701d28 ++#define BCHP_VICE2_MC_0_0_REG_START 0x20702000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x2070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x20702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x207025e4 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x20702800 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x20702a24 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x20702c00 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x20702e24 ++#define BCHP_VICE2_VIP2_0_0_REG_START 0x20703000 ++#define BCHP_VICE2_VIP2_0_0_REG_END 0x20703224 ++#define BCHP_VICE2_VIP3_0_0_REG_START 0x20703400 ++#define BCHP_VICE2_VIP3_0_0_REG_END 0x20703624 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x20704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x20705338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x20718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x207182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x20720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x207200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x20720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x2072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x20720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x2072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x20722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x207233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x20730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x2073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x20758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x207582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x20760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x207600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x20760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x2076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x20760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x2076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x20762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x207633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x20770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x2077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x20780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x2078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x20781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x20781050 ++#define BCHP_VICE2_L2_0_REG_START 0x20781100 ++#define BCHP_VICE2_L2_0_REG_END 0x2078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x20782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x207820b8 ++#define BCHP_VICE2_CABAC_0_1_REG_START 0x20800000 ++#define BCHP_VICE2_CABAC_0_1_REG_END 0x208002ec ++#define BCHP_VICE2_CME_0_1_REG_START 0x20800400 ++#define BCHP_VICE2_CME_0_1_REG_END 0x208004a0 ++#define BCHP_VICE2_DBLK_0_1_REG_START 0x20800800 ++#define BCHP_VICE2_DBLK_0_1_REG_END 0x2080088c ++#define BCHP_VICE2_FME_0_1_REG_START 0x20801000 ++#define BCHP_VICE2_FME_0_1_REG_END 0x208010c0 ++#define BCHP_VICE2_HA_0_1_REG_START 0x20801400 ++#define BCHP_VICE2_HA_0_1_REG_END 0x2080148c ++#define BCHP_VICE2_IMD_0_1_REG_START 0x20801800 ++#define BCHP_VICE2_IMD_0_1_REG_END 0x2080187c ++#define BCHP_VICE2_MAU_0_1_REG_START 0x20801c00 ++#define BCHP_VICE2_MAU_0_1_REG_END 0x20801d28 ++#define BCHP_VICE2_MC_0_1_REG_START 0x20802000 ++#define BCHP_VICE2_MC_0_1_REG_END 0x2080208c ++#define BCHP_VICE2_SG_0_1_REG_START 0x20802400 ++#define BCHP_VICE2_SG_0_1_REG_END 0x208025e4 ++#define BCHP_VICE2_VIP_0_1_REG_START 0x20802800 ++#define BCHP_VICE2_VIP_0_1_REG_END 0x20802a24 ++#define BCHP_VICE2_VIP1_0_1_REG_START 0x20802c00 ++#define BCHP_VICE2_VIP1_0_1_REG_END 0x20802e24 ++#define BCHP_VICE2_VIP2_0_1_REG_START 0x20803000 ++#define BCHP_VICE2_VIP2_0_1_REG_END 0x20803224 ++#define BCHP_VICE2_VIP3_0_1_REG_START 0x20803400 ++#define BCHP_VICE2_VIP3_0_1_REG_END 0x20803624 ++#define BCHP_VICE2_XQ_0_1_REG_START 0x20804000 ++#define BCHP_VICE2_XQ_0_1_REG_END 0x20805338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_1_REG_START 0x20818000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_1_REG_END 0x208182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_1_REG_START 0x20820000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_1_REG_END 0x208200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_1_REG_START 0x20820400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_1_REG_END 0x2082042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_1_REG_START 0x20820600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_1_REG_END 0x2082062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_1_REG_START 0x20822000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_1_REG_END 0x208233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_1_REG_START 0x20830000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_1_REG_END 0x2083fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_1_REG_START 0x20858000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_1_REG_END 0x208582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_1_REG_START 0x20860000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_1_REG_END 0x208600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_1_REG_START 0x20860400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_1_REG_END 0x2086042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_1_REG_START 0x20860600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_1_REG_END 0x2086062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_1_REG_START 0x20862000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_1_REG_END 0x208633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_1_REG_START 0x20870000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_1_REG_END 0x2087fffc ++#define BCHP_VICE2_RGR_1_REG_START 0x20880000 ++#define BCHP_VICE2_RGR_1_REG_END 0x2088000c ++#define BCHP_VICE2_MISC_1_REG_START 0x20881000 ++#define BCHP_VICE2_MISC_1_REG_END 0x20881050 ++#define BCHP_VICE2_L2_1_REG_START 0x20881100 ++#define BCHP_VICE2_L2_1_REG_END 0x2088112c ++#define BCHP_VICE2_ARCSS_MISC_1_REG_START 0x20882000 ++#define BCHP_VICE2_ARCSS_MISC_1_REG_END 0x208820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x20900000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x20900080 ++#define BCHP_VICE2_SEC_CTRL_1_REG_START 0x20901000 ++#define BCHP_VICE2_SEC_CTRL_1_REG_END 0x20901080 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x20a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x20a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x20a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x20a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x20a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x20a001fc ++#define BCHP_XPT_PMU_REG_START 0x20a00200 ++#define BCHP_XPT_PMU_REG_END 0x20a00218 ++#define BCHP_XPT_GR_REG_START 0x20a00300 ++#define BCHP_XPT_GR_REG_END 0x20a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x20a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x20a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x20a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x20a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x20a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x20a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x20a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x20a02074 ++#define BCHP_XPT_DPCR1_REG_START 0x20a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x20a020f4 ++#define BCHP_XPT_DPCR2_REG_START 0x20a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x20a02174 ++#define BCHP_XPT_DPCR3_REG_START 0x20a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x20a021f4 ++#define BCHP_XPT_DPCR4_REG_START 0x20a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x20a02274 ++#define BCHP_XPT_DPCR5_REG_START 0x20a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x20a022f4 ++#define BCHP_XPT_DPCR6_REG_START 0x20a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x20a02374 ++#define BCHP_XPT_DPCR7_REG_START 0x20a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x20a023f4 ++#define BCHP_XPT_DPCR8_REG_START 0x20a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x20a02474 ++#define BCHP_XPT_DPCR9_REG_START 0x20a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x20a024f4 ++#define BCHP_XPT_DPCR10_REG_START 0x20a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x20a02574 ++#define BCHP_XPT_DPCR11_REG_START 0x20a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x20a025f4 ++#define BCHP_XPT_DPCR12_REG_START 0x20a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x20a02674 ++#define BCHP_XPT_DPCR13_REG_START 0x20a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x20a026f4 ++#define BCHP_XPT_DPCR_PP_REG_START 0x20a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x20a02804 ++#define BCHP_XPT_PSUB_REG_START 0x20a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x20a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x20a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x20a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x20a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x20a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x20a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x20a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x20a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x20a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x20a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x20a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x20a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x20a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x20a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x20a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x20a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x20a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x20a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x20a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x20a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x20a14050 ++#define BCHP_XPT_FE_REG_START 0x20a20000 ++#define BCHP_XPT_FE_REG_END 0x20a25ffc ++#define BCHP_XPT_MSG_REG_START 0x20a30000 ++#define BCHP_XPT_MSG_REG_END 0x20a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x20a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x20a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x20a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x20a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x20a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x20a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x20a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x20a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x20a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x20a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x20a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x20a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x20a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x20a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x20a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x20a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x20a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x20a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x20a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x20a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x20a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x20a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x20a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x20a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x20a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x20a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x20a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x20a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x20a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x20a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x20a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x20a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x20a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x20a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x20a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x20a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x20a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x20a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x20a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x20a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x20a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x20a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x20a40000 ++#define BCHP_XPT_RAVE_REG_END 0x20a4e174 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x20a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x20a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x20a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x20a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x20a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x20a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x20a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x20a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x20a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x20a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x20a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x20a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x20a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x20a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x20a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x20a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x20a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x20a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x20a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x20a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x20a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x20a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x20a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x20a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x20a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x20a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x20a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x20a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x20a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x20a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x20a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x20a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x20a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x20a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x20a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x20a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x20a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x20a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x20a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x20a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x20a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x20a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x20a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x20a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x20a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x20a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x20a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x20a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x20a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x20a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x20a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x20a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x20a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x20a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x20a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x20a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x20a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x20a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x20a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x20a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x20a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x20a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x20a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x20a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x20a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x20a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x20a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x20a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x20a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x20a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x20a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x20a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x20a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x20a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x20a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x20a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x20a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x20a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x20a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x20a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x20a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x20a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x20a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x20a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x20a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x20a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x20a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x20a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x20a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x20a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x20a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x20a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x20a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x20a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x20a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x20a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x20a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x20a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x20a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x20a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x20a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x20a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x20a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x20a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x20a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x20a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x20a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x20a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x20a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x20a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x20a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x20a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x20a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x20a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x20a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x20a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x20a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x20a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x20a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x20a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x20a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x20a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x20a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x20a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x20a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x20a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x20a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x20a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x20a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x20a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x20a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x20a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x20a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x20a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x20a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x20a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x20a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x20a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x20a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x20a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x20a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x20a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x20a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x20a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x20a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x20a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x20a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x20a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x20a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x20a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x20a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x20a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x20a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x20a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x20a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x20a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x20a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x20a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x20a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x20a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x20a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x20a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x20a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x20a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x20a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x20a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x20a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x20a69068 ++#define BCHP_XPT_WDMA_RAMS_REG_START 0x20a6a000 ++#define BCHP_XPT_WDMA_RAMS_REG_END 0x20a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x20a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x20a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x20a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x20a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x20a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x20a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x20a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x20a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x20a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x20a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x20a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x20a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x20a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x20a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x20a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x20a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x20a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x20a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x20a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x20a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x20a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x20a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x20a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x20a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x20a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x20a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x20a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x20a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x20a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x20a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x20a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x20a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x20a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x20a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x20a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x20a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x20a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x20a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x20a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x20a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x20a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x20a704ac ++#define BCHP_XPT_MCPB_REG_START 0x20a70800 ++#define BCHP_XPT_MCPB_REG_END 0x20a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x20a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x20a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x20a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x20a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x20a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x20a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x20a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x20a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x20a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x20a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x20a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x20a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x20a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x20a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x20a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x20a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x20a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x20a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x20a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x20a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x20a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x20a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x20a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x20a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x20a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x20a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x20a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x20a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x20a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x20a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x20a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x20a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x20a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x20a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x20a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x20a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x20a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x20a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x20a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x20a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x20a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x20a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x20a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x20a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x20a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x20a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x20a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x20a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x20a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x20a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x20a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x20a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x20a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x20a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x20a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x20a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x20a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x20a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x20a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x20a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x20a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x20a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x20a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x20a74b5c ++#define BCHP_XPT_XPU_REG_START 0x20a78000 ++#define BCHP_XPT_XPU_REG_END 0x20a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x20a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x20a7f000 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x20a80200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x20a80204 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_START 0x20a80300 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_END 0x20a80304 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x20a81000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x20a81fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x20a82000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x20a837fc ++#define BCHP_SID_REG_START 0x20bc0100 ++#define BCHP_SID_REG_END 0x20bc019c ++#define BCHP_SID_RLE_REG_START 0x20bc0300 ++#define BCHP_SID_RLE_REG_END 0x20bc039c ++#define BCHP_SID_DQ_REG_START 0x20bc0400 ++#define BCHP_SID_DQ_REG_END 0x20bc04bc ++#define BCHP_SID_STRM_REG_START 0x20bc0800 ++#define BCHP_SID_STRM_REG_END 0x20bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x20bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x20bc0c40 ++#define BCHP_SID_ARC_REG_START 0x20bc0f00 ++#define BCHP_SID_ARC_REG_END 0x20bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x20bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x20bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x20bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x20bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x20bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x20bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x20bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x20bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x20bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x20bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x20bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x20bc39fc ++#define BCHP_SID_SYMB_REG_START 0x20bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x20bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x20bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x20bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x20bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x20bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x20bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x20bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x20bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x20bd5014 ++#define BCHP_SID_GR_REG_START 0x20be0000 ++#define BCHP_SID_GR_REG_END 0x20be000c ++#define BCHP_SID_L2_REG_START 0x20be0100 ++#define BCHP_SID_L2_REG_END 0x20be012c ++#define BCHP_SICH_REG_START 0x20be2000 ++#define BCHP_SICH_REG_END 0x20be203c ++#define BCHP_M2MC_REG_START 0x20be4000 ++#define BCHP_M2MC_REG_END 0x20be47fc ++#define BCHP_M2MC_L2_REG_START 0x20be5000 ++#define BCHP_M2MC_L2_REG_END 0x20be502c ++#define BCHP_M2MC_GR_REG_START 0x20be5800 ++#define BCHP_M2MC_GR_REG_END 0x20be580c ++#define BCHP_M2MC1_REG_START 0x20be6000 ++#define BCHP_M2MC1_REG_END 0x20be67fc ++#define BCHP_M2MC1_L2_REG_START 0x20be7000 ++#define BCHP_M2MC1_L2_REG_END 0x20be702c ++#define BCHP_M2MC1_GR_REG_START 0x20be7800 ++#define BCHP_M2MC1_GR_REG_END 0x20be780c ++#define BCHP_V3D_CTL_REG_START 0x20bea000 ++#define BCHP_V3D_CTL_REG_END 0x20bea040 ++#define BCHP_V3D_CLE_REG_START 0x20bea100 ++#define BCHP_V3D_CLE_REG_END 0x20bea138 ++#define BCHP_V3D_PTB_REG_START 0x20bea300 ++#define BCHP_V3D_PTB_REG_END 0x20bea310 ++#define BCHP_V3D_QPS_REG_START 0x20bea400 ++#define BCHP_V3D_QPS_REG_END 0x20bea43c ++#define BCHP_V3D_VPM_REG_START 0x20bea500 ++#define BCHP_V3D_VPM_REG_END 0x20bea504 ++#define BCHP_V3D_PCTR_REG_START 0x20bea600 ++#define BCHP_V3D_PCTR_REG_END 0x20bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x20bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x20bea80c ++#define BCHP_V3D_GCA_REG_START 0x20beaa00 ++#define BCHP_V3D_GCA_REG_END 0x20beaa64 ++#define BCHP_V3D_DBG_REG_START 0x20beae00 ++#define BCHP_V3D_DBG_REG_END 0x20beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x20bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x20bf0000 ++#define BCHP_RAAGA_DSP_SEC0_1_REG_START 0x20bf1000 ++#define BCHP_RAAGA_DSP_SEC0_1_REG_END 0x20bf1000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x20c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x20c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x20c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x20c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x20c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x20c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x20c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x20c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x20c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x20c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x20c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x20c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x20c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x20c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x20c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x20c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x20c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x20c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x20c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x20c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x20c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x20c3bffc ++#define BCHP_AUD_MISC_REG_START 0x20c80000 ++#define BCHP_AUD_MISC_REG_END 0x20c80120 ++#define BCHP_AUD_INTH_REG_START 0x20c80800 ++#define BCHP_AUD_INTH_REG_END 0x20c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x20ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x20ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x20ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x20ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x20ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x20ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x20ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x20ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x20ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x20ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x20ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x20ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x20cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x20cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_START 0x20cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_END 0x20cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x20cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x20cb0284 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_START 0x20cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_END 0x20cb0384 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x20cb0400 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x20cb04b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x20cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x20cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x20cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x20cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x20cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x20cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x20cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x20cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x20cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x20cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x20cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x20cb0e88 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_START 0x20cb0f00 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_END 0x20cb0f88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x20cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x20cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x20cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x20cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x20cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x20cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x20cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x20cb1330 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x20cb1400 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x20cb1430 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_START 0x20cb1500 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_END 0x20cb1530 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_START 0x20cb1600 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_END 0x20cb1630 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x20cb1800 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x20cb1924 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x20cb1a00 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x20cb1a5c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x20cb2000 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x20cb20fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x20cb2800 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x20cb28ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x20cb3000 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x20cb3064 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x20cb3100 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x20cb3164 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x20cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x20cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x20cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x20cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x20cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x20cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x20cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x20cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x20cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x20cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x20cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x20cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x20cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x20cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x20cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x20cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x20cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x20cbc154 ++#define BCHP_RAAGA_DSP_RGR_1_REG_START 0x20d00000 ++#define BCHP_RAAGA_DSP_RGR_1_REG_END 0x20d00008 ++#define BCHP_RAAGA_DSP_MISC_1_REG_START 0x20d20000 ++#define BCHP_RAAGA_DSP_MISC_1_REG_END 0x20d2044c ++#define BCHP_RAAGA_DSP_TIMERS_1_REG_START 0x20d21000 ++#define BCHP_RAAGA_DSP_TIMERS_1_REG_END 0x20d21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_1_REG_START 0x20d21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_1_REG_END 0x20d2109c ++#define BCHP_RAAGA_DSP_PERI_SW_1_REG_START 0x20d21100 ++#define BCHP_RAAGA_DSP_PERI_SW_1_REG_END 0x20d21154 ++#define BCHP_RAAGA_DSP_DMA_1_REG_START 0x20d21400 ++#define BCHP_RAAGA_DSP_DMA_1_REG_END 0x20d21664 ++#define BCHP_RAAGA_DSP_ESR_SI_1_REG_START 0x20d22000 ++#define BCHP_RAAGA_DSP_ESR_SI_1_REG_END 0x20d22014 ++#define BCHP_RAAGA_DSP_INTH_1_REG_START 0x20d22200 ++#define BCHP_RAAGA_DSP_INTH_1_REG_END 0x20d2222c ++#define BCHP_RAAGA_DSP_FW_INTH_1_REG_START 0x20d22400 ++#define BCHP_RAAGA_DSP_FW_INTH_1_REG_END 0x20d2242c ++#define BCHP_RAAGA_DSP_FW_CFG_1_REG_START 0x20d23000 ++#define BCHP_RAAGA_DSP_FW_CFG_1_REG_END 0x20d2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_1_REG_START 0x20d30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_1_REG_END 0x20d3bffc ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_START 0x20e00000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_END 0x20e1fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_START 0x20e20000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_END 0x20e3fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_START 0x20e40000 ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_END 0x20e47ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_START 0x20e50000 ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_END 0x20e500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_START 0x20e51000 ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_END 0x20e51a08 ++#define BCHP_RF4CE_CPU_UART_REG_START 0x20e52000 ++#define BCHP_RF4CE_CPU_UART_REG_END 0x20e52ffc ++#define BCHP_RF4CE_CPU_WDG_REG_START 0x20e53000 ++#define BCHP_RF4CE_CPU_WDG_REG_END 0x20e53ffc ++#define BCHP_RF4CE_CPU_CTRL_REG_START 0x20e80000 ++#define BCHP_RF4CE_CPU_CTRL_REG_END 0x20e8008c ++#define BCHP_RF4CE_CPU_L2_REG_START 0x20e80300 ++#define BCHP_RF4CE_CPU_L2_REG_END 0x20e80314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_START 0x20e80500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_END 0x20e8052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_START 0x20e80800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_END 0x20e8082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_START 0x20e80a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_END 0x20e80a2c ++#define BCHP_TX_REG_START 0x20ec0000 ++#define BCHP_TX_REG_END 0x20ec0020 ++#define BCHP_RX_REG_START 0x20ed0000 ++#define BCHP_RX_REG_END 0x20ed01e0 ++#define BCHP_RF_REG_START 0x20ee0000 ++#define BCHP_RF_REG_END 0x20ee0098 ++#define BCHP_VCOCAL_REG_START 0x20ee0100 ++#define BCHP_VCOCAL_REG_END 0x20ee0174 ++#define BCHP_KVCO_REG_START 0x20ee0200 ++#define BCHP_KVCO_REG_END 0x20ee0224 ++#define BCHP_PA_REG_START 0x20ee0300 ++#define BCHP_PA_REG_END 0x20ee0314 ++#define BCHP_MAC_REG_START 0x20ee0400 ++#define BCHP_MAC_REG_END 0x20ee0564 ++#define BCHP_PWR_MGT_L2_REG_START 0x20ee0600 ++#define BCHP_PWR_MGT_L2_REG_END 0x20ee0614 ++#define BCHP_MISC_L2_REG_START 0x20ee0700 ++#define BCHP_MISC_L2_REG_END 0x20ee0714 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_START 0x20ee0800 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_END 0x20ee0814 ++#define BCHP_SYMCNT6_L2_REG_START 0x20ee0900 ++#define BCHP_SYMCNT6_L2_REG_END 0x20ee0914 ++#define BCHP_TX_DONE_L2_REG_START 0x20ee0a00 ++#define BCHP_TX_DONE_L2_REG_END 0x20ee0a14 ++#define BCHP_RX_DONE_L2_REG_START 0x20ee0b00 ++#define BCHP_RX_DONE_L2_REG_END 0x20ee0b14 ++#define BCHP_RX_START_L2_REG_START 0x20ee0c00 ++#define BCHP_RX_START_L2_REG_END 0x20ee0c14 ++#define BCHP_SYMCNT7_L2_REG_START 0x20ee0d00 ++#define BCHP_SYMCNT7_L2_REG_END 0x20ee0d14 ++#define BCHP_GCI_0_REG_START 0x20ee1000 ++#define BCHP_GCI_0_REG_END 0x20ee120c ++#define BCHP_GCI_1_REG_START 0x20ee1400 ++#define BCHP_GCI_1_REG_END 0x20ee1604 ++#define BCHP_GCI_2_REG_START 0x20ee1800 ++#define BCHP_GCI_2_REG_END 0x20ee1a04 ++#define BCHP_USB_CAPS_REG_START 0x21000000 ++#define BCHP_USB_CAPS_REG_END 0x2100002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x21000100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x2100010c ++#define BCHP_USB_INTR2_REG_START 0x21000180 ++#define BCHP_USB_INTR2_REG_END 0x210001ac ++#define BCHP_USB_CTRL_REG_START 0x21000200 ++#define BCHP_USB_CTRL_REG_END 0x210002b4 ++#define BCHP_USB_EHCI_REG_START 0x21000300 ++#define BCHP_USB_EHCI_REG_END 0x210003a4 ++#define BCHP_USB_OHCI_REG_START 0x21000400 ++#define BCHP_USB_OHCI_REG_END 0x21000454 ++#define BCHP_USB_XHCI_REG_START 0x21001000 ++#define BCHP_USB_XHCI_REG_END 0x210018c4 ++#define BCHP_USB_XHCI_EC_REG_START 0x21001940 ++#define BCHP_USB_XHCI_EC_REG_END 0x21001ffc ++#define BCHP_SATA0_GRB_REG_START 0x21008000 ++#define BCHP_SATA0_GRB_REG_END 0x2100800c ++#define BCHP_SATA0_TOP_CTRL_REG_START 0x21008040 ++#define BCHP_SATA0_TOP_CTRL_REG_END 0x21008060 ++#define BCHP_SATA0_INTR2_REG_START 0x21008080 ++#define BCHP_SATA0_INTR2_REG_END 0x210080ac ++#define BCHP_SATA0_PORT0_PCB_REG_START 0x21008100 ++#define BCHP_SATA0_PORT0_PCB_REG_END 0x21008ffc ++#define BCHP_SATA0_AHCI_GHC_REG_START 0x2100a000 ++#define BCHP_SATA0_AHCI_GHC_REG_END 0x2100a028 ++#define BCHP_SATA0_GLOBAL_RESERVED_REG_START 0x2100a02c ++#define BCHP_SATA0_GLOBAL_RESERVED_REG_END 0x2100a09c ++#define BCHP_SATA0_PORT0_AHCI_S1_REG_START 0x2100a100 ++#define BCHP_SATA0_PORT0_AHCI_S1_REG_END 0x2100a11c ++#define BCHP_SATA0_PORT0_AHCI_S2_REG_START 0x2100a120 ++#define BCHP_SATA0_PORT0_AHCI_S2_REG_END 0x2100a134 ++#define BCHP_SATA0_PORT0_AHCI_S3_REG_START 0x2100a138 ++#define BCHP_SATA0_PORT0_AHCI_S3_REG_END 0x2100a17c ++#define BCHP_SATA0_AHCI_PCICFG_REG_START 0x2100a600 ++#define BCHP_SATA0_AHCI_PCICFG_REG_END 0x2100a664 ++#define BCHP_SATA0_PORT0_CTRL_REG_START 0x2100a700 ++#define BCHP_SATA0_PORT0_CTRL_REG_END 0x2100a730 ++#define BCHP_SATA0_PORT0_CJPAT_REG_START 0x2100a740 ++#define BCHP_SATA0_PORT0_CJPAT_REG_END 0x2100a764 ++#define BCHP_SATA0_LEG_PCICFG_REG_START 0x2100a800 ++#define BCHP_SATA0_LEG_PCICFG_REG_END 0x2100a880 ++#define BCHP_SATA0_PORT0_LEG_S1_REG_START 0x2100a900 ++#define BCHP_SATA0_PORT0_LEG_S1_REG_END 0x2100a934 ++#define BCHP_SATA0_PORT0_LEG_S2_REG_START 0x2100a940 ++#define BCHP_SATA0_PORT0_LEG_S2_REG_END 0x2100a954 ++#define BCHP_SATA0_PORT0_LEG_S3_REG_START 0x2100a958 ++#define BCHP_SATA0_PORT0_LEG_S3_REG_END 0x2100a998 ++#define BCHP_USB1_CAPS_REG_START 0x21010000 ++#define BCHP_USB1_CAPS_REG_END 0x2101002c ++#define BCHP_USB1_INTR2_REG_START 0x21010180 ++#define BCHP_USB1_INTR2_REG_END 0x210101ac ++#define BCHP_USB1_CTRL_REG_START 0x21010200 ++#define BCHP_USB1_CTRL_REG_END 0x210102b4 ++#define BCHP_USB1_EHCI_REG_START 0x21010300 ++#define BCHP_USB1_EHCI_REG_END 0x210103a4 ++#define BCHP_USB1_OHCI_REG_START 0x21010400 ++#define BCHP_USB1_OHCI_REG_END 0x21010454 ++#define BCHP_USB1_XHCI_REG_START 0x21011000 ++#define BCHP_USB1_XHCI_REG_END 0x210118c4 ++#define BCHP_USB1_XHCI_EC_REG_START 0x21011940 ++#define BCHP_USB1_XHCI_EC_REG_END 0x21011ffc ++#define BCHP_SATA1_GRB_REG_START 0x21018000 ++#define BCHP_SATA1_GRB_REG_END 0x2101800c ++#define BCHP_SATA1_TOP_CTRL_REG_START 0x21018040 ++#define BCHP_SATA1_TOP_CTRL_REG_END 0x21018060 ++#define BCHP_SATA1_INTR2_REG_START 0x21018080 ++#define BCHP_SATA1_INTR2_REG_END 0x210180ac ++#define BCHP_SATA1_PORT0_PCB_REG_START 0x21018100 ++#define BCHP_SATA1_PORT0_PCB_REG_END 0x21018ffc ++#define BCHP_SATA1_AHCI_GHC_REG_START 0x2101a000 ++#define BCHP_SATA1_AHCI_GHC_REG_END 0x2101a028 ++#define BCHP_SATA1_GLOBAL_RESERVED_REG_START 0x2101a02c ++#define BCHP_SATA1_GLOBAL_RESERVED_REG_END 0x2101a09c ++#define BCHP_SATA1_PORT0_AHCI_S1_REG_START 0x2101a100 ++#define BCHP_SATA1_PORT0_AHCI_S1_REG_END 0x2101a11c ++#define BCHP_SATA1_PORT0_AHCI_S2_REG_START 0x2101a120 ++#define BCHP_SATA1_PORT0_AHCI_S2_REG_END 0x2101a134 ++#define BCHP_SATA1_PORT0_AHCI_S3_REG_START 0x2101a138 ++#define BCHP_SATA1_PORT0_AHCI_S3_REG_END 0x2101a17c ++#define BCHP_SATA1_AHCI_PCICFG_REG_START 0x2101a600 ++#define BCHP_SATA1_AHCI_PCICFG_REG_END 0x2101a664 ++#define BCHP_SATA1_PORT0_CTRL_REG_START 0x2101a700 ++#define BCHP_SATA1_PORT0_CTRL_REG_END 0x2101a730 ++#define BCHP_SATA1_PORT0_CJPAT_REG_START 0x2101a740 ++#define BCHP_SATA1_PORT0_CJPAT_REG_END 0x2101a764 ++#define BCHP_SATA1_LEG_PCICFG_REG_START 0x2101a800 ++#define BCHP_SATA1_LEG_PCICFG_REG_END 0x2101a880 ++#define BCHP_SATA1_PORT0_LEG_S1_REG_START 0x2101a900 ++#define BCHP_SATA1_PORT0_LEG_S1_REG_END 0x2101a934 ++#define BCHP_SATA1_PORT0_LEG_S2_REG_START 0x2101a940 ++#define BCHP_SATA1_PORT0_LEG_S2_REG_END 0x2101a954 ++#define BCHP_SATA1_PORT0_LEG_S3_REG_START 0x2101a958 ++#define BCHP_SATA1_PORT0_LEG_S3_REG_END 0x2101a998 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x21080000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x2108003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x21080048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x2108004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x210800ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x210800e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x21080100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x21080134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x21080160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x21080178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x21080180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x210801a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x21080404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x21080418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x21080428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x21080630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x21080800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x21080998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x21081000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x21081424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x21081800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x21081e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x21084000 ++#define BCHP_PCIE_0_MISC_REG_END 0x210840c8 ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x21084100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x21084104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x21084200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x21084204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x21084300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x2108432c ++#define BCHP_PCIE_0_DMA_REG_START 0x21084400 ++#define BCHP_PCIE_0_DMA_REG_END 0x2108446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x21088000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x21089008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x21089200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x21089210 ++#define BCHP_PCIE_0_RG_REG_START 0x21089300 ++#define BCHP_PCIE_0_RG_REG_END 0x2108930c ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x21090000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x2109003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x21090048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x2109004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x210900ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x210900e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x21090100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x21090134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x21090160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x21090178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x21090180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x210901a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x21090404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x21090418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x21090428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x21090630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x21090800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x21090998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x21091000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x21091424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x21091800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x21091e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x21094000 ++#define BCHP_PCIE_1_MISC_REG_END 0x210940c8 ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x21094100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x21094104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x21094200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x21094204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x21094300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x2109432c ++#define BCHP_PCIE_1_DMA_REG_START 0x21094400 ++#define BCHP_PCIE_1_DMA_REG_END 0x2109446c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x21098000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x21099008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x21099200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x21099210 ++#define BCHP_PCIE_1_RG_REG_START 0x21099300 ++#define BCHP_PCIE_1_RG_REG_END 0x2109930c ++#define BCHP_G2U_REGS_REG_START 0x210a0000 ++#define BCHP_G2U_REGS_REG_END 0x210a0030 ++#define BCHP_WEBHIF_RGR_REG_START 0x210b0000 ++#define BCHP_WEBHIF_RGR_REG_END 0x210b0010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x210b0100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x210b012c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x210b0600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x210b064c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x210b0700 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x210b074c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x210b0800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x210b081c ++#define BCHP_WEBHIF_TIMER_REG_START 0x210b0900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x210b093c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x210b0a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x210b0a00 ++#define BCHP_RG_PM_REG_START 0x210b0e00 ++#define BCHP_RG_PM_REG_END 0x210b0e1c ++#define BCHP_PMBM_REG_START 0x210b0f00 ++#define BCHP_PMBM_REG_END 0x210b0f0c ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x210b1000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x210b102c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x210b2000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x210b202c ++#define BCHP_DATA_MEM_REG_START 0x21200000 ++#define BCHP_DATA_MEM_REG_END 0x21247ffc ++#define BCHP_CNTL_MEM_REG_START 0x21320000 ++#define BCHP_CNTL_MEM_REG_END 0x21367ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x213c0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x213c0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x213c0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x213c0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x213c0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x213c0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x213c0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x213c0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x213c0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x213c0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x213c0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x213c0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x213c0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x213c0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x213c0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x213c0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x213c0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x213c0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x213c0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x213c0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x213c00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x213c00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x213c00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x213c00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x213c00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x213c00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x213c00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x213c00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x213c00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x213c00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x213c00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x213c00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x213c0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x213c0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x213c0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x213c0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x213c0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x213c0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x213c0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x213c0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x213c0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x213c0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x213c4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x213c4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x213c4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x213c4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x213c4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x213c4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x213c4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x213c4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x213c4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x213c4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x213c4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x213c4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x213c4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x213c4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x213c4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x213c4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x213c4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x213c4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x213c4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x213c4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x213c40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x213c40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x213c40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x213c40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x213c40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x213c40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x213c40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x213c40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x213c40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x213c40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x213c40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x213c40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x213c4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x213c4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x213c4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x213c4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x213c4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x213c4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x213c4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x213c4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x213c4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x213c4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x213c4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x213c4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x213c4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x213c4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x213c4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x213c4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x213c4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x213c4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x213c4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x213c4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x213c4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x213c4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x213c4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x213c4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x213c4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x213c4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x213c4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x213c4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x213c4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x213c4c00 ++#define BCHP_MAC_AHB_REG_START 0x213c5000 ++#define BCHP_MAC_AHB_REG_END 0x213c500c ++#define BCHP_LLM_AHB_REG_START 0x213c8000 ++#define BCHP_LLM_AHB_REG_END 0x213c805c ++#define BCHP_PHY_REG_START 0x213e0000 ++#define BCHP_PHY_REG_END 0x213e47fc ++#define BCHP_ECL_REG_START 0x213e8000 ++#define BCHP_ECL_REG_END 0x213ecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x213ed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x213ed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x213ed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x213ed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x213ed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x213ed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x213ed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x213ed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x213ed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x213ed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x213ed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x213ed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x213ed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x213ed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x213ed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x213ed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x213ed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x213ed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x213ed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x213ed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x213ed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x213ed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x213ed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x213ed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x213ed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x213ed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x213ed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x213ed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x213ed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x213ed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x213ed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x213ed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x213ed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x213ed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x213ed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x213ed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x213ed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x213ed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x213ed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x213ed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x213ed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x213ed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x213ed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x213ed828 ++#define BCHP_GMII_REG_START 0x213edc00 ++#define BCHP_GMII_REG_END 0x213edc58 ++#define BCHP_MAC_APB_REG_START 0x213f0000 ++#define BCHP_MAC_APB_REG_END 0x213f14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x213f4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x213f4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x213f4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x213f406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x213f4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x213f40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x213f40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x213f40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x213f4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x213f412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x213f4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x213f416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x213f4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x213f41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x213f41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x213f41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x213f4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x213f422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x213f4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x213f426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x213f4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x213f42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x213f42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x213f42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x213f4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x213f432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x213f4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x213f436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x213f4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x213f43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x213f43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x213f43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x213f4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x213f442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x213f4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x213f446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x213f4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x213f44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x213f44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x213f44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x213f4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x213f452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x213f4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x213f4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x213f4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x213f486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x213f4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x213f48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x213f48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x213f48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x213f4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x213f492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x213f4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x213f496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x213f4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x213f49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x213f49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x213f49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x213f4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x213f4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x213f6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x213f6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x213f6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x213f6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x213f6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x213f6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x213f8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x213f8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x213f8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x213f8d84 ++#define BCHP_LLM_APB_REG_START 0x213fc000 ++#define BCHP_LLM_APB_REG_END 0x213fd00c ++#define BCHP_TRX_REG_START 0x213fe000 ++#define BCHP_TRX_REG_END 0x213fe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x213fe400 ++#define BCHP_MOCA_TIMER_REG_END 0x213fe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x213fe800 ++#define BCHP_MOCA_GPIO_REG_END 0x213fe818 ++#define BCHP_EXTRAS_REG_START 0x213fec00 ++#define BCHP_EXTRAS_REG_END 0x213fed18 ++#define BCHP_MOCA_BSC_REG_START 0x213ff000 ++#define BCHP_MOCA_BSC_REG_END 0x213ff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x213ffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x213ffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x213ffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x213ffc2c ++#define BCHP_MOCA_L2_REG_START 0x213ffc40 ++#define BCHP_MOCA_L2_REG_END 0x213ffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x213ffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x213ffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x213ffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x213ffd9c ++#define BCHP_MEMC_GEN_0_REG_START 0x21500000 ++#define BCHP_MEMC_GEN_0_REG_END 0x215007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x21500800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x215008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x21500a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x21500afc ++#define BCHP_MEMC_ARC_0_REG_START 0x21500c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x21500f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x21501000 ++#define BCHP_MEMC_ARB_0_REG_END 0x215014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x21502000 ++#define BCHP_MEMC_DDR_0_REG_END 0x215027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x21503000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x21503044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x21503200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x21503244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x21503400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x21503444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x21503800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x215039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x21504000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x21504010 ++#define BCHP_MEMC_MISC_0_REG_START 0x21505000 ++#define BCHP_MEMC_MISC_0_REG_END 0x21505010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x21506000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x21506218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x21506400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x21506518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x21506600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x21506718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x21506800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x21506918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x21506a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x21506b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x21506c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x21506d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x21508000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x215080e0 ++#define BCHP_MEMC_UBUS_0_REG_START 0x21509000 ++#define BCHP_MEMC_UBUS_0_REG_END 0x215094dc ++#define BCHP_MEMC_ATW_UBUS_0_REG_START 0x21509800 ++#define BCHP_MEMC_ATW_UBUS_0_REG_END 0x215099e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x21540000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x2157fffc ++#define BCHP_MEMC_GEN_1_REG_START 0x21580000 ++#define BCHP_MEMC_GEN_1_REG_END 0x215807fc ++#define BCHP_MEMC_EDIS_1_0_REG_START 0x21580800 ++#define BCHP_MEMC_EDIS_1_0_REG_END 0x215808fc ++#define BCHP_MEMC_EDIS_1_1_REG_START 0x21580a00 ++#define BCHP_MEMC_EDIS_1_1_REG_END 0x21580afc ++#define BCHP_MEMC_ARC_1_REG_START 0x21580c00 ++#define BCHP_MEMC_ARC_1_REG_END 0x21580f74 ++#define BCHP_MEMC_ARB_1_REG_START 0x21581000 ++#define BCHP_MEMC_ARB_1_REG_END 0x215814cc ++#define BCHP_MEMC_DDR_1_REG_START 0x21582000 ++#define BCHP_MEMC_DDR_1_REG_END 0x215827fc ++#define BCHP_MEMC_L2_1_0_REG_START 0x21583000 ++#define BCHP_MEMC_L2_1_0_REG_END 0x21583044 ++#define BCHP_MEMC_L2_1_1_REG_START 0x21583200 ++#define BCHP_MEMC_L2_1_1_REG_END 0x21583244 ++#define BCHP_MEMC_L2_1_2_REG_START 0x21583400 ++#define BCHP_MEMC_L2_1_2_REG_END 0x21583444 ++#define BCHP_MEMC_TRACELOG_0_1_REG_START 0x21583800 ++#define BCHP_MEMC_TRACELOG_0_1_REG_END 0x215839fc ++#define BCHP_MEMC_RGRB_1_REG_START 0x21584000 ++#define BCHP_MEMC_RGRB_1_REG_END 0x21584010 ++#define BCHP_MEMC_MISC_1_REG_START 0x21585000 ++#define BCHP_MEMC_MISC_1_REG_END 0x21585010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_START 0x21586000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_END 0x21586218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_START 0x21586400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_END 0x21586518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_START 0x21586600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_END 0x21586718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_START 0x21586800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_END 0x21586918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_START 0x21586a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_END 0x21586b18 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_START 0x21586c00 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_END 0x21586d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_START 0x21588000 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_END 0x215880e0 ++#define BCHP_MEMC_UBUS_1_REG_START 0x21589000 ++#define BCHP_MEMC_UBUS_1_REG_END 0x215894dc ++#define BCHP_MEMC_ATW_UBUS_1_REG_START 0x21589800 ++#define BCHP_MEMC_ATW_UBUS_1_REG_END 0x215899e0 ++#define BCHP_MEMC_SENTINEL_0_1_REG_START 0x215c0000 ++#define BCHP_MEMC_SENTINEL_0_1_REG_END 0x215ffffc ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_SLOWBVB ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_SLOWBVB :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_SLOWBVB_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_SLOWBVB_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B_NODCD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B_NODCD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_DCXG_BVB_X ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_DCXG_BVB_X :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DCXG_BVB_X_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DCXG_BVB_X_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_VSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_VSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7145b0/bchp_usb_ctrl.h b/include/linux/brcmstb/7145b0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..ba324bdc +--- /dev/null ++++ b/include/linux/brcmstb/7145b0/bchp_usb_ctrl.h +@@ -0,0 +1,1490 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Sep 3 12:36:32 2014 ++ * Full Compile MD5 Checksum 1e5d73e2e037f01f6ffd5061d00a97a7 ++ * (minus title and desc) ++ * MD5 Checksum c8f174845d8a27ef5365467f1c7a712b ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008005 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x21000200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x21000204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x21000208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x2100020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x21000210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x21000214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x21000218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x2100021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x21000220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x21000224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x21000228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x2100022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x21000230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x21000234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x21000238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x2100023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x21000240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x21000244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x21000248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x2100024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x21000250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x21000254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x21000258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x2100025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x21000260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x21000264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x21000268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x2100026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x21000270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x21000274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x21000278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x2100027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x210002a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x210002a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x210002a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x210002ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x210002b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x210002b4 /* SCB2 extn start and end address */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC_DISABLE [31:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [25:19] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x03f80000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [16:16] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [12:12] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_device_sel [11:11] */ ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_MASK 0x00000800 ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_SHIFT 11 ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_soft_reset_bcm6xxx [10:10] */ ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_MASK 0x00000400 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE3 [25:12] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE3_MASK 0x03fff000 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE3_SHIFT 12 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb30phy_tm_psel [11:11] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_tm_psel_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_tm_psel_SHIFT 11 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_tm_psel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb30phy_testmode [10:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_testmode_MASK 0x00000400 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_testmode_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb30phy_testmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ohci_memreq_disable [08:08] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_SHIFT 8 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [07:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:22] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xffc00000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 22 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [21:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [29:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x3fffffe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:08] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffffff00 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 8 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [07:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x000000ff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xffe00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: xhc_soft_resetb [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000f ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x0000000c ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x0000001b ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7250b0/bchp_common.h b/include/linux/brcmstb/7250b0/bchp_common.h +new file mode 100644 +index 00000000..95ed1f24 +--- /dev/null ++++ b/include/linux/brcmstb/7250b0/bchp_common.h +@@ -0,0 +1,3975 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Nov 19 03:12:34 2014 ++ * Full Compile MD5 Checksum 090c477e923b422fcfb8d82b056c5fac ++ * (minus title and desc) ++ * MD5 Checksum 3f553d4cd3bba7438ffdad1405cbf563 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7250_B0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00100000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x01273400 /* DEMOD_XPT_FE is last */ ++#define BCHP_REGISTER_SIZE 0x0045cd00 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0012073c ++#define BCHP_DECODE_MB_0_REG_START 0x00120740 ++#define BCHP_DECODE_MB_0_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x0012507c ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00126838 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00126b58 ++#define BCHP_RVC_0_REG_START 0x00126c00 ++#define BCHP_RVC_0_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00127000 ++#define BCHP_ILS_REGS_0_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0012738c ++#define BCHP_ILB_REGS_0_REG_START 0x00127400 ++#define BCHP_ILB_REGS_0_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x0014507c ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00146838 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00146b58 ++#define BCHP_RVC_2_0_REG_START 0x00146c00 ++#define BCHP_RVC_2_0_REG_END 0x00146c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x00147000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x001470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x00147100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x0014710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x00147180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x00147184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x00147200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x0014738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x00147400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x00147410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x00148100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x001481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x00148300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x0014831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x00148320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x0014833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x00148400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x0014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x00148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x0014857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x00148700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x0014871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x00148720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x0014873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x00148740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x0014875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x00148c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x00148dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x00148e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x00148efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x0014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x0014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x0014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x0014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x0014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x0014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x0014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x0014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0018002c ++#define BCHP_HVD_RGR_0_REG_START 0x00180400 ++#define BCHP_HVD_RGR_0_REG_END 0x00180410 ++#define BCHP_VICH_0_REG_START 0x001a0000 ++#define BCHP_VICH_0_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x00404520 ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_MPM_TOP_GR_REG_START 0x00406000 ++#define BCHP_MPM_TOP_GR_REG_END 0x0040600c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_BSCA_REG_START 0x0040a180 ++#define BCHP_BSCA_REG_END 0x0040a1d4 ++#define BCHP_GIO_REG_START 0x0040a200 ++#define BCHP_GIO_REG_END 0x0040a29c ++#define BCHP_TIMER_REG_START 0x0040a300 ++#define BCHP_TIMER_REG_END 0x0040a33c ++#define BCHP_PM_REG_START 0x0040a340 ++#define BCHP_PM_REG_END 0x0040a348 ++#define BCHP_IRQ0_REG_START 0x0040a380 ++#define BCHP_IRQ0_REG_END 0x0040a384 ++#define BCHP_IRQ1_REG_START 0x0040a3c0 ++#define BCHP_IRQ1_REG_END 0x0040a3c4 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040a800 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040a82c ++#define BCHP_SCA_REG_START 0x0040b000 ++#define BCHP_SCA_REG_END 0x0040b0bc ++#define BCHP_SCB_REG_START 0x0040b100 ++#define BCHP_SCB_REG_END 0x0040b1bc ++#define BCHP_SCIRQ0_REG_START 0x0040b200 ++#define BCHP_SCIRQ0_REG_END 0x0040b204 ++#define BCHP_SCIRQ1_REG_START 0x0040b240 ++#define BCHP_SCIRQ1_REG_END 0x0040b244 ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040b280 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040b284 ++#define BCHP_UARTA_REG_START 0x0040b400 ++#define BCHP_UARTA_REG_END 0x0040b41c ++#define BCHP_UARTB_REG_START 0x0040b440 ++#define BCHP_UARTB_REG_END 0x0040b45c ++#define BCHP_UARTC_REG_START 0x0040b480 ++#define BCHP_UARTC_REG_END 0x0040b49c ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b500 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b530 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004103fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410718 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_AON_HDMI_RX_REG_START 0x00411200 ++#define BCHP_AON_HDMI_RX_REG_END 0x004112d4 ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417040 ++#define BCHP_PM_AON_REG_END 0x00417048 ++#define BCHP_ICAP_REG_START 0x00417080 ++#define BCHP_ICAP_REG_END 0x004170bc ++#define BCHP_KBD1_REG_START 0x004170c0 ++#define BCHP_KBD1_REG_END 0x004170fc ++#define BCHP_KBD2_REG_START 0x00417100 ++#define BCHP_KBD2_REG_END 0x0041713c ++#define BCHP_KBD3_REG_START 0x00417140 ++#define BCHP_KBD3_REG_END 0x0041717c ++#define BCHP_BSCC_REG_START 0x00417180 ++#define BCHP_BSCC_REG_END 0x004171d4 ++#define BCHP_BSCD_REG_START 0x00417200 ++#define BCHP_BSCD_REG_END 0x00417254 ++#define BCHP_IRQ0_AON_REG_START 0x00417280 ++#define BCHP_IRQ0_AON_REG_END 0x00417284 ++#define BCHP_IRQ1_AON_REG_START 0x004172c0 ++#define BCHP_IRQ1_AON_REG_END 0x004172c4 ++#define BCHP_GIO_AON_REG_START 0x00417300 ++#define BCHP_GIO_AON_REG_END 0x0041733c ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041742c ++#define BCHP_WKTMR_REG_START 0x00417480 ++#define BCHP_WKTMR_REG_END 0x00417490 ++#define BCHP_BICAP_REG_START 0x004174c0 ++#define BCHP_BICAP_REG_END 0x004174f8 ++#define BCHP_V3D_BPCM_REG_START 0x0041d000 ++#define BCHP_V3D_BPCM_REG_END 0x0041d010 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_SDIO_0_HOST_REG_START 0x00440000 ++#define BCHP_SDIO_0_HOST_REG_END 0x004400fc ++#define BCHP_SDIO_0_CFG_REG_START 0x00440100 ++#define BCHP_SDIO_0_CFG_REG_END 0x004401fc ++#define BCHP_SDIO_1_HOST_REG_START 0x00440200 ++#define BCHP_SDIO_1_HOST_REG_END 0x004402fc ++#define BCHP_SDIO_1_CFG_REG_START 0x00440300 ++#define BCHP_SDIO_1_CFG_REG_END 0x004403fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x00440400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x0044043c ++#define BCHP_EBI_REG_START 0x00440800 ++#define BCHP_EBI_REG_END 0x00440bfc ++#define BCHP_HIF_INTR2_REG_START 0x00441000 ++#define BCHP_HIF_INTR2_REG_END 0x0044102c ++#define BCHP_IPI0_INTR2_REG_START 0x00441100 ++#define BCHP_IPI0_INTR2_REG_END 0x0044112c ++#define BCHP_IPI1_INTR2_REG_START 0x00441200 ++#define BCHP_IPI1_INTR2_REG_END 0x0044122c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x00441500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x0044153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x00441600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x0044163c ++#define BCHP_HIF_RGR2_REG_START 0x00441700 ++#define BCHP_HIF_RGR2_REG_END 0x00441710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x00441a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x00441a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x00442000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x0044203c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x00442200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x004423fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x00442400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x004427fc ++#define BCHP_NAND_REG_START 0x00442800 ++#define BCHP_NAND_REG_END 0x00442dfc ++#define BCHP_FLASH_DMA_REG_START 0x00443000 ++#define BCHP_FLASH_DMA_REG_END 0x00443028 ++#define BCHP_BSPI_REG_START 0x00443200 ++#define BCHP_BSPI_REG_END 0x0044324c ++#define BCHP_BSPI_RAF_REG_START 0x00443300 ++#define BCHP_BSPI_RAF_REG_END 0x00443320 ++#define BCHP_HIF_MSPI_REG_START 0x00443400 ++#define BCHP_HIF_MSPI_REG_END 0x00443584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x00443600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x00443604 ++#define BCHP_BOOTSRAM_TM_REG_START 0x00450000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x0045fffc ++#define BCHP_HIF_CONTINUATION_REG_START 0x00462000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x0046200c ++#define BCHP_SATA_GRB_REG_START 0x00468000 ++#define BCHP_SATA_GRB_REG_END 0x0046800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00468040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00468060 ++#define BCHP_SATA3_INTR2_REG_START 0x00468080 ++#define BCHP_SATA3_INTR2_REG_END 0x004680ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00468100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00468ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0046a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0046a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0046a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0046a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0046a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0046a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0046a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0046a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0046a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0046a17c ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0046a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0046a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0046a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0046a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0046a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0046a764 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0046a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0046a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0046a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0046a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0046a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0046a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0046a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0046a998 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00470000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0047003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00470048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0047004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004700ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004700e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00470100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00470134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00470160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00470178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00470180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004701a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00470404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00470418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00470428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00470630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00470800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00470998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00471000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00471424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00471800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00471e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00472000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0047203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00472048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0047204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00472050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00472054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00472058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00472064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004720a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004720a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004720ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004720e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00472100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00472134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0047213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00472144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00472150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0047215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00472160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00472178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00472180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004721a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00472404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00472418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00472428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00472630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00472800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00472998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00473000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00473424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00473800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00473e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00474000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004740cc ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00474100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00474104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00474200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00474204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00474300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0047432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00474400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0047446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00478000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00479008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00479200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00479210 ++#define BCHP_PCIE_0_RG_REG_START 0x00479300 ++#define BCHP_PCIE_0_RG_REG_END 0x0047930c ++#define BCHP_USB_CAPS_REG_START 0x00490000 ++#define BCHP_USB_CAPS_REG_END 0x0049002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00490100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0049010c ++#define BCHP_USB_INTR2_REG_START 0x00490180 ++#define BCHP_USB_INTR2_REG_END 0x004901ac ++#define BCHP_USB_CTRL_REG_START 0x00490200 ++#define BCHP_USB_CTRL_REG_END 0x004902fc ++#define BCHP_USB_EHCI_REG_START 0x00490300 ++#define BCHP_USB_EHCI_REG_END 0x004903a4 ++#define BCHP_USB_OHCI_REG_START 0x00490400 ++#define BCHP_USB_OHCI_REG_END 0x00490454 ++#define BCHP_USB_EHCI1_REG_START 0x00490500 ++#define BCHP_USB_EHCI1_REG_END 0x004905a4 ++#define BCHP_USB_OHCI1_REG_START 0x00490600 ++#define BCHP_USB_OHCI1_REG_END 0x00490654 ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d18a8 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2804 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e06b8 ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4800 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4844 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_VFD_0_REG_START 0x00600800 ++#define BCHP_VFD_0_REG_END 0x006009fc ++#define BCHP_VFD_1_REG_START 0x00600c00 ++#define BCHP_VFD_1_REG_END 0x00600dfc ++#define BCHP_RDC_REG_START 0x00601000 ++#define BCHP_RDC_REG_END 0x00601cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00602000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060202c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00602100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060212c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00602300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060232c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00602500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060252c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00602600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060262c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00602700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060272c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00602900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060292c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00602f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00602f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00603000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060302c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00603200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060322c ++#define BCHP_FMISC_REG_START 0x00604000 ++#define BCHP_FMISC_REG_END 0x0060401c ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_VNET_F_REG_START 0x00620800 ++#define BCHP_VNET_F_REG_END 0x006209fc ++#define BCHP_VNET_B_REG_START 0x00620a00 ++#define BCHP_VNET_B_REG_END 0x00620bfc ++#define BCHP_MMISC_REG_START 0x00621000 ++#define BCHP_MMISC_REG_END 0x0062101c ++#define BCHP_LBOX_0_REG_START 0x00622000 ++#define BCHP_LBOX_0_REG_END 0x00622070 ++#define BCHP_DNR_0_REG_START 0x00622200 ++#define BCHP_DNR_0_REG_END 0x006222a4 ++#define BCHP_DNR_1_REG_START 0x00622400 ++#define BCHP_DNR_1_REG_END 0x006224a4 ++#define BCHP_XSRC_0_REG_START 0x00622800 ++#define BCHP_XSRC_0_REG_END 0x00622888 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00622c00 ++#define BCHP_BVNM_INTR2_0_REG_END 0x00622c2c ++#define BCHP_DMISC_REG_START 0x00640000 ++#define BCHP_DMISC_REG_END 0x0064001c ++#define BCHP_MVP_TOP_0_REG_START 0x00650000 ++#define BCHP_MVP_TOP_0_REG_END 0x00650038 ++#define BCHP_SIOB_0_REG_START 0x00650200 ++#define BCHP_SIOB_0_REG_END 0x006502fc ++#define BCHP_HSCL_0_REG_START 0x00650400 ++#define BCHP_HSCL_0_REG_END 0x006507fc ++#define BCHP_MDI_TOP_0_REG_START 0x00652000 ++#define BCHP_MDI_TOP_0_REG_END 0x006520fc ++#define BCHP_MDI_PPB_0_REG_START 0x00652800 ++#define BCHP_MDI_PPB_0_REG_END 0x00652bfc ++#define BCHP_MDI_FCN_0_REG_START 0x00652c00 ++#define BCHP_MDI_FCN_0_REG_END 0x00652ffc ++#define BCHP_CAP_0_REG_START 0x00680000 ++#define BCHP_CAP_0_REG_END 0x0068010c ++#define BCHP_CAP_1_REG_START 0x00680200 ++#define BCHP_CAP_1_REG_END 0x0068030c ++#define BCHP_GFD_0_REG_START 0x00680400 ++#define BCHP_GFD_0_REG_END 0x0068062c ++#define BCHP_GFD_1_REG_START 0x00680800 ++#define BCHP_GFD_1_REG_END 0x00680a2c ++#define BCHP_CMP_0_REG_START 0x00681000 ++#define BCHP_CMP_0_REG_END 0x006814c0 ++#define BCHP_CMP_1_REG_START 0x00681800 ++#define BCHP_CMP_1_REG_END 0x00681a60 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00682000 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006820a4 ++#define BCHP_MASK_0_REG_START 0x00682400 ++#define BCHP_MASK_0_REG_END 0x00682420 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00684000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00685284 ++#define BCHP_BVNB_INTR2_REG_START 0x00686000 ++#define BCHP_BVNB_INTR2_REG_END 0x0068602c ++#define BCHP_BMISC_REG_START 0x00686400 ++#define BCHP_BMISC_REG_END 0x0068641c ++#define BCHP_MISC_REG_START 0x006a0000 ++#define BCHP_MISC_REG_END 0x006a00a4 ++#define BCHP_IT_0_REG_START 0x006a1000 ++#define BCHP_IT_0_REG_END 0x006a17fc ++#define BCHP_IT_1_REG_START 0x006a2000 ++#define BCHP_IT_1_REG_END 0x006a27fc ++#define BCHP_VF_0_REG_START 0x006a3000 ++#define BCHP_VF_0_REG_END 0x006a3134 ++#define BCHP_VF_1_REG_START 0x006a3200 ++#define BCHP_VF_1_REG_END 0x006a3334 ++#define BCHP_SECAM_0_REG_START 0x006a3400 ++#define BCHP_SECAM_0_REG_END 0x006a3414 ++#define BCHP_SM_0_REG_START 0x006a3480 ++#define BCHP_SM_0_REG_END 0x006a34ac ++#define BCHP_SDSRC_0_REG_START 0x006a3500 ++#define BCHP_SDSRC_0_REG_END 0x006a350c ++#define BCHP_HDSRC_0_REG_START 0x006a3520 ++#define BCHP_HDSRC_0_REG_END 0x006a353c ++#define BCHP_CSC_0_REG_START 0x006a3580 ++#define BCHP_CSC_0_REG_END 0x006a35b0 ++#define BCHP_CSC_1_REG_START 0x006a3600 ++#define BCHP_CSC_1_REG_END 0x006a3630 ++#define BCHP_RM_0_REG_START 0x006a3680 ++#define BCHP_RM_0_REG_END 0x006a36b0 ++#define BCHP_RM_1_REG_START 0x006a36c0 ++#define BCHP_RM_1_REG_END 0x006a36f0 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006a3700 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006a3744 ++#define BCHP_GRPD_0_REG_START 0x006a3800 ++#define BCHP_GRPD_0_REG_END 0x006a38ec ++#define BCHP_DVI_MISC_0_REG_START 0x006a3900 ++#define BCHP_DVI_MISC_0_REG_END 0x006a3900 ++#define BCHP_DVI_DTG_0_REG_START 0x006a4000 ++#define BCHP_DVI_DTG_0_REG_END 0x006a4488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006a4800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006a4830 ++#define BCHP_DVI_CSC_0_REG_START 0x006a4900 ++#define BCHP_DVI_CSC_0_REG_END 0x006a4930 ++#define BCHP_DVI_FC_0_REG_START 0x006a4a00 ++#define BCHP_DVI_FC_0_REG_END 0x006a4a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006a4b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006a4b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006a4c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006a4c44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006a5000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006a5488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006a5600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006a5630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006a5700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006a5718 ++#define BCHP_ITU656_0_REG_START 0x006a5800 ++#define BCHP_ITU656_0_REG_END 0x006a5820 ++#define BCHP_VEC_CFG_REG_START 0x006a5c00 ++#define BCHP_VEC_CFG_REG_END 0x006a5d44 ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006a6000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006a602c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006a6200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006a6320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006a6400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006a645c ++#define BCHP_DSCL_0_REG_START 0x006a6800 ++#define BCHP_DSCL_0_REG_END 0x006a6bfc ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006a7000 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006a7008 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006a7100 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006a712c ++#define BCHP_DVP_TVG_0_REG_START 0x006a7200 ++#define BCHP_DVP_TVG_0_REG_END 0x006a7288 ++#define BCHP_VBI_ENC_REG_START 0x006a8000 ++#define BCHP_VBI_ENC_REG_END 0x006a8074 ++#define BCHP_CCE_0_REG_START 0x006a8400 ++#define BCHP_CCE_0_REG_END 0x006a8458 ++#define BCHP_WSE_0_REG_START 0x006a8500 ++#define BCHP_WSE_0_REG_END 0x006a8514 ++#define BCHP_CGMSAE_0_REG_START 0x006a8600 ++#define BCHP_CGMSAE_0_REG_END 0x006a8658 ++#define BCHP_TTE_0_REG_START 0x006a8700 ++#define BCHP_TTE_0_REG_END 0x006a8728 ++#define BCHP_GSE_0_REG_START 0x006a8800 ++#define BCHP_GSE_0_REG_END 0x006a8880 ++#define BCHP_AMOLE_0_REG_START 0x006a8900 ++#define BCHP_AMOLE_0_REG_END 0x006a898c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006a8a00 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006a8a54 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006a8b00 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006a8b0c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006a8c00 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006a8c28 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006a8d00 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006a8d80 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006a8e00 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006a8e8c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006a8f00 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006a8f24 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x006af000 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x006af224 ++#define BCHP_VICE2_VIP_TOP_REG_START 0x006af800 ++#define BCHP_VICE2_VIP_TOP_REG_END 0x006af80c ++#define BCHP_DVP_HR_REG_START 0x006b0000 ++#define BCHP_DVP_HR_REG_END 0x006b03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x006b0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x006b042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x006b0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x006b0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x006b0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x006b090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x006b0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x006b0c28 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x006b1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x006b11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x006b1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x006b13fc ++#define BCHP_HDMI_RX_0_REG_START 0x006b2000 ++#define BCHP_HDMI_RX_0_REG_END 0x006b27fc ++#define BCHP_HDCP2_RX_0_REG_START 0x006b2800 ++#define BCHP_HDCP2_RX_0_REG_END 0x006b29fc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x006b2a00 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x006b2a2c ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_START 0x006b2a40 ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_END 0x006b2a6c ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_START 0x006b2a80 ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_END 0x006b2aac ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_START 0x006b2ac0 ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_END 0x006b2ad4 ++#define BCHP_HD_DVI_0_REG_START 0x006b4000 ++#define BCHP_HD_DVI_0_REG_END 0x006b427c ++#define BCHP_DVP_HR_TMR_REG_START 0x006b4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x006b4cfc ++#define BCHP_DVP_HT_REG_START 0x006b8000 ++#define BCHP_DVP_HT_REG_END 0x006b8114 ++#define BCHP_HDMI_REG_START 0x006b8800 ++#define BCHP_HDMI_REG_END 0x006b8afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006b8b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006b8dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006b8e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006b8e7c ++#define BCHP_HDMI_RM_REG_START 0x006b8e80 ++#define BCHP_HDMI_RM_REG_END 0x006b8eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006b8f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006b8f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006b8f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006b8fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006b9000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006b902c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006b9080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006b90ac ++#define BCHP_HDMI_RAM_REG_START 0x006b9100 ++#define BCHP_HDMI_RAM_REG_END 0x006b92fc ++#define BCHP_BVN_RGR_REG_START 0x006c0000 ++#define BCHP_BVN_RGR_REG_END 0x006c0010 ++#define BCHP_MEMC_GEN_0_REG_START 0x00900000 ++#define BCHP_MEMC_GEN_0_REG_END 0x009007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x00900800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x009008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x00900a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x00900afc ++#define BCHP_MEMC_ARC_0_REG_START 0x00900c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x00900f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x00901000 ++#define BCHP_MEMC_ARB_0_REG_END 0x009014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x00902000 ++#define BCHP_MEMC_DDR_0_REG_END 0x009027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x00903000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x00903044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x00903200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x00903244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x00903400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x00903444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x00903800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x009039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x00904000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x00904010 ++#define BCHP_MEMC_MISC_0_REG_START 0x00905000 ++#define BCHP_MEMC_MISC_0_REG_END 0x00905010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x00906000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x00906218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x00906400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x00906518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x00906600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x00906718 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x00908000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x009080e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x00940000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0097fffc ++#define BCHP_S_MEMC_0_REG_START 0x00980000 ++#define BCHP_S_MEMC_0_REG_END 0x00980780 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02078 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f8 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02178 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f8 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02278 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f8 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02378 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f8 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02478 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f8 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02578 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f8 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02678 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f8 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e178 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_CH0_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_CH0_REG_END 0x00a6a0fc ++#define BCHP_XPT_WDMA_CH1_REG_START 0x00a6a100 ++#define BCHP_XPT_WDMA_CH1_REG_END 0x00a6a1fc ++#define BCHP_XPT_WDMA_CH2_REG_START 0x00a6a200 ++#define BCHP_XPT_WDMA_CH2_REG_END 0x00a6a2fc ++#define BCHP_XPT_WDMA_CH3_REG_START 0x00a6a300 ++#define BCHP_XPT_WDMA_CH3_REG_END 0x00a6a3fc ++#define BCHP_XPT_WDMA_CH4_REG_START 0x00a6a400 ++#define BCHP_XPT_WDMA_CH4_REG_END 0x00a6a4fc ++#define BCHP_XPT_WDMA_CH5_REG_START 0x00a6a500 ++#define BCHP_XPT_WDMA_CH5_REG_END 0x00a6a5fc ++#define BCHP_XPT_WDMA_CH6_REG_START 0x00a6a600 ++#define BCHP_XPT_WDMA_CH6_REG_END 0x00a6a6fc ++#define BCHP_XPT_WDMA_CH7_REG_START 0x00a6a700 ++#define BCHP_XPT_WDMA_CH7_REG_END 0x00a6a7fc ++#define BCHP_XPT_WDMA_CH8_REG_START 0x00a6a800 ++#define BCHP_XPT_WDMA_CH8_REG_END 0x00a6a8fc ++#define BCHP_XPT_WDMA_CH9_REG_START 0x00a6a900 ++#define BCHP_XPT_WDMA_CH9_REG_END 0x00a6a9fc ++#define BCHP_XPT_WDMA_CH10_REG_START 0x00a6aa00 ++#define BCHP_XPT_WDMA_CH10_REG_END 0x00a6aafc ++#define BCHP_XPT_WDMA_CH11_REG_START 0x00a6ab00 ++#define BCHP_XPT_WDMA_CH11_REG_END 0x00a6abfc ++#define BCHP_XPT_WDMA_CH12_REG_START 0x00a6ac00 ++#define BCHP_XPT_WDMA_CH12_REG_END 0x00a6acfc ++#define BCHP_XPT_WDMA_CH13_REG_START 0x00a6ad00 ++#define BCHP_XPT_WDMA_CH13_REG_END 0x00a6adfc ++#define BCHP_XPT_WDMA_CH14_REG_START 0x00a6ae00 ++#define BCHP_XPT_WDMA_CH14_REG_END 0x00a6aefc ++#define BCHP_XPT_WDMA_CH15_REG_START 0x00a6af00 ++#define BCHP_XPT_WDMA_CH15_REG_END 0x00a6affc ++#define BCHP_XPT_WDMA_CH16_REG_START 0x00a6b000 ++#define BCHP_XPT_WDMA_CH16_REG_END 0x00a6b0fc ++#define BCHP_XPT_WDMA_CH17_REG_START 0x00a6b100 ++#define BCHP_XPT_WDMA_CH17_REG_END 0x00a6b1fc ++#define BCHP_XPT_WDMA_CH18_REG_START 0x00a6b200 ++#define BCHP_XPT_WDMA_CH18_REG_END 0x00a6b2fc ++#define BCHP_XPT_WDMA_CH19_REG_START 0x00a6b300 ++#define BCHP_XPT_WDMA_CH19_REG_END 0x00a6b3fc ++#define BCHP_XPT_WDMA_CH20_REG_START 0x00a6b400 ++#define BCHP_XPT_WDMA_CH20_REG_END 0x00a6b4fc ++#define BCHP_XPT_WDMA_CH21_REG_START 0x00a6b500 ++#define BCHP_XPT_WDMA_CH21_REG_END 0x00a6b5fc ++#define BCHP_XPT_WDMA_CH22_REG_START 0x00a6b600 ++#define BCHP_XPT_WDMA_CH22_REG_END 0x00a6b6fc ++#define BCHP_XPT_WDMA_CH23_REG_START 0x00a6b700 ++#define BCHP_XPT_WDMA_CH23_REG_END 0x00a6b7fc ++#define BCHP_XPT_WDMA_CH24_REG_START 0x00a6b800 ++#define BCHP_XPT_WDMA_CH24_REG_END 0x00a6b8fc ++#define BCHP_XPT_WDMA_CH25_REG_START 0x00a6b900 ++#define BCHP_XPT_WDMA_CH25_REG_END 0x00a6b9fc ++#define BCHP_XPT_WDMA_CH26_REG_START 0x00a6ba00 ++#define BCHP_XPT_WDMA_CH26_REG_END 0x00a6bafc ++#define BCHP_XPT_WDMA_CH27_REG_START 0x00a6bb00 ++#define BCHP_XPT_WDMA_CH27_REG_END 0x00a6bbfc ++#define BCHP_XPT_WDMA_CH28_REG_START 0x00a6bc00 ++#define BCHP_XPT_WDMA_CH28_REG_END 0x00a6bcfc ++#define BCHP_XPT_WDMA_CH29_REG_START 0x00a6bd00 ++#define BCHP_XPT_WDMA_CH29_REG_END 0x00a6bdfc ++#define BCHP_XPT_WDMA_CH30_REG_START 0x00a6be00 ++#define BCHP_XPT_WDMA_CH30_REG_END 0x00a6befc ++#define BCHP_XPT_WDMA_CH31_REG_START 0x00a6bf00 ++#define BCHP_XPT_WDMA_CH31_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b60000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b60010 ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b60040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b6004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b60080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b600b4 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b60200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b6022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b60240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b6026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b60300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b603b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b60600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b60628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b60800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b60ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b62000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b630d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b64000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b65084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b68000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b6fc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea07c ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea1ac ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_AXM_REG_START 0x00bea700 ++#define BCHP_V3D_AXM_REG_END 0x00bea714 ++#define BCHP_V3D_GMP_REG_START 0x00bea800 ++#define BCHP_V3D_GMP_REG_END 0x00bea820 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea900 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea90c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa78 ++#define BCHP_V3D_ERROR_REG_START 0x00beaf00 ++#define BCHP_V3D_ERROR_REG_END 0x00beaf20 ++#define BCHP_V3D_QPUDBG_REG_START 0x00bec000 ++#define BCHP_V3D_QPUDBG_REG_END 0x00bedffc ++#define BCHP_V3D_HUB_CTL_REG_START 0x00bee000 ++#define BCHP_V3D_HUB_CTL_REG_END 0x00bee07c ++#define BCHP_V3D_MSO_REG_START 0x00bee100 ++#define BCHP_V3D_MSO_REG_END 0x00bee27c ++#define BCHP_V3D_TSY_REG_START 0x00bee300 ++#define BCHP_V3D_TSY_REG_END 0x00bee368 ++#define BCHP_V3D_TFU_REG_START 0x00bee400 ++#define BCHP_V3D_TFU_REG_END 0x00bee464 ++#define BCHP_V3D_MCS_REG_START 0x00bee500 ++#define BCHP_V3D_MCS_REG_END 0x00bee55c ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2108c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21678 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_TIMER_INT_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_TIMER_INT_REG_END 0x00c22414 ++#define BCHP_RAAGA_DSP_ERROR_INT_REG_START 0x00c22600 ++#define BCHP_RAAGA_DSP_ERROR_INT_REG_END 0x00c22614 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22800 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2282c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_RAAGA_AX_MISC_REG_START 0x00c40000 ++#define BCHP_RAAGA_AX_MISC_REG_END 0x00c40004 ++#define BCHP_RAAGA_AX_INTR_AGGR_REG_START 0x00c40100 ++#define BCHP_RAAGA_AX_INTR_AGGR_REG_END 0x00c40144 ++#define BCHP_RAAGA_AX_RXI_ARB_REG_START 0x00c40200 ++#define BCHP_RAAGA_AX_RXI_ARB_REG_END 0x00c40248 ++#define BCHP_RAAGA_AX_DBLK_WATCHDOG_REG_START 0x00c40300 ++#define BCHP_RAAGA_AX_DBLK_WATCHDOG_REG_END 0x00c40314 ++#define BCHP_RAAGA_AX_EC_WATCHDOG_REG_START 0x00c40400 ++#define BCHP_RAAGA_AX_EC_WATCHDOG_REG_END 0x00c40414 ++#define BCHP_RAAGA_AX_ME_WATCHDOG_REG_START 0x00c40500 ++#define BCHP_RAAGA_AX_ME_WATCHDOG_REG_END 0x00c40514 ++#define BCHP_RAAGA_AX_GENAX_WATCHDOG_REG_START 0x00c40600 ++#define BCHP_RAAGA_AX_GENAX_WATCHDOG_REG_END 0x00c40614 ++#define BCHP_RAAGA_AX_DBLK_REG_START 0x00c41000 ++#define BCHP_RAAGA_AX_DBLK_REG_END 0x00c411fc ++#define BCHP_RAAGA_AX_EC_REG_START 0x00c42000 ++#define BCHP_RAAGA_AX_EC_REG_END 0x00c42158 ++#define BCHP_RAAGA_AX_ME_REG_START 0x00c43000 ++#define BCHP_RAAGA_AX_ME_REG_END 0x00c4321c ++#define BCHP_RAAGA_AX_GENAX_REG_START 0x00c44000 ++#define BCHP_RAAGA_AX_GENAX_REG_END 0x00c44650 ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb02b4 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_END 0x00cb03b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb0f30 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1524 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb165c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb18fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb20ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb2864 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb2900 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb2964 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_MPM_CPU_PROG_MEM_REG_START 0x00d00000 ++#define BCHP_MPM_CPU_PROG_MEM_REG_END 0x00d0fffc ++#define BCHP_MPM_CPU_DATA_MEM_REG_START 0x00d10000 ++#define BCHP_MPM_CPU_DATA_MEM_REG_END 0x00d13ffc ++#define BCHP_MPM_CPU_CORE_REGS_REG_START 0x00d20000 ++#define BCHP_MPM_CPU_CORE_REGS_REG_END 0x00d200fc ++#define BCHP_MPM_CPU_AUX_REGS_REG_START 0x00d22000 ++#define BCHP_MPM_CPU_AUX_REGS_REG_END 0x00d23058 ++#define BCHP_MPM_UART_REG_START 0x00d80000 ++#define BCHP_MPM_UART_REG_END 0x00d80ffc ++#define BCHP_MPM_WDOG_REG_START 0x00d81000 ++#define BCHP_MPM_WDOG_REG_END 0x00d81ffc ++#define BCHP_MPM_CPU_L1_REG_START 0x00d82000 ++#define BCHP_MPM_CPU_L1_REG_END 0x00d82018 ++#define BCHP_MPM_CPU_L2_REG_START 0x00d82100 ++#define BCHP_MPM_CPU_L2_REG_END 0x00d8212c ++#define BCHP_MPM_HOST_L2_REG_START 0x00d82200 ++#define BCHP_MPM_HOST_L2_REG_END 0x00d8222c ++#define BCHP_MPM_CPU_CTRL_REG_START 0x00d82300 ++#define BCHP_MPM_CPU_CTRL_REG_END 0x00d82344 ++#define BCHP_MPM_PM_L2_REG_START 0x00d82400 ++#define BCHP_MPM_PM_L2_REG_END 0x00d8242c ++#define BCHP_MPM_RANGE_BLOCKER_REG_START 0x00d82500 ++#define BCHP_MPM_RANGE_BLOCKER_REG_END 0x00d82554 ++#define BCHP_MPM_BSPI_REG_START 0x00d82600 ++#define BCHP_MPM_BSPI_REG_END 0x00d8264c ++#define BCHP_MPM_MSPI_REG_START 0x00d82800 ++#define BCHP_MPM_MSPI_REG_END 0x00d82984 ++#define BCHP_DVP_MT_AON_TOP_REG_START 0x00d83000 ++#define BCHP_DVP_MT_AON_TOP_REG_END 0x00d8300c ++#define BCHP_CBUS_INTR2_0_REG_START 0x00d83800 ++#define BCHP_CBUS_INTR2_0_REG_END 0x00d8382c ++#define BCHP_CBUS_INTR2_1_REG_START 0x00d83880 ++#define BCHP_CBUS_INTR2_1_REG_END 0x00d838ac ++#define BCHP_MT_CBUS_REG_START 0x00d83a00 ++#define BCHP_MT_CBUS_REG_END 0x00d83afc ++#define BCHP_MT_MSC_REQ_REG_START 0x00d83b00 ++#define BCHP_MT_MSC_REQ_REG_END 0x00d83b6c ++#define BCHP_MT_MSC_RESP_REG_START 0x00d83c00 ++#define BCHP_MT_MSC_RESP_REG_END 0x00d83cac ++#define BCHP_MT_DDC_REQ_REG_START 0x00d83d00 ++#define BCHP_MT_DDC_REQ_REG_END 0x00d83d6c ++#define BCHP_MPM_FLASH_MEM_REG_START 0x00dc0000 ++#define BCHP_MPM_FLASH_MEM_REG_END 0x00ddfffc ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x01270200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x01270204 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x01271000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x01271fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x01272000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x012733fc ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_DCXG_NO_4K ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_DCXG_NO_4K :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DCXG_NO_4K_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DCXG_NO_4K_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_AX_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG0 - Cluster Package Data Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG0 :: ADDRESS_UPLEFTMB [63:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_UPLEFTMB_MASK 0xffffffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_UPLEFTMB_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG0 :: ADDRESS_LEFTMB [31:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_LEFTMB_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_LEFTMB_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG1 - Cluster Package Data Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: OFFSET_REFERENCE [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_REFERENCE_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_REFERENCE_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: OFFSET_BVN_INPUT [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_BVN_INPUT_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_BVN_INPUT_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: ADDRESS_MBINFO [31:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_ADDRESS_MBINFO_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_ADDRESS_MBINFO_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG2 - Cluster Package Data Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_TEMPORAL_LEFT [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_LEFT_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_LEFT_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_TEMPORAL_UPLEFT [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_UPLEFT_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_UPLEFT_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_SPATIAL_LEFT [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_LEFT_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_LEFT_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_SPATIAL_UPLEFT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_UPLEFT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_UPLEFT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG3 - Cluster Package Data Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_SCALEFACTOR [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_SCALEFACTOR_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_SCALEFACTOR_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_PRED_PIXELS [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_PRED_PIXELS_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_PRED_PIXELS_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_INPUT_420 [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_INPUT_420_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_INPUT_420_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_MV_TEMPORAL_DOWNLEFT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_MV_TEMPORAL_DOWNLEFT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_MV_TEMPORAL_DOWNLEFT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG4 - Cluster Package Data Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_CB_READ [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_CB_READ_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_CB_READ_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_LUMA_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_LUMA_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_CHROMA_REF [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_CHROMA_REF_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_CHROMA_REF_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG5 - Cluster Package Data Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_QUANT_OUTPUT [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_QUANT_OUTPUT_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_QUANT_OUTPUT_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CR_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CR_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CB_WRITE [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CB_WRITE_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CB_WRITE_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG6 - Cluster Package Data Structure Register 6 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_CR_TOP_WRITE [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CR_TOP_WRITE_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CR_TOP_WRITE_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_CB_TOP_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CB_TOP_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CB_TOP_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_LUMA_TOP_WRITE [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_LUMA_TOP_WRITE_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_LUMA_TOP_WRITE_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_INPUT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_INPUT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_INPUT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG7 - Cluster Package Data Structure Register 7 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_OUTPUT_INDEX [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_OUTPUT_INDEX_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_OUTPUT_INDEX_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_CR_TOP_READ [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CR_TOP_READ_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CR_TOP_READ_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_CB_TOP_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CB_TOP_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CB_TOP_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_LUMA_TOP_READ [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_LUMA_TOP_READ_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_LUMA_TOP_READ_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG0 - Private MB Info Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: reserved0 [63:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_reserved0_MASK 0xfff0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_reserved0_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_MODE_LUMA [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_MODE_LUMA_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_MODE_LUMA_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_COLUMN_NUMBER [47:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_COLUMN_NUMBER_MASK 0x0000ff0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_COLUMN_NUMBER_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_ROW_NUMBER [39:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_ROW_NUMBER_MASK 0x000000ff00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_ROW_NUMBER_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: BEST_SAD [31:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_BEST_SAD_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_BEST_SAD_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG1 - Private MB Info Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_7 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_7_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_6 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_6_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_5 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_5_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_4 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_4_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG2 - Private MB Info Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_15 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_15_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_14 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_14_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_13 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_13_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_12 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_12_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_11 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_11_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_10 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_10_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_9 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_9_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_8 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_8_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG3 - Private MB Info Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_7 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_7_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_6 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_6_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_5 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_5_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_4 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_4_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG4 - Private MB Info Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_15 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_15_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_14 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_14_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_13 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_13_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_12 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_12_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_11 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_11_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_10 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_10_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_9 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_9_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_8 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_8_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG5 - Private MB Info Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: LAMBDA_GENAX [63:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_GENAX_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_GENAX_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved0 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved0_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved0_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_Y_COUNT [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_COUNT_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_COUNT_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved1 [39:33] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved1_MASK 0x000000fe00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved1_SHIFT 33 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_Y_DIR [32:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_DIR_MASK 0x0000000100000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_DIR_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved2 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved2_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved2_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_X_COUNT [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_COUNT_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_COUNT_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved3 [23:17] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved3_MASK 0x0000000000fe0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved3_SHIFT 17 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_X_DIR [16:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_DIR_MASK 0x0000000000010000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_DIR_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: LAMBDA [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG6 - Private MB Info Structure Register 6 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved0 [63:38] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved0_MASK 0xffffffc000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved0_SHIFT 38 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_2 [37:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_2_MASK 0x0000003f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_2_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved1 [31:30] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved1_MASK 0x00000000c0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved1_SHIFT 30 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_1 [29:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_1_MASK 0x000000003f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_1_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved2 [23:22] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved2_MASK 0x0000000000c00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved2_SHIFT 22 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_0 [21:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_0_MASK 0x00000000003f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_0_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: LUMA_VARIANCE [15:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_VARIANCE_MASK 0x000000000000ff00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_VARIANCE_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: LUMA_MEAN [07:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_MEAN_MASK 0x00000000000000ff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_MEAN_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG7 - Private MB Info Structure Register 7 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: reserved0 [63:38] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_reserved0_MASK 0xffffffc000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_reserved0_SHIFT 38 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: AVE_QPS [37:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVE_QPS_MASK 0x0000003f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVE_QPS_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: AVG_ZONAL_BITS [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVG_ZONAL_BITS_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVG_ZONAL_BITS_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: TEXTURE_BITS [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_TEXTURE_BITS_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_TEXTURE_BITS_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG0 - Public MB Info Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved0 [63:62] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved0_MASK 0xc000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved0_SHIFT 62 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: INTRA_QP [61:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_INTRA_QP_MASK 0x3f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_INTRA_QP_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved1 [55:54] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved1_MASK 0x00c0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved1_SHIFT 54 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: QP [53:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_QP_MASK 0x003f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_QP_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved2 [47:46] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved2_MASK 0x0000c00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved2_SHIFT 46 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: CBP [45:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBP_MASK 0x00003f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBP_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: MB_MODE_CHROMA [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_MB_MODE_CHROMA_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_MB_MODE_CHROMA_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved4 [31:27] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved4_MASK 0x00000000f8000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved4_SHIFT 27 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: CBF [26:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBF_MASK 0x0000000007ffffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBF_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG1 - Public MB Info Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: reserved0 [63:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_reserved0_MASK 0xffffffff00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_reserved0_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: MVD_Y [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_Y_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_Y_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: MVD_X [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_X_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_X_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG2 - Public MB Info Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved0 [63:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved0_MASK 0xffe0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved0_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MB_TYPE [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_SHIFT 48 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_I4X4 0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_I16X16 1 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_P16X16 2 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_PSKIP 3 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_IPCM 5 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_DUMMY 31 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved1 [47:41] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved1_MASK 0x0000fe0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved1_SHIFT 41 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MB_AVAILABLE [40:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_AVAILABLE_MASK 0x0000010000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_AVAILABLE_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved2 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved2_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved2_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: REF_ID [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_REF_ID_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_REF_ID_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MV_Y [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_Y_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_Y_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MV_X [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_X_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_X_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG3 - Public MB Info Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved0 [63:61] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved0_MASK 0xe000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved0_SHIFT 61 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_7 [60:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_7_MASK 0x1f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved1 [55:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved1_MASK 0x00e0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved1_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_6 [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_6_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved2 [47:45] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved2_MASK 0x0000e00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved2_SHIFT 45 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_5 [44:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_5_MASK 0x00001f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved3 [39:37] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved3_MASK 0x000000e000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved3_SHIFT 37 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_4 [36:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_4_MASK 0x0000001f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved4 [31:29] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved4_MASK 0x00000000e0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved4_SHIFT 29 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_3 [28:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_3_MASK 0x000000001f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved5 [23:21] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved5_MASK 0x0000000000e00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved5_SHIFT 21 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_2 [20:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_2_MASK 0x00000000001f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved6 [15:13] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved6_MASK 0x000000000000e000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved6_SHIFT 13 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_1 [12:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_1_MASK 0x0000000000001f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved7 [07:05] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved7_MASK 0x00000000000000e0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved7_SHIFT 5 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_0 [04:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_0_MASK 0x000000000000001f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG4 - Public MB Info Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved0 [63:61] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved0_MASK 0xe000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved0_SHIFT 61 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_15 [60:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_15_MASK 0x1f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved1 [55:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved1_MASK 0x00e0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved1_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_14 [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_14_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved2 [47:45] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved2_MASK 0x0000e00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved2_SHIFT 45 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_13 [44:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_13_MASK 0x00001f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved3 [39:37] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved3_MASK 0x000000e000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved3_SHIFT 37 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_12 [36:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_12_MASK 0x0000001f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved4 [31:29] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved4_MASK 0x00000000e0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved4_SHIFT 29 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_11 [28:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_11_MASK 0x000000001f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved5 [23:21] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved5_MASK 0x0000000000e00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved5_SHIFT 21 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_10 [20:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_10_MASK 0x00000000001f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved6 [15:13] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved6_MASK 0x000000000000e000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved6_SHIFT 13 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_9 [12:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_9_MASK 0x0000000000001f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved7 [07:05] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved7_MASK 0x00000000000000e0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved7_SHIFT 5 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_8 [04:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_8_MASK 0x000000000000001f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG5 - Public MB Info Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_3 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_3_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_3_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_2 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_2_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_2_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_1 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_1_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_1_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_0 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_0_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_0_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_0_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7250b0/bchp_usb_ctrl.h b/include/linux/brcmstb/7250b0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..0ee8c1a9 +--- /dev/null ++++ b/include/linux/brcmstb/7250b0/bchp_usb_ctrl.h +@@ -0,0 +1,1524 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Nov 19 03:12:51 2014 ++ * Full Compile MD5 Checksum 090c477e923b422fcfb8d82b056c5fac ++ * (minus title and desc) ++ * MD5 Checksum 3f553d4cd3bba7438ffdad1405cbf563 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00490200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00490204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00490208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0049020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00490210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00490214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00490218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0049021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00490220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00490224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00490228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0049022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00490230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00490234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00490238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0049023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00490240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00490244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00490248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0049024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00490250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00490254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00490258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0049025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00490260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00490264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00490268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0049026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00490270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00490274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00490278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0049027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004902a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004902a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004902a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004902ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004902b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004902b4 /* SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB_REVID 0x004902fc /* USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [25:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x03f00000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare1 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ohci_memreq_disable [08:08] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_SHIFT 8 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [07:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: xdc_soft_resetb [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [29:29] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 29 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [28:28] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [27:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x0fff0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xffc00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x00000017 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7364a0/bchp_common.h b/include/linux/brcmstb/7364a0/bchp_common.h +new file mode 100644 +index 00000000..4c5aa1ea +--- /dev/null ++++ b/include/linux/brcmstb/7364a0/bchp_common.h +@@ -0,0 +1,4400 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Oct 22 03:11:48 2014 ++ * Full Compile MD5 Checksum 08e1a7c8931083dc321aebee01be23fc ++ * (minus title and desc) ++ * MD5 Checksum 59bd60e4aff5fefc8861b8b125ee07f1 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7364_A0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00100000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x015e0000 /* MPM_FLASH_MEM is last */ ++#define BCHP_REGISTER_SIZE 0x00538000 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0012073c ++#define BCHP_DECODE_MB_0_REG_START 0x00120740 ++#define BCHP_DECODE_MB_0_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x0012507c ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00126838 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00126b58 ++#define BCHP_RVC_0_REG_START 0x00126c00 ++#define BCHP_RVC_0_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00127000 ++#define BCHP_ILS_REGS_0_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0012738c ++#define BCHP_ILB_REGS_0_REG_START 0x00127400 ++#define BCHP_ILB_REGS_0_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x0014507c ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00146838 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00146b58 ++#define BCHP_RVC_2_0_REG_START 0x00146c00 ++#define BCHP_RVC_2_0_REG_END 0x00146c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x00147000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x001470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x00147100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x0014710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x00147180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x00147184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x00147200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x0014738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x00147400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x00147410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x00148100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x001481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x00148300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x0014831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x00148320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x0014833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x00148400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x0014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x00148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x0014857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x00148700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x0014871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x00148720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x0014873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x00148740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x0014875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x00148c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x00148dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x00148e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x00148efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x0014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x0014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x0014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x0014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x0014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x0014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x0014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x0014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0018002c ++#define BCHP_HVD_RGR_0_REG_START 0x00180400 ++#define BCHP_HVD_RGR_0_REG_END 0x00180410 ++#define BCHP_VICH_0_REG_START 0x001a0000 ++#define BCHP_VICH_0_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_RF4CE_GR_REG_START 0x00401600 ++#define BCHP_RF4CE_GR_REG_END 0x0040160c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x0040452c ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_MPM_TOP_GR_REG_START 0x00406000 ++#define BCHP_MPM_TOP_GR_REG_END 0x0040600c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_BSCA_REG_START 0x0040a200 ++#define BCHP_BSCA_REG_END 0x0040a254 ++#define BCHP_BSCD_REG_START 0x0040a280 ++#define BCHP_BSCD_REG_END 0x0040a2d4 ++#define BCHP_GIO_REG_START 0x0040a300 ++#define BCHP_GIO_REG_END 0x0040a39c ++#define BCHP_PM_REG_START 0x0040a400 ++#define BCHP_PM_REG_END 0x0040a408 ++#define BCHP_TIMER_REG_START 0x0040a440 ++#define BCHP_TIMER_REG_END 0x0040a47c ++#define BCHP_IRQ0_REG_START 0x0040a480 ++#define BCHP_IRQ0_REG_END 0x0040a484 ++#define BCHP_IRQ1_REG_START 0x0040a4c0 ++#define BCHP_IRQ1_REG_END 0x0040a4c4 ++#define BCHP_CTK_REG_START 0x0040a800 ++#define BCHP_CTK_REG_END 0x0040a978 ++#define BCHP_TMON_REG_START 0x0040a980 ++#define BCHP_TMON_REG_END 0x0040a9d4 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040aa00 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040aa2c ++#define BCHP_MCIF_REG_START 0x0040aa40 ++#define BCHP_MCIF_REG_END 0x0040aa68 ++#define BCHP_MCIF_INTR2_REG_START 0x0040aa80 ++#define BCHP_MCIF_INTR2_REG_END 0x0040aac4 ++#define BCHP_SCA_REG_START 0x0040ac00 ++#define BCHP_SCA_REG_END 0x0040acfc ++#define BCHP_SCB_REG_START 0x0040ad00 ++#define BCHP_SCB_REG_END 0x0040adfc ++#define BCHP_SCIRQ0_REG_START 0x0040ae00 ++#define BCHP_SCIRQ0_REG_END 0x0040ae04 ++#define BCHP_SCIRQ1_REG_START 0x0040ae40 ++#define BCHP_SCIRQ1_REG_END 0x0040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040ae84 ++#define BCHP_UARTA_REG_START 0x0040b000 ++#define BCHP_UARTA_REG_END 0x0040b01c ++#define BCHP_UARTB_REG_START 0x0040b040 ++#define BCHP_UARTB_REG_END 0x0040b05c ++#define BCHP_UARTC_REG_START 0x0040b080 ++#define BCHP_UARTC_REG_END 0x0040b09c ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b0c0 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b0f0 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004103fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410714 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_AON_HDMI_RX_REG_START 0x00411200 ++#define BCHP_AON_HDMI_RX_REG_END 0x004112d4 ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417040 ++#define BCHP_PM_AON_REG_END 0x00417048 ++#define BCHP_ICAP_REG_START 0x00417080 ++#define BCHP_ICAP_REG_END 0x004170bc ++#define BCHP_KBD1_REG_START 0x004170c0 ++#define BCHP_KBD1_REG_END 0x004170fc ++#define BCHP_KBD2_REG_START 0x00417100 ++#define BCHP_KBD2_REG_END 0x0041713c ++#define BCHP_KBD3_REG_START 0x00417140 ++#define BCHP_KBD3_REG_END 0x0041717c ++#define BCHP_BSCB_REG_START 0x00417180 ++#define BCHP_BSCB_REG_END 0x004171d4 ++#define BCHP_BSCC_REG_START 0x00417200 ++#define BCHP_BSCC_REG_END 0x00417254 ++#define BCHP_IRQ0_AON_REG_START 0x00417280 ++#define BCHP_IRQ0_AON_REG_END 0x00417284 ++#define BCHP_IRQ1_AON_REG_START 0x004172c0 ++#define BCHP_IRQ1_AON_REG_END 0x004172c4 ++#define BCHP_GIO_AON_REG_START 0x00417300 ++#define BCHP_GIO_AON_REG_END 0x0041733c ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041742c ++#define BCHP_WKTMR_REG_START 0x00417480 ++#define BCHP_WKTMR_REG_END 0x00417490 ++#define BCHP_BICAP_REG_START 0x004174c0 ++#define BCHP_BICAP_REG_END 0x004174f8 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_SDIO_0_HOST_REG_START 0x00440000 ++#define BCHP_SDIO_0_HOST_REG_END 0x004400fc ++#define BCHP_SDIO_0_CFG_REG_START 0x00440100 ++#define BCHP_SDIO_0_CFG_REG_END 0x004401fc ++#define BCHP_SDIO_1_HOST_REG_START 0x00440200 ++#define BCHP_SDIO_1_HOST_REG_END 0x004402fc ++#define BCHP_SDIO_1_CFG_REG_START 0x00440300 ++#define BCHP_SDIO_1_CFG_REG_END 0x004403fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x00440400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x0044043c ++#define BCHP_EBI_REG_START 0x00440800 ++#define BCHP_EBI_REG_END 0x00440bfc ++#define BCHP_HIF_INTR2_REG_START 0x00441000 ++#define BCHP_HIF_INTR2_REG_END 0x0044102c ++#define BCHP_IPI0_INTR2_REG_START 0x00441100 ++#define BCHP_IPI0_INTR2_REG_END 0x0044112c ++#define BCHP_IPI1_INTR2_REG_START 0x00441200 ++#define BCHP_IPI1_INTR2_REG_END 0x0044122c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x00441500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x0044153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x00441600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x0044163c ++#define BCHP_HIF_RGR2_REG_START 0x00441700 ++#define BCHP_HIF_RGR2_REG_END 0x00441710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x00441a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x00441a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x00442000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x0044203c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x00442200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x004423fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x00442400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x004427fc ++#define BCHP_NAND_REG_START 0x00442800 ++#define BCHP_NAND_REG_END 0x00442dfc ++#define BCHP_FLASH_DMA_REG_START 0x00443000 ++#define BCHP_FLASH_DMA_REG_END 0x00443028 ++#define BCHP_BSPI_REG_START 0x00443200 ++#define BCHP_BSPI_REG_END 0x0044324c ++#define BCHP_BSPI_RAF_REG_START 0x00443300 ++#define BCHP_BSPI_RAF_REG_END 0x00443320 ++#define BCHP_HIF_MSPI_REG_START 0x00443400 ++#define BCHP_HIF_MSPI_REG_END 0x00443584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x00443600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x00443604 ++#define BCHP_BOOTSRAM_TM_REG_START 0x00450000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x0045fffc ++#define BCHP_HIF_CONTINUATION_REG_START 0x00462000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x0046200c ++#define BCHP_RFM_SYSCLK_REG_START 0x0046c000 ++#define BCHP_RFM_SYSCLK_REG_END 0x0046c124 ++#define BCHP_RFM_CLK27_REG_START 0x0046c000 ++#define BCHP_RFM_CLK27_REG_END 0x0046c470 ++#define BCHP_RFM_L2_REG_START 0x0046cc00 ++#define BCHP_RFM_L2_REG_END 0x0046cc2c ++#define BCHP_RFM_GRB_REG_START 0x0046d000 ++#define BCHP_RFM_GRB_REG_END 0x0046d00c ++#define BCHP_USB_CAPS_REG_START 0x00480000 ++#define BCHP_USB_CAPS_REG_END 0x0048002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00480100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0048010c ++#define BCHP_USB_INTR2_REG_START 0x00480180 ++#define BCHP_USB_INTR2_REG_END 0x004801ac ++#define BCHP_USB_CTRL_REG_START 0x00480200 ++#define BCHP_USB_CTRL_REG_END 0x004802fc ++#define BCHP_USB_EHCI_REG_START 0x00480300 ++#define BCHP_USB_EHCI_REG_END 0x004803a4 ++#define BCHP_USB_OHCI_REG_START 0x00480400 ++#define BCHP_USB_OHCI_REG_END 0x00480454 ++#define BCHP_USB_EHCI1_REG_START 0x00480500 ++#define BCHP_USB_EHCI1_REG_END 0x004805a4 ++#define BCHP_USB_OHCI1_REG_START 0x00480600 ++#define BCHP_USB_OHCI1_REG_END 0x00480654 ++#define BCHP_USB_XHCI_REG_START 0x00481000 ++#define BCHP_USB_XHCI_REG_END 0x004818c4 ++#define BCHP_USB_XHCI_EC_REG_START 0x00481940 ++#define BCHP_USB_XHCI_EC_REG_END 0x00481fc0 ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d1914 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2804 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x004d4600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x004d4624 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e06b8 ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4800 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4844 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_VFD_0_REG_START 0x00600800 ++#define BCHP_VFD_0_REG_END 0x006009fc ++#define BCHP_VFD_1_REG_START 0x00600c00 ++#define BCHP_VFD_1_REG_END 0x00600dfc ++#define BCHP_RDC_REG_START 0x00601000 ++#define BCHP_RDC_REG_END 0x00601cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00602000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060202c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00602100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060212c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00602300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060232c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00602500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060252c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00602600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060262c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00602700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060272c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00602900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060292c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00602f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00602f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00603000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060302c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00603200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060322c ++#define BCHP_FMISC_REG_START 0x00604000 ++#define BCHP_FMISC_REG_END 0x0060401c ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_VNET_F_REG_START 0x00620800 ++#define BCHP_VNET_F_REG_END 0x006209fc ++#define BCHP_VNET_B_REG_START 0x00620a00 ++#define BCHP_VNET_B_REG_END 0x00620bfc ++#define BCHP_MMISC_REG_START 0x00621000 ++#define BCHP_MMISC_REG_END 0x0062101c ++#define BCHP_LBOX_0_REG_START 0x00622000 ++#define BCHP_LBOX_0_REG_END 0x00622070 ++#define BCHP_DNR_0_REG_START 0x00622200 ++#define BCHP_DNR_0_REG_END 0x006222a4 ++#define BCHP_DNR_1_REG_START 0x00622400 ++#define BCHP_DNR_1_REG_END 0x006224a4 ++#define BCHP_XSRC_0_REG_START 0x00622800 ++#define BCHP_XSRC_0_REG_END 0x00622888 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00622c00 ++#define BCHP_BVNM_INTR2_0_REG_END 0x00622c2c ++#define BCHP_DMISC_REG_START 0x00640000 ++#define BCHP_DMISC_REG_END 0x0064001c ++#define BCHP_MVP_TOP_0_REG_START 0x00650000 ++#define BCHP_MVP_TOP_0_REG_END 0x00650038 ++#define BCHP_SIOB_0_REG_START 0x00650200 ++#define BCHP_SIOB_0_REG_END 0x006502fc ++#define BCHP_HSCL_0_REG_START 0x00650400 ++#define BCHP_HSCL_0_REG_END 0x006507fc ++#define BCHP_MDI_TOP_0_REG_START 0x00652000 ++#define BCHP_MDI_TOP_0_REG_END 0x006520fc ++#define BCHP_MDI_PPB_0_REG_START 0x00652800 ++#define BCHP_MDI_PPB_0_REG_END 0x00652bfc ++#define BCHP_MDI_FCN_0_REG_START 0x00652c00 ++#define BCHP_MDI_FCN_0_REG_END 0x00652ffc ++#define BCHP_CAP_0_REG_START 0x00680000 ++#define BCHP_CAP_0_REG_END 0x0068010c ++#define BCHP_CAP_1_REG_START 0x00680200 ++#define BCHP_CAP_1_REG_END 0x0068030c ++#define BCHP_GFD_0_REG_START 0x00680400 ++#define BCHP_GFD_0_REG_END 0x0068062c ++#define BCHP_GFD_1_REG_START 0x00680800 ++#define BCHP_GFD_1_REG_END 0x00680a2c ++#define BCHP_CMP_0_REG_START 0x00681000 ++#define BCHP_CMP_0_REG_END 0x006814c0 ++#define BCHP_CMP_1_REG_START 0x00681800 ++#define BCHP_CMP_1_REG_END 0x00681a60 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00682000 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006820a4 ++#define BCHP_MASK_0_REG_START 0x00682400 ++#define BCHP_MASK_0_REG_END 0x00682420 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00684000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00685284 ++#define BCHP_BVNB_INTR2_REG_START 0x00686000 ++#define BCHP_BVNB_INTR2_REG_END 0x0068602c ++#define BCHP_BMISC_REG_START 0x00686400 ++#define BCHP_BMISC_REG_END 0x0068641c ++#define BCHP_MISC_REG_START 0x006a0000 ++#define BCHP_MISC_REG_END 0x006a0098 ++#define BCHP_IT_0_REG_START 0x006a1000 ++#define BCHP_IT_0_REG_END 0x006a17fc ++#define BCHP_IT_1_REG_START 0x006a2000 ++#define BCHP_IT_1_REG_END 0x006a27fc ++#define BCHP_VF_0_REG_START 0x006a3000 ++#define BCHP_VF_0_REG_END 0x006a3134 ++#define BCHP_SECAM_0_REG_START 0x006a3200 ++#define BCHP_SECAM_0_REG_END 0x006a3214 ++#define BCHP_SM_0_REG_START 0x006a3280 ++#define BCHP_SM_0_REG_END 0x006a32ac ++#define BCHP_SDSRC_0_REG_START 0x006a3300 ++#define BCHP_SDSRC_0_REG_END 0x006a330c ++#define BCHP_HDSRC_0_REG_START 0x006a3320 ++#define BCHP_HDSRC_0_REG_END 0x006a333c ++#define BCHP_CSC_0_REG_START 0x006a3380 ++#define BCHP_CSC_0_REG_END 0x006a33b0 ++#define BCHP_RM_0_REG_START 0x006a3400 ++#define BCHP_RM_0_REG_END 0x006a3430 ++#define BCHP_RM_1_REG_START 0x006a3440 ++#define BCHP_RM_1_REG_END 0x006a3470 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006a3500 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006a3544 ++#define BCHP_GRPD_0_REG_START 0x006a3600 ++#define BCHP_GRPD_0_REG_END 0x006a36ec ++#define BCHP_DVI_MISC_0_REG_START 0x006a3700 ++#define BCHP_DVI_MISC_0_REG_END 0x006a3700 ++#define BCHP_DVI_DTG_0_REG_START 0x006a4000 ++#define BCHP_DVI_DTG_0_REG_END 0x006a4488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006a4800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006a4830 ++#define BCHP_DVI_CSC_0_REG_START 0x006a4900 ++#define BCHP_DVI_CSC_0_REG_END 0x006a4930 ++#define BCHP_DVI_FC_0_REG_START 0x006a4a00 ++#define BCHP_DVI_FC_0_REG_END 0x006a4a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006a4b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006a4b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006a4c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006a4c44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006a5000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006a5488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006a5600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006a5630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006a5700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006a5718 ++#define BCHP_ITU656_0_REG_START 0x006a5800 ++#define BCHP_ITU656_0_REG_END 0x006a5820 ++#define BCHP_VEC_CFG_REG_START 0x006a5c00 ++#define BCHP_VEC_CFG_REG_END 0x006a5d2c ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006a6000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006a602c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006a6200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006a6320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006a6400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006a645c ++#define BCHP_DSCL_0_REG_START 0x006a6800 ++#define BCHP_DSCL_0_REG_END 0x006a6bfc ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006a7000 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006a7008 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006a7100 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006a712c ++#define BCHP_DVP_TVG_0_REG_START 0x006a7200 ++#define BCHP_DVP_TVG_0_REG_END 0x006a7288 ++#define BCHP_VBI_ENC_REG_START 0x006a8000 ++#define BCHP_VBI_ENC_REG_END 0x006a8074 ++#define BCHP_CCE_0_REG_START 0x006a8400 ++#define BCHP_CCE_0_REG_END 0x006a8458 ++#define BCHP_WSE_0_REG_START 0x006a8500 ++#define BCHP_WSE_0_REG_END 0x006a8514 ++#define BCHP_CGMSAE_0_REG_START 0x006a8600 ++#define BCHP_CGMSAE_0_REG_END 0x006a8658 ++#define BCHP_TTE_0_REG_START 0x006a8700 ++#define BCHP_TTE_0_REG_END 0x006a8728 ++#define BCHP_GSE_0_REG_START 0x006a8800 ++#define BCHP_GSE_0_REG_END 0x006a8880 ++#define BCHP_AMOLE_0_REG_START 0x006a8900 ++#define BCHP_AMOLE_0_REG_END 0x006a898c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006a8a00 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006a8a54 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006a8b00 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006a8b0c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006a8c00 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006a8c28 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006a8d00 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006a8d80 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006a8e00 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006a8e8c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006a8f00 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006a8f24 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x006af000 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x006af224 ++#define BCHP_VICE2_VIP_TOP_REG_START 0x006af800 ++#define BCHP_VICE2_VIP_TOP_REG_END 0x006af80c ++#define BCHP_DVP_HR_REG_START 0x006b0000 ++#define BCHP_DVP_HR_REG_END 0x006b03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x006b0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x006b042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x006b0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x006b0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x006b0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x006b090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x006b0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x006b0c28 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x006b1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x006b11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x006b1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x006b13fc ++#define BCHP_HDMI_RX_0_REG_START 0x006b2000 ++#define BCHP_HDMI_RX_0_REG_END 0x006b27fc ++#define BCHP_HDCP2_RX_0_REG_START 0x006b2800 ++#define BCHP_HDCP2_RX_0_REG_END 0x006b29fc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x006b2a00 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x006b2a2c ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_START 0x006b2a40 ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_END 0x006b2a6c ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_START 0x006b2a80 ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_END 0x006b2aac ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_START 0x006b2ac0 ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_END 0x006b2ad4 ++#define BCHP_HD_DVI_0_REG_START 0x006b4000 ++#define BCHP_HD_DVI_0_REG_END 0x006b427c ++#define BCHP_DVP_HR_TMR_REG_START 0x006b4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x006b4cfc ++#define BCHP_DVP_HT_REG_START 0x006b8000 ++#define BCHP_DVP_HT_REG_END 0x006b8114 ++#define BCHP_HDMI_REG_START 0x006b8800 ++#define BCHP_HDMI_REG_END 0x006b8afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006b8b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006b8dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006b8e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006b8e7c ++#define BCHP_HDMI_RM_REG_START 0x006b8e80 ++#define BCHP_HDMI_RM_REG_END 0x006b8eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006b8f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006b8f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006b8f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006b8fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006b9000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006b902c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006b9080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006b90ac ++#define BCHP_HDMI_RAM_REG_START 0x006b9100 ++#define BCHP_HDMI_RAM_REG_END 0x006b92fc ++#define BCHP_BVN_RGR_REG_START 0x006c0000 ++#define BCHP_BVN_RGR_REG_END 0x006c0010 ++#define BCHP_MEMC_GEN_0_REG_START 0x00900000 ++#define BCHP_MEMC_GEN_0_REG_END 0x009007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x00900800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x009008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x00900a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x00900afc ++#define BCHP_MEMC_ARC_0_REG_START 0x00900c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x00900f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x00901000 ++#define BCHP_MEMC_ARB_0_REG_END 0x009014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x00902000 ++#define BCHP_MEMC_DDR_0_REG_END 0x009027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x00903000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x00903044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x00903200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x00903244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x00903400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x00903444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x00903800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x009039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x00904000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x00904010 ++#define BCHP_MEMC_MISC_0_REG_START 0x00905000 ++#define BCHP_MEMC_MISC_0_REG_END 0x00905010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x00906000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x00906218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x00906400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x00906518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x00906600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x00906718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x00906800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x00906918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x00906a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x00906b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x00906c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x00906d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x00908000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x009080e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x00940000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0097fffc ++#define BCHP_S_MEMC_0_REG_START 0x00980000 ++#define BCHP_S_MEMC_0_REG_END 0x00980780 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02078 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f8 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02178 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f8 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02278 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f8 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02378 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f8 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02478 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f8 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02578 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f8 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02678 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f8 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e178 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_CH0_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_CH0_REG_END 0x00a6a0fc ++#define BCHP_XPT_WDMA_CH1_REG_START 0x00a6a100 ++#define BCHP_XPT_WDMA_CH1_REG_END 0x00a6a1fc ++#define BCHP_XPT_WDMA_CH2_REG_START 0x00a6a200 ++#define BCHP_XPT_WDMA_CH2_REG_END 0x00a6a2fc ++#define BCHP_XPT_WDMA_CH3_REG_START 0x00a6a300 ++#define BCHP_XPT_WDMA_CH3_REG_END 0x00a6a3fc ++#define BCHP_XPT_WDMA_CH4_REG_START 0x00a6a400 ++#define BCHP_XPT_WDMA_CH4_REG_END 0x00a6a4fc ++#define BCHP_XPT_WDMA_CH5_REG_START 0x00a6a500 ++#define BCHP_XPT_WDMA_CH5_REG_END 0x00a6a5fc ++#define BCHP_XPT_WDMA_CH6_REG_START 0x00a6a600 ++#define BCHP_XPT_WDMA_CH6_REG_END 0x00a6a6fc ++#define BCHP_XPT_WDMA_CH7_REG_START 0x00a6a700 ++#define BCHP_XPT_WDMA_CH7_REG_END 0x00a6a7fc ++#define BCHP_XPT_WDMA_CH8_REG_START 0x00a6a800 ++#define BCHP_XPT_WDMA_CH8_REG_END 0x00a6a8fc ++#define BCHP_XPT_WDMA_CH9_REG_START 0x00a6a900 ++#define BCHP_XPT_WDMA_CH9_REG_END 0x00a6a9fc ++#define BCHP_XPT_WDMA_CH10_REG_START 0x00a6aa00 ++#define BCHP_XPT_WDMA_CH10_REG_END 0x00a6aafc ++#define BCHP_XPT_WDMA_CH11_REG_START 0x00a6ab00 ++#define BCHP_XPT_WDMA_CH11_REG_END 0x00a6abfc ++#define BCHP_XPT_WDMA_CH12_REG_START 0x00a6ac00 ++#define BCHP_XPT_WDMA_CH12_REG_END 0x00a6acfc ++#define BCHP_XPT_WDMA_CH13_REG_START 0x00a6ad00 ++#define BCHP_XPT_WDMA_CH13_REG_END 0x00a6adfc ++#define BCHP_XPT_WDMA_CH14_REG_START 0x00a6ae00 ++#define BCHP_XPT_WDMA_CH14_REG_END 0x00a6aefc ++#define BCHP_XPT_WDMA_CH15_REG_START 0x00a6af00 ++#define BCHP_XPT_WDMA_CH15_REG_END 0x00a6affc ++#define BCHP_XPT_WDMA_CH16_REG_START 0x00a6b000 ++#define BCHP_XPT_WDMA_CH16_REG_END 0x00a6b0fc ++#define BCHP_XPT_WDMA_CH17_REG_START 0x00a6b100 ++#define BCHP_XPT_WDMA_CH17_REG_END 0x00a6b1fc ++#define BCHP_XPT_WDMA_CH18_REG_START 0x00a6b200 ++#define BCHP_XPT_WDMA_CH18_REG_END 0x00a6b2fc ++#define BCHP_XPT_WDMA_CH19_REG_START 0x00a6b300 ++#define BCHP_XPT_WDMA_CH19_REG_END 0x00a6b3fc ++#define BCHP_XPT_WDMA_CH20_REG_START 0x00a6b400 ++#define BCHP_XPT_WDMA_CH20_REG_END 0x00a6b4fc ++#define BCHP_XPT_WDMA_CH21_REG_START 0x00a6b500 ++#define BCHP_XPT_WDMA_CH21_REG_END 0x00a6b5fc ++#define BCHP_XPT_WDMA_CH22_REG_START 0x00a6b600 ++#define BCHP_XPT_WDMA_CH22_REG_END 0x00a6b6fc ++#define BCHP_XPT_WDMA_CH23_REG_START 0x00a6b700 ++#define BCHP_XPT_WDMA_CH23_REG_END 0x00a6b7fc ++#define BCHP_XPT_WDMA_CH24_REG_START 0x00a6b800 ++#define BCHP_XPT_WDMA_CH24_REG_END 0x00a6b8fc ++#define BCHP_XPT_WDMA_CH25_REG_START 0x00a6b900 ++#define BCHP_XPT_WDMA_CH25_REG_END 0x00a6b9fc ++#define BCHP_XPT_WDMA_CH26_REG_START 0x00a6ba00 ++#define BCHP_XPT_WDMA_CH26_REG_END 0x00a6bafc ++#define BCHP_XPT_WDMA_CH27_REG_START 0x00a6bb00 ++#define BCHP_XPT_WDMA_CH27_REG_END 0x00a6bbfc ++#define BCHP_XPT_WDMA_CH28_REG_START 0x00a6bc00 ++#define BCHP_XPT_WDMA_CH28_REG_END 0x00a6bcfc ++#define BCHP_XPT_WDMA_CH29_REG_START 0x00a6bd00 ++#define BCHP_XPT_WDMA_CH29_REG_END 0x00a6bdfc ++#define BCHP_XPT_WDMA_CH30_REG_START 0x00a6be00 ++#define BCHP_XPT_WDMA_CH30_REG_END 0x00a6befc ++#define BCHP_XPT_WDMA_CH31_REG_START 0x00a6bf00 ++#define BCHP_XPT_WDMA_CH31_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b60000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b60010 ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b60040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b6004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b60080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b600b4 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b60200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b6022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b60240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b6026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b60300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b603b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b60600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b60628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b60800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b60ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b62000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b630d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b64000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b65084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b68000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b6fc48 ++#define BCHP_GENET_1_SYS_REG_START 0x00b80000 ++#define BCHP_GENET_1_SYS_REG_END 0x00b80010 ++#define BCHP_GENET_1_GR_BRIDGE_REG_START 0x00b80040 ++#define BCHP_GENET_1_GR_BRIDGE_REG_END 0x00b8004c ++#define BCHP_GENET_1_EXT_REG_START 0x00b80080 ++#define BCHP_GENET_1_EXT_REG_END 0x00b800b4 ++#define BCHP_GENET_1_INTRL2_0_REG_START 0x00b80200 ++#define BCHP_GENET_1_INTRL2_0_REG_END 0x00b8022c ++#define BCHP_GENET_1_INTRL2_1_REG_START 0x00b80240 ++#define BCHP_GENET_1_INTRL2_1_REG_END 0x00b8026c ++#define BCHP_GENET_1_RBUF_REG_START 0x00b80300 ++#define BCHP_GENET_1_RBUF_REG_END 0x00b803b4 ++#define BCHP_GENET_1_TBUF_REG_START 0x00b80600 ++#define BCHP_GENET_1_TBUF_REG_END 0x00b80628 ++#define BCHP_GENET_1_UMAC_REG_START 0x00b80800 ++#define BCHP_GENET_1_UMAC_REG_END 0x00b80ed8 ++#define BCHP_GENET_1_RDMA_REG_START 0x00b82000 ++#define BCHP_GENET_1_RDMA_REG_END 0x00b830d4 ++#define BCHP_GENET_1_TDMA_REG_START 0x00b84000 ++#define BCHP_GENET_1_TDMA_REG_END 0x00b85084 ++#define BCHP_GENET_1_HFB_REG_START 0x00b88000 ++#define BCHP_GENET_1_HFB_REG_END 0x00b8fc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea040 ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea138 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea80c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa64 ++#define BCHP_V3D_DBG_REG_START 0x00beae00 ++#define BCHP_V3D_DBG_REG_END 0x00beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2108c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21678 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_TIMER_INT_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_TIMER_INT_REG_END 0x00c22414 ++#define BCHP_RAAGA_DSP_ERROR_INT_REG_START 0x00c22600 ++#define BCHP_RAAGA_DSP_ERROR_INT_REG_END 0x00c22614 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22800 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2282c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_RAAGA_AX_MISC_REG_START 0x00c40000 ++#define BCHP_RAAGA_AX_MISC_REG_END 0x00c40004 ++#define BCHP_RAAGA_AX_INTR_AGGR_REG_START 0x00c40100 ++#define BCHP_RAAGA_AX_INTR_AGGR_REG_END 0x00c40144 ++#define BCHP_RAAGA_AX_RXI_ARB_REG_START 0x00c40200 ++#define BCHP_RAAGA_AX_RXI_ARB_REG_END 0x00c40248 ++#define BCHP_RAAGA_AX_DBLK_WATCHDOG_REG_START 0x00c40300 ++#define BCHP_RAAGA_AX_DBLK_WATCHDOG_REG_END 0x00c40314 ++#define BCHP_RAAGA_AX_EC_WATCHDOG_REG_START 0x00c40400 ++#define BCHP_RAAGA_AX_EC_WATCHDOG_REG_END 0x00c40414 ++#define BCHP_RAAGA_AX_ME_WATCHDOG_REG_START 0x00c40500 ++#define BCHP_RAAGA_AX_ME_WATCHDOG_REG_END 0x00c40514 ++#define BCHP_RAAGA_AX_GENAX_WATCHDOG_REG_START 0x00c40600 ++#define BCHP_RAAGA_AX_GENAX_WATCHDOG_REG_END 0x00c40614 ++#define BCHP_RAAGA_AX_DBLK_REG_START 0x00c41000 ++#define BCHP_RAAGA_AX_DBLK_REG_END 0x00c411fc ++#define BCHP_RAAGA_AX_EC_REG_START 0x00c42000 ++#define BCHP_RAAGA_AX_EC_REG_END 0x00c42158 ++#define BCHP_RAAGA_AX_ME_REG_START 0x00c43000 ++#define BCHP_RAAGA_AX_ME_REG_END 0x00c4321c ++#define BCHP_RAAGA_AX_GENAX_REG_START 0x00c44000 ++#define BCHP_RAAGA_AX_GENAX_REG_END 0x00c44650 ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb02b4 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_END 0x00cb03b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb0f30 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1524 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb165c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb18fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb20ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb2864 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb2900 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb2964 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++#define BCHP_LEAP_ROM_REG_START 0x01000000 ++#define BCHP_LEAP_ROM_REG_END 0x01007ffc ++#define BCHP_LEAP_PROG0_MEM_REG_START 0x01040000 ++#define BCHP_LEAP_PROG0_MEM_REG_END 0x01047ffc ++#define BCHP_LEAP_CPU_CORE_REGS_REG_START 0x010a0000 ++#define BCHP_LEAP_CPU_CORE_REGS_REG_END 0x010a00fc ++#define BCHP_LEAP_CPU_AUX_REGS_REG_START 0x010c0000 ++#define BCHP_LEAP_CPU_AUX_REGS_REG_END 0x010c10c4 ++#define BCHP_LEAP_HAB_MEM_REG_START 0x010c8000 ++#define BCHP_LEAP_HAB_MEM_REG_END 0x010c83fc ++#define BCHP_LEAP_UART_REG_START 0x010c9000 ++#define BCHP_LEAP_UART_REG_END 0x010c9ffc ++#define BCHP_LEAP_WDG_REG_START 0x010ca000 ++#define BCHP_LEAP_WDG_REG_END 0x010caffc ++#define BCHP_LEAP_CTRL_REG_START 0x01100000 ++#define BCHP_LEAP_CTRL_REG_END 0x01100310 ++#define BCHP_LEAP_L1_REG_START 0x01100400 ++#define BCHP_LEAP_L1_REG_END 0x01100418 ++#define BCHP_LEAP_L2_REG_START 0x01100500 ++#define BCHP_LEAP_L2_REG_END 0x01100514 ++#define BCHP_LEAP_HOST_L1_REG_START 0x01100600 ++#define BCHP_LEAP_HOST_L1_REG_END 0x01100618 ++#define BCHP_LEAP_HOST_L2_REG_START 0x01100700 ++#define BCHP_LEAP_HOST_L2_REG_END 0x0110072c ++#define BCHP_LEAP_CTRL_MISC_REG_START 0x01100800 ++#define BCHP_LEAP_CTRL_MISC_REG_END 0x01100848 ++#define BCHP_LEAP_ROM_PATCH_REG_START 0x01100a00 ++#define BCHP_LEAP_ROM_PATCH_REG_END 0x01100a3c ++#define BCHP_LEAP_RGR_BRIDGE_REG_START 0x01100b00 ++#define BCHP_LEAP_RGR_BRIDGE_REG_END 0x01100b10 ++#define BCHP_FTM_UART_REG_START 0x01210000 ++#define BCHP_FTM_UART_REG_END 0x012100fc ++#define BCHP_FTM_PHY_REG_START 0x01210000 ++#define BCHP_FTM_PHY_REG_END 0x012101fc ++#define BCHP_FTM_PHY_ANA_REG_START 0x01210000 ++#define BCHP_FTM_PHY_ANA_REG_END 0x01210208 ++#define BCHP_FTM_SKIT_REG_START 0x01210000 ++#define BCHP_FTM_SKIT_REG_END 0x01210248 ++#define BCHP_FTM_INTR2_REG_START 0x01210000 ++#define BCHP_FTM_INTR2_REG_END 0x0121032c ++#define BCHP_FTM_SW_SPARE_REG_START 0x01210000 ++#define BCHP_FTM_SW_SPARE_REG_END 0x01210334 ++#define BCHP_SDS_DSEC_0_REG_START 0x01218000 ++#define BCHP_SDS_DSEC_0_REG_END 0x012180d4 ++#define BCHP_SDS_DSEC_INTR2_0_REG_START 0x01218100 ++#define BCHP_SDS_DSEC_INTR2_0_REG_END 0x0121812c ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_START 0x01218140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_END 0x0121814c ++#define BCHP_SDS_DSEC_AP_0_REG_START 0x01218150 ++#define BCHP_SDS_DSEC_AP_0_REG_END 0x01218158 ++#define BCHP_SDS_DSEC_1_REG_START 0x01219000 ++#define BCHP_SDS_DSEC_1_REG_END 0x012190d4 ++#define BCHP_SDS_DSEC_INTR2_1_REG_START 0x01219100 ++#define BCHP_SDS_DSEC_INTR2_1_REG_END 0x0121912c ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_START 0x01219140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_END 0x0121914c ++#define BCHP_SDS_DSEC_AP_1_REG_START 0x01219150 ++#define BCHP_SDS_DSEC_AP_1_REG_END 0x01219158 ++#define BCHP_SDS_DSEC_2_REG_START 0x0121a000 ++#define BCHP_SDS_DSEC_2_REG_END 0x0121a0d4 ++#define BCHP_SDS_DSEC_INTR2_2_REG_START 0x0121a100 ++#define BCHP_SDS_DSEC_INTR2_2_REG_END 0x0121a12c ++#define BCHP_SDS_DSEC_GR_BRIDGE_2_REG_START 0x0121a140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_2_REG_END 0x0121a14c ++#define BCHP_SDS_DSEC_AP_2_REG_START 0x0121a150 ++#define BCHP_SDS_DSEC_AP_2_REG_END 0x0121a158 ++#define BCHP_SDS_DSEC_3_REG_START 0x0121b000 ++#define BCHP_SDS_DSEC_3_REG_END 0x0121b0d4 ++#define BCHP_SDS_DSEC_INTR2_3_REG_START 0x0121b100 ++#define BCHP_SDS_DSEC_INTR2_3_REG_END 0x0121b12c ++#define BCHP_SDS_DSEC_GR_BRIDGE_3_REG_START 0x0121b140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_3_REG_END 0x0121b14c ++#define BCHP_SDS_DSEC_AP_3_REG_START 0x0121b150 ++#define BCHP_SDS_DSEC_AP_3_REG_END 0x0121b158 ++#define BCHP_STB_CHAN_CTRL_REG_START 0x0121c000 ++#define BCHP_STB_CHAN_CTRL_REG_END 0x0121c03c ++#define BCHP_STB_CHAN_CH0_REG_START 0x0121c100 ++#define BCHP_STB_CHAN_CH0_REG_END 0x0121c1ec ++#define BCHP_STB_CHAN_CH1_REG_START 0x0121c200 ++#define BCHP_STB_CHAN_CH1_REG_END 0x0121c2ec ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_START 0x01224000 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_END 0x01224118 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_START 0x01224800 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_END 0x0122482c ++#define BCHP_BAC_MSPI_REG_START 0x01225000 ++#define BCHP_BAC_MSPI_REG_END 0x01225018 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_START 0x01225800 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_END 0x01225810 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_START 0x01226000 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_END 0x01226094 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_START 0x01230000 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_END 0x01230474 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_START 0x01230800 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_END 0x0123082c ++#define BCHP_AIF_WB_SAT_ANA_0_REG_START 0x01231000 ++#define BCHP_AIF_WB_SAT_ANA_0_REG_END 0x012310c0 ++#define BCHP_SDS_CG_0_REG_START 0x01240000 ++#define BCHP_SDS_CG_0_REG_END 0x0124003c ++#define BCHP_SDS_FE_0_REG_START 0x01240080 ++#define BCHP_SDS_FE_0_REG_END 0x012400bc ++#define BCHP_SDS_BL_0_REG_START 0x01240140 ++#define BCHP_SDS_BL_0_REG_END 0x01240160 ++#define BCHP_SDS_CL_0_REG_START 0x01240180 ++#define BCHP_SDS_CL_0_REG_END 0x012401fc ++#define BCHP_SDS_EQ_0_REG_START 0x01240200 ++#define BCHP_SDS_EQ_0_REG_END 0x0124028c ++#define BCHP_SDS_HP_0_REG_START 0x01240300 ++#define BCHP_SDS_HP_0_REG_END 0x012403e8 ++#define BCHP_SDS_VIT_0_REG_START 0x01240400 ++#define BCHP_SDS_VIT_0_REG_END 0x01240428 ++#define BCHP_SDS_FEC_0_REG_START 0x01240440 ++#define BCHP_SDS_FEC_0_REG_END 0x01240454 ++#define BCHP_SDS_OI_0_REG_START 0x01240480 ++#define BCHP_SDS_OI_0_REG_END 0x012404cc ++#define BCHP_SDS_SNR_0_REG_START 0x01240500 ++#define BCHP_SDS_SNR_0_REG_END 0x01240518 ++#define BCHP_SDS_BERT_0_REG_START 0x01240540 ++#define BCHP_SDS_BERT_0_REG_END 0x01240568 ++#define BCHP_SDS_DFT_0_REG_START 0x01240580 ++#define BCHP_SDS_DFT_0_REG_END 0x012405a8 ++#define BCHP_SDS_CWC_0_REG_START 0x01240600 ++#define BCHP_SDS_CWC_0_REG_END 0x01240694 ++#define BCHP_SDS_MISC_0_REG_START 0x01240700 ++#define BCHP_SDS_MISC_0_REG_END 0x01240798 ++#define BCHP_SDS_INTR2_0_0_REG_START 0x01240a00 ++#define BCHP_SDS_INTR2_0_0_REG_END 0x01240a2c ++#define BCHP_SDS_GR_BRIDGE_0_REG_START 0x01240c00 ++#define BCHP_SDS_GR_BRIDGE_0_REG_END 0x01240c0c ++#define BCHP_SDS_CG_1_REG_START 0x01241000 ++#define BCHP_SDS_CG_1_REG_END 0x0124103c ++#define BCHP_SDS_FE_1_REG_START 0x01241080 ++#define BCHP_SDS_FE_1_REG_END 0x012410bc ++#define BCHP_SDS_BL_1_REG_START 0x01241140 ++#define BCHP_SDS_BL_1_REG_END 0x01241160 ++#define BCHP_SDS_CL_1_REG_START 0x01241180 ++#define BCHP_SDS_CL_1_REG_END 0x012411fc ++#define BCHP_SDS_EQ_1_REG_START 0x01241200 ++#define BCHP_SDS_EQ_1_REG_END 0x0124128c ++#define BCHP_SDS_HP_1_REG_START 0x01241300 ++#define BCHP_SDS_HP_1_REG_END 0x012413e8 ++#define BCHP_SDS_VIT_1_REG_START 0x01241400 ++#define BCHP_SDS_VIT_1_REG_END 0x01241428 ++#define BCHP_SDS_FEC_1_REG_START 0x01241440 ++#define BCHP_SDS_FEC_1_REG_END 0x01241454 ++#define BCHP_SDS_OI_1_REG_START 0x01241480 ++#define BCHP_SDS_OI_1_REG_END 0x012414cc ++#define BCHP_SDS_SNR_1_REG_START 0x01241500 ++#define BCHP_SDS_SNR_1_REG_END 0x01241518 ++#define BCHP_SDS_BERT_1_REG_START 0x01241540 ++#define BCHP_SDS_BERT_1_REG_END 0x01241568 ++#define BCHP_SDS_DFT_1_REG_START 0x01241580 ++#define BCHP_SDS_DFT_1_REG_END 0x012415a8 ++#define BCHP_SDS_CWC_1_REG_START 0x01241600 ++#define BCHP_SDS_CWC_1_REG_END 0x01241694 ++#define BCHP_SDS_MISC_1_REG_START 0x01241700 ++#define BCHP_SDS_MISC_1_REG_END 0x01241798 ++#define BCHP_SDS_INTR2_0_1_REG_START 0x01241a00 ++#define BCHP_SDS_INTR2_0_1_REG_END 0x01241a2c ++#define BCHP_SDS_GR_BRIDGE_1_REG_START 0x01241c00 ++#define BCHP_SDS_GR_BRIDGE_1_REG_END 0x01241c0c ++#define BCHP_TFEC_0_REG_START 0x01248000 ++#define BCHP_TFEC_0_REG_END 0x01248060 ++#define BCHP_TFEC_MISC_0_REG_START 0x01248100 ++#define BCHP_TFEC_MISC_0_REG_END 0x01248108 ++#define BCHP_TFEC_INTR2_0_REG_START 0x01248200 ++#define BCHP_TFEC_INTR2_0_REG_END 0x0124822c ++#define BCHP_TFEC_GR_BRIDGE_0_REG_START 0x01248300 ++#define BCHP_TFEC_GR_BRIDGE_0_REG_END 0x0124830c ++#define BCHP_TFEC_1_REG_START 0x01249000 ++#define BCHP_TFEC_1_REG_END 0x01249060 ++#define BCHP_TFEC_MISC_1_REG_START 0x01249100 ++#define BCHP_TFEC_MISC_1_REG_END 0x01249108 ++#define BCHP_TFEC_INTR2_1_REG_START 0x01249200 ++#define BCHP_TFEC_INTR2_1_REG_END 0x0124922c ++#define BCHP_TFEC_GR_BRIDGE_1_REG_START 0x01249300 ++#define BCHP_TFEC_GR_BRIDGE_1_REG_END 0x0124930c ++#define BCHP_AFECNX_GLOBAL_0_REG_START 0x01250000 ++#define BCHP_AFECNX_GLOBAL_0_REG_END 0x01250010 ++#define BCHP_AFECNX_0_REG_START 0x01250100 ++#define BCHP_AFECNX_0_REG_END 0x01250144 ++#define BCHP_AFEC0_0_REG_START 0x01251000 ++#define BCHP_AFEC0_0_REG_END 0x01251a0c ++#define BCHP_AFEC1_0_REG_START 0x01252000 ++#define BCHP_AFEC1_0_REG_END 0x01252a0c ++#define BCHP_AFEC0_INTR_0_REG_START 0x01253000 ++#define BCHP_AFEC0_INTR_0_REG_END 0x0125302c ++#define BCHP_AFEC1_INTR_0_REG_START 0x01253400 ++#define BCHP_AFEC1_INTR_0_REG_END 0x0125342c ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_START 0x01253800 ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_END 0x0125382c ++#define BCHP_AFEC_GR_BRIDGE_0_REG_START 0x01254000 ++#define BCHP_AFEC_GR_BRIDGE_0_REG_END 0x0125400c ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x01270200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x01270204 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_START 0x01270300 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_END 0x01270304 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x01271000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x01271fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x01272000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x012737fc ++#define BCHP_DS_TOPM_REG_START 0x01282000 ++#define BCHP_DS_TOPM_REG_END 0x01282068 ++#define BCHP_DS_TOPS_REG_START 0x01283000 ++#define BCHP_DS_TOPS_REG_END 0x0128309c ++#define BCHP_DS_REG_START 0x01284000 ++#define BCHP_DS_REG_END 0x0128509c ++#define BCHP_T2_BICM_SYS_REG_START 0x01290000 ++#define BCHP_T2_BICM_SYS_REG_END 0x0129001c ++#define BCHP_T2_BICM_INTR2_0_REG_START 0x01290200 ++#define BCHP_T2_BICM_INTR2_0_REG_END 0x0129022c ++#define BCHP_T2_BICM_INTR2_1_REG_START 0x01290300 ++#define BCHP_T2_BICM_INTR2_1_REG_END 0x0129032c ++#define BCHP_T2_BICM_CORE_REG_START 0x01290400 ++#define BCHP_T2_BICM_CORE_REG_END 0x0129068c ++#define BCHP_T2_INTR_REG_START 0x012a0000 ++#define BCHP_T2_INTR_REG_END 0x012a002c ++#define BCHP_T2_INTR_OI_REG_START 0x012a0200 ++#define BCHP_T2_INTR_OI_REG_END 0x012a022c ++#define BCHP_T2_GLB_REG_START 0x012a0400 ++#define BCHP_T2_GLB_REG_END 0x012a04c4 ++#define BCHP_T2_FE_REG_START 0x012a0600 ++#define BCHP_T2_FE_REG_END 0x012a069c ++#define BCHP_T2_OFDM_REG_START 0x012a0800 ++#define BCHP_T2_OFDM_REG_END 0x012a0c88 ++#define BCHP_T2_FEC_REG_START 0x012a1000 ++#define BCHP_T2_FEC_REG_END 0x012a10d0 ++#define BCHP_T2_OI_REG_START 0x012a1200 ++#define BCHP_T2_OI_REG_END 0x012a13b8 ++#define BCHP_UFE_AFE_REG_START 0x012b0000 ++#define BCHP_UFE_AFE_REG_END 0x012b0108 ++#define BCHP_SDADC_REG_START 0x012b0200 ++#define BCHP_SDADC_REG_END 0x012b0210 ++#define BCHP_UFE_MISC_REG_START 0x012b0600 ++#define BCHP_UFE_MISC_REG_END 0x012b06dc ++#define BCHP_UFE_GR_BRIDGE_REG_START 0x012b0700 ++#define BCHP_UFE_GR_BRIDGE_REG_END 0x012b070c ++#define BCHP_UFE_MISC2_REG_START 0x012b0780 ++#define BCHP_UFE_MISC2_REG_END 0x012b07ec ++#define BCHP_UFE_REG_START 0x012b0800 ++#define BCHP_UFE_REG_END 0x012b0868 ++#define BCHP_UFE_SAW_REG_START 0x012b0900 ++#define BCHP_UFE_SAW_REG_END 0x012b0980 ++#define BCHP_HRC_REG_START 0x012b1000 ++#define BCHP_HRC_REG_END 0x012b1018 ++#define BCHP_DFE_MISCDEC_REG_START 0x0133c000 ++#define BCHP_DFE_MISCDEC_REG_END 0x0133c18c ++#define BCHP_DFE_UCDEC_REG_START 0x0133c200 ++#define BCHP_DFE_UCDEC_REG_END 0x0133c2fc ++#define BCHP_DFE_AGCDEC_REG_START 0x0133c340 ++#define BCHP_DFE_AGCDEC_REG_END 0x0133c7e8 ++#define BCHP_DFE_FEDEC_REG_START 0x0133c800 ++#define BCHP_DFE_FEDEC_REG_END 0x0133cbb8 ++#define BCHP_DFE_EQDEC_REG_START 0x0133cc00 ++#define BCHP_DFE_EQDEC_REG_END 0x0133ced4 ++#define BCHP_DFE_FECDEC_REG_START 0x0133d000 ++#define BCHP_DFE_FECDEC_REG_END 0x0133d0bc ++#define BCHP_DFE_OFSDEC_REG_START 0x0133d200 ++#define BCHP_DFE_OFSDEC_REG_END 0x0133d234 ++#define BCHP_DFE_BERTDEC_REG_START 0x0133d300 ++#define BCHP_DFE_BERTDEC_REG_END 0x0133d32c ++#define BCHP_DFE_NTSCDEC_REG_START 0x0133d400 ++#define BCHP_DFE_NTSCDEC_REG_END 0x0133d77c ++#define BCHP_DFE_MFDEC_REG_START 0x0133e000 ++#define BCHP_DFE_MFDEC_REG_END 0x0133fffc ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_START 0x01400000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_END 0x0141fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_START 0x01420000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_END 0x0143fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_START 0x01440000 ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_END 0x01447ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_START 0x01450000 ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_END 0x014500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_START 0x01451000 ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_END 0x01451a08 ++#define BCHP_RF4CE_CPU_UART_REG_START 0x01452000 ++#define BCHP_RF4CE_CPU_UART_REG_END 0x01452ffc ++#define BCHP_RF4CE_CPU_WDG_REG_START 0x01453000 ++#define BCHP_RF4CE_CPU_WDG_REG_END 0x01453ffc ++#define BCHP_RF4CE_CPU_CTRL_REG_START 0x01480000 ++#define BCHP_RF4CE_CPU_CTRL_REG_END 0x0148008c ++#define BCHP_RF4CE_CPU_L2_REG_START 0x01480300 ++#define BCHP_RF4CE_CPU_L2_REG_END 0x01480314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_START 0x01480500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_END 0x0148052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_START 0x01480800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_END 0x0148082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_START 0x01480a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_END 0x01480a2c ++#define BCHP_TX_REG_START 0x014c0000 ++#define BCHP_TX_REG_END 0x014c0020 ++#define BCHP_RX_REG_START 0x014d0000 ++#define BCHP_RX_REG_END 0x014d01e0 ++#define BCHP_RF_REG_START 0x014e0000 ++#define BCHP_RF_REG_END 0x014e0098 ++#define BCHP_VCOCAL_REG_START 0x014e0100 ++#define BCHP_VCOCAL_REG_END 0x014e0174 ++#define BCHP_KVCO_REG_START 0x014e0200 ++#define BCHP_KVCO_REG_END 0x014e0224 ++#define BCHP_PA_REG_START 0x014e0300 ++#define BCHP_PA_REG_END 0x014e0314 ++#define BCHP_MAC_REG_START 0x014e0400 ++#define BCHP_MAC_REG_END 0x014e0564 ++#define BCHP_PWR_MGT_L2_REG_START 0x014e0600 ++#define BCHP_PWR_MGT_L2_REG_END 0x014e0614 ++#define BCHP_MISC_L2_REG_START 0x014e0700 ++#define BCHP_MISC_L2_REG_END 0x014e0714 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_START 0x014e0800 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_END 0x014e0814 ++#define BCHP_SYMCNT6_L2_REG_START 0x014e0900 ++#define BCHP_SYMCNT6_L2_REG_END 0x014e0914 ++#define BCHP_TX_DONE_L2_REG_START 0x014e0a00 ++#define BCHP_TX_DONE_L2_REG_END 0x014e0a14 ++#define BCHP_RX_DONE_L2_REG_START 0x014e0b00 ++#define BCHP_RX_DONE_L2_REG_END 0x014e0b14 ++#define BCHP_RX_START_L2_REG_START 0x014e0c00 ++#define BCHP_RX_START_L2_REG_END 0x014e0c14 ++#define BCHP_SYMCNT7_L2_REG_START 0x014e0d00 ++#define BCHP_SYMCNT7_L2_REG_END 0x014e0d14 ++#define BCHP_GCI_0_REG_START 0x014e1000 ++#define BCHP_GCI_0_REG_END 0x014e120c ++#define BCHP_GCI_1_REG_START 0x014e1400 ++#define BCHP_GCI_1_REG_END 0x014e1604 ++#define BCHP_GCI_2_REG_START 0x014e1800 ++#define BCHP_GCI_2_REG_END 0x014e1a04 ++#define BCHP_MPM_CPU_PROG_MEM_REG_START 0x01500000 ++#define BCHP_MPM_CPU_PROG_MEM_REG_END 0x0150fffc ++#define BCHP_MPM_CPU_DATA_MEM_REG_START 0x01510000 ++#define BCHP_MPM_CPU_DATA_MEM_REG_END 0x01513ffc ++#define BCHP_MPM_CPU_CORE_REGS_REG_START 0x01520000 ++#define BCHP_MPM_CPU_CORE_REGS_REG_END 0x015200fc ++#define BCHP_MPM_CPU_AUX_REGS_REG_START 0x01522000 ++#define BCHP_MPM_CPU_AUX_REGS_REG_END 0x01523058 ++#define BCHP_MPM_UART_REG_START 0x01580000 ++#define BCHP_MPM_UART_REG_END 0x01580ffc ++#define BCHP_MPM_WDOG_REG_START 0x01581000 ++#define BCHP_MPM_WDOG_REG_END 0x01581ffc ++#define BCHP_MPM_CPU_L1_REG_START 0x01582000 ++#define BCHP_MPM_CPU_L1_REG_END 0x01582018 ++#define BCHP_MPM_CPU_L2_REG_START 0x01582100 ++#define BCHP_MPM_CPU_L2_REG_END 0x0158212c ++#define BCHP_MPM_HOST_L2_REG_START 0x01582200 ++#define BCHP_MPM_HOST_L2_REG_END 0x0158222c ++#define BCHP_MPM_CPU_CTRL_REG_START 0x01582300 ++#define BCHP_MPM_CPU_CTRL_REG_END 0x01582344 ++#define BCHP_MPM_PM_L2_REG_START 0x01582400 ++#define BCHP_MPM_PM_L2_REG_END 0x0158242c ++#define BCHP_MPM_RANGE_BLOCKER_REG_START 0x01582500 ++#define BCHP_MPM_RANGE_BLOCKER_REG_END 0x01582554 ++#define BCHP_MPM_BSPI_REG_START 0x01582600 ++#define BCHP_MPM_BSPI_REG_END 0x0158264c ++#define BCHP_MPM_MSPI_REG_START 0x01582800 ++#define BCHP_MPM_MSPI_REG_END 0x01582984 ++#define BCHP_DVP_MT_AON_TOP_REG_START 0x01583000 ++#define BCHP_DVP_MT_AON_TOP_REG_END 0x0158300c ++#define BCHP_CBUS_INTR2_0_REG_START 0x01583800 ++#define BCHP_CBUS_INTR2_0_REG_END 0x0158382c ++#define BCHP_CBUS_INTR2_1_REG_START 0x01583880 ++#define BCHP_CBUS_INTR2_1_REG_END 0x015838ac ++#define BCHP_MT_CBUS_REG_START 0x01583a00 ++#define BCHP_MT_CBUS_REG_END 0x01583afc ++#define BCHP_MT_MSC_REQ_REG_START 0x01583b00 ++#define BCHP_MT_MSC_REQ_REG_END 0x01583b6c ++#define BCHP_MT_MSC_RESP_REG_START 0x01583c00 ++#define BCHP_MT_MSC_RESP_REG_END 0x01583cac ++#define BCHP_MT_DDC_REQ_REG_START 0x01583d00 ++#define BCHP_MT_DDC_REQ_REG_END 0x01583d6c ++#define BCHP_MPM_FLASH_MEM_REG_START 0x015c0000 ++#define BCHP_MPM_FLASH_MEM_REG_END 0x015dfffc ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_DCXG_NO_4K ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_DCXG_NO_4K :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DCXG_NO_4K_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DCXG_NO_4K_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_AX_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG0 - Cluster Package Data Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG0 :: ADDRESS_UPLEFTMB [63:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_UPLEFTMB_MASK 0xffffffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_UPLEFTMB_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG0 :: ADDRESS_LEFTMB [31:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_LEFTMB_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG0_ADDRESS_LEFTMB_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG1 - Cluster Package Data Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: OFFSET_REFERENCE [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_REFERENCE_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_REFERENCE_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: OFFSET_BVN_INPUT [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_BVN_INPUT_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_OFFSET_BVN_INPUT_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG1 :: ADDRESS_MBINFO [31:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_ADDRESS_MBINFO_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG1_ADDRESS_MBINFO_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG2 - Cluster Package Data Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_TEMPORAL_LEFT [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_LEFT_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_LEFT_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_TEMPORAL_UPLEFT [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_UPLEFT_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_TEMPORAL_UPLEFT_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_SPATIAL_LEFT [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_LEFT_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_LEFT_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG2 :: OFFSET_MV_SPATIAL_UPLEFT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_UPLEFT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG2_OFFSET_MV_SPATIAL_UPLEFT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG3 - Cluster Package Data Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_SCALEFACTOR [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_SCALEFACTOR_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_SCALEFACTOR_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_PRED_PIXELS [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_PRED_PIXELS_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_PRED_PIXELS_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_INPUT_420 [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_INPUT_420_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_INPUT_420_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG3 :: OFFSET_MV_TEMPORAL_DOWNLEFT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_MV_TEMPORAL_DOWNLEFT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG3_OFFSET_MV_TEMPORAL_DOWNLEFT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG4 - Cluster Package Data Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_CB_READ [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_CB_READ_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_CB_READ_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_LUMA_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_INTRA_LUMA_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_INTRA_LUMA_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG4 :: OFFSET_CHROMA_REF [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_CHROMA_REF_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG4_OFFSET_CHROMA_REF_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG5 - Cluster Package Data Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_QUANT_OUTPUT [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_QUANT_OUTPUT_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_QUANT_OUTPUT_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CR_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CR_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CR_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG5 :: OFFSET_INTRA_CB_WRITE [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CB_WRITE_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG5_OFFSET_INTRA_CB_WRITE_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG6 - Cluster Package Data Structure Register 6 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_CR_TOP_WRITE [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CR_TOP_WRITE_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CR_TOP_WRITE_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_CB_TOP_WRITE [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CB_TOP_WRITE_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_CB_TOP_WRITE_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_LUMA_TOP_WRITE [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_LUMA_TOP_WRITE_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_LUMA_TOP_WRITE_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG6 :: OFFSET_DEBLOCK_INPUT [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_INPUT_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG6_OFFSET_DEBLOCK_INPUT_SHIFT 0 ++ ++/*************************************************************************** ++ *CLUSTER_PACKAGE_REG7 - Cluster Package Data Structure Register 7 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_OUTPUT_INDEX [63:48] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_OUTPUT_INDEX_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_OUTPUT_INDEX_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_CR_TOP_READ [47:32] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CR_TOP_READ_MASK 0x0000ffff00000000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CR_TOP_READ_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_CB_TOP_READ [31:16] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CB_TOP_READ_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_CB_TOP_READ_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: CLUSTER_PACKAGE_REG7 :: OFFSET_DEBLOCK_LUMA_TOP_READ [15:00] */ ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_LUMA_TOP_READ_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_CLUSTER_PACKAGE_REG7_OFFSET_DEBLOCK_LUMA_TOP_READ_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG0 - Private MB Info Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: reserved0 [63:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_reserved0_MASK 0xfff0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_reserved0_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_MODE_LUMA [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_MODE_LUMA_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_MODE_LUMA_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_COLUMN_NUMBER [47:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_COLUMN_NUMBER_MASK 0x0000ff0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_COLUMN_NUMBER_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: MB_ROW_NUMBER [39:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_ROW_NUMBER_MASK 0x000000ff00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_MB_ROW_NUMBER_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG0 :: BEST_SAD [31:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_BEST_SAD_MASK 0x00000000ffffffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG0_BEST_SAD_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG1 - Private MB Info Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_7 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_7_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_6 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_6_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_5 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_5_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_4 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_4_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG1 :: I4X4_PMODE_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG1_I4X4_PMODE_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG2 - Private MB Info Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_15 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_15_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_14 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_14_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_13 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_13_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_12 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_12_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_11 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_11_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_10 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_10_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_9 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_9_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG2 :: I4X4_PMODE_8 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_8_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG2_I4X4_PMODE_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG3 - Private MB Info Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_7 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_7_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_6 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_6_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_5 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_5_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_4 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_4_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG3 :: I4X4_MODE_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG3_I4X4_MODE_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG4 - Private MB Info Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_15 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_15_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_14 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_14_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_13 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_13_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_12 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_12_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_11 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_11_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_10 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_10_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_9 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_9_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG4 :: I4X4_MODE_8 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_8_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG4_I4X4_MODE_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG5 - Private MB Info Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: LAMBDA_GENAX [63:48] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_GENAX_MASK 0xffff000000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_GENAX_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved0 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved0_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved0_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_Y_COUNT [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_COUNT_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_COUNT_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved1 [39:33] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved1_MASK 0x000000fe00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved1_SHIFT 33 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_Y_DIR [32:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_DIR_MASK 0x0000000100000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_Y_DIR_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved2 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved2_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved2_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_X_COUNT [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_COUNT_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_COUNT_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: reserved3 [23:17] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved3_MASK 0x0000000000fe0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_reserved3_SHIFT 17 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: MC_CHROMA_SHIFT_X_DIR [16:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_DIR_MASK 0x0000000000010000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_MC_CHROMA_SHIFT_X_DIR_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG5 :: LAMBDA [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG5_LAMBDA_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG6 - Private MB Info Structure Register 6 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved0 [63:38] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved0_MASK 0xffffffc000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved0_SHIFT 38 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_2 [37:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_2_MASK 0x0000003f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_2_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved1 [31:30] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved1_MASK 0x00000000c0000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved1_SHIFT 30 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_1 [29:24] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_1_MASK 0x000000003f000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_1_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: reserved2 [23:22] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved2_MASK 0x0000000000c00000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_reserved2_SHIFT 22 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: UP_QPS_0 [21:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_0_MASK 0x00000000003f0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_UP_QPS_0_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: LUMA_VARIANCE [15:08] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_VARIANCE_MASK 0x000000000000ff00 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_VARIANCE_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG6 :: LUMA_MEAN [07:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_MEAN_MASK 0x00000000000000ff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG6_LUMA_MEAN_SHIFT 0 ++ ++/*************************************************************************** ++ *PRIVATE_MB_INFO_REG7 - Private MB Info Structure Register 7 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: reserved0 [63:38] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_reserved0_MASK 0xffffffc000000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_reserved0_SHIFT 38 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: AVE_QPS [37:32] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVE_QPS_MASK 0x0000003f00000000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVE_QPS_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: AVG_ZONAL_BITS [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVG_ZONAL_BITS_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_AVG_ZONAL_BITS_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PRIVATE_MB_INFO_REG7 :: TEXTURE_BITS [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_TEXTURE_BITS_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PRIVATE_MB_INFO_REG7_TEXTURE_BITS_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG0 - Public MB Info Structure Register 0 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved0 [63:62] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved0_MASK 0xc000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved0_SHIFT 62 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: INTRA_QP [61:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_INTRA_QP_MASK 0x3f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_INTRA_QP_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved1 [55:54] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved1_MASK 0x00c0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved1_SHIFT 54 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: QP [53:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_QP_MASK 0x003f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_QP_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved2 [47:46] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved2_MASK 0x0000c00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved2_SHIFT 46 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: CBP [45:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBP_MASK 0x00003f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBP_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: MB_MODE_CHROMA [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_MB_MODE_CHROMA_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_MB_MODE_CHROMA_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: reserved4 [31:27] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved4_MASK 0x00000000f8000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_reserved4_SHIFT 27 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG0 :: CBF [26:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBF_MASK 0x0000000007ffffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG0_CBF_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG1 - Public MB Info Structure Register 1 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: reserved0 [63:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_reserved0_MASK 0xffffffff00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_reserved0_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: MVD_Y [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_Y_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_Y_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG1 :: MVD_X [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_X_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG1_MVD_X_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG2 - Public MB Info Structure Register 2 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved0 [63:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved0_MASK 0xffe0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved0_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MB_TYPE [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_SHIFT 48 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_I4X4 0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_I16X16 1 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_P16X16 2 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_PSKIP 3 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_IPCM 5 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_TYPE_DUMMY 31 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved1 [47:41] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved1_MASK 0x0000fe0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved1_SHIFT 41 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MB_AVAILABLE [40:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_AVAILABLE_MASK 0x0000010000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MB_AVAILABLE_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: reserved2 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved2_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_reserved2_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: REF_ID [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_REF_ID_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_REF_ID_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MV_Y [31:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_Y_MASK 0x00000000ffff0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_Y_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG2 :: MV_X [15:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_X_MASK 0x000000000000ffff ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG2_MV_X_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG3 - Public MB Info Structure Register 3 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved0 [63:61] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved0_MASK 0xe000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved0_SHIFT 61 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_7 [60:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_7_MASK 0x1f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_7_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved1 [55:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved1_MASK 0x00e0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved1_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_6 [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_6_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_6_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved2 [47:45] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved2_MASK 0x0000e00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved2_SHIFT 45 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_5 [44:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_5_MASK 0x00001f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_5_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved3 [39:37] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved3_MASK 0x000000e000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved3_SHIFT 37 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_4 [36:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_4_MASK 0x0000001f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_4_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved4 [31:29] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved4_MASK 0x00000000e0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved4_SHIFT 29 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_3 [28:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_3_MASK 0x000000001f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved5 [23:21] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved5_MASK 0x0000000000e00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved5_SHIFT 21 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_2 [20:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_2_MASK 0x00000000001f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved6 [15:13] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved6_MASK 0x000000000000e000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved6_SHIFT 13 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_1 [12:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_1_MASK 0x0000000000001f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: reserved7 [07:05] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved7_MASK 0x00000000000000e0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_reserved7_SHIFT 5 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG3 :: COEFFNUM_0 [04:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_0_MASK 0x000000000000001f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG3_COEFFNUM_0_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG4 - Public MB Info Structure Register 4 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved0 [63:61] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved0_MASK 0xe000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved0_SHIFT 61 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_15 [60:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_15_MASK 0x1f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_15_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved1 [55:53] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved1_MASK 0x00e0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved1_SHIFT 53 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_14 [52:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_14_MASK 0x001f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_14_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved2 [47:45] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved2_MASK 0x0000e00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved2_SHIFT 45 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_13 [44:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_13_MASK 0x00001f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_13_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved3 [39:37] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved3_MASK 0x000000e000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved3_SHIFT 37 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_12 [36:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_12_MASK 0x0000001f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_12_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved4 [31:29] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved4_MASK 0x00000000e0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved4_SHIFT 29 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_11 [28:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_11_MASK 0x000000001f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_11_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved5 [23:21] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved5_MASK 0x0000000000e00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved5_SHIFT 21 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_10 [20:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_10_MASK 0x00000000001f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_10_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved6 [15:13] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved6_MASK 0x000000000000e000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved6_SHIFT 13 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_9 [12:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_9_MASK 0x0000000000001f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_9_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: reserved7 [07:05] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved7_MASK 0x00000000000000e0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_reserved7_SHIFT 5 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG4 :: COEFFNUM_8 [04:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_8_MASK 0x000000000000001f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG4_COEFFNUM_8_SHIFT 0 ++ ++/*************************************************************************** ++ *PUBLIC_MB_INFO_REG5 - Public MB Info Structure Register 5 ++ ***************************************************************************/ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved0 [63:60] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved0_MASK 0xf000000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved0_SHIFT 60 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_3 [59:56] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_3_MASK 0x0f00000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_3_SHIFT 56 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved1 [55:52] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved1_MASK 0x00f0000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved1_SHIFT 52 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_2 [51:48] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_2_MASK 0x000f000000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_2_SHIFT 48 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved2 [47:44] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved2_MASK 0x0000f00000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved2_SHIFT 44 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_1 [43:40] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_1_MASK 0x00000f0000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_1_SHIFT 40 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved3 [39:36] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved3_MASK 0x000000f000000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved3_SHIFT 36 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: LEFT_0 [35:32] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_0_MASK 0x0000000f00000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_LEFT_0_SHIFT 32 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved4 [31:28] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved4_MASK 0x00000000f0000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved4_SHIFT 28 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_3 [27:24] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_3_MASK 0x000000000f000000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_3_SHIFT 24 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved5 [23:20] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved5_MASK 0x0000000000f00000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved5_SHIFT 20 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_2 [19:16] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_2_MASK 0x00000000000f0000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_2_SHIFT 16 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved6 [15:12] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved6_MASK 0x000000000000f000 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved6_SHIFT 12 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_1 [11:08] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_1_MASK 0x0000000000000f00 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_1_SHIFT 8 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: reserved7 [07:04] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved7_MASK 0x00000000000000f0 ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_reserved7_SHIFT 4 ++ ++/* RAAGA_AX_MISC :: PUBLIC_MB_INFO_REG5 :: TOP_0 [03:00] */ ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_0_MASK 0x000000000000000f ++#define BCHP_RAAGA_AX_MISC_PUBLIC_MB_INFO_REG5_TOP_0_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7364a0/bchp_usb_ctrl.h b/include/linux/brcmstb/7364a0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..80696fc4 +--- /dev/null ++++ b/include/linux/brcmstb/7364a0/bchp_usb_ctrl.h +@@ -0,0 +1,1544 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Jul 23 03:11:42 2014 ++ * Full Compile MD5 Checksum a68bc62e9dd3be19fcad480c369d60fd ++ * (minus title and desc) ++ * MD5 Checksum 14382795d76d8497c2dd1bcf3f5d36da ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00480200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00480204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00480208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0048020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00480210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00480214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00480218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0048021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00480220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00480224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00480228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0048022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00480230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00480234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00480238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0048023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00480240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00480244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00480248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0048024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00480250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00480254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00480258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0048025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00480260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00480264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00480268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0048026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00480270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00480274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00480278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0048027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004802a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004802a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004802a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004802ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004802b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004802b4 /* SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB_REVID 0x004802fc /* USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: pwrflt_switch_en [25:24] */ ++#define BCHP_USB_CTRL_SETUP_pwrflt_switch_en_MASK 0x03000000 ++#define BCHP_USB_CTRL_SETUP_pwrflt_switch_en_SHIFT 24 ++#define BCHP_USB_CTRL_SETUP_pwrflt_switch_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb3_pwron_en [23:23] */ ++#define BCHP_USB_CTRL_SETUP_usb3_pwron_en_MASK 0x00800000 ++#define BCHP_USB_CTRL_SETUP_usb3_pwron_en_SHIFT 23 ++#define BCHP_USB_CTRL_SETUP_usb3_pwron_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [22:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x00700000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare1 [11:11] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare1_MASK 0x00000800 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_SHIFT 11 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_soft_reset_bcm6xxx [10:10] */ ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_MASK 0x00000400 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ohci_memreq_disable [08:08] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_SHIFT 8 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [07:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: xdc_soft_resetb [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [29:29] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 29 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [28:28] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [27:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x0fff0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:23] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: rxelectidle_sel [22:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_rxelectidle_sel_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_CTL1_rxelectidle_sel_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_rxelectidle_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x00000017 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7366b0/bchp_common.h b/include/linux/brcmstb/7366b0/bchp_common.h +new file mode 100644 +index 00000000..d8dea15d +--- /dev/null ++++ b/include/linux/brcmstb/7366b0/bchp_common.h +@@ -0,0 +1,4373 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Sep 3 14:59:28 2014 ++ * Full Compile MD5 Checksum 10187d4079392bab2546025f43274d34 ++ * (minus title and desc) ++ * MD5 Checksum c1587c5e16f21f52e852e7c7a65c7811 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008005 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7366_B0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00100000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x014e1a08 /* GCI_2 is last */ ++#define BCHP_REGISTER_SIZE 0x004f8682 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0012073c ++#define BCHP_DECODE_MB_0_REG_START 0x00120740 ++#define BCHP_DECODE_MB_0_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x00125048 ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00126834 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00126b58 ++#define BCHP_RVC_0_REG_START 0x00126c00 ++#define BCHP_RVC_0_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00127000 ++#define BCHP_ILS_REGS_0_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0012738c ++#define BCHP_ILB_REGS_0_REG_START 0x00127400 ++#define BCHP_ILB_REGS_0_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x00145048 ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00146834 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00146b58 ++#define BCHP_RVC_2_0_REG_START 0x00146c00 ++#define BCHP_RVC_2_0_REG_END 0x00146c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x00147000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x001470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x00147100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x0014710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x00147180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x00147184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x00147200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x0014738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x00147400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x00147410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x00148100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x001481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x00148300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x0014831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x00148320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x0014833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x00148400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x0014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x00148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x0014857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x00148700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x0014871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x00148720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x0014873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x00148740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x0014875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x00148c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x00148dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x00148e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x00148efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x0014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x0014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x0014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x0014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x0014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x0014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x0014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x0014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0018002c ++#define BCHP_HVD_RGR_0_REG_START 0x00180400 ++#define BCHP_HVD_RGR_0_REG_END 0x00180410 ++#define BCHP_VICH_0_REG_START 0x001a0000 ++#define BCHP_VICH_0_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_RF4CE_GR_REG_START 0x00401600 ++#define BCHP_RF4CE_GR_REG_END 0x0040160c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x0040452c ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_BSCA_REG_START 0x0040a180 ++#define BCHP_BSCA_REG_END 0x0040a1d4 ++#define BCHP_BSCB_REG_START 0x0040a200 ++#define BCHP_BSCB_REG_END 0x0040a254 ++#define BCHP_BSCE_REG_START 0x0040a280 ++#define BCHP_BSCE_REG_END 0x0040a2d4 ++#define BCHP_BSCF_REG_START 0x0040a300 ++#define BCHP_BSCF_REG_END 0x0040a354 ++#define BCHP_BSCG_REG_START 0x0040a380 ++#define BCHP_BSCG_REG_END 0x0040a3d4 ++#define BCHP_GIO_REG_START 0x0040a400 ++#define BCHP_GIO_REG_END 0x0040a4bc ++#define BCHP_PM_REG_START 0x0040a500 ++#define BCHP_PM_REG_END 0x0040a508 ++#define BCHP_TIMER_REG_START 0x0040a540 ++#define BCHP_TIMER_REG_END 0x0040a57c ++#define BCHP_IRQ0_REG_START 0x0040a580 ++#define BCHP_IRQ0_REG_END 0x0040a584 ++#define BCHP_IRQ1_REG_START 0x0040a5c0 ++#define BCHP_IRQ1_REG_END 0x0040a5c4 ++#define BCHP_CTK_REG_START 0x0040a800 ++#define BCHP_CTK_REG_END 0x0040a978 ++#define BCHP_TMON_REG_START 0x0040a980 ++#define BCHP_TMON_REG_END 0x0040a9d4 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040aa00 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040aa2c ++#define BCHP_MCIF_REG_START 0x0040aa40 ++#define BCHP_MCIF_REG_END 0x0040aa68 ++#define BCHP_MCIF1_REG_START 0x0040aa80 ++#define BCHP_MCIF1_REG_END 0x0040aaa8 ++#define BCHP_MCIF_INTR2_REG_START 0x0040ab00 ++#define BCHP_MCIF_INTR2_REG_END 0x0040ab44 ++#define BCHP_SCA_REG_START 0x0040ac00 ++#define BCHP_SCA_REG_END 0x0040acfc ++#define BCHP_SCB_REG_START 0x0040ad00 ++#define BCHP_SCB_REG_END 0x0040adfc ++#define BCHP_SCIRQ0_REG_START 0x0040ae00 ++#define BCHP_SCIRQ0_REG_END 0x0040ae04 ++#define BCHP_SCIRQ1_REG_START 0x0040ae40 ++#define BCHP_SCIRQ1_REG_END 0x0040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040ae84 ++#define BCHP_UARTA_REG_START 0x0040b000 ++#define BCHP_UARTA_REG_END 0x0040b01c ++#define BCHP_UARTB_REG_START 0x0040b040 ++#define BCHP_UARTB_REG_END 0x0040b05c ++#define BCHP_UARTC_REG_START 0x0040b080 ++#define BCHP_UARTC_REG_END 0x0040b09c ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b0c0 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b0f0 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004105fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410718 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417040 ++#define BCHP_PM_AON_REG_END 0x00417048 ++#define BCHP_ICAP_REG_START 0x00417080 ++#define BCHP_ICAP_REG_END 0x004170bc ++#define BCHP_KBD1_REG_START 0x004170c0 ++#define BCHP_KBD1_REG_END 0x004170fc ++#define BCHP_KBD2_REG_START 0x00417100 ++#define BCHP_KBD2_REG_END 0x0041713c ++#define BCHP_KBD3_REG_START 0x00417140 ++#define BCHP_KBD3_REG_END 0x0041717c ++#define BCHP_BSCC_REG_START 0x00417180 ++#define BCHP_BSCC_REG_END 0x004171d4 ++#define BCHP_BSCD_REG_START 0x00417200 ++#define BCHP_BSCD_REG_END 0x00417254 ++#define BCHP_IRQ0_AON_REG_START 0x00417280 ++#define BCHP_IRQ0_AON_REG_END 0x00417284 ++#define BCHP_IRQ1_AON_REG_START 0x004172c0 ++#define BCHP_IRQ1_AON_REG_END 0x004172c4 ++#define BCHP_GIO_AON_REG_START 0x00417300 ++#define BCHP_GIO_AON_REG_END 0x0041733c ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041742c ++#define BCHP_WKTMR_REG_START 0x00417480 ++#define BCHP_WKTMR_REG_END 0x00417490 ++#define BCHP_BICAP_REG_START 0x004174c0 ++#define BCHP_BICAP_REG_END 0x004174f8 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_ITCH1_REG_START 0x00431200 ++#define BCHP_ITCH1_REG_END 0x00431200 ++#define BCHP_SDIO_0_HOST_REG_START 0x00440000 ++#define BCHP_SDIO_0_HOST_REG_END 0x004400fc ++#define BCHP_SDIO_0_CFG_REG_START 0x00440100 ++#define BCHP_SDIO_0_CFG_REG_END 0x004401fc ++#define BCHP_SDIO_1_HOST_REG_START 0x00440200 ++#define BCHP_SDIO_1_HOST_REG_END 0x004402fc ++#define BCHP_SDIO_1_CFG_REG_START 0x00440300 ++#define BCHP_SDIO_1_CFG_REG_END 0x004403fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x00440400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x0044043c ++#define BCHP_EBI_REG_START 0x00440800 ++#define BCHP_EBI_REG_END 0x00440bfc ++#define BCHP_HIF_INTR2_REG_START 0x00441000 ++#define BCHP_HIF_INTR2_REG_END 0x0044102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x00441500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x0044153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x00441600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x0044163c ++#define BCHP_HIF_RGR2_REG_START 0x00441700 ++#define BCHP_HIF_RGR2_REG_END 0x00441710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x00441a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x00441a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x00442000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x0044203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x00442100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x0044210c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x00442200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x004423fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x00442400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x004427fc ++#define BCHP_NAND_REG_START 0x00442800 ++#define BCHP_NAND_REG_END 0x00442dfc ++#define BCHP_FLASH_DMA_REG_START 0x00443000 ++#define BCHP_FLASH_DMA_REG_END 0x00443028 ++#define BCHP_BSPI_REG_START 0x00443200 ++#define BCHP_BSPI_REG_END 0x0044324c ++#define BCHP_BSPI_RAF_REG_START 0x00443300 ++#define BCHP_BSPI_RAF_REG_END 0x00443320 ++#define BCHP_HIF_MSPI_REG_START 0x00443400 ++#define BCHP_HIF_MSPI_REG_END 0x00443584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x00443600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x00443604 ++#define BCHP_IPI0_INTR2_REG_START 0x00444000 ++#define BCHP_IPI0_INTR2_REG_END 0x0044402c ++#define BCHP_IPI1_INTR2_REG_START 0x00444100 ++#define BCHP_IPI1_INTR2_REG_END 0x0044412c ++#define BCHP_BOOTSRAM_TM_REG_START 0x00450000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x0045fffc ++#define BCHP_HIF_CONTINUATION_REG_START 0x00462000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x004620fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x00462800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x00462804 ++#define BCHP_WEBHIF_RGR1_REG_START 0x00464000 ++#define BCHP_WEBHIF_RGR1_REG_END 0x00464010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x00464100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x0046412c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x00464600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x0046463c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x00464800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x0046481c ++#define BCHP_WEBHIF_TIMER_REG_START 0x00464900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x0046493c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x00464a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x00464a00 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x00465000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x0046502c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x00466000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x0046602c ++#define BCHP_SATA_GRB_REG_START 0x00468000 ++#define BCHP_SATA_GRB_REG_END 0x0046800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00468040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00468060 ++#define BCHP_SATA3_INTR2_REG_START 0x00468080 ++#define BCHP_SATA3_INTR2_REG_END 0x004680ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00468100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00468ffc ++#define BCHP_PORT1_SATA3_PCB_REG_START 0x00469100 ++#define BCHP_PORT1_SATA3_PCB_REG_END 0x00469ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0046a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0046a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0046a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0046a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0046a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0046a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0046a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0046a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0046a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0046a17c ++#define BCHP_SATA_PORT1_AHCI_S1_REG_START 0x0046a180 ++#define BCHP_SATA_PORT1_AHCI_S1_REG_END 0x0046a19c ++#define BCHP_SATA_PORT1_AHCI_S2_REG_START 0x0046a1a0 ++#define BCHP_SATA_PORT1_AHCI_S2_REG_END 0x0046a1b4 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_START 0x0046a1b8 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_END 0x0046a1fc ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0046a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0046a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0046a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0046a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0046a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0046a764 ++#define BCHP_SATA_PORT1_CTRL_REG_START 0x0046a780 ++#define BCHP_SATA_PORT1_CTRL_REG_END 0x0046a7b0 ++#define BCHP_SATA_PORT1_CJPAT_REG_START 0x0046a7c0 ++#define BCHP_SATA_PORT1_CJPAT_REG_END 0x0046a7e4 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0046a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0046a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0046a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0046a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0046a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0046a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0046a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0046a998 ++#define BCHP_SATA_PORT1_LEG_S1_REG_START 0x0046aa00 ++#define BCHP_SATA_PORT1_LEG_S1_REG_END 0x0046aa34 ++#define BCHP_SATA_PORT1_LEG_S2_REG_START 0x0046aa40 ++#define BCHP_SATA_PORT1_LEG_S2_REG_END 0x0046aa54 ++#define BCHP_SATA_PORT1_LEG_S3_REG_START 0x0046aa58 ++#define BCHP_SATA_PORT1_LEG_S3_REG_END 0x0046aa98 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00470000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0047003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00470048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0047004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004700ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004700e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00470100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00470134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00470160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00470178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00470180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004701a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00470404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00470418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00470428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00470630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00470800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00470998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00471000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00471424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00471800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00471e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00472000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0047203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00472048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0047204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00472050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00472054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00472058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00472064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004720a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004720a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004720ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004720e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00472100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00472134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0047213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00472144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00472150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0047215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00472160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00472178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00472180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004721a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00472404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00472418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00472428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00472630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00472800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00472998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00473000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00473424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00473800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00473e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00474000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004740c8 ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00474100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00474104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00474200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00474204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00474300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0047432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00474400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0047446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00478000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00479008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00479200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00479210 ++#define BCHP_PCIE_0_RG_REG_START 0x00479300 ++#define BCHP_PCIE_0_RG_REG_END 0x0047930c ++#define BCHP_USB_CAPS_REG_START 0x00480000 ++#define BCHP_USB_CAPS_REG_END 0x0048002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00480100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0048010c ++#define BCHP_USB_INTR2_REG_START 0x00480180 ++#define BCHP_USB_INTR2_REG_END 0x004801ac ++#define BCHP_USB_CTRL_REG_START 0x00480200 ++#define BCHP_USB_CTRL_REG_END 0x004802fc ++#define BCHP_USB_EHCI_REG_START 0x00480300 ++#define BCHP_USB_EHCI_REG_END 0x004803a4 ++#define BCHP_USB_OHCI_REG_START 0x00480400 ++#define BCHP_USB_OHCI_REG_END 0x00480454 ++#define BCHP_USB_EHCI1_REG_START 0x00480500 ++#define BCHP_USB_EHCI1_REG_END 0x004805a4 ++#define BCHP_USB_OHCI1_REG_START 0x00480600 ++#define BCHP_USB_OHCI1_REG_END 0x00480654 ++#define BCHP_USB_XHCI_REG_START 0x00481000 ++#define BCHP_USB_XHCI_REG_END 0x004818c8 ++#define BCHP_USB_XHCI_EC_REG_START 0x00481940 ++#define BCHP_USB_XHCI_EC_REG_END 0x00481ffc ++#define BCHP_USB1_CAPS_REG_START 0x00490000 ++#define BCHP_USB1_CAPS_REG_END 0x0049002c ++#define BCHP_USB1_GR_BRIDGE_REG_START 0x00490100 ++#define BCHP_USB1_GR_BRIDGE_REG_END 0x0049010c ++#define BCHP_USB1_INTR2_REG_START 0x00490180 ++#define BCHP_USB1_INTR2_REG_END 0x004901ac ++#define BCHP_USB1_CTRL_REG_START 0x00490200 ++#define BCHP_USB1_CTRL_REG_END 0x004902fc ++#define BCHP_USB1_EHCI_REG_START 0x00490300 ++#define BCHP_USB1_EHCI_REG_END 0x004903a4 ++#define BCHP_USB1_OHCI_REG_START 0x00490400 ++#define BCHP_USB1_OHCI_REG_END 0x00490454 ++#define BCHP_USB1_EHCI1_REG_START 0x00490500 ++#define BCHP_USB1_EHCI1_REG_END 0x004905a4 ++#define BCHP_USB1_OHCI1_REG_START 0x00490600 ++#define BCHP_USB1_OHCI1_REG_END 0x00490654 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x004a0000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x004a003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x004a0048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x004a004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x004a00ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x004a00e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x004a0100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x004a0134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x004a0160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x004a0178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x004a0180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x004a01a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x004a0404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x004a0418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x004a0428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x004a0630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x004a0800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x004a0998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x004a1000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x004a1424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x004a1800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x004a1e1c ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_START 0x004a2000 ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_END 0x004a203c ++#define BCHP_PCIE_1_EP_CFG_PM_REG_START 0x004a2048 ++#define BCHP_PCIE_1_EP_CFG_PM_REG_END 0x004a204c ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_START 0x004a2050 ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_END 0x004a2054 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_START 0x004a2058 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_END 0x004a2064 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_START 0x004a20a0 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_END 0x004a20a8 ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_START 0x004a20ac ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_END 0x004a20e4 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_START 0x004a2100 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_END 0x004a2134 ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_START 0x004a213c ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_END 0x004a2144 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_START 0x004a2150 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_END 0x004a215c ++#define BCHP_PCIE_1_EP_CFG_VC_REG_START 0x004a2160 ++#define BCHP_PCIE_1_EP_CFG_VC_REG_END 0x004a2178 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_START 0x004a2180 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_END 0x004a21a4 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_START 0x004a2404 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_END 0x004a2418 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_START 0x004a2428 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_END 0x004a2630 ++#define BCHP_PCIE_1_EP_TL_REG_START 0x004a2800 ++#define BCHP_PCIE_1_EP_TL_REG_END 0x004a2998 ++#define BCHP_PCIE_1_EP_DL_REG_START 0x004a3000 ++#define BCHP_PCIE_1_EP_DL_REG_END 0x004a3424 ++#define BCHP_PCIE_1_EP_PL_REG_START 0x004a3800 ++#define BCHP_PCIE_1_EP_PL_REG_END 0x004a3e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x004a4000 ++#define BCHP_PCIE_1_MISC_REG_END 0x004a40c8 ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x004a4100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x004a4104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x004a4200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x004a4204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x004a4300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x004a432c ++#define BCHP_PCIE_1_DMA_REG_START 0x004a4400 ++#define BCHP_PCIE_1_DMA_REG_END 0x004a446c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x004a8000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x004a9008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x004a9200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x004a9210 ++#define BCHP_PCIE_1_RG_REG_START 0x004a9300 ++#define BCHP_PCIE_1_RG_REG_END 0x004a930c ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d1928 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x004d4600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x004d4624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x004d4640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x004d4664 ++#define BCHP_AVS_PMB_S_026_REG_START 0x004d4680 ++#define BCHP_AVS_PMB_S_026_REG_END 0x004d46a4 ++#define BCHP_AVS_PMB_S_027_REG_START 0x004d46c0 ++#define BCHP_AVS_PMB_S_027_REG_END 0x004d46e4 ++#define BCHP_AVS_PMB_S_028_REG_START 0x004d4700 ++#define BCHP_AVS_PMB_S_028_REG_END 0x004d4724 ++#define BCHP_AVS_PMB_S_029_REG_START 0x004d4740 ++#define BCHP_AVS_PMB_S_029_REG_END 0x004d4764 ++#define BCHP_AVS_PMB_S_030_REG_START 0x004d4780 ++#define BCHP_AVS_PMB_S_030_REG_END 0x004d47a4 ++#define BCHP_AVS_PMB_S_031_REG_START 0x004d47c0 ++#define BCHP_AVS_PMB_S_031_REG_END 0x004d47e4 ++#define BCHP_AVS_PMB_S_032_REG_START 0x004d4800 ++#define BCHP_AVS_PMB_S_032_REG_END 0x004d4824 ++#define BCHP_AVS_PMB_S_033_REG_START 0x004d4840 ++#define BCHP_AVS_PMB_S_033_REG_END 0x004d4864 ++#define BCHP_AVS_PMB_S_034_REG_START 0x004d4880 ++#define BCHP_AVS_PMB_S_034_REG_END 0x004d48a4 ++#define BCHP_AVS_PMB_S_035_REG_START 0x004d48c0 ++#define BCHP_AVS_PMB_S_035_REG_END 0x004d48e4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e086c ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4800 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4844 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_MEMC_GEN_0_REG_START 0x00500000 ++#define BCHP_MEMC_GEN_0_REG_END 0x005007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x00500800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x005008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x00500a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x00500afc ++#define BCHP_MEMC_ARC_0_REG_START 0x00500c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x00500f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x00501000 ++#define BCHP_MEMC_ARB_0_REG_END 0x005014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x00502000 ++#define BCHP_MEMC_DDR_0_REG_END 0x005027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x00503000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x00503044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x00503200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x00503244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x00503400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x00503444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x00503800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x005039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x00504000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x00504010 ++#define BCHP_MEMC_MISC_0_REG_START 0x00505000 ++#define BCHP_MEMC_MISC_0_REG_END 0x00505010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x00506000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x00506218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x00506400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x00506518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x00506600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x00506718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x00506800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x00506918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x00506a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x00506b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x00506c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x00506d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x00508000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x005080e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x00540000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0057fffc ++#define BCHP_S_MEMC_0_REG_START 0x00580000 ++#define BCHP_S_MEMC_0_REG_END 0x00580780 ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_MFD_2_REG_START 0x00600800 ++#define BCHP_MFD_2_REG_END 0x006009fc ++#define BCHP_VFD_0_REG_START 0x00602000 ++#define BCHP_VFD_0_REG_END 0x006021fc ++#define BCHP_VFD_1_REG_START 0x00602200 ++#define BCHP_VFD_1_REG_END 0x006023fc ++#define BCHP_VFD_2_REG_START 0x00602400 ++#define BCHP_VFD_2_REG_END 0x006025fc ++#define BCHP_VFD_3_REG_START 0x00602600 ++#define BCHP_VFD_3_REG_END 0x006027fc ++#define BCHP_RDC_REG_START 0x00603000 ++#define BCHP_RDC_REG_END 0x00603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060432c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060472c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060492c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060502c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060522c ++#define BCHP_FMISC_REG_START 0x00606000 ++#define BCHP_FMISC_REG_END 0x00606020 ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_SCL_2_REG_START 0x00620800 ++#define BCHP_SCL_2_REG_END 0x00620bfc ++#define BCHP_SCL_3_REG_START 0x00620c00 ++#define BCHP_SCL_3_REG_END 0x00620ffc ++#define BCHP_VNET_F_REG_START 0x00622000 ++#define BCHP_VNET_F_REG_END 0x006221fc ++#define BCHP_VNET_B_REG_START 0x00622200 ++#define BCHP_VNET_B_REG_END 0x006223fc ++#define BCHP_MMISC_REG_START 0x00622800 ++#define BCHP_MMISC_REG_END 0x00622828 ++#define BCHP_LBOX_0_REG_START 0x00624000 ++#define BCHP_LBOX_0_REG_END 0x00624070 ++#define BCHP_XSRC_0_REG_START 0x00624800 ++#define BCHP_XSRC_0_REG_END 0x00624bfc ++#define BCHP_XSRC_1_REG_START 0x00624c00 ++#define BCHP_XSRC_1_REG_END 0x00624ffc ++#define BCHP_DNR_0_REG_START 0x00626000 ++#define BCHP_DNR_0_REG_END 0x006260a4 ++#define BCHP_DNR_1_REG_START 0x00626200 ++#define BCHP_DNR_1_REG_END 0x006262a4 ++#define BCHP_DNR_2_REG_START 0x00626400 ++#define BCHP_DNR_2_REG_END 0x006264a4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x0062702c ++#define BCHP_BVNM_INTR2_1_REG_START 0x00627100 ++#define BCHP_BVNM_INTR2_1_REG_END 0x0062712c ++#define BCHP_DMISC_REG_START 0x00640000 ++#define BCHP_DMISC_REG_END 0x0064001c ++#define BCHP_MVP_TOP_0_REG_START 0x00644000 ++#define BCHP_MVP_TOP_0_REG_END 0x0064402c ++#define BCHP_SIOB_0_REG_START 0x00644200 ++#define BCHP_SIOB_0_REG_END 0x006442fc ++#define BCHP_HSCL_0_REG_START 0x00644400 ++#define BCHP_HSCL_0_REG_END 0x006447fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x00645000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x0064527c ++#define BCHP_HD_ANR_AND_0_REG_START 0x00645800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x00645888 ++#define BCHP_MDI_TOP_0_REG_START 0x00646000 ++#define BCHP_MDI_TOP_0_REG_END 0x006460fc ++#define BCHP_MDI_FCB_0_REG_START 0x00646400 ++#define BCHP_MDI_FCB_0_REG_END 0x006467fc ++#define BCHP_MDI_PPB_0_REG_START 0x00646800 ++#define BCHP_MDI_PPB_0_REG_END 0x00646bfc ++#define BCHP_MDI_MEMC_0_REG_START 0x00646c00 ++#define BCHP_MDI_MEMC_0_REG_END 0x00646dfc ++#define BCHP_MDI_FCN_0_REG_START 0x00646e00 ++#define BCHP_MDI_FCN_0_REG_END 0x006471fc ++#define BCHP_MVP_TOP_1_REG_START 0x00650000 ++#define BCHP_MVP_TOP_1_REG_END 0x0065002c ++#define BCHP_SIOB_1_REG_START 0x00650200 ++#define BCHP_SIOB_1_REG_END 0x006502fc ++#define BCHP_HSCL_1_REG_START 0x00650400 ++#define BCHP_HSCL_1_REG_END 0x006507fc ++#define BCHP_MDI_TOP_1_REG_START 0x00652000 ++#define BCHP_MDI_TOP_1_REG_END 0x006520fc ++#define BCHP_MDI_PPB_1_REG_START 0x00652800 ++#define BCHP_MDI_PPB_1_REG_END 0x00652bfc ++#define BCHP_MDI_FCN_1_REG_START 0x00652c00 ++#define BCHP_MDI_FCN_1_REG_END 0x00652ffc ++#define BCHP_MVP_TOP_2_REG_START 0x00658000 ++#define BCHP_MVP_TOP_2_REG_END 0x0065802c ++#define BCHP_SIOB_2_REG_START 0x00658200 ++#define BCHP_SIOB_2_REG_END 0x006582fc ++#define BCHP_HSCL_2_REG_START 0x00658400 ++#define BCHP_HSCL_2_REG_END 0x006587fc ++#define BCHP_MDI_TOP_2_REG_START 0x0065a000 ++#define BCHP_MDI_TOP_2_REG_END 0x0065a0fc ++#define BCHP_MDI_PPB_2_REG_START 0x0065a800 ++#define BCHP_MDI_PPB_2_REG_END 0x0065abfc ++#define BCHP_MDI_FCN_2_REG_START 0x0065ac00 ++#define BCHP_MDI_FCN_2_REG_END 0x0065affc ++#define BCHP_CAP_0_REG_START 0x00680000 ++#define BCHP_CAP_0_REG_END 0x0068010c ++#define BCHP_CAP_1_REG_START 0x00680200 ++#define BCHP_CAP_1_REG_END 0x0068030c ++#define BCHP_CAP_2_REG_START 0x00680400 ++#define BCHP_CAP_2_REG_END 0x0068050c ++#define BCHP_CAP_3_REG_START 0x00680600 ++#define BCHP_CAP_3_REG_END 0x0068070c ++#define BCHP_GFD_0_REG_START 0x00681000 ++#define BCHP_GFD_0_REG_END 0x0068122c ++#define BCHP_GFD_0_1_REG_START 0x00681400 ++#define BCHP_GFD_0_1_REG_END 0x0068162c ++#define BCHP_GFD_1_REG_START 0x00681800 ++#define BCHP_GFD_1_REG_END 0x00681a2c ++#define BCHP_GFD_2_REG_START 0x00681c00 ++#define BCHP_GFD_2_REG_END 0x00681e2c ++#define BCHP_CMP_0_REG_START 0x00683000 ++#define BCHP_CMP_0_REG_END 0x0068351c ++#define BCHP_CMP_1_REG_START 0x00683800 ++#define BCHP_CMP_1_REG_END 0x00683cc0 ++#define BCHP_CMP_2_REG_START 0x00684000 ++#define BCHP_CMP_2_REG_END 0x00684260 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00685800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006858a4 ++#define BCHP_MASK_0_REG_START 0x00685c00 ++#define BCHP_MASK_0_REG_END 0x00685c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00686000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00687284 ++#define BCHP_TNT_CMP_1_V0_REG_START 0x00687600 ++#define BCHP_TNT_CMP_1_V0_REG_END 0x006876a4 ++#define BCHP_MASK_1_REG_START 0x00687800 ++#define BCHP_MASK_1_REG_END 0x00687820 ++#define BCHP_BVNB_INTR2_REG_START 0x00688000 ++#define BCHP_BVNB_INTR2_REG_END 0x0068802c ++#define BCHP_BMISC_REG_START 0x00688400 ++#define BCHP_BMISC_REG_END 0x0068841c ++#define BCHP_MISC_REG_START 0x006a0000 ++#define BCHP_MISC_REG_END 0x006a00ac ++#define BCHP_IT_0_REG_START 0x006a1000 ++#define BCHP_IT_0_REG_END 0x006a17fc ++#define BCHP_IT_1_REG_START 0x006a2000 ++#define BCHP_IT_1_REG_END 0x006a27fc ++#define BCHP_VF_0_REG_START 0x006a3000 ++#define BCHP_VF_0_REG_END 0x006a3134 ++#define BCHP_SECAM_0_REG_START 0x006a3200 ++#define BCHP_SECAM_0_REG_END 0x006a3214 ++#define BCHP_SM_0_REG_START 0x006a3280 ++#define BCHP_SM_0_REG_END 0x006a32ac ++#define BCHP_SDSRC_0_REG_START 0x006a3300 ++#define BCHP_SDSRC_0_REG_END 0x006a330c ++#define BCHP_HDSRC_0_REG_START 0x006a3320 ++#define BCHP_HDSRC_0_REG_END 0x006a333c ++#define BCHP_CSC_0_REG_START 0x006a3380 ++#define BCHP_CSC_0_REG_END 0x006a33b0 ++#define BCHP_RM_0_REG_START 0x006a3400 ++#define BCHP_RM_0_REG_END 0x006a3430 ++#define BCHP_RM_1_REG_START 0x006a3440 ++#define BCHP_RM_1_REG_END 0x006a3470 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006a3500 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006a3544 ++#define BCHP_DVI_MISC_0_REG_START 0x006a3600 ++#define BCHP_DVI_MISC_0_REG_END 0x006a3600 ++#define BCHP_DVI_DTG_0_REG_START 0x006a4000 ++#define BCHP_DVI_DTG_0_REG_END 0x006a4488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006a4800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006a4830 ++#define BCHP_DVI_CSC_0_REG_START 0x006a4900 ++#define BCHP_DVI_CSC_0_REG_END 0x006a4930 ++#define BCHP_DVI_FC_0_REG_START 0x006a4a00 ++#define BCHP_DVI_FC_0_REG_END 0x006a4a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006a4b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006a4b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006a4c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006a4c44 ++#define BCHP_DVI_MISC_1_REG_START 0x006a4d00 ++#define BCHP_DVI_MISC_1_REG_END 0x006a4d00 ++#define BCHP_DVI_DTG_1_REG_START 0x006a5000 ++#define BCHP_DVI_DTG_1_REG_END 0x006a5488 ++#define BCHP_DVI_DTG_RM_1_REG_START 0x006a5800 ++#define BCHP_DVI_DTG_RM_1_REG_END 0x006a5830 ++#define BCHP_DVI_CSC_1_REG_START 0x006a5900 ++#define BCHP_DVI_CSC_1_REG_END 0x006a5930 ++#define BCHP_DVI_DVF_1_REG_START 0x006a5a00 ++#define BCHP_DVI_DVF_1_REG_END 0x006a5a18 ++#define BCHP_DVI_DEBUG_1_REG_START 0x006a5b00 ++#define BCHP_DVI_DEBUG_1_REG_END 0x006a5b44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006a6000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006a6488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006a6600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006a6630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006a6700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006a6718 ++#define BCHP_ITU656_0_REG_START 0x006a6800 ++#define BCHP_ITU656_0_REG_END 0x006a6820 ++#define BCHP_VEC_CFG_REG_START 0x006a6c00 ++#define BCHP_VEC_CFG_REG_END 0x006a6d48 ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006a7000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006a702c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006a7200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006a7320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006a7400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006a745c ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x006a7500 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x006a755c ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006a7600 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006a7608 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006a7700 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006a772c ++#define BCHP_DVP_TVG_0_REG_START 0x006a7800 ++#define BCHP_DVP_TVG_0_REG_END 0x006a7888 ++#define BCHP_DVP_TVG_1_REG_START 0x006a7900 ++#define BCHP_DVP_TVG_1_REG_END 0x006a7988 ++#define BCHP_VBI_ENC_REG_START 0x006a8000 ++#define BCHP_VBI_ENC_REG_END 0x006a8074 ++#define BCHP_CCE_0_REG_START 0x006a8400 ++#define BCHP_CCE_0_REG_END 0x006a8458 ++#define BCHP_WSE_0_REG_START 0x006a8500 ++#define BCHP_WSE_0_REG_END 0x006a8514 ++#define BCHP_CGMSAE_0_REG_START 0x006a8600 ++#define BCHP_CGMSAE_0_REG_END 0x006a8658 ++#define BCHP_TTE_0_REG_START 0x006a8700 ++#define BCHP_TTE_0_REG_END 0x006a8728 ++#define BCHP_GSE_0_REG_START 0x006a8800 ++#define BCHP_GSE_0_REG_END 0x006a8880 ++#define BCHP_AMOLE_0_REG_START 0x006a8900 ++#define BCHP_AMOLE_0_REG_END 0x006a898c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006a8a00 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006a8a54 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006a8b00 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006a8b0c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006a8c00 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006a8c28 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006a8d00 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006a8d80 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006a8e00 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006a8e8c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006a8f00 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006a8f24 ++#define BCHP_DVP_HT_REG_START 0x006c0000 ++#define BCHP_DVP_HT_REG_END 0x006c0114 ++#define BCHP_HDMI_REG_START 0x006c0800 ++#define BCHP_HDMI_REG_END 0x006c0afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006c0b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006c0dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006c0e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006c0e7c ++#define BCHP_HDMI_RM_REG_START 0x006c0e80 ++#define BCHP_HDMI_RM_REG_END 0x006c0eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006c0f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006c0f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006c0f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006c0fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006c1000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006c102c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006c1080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006c10ac ++#define BCHP_HDMI_RAM_REG_START 0x006c1100 ++#define BCHP_HDMI_RAM_REG_END 0x006c12fc ++#define BCHP_BVN_RGR_REG_START 0x006e0000 ++#define BCHP_BVN_RGR_REG_END 0x006e0010 ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x00700000 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x007002ec ++#define BCHP_VICE2_CME_0_0_REG_START 0x00700400 ++#define BCHP_VICE2_CME_0_0_REG_END 0x007004a0 ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x00700800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x0070088c ++#define BCHP_VICE2_FME_0_0_REG_START 0x00701000 ++#define BCHP_VICE2_FME_0_0_REG_END 0x007010c0 ++#define BCHP_VICE2_HA_0_0_REG_START 0x00701400 ++#define BCHP_VICE2_HA_0_0_REG_END 0x0070148c ++#define BCHP_VICE2_IMD_0_0_REG_START 0x00701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x0070187c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x00701c00 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x00701d28 ++#define BCHP_VICE2_MC_0_0_REG_START 0x00702000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x0070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x00702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x007025e4 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x00702800 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x00702a24 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x00702c00 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x00702e24 ++#define BCHP_VICE2_VIP2_0_0_REG_START 0x00703000 ++#define BCHP_VICE2_VIP2_0_0_REG_END 0x00703224 ++#define BCHP_VICE2_VIP3_0_0_REG_START 0x00703400 ++#define BCHP_VICE2_VIP3_0_0_REG_END 0x00703624 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x00704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x00705338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x00718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x007182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x00720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x007200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x00720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x0072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x00720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x0072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x00722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x007233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x00730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x0073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x00758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x007582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x00760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x007600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x00760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x0076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x00760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x0076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x00762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x007633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x00770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x0077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x00780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x0078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x00781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x00781050 ++#define BCHP_VICE2_L2_0_REG_START 0x00781100 ++#define BCHP_VICE2_L2_0_REG_END 0x0078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x00782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x007820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x00800000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x00800080 ++#define BCHP_MEMC_GEN_1_REG_START 0x00900000 ++#define BCHP_MEMC_GEN_1_REG_END 0x009007fc ++#define BCHP_MEMC_EDIS_1_0_REG_START 0x00900800 ++#define BCHP_MEMC_EDIS_1_0_REG_END 0x009008fc ++#define BCHP_MEMC_EDIS_1_1_REG_START 0x00900a00 ++#define BCHP_MEMC_EDIS_1_1_REG_END 0x00900afc ++#define BCHP_MEMC_ARC_1_REG_START 0x00900c00 ++#define BCHP_MEMC_ARC_1_REG_END 0x00900f74 ++#define BCHP_MEMC_ARB_1_REG_START 0x00901000 ++#define BCHP_MEMC_ARB_1_REG_END 0x009014cc ++#define BCHP_MEMC_DDR_1_REG_START 0x00902000 ++#define BCHP_MEMC_DDR_1_REG_END 0x009027fc ++#define BCHP_MEMC_L2_1_0_REG_START 0x00903000 ++#define BCHP_MEMC_L2_1_0_REG_END 0x00903044 ++#define BCHP_MEMC_L2_1_1_REG_START 0x00903200 ++#define BCHP_MEMC_L2_1_1_REG_END 0x00903244 ++#define BCHP_MEMC_L2_1_2_REG_START 0x00903400 ++#define BCHP_MEMC_L2_1_2_REG_END 0x00903444 ++#define BCHP_MEMC_TRACELOG_0_1_REG_START 0x00903800 ++#define BCHP_MEMC_TRACELOG_0_1_REG_END 0x009039fc ++#define BCHP_MEMC_RGRB_1_REG_START 0x00904000 ++#define BCHP_MEMC_RGRB_1_REG_END 0x00904010 ++#define BCHP_MEMC_MISC_1_REG_START 0x00905000 ++#define BCHP_MEMC_MISC_1_REG_END 0x00905010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_START 0x00906000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_END 0x00906218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_START 0x00906400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_END 0x00906518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_START 0x00906600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_END 0x00906718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_START 0x00906800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_END 0x00906918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_START 0x00906a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_END 0x00906b18 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_START 0x00906c00 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_END 0x00906d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_START 0x00908000 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_END 0x009080e0 ++#define BCHP_MEMC_SENTINEL_0_1_REG_START 0x00940000 ++#define BCHP_MEMC_SENTINEL_0_1_REG_END 0x0097fffc ++#define BCHP_S_MEMC_1_REG_START 0x00980000 ++#define BCHP_S_MEMC_1_REG_END 0x00980780 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02074 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f4 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02174 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f4 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02274 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f4 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02374 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f4 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02474 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f4 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02574 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f4 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02674 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f4 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e174 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_RAMS_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_RAMS_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b60000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b60010 ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b60040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b6004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b60080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b600b4 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b60200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b6022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b60240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b6026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b60300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b603b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b60600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b60628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b60800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b60ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b62000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b630d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b64000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b65084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b68000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b6fc48 ++#define BCHP_GENET_1_SYS_REG_START 0x00b80000 ++#define BCHP_GENET_1_SYS_REG_END 0x00b80010 ++#define BCHP_GENET_1_GR_BRIDGE_REG_START 0x00b80040 ++#define BCHP_GENET_1_GR_BRIDGE_REG_END 0x00b8004c ++#define BCHP_GENET_1_EXT_REG_START 0x00b80080 ++#define BCHP_GENET_1_EXT_REG_END 0x00b800b4 ++#define BCHP_GENET_1_INTRL2_0_REG_START 0x00b80200 ++#define BCHP_GENET_1_INTRL2_0_REG_END 0x00b8022c ++#define BCHP_GENET_1_INTRL2_1_REG_START 0x00b80240 ++#define BCHP_GENET_1_INTRL2_1_REG_END 0x00b8026c ++#define BCHP_GENET_1_RBUF_REG_START 0x00b80300 ++#define BCHP_GENET_1_RBUF_REG_END 0x00b803b4 ++#define BCHP_GENET_1_TBUF_REG_START 0x00b80600 ++#define BCHP_GENET_1_TBUF_REG_END 0x00b80628 ++#define BCHP_GENET_1_UMAC_REG_START 0x00b80800 ++#define BCHP_GENET_1_UMAC_REG_END 0x00b80ed8 ++#define BCHP_GENET_1_RDMA_REG_START 0x00b82000 ++#define BCHP_GENET_1_RDMA_REG_END 0x00b830d4 ++#define BCHP_GENET_1_TDMA_REG_START 0x00b84000 ++#define BCHP_GENET_1_TDMA_REG_END 0x00b85084 ++#define BCHP_GENET_1_HFB_REG_START 0x00b88000 ++#define BCHP_GENET_1_HFB_REG_END 0x00b8fc48 ++#define BCHP_GENET_2_SYS_REG_START 0x00ba0000 ++#define BCHP_GENET_2_SYS_REG_END 0x00ba0010 ++#define BCHP_GENET_2_GR_BRIDGE_REG_START 0x00ba0040 ++#define BCHP_GENET_2_GR_BRIDGE_REG_END 0x00ba004c ++#define BCHP_GENET_2_EXT_REG_START 0x00ba0080 ++#define BCHP_GENET_2_EXT_REG_END 0x00ba00b4 ++#define BCHP_GENET_2_INTRL2_0_REG_START 0x00ba0200 ++#define BCHP_GENET_2_INTRL2_0_REG_END 0x00ba022c ++#define BCHP_GENET_2_INTRL2_1_REG_START 0x00ba0240 ++#define BCHP_GENET_2_INTRL2_1_REG_END 0x00ba026c ++#define BCHP_GENET_2_RBUF_REG_START 0x00ba0300 ++#define BCHP_GENET_2_RBUF_REG_END 0x00ba03b4 ++#define BCHP_GENET_2_TBUF_REG_START 0x00ba0600 ++#define BCHP_GENET_2_TBUF_REG_END 0x00ba0628 ++#define BCHP_GENET_2_UMAC_REG_START 0x00ba0800 ++#define BCHP_GENET_2_UMAC_REG_END 0x00ba0ed8 ++#define BCHP_GENET_2_RDMA_REG_START 0x00ba2000 ++#define BCHP_GENET_2_RDMA_REG_END 0x00ba30d4 ++#define BCHP_GENET_2_TDMA_REG_START 0x00ba4000 ++#define BCHP_GENET_2_TDMA_REG_END 0x00ba5084 ++#define BCHP_GENET_2_HFB_REG_START 0x00ba8000 ++#define BCHP_GENET_2_HFB_REG_END 0x00bafc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_M2MC1_REG_START 0x00be6000 ++#define BCHP_M2MC1_REG_END 0x00be67fc ++#define BCHP_M2MC1_L2_REG_START 0x00be7000 ++#define BCHP_M2MC1_L2_REG_END 0x00be702c ++#define BCHP_M2MC1_GR_REG_START 0x00be7800 ++#define BCHP_M2MC1_GR_REG_END 0x00be780c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea040 ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea138 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea80c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa64 ++#define BCHP_V3D_DBG_REG_START 0x00beae00 ++#define BCHP_V3D_DBG_REG_END 0x00beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb02b4 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_END 0x00cb03b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb0f30 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1524 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb165c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb18fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb20ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb2864 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb2900 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb2964 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++#define BCHP_LEAP_ROM_REG_START 0x01000000 ++#define BCHP_LEAP_ROM_REG_END 0x01007ffc ++#define BCHP_LEAP_PROG0_MEM_REG_START 0x01040000 ++#define BCHP_LEAP_PROG0_MEM_REG_END 0x01043ffc ++#define BCHP_LEAP_PROG1_MEM_REG_START 0x01060000 ++#define BCHP_LEAP_PROG1_MEM_REG_END 0x0106fffc ++#define BCHP_LEAP_DATA_MEM_REG_START 0x01080000 ++#define BCHP_LEAP_DATA_MEM_REG_END 0x0109fffc ++#define BCHP_LEAP_CPU_CORE_REGS_REG_START 0x010a0000 ++#define BCHP_LEAP_CPU_CORE_REGS_REG_END 0x010a00fc ++#define BCHP_LEAP_CPU_AUX_REGS_REG_START 0x010c0000 ++#define BCHP_LEAP_CPU_AUX_REGS_REG_END 0x010c10c4 ++#define BCHP_LEAP_HAB_MEM_REG_START 0x010c8000 ++#define BCHP_LEAP_HAB_MEM_REG_END 0x010c83fc ++#define BCHP_LEAP_UART_REG_START 0x010c9000 ++#define BCHP_LEAP_UART_REG_END 0x010c9ffc ++#define BCHP_LEAP_WDG_REG_START 0x010ca000 ++#define BCHP_LEAP_WDG_REG_END 0x010caffc ++#define BCHP_LEAP_CTRL_REG_START 0x01100000 ++#define BCHP_LEAP_CTRL_REG_END 0x011002fc ++#define BCHP_LEAP_L1_REG_START 0x01100400 ++#define BCHP_LEAP_L1_REG_END 0x0110041c ++#define BCHP_LEAP_L2_REG_START 0x01100500 ++#define BCHP_LEAP_L2_REG_END 0x01100514 ++#define BCHP_LEAP_HOST_L1_REG_START 0x01100600 ++#define BCHP_LEAP_HOST_L1_REG_END 0x0110061c ++#define BCHP_LEAP_HOST_L2_REG_START 0x01100700 ++#define BCHP_LEAP_HOST_L2_REG_END 0x0110072c ++#define BCHP_LEAP_ROM_PATCH_REG_START 0x01100a00 ++#define BCHP_LEAP_ROM_PATCH_REG_END 0x01100a3c ++#define BCHP_LEAP_RGR_BRIDGE_REG_START 0x01100b00 ++#define BCHP_LEAP_RGR_BRIDGE_REG_END 0x01100b10 ++#define BCHP_FTM_UART_REG_START 0x01210000 ++#define BCHP_FTM_UART_REG_END 0x012100fc ++#define BCHP_FTM_PHY_REG_START 0x01210000 ++#define BCHP_FTM_PHY_REG_END 0x012101fc ++#define BCHP_FTM_PHY_ANA_REG_START 0x01210000 ++#define BCHP_FTM_PHY_ANA_REG_END 0x01210208 ++#define BCHP_FTM_SKIT_REG_START 0x01210000 ++#define BCHP_FTM_SKIT_REG_END 0x01210248 ++#define BCHP_FTM_INTR2_REG_START 0x01210000 ++#define BCHP_FTM_INTR2_REG_END 0x0121032c ++#define BCHP_FTM_SW_SPARE_REG_START 0x01210000 ++#define BCHP_FTM_SW_SPARE_REG_END 0x01210334 ++#define BCHP_SDS_DSEC_0_REG_START 0x01218000 ++#define BCHP_SDS_DSEC_0_REG_END 0x012180d4 ++#define BCHP_SDS_DSEC_INTR2_0_REG_START 0x01218100 ++#define BCHP_SDS_DSEC_INTR2_0_REG_END 0x0121812c ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_START 0x01218140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_END 0x0121814c ++#define BCHP_SDS_DSEC_AP_0_REG_START 0x01218150 ++#define BCHP_SDS_DSEC_AP_0_REG_END 0x01218158 ++#define BCHP_SDS_DSEC_1_REG_START 0x01219000 ++#define BCHP_SDS_DSEC_1_REG_END 0x012190d4 ++#define BCHP_SDS_DSEC_INTR2_1_REG_START 0x01219100 ++#define BCHP_SDS_DSEC_INTR2_1_REG_END 0x0121912c ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_START 0x01219140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_END 0x0121914c ++#define BCHP_SDS_DSEC_AP_1_REG_START 0x01219150 ++#define BCHP_SDS_DSEC_AP_1_REG_END 0x01219158 ++#define BCHP_STB_CHAN_CTRL_REG_START 0x0121c000 ++#define BCHP_STB_CHAN_CTRL_REG_END 0x0121c040 ++#define BCHP_STB_CHAN_CH0_REG_START 0x0121c100 ++#define BCHP_STB_CHAN_CH0_REG_END 0x0121c1ec ++#define BCHP_STB_CHAN_CH1_REG_START 0x0121c200 ++#define BCHP_STB_CHAN_CH1_REG_END 0x0121c2ec ++#define BCHP_STB_CHAN_CH2_REG_START 0x0121c300 ++#define BCHP_STB_CHAN_CH2_REG_END 0x0121c3ec ++#define BCHP_STB_CHAN_CH3_REG_START 0x0121c400 ++#define BCHP_STB_CHAN_CH3_REG_END 0x0121c4ec ++#define BCHP_STB_CHAN_CH4_REG_START 0x0121c500 ++#define BCHP_STB_CHAN_CH4_REG_END 0x0121c5ec ++#define BCHP_STB_CHAN_CH5_REG_START 0x0121c600 ++#define BCHP_STB_CHAN_CH5_REG_END 0x0121c6ec ++#define BCHP_STB_CHAN_CH6_REG_START 0x0121c700 ++#define BCHP_STB_CHAN_CH6_REG_END 0x0121c7ec ++#define BCHP_STB_CHAN_CH7_REG_START 0x0121c800 ++#define BCHP_STB_CHAN_CH7_REG_END 0x0121c8ec ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_START 0x01224000 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_END 0x01224118 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_START 0x01224800 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_END 0x0122482c ++#define BCHP_BAC_MSPI_REG_START 0x01225000 ++#define BCHP_BAC_MSPI_REG_END 0x01225018 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_START 0x01225800 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_END 0x01225810 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_START 0x01226000 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_END 0x01226094 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_START 0x01230000 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_END 0x01230474 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_START 0x01230800 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_END 0x0123082c ++#define BCHP_AIF_WB_SAT_ANA_0_REG_START 0x01231000 ++#define BCHP_AIF_WB_SAT_ANA_0_REG_END 0x012310c0 ++#define BCHP_AIF_WB_SAT_CORE0_1_REG_START 0x01234000 ++#define BCHP_AIF_WB_SAT_CORE0_1_REG_END 0x01234474 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_1_REG_START 0x01234800 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_1_REG_END 0x0123482c ++#define BCHP_AIF_WB_SAT_ANA_1_REG_START 0x01235000 ++#define BCHP_AIF_WB_SAT_ANA_1_REG_END 0x012350c0 ++#define BCHP_SDS_CG_0_REG_START 0x01240000 ++#define BCHP_SDS_CG_0_REG_END 0x0124003c ++#define BCHP_SDS_FE_0_REG_START 0x01240080 ++#define BCHP_SDS_FE_0_REG_END 0x012400bc ++#define BCHP_SDS_BL_0_REG_START 0x01240140 ++#define BCHP_SDS_BL_0_REG_END 0x01240160 ++#define BCHP_SDS_CL_0_REG_START 0x01240180 ++#define BCHP_SDS_CL_0_REG_END 0x012401fc ++#define BCHP_SDS_EQ_0_REG_START 0x01240200 ++#define BCHP_SDS_EQ_0_REG_END 0x0124028c ++#define BCHP_SDS_HP_0_REG_START 0x01240300 ++#define BCHP_SDS_HP_0_REG_END 0x012403e8 ++#define BCHP_SDS_VIT_0_REG_START 0x01240400 ++#define BCHP_SDS_VIT_0_REG_END 0x01240428 ++#define BCHP_SDS_FEC_0_REG_START 0x01240440 ++#define BCHP_SDS_FEC_0_REG_END 0x01240454 ++#define BCHP_SDS_OI_0_REG_START 0x01240480 ++#define BCHP_SDS_OI_0_REG_END 0x012404cc ++#define BCHP_SDS_SNR_0_REG_START 0x01240500 ++#define BCHP_SDS_SNR_0_REG_END 0x01240518 ++#define BCHP_SDS_BERT_0_REG_START 0x01240540 ++#define BCHP_SDS_BERT_0_REG_END 0x01240568 ++#define BCHP_SDS_DFT_0_REG_START 0x01240580 ++#define BCHP_SDS_DFT_0_REG_END 0x012405a8 ++#define BCHP_SDS_CWC_0_REG_START 0x01240600 ++#define BCHP_SDS_CWC_0_REG_END 0x01240694 ++#define BCHP_SDS_MISC_0_REG_START 0x01240700 ++#define BCHP_SDS_MISC_0_REG_END 0x01240798 ++#define BCHP_SDS_INTR2_0_0_REG_START 0x01240a00 ++#define BCHP_SDS_INTR2_0_0_REG_END 0x01240a2c ++#define BCHP_SDS_GR_BRIDGE_0_REG_START 0x01240c00 ++#define BCHP_SDS_GR_BRIDGE_0_REG_END 0x01240c0c ++#define BCHP_SDS_CG_1_REG_START 0x01241000 ++#define BCHP_SDS_CG_1_REG_END 0x0124103c ++#define BCHP_SDS_FE_1_REG_START 0x01241080 ++#define BCHP_SDS_FE_1_REG_END 0x012410bc ++#define BCHP_SDS_BL_1_REG_START 0x01241140 ++#define BCHP_SDS_BL_1_REG_END 0x01241160 ++#define BCHP_SDS_CL_1_REG_START 0x01241180 ++#define BCHP_SDS_CL_1_REG_END 0x012411fc ++#define BCHP_SDS_EQ_1_REG_START 0x01241200 ++#define BCHP_SDS_EQ_1_REG_END 0x0124128c ++#define BCHP_SDS_HP_1_REG_START 0x01241300 ++#define BCHP_SDS_HP_1_REG_END 0x012413e8 ++#define BCHP_SDS_VIT_1_REG_START 0x01241400 ++#define BCHP_SDS_VIT_1_REG_END 0x01241428 ++#define BCHP_SDS_FEC_1_REG_START 0x01241440 ++#define BCHP_SDS_FEC_1_REG_END 0x01241454 ++#define BCHP_SDS_OI_1_REG_START 0x01241480 ++#define BCHP_SDS_OI_1_REG_END 0x012414cc ++#define BCHP_SDS_SNR_1_REG_START 0x01241500 ++#define BCHP_SDS_SNR_1_REG_END 0x01241518 ++#define BCHP_SDS_BERT_1_REG_START 0x01241540 ++#define BCHP_SDS_BERT_1_REG_END 0x01241568 ++#define BCHP_SDS_DFT_1_REG_START 0x01241580 ++#define BCHP_SDS_DFT_1_REG_END 0x012415a8 ++#define BCHP_SDS_CWC_1_REG_START 0x01241600 ++#define BCHP_SDS_CWC_1_REG_END 0x01241694 ++#define BCHP_SDS_MISC_1_REG_START 0x01241700 ++#define BCHP_SDS_MISC_1_REG_END 0x01241798 ++#define BCHP_SDS_INTR2_0_1_REG_START 0x01241a00 ++#define BCHP_SDS_INTR2_0_1_REG_END 0x01241a2c ++#define BCHP_SDS_GR_BRIDGE_1_REG_START 0x01241c00 ++#define BCHP_SDS_GR_BRIDGE_1_REG_END 0x01241c0c ++#define BCHP_SDS_CG_2_REG_START 0x01242000 ++#define BCHP_SDS_CG_2_REG_END 0x0124203c ++#define BCHP_SDS_FE_2_REG_START 0x01242080 ++#define BCHP_SDS_FE_2_REG_END 0x012420bc ++#define BCHP_SDS_BL_2_REG_START 0x01242140 ++#define BCHP_SDS_BL_2_REG_END 0x01242160 ++#define BCHP_SDS_CL_2_REG_START 0x01242180 ++#define BCHP_SDS_CL_2_REG_END 0x012421fc ++#define BCHP_SDS_EQ_2_REG_START 0x01242200 ++#define BCHP_SDS_EQ_2_REG_END 0x0124228c ++#define BCHP_SDS_HP_2_REG_START 0x01242300 ++#define BCHP_SDS_HP_2_REG_END 0x012423e8 ++#define BCHP_SDS_VIT_2_REG_START 0x01242400 ++#define BCHP_SDS_VIT_2_REG_END 0x01242428 ++#define BCHP_SDS_FEC_2_REG_START 0x01242440 ++#define BCHP_SDS_FEC_2_REG_END 0x01242454 ++#define BCHP_SDS_OI_2_REG_START 0x01242480 ++#define BCHP_SDS_OI_2_REG_END 0x012424cc ++#define BCHP_SDS_SNR_2_REG_START 0x01242500 ++#define BCHP_SDS_SNR_2_REG_END 0x01242518 ++#define BCHP_SDS_BERT_2_REG_START 0x01242540 ++#define BCHP_SDS_BERT_2_REG_END 0x01242568 ++#define BCHP_SDS_DFT_2_REG_START 0x01242580 ++#define BCHP_SDS_DFT_2_REG_END 0x012425a8 ++#define BCHP_SDS_CWC_2_REG_START 0x01242600 ++#define BCHP_SDS_CWC_2_REG_END 0x01242694 ++#define BCHP_SDS_MISC_2_REG_START 0x01242700 ++#define BCHP_SDS_MISC_2_REG_END 0x01242798 ++#define BCHP_SDS_INTR2_0_2_REG_START 0x01242a00 ++#define BCHP_SDS_INTR2_0_2_REG_END 0x01242a2c ++#define BCHP_SDS_GR_BRIDGE_2_REG_START 0x01242c00 ++#define BCHP_SDS_GR_BRIDGE_2_REG_END 0x01242c0c ++#define BCHP_SDS_CG_3_REG_START 0x01243000 ++#define BCHP_SDS_CG_3_REG_END 0x0124303c ++#define BCHP_SDS_FE_3_REG_START 0x01243080 ++#define BCHP_SDS_FE_3_REG_END 0x012430bc ++#define BCHP_SDS_BL_3_REG_START 0x01243140 ++#define BCHP_SDS_BL_3_REG_END 0x01243160 ++#define BCHP_SDS_CL_3_REG_START 0x01243180 ++#define BCHP_SDS_CL_3_REG_END 0x012431fc ++#define BCHP_SDS_EQ_3_REG_START 0x01243200 ++#define BCHP_SDS_EQ_3_REG_END 0x0124328c ++#define BCHP_SDS_HP_3_REG_START 0x01243300 ++#define BCHP_SDS_HP_3_REG_END 0x012433e8 ++#define BCHP_SDS_VIT_3_REG_START 0x01243400 ++#define BCHP_SDS_VIT_3_REG_END 0x01243428 ++#define BCHP_SDS_FEC_3_REG_START 0x01243440 ++#define BCHP_SDS_FEC_3_REG_END 0x01243454 ++#define BCHP_SDS_OI_3_REG_START 0x01243480 ++#define BCHP_SDS_OI_3_REG_END 0x012434cc ++#define BCHP_SDS_SNR_3_REG_START 0x01243500 ++#define BCHP_SDS_SNR_3_REG_END 0x01243518 ++#define BCHP_SDS_BERT_3_REG_START 0x01243540 ++#define BCHP_SDS_BERT_3_REG_END 0x01243568 ++#define BCHP_SDS_DFT_3_REG_START 0x01243580 ++#define BCHP_SDS_DFT_3_REG_END 0x012435a8 ++#define BCHP_SDS_CWC_3_REG_START 0x01243600 ++#define BCHP_SDS_CWC_3_REG_END 0x01243694 ++#define BCHP_SDS_MISC_3_REG_START 0x01243700 ++#define BCHP_SDS_MISC_3_REG_END 0x01243798 ++#define BCHP_SDS_INTR2_0_3_REG_START 0x01243a00 ++#define BCHP_SDS_INTR2_0_3_REG_END 0x01243a2c ++#define BCHP_SDS_GR_BRIDGE_3_REG_START 0x01243c00 ++#define BCHP_SDS_GR_BRIDGE_3_REG_END 0x01243c0c ++#define BCHP_SDS_CG_4_REG_START 0x01244000 ++#define BCHP_SDS_CG_4_REG_END 0x0124403c ++#define BCHP_SDS_FE_4_REG_START 0x01244080 ++#define BCHP_SDS_FE_4_REG_END 0x012440bc ++#define BCHP_SDS_BL_4_REG_START 0x01244140 ++#define BCHP_SDS_BL_4_REG_END 0x01244160 ++#define BCHP_SDS_CL_4_REG_START 0x01244180 ++#define BCHP_SDS_CL_4_REG_END 0x012441fc ++#define BCHP_SDS_EQ_4_REG_START 0x01244200 ++#define BCHP_SDS_EQ_4_REG_END 0x0124428c ++#define BCHP_SDS_HP_4_REG_START 0x01244300 ++#define BCHP_SDS_HP_4_REG_END 0x012443e8 ++#define BCHP_SDS_VIT_4_REG_START 0x01244400 ++#define BCHP_SDS_VIT_4_REG_END 0x01244428 ++#define BCHP_SDS_FEC_4_REG_START 0x01244440 ++#define BCHP_SDS_FEC_4_REG_END 0x01244454 ++#define BCHP_SDS_OI_4_REG_START 0x01244480 ++#define BCHP_SDS_OI_4_REG_END 0x012444cc ++#define BCHP_SDS_SNR_4_REG_START 0x01244500 ++#define BCHP_SDS_SNR_4_REG_END 0x01244518 ++#define BCHP_SDS_BERT_4_REG_START 0x01244540 ++#define BCHP_SDS_BERT_4_REG_END 0x01244568 ++#define BCHP_SDS_DFT_4_REG_START 0x01244580 ++#define BCHP_SDS_DFT_4_REG_END 0x012445a8 ++#define BCHP_SDS_CWC_4_REG_START 0x01244600 ++#define BCHP_SDS_CWC_4_REG_END 0x01244694 ++#define BCHP_SDS_MISC_4_REG_START 0x01244700 ++#define BCHP_SDS_MISC_4_REG_END 0x01244798 ++#define BCHP_SDS_INTR2_0_4_REG_START 0x01244a00 ++#define BCHP_SDS_INTR2_0_4_REG_END 0x01244a2c ++#define BCHP_SDS_GR_BRIDGE_4_REG_START 0x01244c00 ++#define BCHP_SDS_GR_BRIDGE_4_REG_END 0x01244c0c ++#define BCHP_SDS_CG_5_REG_START 0x01245000 ++#define BCHP_SDS_CG_5_REG_END 0x0124503c ++#define BCHP_SDS_FE_5_REG_START 0x01245080 ++#define BCHP_SDS_FE_5_REG_END 0x012450bc ++#define BCHP_SDS_BL_5_REG_START 0x01245140 ++#define BCHP_SDS_BL_5_REG_END 0x01245160 ++#define BCHP_SDS_CL_5_REG_START 0x01245180 ++#define BCHP_SDS_CL_5_REG_END 0x012451fc ++#define BCHP_SDS_EQ_5_REG_START 0x01245200 ++#define BCHP_SDS_EQ_5_REG_END 0x0124528c ++#define BCHP_SDS_HP_5_REG_START 0x01245300 ++#define BCHP_SDS_HP_5_REG_END 0x012453e8 ++#define BCHP_SDS_VIT_5_REG_START 0x01245400 ++#define BCHP_SDS_VIT_5_REG_END 0x01245428 ++#define BCHP_SDS_FEC_5_REG_START 0x01245440 ++#define BCHP_SDS_FEC_5_REG_END 0x01245454 ++#define BCHP_SDS_OI_5_REG_START 0x01245480 ++#define BCHP_SDS_OI_5_REG_END 0x012454cc ++#define BCHP_SDS_SNR_5_REG_START 0x01245500 ++#define BCHP_SDS_SNR_5_REG_END 0x01245518 ++#define BCHP_SDS_BERT_5_REG_START 0x01245540 ++#define BCHP_SDS_BERT_5_REG_END 0x01245568 ++#define BCHP_SDS_DFT_5_REG_START 0x01245580 ++#define BCHP_SDS_DFT_5_REG_END 0x012455a8 ++#define BCHP_SDS_CWC_5_REG_START 0x01245600 ++#define BCHP_SDS_CWC_5_REG_END 0x01245694 ++#define BCHP_SDS_MISC_5_REG_START 0x01245700 ++#define BCHP_SDS_MISC_5_REG_END 0x01245798 ++#define BCHP_SDS_INTR2_0_5_REG_START 0x01245a00 ++#define BCHP_SDS_INTR2_0_5_REG_END 0x01245a2c ++#define BCHP_SDS_GR_BRIDGE_5_REG_START 0x01245c00 ++#define BCHP_SDS_GR_BRIDGE_5_REG_END 0x01245c0c ++#define BCHP_SDS_CG_6_REG_START 0x01246000 ++#define BCHP_SDS_CG_6_REG_END 0x0124603c ++#define BCHP_SDS_FE_6_REG_START 0x01246080 ++#define BCHP_SDS_FE_6_REG_END 0x012460bc ++#define BCHP_SDS_BL_6_REG_START 0x01246140 ++#define BCHP_SDS_BL_6_REG_END 0x01246160 ++#define BCHP_SDS_CL_6_REG_START 0x01246180 ++#define BCHP_SDS_CL_6_REG_END 0x012461fc ++#define BCHP_SDS_EQ_6_REG_START 0x01246200 ++#define BCHP_SDS_EQ_6_REG_END 0x0124628c ++#define BCHP_SDS_HP_6_REG_START 0x01246300 ++#define BCHP_SDS_HP_6_REG_END 0x012463e8 ++#define BCHP_SDS_VIT_6_REG_START 0x01246400 ++#define BCHP_SDS_VIT_6_REG_END 0x01246428 ++#define BCHP_SDS_FEC_6_REG_START 0x01246440 ++#define BCHP_SDS_FEC_6_REG_END 0x01246454 ++#define BCHP_SDS_OI_6_REG_START 0x01246480 ++#define BCHP_SDS_OI_6_REG_END 0x012464cc ++#define BCHP_SDS_SNR_6_REG_START 0x01246500 ++#define BCHP_SDS_SNR_6_REG_END 0x01246518 ++#define BCHP_SDS_BERT_6_REG_START 0x01246540 ++#define BCHP_SDS_BERT_6_REG_END 0x01246568 ++#define BCHP_SDS_DFT_6_REG_START 0x01246580 ++#define BCHP_SDS_DFT_6_REG_END 0x012465a8 ++#define BCHP_SDS_CWC_6_REG_START 0x01246600 ++#define BCHP_SDS_CWC_6_REG_END 0x01246694 ++#define BCHP_SDS_MISC_6_REG_START 0x01246700 ++#define BCHP_SDS_MISC_6_REG_END 0x01246798 ++#define BCHP_SDS_INTR2_0_6_REG_START 0x01246a00 ++#define BCHP_SDS_INTR2_0_6_REG_END 0x01246a2c ++#define BCHP_SDS_GR_BRIDGE_6_REG_START 0x01246c00 ++#define BCHP_SDS_GR_BRIDGE_6_REG_END 0x01246c0c ++#define BCHP_SDS_CG_7_REG_START 0x01247000 ++#define BCHP_SDS_CG_7_REG_END 0x0124703c ++#define BCHP_SDS_FE_7_REG_START 0x01247080 ++#define BCHP_SDS_FE_7_REG_END 0x012470bc ++#define BCHP_SDS_BL_7_REG_START 0x01247140 ++#define BCHP_SDS_BL_7_REG_END 0x01247160 ++#define BCHP_SDS_CL_7_REG_START 0x01247180 ++#define BCHP_SDS_CL_7_REG_END 0x012471fc ++#define BCHP_SDS_EQ_7_REG_START 0x01247200 ++#define BCHP_SDS_EQ_7_REG_END 0x0124728c ++#define BCHP_SDS_HP_7_REG_START 0x01247300 ++#define BCHP_SDS_HP_7_REG_END 0x012473e8 ++#define BCHP_SDS_VIT_7_REG_START 0x01247400 ++#define BCHP_SDS_VIT_7_REG_END 0x01247428 ++#define BCHP_SDS_FEC_7_REG_START 0x01247440 ++#define BCHP_SDS_FEC_7_REG_END 0x01247454 ++#define BCHP_SDS_OI_7_REG_START 0x01247480 ++#define BCHP_SDS_OI_7_REG_END 0x012474cc ++#define BCHP_SDS_SNR_7_REG_START 0x01247500 ++#define BCHP_SDS_SNR_7_REG_END 0x01247518 ++#define BCHP_SDS_BERT_7_REG_START 0x01247540 ++#define BCHP_SDS_BERT_7_REG_END 0x01247568 ++#define BCHP_SDS_DFT_7_REG_START 0x01247580 ++#define BCHP_SDS_DFT_7_REG_END 0x012475a8 ++#define BCHP_SDS_CWC_7_REG_START 0x01247600 ++#define BCHP_SDS_CWC_7_REG_END 0x01247694 ++#define BCHP_SDS_MISC_7_REG_START 0x01247700 ++#define BCHP_SDS_MISC_7_REG_END 0x01247798 ++#define BCHP_SDS_INTR2_0_7_REG_START 0x01247a00 ++#define BCHP_SDS_INTR2_0_7_REG_END 0x01247a2c ++#define BCHP_SDS_GR_BRIDGE_7_REG_START 0x01247c00 ++#define BCHP_SDS_GR_BRIDGE_7_REG_END 0x01247c0c ++#define BCHP_TFEC_0_REG_START 0x01248000 ++#define BCHP_TFEC_0_REG_END 0x01248060 ++#define BCHP_TFEC_MISC_0_REG_START 0x01248100 ++#define BCHP_TFEC_MISC_0_REG_END 0x01248108 ++#define BCHP_TFEC_INTR2_0_REG_START 0x01248200 ++#define BCHP_TFEC_INTR2_0_REG_END 0x0124822c ++#define BCHP_TFEC_GR_BRIDGE_0_REG_START 0x01248300 ++#define BCHP_TFEC_GR_BRIDGE_0_REG_END 0x0124830c ++#define BCHP_TFEC_1_REG_START 0x01249000 ++#define BCHP_TFEC_1_REG_END 0x01249060 ++#define BCHP_TFEC_MISC_1_REG_START 0x01249100 ++#define BCHP_TFEC_MISC_1_REG_END 0x01249108 ++#define BCHP_TFEC_INTR2_1_REG_START 0x01249200 ++#define BCHP_TFEC_INTR2_1_REG_END 0x0124922c ++#define BCHP_TFEC_GR_BRIDGE_1_REG_START 0x01249300 ++#define BCHP_TFEC_GR_BRIDGE_1_REG_END 0x0124930c ++#define BCHP_TFEC_2_REG_START 0x0124a000 ++#define BCHP_TFEC_2_REG_END 0x0124a060 ++#define BCHP_TFEC_MISC_2_REG_START 0x0124a100 ++#define BCHP_TFEC_MISC_2_REG_END 0x0124a108 ++#define BCHP_TFEC_INTR2_2_REG_START 0x0124a200 ++#define BCHP_TFEC_INTR2_2_REG_END 0x0124a22c ++#define BCHP_TFEC_GR_BRIDGE_2_REG_START 0x0124a300 ++#define BCHP_TFEC_GR_BRIDGE_2_REG_END 0x0124a30c ++#define BCHP_TFEC_3_REG_START 0x0124b000 ++#define BCHP_TFEC_3_REG_END 0x0124b060 ++#define BCHP_TFEC_MISC_3_REG_START 0x0124b100 ++#define BCHP_TFEC_MISC_3_REG_END 0x0124b108 ++#define BCHP_TFEC_INTR2_3_REG_START 0x0124b200 ++#define BCHP_TFEC_INTR2_3_REG_END 0x0124b22c ++#define BCHP_TFEC_GR_BRIDGE_3_REG_START 0x0124b300 ++#define BCHP_TFEC_GR_BRIDGE_3_REG_END 0x0124b30c ++#define BCHP_TFEC_4_REG_START 0x0124c000 ++#define BCHP_TFEC_4_REG_END 0x0124c060 ++#define BCHP_TFEC_MISC_4_REG_START 0x0124c100 ++#define BCHP_TFEC_MISC_4_REG_END 0x0124c108 ++#define BCHP_TFEC_INTR2_4_REG_START 0x0124c200 ++#define BCHP_TFEC_INTR2_4_REG_END 0x0124c22c ++#define BCHP_TFEC_GR_BRIDGE_4_REG_START 0x0124c300 ++#define BCHP_TFEC_GR_BRIDGE_4_REG_END 0x0124c30c ++#define BCHP_TFEC_5_REG_START 0x0124d000 ++#define BCHP_TFEC_5_REG_END 0x0124d060 ++#define BCHP_TFEC_MISC_5_REG_START 0x0124d100 ++#define BCHP_TFEC_MISC_5_REG_END 0x0124d108 ++#define BCHP_TFEC_INTR2_5_REG_START 0x0124d200 ++#define BCHP_TFEC_INTR2_5_REG_END 0x0124d22c ++#define BCHP_TFEC_GR_BRIDGE_5_REG_START 0x0124d300 ++#define BCHP_TFEC_GR_BRIDGE_5_REG_END 0x0124d30c ++#define BCHP_TFEC_6_REG_START 0x0124e000 ++#define BCHP_TFEC_6_REG_END 0x0124e060 ++#define BCHP_TFEC_MISC_6_REG_START 0x0124e100 ++#define BCHP_TFEC_MISC_6_REG_END 0x0124e108 ++#define BCHP_TFEC_INTR2_6_REG_START 0x0124e200 ++#define BCHP_TFEC_INTR2_6_REG_END 0x0124e22c ++#define BCHP_TFEC_GR_BRIDGE_6_REG_START 0x0124e300 ++#define BCHP_TFEC_GR_BRIDGE_6_REG_END 0x0124e30c ++#define BCHP_TFEC_7_REG_START 0x0124f000 ++#define BCHP_TFEC_7_REG_END 0x0124f060 ++#define BCHP_TFEC_MISC_7_REG_START 0x0124f100 ++#define BCHP_TFEC_MISC_7_REG_END 0x0124f108 ++#define BCHP_TFEC_INTR2_7_REG_START 0x0124f200 ++#define BCHP_TFEC_INTR2_7_REG_END 0x0124f22c ++#define BCHP_TFEC_GR_BRIDGE_7_REG_START 0x0124f300 ++#define BCHP_TFEC_GR_BRIDGE_7_REG_END 0x0124f30c ++#define BCHP_AFECNX_GLOBAL_0_REG_START 0x01250000 ++#define BCHP_AFECNX_GLOBAL_0_REG_END 0x01250010 ++#define BCHP_AFECNX_0_REG_START 0x01250100 ++#define BCHP_AFECNX_0_REG_END 0x01250144 ++#define BCHP_AFEC0_0_REG_START 0x01251000 ++#define BCHP_AFEC0_0_REG_END 0x01251a0c ++#define BCHP_AFEC1_0_REG_START 0x01252000 ++#define BCHP_AFEC1_0_REG_END 0x01252a0c ++#define BCHP_AFEC0_INTR_0_REG_START 0x01253000 ++#define BCHP_AFEC0_INTR_0_REG_END 0x0125302c ++#define BCHP_AFEC1_INTR_0_REG_START 0x01253400 ++#define BCHP_AFEC1_INTR_0_REG_END 0x0125342c ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_START 0x01253800 ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_END 0x0125382c ++#define BCHP_AFEC_GR_BRIDGE_0_REG_START 0x01254000 ++#define BCHP_AFEC_GR_BRIDGE_0_REG_END 0x0125400c ++#define BCHP_AFECNX_GLOBAL_1_REG_START 0x01258000 ++#define BCHP_AFECNX_GLOBAL_1_REG_END 0x01258010 ++#define BCHP_AFECNX_1_REG_START 0x01258100 ++#define BCHP_AFECNX_1_REG_END 0x01258144 ++#define BCHP_AFEC0_1_REG_START 0x01259000 ++#define BCHP_AFEC0_1_REG_END 0x01259a0c ++#define BCHP_AFEC1_1_REG_START 0x0125a000 ++#define BCHP_AFEC1_1_REG_END 0x0125aa0c ++#define BCHP_AFEC0_INTR_1_REG_START 0x0125b000 ++#define BCHP_AFEC0_INTR_1_REG_END 0x0125b02c ++#define BCHP_AFEC1_INTR_1_REG_START 0x0125b400 ++#define BCHP_AFEC1_INTR_1_REG_END 0x0125b42c ++#define BCHP_AFEC_GLOBAL_INTR_1_REG_START 0x0125b800 ++#define BCHP_AFEC_GLOBAL_INTR_1_REG_END 0x0125b82c ++#define BCHP_AFEC_GR_BRIDGE_1_REG_START 0x0125c000 ++#define BCHP_AFEC_GR_BRIDGE_1_REG_END 0x0125c00c ++#define BCHP_AFECNX_GLOBAL_2_REG_START 0x01260000 ++#define BCHP_AFECNX_GLOBAL_2_REG_END 0x01260010 ++#define BCHP_AFECNX_2_REG_START 0x01260100 ++#define BCHP_AFECNX_2_REG_END 0x01260144 ++#define BCHP_AFEC0_2_REG_START 0x01261000 ++#define BCHP_AFEC0_2_REG_END 0x01261a0c ++#define BCHP_AFEC1_2_REG_START 0x01262000 ++#define BCHP_AFEC1_2_REG_END 0x01262a0c ++#define BCHP_AFEC0_INTR_2_REG_START 0x01263000 ++#define BCHP_AFEC0_INTR_2_REG_END 0x0126302c ++#define BCHP_AFEC1_INTR_2_REG_START 0x01263400 ++#define BCHP_AFEC1_INTR_2_REG_END 0x0126342c ++#define BCHP_AFEC_GLOBAL_INTR_2_REG_START 0x01263800 ++#define BCHP_AFEC_GLOBAL_INTR_2_REG_END 0x0126382c ++#define BCHP_AFEC_GR_BRIDGE_2_REG_START 0x01264000 ++#define BCHP_AFEC_GR_BRIDGE_2_REG_END 0x0126400c ++#define BCHP_AFECNX_GLOBAL_3_REG_START 0x01268000 ++#define BCHP_AFECNX_GLOBAL_3_REG_END 0x01268010 ++#define BCHP_AFECNX_3_REG_START 0x01268100 ++#define BCHP_AFECNX_3_REG_END 0x01268144 ++#define BCHP_AFEC0_3_REG_START 0x01269000 ++#define BCHP_AFEC0_3_REG_END 0x01269a0c ++#define BCHP_AFEC1_3_REG_START 0x0126a000 ++#define BCHP_AFEC1_3_REG_END 0x0126aa0c ++#define BCHP_AFEC0_INTR_3_REG_START 0x0126b000 ++#define BCHP_AFEC0_INTR_3_REG_END 0x0126b02c ++#define BCHP_AFEC1_INTR_3_REG_START 0x0126b400 ++#define BCHP_AFEC1_INTR_3_REG_END 0x0126b42c ++#define BCHP_AFEC_GLOBAL_INTR_3_REG_START 0x0126b800 ++#define BCHP_AFEC_GLOBAL_INTR_3_REG_END 0x0126b82c ++#define BCHP_AFEC_GR_BRIDGE_3_REG_START 0x0126c000 ++#define BCHP_AFEC_GR_BRIDGE_3_REG_END 0x0126c00c ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x01270200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x01270204 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_START 0x01270300 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_END 0x01270304 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x01271000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x01271fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x01272000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x012737fc ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_START 0x01400000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_END 0x0141fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_START 0x01420000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_END 0x0143fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_START 0x01440000 ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_END 0x01447ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_START 0x01450000 ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_END 0x014500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_START 0x01451000 ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_END 0x01451a08 ++#define BCHP_RF4CE_CPU_UART_REG_START 0x01452000 ++#define BCHP_RF4CE_CPU_UART_REG_END 0x01452ffc ++#define BCHP_RF4CE_CPU_WDG_REG_START 0x01453000 ++#define BCHP_RF4CE_CPU_WDG_REG_END 0x01453ffc ++#define BCHP_RF4CE_CPU_CTRL_REG_START 0x01480000 ++#define BCHP_RF4CE_CPU_CTRL_REG_END 0x0148008c ++#define BCHP_RF4CE_CPU_L2_REG_START 0x01480300 ++#define BCHP_RF4CE_CPU_L2_REG_END 0x01480314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_START 0x01480500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_END 0x0148052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_START 0x01480800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_END 0x0148082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_START 0x01480a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_END 0x01480a2c ++#define BCHP_TX_REG_START 0x014c0000 ++#define BCHP_TX_REG_END 0x014c0020 ++#define BCHP_RX_REG_START 0x014d0000 ++#define BCHP_RX_REG_END 0x014d01e0 ++#define BCHP_RF_REG_START 0x014e0000 ++#define BCHP_RF_REG_END 0x014e0098 ++#define BCHP_VCOCAL_REG_START 0x014e0100 ++#define BCHP_VCOCAL_REG_END 0x014e0174 ++#define BCHP_KVCO_REG_START 0x014e0200 ++#define BCHP_KVCO_REG_END 0x014e0224 ++#define BCHP_PA_REG_START 0x014e0300 ++#define BCHP_PA_REG_END 0x014e0314 ++#define BCHP_MAC_REG_START 0x014e0400 ++#define BCHP_MAC_REG_END 0x014e0564 ++#define BCHP_PWR_MGT_L2_REG_START 0x014e0600 ++#define BCHP_PWR_MGT_L2_REG_END 0x014e0614 ++#define BCHP_MISC_L2_REG_START 0x014e0700 ++#define BCHP_MISC_L2_REG_END 0x014e0714 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_START 0x014e0800 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_END 0x014e0814 ++#define BCHP_SYMCNT6_L2_REG_START 0x014e0900 ++#define BCHP_SYMCNT6_L2_REG_END 0x014e0914 ++#define BCHP_TX_DONE_L2_REG_START 0x014e0a00 ++#define BCHP_TX_DONE_L2_REG_END 0x014e0a14 ++#define BCHP_RX_DONE_L2_REG_START 0x014e0b00 ++#define BCHP_RX_DONE_L2_REG_END 0x014e0b14 ++#define BCHP_RX_START_L2_REG_START 0x014e0c00 ++#define BCHP_RX_START_L2_REG_END 0x014e0c14 ++#define BCHP_SYMCNT7_L2_REG_START 0x014e0d00 ++#define BCHP_SYMCNT7_L2_REG_END 0x014e0d14 ++#define BCHP_GCI_0_REG_START 0x014e1000 ++#define BCHP_GCI_0_REG_END 0x014e120c ++#define BCHP_GCI_1_REG_START 0x014e1400 ++#define BCHP_GCI_1_REG_END 0x014e1604 ++#define BCHP_GCI_2_REG_START 0x014e1800 ++#define BCHP_GCI_2_REG_END 0x014e1a04 ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_HD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_HD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_UHD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_UHD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B_NODCD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B_NODCD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_VSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_VSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_NO_DCXG ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_NO_DCXG :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_NO_DCXG_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_NO_DCXG_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x00000000000000000000000000000000000000000000000000000000ffffffff ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7366b0/bchp_usb_ctrl.h b/include/linux/brcmstb/7366b0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..0aebbde7 +--- /dev/null ++++ b/include/linux/brcmstb/7366b0/bchp_usb_ctrl.h +@@ -0,0 +1,1524 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Sep 3 15:00:03 2014 ++ * Full Compile MD5 Checksum 10187d4079392bab2546025f43274d34 ++ * (minus title and desc) ++ * MD5 Checksum c1587c5e16f21f52e852e7c7a65c7811 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008005 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00480200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00480204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00480208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0048020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00480210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00480214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00480218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0048021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00480220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00480224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00480228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0048022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00480230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00480234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00480238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0048023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00480240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00480244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00480248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0048024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00480250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00480254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00480258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0048025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00480260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00480264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00480268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0048026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00480270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00480274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00480278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0048027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004802a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004802a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004802a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004802ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004802b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004802b4 /* SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB_REVID 0x004802fc /* USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [25:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x03f00000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare1 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ohci_memreq_disable [08:08] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_SHIFT 8 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [07:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: xdc_soft_resetb [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [29:29] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 29 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [28:28] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [27:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x0fff0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xffc00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x00000017 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7366c0/bchp_common.h b/include/linux/brcmstb/7366c0/bchp_common.h +new file mode 100644 +index 00000000..63b1c4a4 +--- /dev/null ++++ b/include/linux/brcmstb/7366c0/bchp_common.h +@@ -0,0 +1,4379 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * All Rights Reserved ++ * Confidential Property of Broadcom Corporation ++ * ++ * ++ * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE ++ * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR ++ * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. ++ * ++ * $brcm_Workfile: $ ++ * $brcm_Revision: $ ++ * $brcm_Date: $ ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Tue Dec 2 03:18:21 2014 ++ * Full Compile MD5 Checksum 3461841ff250f7118305e1f1650424cf ++ * (minus title and desc) ++ * MD5 Checksum 92044aba65695bbffdeefc8d096b8587 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7366_C0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00100000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x014e1a08 /* GCI_2 is last */ ++#define BCHP_REGISTER_SIZE 0x004f8682 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0012073c ++#define BCHP_DECODE_MB_0_REG_START 0x00120740 ++#define BCHP_DECODE_MB_0_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x00125048 ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00126834 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00126b58 ++#define BCHP_RVC_0_REG_START 0x00126c00 ++#define BCHP_RVC_0_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00127000 ++#define BCHP_ILS_REGS_0_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0012738c ++#define BCHP_ILB_REGS_0_REG_START 0x00127400 ++#define BCHP_ILB_REGS_0_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x00145048 ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00146834 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00146b58 ++#define BCHP_RVC_2_0_REG_START 0x00146c00 ++#define BCHP_RVC_2_0_REG_END 0x00146c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x00147000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x001470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x00147100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x0014710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x00147180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x00147184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x00147200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x0014738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x00147400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x00147410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x00148100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x001481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x00148300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x0014831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x00148320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x0014833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x00148400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x0014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x00148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x0014857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x00148700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x0014871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x00148720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x0014873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x00148740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x0014875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x00148c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x00148dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x00148e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x00148efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x0014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x0014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x0014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x0014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x0014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x0014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x0014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x0014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0018002c ++#define BCHP_HVD_RGR_0_REG_START 0x00180400 ++#define BCHP_HVD_RGR_0_REG_END 0x00180410 ++#define BCHP_VICH_0_REG_START 0x001a0000 ++#define BCHP_VICH_0_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_RF4CE_GR_REG_START 0x00401600 ++#define BCHP_RF4CE_GR_REG_END 0x0040160c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x0040452c ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_BSCA_REG_START 0x0040a180 ++#define BCHP_BSCA_REG_END 0x0040a1d4 ++#define BCHP_BSCB_REG_START 0x0040a200 ++#define BCHP_BSCB_REG_END 0x0040a254 ++#define BCHP_BSCE_REG_START 0x0040a280 ++#define BCHP_BSCE_REG_END 0x0040a2d4 ++#define BCHP_BSCF_REG_START 0x0040a300 ++#define BCHP_BSCF_REG_END 0x0040a354 ++#define BCHP_BSCG_REG_START 0x0040a380 ++#define BCHP_BSCG_REG_END 0x0040a3d4 ++#define BCHP_GIO_REG_START 0x0040a400 ++#define BCHP_GIO_REG_END 0x0040a4bc ++#define BCHP_PM_REG_START 0x0040a500 ++#define BCHP_PM_REG_END 0x0040a508 ++#define BCHP_TIMER_REG_START 0x0040a540 ++#define BCHP_TIMER_REG_END 0x0040a57c ++#define BCHP_IRQ0_REG_START 0x0040a580 ++#define BCHP_IRQ0_REG_END 0x0040a584 ++#define BCHP_IRQ1_REG_START 0x0040a5c0 ++#define BCHP_IRQ1_REG_END 0x0040a5c4 ++#define BCHP_CTK_REG_START 0x0040a800 ++#define BCHP_CTK_REG_END 0x0040a978 ++#define BCHP_TMON_REG_START 0x0040a980 ++#define BCHP_TMON_REG_END 0x0040a9d4 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040aa00 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040aa2c ++#define BCHP_MCIF_REG_START 0x0040aa40 ++#define BCHP_MCIF_REG_END 0x0040aa68 ++#define BCHP_MCIF1_REG_START 0x0040aa80 ++#define BCHP_MCIF1_REG_END 0x0040aaa8 ++#define BCHP_MCIF_INTR2_REG_START 0x0040ab00 ++#define BCHP_MCIF_INTR2_REG_END 0x0040ab44 ++#define BCHP_SCA_REG_START 0x0040ac00 ++#define BCHP_SCA_REG_END 0x0040acfc ++#define BCHP_SCB_REG_START 0x0040ad00 ++#define BCHP_SCB_REG_END 0x0040adfc ++#define BCHP_SCIRQ0_REG_START 0x0040ae00 ++#define BCHP_SCIRQ0_REG_END 0x0040ae04 ++#define BCHP_SCIRQ1_REG_START 0x0040ae40 ++#define BCHP_SCIRQ1_REG_END 0x0040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040ae84 ++#define BCHP_UARTA_REG_START 0x0040b000 ++#define BCHP_UARTA_REG_END 0x0040b01c ++#define BCHP_UARTB_REG_START 0x0040b040 ++#define BCHP_UARTB_REG_END 0x0040b05c ++#define BCHP_UARTC_REG_START 0x0040b080 ++#define BCHP_UARTC_REG_END 0x0040b09c ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b0c0 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b0f0 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004105fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410718 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417040 ++#define BCHP_PM_AON_REG_END 0x00417048 ++#define BCHP_ICAP_REG_START 0x00417080 ++#define BCHP_ICAP_REG_END 0x004170bc ++#define BCHP_KBD1_REG_START 0x004170c0 ++#define BCHP_KBD1_REG_END 0x004170fc ++#define BCHP_KBD2_REG_START 0x00417100 ++#define BCHP_KBD2_REG_END 0x0041713c ++#define BCHP_KBD3_REG_START 0x00417140 ++#define BCHP_KBD3_REG_END 0x0041717c ++#define BCHP_BSCC_REG_START 0x00417180 ++#define BCHP_BSCC_REG_END 0x004171d4 ++#define BCHP_BSCD_REG_START 0x00417200 ++#define BCHP_BSCD_REG_END 0x00417254 ++#define BCHP_IRQ0_AON_REG_START 0x00417280 ++#define BCHP_IRQ0_AON_REG_END 0x00417284 ++#define BCHP_IRQ1_AON_REG_START 0x004172c0 ++#define BCHP_IRQ1_AON_REG_END 0x004172c4 ++#define BCHP_GIO_AON_REG_START 0x00417300 ++#define BCHP_GIO_AON_REG_END 0x0041733c ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417400 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041742c ++#define BCHP_WKTMR_REG_START 0x00417480 ++#define BCHP_WKTMR_REG_END 0x00417490 ++#define BCHP_BICAP_REG_START 0x004174c0 ++#define BCHP_BICAP_REG_END 0x004174f8 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_ITCH1_REG_START 0x00431200 ++#define BCHP_ITCH1_REG_END 0x00431200 ++#define BCHP_SDIO_0_HOST_REG_START 0x00440000 ++#define BCHP_SDIO_0_HOST_REG_END 0x004400fc ++#define BCHP_SDIO_0_CFG_REG_START 0x00440100 ++#define BCHP_SDIO_0_CFG_REG_END 0x004401fc ++#define BCHP_SDIO_1_HOST_REG_START 0x00440200 ++#define BCHP_SDIO_1_HOST_REG_END 0x004402fc ++#define BCHP_SDIO_1_CFG_REG_START 0x00440300 ++#define BCHP_SDIO_1_CFG_REG_END 0x004403fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x00440400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x0044043c ++#define BCHP_EBI_REG_START 0x00440800 ++#define BCHP_EBI_REG_END 0x00440bfc ++#define BCHP_HIF_INTR2_REG_START 0x00441000 ++#define BCHP_HIF_INTR2_REG_END 0x0044102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x00441500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x0044153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x00441600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x0044163c ++#define BCHP_HIF_RGR2_REG_START 0x00441700 ++#define BCHP_HIF_RGR2_REG_END 0x00441710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x00441a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x00441a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x00442000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x0044203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x00442100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x0044210c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x00442200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x004423fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x00442400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x004427fc ++#define BCHP_NAND_REG_START 0x00442800 ++#define BCHP_NAND_REG_END 0x00442dfc ++#define BCHP_FLASH_DMA_REG_START 0x00443000 ++#define BCHP_FLASH_DMA_REG_END 0x00443028 ++#define BCHP_BSPI_REG_START 0x00443200 ++#define BCHP_BSPI_REG_END 0x0044324c ++#define BCHP_BSPI_RAF_REG_START 0x00443300 ++#define BCHP_BSPI_RAF_REG_END 0x00443320 ++#define BCHP_HIF_MSPI_REG_START 0x00443400 ++#define BCHP_HIF_MSPI_REG_END 0x00443584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x00443600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x00443604 ++#define BCHP_IPI0_INTR2_REG_START 0x00444000 ++#define BCHP_IPI0_INTR2_REG_END 0x0044402c ++#define BCHP_IPI1_INTR2_REG_START 0x00444100 ++#define BCHP_IPI1_INTR2_REG_END 0x0044412c ++#define BCHP_BOOTSRAM_TM_REG_START 0x00450000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x0045fffc ++#define BCHP_HIF_CONTINUATION_REG_START 0x00462000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x004620fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x00462800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x00462804 ++#define BCHP_WEBHIF_RGR1_REG_START 0x00464000 ++#define BCHP_WEBHIF_RGR1_REG_END 0x00464010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x00464100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x0046412c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x00464600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x0046463c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x00464800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x0046481c ++#define BCHP_WEBHIF_TIMER_REG_START 0x00464900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x0046493c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x00464a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x00464a00 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x00465000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x0046502c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x00466000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x0046602c ++#define BCHP_SATA_GRB_REG_START 0x00468000 ++#define BCHP_SATA_GRB_REG_END 0x0046800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00468040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00468060 ++#define BCHP_SATA3_INTR2_REG_START 0x00468080 ++#define BCHP_SATA3_INTR2_REG_END 0x004680ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00468100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00468ffc ++#define BCHP_PORT1_SATA3_PCB_REG_START 0x00469100 ++#define BCHP_PORT1_SATA3_PCB_REG_END 0x00469ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0046a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0046a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0046a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0046a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0046a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0046a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0046a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0046a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0046a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0046a17c ++#define BCHP_SATA_PORT1_AHCI_S1_REG_START 0x0046a180 ++#define BCHP_SATA_PORT1_AHCI_S1_REG_END 0x0046a19c ++#define BCHP_SATA_PORT1_AHCI_S2_REG_START 0x0046a1a0 ++#define BCHP_SATA_PORT1_AHCI_S2_REG_END 0x0046a1b4 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_START 0x0046a1b8 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_END 0x0046a1fc ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0046a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0046a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0046a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0046a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0046a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0046a764 ++#define BCHP_SATA_PORT1_CTRL_REG_START 0x0046a780 ++#define BCHP_SATA_PORT1_CTRL_REG_END 0x0046a7b0 ++#define BCHP_SATA_PORT1_CJPAT_REG_START 0x0046a7c0 ++#define BCHP_SATA_PORT1_CJPAT_REG_END 0x0046a7e4 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0046a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0046a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0046a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0046a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0046a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0046a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0046a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0046a998 ++#define BCHP_SATA_PORT1_LEG_S1_REG_START 0x0046aa00 ++#define BCHP_SATA_PORT1_LEG_S1_REG_END 0x0046aa34 ++#define BCHP_SATA_PORT1_LEG_S2_REG_START 0x0046aa40 ++#define BCHP_SATA_PORT1_LEG_S2_REG_END 0x0046aa54 ++#define BCHP_SATA_PORT1_LEG_S3_REG_START 0x0046aa58 ++#define BCHP_SATA_PORT1_LEG_S3_REG_END 0x0046aa98 ++#define BCHP_RFM_SYSCLK_REG_START 0x0046c000 ++#define BCHP_RFM_SYSCLK_REG_END 0x0046c124 ++#define BCHP_RFM_CLK27_REG_START 0x0046c000 ++#define BCHP_RFM_CLK27_REG_END 0x0046c470 ++#define BCHP_RFM_L2_REG_START 0x0046cc00 ++#define BCHP_RFM_L2_REG_END 0x0046cc2c ++#define BCHP_RFM_GRB_REG_START 0x0046d000 ++#define BCHP_RFM_GRB_REG_END 0x0046d00c ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00470000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0047003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00470048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0047004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004700ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004700e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00470100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00470134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00470160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00470178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00470180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004701a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00470404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00470418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00470428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00470630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00470800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00470998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00471000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00471424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00471800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00471e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00472000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0047203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00472048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0047204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00472050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00472054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00472058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00472064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004720a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004720a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004720ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004720e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00472100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00472134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0047213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00472144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00472150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0047215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00472160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00472178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00472180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004721a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00472404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00472418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00472428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00472630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00472800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00472998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00473000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00473424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00473800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00473e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00474000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004740c8 ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00474100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00474104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00474200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00474204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00474300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0047432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00474400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0047446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00478000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00479008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00479200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00479210 ++#define BCHP_PCIE_0_RG_REG_START 0x00479300 ++#define BCHP_PCIE_0_RG_REG_END 0x0047930c ++#define BCHP_USB_CAPS_REG_START 0x00480000 ++#define BCHP_USB_CAPS_REG_END 0x0048002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00480100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0048010c ++#define BCHP_USB_INTR2_REG_START 0x00480180 ++#define BCHP_USB_INTR2_REG_END 0x004801ac ++#define BCHP_USB_CTRL_REG_START 0x00480200 ++#define BCHP_USB_CTRL_REG_END 0x004802fc ++#define BCHP_USB_EHCI_REG_START 0x00480300 ++#define BCHP_USB_EHCI_REG_END 0x004803a4 ++#define BCHP_USB_OHCI_REG_START 0x00480400 ++#define BCHP_USB_OHCI_REG_END 0x00480454 ++#define BCHP_USB_EHCI1_REG_START 0x00480500 ++#define BCHP_USB_EHCI1_REG_END 0x004805a4 ++#define BCHP_USB_OHCI1_REG_START 0x00480600 ++#define BCHP_USB_OHCI1_REG_END 0x00480654 ++#define BCHP_USB_XHCI_REG_START 0x00481000 ++#define BCHP_USB_XHCI_REG_END 0x004818c8 ++#define BCHP_USB_XHCI_EC_REG_START 0x00481940 ++#define BCHP_USB_XHCI_EC_REG_END 0x00481ffc ++#define BCHP_USB1_CAPS_REG_START 0x00490000 ++#define BCHP_USB1_CAPS_REG_END 0x0049002c ++#define BCHP_USB1_GR_BRIDGE_REG_START 0x00490100 ++#define BCHP_USB1_GR_BRIDGE_REG_END 0x0049010c ++#define BCHP_USB1_INTR2_REG_START 0x00490180 ++#define BCHP_USB1_INTR2_REG_END 0x004901ac ++#define BCHP_USB1_CTRL_REG_START 0x00490200 ++#define BCHP_USB1_CTRL_REG_END 0x004902fc ++#define BCHP_USB1_EHCI_REG_START 0x00490300 ++#define BCHP_USB1_EHCI_REG_END 0x004903a4 ++#define BCHP_USB1_OHCI_REG_START 0x00490400 ++#define BCHP_USB1_OHCI_REG_END 0x00490454 ++#define BCHP_USB1_EHCI1_REG_START 0x00490500 ++#define BCHP_USB1_EHCI1_REG_END 0x004905a4 ++#define BCHP_USB1_OHCI1_REG_START 0x00490600 ++#define BCHP_USB1_OHCI1_REG_END 0x00490654 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x004a0000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x004a003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x004a0048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x004a004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x004a00ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x004a00e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x004a0100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x004a0134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x004a0160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x004a0178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x004a0180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x004a01a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x004a0404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x004a0418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x004a0428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x004a0630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x004a0800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x004a0998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x004a1000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x004a1424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x004a1800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x004a1e1c ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_START 0x004a2000 ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_END 0x004a203c ++#define BCHP_PCIE_1_EP_CFG_PM_REG_START 0x004a2048 ++#define BCHP_PCIE_1_EP_CFG_PM_REG_END 0x004a204c ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_START 0x004a2050 ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_END 0x004a2054 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_START 0x004a2058 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_END 0x004a2064 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_START 0x004a20a0 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_END 0x004a20a8 ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_START 0x004a20ac ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_END 0x004a20e4 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_START 0x004a2100 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_END 0x004a2134 ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_START 0x004a213c ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_END 0x004a2144 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_START 0x004a2150 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_END 0x004a215c ++#define BCHP_PCIE_1_EP_CFG_VC_REG_START 0x004a2160 ++#define BCHP_PCIE_1_EP_CFG_VC_REG_END 0x004a2178 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_START 0x004a2180 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_END 0x004a21a4 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_START 0x004a2404 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_END 0x004a2418 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_START 0x004a2428 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_END 0x004a2630 ++#define BCHP_PCIE_1_EP_TL_REG_START 0x004a2800 ++#define BCHP_PCIE_1_EP_TL_REG_END 0x004a2998 ++#define BCHP_PCIE_1_EP_DL_REG_START 0x004a3000 ++#define BCHP_PCIE_1_EP_DL_REG_END 0x004a3424 ++#define BCHP_PCIE_1_EP_PL_REG_START 0x004a3800 ++#define BCHP_PCIE_1_EP_PL_REG_END 0x004a3e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x004a4000 ++#define BCHP_PCIE_1_MISC_REG_END 0x004a40c8 ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x004a4100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x004a4104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x004a4200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x004a4204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x004a4300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x004a432c ++#define BCHP_PCIE_1_DMA_REG_START 0x004a4400 ++#define BCHP_PCIE_1_DMA_REG_END 0x004a446c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x004a8000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x004a9008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x004a9200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x004a9210 ++#define BCHP_PCIE_1_RG_REG_START 0x004a9300 ++#define BCHP_PCIE_1_RG_REG_END 0x004a930c ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d1928 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2808 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x004d4600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x004d4624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x004d4640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x004d4664 ++#define BCHP_AVS_PMB_S_026_REG_START 0x004d4680 ++#define BCHP_AVS_PMB_S_026_REG_END 0x004d46a4 ++#define BCHP_AVS_PMB_S_027_REG_START 0x004d46c0 ++#define BCHP_AVS_PMB_S_027_REG_END 0x004d46e4 ++#define BCHP_AVS_PMB_S_028_REG_START 0x004d4700 ++#define BCHP_AVS_PMB_S_028_REG_END 0x004d4724 ++#define BCHP_AVS_PMB_S_029_REG_START 0x004d4740 ++#define BCHP_AVS_PMB_S_029_REG_END 0x004d4764 ++#define BCHP_AVS_PMB_S_030_REG_START 0x004d4780 ++#define BCHP_AVS_PMB_S_030_REG_END 0x004d47a4 ++#define BCHP_AVS_PMB_S_031_REG_START 0x004d47c0 ++#define BCHP_AVS_PMB_S_031_REG_END 0x004d47e4 ++#define BCHP_AVS_PMB_S_032_REG_START 0x004d4800 ++#define BCHP_AVS_PMB_S_032_REG_END 0x004d4824 ++#define BCHP_AVS_PMB_S_033_REG_START 0x004d4840 ++#define BCHP_AVS_PMB_S_033_REG_END 0x004d4864 ++#define BCHP_AVS_PMB_S_034_REG_START 0x004d4880 ++#define BCHP_AVS_PMB_S_034_REG_END 0x004d48a4 ++#define BCHP_AVS_PMB_S_035_REG_START 0x004d48c0 ++#define BCHP_AVS_PMB_S_035_REG_END 0x004d48e4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e086c ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4800 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4844 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_MEMC_GEN_0_REG_START 0x00500000 ++#define BCHP_MEMC_GEN_0_REG_END 0x005007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x00500800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x005008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x00500a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x00500afc ++#define BCHP_MEMC_ARC_0_REG_START 0x00500c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x00500f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x00501000 ++#define BCHP_MEMC_ARB_0_REG_END 0x005014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x00502000 ++#define BCHP_MEMC_DDR_0_REG_END 0x005027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x00503000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x00503044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x00503200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x00503244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x00503400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x00503444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x00503800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x005039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x00504000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x00504010 ++#define BCHP_MEMC_MISC_0_REG_START 0x00505000 ++#define BCHP_MEMC_MISC_0_REG_END 0x00505010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x00506000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x00506218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x00506400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x00506518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x00506600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x00506718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x00506800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x00506918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x00506a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x00506b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x00506c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x00506d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x00508000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x005080e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x00540000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0057fffc ++#define BCHP_S_MEMC_0_REG_START 0x00580000 ++#define BCHP_S_MEMC_0_REG_END 0x00580780 ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_MFD_2_REG_START 0x00600800 ++#define BCHP_MFD_2_REG_END 0x006009fc ++#define BCHP_VFD_0_REG_START 0x00602000 ++#define BCHP_VFD_0_REG_END 0x006021fc ++#define BCHP_VFD_1_REG_START 0x00602200 ++#define BCHP_VFD_1_REG_END 0x006023fc ++#define BCHP_VFD_2_REG_START 0x00602400 ++#define BCHP_VFD_2_REG_END 0x006025fc ++#define BCHP_VFD_3_REG_START 0x00602600 ++#define BCHP_VFD_3_REG_END 0x006027fc ++#define BCHP_RDC_REG_START 0x00603000 ++#define BCHP_RDC_REG_END 0x00603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060432c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060472c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060492c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060502c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060522c ++#define BCHP_FMISC_REG_START 0x00606000 ++#define BCHP_FMISC_REG_END 0x00606020 ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_SCL_2_REG_START 0x00620800 ++#define BCHP_SCL_2_REG_END 0x00620bfc ++#define BCHP_SCL_3_REG_START 0x00620c00 ++#define BCHP_SCL_3_REG_END 0x00620ffc ++#define BCHP_VNET_F_REG_START 0x00622000 ++#define BCHP_VNET_F_REG_END 0x006221fc ++#define BCHP_VNET_B_REG_START 0x00622200 ++#define BCHP_VNET_B_REG_END 0x006223fc ++#define BCHP_MMISC_REG_START 0x00622800 ++#define BCHP_MMISC_REG_END 0x00622828 ++#define BCHP_LBOX_0_REG_START 0x00624000 ++#define BCHP_LBOX_0_REG_END 0x00624070 ++#define BCHP_XSRC_0_REG_START 0x00624800 ++#define BCHP_XSRC_0_REG_END 0x00624bfc ++#define BCHP_XSRC_1_REG_START 0x00624c00 ++#define BCHP_XSRC_1_REG_END 0x00624ffc ++#define BCHP_DNR_0_REG_START 0x00626000 ++#define BCHP_DNR_0_REG_END 0x006260a4 ++#define BCHP_DNR_1_REG_START 0x00626200 ++#define BCHP_DNR_1_REG_END 0x006262a4 ++#define BCHP_DNR_2_REG_START 0x00626400 ++#define BCHP_DNR_2_REG_END 0x006264a4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x0062702c ++#define BCHP_BVNM_INTR2_1_REG_START 0x00627100 ++#define BCHP_BVNM_INTR2_1_REG_END 0x0062712c ++#define BCHP_DMISC_REG_START 0x00640000 ++#define BCHP_DMISC_REG_END 0x0064001c ++#define BCHP_MVP_TOP_0_REG_START 0x00644000 ++#define BCHP_MVP_TOP_0_REG_END 0x0064402c ++#define BCHP_SIOB_0_REG_START 0x00644200 ++#define BCHP_SIOB_0_REG_END 0x006442fc ++#define BCHP_HSCL_0_REG_START 0x00644400 ++#define BCHP_HSCL_0_REG_END 0x006447fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x00645000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x0064527c ++#define BCHP_HD_ANR_AND_0_REG_START 0x00645800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x00645888 ++#define BCHP_MDI_TOP_0_REG_START 0x00646000 ++#define BCHP_MDI_TOP_0_REG_END 0x006460fc ++#define BCHP_MDI_FCB_0_REG_START 0x00646400 ++#define BCHP_MDI_FCB_0_REG_END 0x006467fc ++#define BCHP_MDI_PPB_0_REG_START 0x00646800 ++#define BCHP_MDI_PPB_0_REG_END 0x00646bfc ++#define BCHP_MDI_MEMC_0_REG_START 0x00646c00 ++#define BCHP_MDI_MEMC_0_REG_END 0x00646dfc ++#define BCHP_MDI_FCN_0_REG_START 0x00646e00 ++#define BCHP_MDI_FCN_0_REG_END 0x006471fc ++#define BCHP_MVP_TOP_1_REG_START 0x00650000 ++#define BCHP_MVP_TOP_1_REG_END 0x0065002c ++#define BCHP_SIOB_1_REG_START 0x00650200 ++#define BCHP_SIOB_1_REG_END 0x006502fc ++#define BCHP_HSCL_1_REG_START 0x00650400 ++#define BCHP_HSCL_1_REG_END 0x006507fc ++#define BCHP_MDI_TOP_1_REG_START 0x00652000 ++#define BCHP_MDI_TOP_1_REG_END 0x006520fc ++#define BCHP_MDI_PPB_1_REG_START 0x00652800 ++#define BCHP_MDI_PPB_1_REG_END 0x00652bfc ++#define BCHP_MDI_FCN_1_REG_START 0x00652c00 ++#define BCHP_MDI_FCN_1_REG_END 0x00652ffc ++#define BCHP_MVP_TOP_2_REG_START 0x00658000 ++#define BCHP_MVP_TOP_2_REG_END 0x0065802c ++#define BCHP_SIOB_2_REG_START 0x00658200 ++#define BCHP_SIOB_2_REG_END 0x006582fc ++#define BCHP_HSCL_2_REG_START 0x00658400 ++#define BCHP_HSCL_2_REG_END 0x006587fc ++#define BCHP_MDI_TOP_2_REG_START 0x0065a000 ++#define BCHP_MDI_TOP_2_REG_END 0x0065a0fc ++#define BCHP_MDI_PPB_2_REG_START 0x0065a800 ++#define BCHP_MDI_PPB_2_REG_END 0x0065abfc ++#define BCHP_MDI_FCN_2_REG_START 0x0065ac00 ++#define BCHP_MDI_FCN_2_REG_END 0x0065affc ++#define BCHP_CAP_0_REG_START 0x00680000 ++#define BCHP_CAP_0_REG_END 0x0068010c ++#define BCHP_CAP_1_REG_START 0x00680200 ++#define BCHP_CAP_1_REG_END 0x0068030c ++#define BCHP_CAP_2_REG_START 0x00680400 ++#define BCHP_CAP_2_REG_END 0x0068050c ++#define BCHP_CAP_3_REG_START 0x00680600 ++#define BCHP_CAP_3_REG_END 0x0068070c ++#define BCHP_GFD_0_REG_START 0x00681000 ++#define BCHP_GFD_0_REG_END 0x0068122c ++#define BCHP_GFD_0_1_REG_START 0x00681400 ++#define BCHP_GFD_0_1_REG_END 0x0068162c ++#define BCHP_GFD_1_REG_START 0x00681800 ++#define BCHP_GFD_1_REG_END 0x00681a2c ++#define BCHP_GFD_2_REG_START 0x00681c00 ++#define BCHP_GFD_2_REG_END 0x00681e2c ++#define BCHP_CMP_0_REG_START 0x00683000 ++#define BCHP_CMP_0_REG_END 0x0068351c ++#define BCHP_CMP_1_REG_START 0x00683800 ++#define BCHP_CMP_1_REG_END 0x00683cc0 ++#define BCHP_CMP_2_REG_START 0x00684000 ++#define BCHP_CMP_2_REG_END 0x00684260 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00685800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006858a4 ++#define BCHP_MASK_0_REG_START 0x00685c00 ++#define BCHP_MASK_0_REG_END 0x00685c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00686000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00687284 ++#define BCHP_TNT_CMP_1_V0_REG_START 0x00687600 ++#define BCHP_TNT_CMP_1_V0_REG_END 0x006876a4 ++#define BCHP_MASK_1_REG_START 0x00687800 ++#define BCHP_MASK_1_REG_END 0x00687820 ++#define BCHP_BVNB_INTR2_REG_START 0x00688000 ++#define BCHP_BVNB_INTR2_REG_END 0x0068802c ++#define BCHP_BMISC_REG_START 0x00688400 ++#define BCHP_BMISC_REG_END 0x0068841c ++#define BCHP_MISC_REG_START 0x006a0000 ++#define BCHP_MISC_REG_END 0x006a00ac ++#define BCHP_IT_0_REG_START 0x006a1000 ++#define BCHP_IT_0_REG_END 0x006a17fc ++#define BCHP_IT_1_REG_START 0x006a2000 ++#define BCHP_IT_1_REG_END 0x006a27fc ++#define BCHP_VF_0_REG_START 0x006a3000 ++#define BCHP_VF_0_REG_END 0x006a3134 ++#define BCHP_SECAM_0_REG_START 0x006a3200 ++#define BCHP_SECAM_0_REG_END 0x006a3214 ++#define BCHP_SM_0_REG_START 0x006a3280 ++#define BCHP_SM_0_REG_END 0x006a32ac ++#define BCHP_SDSRC_0_REG_START 0x006a3300 ++#define BCHP_SDSRC_0_REG_END 0x006a330c ++#define BCHP_HDSRC_0_REG_START 0x006a3320 ++#define BCHP_HDSRC_0_REG_END 0x006a333c ++#define BCHP_CSC_0_REG_START 0x006a3380 ++#define BCHP_CSC_0_REG_END 0x006a33b0 ++#define BCHP_RM_0_REG_START 0x006a3400 ++#define BCHP_RM_0_REG_END 0x006a3430 ++#define BCHP_RM_1_REG_START 0x006a3440 ++#define BCHP_RM_1_REG_END 0x006a3470 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006a3500 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006a3544 ++#define BCHP_DVI_MISC_0_REG_START 0x006a3600 ++#define BCHP_DVI_MISC_0_REG_END 0x006a3600 ++#define BCHP_DVI_DTG_0_REG_START 0x006a4000 ++#define BCHP_DVI_DTG_0_REG_END 0x006a4488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006a4800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006a4830 ++#define BCHP_DVI_CSC_0_REG_START 0x006a4900 ++#define BCHP_DVI_CSC_0_REG_END 0x006a4930 ++#define BCHP_DVI_FC_0_REG_START 0x006a4a00 ++#define BCHP_DVI_FC_0_REG_END 0x006a4a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006a4b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006a4b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006a4c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006a4c44 ++#define BCHP_DVI_MISC_1_REG_START 0x006a4d00 ++#define BCHP_DVI_MISC_1_REG_END 0x006a4d00 ++#define BCHP_DVI_DTG_1_REG_START 0x006a5000 ++#define BCHP_DVI_DTG_1_REG_END 0x006a5488 ++#define BCHP_DVI_DTG_RM_1_REG_START 0x006a5800 ++#define BCHP_DVI_DTG_RM_1_REG_END 0x006a5830 ++#define BCHP_DVI_CSC_1_REG_START 0x006a5900 ++#define BCHP_DVI_CSC_1_REG_END 0x006a5930 ++#define BCHP_DVI_DVF_1_REG_START 0x006a5a00 ++#define BCHP_DVI_DVF_1_REG_END 0x006a5a18 ++#define BCHP_DVI_DEBUG_1_REG_START 0x006a5b00 ++#define BCHP_DVI_DEBUG_1_REG_END 0x006a5b44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006a6000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006a6488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006a6600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006a6630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006a6700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006a6718 ++#define BCHP_ITU656_0_REG_START 0x006a6800 ++#define BCHP_ITU656_0_REG_END 0x006a6820 ++#define BCHP_VEC_CFG_REG_START 0x006a6c00 ++#define BCHP_VEC_CFG_REG_END 0x006a6d48 ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006a7000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006a702c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006a7200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006a7320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006a7400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006a745c ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x006a7500 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x006a755c ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006a7600 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006a7608 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006a7700 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006a772c ++#define BCHP_DVP_TVG_0_REG_START 0x006a7800 ++#define BCHP_DVP_TVG_0_REG_END 0x006a7888 ++#define BCHP_DVP_TVG_1_REG_START 0x006a7900 ++#define BCHP_DVP_TVG_1_REG_END 0x006a7988 ++#define BCHP_VBI_ENC_REG_START 0x006a8000 ++#define BCHP_VBI_ENC_REG_END 0x006a8074 ++#define BCHP_CCE_0_REG_START 0x006a8400 ++#define BCHP_CCE_0_REG_END 0x006a8458 ++#define BCHP_WSE_0_REG_START 0x006a8500 ++#define BCHP_WSE_0_REG_END 0x006a8514 ++#define BCHP_CGMSAE_0_REG_START 0x006a8600 ++#define BCHP_CGMSAE_0_REG_END 0x006a8658 ++#define BCHP_TTE_0_REG_START 0x006a8700 ++#define BCHP_TTE_0_REG_END 0x006a8728 ++#define BCHP_GSE_0_REG_START 0x006a8800 ++#define BCHP_GSE_0_REG_END 0x006a8880 ++#define BCHP_AMOLE_0_REG_START 0x006a8900 ++#define BCHP_AMOLE_0_REG_END 0x006a898c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006a8a00 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006a8a54 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006a8b00 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006a8b0c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006a8c00 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006a8c28 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006a8d00 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006a8d80 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006a8e00 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006a8e8c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006a8f00 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006a8f24 ++#define BCHP_DVP_HT_REG_START 0x006c0000 ++#define BCHP_DVP_HT_REG_END 0x006c0114 ++#define BCHP_HDMI_REG_START 0x006c0800 ++#define BCHP_HDMI_REG_END 0x006c0afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006c0b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006c0dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006c0e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006c0e7c ++#define BCHP_HDMI_RM_REG_START 0x006c0e80 ++#define BCHP_HDMI_RM_REG_END 0x006c0eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006c0f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006c0f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006c0f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006c0fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006c1000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006c102c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006c1080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006c10ac ++#define BCHP_HDMI_RAM_REG_START 0x006c1100 ++#define BCHP_HDMI_RAM_REG_END 0x006c12fc ++#define BCHP_BVN_RGR_REG_START 0x006e0000 ++#define BCHP_BVN_RGR_REG_END 0x006e0010 ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x00700000 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x007002ec ++#define BCHP_VICE2_CME_0_0_REG_START 0x00700400 ++#define BCHP_VICE2_CME_0_0_REG_END 0x007004a0 ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x00700800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x0070088c ++#define BCHP_VICE2_FME_0_0_REG_START 0x00701000 ++#define BCHP_VICE2_FME_0_0_REG_END 0x007010c0 ++#define BCHP_VICE2_HA_0_0_REG_START 0x00701400 ++#define BCHP_VICE2_HA_0_0_REG_END 0x0070148c ++#define BCHP_VICE2_IMD_0_0_REG_START 0x00701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x0070187c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x00701c00 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x00701d28 ++#define BCHP_VICE2_MC_0_0_REG_START 0x00702000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x0070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x00702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x007025e4 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x00702800 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x00702a24 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x00702c00 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x00702e24 ++#define BCHP_VICE2_VIP2_0_0_REG_START 0x00703000 ++#define BCHP_VICE2_VIP2_0_0_REG_END 0x00703224 ++#define BCHP_VICE2_VIP3_0_0_REG_START 0x00703400 ++#define BCHP_VICE2_VIP3_0_0_REG_END 0x00703624 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x00704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x00705338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x00718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x007182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x00720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x007200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x00720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x0072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x00720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x0072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x00722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x007233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x00730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x0073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x00758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x007582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x00760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x007600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x00760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x0076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x00760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x0076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x00762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x007633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x00770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x0077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x00780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x0078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x00781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x00781050 ++#define BCHP_VICE2_L2_0_REG_START 0x00781100 ++#define BCHP_VICE2_L2_0_REG_END 0x0078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x00782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x007820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x00800000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x00800080 ++#define BCHP_MEMC_GEN_1_REG_START 0x00900000 ++#define BCHP_MEMC_GEN_1_REG_END 0x009007fc ++#define BCHP_MEMC_EDIS_1_0_REG_START 0x00900800 ++#define BCHP_MEMC_EDIS_1_0_REG_END 0x009008fc ++#define BCHP_MEMC_EDIS_1_1_REG_START 0x00900a00 ++#define BCHP_MEMC_EDIS_1_1_REG_END 0x00900afc ++#define BCHP_MEMC_ARC_1_REG_START 0x00900c00 ++#define BCHP_MEMC_ARC_1_REG_END 0x00900f74 ++#define BCHP_MEMC_ARB_1_REG_START 0x00901000 ++#define BCHP_MEMC_ARB_1_REG_END 0x009014cc ++#define BCHP_MEMC_DDR_1_REG_START 0x00902000 ++#define BCHP_MEMC_DDR_1_REG_END 0x009027fc ++#define BCHP_MEMC_L2_1_0_REG_START 0x00903000 ++#define BCHP_MEMC_L2_1_0_REG_END 0x00903044 ++#define BCHP_MEMC_L2_1_1_REG_START 0x00903200 ++#define BCHP_MEMC_L2_1_1_REG_END 0x00903244 ++#define BCHP_MEMC_L2_1_2_REG_START 0x00903400 ++#define BCHP_MEMC_L2_1_2_REG_END 0x00903444 ++#define BCHP_MEMC_TRACELOG_0_1_REG_START 0x00903800 ++#define BCHP_MEMC_TRACELOG_0_1_REG_END 0x009039fc ++#define BCHP_MEMC_RGRB_1_REG_START 0x00904000 ++#define BCHP_MEMC_RGRB_1_REG_END 0x00904010 ++#define BCHP_MEMC_MISC_1_REG_START 0x00905000 ++#define BCHP_MEMC_MISC_1_REG_END 0x00905010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_START 0x00906000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_END 0x00906218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_START 0x00906400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_END 0x00906518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_START 0x00906600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_END 0x00906718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_START 0x00906800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_END 0x00906918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_START 0x00906a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_END 0x00906b18 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_START 0x00906c00 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_END 0x00906d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_START 0x00908000 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_END 0x009080e0 ++#define BCHP_MEMC_SENTINEL_0_1_REG_START 0x00940000 ++#define BCHP_MEMC_SENTINEL_0_1_REG_END 0x0097fffc ++#define BCHP_S_MEMC_1_REG_START 0x00980000 ++#define BCHP_S_MEMC_1_REG_END 0x00980780 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02074 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f4 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02174 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f4 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02274 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f4 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02374 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f4 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02474 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f4 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02574 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f4 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02674 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f4 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e174 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_RAMS_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_RAMS_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b60000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b60010 ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b60040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b6004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b60080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b600b4 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b60200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b6022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b60240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b6026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b60300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b603b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b60600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b60628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b60800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b60ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b62000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b630d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b64000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b65084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b68000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b6fc48 ++#define BCHP_GENET_1_SYS_REG_START 0x00b80000 ++#define BCHP_GENET_1_SYS_REG_END 0x00b80010 ++#define BCHP_GENET_1_GR_BRIDGE_REG_START 0x00b80040 ++#define BCHP_GENET_1_GR_BRIDGE_REG_END 0x00b8004c ++#define BCHP_GENET_1_EXT_REG_START 0x00b80080 ++#define BCHP_GENET_1_EXT_REG_END 0x00b800b4 ++#define BCHP_GENET_1_INTRL2_0_REG_START 0x00b80200 ++#define BCHP_GENET_1_INTRL2_0_REG_END 0x00b8022c ++#define BCHP_GENET_1_INTRL2_1_REG_START 0x00b80240 ++#define BCHP_GENET_1_INTRL2_1_REG_END 0x00b8026c ++#define BCHP_GENET_1_RBUF_REG_START 0x00b80300 ++#define BCHP_GENET_1_RBUF_REG_END 0x00b803b4 ++#define BCHP_GENET_1_TBUF_REG_START 0x00b80600 ++#define BCHP_GENET_1_TBUF_REG_END 0x00b80628 ++#define BCHP_GENET_1_UMAC_REG_START 0x00b80800 ++#define BCHP_GENET_1_UMAC_REG_END 0x00b80ed8 ++#define BCHP_GENET_1_RDMA_REG_START 0x00b82000 ++#define BCHP_GENET_1_RDMA_REG_END 0x00b830d4 ++#define BCHP_GENET_1_TDMA_REG_START 0x00b84000 ++#define BCHP_GENET_1_TDMA_REG_END 0x00b85084 ++#define BCHP_GENET_1_HFB_REG_START 0x00b88000 ++#define BCHP_GENET_1_HFB_REG_END 0x00b8fc48 ++#define BCHP_GENET_2_SYS_REG_START 0x00ba0000 ++#define BCHP_GENET_2_SYS_REG_END 0x00ba0010 ++#define BCHP_GENET_2_GR_BRIDGE_REG_START 0x00ba0040 ++#define BCHP_GENET_2_GR_BRIDGE_REG_END 0x00ba004c ++#define BCHP_GENET_2_EXT_REG_START 0x00ba0080 ++#define BCHP_GENET_2_EXT_REG_END 0x00ba00b4 ++#define BCHP_GENET_2_INTRL2_0_REG_START 0x00ba0200 ++#define BCHP_GENET_2_INTRL2_0_REG_END 0x00ba022c ++#define BCHP_GENET_2_INTRL2_1_REG_START 0x00ba0240 ++#define BCHP_GENET_2_INTRL2_1_REG_END 0x00ba026c ++#define BCHP_GENET_2_RBUF_REG_START 0x00ba0300 ++#define BCHP_GENET_2_RBUF_REG_END 0x00ba03b4 ++#define BCHP_GENET_2_TBUF_REG_START 0x00ba0600 ++#define BCHP_GENET_2_TBUF_REG_END 0x00ba0628 ++#define BCHP_GENET_2_UMAC_REG_START 0x00ba0800 ++#define BCHP_GENET_2_UMAC_REG_END 0x00ba0ed8 ++#define BCHP_GENET_2_RDMA_REG_START 0x00ba2000 ++#define BCHP_GENET_2_RDMA_REG_END 0x00ba30d4 ++#define BCHP_GENET_2_TDMA_REG_START 0x00ba4000 ++#define BCHP_GENET_2_TDMA_REG_END 0x00ba5084 ++#define BCHP_GENET_2_HFB_REG_START 0x00ba8000 ++#define BCHP_GENET_2_HFB_REG_END 0x00bafc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_M2MC1_REG_START 0x00be6000 ++#define BCHP_M2MC1_REG_END 0x00be67fc ++#define BCHP_M2MC1_L2_REG_START 0x00be7000 ++#define BCHP_M2MC1_L2_REG_END 0x00be702c ++#define BCHP_M2MC1_GR_REG_START 0x00be7800 ++#define BCHP_M2MC1_GR_REG_END 0x00be780c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea040 ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea138 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea80c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa64 ++#define BCHP_V3D_DBG_REG_START 0x00beae00 ++#define BCHP_V3D_DBG_REG_END 0x00beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb02b4 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_END 0x00cb03b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb0f30 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1524 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb165c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb18fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb20ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb2864 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb2900 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb2964 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++#define BCHP_LEAP_ROM_REG_START 0x01000000 ++#define BCHP_LEAP_ROM_REG_END 0x01007ffc ++#define BCHP_LEAP_PROG0_MEM_REG_START 0x01040000 ++#define BCHP_LEAP_PROG0_MEM_REG_END 0x01043ffc ++#define BCHP_LEAP_PROG1_MEM_REG_START 0x01060000 ++#define BCHP_LEAP_PROG1_MEM_REG_END 0x0106fffc ++#define BCHP_LEAP_DATA_MEM_REG_START 0x01080000 ++#define BCHP_LEAP_DATA_MEM_REG_END 0x0109fffc ++#define BCHP_LEAP_CPU_CORE_REGS_REG_START 0x010a0000 ++#define BCHP_LEAP_CPU_CORE_REGS_REG_END 0x010a00fc ++#define BCHP_LEAP_CPU_AUX_REGS_REG_START 0x010c0000 ++#define BCHP_LEAP_CPU_AUX_REGS_REG_END 0x010c10c4 ++#define BCHP_LEAP_HAB_MEM_REG_START 0x010c8000 ++#define BCHP_LEAP_HAB_MEM_REG_END 0x010c83fc ++#define BCHP_LEAP_UART_REG_START 0x010c9000 ++#define BCHP_LEAP_UART_REG_END 0x010c9ffc ++#define BCHP_LEAP_WDG_REG_START 0x010ca000 ++#define BCHP_LEAP_WDG_REG_END 0x010caffc ++#define BCHP_LEAP_CTRL_REG_START 0x01100000 ++#define BCHP_LEAP_CTRL_REG_END 0x011002fc ++#define BCHP_LEAP_L1_REG_START 0x01100400 ++#define BCHP_LEAP_L1_REG_END 0x0110041c ++#define BCHP_LEAP_L2_REG_START 0x01100500 ++#define BCHP_LEAP_L2_REG_END 0x01100514 ++#define BCHP_LEAP_HOST_L1_REG_START 0x01100600 ++#define BCHP_LEAP_HOST_L1_REG_END 0x0110061c ++#define BCHP_LEAP_HOST_L2_REG_START 0x01100700 ++#define BCHP_LEAP_HOST_L2_REG_END 0x0110072c ++#define BCHP_LEAP_ROM_PATCH_REG_START 0x01100a00 ++#define BCHP_LEAP_ROM_PATCH_REG_END 0x01100a3c ++#define BCHP_LEAP_RGR_BRIDGE_REG_START 0x01100b00 ++#define BCHP_LEAP_RGR_BRIDGE_REG_END 0x01100b10 ++#define BCHP_FTM_UART_REG_START 0x01210000 ++#define BCHP_FTM_UART_REG_END 0x012100fc ++#define BCHP_FTM_PHY_REG_START 0x01210000 ++#define BCHP_FTM_PHY_REG_END 0x012101fc ++#define BCHP_FTM_PHY_ANA_REG_START 0x01210000 ++#define BCHP_FTM_PHY_ANA_REG_END 0x01210208 ++#define BCHP_FTM_SKIT_REG_START 0x01210000 ++#define BCHP_FTM_SKIT_REG_END 0x01210248 ++#define BCHP_FTM_INTR2_REG_START 0x01210000 ++#define BCHP_FTM_INTR2_REG_END 0x0121032c ++#define BCHP_FTM_SW_SPARE_REG_START 0x01210000 ++#define BCHP_FTM_SW_SPARE_REG_END 0x01210334 ++#define BCHP_SDS_DSEC_0_REG_START 0x01218000 ++#define BCHP_SDS_DSEC_0_REG_END 0x012180d4 ++#define BCHP_SDS_DSEC_INTR2_0_REG_START 0x01218100 ++#define BCHP_SDS_DSEC_INTR2_0_REG_END 0x0121812c ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_START 0x01218140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_0_REG_END 0x0121814c ++#define BCHP_SDS_DSEC_AP_0_REG_START 0x01218150 ++#define BCHP_SDS_DSEC_AP_0_REG_END 0x01218158 ++#define BCHP_SDS_DSEC_1_REG_START 0x01219000 ++#define BCHP_SDS_DSEC_1_REG_END 0x012190d4 ++#define BCHP_SDS_DSEC_INTR2_1_REG_START 0x01219100 ++#define BCHP_SDS_DSEC_INTR2_1_REG_END 0x0121912c ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_START 0x01219140 ++#define BCHP_SDS_DSEC_GR_BRIDGE_1_REG_END 0x0121914c ++#define BCHP_SDS_DSEC_AP_1_REG_START 0x01219150 ++#define BCHP_SDS_DSEC_AP_1_REG_END 0x01219158 ++#define BCHP_STB_CHAN_CTRL_REG_START 0x0121c000 ++#define BCHP_STB_CHAN_CTRL_REG_END 0x0121c040 ++#define BCHP_STB_CHAN_CH0_REG_START 0x0121c100 ++#define BCHP_STB_CHAN_CH0_REG_END 0x0121c1ec ++#define BCHP_STB_CHAN_CH1_REG_START 0x0121c200 ++#define BCHP_STB_CHAN_CH1_REG_END 0x0121c2ec ++#define BCHP_STB_CHAN_CH2_REG_START 0x0121c300 ++#define BCHP_STB_CHAN_CH2_REG_END 0x0121c3ec ++#define BCHP_STB_CHAN_CH3_REG_START 0x0121c400 ++#define BCHP_STB_CHAN_CH3_REG_END 0x0121c4ec ++#define BCHP_STB_CHAN_CH4_REG_START 0x0121c500 ++#define BCHP_STB_CHAN_CH4_REG_END 0x0121c5ec ++#define BCHP_STB_CHAN_CH5_REG_START 0x0121c600 ++#define BCHP_STB_CHAN_CH5_REG_END 0x0121c6ec ++#define BCHP_STB_CHAN_CH6_REG_START 0x0121c700 ++#define BCHP_STB_CHAN_CH6_REG_END 0x0121c7ec ++#define BCHP_STB_CHAN_CH7_REG_START 0x0121c800 ++#define BCHP_STB_CHAN_CH7_REG_END 0x0121c8ec ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_START 0x01224000 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE0_REG_END 0x01224118 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_START 0x01224800 ++#define BCHP_AIF_MDAC_CAL_SAT_CORE_INTR2_0_REG_END 0x0122482c ++#define BCHP_BAC_MSPI_REG_START 0x01225000 ++#define BCHP_BAC_MSPI_REG_END 0x01225018 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_START 0x01225800 ++#define BCHP_AIF_MDAC_CAL_SAT_BAC_REG_END 0x01225810 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_START 0x01226000 ++#define BCHP_AIF_MDAC_CAL_SAT_ANA_REG_END 0x01226094 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_START 0x01230000 ++#define BCHP_AIF_WB_SAT_CORE0_0_REG_END 0x01230474 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_START 0x01230800 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_0_REG_END 0x0123082c ++#define BCHP_AIF_WB_SAT_ANA_0_REG_START 0x01231000 ++#define BCHP_AIF_WB_SAT_ANA_0_REG_END 0x012310c0 ++#define BCHP_AIF_WB_SAT_CORE0_1_REG_START 0x01234000 ++#define BCHP_AIF_WB_SAT_CORE0_1_REG_END 0x01234474 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_1_REG_START 0x01234800 ++#define BCHP_AIF_WB_SAT_CORE_INTR2_0_1_REG_END 0x0123482c ++#define BCHP_AIF_WB_SAT_ANA_1_REG_START 0x01235000 ++#define BCHP_AIF_WB_SAT_ANA_1_REG_END 0x012350c0 ++#define BCHP_SDS_CG_0_REG_START 0x01240000 ++#define BCHP_SDS_CG_0_REG_END 0x0124003c ++#define BCHP_SDS_FE_0_REG_START 0x01240080 ++#define BCHP_SDS_FE_0_REG_END 0x012400bc ++#define BCHP_SDS_BL_0_REG_START 0x01240140 ++#define BCHP_SDS_BL_0_REG_END 0x01240160 ++#define BCHP_SDS_CL_0_REG_START 0x01240180 ++#define BCHP_SDS_CL_0_REG_END 0x012401fc ++#define BCHP_SDS_EQ_0_REG_START 0x01240200 ++#define BCHP_SDS_EQ_0_REG_END 0x0124028c ++#define BCHP_SDS_HP_0_REG_START 0x01240300 ++#define BCHP_SDS_HP_0_REG_END 0x012403e8 ++#define BCHP_SDS_VIT_0_REG_START 0x01240400 ++#define BCHP_SDS_VIT_0_REG_END 0x01240428 ++#define BCHP_SDS_FEC_0_REG_START 0x01240440 ++#define BCHP_SDS_FEC_0_REG_END 0x01240454 ++#define BCHP_SDS_OI_0_REG_START 0x01240480 ++#define BCHP_SDS_OI_0_REG_END 0x012404cc ++#define BCHP_SDS_SNR_0_REG_START 0x01240500 ++#define BCHP_SDS_SNR_0_REG_END 0x01240518 ++#define BCHP_SDS_BERT_0_REG_START 0x01240540 ++#define BCHP_SDS_BERT_0_REG_END 0x01240568 ++#define BCHP_SDS_DFT_0_REG_START 0x01240580 ++#define BCHP_SDS_DFT_0_REG_END 0x012405a8 ++#define BCHP_SDS_CWC_0_REG_START 0x01240600 ++#define BCHP_SDS_CWC_0_REG_END 0x01240694 ++#define BCHP_SDS_MISC_0_REG_START 0x01240700 ++#define BCHP_SDS_MISC_0_REG_END 0x01240798 ++#define BCHP_SDS_INTR2_0_0_REG_START 0x01240a00 ++#define BCHP_SDS_INTR2_0_0_REG_END 0x01240a2c ++#define BCHP_SDS_GR_BRIDGE_0_REG_START 0x01240c00 ++#define BCHP_SDS_GR_BRIDGE_0_REG_END 0x01240c0c ++#define BCHP_SDS_CG_1_REG_START 0x01241000 ++#define BCHP_SDS_CG_1_REG_END 0x0124103c ++#define BCHP_SDS_FE_1_REG_START 0x01241080 ++#define BCHP_SDS_FE_1_REG_END 0x012410bc ++#define BCHP_SDS_BL_1_REG_START 0x01241140 ++#define BCHP_SDS_BL_1_REG_END 0x01241160 ++#define BCHP_SDS_CL_1_REG_START 0x01241180 ++#define BCHP_SDS_CL_1_REG_END 0x012411fc ++#define BCHP_SDS_EQ_1_REG_START 0x01241200 ++#define BCHP_SDS_EQ_1_REG_END 0x0124128c ++#define BCHP_SDS_HP_1_REG_START 0x01241300 ++#define BCHP_SDS_HP_1_REG_END 0x012413e8 ++#define BCHP_SDS_VIT_1_REG_START 0x01241400 ++#define BCHP_SDS_VIT_1_REG_END 0x01241428 ++#define BCHP_SDS_FEC_1_REG_START 0x01241440 ++#define BCHP_SDS_FEC_1_REG_END 0x01241454 ++#define BCHP_SDS_OI_1_REG_START 0x01241480 ++#define BCHP_SDS_OI_1_REG_END 0x012414cc ++#define BCHP_SDS_SNR_1_REG_START 0x01241500 ++#define BCHP_SDS_SNR_1_REG_END 0x01241518 ++#define BCHP_SDS_BERT_1_REG_START 0x01241540 ++#define BCHP_SDS_BERT_1_REG_END 0x01241568 ++#define BCHP_SDS_DFT_1_REG_START 0x01241580 ++#define BCHP_SDS_DFT_1_REG_END 0x012415a8 ++#define BCHP_SDS_CWC_1_REG_START 0x01241600 ++#define BCHP_SDS_CWC_1_REG_END 0x01241694 ++#define BCHP_SDS_MISC_1_REG_START 0x01241700 ++#define BCHP_SDS_MISC_1_REG_END 0x01241798 ++#define BCHP_SDS_INTR2_0_1_REG_START 0x01241a00 ++#define BCHP_SDS_INTR2_0_1_REG_END 0x01241a2c ++#define BCHP_SDS_GR_BRIDGE_1_REG_START 0x01241c00 ++#define BCHP_SDS_GR_BRIDGE_1_REG_END 0x01241c0c ++#define BCHP_SDS_CG_2_REG_START 0x01242000 ++#define BCHP_SDS_CG_2_REG_END 0x0124203c ++#define BCHP_SDS_FE_2_REG_START 0x01242080 ++#define BCHP_SDS_FE_2_REG_END 0x012420bc ++#define BCHP_SDS_BL_2_REG_START 0x01242140 ++#define BCHP_SDS_BL_2_REG_END 0x01242160 ++#define BCHP_SDS_CL_2_REG_START 0x01242180 ++#define BCHP_SDS_CL_2_REG_END 0x012421fc ++#define BCHP_SDS_EQ_2_REG_START 0x01242200 ++#define BCHP_SDS_EQ_2_REG_END 0x0124228c ++#define BCHP_SDS_HP_2_REG_START 0x01242300 ++#define BCHP_SDS_HP_2_REG_END 0x012423e8 ++#define BCHP_SDS_VIT_2_REG_START 0x01242400 ++#define BCHP_SDS_VIT_2_REG_END 0x01242428 ++#define BCHP_SDS_FEC_2_REG_START 0x01242440 ++#define BCHP_SDS_FEC_2_REG_END 0x01242454 ++#define BCHP_SDS_OI_2_REG_START 0x01242480 ++#define BCHP_SDS_OI_2_REG_END 0x012424cc ++#define BCHP_SDS_SNR_2_REG_START 0x01242500 ++#define BCHP_SDS_SNR_2_REG_END 0x01242518 ++#define BCHP_SDS_BERT_2_REG_START 0x01242540 ++#define BCHP_SDS_BERT_2_REG_END 0x01242568 ++#define BCHP_SDS_DFT_2_REG_START 0x01242580 ++#define BCHP_SDS_DFT_2_REG_END 0x012425a8 ++#define BCHP_SDS_CWC_2_REG_START 0x01242600 ++#define BCHP_SDS_CWC_2_REG_END 0x01242694 ++#define BCHP_SDS_MISC_2_REG_START 0x01242700 ++#define BCHP_SDS_MISC_2_REG_END 0x01242798 ++#define BCHP_SDS_INTR2_0_2_REG_START 0x01242a00 ++#define BCHP_SDS_INTR2_0_2_REG_END 0x01242a2c ++#define BCHP_SDS_GR_BRIDGE_2_REG_START 0x01242c00 ++#define BCHP_SDS_GR_BRIDGE_2_REG_END 0x01242c0c ++#define BCHP_SDS_CG_3_REG_START 0x01243000 ++#define BCHP_SDS_CG_3_REG_END 0x0124303c ++#define BCHP_SDS_FE_3_REG_START 0x01243080 ++#define BCHP_SDS_FE_3_REG_END 0x012430bc ++#define BCHP_SDS_BL_3_REG_START 0x01243140 ++#define BCHP_SDS_BL_3_REG_END 0x01243160 ++#define BCHP_SDS_CL_3_REG_START 0x01243180 ++#define BCHP_SDS_CL_3_REG_END 0x012431fc ++#define BCHP_SDS_EQ_3_REG_START 0x01243200 ++#define BCHP_SDS_EQ_3_REG_END 0x0124328c ++#define BCHP_SDS_HP_3_REG_START 0x01243300 ++#define BCHP_SDS_HP_3_REG_END 0x012433e8 ++#define BCHP_SDS_VIT_3_REG_START 0x01243400 ++#define BCHP_SDS_VIT_3_REG_END 0x01243428 ++#define BCHP_SDS_FEC_3_REG_START 0x01243440 ++#define BCHP_SDS_FEC_3_REG_END 0x01243454 ++#define BCHP_SDS_OI_3_REG_START 0x01243480 ++#define BCHP_SDS_OI_3_REG_END 0x012434cc ++#define BCHP_SDS_SNR_3_REG_START 0x01243500 ++#define BCHP_SDS_SNR_3_REG_END 0x01243518 ++#define BCHP_SDS_BERT_3_REG_START 0x01243540 ++#define BCHP_SDS_BERT_3_REG_END 0x01243568 ++#define BCHP_SDS_DFT_3_REG_START 0x01243580 ++#define BCHP_SDS_DFT_3_REG_END 0x012435a8 ++#define BCHP_SDS_CWC_3_REG_START 0x01243600 ++#define BCHP_SDS_CWC_3_REG_END 0x01243694 ++#define BCHP_SDS_MISC_3_REG_START 0x01243700 ++#define BCHP_SDS_MISC_3_REG_END 0x01243798 ++#define BCHP_SDS_INTR2_0_3_REG_START 0x01243a00 ++#define BCHP_SDS_INTR2_0_3_REG_END 0x01243a2c ++#define BCHP_SDS_GR_BRIDGE_3_REG_START 0x01243c00 ++#define BCHP_SDS_GR_BRIDGE_3_REG_END 0x01243c0c ++#define BCHP_SDS_CG_4_REG_START 0x01244000 ++#define BCHP_SDS_CG_4_REG_END 0x0124403c ++#define BCHP_SDS_FE_4_REG_START 0x01244080 ++#define BCHP_SDS_FE_4_REG_END 0x012440bc ++#define BCHP_SDS_BL_4_REG_START 0x01244140 ++#define BCHP_SDS_BL_4_REG_END 0x01244160 ++#define BCHP_SDS_CL_4_REG_START 0x01244180 ++#define BCHP_SDS_CL_4_REG_END 0x012441fc ++#define BCHP_SDS_EQ_4_REG_START 0x01244200 ++#define BCHP_SDS_EQ_4_REG_END 0x0124428c ++#define BCHP_SDS_HP_4_REG_START 0x01244300 ++#define BCHP_SDS_HP_4_REG_END 0x012443e8 ++#define BCHP_SDS_VIT_4_REG_START 0x01244400 ++#define BCHP_SDS_VIT_4_REG_END 0x01244428 ++#define BCHP_SDS_FEC_4_REG_START 0x01244440 ++#define BCHP_SDS_FEC_4_REG_END 0x01244454 ++#define BCHP_SDS_OI_4_REG_START 0x01244480 ++#define BCHP_SDS_OI_4_REG_END 0x012444cc ++#define BCHP_SDS_SNR_4_REG_START 0x01244500 ++#define BCHP_SDS_SNR_4_REG_END 0x01244518 ++#define BCHP_SDS_BERT_4_REG_START 0x01244540 ++#define BCHP_SDS_BERT_4_REG_END 0x01244568 ++#define BCHP_SDS_DFT_4_REG_START 0x01244580 ++#define BCHP_SDS_DFT_4_REG_END 0x012445a8 ++#define BCHP_SDS_CWC_4_REG_START 0x01244600 ++#define BCHP_SDS_CWC_4_REG_END 0x01244694 ++#define BCHP_SDS_MISC_4_REG_START 0x01244700 ++#define BCHP_SDS_MISC_4_REG_END 0x01244798 ++#define BCHP_SDS_INTR2_0_4_REG_START 0x01244a00 ++#define BCHP_SDS_INTR2_0_4_REG_END 0x01244a2c ++#define BCHP_SDS_GR_BRIDGE_4_REG_START 0x01244c00 ++#define BCHP_SDS_GR_BRIDGE_4_REG_END 0x01244c0c ++#define BCHP_SDS_CG_5_REG_START 0x01245000 ++#define BCHP_SDS_CG_5_REG_END 0x0124503c ++#define BCHP_SDS_FE_5_REG_START 0x01245080 ++#define BCHP_SDS_FE_5_REG_END 0x012450bc ++#define BCHP_SDS_BL_5_REG_START 0x01245140 ++#define BCHP_SDS_BL_5_REG_END 0x01245160 ++#define BCHP_SDS_CL_5_REG_START 0x01245180 ++#define BCHP_SDS_CL_5_REG_END 0x012451fc ++#define BCHP_SDS_EQ_5_REG_START 0x01245200 ++#define BCHP_SDS_EQ_5_REG_END 0x0124528c ++#define BCHP_SDS_HP_5_REG_START 0x01245300 ++#define BCHP_SDS_HP_5_REG_END 0x012453e8 ++#define BCHP_SDS_VIT_5_REG_START 0x01245400 ++#define BCHP_SDS_VIT_5_REG_END 0x01245428 ++#define BCHP_SDS_FEC_5_REG_START 0x01245440 ++#define BCHP_SDS_FEC_5_REG_END 0x01245454 ++#define BCHP_SDS_OI_5_REG_START 0x01245480 ++#define BCHP_SDS_OI_5_REG_END 0x012454cc ++#define BCHP_SDS_SNR_5_REG_START 0x01245500 ++#define BCHP_SDS_SNR_5_REG_END 0x01245518 ++#define BCHP_SDS_BERT_5_REG_START 0x01245540 ++#define BCHP_SDS_BERT_5_REG_END 0x01245568 ++#define BCHP_SDS_DFT_5_REG_START 0x01245580 ++#define BCHP_SDS_DFT_5_REG_END 0x012455a8 ++#define BCHP_SDS_CWC_5_REG_START 0x01245600 ++#define BCHP_SDS_CWC_5_REG_END 0x01245694 ++#define BCHP_SDS_MISC_5_REG_START 0x01245700 ++#define BCHP_SDS_MISC_5_REG_END 0x01245798 ++#define BCHP_SDS_INTR2_0_5_REG_START 0x01245a00 ++#define BCHP_SDS_INTR2_0_5_REG_END 0x01245a2c ++#define BCHP_SDS_GR_BRIDGE_5_REG_START 0x01245c00 ++#define BCHP_SDS_GR_BRIDGE_5_REG_END 0x01245c0c ++#define BCHP_SDS_CG_6_REG_START 0x01246000 ++#define BCHP_SDS_CG_6_REG_END 0x0124603c ++#define BCHP_SDS_FE_6_REG_START 0x01246080 ++#define BCHP_SDS_FE_6_REG_END 0x012460bc ++#define BCHP_SDS_BL_6_REG_START 0x01246140 ++#define BCHP_SDS_BL_6_REG_END 0x01246160 ++#define BCHP_SDS_CL_6_REG_START 0x01246180 ++#define BCHP_SDS_CL_6_REG_END 0x012461fc ++#define BCHP_SDS_EQ_6_REG_START 0x01246200 ++#define BCHP_SDS_EQ_6_REG_END 0x0124628c ++#define BCHP_SDS_HP_6_REG_START 0x01246300 ++#define BCHP_SDS_HP_6_REG_END 0x012463e8 ++#define BCHP_SDS_VIT_6_REG_START 0x01246400 ++#define BCHP_SDS_VIT_6_REG_END 0x01246428 ++#define BCHP_SDS_FEC_6_REG_START 0x01246440 ++#define BCHP_SDS_FEC_6_REG_END 0x01246454 ++#define BCHP_SDS_OI_6_REG_START 0x01246480 ++#define BCHP_SDS_OI_6_REG_END 0x012464cc ++#define BCHP_SDS_SNR_6_REG_START 0x01246500 ++#define BCHP_SDS_SNR_6_REG_END 0x01246518 ++#define BCHP_SDS_BERT_6_REG_START 0x01246540 ++#define BCHP_SDS_BERT_6_REG_END 0x01246568 ++#define BCHP_SDS_DFT_6_REG_START 0x01246580 ++#define BCHP_SDS_DFT_6_REG_END 0x012465a8 ++#define BCHP_SDS_CWC_6_REG_START 0x01246600 ++#define BCHP_SDS_CWC_6_REG_END 0x01246694 ++#define BCHP_SDS_MISC_6_REG_START 0x01246700 ++#define BCHP_SDS_MISC_6_REG_END 0x01246798 ++#define BCHP_SDS_INTR2_0_6_REG_START 0x01246a00 ++#define BCHP_SDS_INTR2_0_6_REG_END 0x01246a2c ++#define BCHP_SDS_GR_BRIDGE_6_REG_START 0x01246c00 ++#define BCHP_SDS_GR_BRIDGE_6_REG_END 0x01246c0c ++#define BCHP_SDS_CG_7_REG_START 0x01247000 ++#define BCHP_SDS_CG_7_REG_END 0x0124703c ++#define BCHP_SDS_FE_7_REG_START 0x01247080 ++#define BCHP_SDS_FE_7_REG_END 0x012470bc ++#define BCHP_SDS_BL_7_REG_START 0x01247140 ++#define BCHP_SDS_BL_7_REG_END 0x01247160 ++#define BCHP_SDS_CL_7_REG_START 0x01247180 ++#define BCHP_SDS_CL_7_REG_END 0x012471fc ++#define BCHP_SDS_EQ_7_REG_START 0x01247200 ++#define BCHP_SDS_EQ_7_REG_END 0x0124728c ++#define BCHP_SDS_HP_7_REG_START 0x01247300 ++#define BCHP_SDS_HP_7_REG_END 0x012473e8 ++#define BCHP_SDS_VIT_7_REG_START 0x01247400 ++#define BCHP_SDS_VIT_7_REG_END 0x01247428 ++#define BCHP_SDS_FEC_7_REG_START 0x01247440 ++#define BCHP_SDS_FEC_7_REG_END 0x01247454 ++#define BCHP_SDS_OI_7_REG_START 0x01247480 ++#define BCHP_SDS_OI_7_REG_END 0x012474cc ++#define BCHP_SDS_SNR_7_REG_START 0x01247500 ++#define BCHP_SDS_SNR_7_REG_END 0x01247518 ++#define BCHP_SDS_BERT_7_REG_START 0x01247540 ++#define BCHP_SDS_BERT_7_REG_END 0x01247568 ++#define BCHP_SDS_DFT_7_REG_START 0x01247580 ++#define BCHP_SDS_DFT_7_REG_END 0x012475a8 ++#define BCHP_SDS_CWC_7_REG_START 0x01247600 ++#define BCHP_SDS_CWC_7_REG_END 0x01247694 ++#define BCHP_SDS_MISC_7_REG_START 0x01247700 ++#define BCHP_SDS_MISC_7_REG_END 0x01247798 ++#define BCHP_SDS_INTR2_0_7_REG_START 0x01247a00 ++#define BCHP_SDS_INTR2_0_7_REG_END 0x01247a2c ++#define BCHP_SDS_GR_BRIDGE_7_REG_START 0x01247c00 ++#define BCHP_SDS_GR_BRIDGE_7_REG_END 0x01247c0c ++#define BCHP_TFEC_0_REG_START 0x01248000 ++#define BCHP_TFEC_0_REG_END 0x01248060 ++#define BCHP_TFEC_MISC_0_REG_START 0x01248100 ++#define BCHP_TFEC_MISC_0_REG_END 0x01248108 ++#define BCHP_TFEC_INTR2_0_REG_START 0x01248200 ++#define BCHP_TFEC_INTR2_0_REG_END 0x0124822c ++#define BCHP_TFEC_GR_BRIDGE_0_REG_START 0x01248300 ++#define BCHP_TFEC_GR_BRIDGE_0_REG_END 0x0124830c ++#define BCHP_TFEC_1_REG_START 0x01249000 ++#define BCHP_TFEC_1_REG_END 0x01249060 ++#define BCHP_TFEC_MISC_1_REG_START 0x01249100 ++#define BCHP_TFEC_MISC_1_REG_END 0x01249108 ++#define BCHP_TFEC_INTR2_1_REG_START 0x01249200 ++#define BCHP_TFEC_INTR2_1_REG_END 0x0124922c ++#define BCHP_TFEC_GR_BRIDGE_1_REG_START 0x01249300 ++#define BCHP_TFEC_GR_BRIDGE_1_REG_END 0x0124930c ++#define BCHP_TFEC_2_REG_START 0x0124a000 ++#define BCHP_TFEC_2_REG_END 0x0124a060 ++#define BCHP_TFEC_MISC_2_REG_START 0x0124a100 ++#define BCHP_TFEC_MISC_2_REG_END 0x0124a108 ++#define BCHP_TFEC_INTR2_2_REG_START 0x0124a200 ++#define BCHP_TFEC_INTR2_2_REG_END 0x0124a22c ++#define BCHP_TFEC_GR_BRIDGE_2_REG_START 0x0124a300 ++#define BCHP_TFEC_GR_BRIDGE_2_REG_END 0x0124a30c ++#define BCHP_TFEC_3_REG_START 0x0124b000 ++#define BCHP_TFEC_3_REG_END 0x0124b060 ++#define BCHP_TFEC_MISC_3_REG_START 0x0124b100 ++#define BCHP_TFEC_MISC_3_REG_END 0x0124b108 ++#define BCHP_TFEC_INTR2_3_REG_START 0x0124b200 ++#define BCHP_TFEC_INTR2_3_REG_END 0x0124b22c ++#define BCHP_TFEC_GR_BRIDGE_3_REG_START 0x0124b300 ++#define BCHP_TFEC_GR_BRIDGE_3_REG_END 0x0124b30c ++#define BCHP_TFEC_4_REG_START 0x0124c000 ++#define BCHP_TFEC_4_REG_END 0x0124c060 ++#define BCHP_TFEC_MISC_4_REG_START 0x0124c100 ++#define BCHP_TFEC_MISC_4_REG_END 0x0124c108 ++#define BCHP_TFEC_INTR2_4_REG_START 0x0124c200 ++#define BCHP_TFEC_INTR2_4_REG_END 0x0124c22c ++#define BCHP_TFEC_GR_BRIDGE_4_REG_START 0x0124c300 ++#define BCHP_TFEC_GR_BRIDGE_4_REG_END 0x0124c30c ++#define BCHP_TFEC_5_REG_START 0x0124d000 ++#define BCHP_TFEC_5_REG_END 0x0124d060 ++#define BCHP_TFEC_MISC_5_REG_START 0x0124d100 ++#define BCHP_TFEC_MISC_5_REG_END 0x0124d108 ++#define BCHP_TFEC_INTR2_5_REG_START 0x0124d200 ++#define BCHP_TFEC_INTR2_5_REG_END 0x0124d22c ++#define BCHP_TFEC_GR_BRIDGE_5_REG_START 0x0124d300 ++#define BCHP_TFEC_GR_BRIDGE_5_REG_END 0x0124d30c ++#define BCHP_TFEC_6_REG_START 0x0124e000 ++#define BCHP_TFEC_6_REG_END 0x0124e060 ++#define BCHP_TFEC_MISC_6_REG_START 0x0124e100 ++#define BCHP_TFEC_MISC_6_REG_END 0x0124e108 ++#define BCHP_TFEC_INTR2_6_REG_START 0x0124e200 ++#define BCHP_TFEC_INTR2_6_REG_END 0x0124e22c ++#define BCHP_TFEC_GR_BRIDGE_6_REG_START 0x0124e300 ++#define BCHP_TFEC_GR_BRIDGE_6_REG_END 0x0124e30c ++#define BCHP_TFEC_7_REG_START 0x0124f000 ++#define BCHP_TFEC_7_REG_END 0x0124f060 ++#define BCHP_TFEC_MISC_7_REG_START 0x0124f100 ++#define BCHP_TFEC_MISC_7_REG_END 0x0124f108 ++#define BCHP_TFEC_INTR2_7_REG_START 0x0124f200 ++#define BCHP_TFEC_INTR2_7_REG_END 0x0124f22c ++#define BCHP_TFEC_GR_BRIDGE_7_REG_START 0x0124f300 ++#define BCHP_TFEC_GR_BRIDGE_7_REG_END 0x0124f30c ++#define BCHP_AFECNX_GLOBAL_0_REG_START 0x01250000 ++#define BCHP_AFECNX_GLOBAL_0_REG_END 0x01250010 ++#define BCHP_AFECNX_0_REG_START 0x01250100 ++#define BCHP_AFECNX_0_REG_END 0x01250144 ++#define BCHP_AFEC0_0_REG_START 0x01251000 ++#define BCHP_AFEC0_0_REG_END 0x01251a0c ++#define BCHP_AFEC1_0_REG_START 0x01252000 ++#define BCHP_AFEC1_0_REG_END 0x01252a0c ++#define BCHP_AFEC0_INTR_0_REG_START 0x01253000 ++#define BCHP_AFEC0_INTR_0_REG_END 0x0125302c ++#define BCHP_AFEC1_INTR_0_REG_START 0x01253400 ++#define BCHP_AFEC1_INTR_0_REG_END 0x0125342c ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_START 0x01253800 ++#define BCHP_AFEC_GLOBAL_INTR_0_REG_END 0x0125382c ++#define BCHP_AFEC_GR_BRIDGE_0_REG_START 0x01254000 ++#define BCHP_AFEC_GR_BRIDGE_0_REG_END 0x0125400c ++#define BCHP_AFECNX_GLOBAL_1_REG_START 0x01258000 ++#define BCHP_AFECNX_GLOBAL_1_REG_END 0x01258010 ++#define BCHP_AFECNX_1_REG_START 0x01258100 ++#define BCHP_AFECNX_1_REG_END 0x01258144 ++#define BCHP_AFEC0_1_REG_START 0x01259000 ++#define BCHP_AFEC0_1_REG_END 0x01259a0c ++#define BCHP_AFEC1_1_REG_START 0x0125a000 ++#define BCHP_AFEC1_1_REG_END 0x0125aa0c ++#define BCHP_AFEC0_INTR_1_REG_START 0x0125b000 ++#define BCHP_AFEC0_INTR_1_REG_END 0x0125b02c ++#define BCHP_AFEC1_INTR_1_REG_START 0x0125b400 ++#define BCHP_AFEC1_INTR_1_REG_END 0x0125b42c ++#define BCHP_AFEC_GLOBAL_INTR_1_REG_START 0x0125b800 ++#define BCHP_AFEC_GLOBAL_INTR_1_REG_END 0x0125b82c ++#define BCHP_AFEC_GR_BRIDGE_1_REG_START 0x0125c000 ++#define BCHP_AFEC_GR_BRIDGE_1_REG_END 0x0125c00c ++#define BCHP_AFECNX_GLOBAL_2_REG_START 0x01260000 ++#define BCHP_AFECNX_GLOBAL_2_REG_END 0x01260010 ++#define BCHP_AFECNX_2_REG_START 0x01260100 ++#define BCHP_AFECNX_2_REG_END 0x01260144 ++#define BCHP_AFEC0_2_REG_START 0x01261000 ++#define BCHP_AFEC0_2_REG_END 0x01261a0c ++#define BCHP_AFEC1_2_REG_START 0x01262000 ++#define BCHP_AFEC1_2_REG_END 0x01262a0c ++#define BCHP_AFEC0_INTR_2_REG_START 0x01263000 ++#define BCHP_AFEC0_INTR_2_REG_END 0x0126302c ++#define BCHP_AFEC1_INTR_2_REG_START 0x01263400 ++#define BCHP_AFEC1_INTR_2_REG_END 0x0126342c ++#define BCHP_AFEC_GLOBAL_INTR_2_REG_START 0x01263800 ++#define BCHP_AFEC_GLOBAL_INTR_2_REG_END 0x0126382c ++#define BCHP_AFEC_GR_BRIDGE_2_REG_START 0x01264000 ++#define BCHP_AFEC_GR_BRIDGE_2_REG_END 0x0126400c ++#define BCHP_AFECNX_GLOBAL_3_REG_START 0x01268000 ++#define BCHP_AFECNX_GLOBAL_3_REG_END 0x01268010 ++#define BCHP_AFECNX_3_REG_START 0x01268100 ++#define BCHP_AFECNX_3_REG_END 0x01268144 ++#define BCHP_AFEC0_3_REG_START 0x01269000 ++#define BCHP_AFEC0_3_REG_END 0x01269a0c ++#define BCHP_AFEC1_3_REG_START 0x0126a000 ++#define BCHP_AFEC1_3_REG_END 0x0126aa0c ++#define BCHP_AFEC0_INTR_3_REG_START 0x0126b000 ++#define BCHP_AFEC0_INTR_3_REG_END 0x0126b02c ++#define BCHP_AFEC1_INTR_3_REG_START 0x0126b400 ++#define BCHP_AFEC1_INTR_3_REG_END 0x0126b42c ++#define BCHP_AFEC_GLOBAL_INTR_3_REG_START 0x0126b800 ++#define BCHP_AFEC_GLOBAL_INTR_3_REG_END 0x0126b82c ++#define BCHP_AFEC_GR_BRIDGE_3_REG_START 0x0126c000 ++#define BCHP_AFEC_GR_BRIDGE_3_REG_END 0x0126c00c ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_START 0x01270200 ++#define BCHP_DEMOD_XPT_MTSIF_TX0_IO_REG_END 0x01270204 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_START 0x01270300 ++#define BCHP_DEMOD_XPT_MTSIF_TX1_IO_REG_END 0x01270304 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_START 0x01271000 ++#define BCHP_DEMOD_XPT_WAKEUP_REG_END 0x01271fbc ++#define BCHP_DEMOD_XPT_FE_REG_START 0x01272000 ++#define BCHP_DEMOD_XPT_FE_REG_END 0x012737fc ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_START 0x01400000 ++#define BCHP_RF4CE_CPU_PROG0_MEM_REG_END 0x0141fffc ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_START 0x01420000 ++#define BCHP_RF4CE_CPU_PROG1_MEM_REG_END 0x0143fffc ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_START 0x01440000 ++#define BCHP_RF4CE_CPU_DATA_MEM_REG_END 0x01447ffc ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_START 0x01450000 ++#define BCHP_RF4CE_CPU_CORE_REGS_REG_END 0x014500fc ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_START 0x01451000 ++#define BCHP_RF4CE_CPU_AUX_REGS_REG_END 0x01451a08 ++#define BCHP_RF4CE_CPU_UART_REG_START 0x01452000 ++#define BCHP_RF4CE_CPU_UART_REG_END 0x01452ffc ++#define BCHP_RF4CE_CPU_WDG_REG_START 0x01453000 ++#define BCHP_RF4CE_CPU_WDG_REG_END 0x01453ffc ++#define BCHP_RF4CE_CPU_CTRL_REG_START 0x01480000 ++#define BCHP_RF4CE_CPU_CTRL_REG_END 0x0148008c ++#define BCHP_RF4CE_CPU_L2_REG_START 0x01480300 ++#define BCHP_RF4CE_CPU_L2_REG_END 0x01480314 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_START 0x01480500 ++#define BCHP_RF4CE_CPU_HOST_STB_L2_REG_END 0x0148052c ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_START 0x01480800 ++#define BCHP_RF4CE_CPU_HOST_CM_L2_REG_END 0x0148082c ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_START 0x01480a00 ++#define BCHP_RF4CE_CPU_HOST_RG_L2_REG_END 0x01480a2c ++#define BCHP_TX_REG_START 0x014c0000 ++#define BCHP_TX_REG_END 0x014c0020 ++#define BCHP_RX_REG_START 0x014d0000 ++#define BCHP_RX_REG_END 0x014d01e0 ++#define BCHP_RF_REG_START 0x014e0000 ++#define BCHP_RF_REG_END 0x014e0098 ++#define BCHP_VCOCAL_REG_START 0x014e0100 ++#define BCHP_VCOCAL_REG_END 0x014e0174 ++#define BCHP_KVCO_REG_START 0x014e0200 ++#define BCHP_KVCO_REG_END 0x014e0224 ++#define BCHP_PA_REG_START 0x014e0300 ++#define BCHP_PA_REG_END 0x014e0314 ++#define BCHP_MAC_REG_START 0x014e0400 ++#define BCHP_MAC_REG_END 0x014e0564 ++#define BCHP_PWR_MGT_L2_REG_START 0x014e0600 ++#define BCHP_PWR_MGT_L2_REG_END 0x014e0614 ++#define BCHP_MISC_L2_REG_START 0x014e0700 ++#define BCHP_MISC_L2_REG_END 0x014e0714 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_START 0x014e0800 ++#define BCHP_IQCAL_CCA_CCM_L2_REG_END 0x014e0814 ++#define BCHP_SYMCNT6_L2_REG_START 0x014e0900 ++#define BCHP_SYMCNT6_L2_REG_END 0x014e0914 ++#define BCHP_TX_DONE_L2_REG_START 0x014e0a00 ++#define BCHP_TX_DONE_L2_REG_END 0x014e0a14 ++#define BCHP_RX_DONE_L2_REG_START 0x014e0b00 ++#define BCHP_RX_DONE_L2_REG_END 0x014e0b14 ++#define BCHP_RX_START_L2_REG_START 0x014e0c00 ++#define BCHP_RX_START_L2_REG_END 0x014e0c14 ++#define BCHP_SYMCNT7_L2_REG_START 0x014e0d00 ++#define BCHP_SYMCNT7_L2_REG_END 0x014e0d14 ++#define BCHP_GCI_0_REG_START 0x014e1000 ++#define BCHP_GCI_0_REG_END 0x014e120c ++#define BCHP_GCI_1_REG_START 0x014e1400 ++#define BCHP_GCI_1_REG_END 0x014e1604 ++#define BCHP_GCI_2_REG_START 0x014e1800 ++#define BCHP_GCI_2_REG_END 0x014e1a04 ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_HD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_HD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_UHD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_UHD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B_NODCD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B_NODCD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_VSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_VSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_NO_DCXG ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_NO_DCXG :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_NO_DCXG_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_NO_DCXG_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7366c0/bchp_usb_ctrl.h b/include/linux/brcmstb/7366c0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..3c09d4a0 +--- /dev/null ++++ b/include/linux/brcmstb/7366c0/bchp_usb_ctrl.h +@@ -0,0 +1,1510 @@ ++/**************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * All Rights Reserved ++ * Confidential Property of Broadcom Corporation ++ * ++ * ++ * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE ++ * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR ++ * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Feb 18 03:13:18 2015 ++ * Full Compile MD5 Checksum e2f31009bf32b83eddf082e72de66fc9 ++ * (minus title and desc) ++ * MD5 Checksum 5d3a169247e37ce28e4167f85d3a548a ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB.pm 15517 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00480200 /* [RW] Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00480204 /* [RW] PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00480208 /* [RW] Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0048020c /* [RW] Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00480210 /* [RW] Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00480214 /* [RW] MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00480218 /* [RO] MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0048021c /* [RW] Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00480220 /* [RW] Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00480224 /* [RW] Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00480228 /* [RO] Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0048022c /* [RW] UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00480230 /* [RW] UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00480234 /* [RW] Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00480238 /* [RW] usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0048023c /* [RW] OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00480240 /* [RW] 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00480244 /* [RW] 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00480248 /* [RW] 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0048024c /* [RW] 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00480250 /* [RW] PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00480254 /* [RW] diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00480258 /* [RW] Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0048025c /* [RW] Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00480260 /* [RW] USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00480264 /* [RW] USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00480268 /* [RW] USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0048026c /* [RW] USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00480270 /* [RW] USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00480274 /* [RW] USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00480278 /* [RW] Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0048027c /* [RW] Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004802a0 /* [RW] SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004802a4 /* [RW] SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004802a8 /* [RW] SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004802ac /* [RW] SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004802b0 /* [RW] SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004802b4 /* [RW] SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB_REVID 0x004802fc /* [RO] USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [25:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x03f00000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare1 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_setup_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffe0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ohci_memreq_disable [08:08] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_SHIFT 8 ++#define BCHP_USB_CTRL_USB_SIMCTL_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [07:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: USB_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [29:29] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 29 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [28:28] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [27:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x0fff0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xffc00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x00000017 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/74371a0/bchp_common.h b/include/linux/brcmstb/74371a0/bchp_common.h +new file mode 100644 +index 00000000..95d3e7b3 +--- /dev/null ++++ b/include/linux/brcmstb/74371a0/bchp_common.h +@@ -0,0 +1,3483 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Tue Sep 23 03:15:42 2014 ++ * Full Compile MD5 Checksum 10286fa42cc96ac09acff850b78bff11 ++ * (minus title and desc) ++ * MD5 Checksum ce337eadb7e967dd87c606b1a7500a2c ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM74371_A0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00100000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x00fffda0 /* MOCA_HOSTMISC is last */ ++#define BCHP_REGISTER_SIZE 0x003bff68 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0012073c ++#define BCHP_DECODE_MB_0_REG_START 0x00120740 ++#define BCHP_DECODE_MB_0_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x0012503c ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00126834 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00126b58 ++#define BCHP_RVC_0_REG_START 0x00126c00 ++#define BCHP_RVC_0_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00127000 ++#define BCHP_ILS_REGS_0_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0012738c ++#define BCHP_ILB_REGS_0_REG_START 0x00127400 ++#define BCHP_ILB_REGS_0_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00137ffc ++#define BCHP_SHVD_INTR2_0_REG_START 0x00180000 ++#define BCHP_SHVD_INTR2_0_REG_END 0x0018002c ++#define BCHP_SHVD_RGR_0_REG_START 0x00180400 ++#define BCHP_SHVD_RGR_0_REG_END 0x00180410 ++#define BCHP_VICH_0_REG_START 0x001a0000 ++#define BCHP_VICH_0_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310410 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310420 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310430 ++#define BCHP_SCPU_INTR1_REG_START 0x00310440 ++#define BCHP_SCPU_INTR1_REG_END 0x00310458 ++#define BCHP_INTERNAL_INTR2_REG_START 0x00310480 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ac ++#define BCHP_BSP_IPI_INTR2_REG_START 0x003104c0 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x003104ec ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00310540 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031056c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00310580 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x003105ac ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x003105c0 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x003105c8 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x003105e0 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x003105f4 ++#define BCHP_SAGE_UART_REG_START 0x00310600 ++#define BCHP_SAGE_UART_REG_END 0x0031061c ++#define BCHP_SCPU_PM_REG_START 0x00310980 ++#define BCHP_SCPU_PM_REG_END 0x00310988 ++#define BCHP_SCPU_TIMER_REG_START 0x00310e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00310ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_S_SCPU_REG_START 0x003a0000 ++#define BCHP_S_SCPU_REG_END 0x003b3ffc ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x00404518 ++#define BCHP_IRB_REG_START 0x00406000 ++#define BCHP_IRB_REG_END 0x00406138 ++#define BCHP_PM_REG_START 0x00406180 ++#define BCHP_PM_REG_END 0x00406188 ++#define BCHP_BSCA_REG_START 0x00406200 ++#define BCHP_BSCA_REG_END 0x00406254 ++#define BCHP_BSCB_REG_START 0x00406280 ++#define BCHP_BSCB_REG_END 0x004062d4 ++#define BCHP_BSCE_REG_START 0x00406300 ++#define BCHP_BSCE_REG_END 0x00406354 ++#define BCHP_BSCF_REG_START 0x00406380 ++#define BCHP_BSCF_REG_END 0x004063d4 ++#define BCHP_PWM_REG_START 0x00406580 ++#define BCHP_PWM_REG_END 0x004065a4 ++#define BCHP_GIO_REG_START 0x00406700 ++#define BCHP_GIO_REG_END 0x0040679c ++#define BCHP_IRQ0_REG_START 0x00406800 ++#define BCHP_IRQ0_REG_END 0x00406804 ++#define BCHP_IRQ1_REG_START 0x00406808 ++#define BCHP_IRQ1_REG_END 0x0040680c ++#define BCHP_TIMER_REG_START 0x00406840 ++#define BCHP_TIMER_REG_END 0x0040687c ++#define BCHP_PWMB_REG_START 0x00406880 ++#define BCHP_PWMB_REG_END 0x004068a4 ++#define BCHP_UARTA_REG_START 0x00406b00 ++#define BCHP_UARTA_REG_END 0x00406b1c ++#define BCHP_UARTB_REG_START 0x00406b40 ++#define BCHP_UARTB_REG_END 0x00406b5c ++#define BCHP_UARTC_REG_START 0x00406b80 ++#define BCHP_UARTC_REG_END 0x00406b9c ++#define BCHP_SCA_REG_START 0x00406c00 ++#define BCHP_SCA_REG_END 0x00406cbc ++#define BCHP_SCB_REG_START 0x00406d00 ++#define BCHP_SCB_REG_END 0x00406dbc ++#define BCHP_SCIRQ0_REG_START 0x00406e00 ++#define BCHP_SCIRQ0_REG_END 0x00406e04 ++#define BCHP_SCIRQ1_REG_START 0x00406e40 ++#define BCHP_SCIRQ1_REG_END 0x00406e44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x00406e80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x00406e84 ++#define BCHP_MCIF_REG_START 0x00407000 ++#define BCHP_MCIF_REG_END 0x00407028 ++#define BCHP_MCIF1_REG_START 0x00407040 ++#define BCHP_MCIF1_REG_END 0x00407068 ++#define BCHP_MCIF_INTR2_REG_START 0x00407080 ++#define BCHP_MCIF_INTR2_REG_END 0x004070c4 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x00407100 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040712c ++#define BCHP_UPG_UART_DMA_REG_START 0x00407600 ++#define BCHP_UPG_UART_DMA_REG_END 0x00407630 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004103fc ++#define BCHP_AON_L2_REG_START 0x00410400 ++#define BCHP_AON_L2_REG_END 0x0041042c ++#define BCHP_AON_PM_L2_REG_START 0x00410440 ++#define BCHP_AON_PM_L2_REG_END 0x0041046c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410500 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410518 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410600 ++#define BCHP_AON_HDMI_TX_REG_END 0x00410698 ++#define BCHP_AON_HDMI_TX_1_REG_START 0x00410700 ++#define BCHP_AON_HDMI_TX_1_REG_END 0x00410798 ++#define BCHP_AON_HDMI_RX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_RX_REG_END 0x00410900 ++#define BCHP_MSPI_REG_START 0x00411000 ++#define BCHP_MSPI_REG_END 0x0041117c ++#define BCHP_LDK_REG_START 0x00411180 ++#define BCHP_LDK_REG_END 0x004111bc ++#define BCHP_PM_AON_REG_START 0x004111c0 ++#define BCHP_PM_AON_REG_END 0x004111c8 ++#define BCHP_ICAP_REG_START 0x00411200 ++#define BCHP_ICAP_REG_END 0x0041123c ++#define BCHP_KBD1_REG_START 0x00411240 ++#define BCHP_KBD1_REG_END 0x0041127c ++#define BCHP_KBD2_REG_START 0x00411280 ++#define BCHP_KBD2_REG_END 0x004112bc ++#define BCHP_KBD3_REG_START 0x004112c0 ++#define BCHP_KBD3_REG_END 0x004112fc ++#define BCHP_BSCC_REG_START 0x00411300 ++#define BCHP_BSCC_REG_END 0x00411354 ++#define BCHP_BSCD_REG_START 0x00411380 ++#define BCHP_BSCD_REG_END 0x004113d4 ++#define BCHP_IRQ0_AON_REG_START 0x00411480 ++#define BCHP_IRQ0_AON_REG_END 0x00411484 ++#define BCHP_IRQ1_AON_REG_START 0x00411488 ++#define BCHP_IRQ1_AON_REG_END 0x0041148c ++#define BCHP_GIO_AON_REG_START 0x004114c0 ++#define BCHP_GIO_AON_REG_END 0x004114fc ++#define BCHP_BICAP_REG_START 0x00411500 ++#define BCHP_BICAP_REG_END 0x00411538 ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00411540 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041156c ++#define BCHP_WKTMR_REG_START 0x00411580 ++#define BCHP_WKTMR_REG_END 0x00411590 ++#define BCHP_CNTControlBase_REG_START 0x00414000 ++#define BCHP_CNTControlBase_REG_END 0x00414ffc ++#define BCHP_CNTReadBase_REG_START 0x00416000 ++#define BCHP_CNTReadBase_REG_END 0x00416ffc ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e804 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_ITCH1_REG_START 0x00431200 ++#define BCHP_ITCH1_REG_END 0x00431200 ++#define BCHP_SDIO_0_HOST_REG_START 0x00440000 ++#define BCHP_SDIO_0_HOST_REG_END 0x004400fc ++#define BCHP_SDIO_0_CFG_REG_START 0x00440100 ++#define BCHP_SDIO_0_CFG_REG_END 0x004401fc ++#define BCHP_SDIO_1_HOST_REG_START 0x00440200 ++#define BCHP_SDIO_1_HOST_REG_END 0x004402fc ++#define BCHP_SDIO_1_CFG_REG_START 0x00440300 ++#define BCHP_SDIO_1_CFG_REG_END 0x004403fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x00440400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x0044043c ++#define BCHP_EBI_REG_START 0x00440800 ++#define BCHP_EBI_REG_END 0x00440bfc ++#define BCHP_HIF_INTR2_REG_START 0x00441000 ++#define BCHP_HIF_INTR2_REG_END 0x0044102c ++#define BCHP_IPI0_INTR2_REG_START 0x00441100 ++#define BCHP_IPI0_INTR2_REG_END 0x0044112c ++#define BCHP_IPI1_INTR2_REG_START 0x00441200 ++#define BCHP_IPI1_INTR2_REG_END 0x0044122c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x00441500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x0044153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x00441600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x0044163c ++#define BCHP_HIF_RGR2_REG_START 0x00441700 ++#define BCHP_HIF_RGR2_REG_END 0x00441710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x00441a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x00441a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x00442000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x0044203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x00442100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x0044210c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x00442200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x004423fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x00442400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x004427fc ++#define BCHP_NAND_REG_START 0x00442800 ++#define BCHP_NAND_REG_END 0x00442dfc ++#define BCHP_FLASH_DMA_REG_START 0x00443000 ++#define BCHP_FLASH_DMA_REG_END 0x00443028 ++#define BCHP_BSPI_REG_START 0x00443200 ++#define BCHP_BSPI_REG_END 0x0044324c ++#define BCHP_BSPI_RAF_REG_START 0x00443300 ++#define BCHP_BSPI_RAF_REG_END 0x00443320 ++#define BCHP_HIF_MSPI_REG_START 0x00443400 ++#define BCHP_HIF_MSPI_REG_END 0x00443584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x00443600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x00443604 ++#define BCHP_BOOTSRAM_TM_REG_START 0x00450000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x0045fffc ++#define BCHP_WEBHIF_RGR1_REG_START 0x00460000 ++#define BCHP_WEBHIF_RGR1_REG_END 0x00460010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x00460100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x0046012c ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x00460200 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x0046022c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x00460400 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x0046042c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x00460600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x0046063c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x00460800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x0046081c ++#define BCHP_WEBHIF_TIMER_REG_START 0x00460900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x0046093c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x00460a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x00460a00 ++#define BCHP_HIF_CONTINUATION_REG_START 0x00462000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x004620fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x00462800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x00462804 ++#define BCHP_SATA_GRB_REG_START 0x00468000 ++#define BCHP_SATA_GRB_REG_END 0x0046800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00468040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00468060 ++#define BCHP_SATA3_INTR2_REG_START 0x00468080 ++#define BCHP_SATA3_INTR2_REG_END 0x004680ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00468100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00468ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0046a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0046a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0046a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0046a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0046a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0046a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0046a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0046a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0046a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0046a17c ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0046a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0046a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0046a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0046a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0046a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0046a764 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0046a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0046a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0046a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0046a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0046a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0046a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0046a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0046a998 ++#define BCHP_RFM_SYSCLK_REG_START 0x0046c000 ++#define BCHP_RFM_SYSCLK_REG_END 0x0046c124 ++#define BCHP_RFM_CLK27_REG_START 0x0046c000 ++#define BCHP_RFM_CLK27_REG_END 0x0046c470 ++#define BCHP_RFM_L2_REG_START 0x0046cc00 ++#define BCHP_RFM_L2_REG_END 0x0046cc2c ++#define BCHP_RFM_GRB_REG_START 0x0046d000 ++#define BCHP_RFM_GRB_REG_END 0x0046d00c ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00470000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0047003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00470048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0047004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004700ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004700e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00470100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00470134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00470160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00470178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00470180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004701a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00470404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00470418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00470428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00470630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00470800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00470998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00471000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00471424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00471800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00471e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00472000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0047203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00472048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0047204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00472050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00472054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00472058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00472064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004720a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004720a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004720ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004720e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00472100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00472134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0047213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00472144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00472150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0047215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00472160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00472178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00472180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004721a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00472404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00472418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00472428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00472630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00472800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00472998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00473000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00473424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00473800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00473e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00474000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004740c4 ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00474100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00474104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00474200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00474204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00474300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0047432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00474400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0047446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00478000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00479008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00479200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00479210 ++#define BCHP_PCIE_0_RG_REG_START 0x00479300 ++#define BCHP_PCIE_0_RG_REG_END 0x0047930c ++#define BCHP_USB_CAPS_REG_START 0x00480000 ++#define BCHP_USB_CAPS_REG_END 0x0048002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00480100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0048010c ++#define BCHP_USB_INTR2_REG_START 0x00480180 ++#define BCHP_USB_INTR2_REG_END 0x004801ac ++#define BCHP_USB_CTRL_REG_START 0x00480200 ++#define BCHP_USB_CTRL_REG_END 0x0048027c ++#define BCHP_USB_EHCI_REG_START 0x00480300 ++#define BCHP_USB_EHCI_REG_END 0x004803a4 ++#define BCHP_USB_OHCI_REG_START 0x00480400 ++#define BCHP_USB_OHCI_REG_END 0x00480454 ++#define BCHP_USB_EHCI1_REG_START 0x00480500 ++#define BCHP_USB_EHCI1_REG_END 0x004805a4 ++#define BCHP_USB_OHCI1_REG_START 0x00480600 ++#define BCHP_USB_OHCI1_REG_END 0x00480654 ++#define BCHP_USB_XHCI_REG_START 0x00481000 ++#define BCHP_USB_XHCI_REG_END 0x004818c8 ++#define BCHP_USB_XHCI_EC_REG_START 0x00481940 ++#define BCHP_USB_XHCI_EC_REG_END 0x00481ffc ++#define BCHP_USB1_CAPS_REG_START 0x00490000 ++#define BCHP_USB1_CAPS_REG_END 0x0049002c ++#define BCHP_USB1_GR_BRIDGE_REG_START 0x00490100 ++#define BCHP_USB1_GR_BRIDGE_REG_END 0x0049010c ++#define BCHP_USB1_INTR2_REG_START 0x00490180 ++#define BCHP_USB1_INTR2_REG_END 0x004901ac ++#define BCHP_USB1_CTRL_REG_START 0x00490200 ++#define BCHP_USB1_CTRL_REG_END 0x0049027c ++#define BCHP_USB1_EHCI_REG_START 0x00490300 ++#define BCHP_USB1_EHCI_REG_END 0x004903a4 ++#define BCHP_USB1_OHCI_REG_START 0x00490400 ++#define BCHP_USB1_OHCI_REG_END 0x00490454 ++#define BCHP_USB1_EHCI1_REG_START 0x00490500 ++#define BCHP_USB1_EHCI1_REG_END 0x004905a4 ++#define BCHP_USB1_OHCI1_REG_START 0x00490600 ++#define BCHP_USB1_OHCI1_REG_END 0x00490654 ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004caa08 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d122c ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1500 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d15b8 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d28dc ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e05b0 ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e282c ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28ac ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4000 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4044 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5054 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e6138 ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006003fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006007fc ++#define BCHP_VFD_0_REG_START 0x00602000 ++#define BCHP_VFD_0_REG_END 0x006021fc ++#define BCHP_VFD_1_REG_START 0x00602200 ++#define BCHP_VFD_1_REG_END 0x006023fc ++#define BCHP_VFD_2_REG_START 0x00602400 ++#define BCHP_VFD_2_REG_END 0x006025fc ++#define BCHP_VFD_3_REG_START 0x00602600 ++#define BCHP_VFD_3_REG_END 0x006027fc ++#define BCHP_RDC_REG_START 0x00603000 ++#define BCHP_RDC_REG_END 0x00603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060432c ++#define BCHP_BVNF_INTR2_4_REG_START 0x00604400 ++#define BCHP_BVNF_INTR2_4_REG_END 0x0060442c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060472c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060492c ++#define BCHP_BVNF_INTR2_12_REG_START 0x00604c00 ++#define BCHP_BVNF_INTR2_12_REG_END 0x00604c2c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060502c ++#define BCHP_BVNF_INTR2_17_REG_START 0x00605100 ++#define BCHP_BVNF_INTR2_17_REG_END 0x0060512c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060522c ++#define BCHP_FMISC_REG_START 0x00606000 ++#define BCHP_FMISC_REG_END 0x00606020 ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_SCL_2_REG_START 0x00620800 ++#define BCHP_SCL_2_REG_END 0x00620bfc ++#define BCHP_SCL_3_REG_START 0x00620c00 ++#define BCHP_SCL_3_REG_END 0x00620ffc ++#define BCHP_VNET_F_REG_START 0x00622000 ++#define BCHP_VNET_F_REG_END 0x006221fc ++#define BCHP_VNET_B_REG_START 0x00622200 ++#define BCHP_VNET_B_REG_END 0x006223fc ++#define BCHP_MMISC_REG_START 0x00622800 ++#define BCHP_MMISC_REG_END 0x00622828 ++#define BCHP_LBOX_0_REG_START 0x00624000 ++#define BCHP_LBOX_0_REG_END 0x00624070 ++#define BCHP_LBOX_1_REG_START 0x00624200 ++#define BCHP_LBOX_1_REG_END 0x00624270 ++#define BCHP_DNR_0_REG_START 0x00626000 ++#define BCHP_DNR_0_REG_END 0x006260a4 ++#define BCHP_DNR_1_REG_START 0x00626200 ++#define BCHP_DNR_1_REG_END 0x006262a4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x0062702c ++#define BCHP_DMISC_REG_START 0x00640000 ++#define BCHP_DMISC_REG_END 0x0064001c ++#define BCHP_MVP_TOP_0_REG_START 0x00644000 ++#define BCHP_MVP_TOP_0_REG_END 0x0064402c ++#define BCHP_SIOB_0_REG_START 0x00644200 ++#define BCHP_SIOB_0_REG_END 0x006442fc ++#define BCHP_HSCL_0_REG_START 0x00644400 ++#define BCHP_HSCL_0_REG_END 0x006447fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x00645000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x0064527c ++#define BCHP_HD_ANR_AND_0_REG_START 0x00645800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x00645888 ++#define BCHP_MDI_TOP_0_REG_START 0x00646000 ++#define BCHP_MDI_TOP_0_REG_END 0x006460fc ++#define BCHP_MDI_FCB_0_REG_START 0x00646400 ++#define BCHP_MDI_FCB_0_REG_END 0x006467fc ++#define BCHP_MDI_PPB_0_REG_START 0x00646800 ++#define BCHP_MDI_PPB_0_REG_END 0x00646bfc ++#define BCHP_MDI_FCN_0_REG_START 0x00646c00 ++#define BCHP_MDI_FCN_0_REG_END 0x00646ffc ++#define BCHP_MVP_TOP_1_REG_START 0x00650000 ++#define BCHP_MVP_TOP_1_REG_END 0x0065002c ++#define BCHP_SIOB_1_REG_START 0x00650200 ++#define BCHP_SIOB_1_REG_END 0x006502fc ++#define BCHP_HSCL_1_REG_START 0x00650400 ++#define BCHP_HSCL_1_REG_END 0x006507fc ++#define BCHP_MDI_TOP_1_REG_START 0x00652000 ++#define BCHP_MDI_TOP_1_REG_END 0x006520fc ++#define BCHP_MDI_PPB_1_REG_START 0x00652800 ++#define BCHP_MDI_PPB_1_REG_END 0x00652bfc ++#define BCHP_MDI_FCN_1_REG_START 0x00652c00 ++#define BCHP_MDI_FCN_1_REG_END 0x00652ffc ++#define BCHP_CAP_0_REG_START 0x00680000 ++#define BCHP_CAP_0_REG_END 0x0068007c ++#define BCHP_CAP_1_REG_START 0x00680200 ++#define BCHP_CAP_1_REG_END 0x0068027c ++#define BCHP_CAP_2_REG_START 0x00680400 ++#define BCHP_CAP_2_REG_END 0x0068047c ++#define BCHP_CAP_3_REG_START 0x00680600 ++#define BCHP_CAP_3_REG_END 0x0068067c ++#define BCHP_GFD_0_REG_START 0x00681000 ++#define BCHP_GFD_0_REG_END 0x0068122c ++#define BCHP_GFD_1_REG_START 0x00681400 ++#define BCHP_GFD_1_REG_END 0x0068162c ++#define BCHP_GFD_2_REG_START 0x00681800 ++#define BCHP_GFD_2_REG_END 0x00681a2c ++#define BCHP_CMP_0_REG_START 0x00683000 ++#define BCHP_CMP_0_REG_END 0x006834b4 ++#define BCHP_CMP_1_REG_START 0x00683800 ++#define BCHP_CMP_1_REG_END 0x00683cb4 ++#define BCHP_CMP_2_REG_START 0x00684000 ++#define BCHP_CMP_2_REG_END 0x00684264 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00685800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006858a4 ++#define BCHP_MASK_0_REG_START 0x00685c00 ++#define BCHP_MASK_0_REG_END 0x00685c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00686000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00687484 ++#define BCHP_TNT_CMP_1_V0_REG_START 0x00687600 ++#define BCHP_TNT_CMP_1_V0_REG_END 0x006876a4 ++#define BCHP_MASK_1_REG_START 0x00687800 ++#define BCHP_MASK_1_REG_END 0x00687820 ++#define BCHP_BVNB_INTR2_REG_START 0x00688000 ++#define BCHP_BVNB_INTR2_REG_END 0x0068802c ++#define BCHP_BMISC_REG_START 0x00688400 ++#define BCHP_BMISC_REG_END 0x0068841c ++#define BCHP_MISC_REG_START 0x006a0000 ++#define BCHP_MISC_REG_END 0x006a0094 ++#define BCHP_IT_0_REG_START 0x006a1000 ++#define BCHP_IT_0_REG_END 0x006a17fc ++#define BCHP_IT_1_REG_START 0x006a2000 ++#define BCHP_IT_1_REG_END 0x006a27fc ++#define BCHP_VF_0_REG_START 0x006a3000 ++#define BCHP_VF_0_REG_END 0x006a3134 ++#define BCHP_SECAM_0_REG_START 0x006a3200 ++#define BCHP_SECAM_0_REG_END 0x006a3214 ++#define BCHP_SM_0_REG_START 0x006a3280 ++#define BCHP_SM_0_REG_END 0x006a32ac ++#define BCHP_SDSRC_0_REG_START 0x006a3300 ++#define BCHP_SDSRC_0_REG_END 0x006a330c ++#define BCHP_CSC_0_REG_START 0x006a3380 ++#define BCHP_CSC_0_REG_END 0x006a33b0 ++#define BCHP_RM_0_REG_START 0x006a3400 ++#define BCHP_RM_0_REG_END 0x006a3424 ++#define BCHP_RM_1_REG_START 0x006a3440 ++#define BCHP_RM_1_REG_END 0x006a3464 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006a3500 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006a3544 ++#define BCHP_DVI_DTG_0_REG_START 0x006a3800 ++#define BCHP_DVI_DTG_0_REG_END 0x006a3c88 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006a4000 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006a4024 ++#define BCHP_DVI_CSC_0_REG_START 0x006a4100 ++#define BCHP_DVI_CSC_0_REG_END 0x006a4130 ++#define BCHP_DVI_DVF_0_REG_START 0x006a4200 ++#define BCHP_DVI_DVF_0_REG_END 0x006a4218 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006a4300 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006a4344 ++#define BCHP_DVI_DTG_1_REG_START 0x006a4800 ++#define BCHP_DVI_DTG_1_REG_END 0x006a4c88 ++#define BCHP_DVI_DTG_RM_1_REG_START 0x006a5000 ++#define BCHP_DVI_DTG_RM_1_REG_END 0x006a5024 ++#define BCHP_DVI_CSC_1_REG_START 0x006a5100 ++#define BCHP_DVI_CSC_1_REG_END 0x006a5130 ++#define BCHP_DVI_DVF_1_REG_START 0x006a5200 ++#define BCHP_DVI_DVF_1_REG_END 0x006a5218 ++#define BCHP_DVI_DEBUG_1_REG_START 0x006a5300 ++#define BCHP_DVI_DEBUG_1_REG_END 0x006a5344 ++#define BCHP_ITU656_DTG_0_REG_START 0x006a5800 ++#define BCHP_ITU656_DTG_0_REG_END 0x006a5c88 ++#define BCHP_ITU656_CSC_0_REG_START 0x006a5e00 ++#define BCHP_ITU656_CSC_0_REG_END 0x006a5e30 ++#define BCHP_ITU656_DVF_0_REG_START 0x006a5f00 ++#define BCHP_ITU656_DVF_0_REG_END 0x006a5f18 ++#define BCHP_ITU656_0_REG_START 0x006a6000 ++#define BCHP_ITU656_0_REG_END 0x006a6020 ++#define BCHP_VEC_CFG_REG_START 0x006a6400 ++#define BCHP_VEC_CFG_REG_END 0x006a652c ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006a6800 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006a682c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006a6a00 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006a6b20 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006a6c00 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006a6c48 ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x006a6d00 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x006a6d48 ++#define BCHP_DSCL_0_REG_START 0x006a7000 ++#define BCHP_DSCL_0_REG_END 0x006a73fc ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006a7800 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006a7808 ++#define BCHP_DVP_TVG_0_REG_START 0x006a7900 ++#define BCHP_DVP_TVG_0_REG_END 0x006a7988 ++#define BCHP_DVP_TVG_1_REG_START 0x006a7a00 ++#define BCHP_DVP_TVG_1_REG_END 0x006a7a88 ++#define BCHP_VBI_ENC_REG_START 0x006a8000 ++#define BCHP_VBI_ENC_REG_END 0x006a8074 ++#define BCHP_CCE_0_REG_START 0x006a8400 ++#define BCHP_CCE_0_REG_END 0x006a8458 ++#define BCHP_WSE_0_REG_START 0x006a8500 ++#define BCHP_WSE_0_REG_END 0x006a8514 ++#define BCHP_CGMSAE_0_REG_START 0x006a8600 ++#define BCHP_CGMSAE_0_REG_END 0x006a8658 ++#define BCHP_TTE_0_REG_START 0x006a8700 ++#define BCHP_TTE_0_REG_END 0x006a8728 ++#define BCHP_GSE_0_REG_START 0x006a8800 ++#define BCHP_GSE_0_REG_END 0x006a8880 ++#define BCHP_AMOLE_0_REG_START 0x006a8900 ++#define BCHP_AMOLE_0_REG_END 0x006a898c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006a8a00 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006a8a54 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006a8b00 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006a8b0c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006a8c00 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006a8c28 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006a8d00 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006a8d80 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006a8e00 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006a8e8c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006a8f00 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006a8f24 ++#define BCHP_DVP_HR_REG_START 0x006b0000 ++#define BCHP_DVP_HR_REG_END 0x006b03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x006b0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x006b042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x006b0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x006b0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x006b0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x006b090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x006b0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x006b0c24 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x006b1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x006b11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x006b1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x006b13fc ++#define BCHP_HDMI_RX_0_REG_START 0x006b2000 ++#define BCHP_HDMI_RX_0_REG_END 0x006b27bc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x006b27c0 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x006b27ec ++#define BCHP_HD_DVI_0_REG_START 0x006b4000 ++#define BCHP_HD_DVI_0_REG_END 0x006b41fc ++#define BCHP_DVP_HR_TMR_REG_START 0x006b4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x006b4cfc ++#define BCHP_DVP_HT_REG_START 0x006c0000 ++#define BCHP_DVP_HT_REG_END 0x006c011c ++#define BCHP_HDMI_REG_START 0x006c0800 ++#define BCHP_HDMI_REG_END 0x006c09ec ++#define BCHP_HDMI_TX_PHY_REG_START 0x006c0a80 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006c0aec ++#define BCHP_HDMI_RM_REG_START 0x006c0b00 ++#define BCHP_HDMI_RM_REG_END 0x006c0b2c ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006c0b40 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006c0b6c ++#define BCHP_HDMI_RAM_REG_START 0x006c0c00 ++#define BCHP_HDMI_RAM_REG_END 0x006c0dfc ++#define BCHP_DVP_HT_1_REG_START 0x006d0000 ++#define BCHP_DVP_HT_1_REG_END 0x006d011c ++#define BCHP_HDMI_1_REG_START 0x006d0800 ++#define BCHP_HDMI_1_REG_END 0x006d09ec ++#define BCHP_HDMI_TX_PHY_1_REG_START 0x006d0a80 ++#define BCHP_HDMI_TX_PHY_1_REG_END 0x006d0aec ++#define BCHP_HDMI_RM_1_REG_START 0x006d0b00 ++#define BCHP_HDMI_RM_1_REG_END 0x006d0b2c ++#define BCHP_HDMI_TX_INTR2_1_REG_START 0x006d0b40 ++#define BCHP_HDMI_TX_INTR2_1_REG_END 0x006d0b6c ++#define BCHP_HDMI_RAM_1_REG_START 0x006d0c00 ++#define BCHP_HDMI_RAM_1_REG_END 0x006d0dfc ++#define BCHP_BVN_RGR_REG_START 0x006e0000 ++#define BCHP_BVN_RGR_REG_END 0x006e0010 ++#define BCHP_VICE2_CME_0_0_REG_START 0x00700800 ++#define BCHP_VICE2_CME_0_0_REG_END 0x007008a0 ++#define BCHP_VICE2_FME_0_0_REG_START 0x00700c00 ++#define BCHP_VICE2_FME_0_0_REG_END 0x00700c88 ++#define BCHP_VICE2_MC_0_0_REG_START 0x00701000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x0070108c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x00701400 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x00701510 ++#define BCHP_VICE2_IMD_0_0_REG_START 0x00701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x0070187c ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x00701c00 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x00701dec ++#define BCHP_VICE2_HA_0_0_REG_START 0x00702000 ++#define BCHP_VICE2_HA_0_0_REG_END 0x0070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x00702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x007024ac ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x00702800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x0070288c ++#define BCHP_VICE2_VIP_0_0_REG_START 0x00703000 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x00703224 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x00703800 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x00703a24 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x00704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x007054c8 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x00718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x007182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x00720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x007200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x00720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x0072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x00720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x0072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x00722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x007233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x00730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x0073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x00758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x007582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x00760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x007600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x00760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x0076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x00760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x0076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x00762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x007633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x00770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x0077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x00780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x0078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x00781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x00781030 ++#define BCHP_VICE2_L2_0_REG_START 0x00781100 ++#define BCHP_VICE2_L2_0_REG_END 0x0078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x00782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x007820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x00800000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x00800080 ++#define BCHP_MEMC_GEN_0_REG_START 0x00900000 ++#define BCHP_MEMC_GEN_0_REG_END 0x009005fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x00900800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x009008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x00900a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x00900afc ++#define BCHP_MEMC_ARC_0_REG_START 0x00900c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x00900f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x00901000 ++#define BCHP_MEMC_ARB_0_REG_END 0x009014a8 ++#define BCHP_MEMC_DDR_0_REG_START 0x00902000 ++#define BCHP_MEMC_DDR_0_REG_END 0x009027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x00903000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x00903044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x00903200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x00903244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x00903400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x00903444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x00903800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x009039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x00904000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x00904010 ++#define BCHP_MEMC_MISC_0_REG_START 0x00905000 ++#define BCHP_MEMC_MISC_0_REG_END 0x00905010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x00906000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x00906248 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x00906400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x00906514 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x00906600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x00906714 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x00906800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x00906914 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x00906a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x00906b14 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x00906c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x00906d14 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x00908000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x009080b4 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x00940000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0097fffc ++#define BCHP_S_MEMC_0_REG_START 0x00980000 ++#define BCHP_S_MEMC_0_REG_END 0x00980780 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02074 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f4 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02174 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f4 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02274 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f4 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02374 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f4 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02474 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f4 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02574 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f4 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02674 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f4 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d08 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e08 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a03000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a03e70 ++#define BCHP_XPT_XCBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a05ce0 ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4d6f4 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b80 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d54 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f54 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a61154 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a61354 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a61554 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a61754 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a61954 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b54 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d54 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f54 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a62154 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a62354 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a62554 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a62754 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a62954 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b54 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d54 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f54 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a63154 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a63354 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a63554 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a63754 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a63954 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b54 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d54 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f54 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a64154 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a64354 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a64554 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a64754 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a64954 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b54 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_RAMS_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_RAMS_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b80 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d54 ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f54 ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a71154 ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a71354 ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a71554 ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a71754 ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a71954 ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b54 ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d54 ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f54 ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a72154 ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a72354 ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a72554 ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a72754 ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a72954 ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b54 ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d54 ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f54 ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a73154 ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a73354 ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a73554 ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a73754 ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a73954 ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b54 ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d54 ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f54 ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a74154 ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a74354 ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a74554 ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a74754 ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a74954 ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b54 ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b60000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b6000c ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b60040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b6004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b60080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b600a0 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b60200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b6022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b60240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b6026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b60300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b603b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b60600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b60628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b60800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b60ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b62000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b630d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b64000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b65084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b68000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b6fc48 ++#define BCHP_GENET_1_SYS_REG_START 0x00b80000 ++#define BCHP_GENET_1_SYS_REG_END 0x00b8000c ++#define BCHP_GENET_1_GR_BRIDGE_REG_START 0x00b80040 ++#define BCHP_GENET_1_GR_BRIDGE_REG_END 0x00b8004c ++#define BCHP_GENET_1_EXT_REG_START 0x00b80080 ++#define BCHP_GENET_1_EXT_REG_END 0x00b800a0 ++#define BCHP_GENET_1_INTRL2_0_REG_START 0x00b80200 ++#define BCHP_GENET_1_INTRL2_0_REG_END 0x00b8022c ++#define BCHP_GENET_1_INTRL2_1_REG_START 0x00b80240 ++#define BCHP_GENET_1_INTRL2_1_REG_END 0x00b8026c ++#define BCHP_GENET_1_RBUF_REG_START 0x00b80300 ++#define BCHP_GENET_1_RBUF_REG_END 0x00b803b4 ++#define BCHP_GENET_1_TBUF_REG_START 0x00b80600 ++#define BCHP_GENET_1_TBUF_REG_END 0x00b80628 ++#define BCHP_GENET_1_UMAC_REG_START 0x00b80800 ++#define BCHP_GENET_1_UMAC_REG_END 0x00b80ed8 ++#define BCHP_GENET_1_RDMA_REG_START 0x00b82000 ++#define BCHP_GENET_1_RDMA_REG_END 0x00b830d4 ++#define BCHP_GENET_1_TDMA_REG_START 0x00b84000 ++#define BCHP_GENET_1_TDMA_REG_END 0x00b85084 ++#define BCHP_GENET_1_HFB_REG_START 0x00b88000 ++#define BCHP_GENET_1_HFB_REG_END 0x00b8fc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_M2MC1_REG_START 0x00be6000 ++#define BCHP_M2MC1_REG_END 0x00be67fc ++#define BCHP_M2MC1_L2_REG_START 0x00be7000 ++#define BCHP_M2MC1_L2_REG_END 0x00be702c ++#define BCHP_M2MC1_GR_REG_START 0x00be7800 ++#define BCHP_M2MC1_GR_REG_END 0x00be780c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea040 ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea138 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea80c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa58 ++#define BCHP_V3D_DBG_REG_START 0x00beae00 ++#define BCHP_V3D_DBG_REG_END 0x00beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80118 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb0284 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_1_REG_END 0x00cb0384 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a24 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb0f24 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1024 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1124 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1224 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1324 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1524 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb1654 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb18fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb20ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb2864 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb2900 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb2964 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fec940 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_1 ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_1 :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_4 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_hscl_0 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_hscl_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_8 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_10 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/74371a0/bchp_usb_ctrl.h b/include/linux/brcmstb/74371a0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..c282de74 +--- /dev/null ++++ b/include/linux/brcmstb/74371a0/bchp_usb_ctrl.h +@@ -0,0 +1,1296 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Tue Sep 23 03:16:00 2014 ++ * Full Compile MD5 Checksum 10286fa42cc96ac09acff850b78bff11 ++ * (minus title and desc) ++ * MD5 Checksum ce337eadb7e967dd87c606b1a7500a2c ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00480200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00480204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00480208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0048020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00480210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00480214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00480218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0048021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00480220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00480224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00480228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0048022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00480230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00480234 /* Power Management Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x00480238 /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x0048023c /* usb20 Power Management Status */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00480240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00480244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00480248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0048024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00480250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_SPARE2 0x00480254 /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SPARE3 0x00480258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0048025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00480260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00480264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00480268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0048026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00480270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00480274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00480278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0048027c /* Spare2 Register for future use */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC_DISABLE [31:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SRAM_CS_DIS [27:25] */ ++#define BCHP_USB_CTRL_SETUP_SRAM_CS_DIS_MASK 0x0e000000 ++#define BCHP_USB_CTRL_SETUP_SRAM_CS_DIS_SHIFT 25 ++#define BCHP_USB_CTRL_SETUP_SRAM_CS_DIS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [24:19] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x01f80000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [16:16] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [12:12] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffe0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffe0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSIS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSIS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSIS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSIS_CORE_ID_DEFAULT 0x0000296a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TP_EN [31:31] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TP_EN_MASK 0x80000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TP_EN_SHIFT 31 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TP_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [30:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0x70000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03ffffe0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [31:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [29:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x3fffffe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00008000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:08] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffffff00 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 8 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [07:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x000000ff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE2 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE2 :: SPARE2_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE2_SPARE2_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE2_SPARE2_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE2_SPARE2_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb3_oc_dis [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_oc_dis_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_oc_dis_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_oc_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb3_ipp [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ipp_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ipp_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ipp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb3_ioc [28:28] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ioc_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ioc_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_ioc_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb3_pwron_sel [27:26] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_sel_MASK 0x0c000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_sel_SHIFT 26 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb3_pwron_force [25:25] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_MASK 0x02000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb3_pwron_force_val [24:24] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_val_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_val_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL1_usb3_pwron_force_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: xhc_soft_resetb [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7439b0/bchp_common.h b/include/linux/brcmstb/7439b0/bchp_common.h +new file mode 100644 +index 00000000..348f8b96 +--- /dev/null ++++ b/include/linux/brcmstb/7439b0/bchp_common.h +@@ -0,0 +1,4110 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Fri Dec 19 03:17:11 2014 ++ * Full Compile MD5 Checksum 9e27b6ad4c64ff5a28f048a17a7bb056 ++ * (minus title and desc) ++ * MD5 Checksum a1a4b86f7693c062faaafa50c5ca64ce ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7439_B0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00000000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x01200000 /* MEMC_SENTINEL_0_1 is last */ ++#define BCHP_REGISTER_SIZE 0x00480000 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00000000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00000108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00000400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00000440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00000800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00000ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00001000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00001028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00008000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0000fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00010b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00010bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00012400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x000127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00013000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0001307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00014000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x000151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00020100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x000201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00020300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0002031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00020320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0002033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00020340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0002035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00020400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0002045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00020500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0002057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00020600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0002060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00020620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0002062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00020700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0002071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00020720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0002073c ++#define BCHP_DECODE_MB_0_REG_START 0x00020740 ++#define BCHP_DECODE_MB_0_REG_END 0x0002075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00020c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00020dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00023000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x000231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00024000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00024030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00024100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x000241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00024200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x000242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00024300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x000243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00024400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x000244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00024500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x000245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00024f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00024f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00025000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x0002507c ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00025100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00025118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00025200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00025230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00025400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0002568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00026000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00026404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00026800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00026838 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00026a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00026b58 ++#define BCHP_RVC_0_REG_START 0x00026c00 ++#define BCHP_RVC_0_REG_END 0x00026c20 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00030000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00030108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00030400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00030440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00030800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00030ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00031000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0003100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00034000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00037ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00040100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x000401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00040300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0004031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00040320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0004033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00040340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0004035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00040400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0004045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00040500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0004057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00040600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0004060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00040620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0004062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00040700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0004071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00040720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0004073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00040740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0004075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00040c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00040dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00043000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x000431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00044000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00044030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00044100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x000441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00044200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x000442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00044300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x000443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00044400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x000444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00044500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x000445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00044f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00044f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00045000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x0004507c ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00045100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00045118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00045200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00045230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00045400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0004568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00046000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00046404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00046800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00046838 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00046a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00046b58 ++#define BCHP_RVC_2_0_REG_START 0x00046c00 ++#define BCHP_RVC_2_0_REG_END 0x00046c20 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00050000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00050108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00050400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00050440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00050800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00050ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00051000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0005100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00054000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00057ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00080000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0008002c ++#define BCHP_HVD_RGR_0_REG_START 0x00080400 ++#define BCHP_HVD_RGR_0_REG_END 0x00080410 ++#define BCHP_VICH_0_REG_START 0x000a0000 ++#define BCHP_VICH_0_REG_END 0x000a008b ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_1_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_1_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_1_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_1_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_1_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_1_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_1_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_1_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_1_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_1_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_1_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_1_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_1_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_1_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_1_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_1_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_1_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_1_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_1_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_1_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_1_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_1_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_1_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_1_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_1_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_1_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_1_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_1_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_1_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_1_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_1_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_1_REG_END 0x0012073c ++#define BCHP_DECODE_MB_1_REG_START 0x00120740 ++#define BCHP_DECODE_MB_1_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_1_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_1_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_1_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_1_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_1_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_1_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_1_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_1_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_1_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_1_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_1_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_1_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_1_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_1_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_1_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_1_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_1_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_1_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_1_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_1_REG_END 0x0012507c ++#define BCHP_HEVD_STRM_IN_1_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_1_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_1_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_1_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_1_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_1_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_1_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_1_REG_END 0x00126838 ++#define BCHP_HEVD_PFRI_1_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_1_REG_END 0x00126b58 ++#define BCHP_RVC_1_REG_START 0x00126c00 ++#define BCHP_RVC_1_REG_END 0x00126c20 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_1_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_1_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_1_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_1_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_1_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_1_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_1_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_1_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_1_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_1_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_1_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_1_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_1_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_1_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_1_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_1_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_1_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_1_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_1_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_1_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_1_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_1_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_1_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_1_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_1_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_1_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_1_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_1_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_1_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_1_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_1_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_1_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_1_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_1_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_1_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_1_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_1_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_1_REG_END 0x0014507c ++#define BCHP_HEVD_STRM_IN_2_1_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_1_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_1_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_1_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_1_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_1_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_1_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_1_REG_END 0x00146838 ++#define BCHP_HEVD_PFRI_2_1_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_1_REG_END 0x00146b58 ++#define BCHP_RVC_2_1_REG_START 0x00146c00 ++#define BCHP_RVC_2_1_REG_END 0x00146c20 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_1_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_1_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_1_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_1_REG_END 0x0018002c ++#define BCHP_HVD_RGR_1_REG_START 0x00180400 ++#define BCHP_HVD_RGR_1_REG_END 0x00180410 ++#define BCHP_VICH_1_REG_START 0x001a0000 ++#define BCHP_VICH_1_REG_END 0x001a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_S_MEMC_0_REG_START 0x003bc000 ++#define BCHP_S_MEMC_0_REG_END 0x003bc784 ++#define BCHP_S_MEMC_1_REG_START 0x003cc000 ++#define BCHP_S_MEMC_1_REG_END 0x003cc784 ++#define BCHP_SDIO_0_HOST_REG_START 0x003e0000 ++#define BCHP_SDIO_0_HOST_REG_END 0x003e00fc ++#define BCHP_SDIO_0_CFG_REG_START 0x003e0100 ++#define BCHP_SDIO_0_CFG_REG_END 0x003e01fc ++#define BCHP_SDIO_1_HOST_REG_START 0x003e0200 ++#define BCHP_SDIO_1_HOST_REG_END 0x003e02fc ++#define BCHP_SDIO_1_CFG_REG_START 0x003e0300 ++#define BCHP_SDIO_1_CFG_REG_END 0x003e03fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x003e0400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x003e043c ++#define BCHP_EBI_REG_START 0x003e0800 ++#define BCHP_EBI_REG_END 0x003e0bfc ++#define BCHP_HIF_INTR2_REG_START 0x003e1000 ++#define BCHP_HIF_INTR2_REG_END 0x003e102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x003e1500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x003e153c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x003e1600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x003e163c ++#define BCHP_HIF_RGR2_REG_START 0x003e1700 ++#define BCHP_HIF_RGR2_REG_END 0x003e1710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x003e1a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x003e1a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x003e2000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x003e203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x003e2100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x003e210c ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x003e2200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x003e23fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x003e2400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x003e27fc ++#define BCHP_NAND_REG_START 0x003e2800 ++#define BCHP_NAND_REG_END 0x003e2dfc ++#define BCHP_FLASH_DMA_REG_START 0x003e3000 ++#define BCHP_FLASH_DMA_REG_END 0x003e3028 ++#define BCHP_BSPI_REG_START 0x003e3200 ++#define BCHP_BSPI_REG_END 0x003e324c ++#define BCHP_BSPI_RAF_REG_START 0x003e3300 ++#define BCHP_BSPI_RAF_REG_END 0x003e3320 ++#define BCHP_HIF_MSPI_REG_START 0x003e3400 ++#define BCHP_HIF_MSPI_REG_END 0x003e3584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x003e3600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x003e3604 ++#define BCHP_IPI0_INTR2_REG_START 0x003e4000 ++#define BCHP_IPI0_INTR2_REG_END 0x003e402c ++#define BCHP_IPI1_INTR2_REG_START 0x003e4100 ++#define BCHP_IPI1_INTR2_REG_END 0x003e412c ++#define BCHP_BOOTSRAM_TM_REG_START 0x003f0000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x003ffffc ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SM_L2_REG_START 0x00402000 ++#define BCHP_SM_L2_REG_END 0x0040202c ++#define BCHP_SM_REG_START 0x00402400 ++#define BCHP_SM_REG_END 0x00402424 ++#define BCHP_SM_FAST_REG_START 0x00402800 ++#define BCHP_SM_FAST_REG_END 0x00402818 ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x00404520 ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_PM_REG_START 0x0040a200 ++#define BCHP_PM_REG_END 0x0040a208 ++#define BCHP_BSCA_REG_START 0x0040a300 ++#define BCHP_BSCA_REG_END 0x0040a354 ++#define BCHP_BSCD_REG_START 0x0040a400 ++#define BCHP_BSCD_REG_END 0x0040a454 ++#define BCHP_BSCE_REG_START 0x0040a500 ++#define BCHP_BSCE_REG_END 0x0040a554 ++#define BCHP_GIO_REG_START 0x0040a600 ++#define BCHP_GIO_REG_END 0x0040a69c ++#define BCHP_IRQ0_REG_START 0x0040a700 ++#define BCHP_IRQ0_REG_END 0x0040a704 ++#define BCHP_IRQ1_REG_START 0x0040a740 ++#define BCHP_IRQ1_REG_END 0x0040a744 ++#define BCHP_TIMER_REG_START 0x0040a780 ++#define BCHP_TIMER_REG_END 0x0040a7bc ++#define BCHP_UARTA_REG_START 0x0040a900 ++#define BCHP_UARTA_REG_END 0x0040a91c ++#define BCHP_UARTB_REG_START 0x0040a940 ++#define BCHP_UARTB_REG_END 0x0040a95c ++#define BCHP_UARTC_REG_START 0x0040a980 ++#define BCHP_UARTC_REG_END 0x0040a99c ++#define BCHP_SCA_REG_START 0x0040ac00 ++#define BCHP_SCA_REG_END 0x0040acbc ++#define BCHP_SCB_REG_START 0x0040ad00 ++#define BCHP_SCB_REG_END 0x0040adbc ++#define BCHP_SCIRQ0_REG_START 0x0040ae00 ++#define BCHP_SCIRQ0_REG_END 0x0040ae04 ++#define BCHP_SCIRQ1_REG_START 0x0040ae40 ++#define BCHP_SCIRQ1_REG_END 0x0040ae44 ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040ae80 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040ae84 ++#define BCHP_MCIF_REG_START 0x0040b000 ++#define BCHP_MCIF_REG_END 0x0040b028 ++#define BCHP_MCIF1_REG_START 0x0040b040 ++#define BCHP_MCIF1_REG_END 0x0040b068 ++#define BCHP_MCIF_INTR2_REG_START 0x0040b080 ++#define BCHP_MCIF_INTR2_REG_END 0x0040b0c4 ++#define BCHP_TMON_REG_START 0x0040b100 ++#define BCHP_TMON_REG_END 0x0040b154 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040b180 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040b1ac ++#define BCHP_CTK_REG_START 0x0040b200 ++#define BCHP_CTK_REG_END 0x0040b378 ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b400 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b430 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004105fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410714 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_AON_HDMI_RX_REG_START 0x00411200 ++#define BCHP_AON_HDMI_RX_REG_END 0x004112d4 ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417080 ++#define BCHP_PM_AON_REG_END 0x00417088 ++#define BCHP_ICAP_REG_START 0x004170c0 ++#define BCHP_ICAP_REG_END 0x004170fc ++#define BCHP_KBD1_REG_START 0x00417100 ++#define BCHP_KBD1_REG_END 0x0041713c ++#define BCHP_KBD2_REG_START 0x00417180 ++#define BCHP_KBD2_REG_END 0x004171bc ++#define BCHP_KBD3_REG_START 0x00417200 ++#define BCHP_KBD3_REG_END 0x0041723c ++#define BCHP_BSCB_REG_START 0x00417280 ++#define BCHP_BSCB_REG_END 0x004172d4 ++#define BCHP_BSCC_REG_START 0x00417300 ++#define BCHP_BSCC_REG_END 0x00417354 ++#define BCHP_IRQ0_AON_REG_START 0x00417380 ++#define BCHP_IRQ0_AON_REG_END 0x00417384 ++#define BCHP_IRQ1_AON_REG_START 0x004173c0 ++#define BCHP_IRQ1_AON_REG_END 0x004173c4 ++#define BCHP_GIO_AON_REG_START 0x00417400 ++#define BCHP_GIO_AON_REG_END 0x0041743c ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417500 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041752c ++#define BCHP_WKTMR_REG_START 0x00417580 ++#define BCHP_WKTMR_REG_END 0x00417590 ++#define BCHP_BICAP_REG_START 0x004175c0 ++#define BCHP_BICAP_REG_END 0x004175f8 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_ITCH1_REG_START 0x00431200 ++#define BCHP_ITCH1_REG_END 0x00431200 ++#define BCHP_HIF_CONTINUATION_REG_START 0x00452000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x004520fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x00452800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x00452804 ++#define BCHP_WEBHIF_RGR1_REG_START 0x00454000 ++#define BCHP_WEBHIF_RGR1_REG_END 0x00454010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x00454100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x0045412c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x00454600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x0045463c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x00454800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x0045481c ++#define BCHP_WEBHIF_TIMER_REG_START 0x00454900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x0045493c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x00454a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x00454a00 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x00455000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x0045502c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x00456000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x0045602c ++#define BCHP_SATA_GRB_REG_START 0x00458000 ++#define BCHP_SATA_GRB_REG_END 0x0045800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00458040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00458060 ++#define BCHP_SATA3_INTR2_REG_START 0x00458080 ++#define BCHP_SATA3_INTR2_REG_END 0x004580ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00458100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00458ffc ++#define BCHP_PORT1_SATA3_PCB_REG_START 0x00459100 ++#define BCHP_PORT1_SATA3_PCB_REG_END 0x00459ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0045a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0045a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0045a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0045a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0045a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0045a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0045a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0045a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0045a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0045a17c ++#define BCHP_SATA_PORT1_AHCI_S1_REG_START 0x0045a180 ++#define BCHP_SATA_PORT1_AHCI_S1_REG_END 0x0045a19c ++#define BCHP_SATA_PORT1_AHCI_S2_REG_START 0x0045a1a0 ++#define BCHP_SATA_PORT1_AHCI_S2_REG_END 0x0045a1b4 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_START 0x0045a1b8 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_END 0x0045a1fc ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0045a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0045a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0045a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0045a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0045a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0045a764 ++#define BCHP_SATA_PORT1_CTRL_REG_START 0x0045a780 ++#define BCHP_SATA_PORT1_CTRL_REG_END 0x0045a7b0 ++#define BCHP_SATA_PORT1_CJPAT_REG_START 0x0045a7c0 ++#define BCHP_SATA_PORT1_CJPAT_REG_END 0x0045a7e4 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0045a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0045a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0045a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0045a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0045a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0045a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0045a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0045a998 ++#define BCHP_SATA_PORT1_LEG_S1_REG_START 0x0045aa00 ++#define BCHP_SATA_PORT1_LEG_S1_REG_END 0x0045aa34 ++#define BCHP_SATA_PORT1_LEG_S2_REG_START 0x0045aa40 ++#define BCHP_SATA_PORT1_LEG_S2_REG_END 0x0045aa54 ++#define BCHP_SATA_PORT1_LEG_S3_REG_START 0x0045aa58 ++#define BCHP_SATA_PORT1_LEG_S3_REG_END 0x0045aa98 ++#define BCHP_RFM_SYSCLK_REG_START 0x0045c000 ++#define BCHP_RFM_SYSCLK_REG_END 0x0045c124 ++#define BCHP_RFM_CLK27_REG_START 0x0045c000 ++#define BCHP_RFM_CLK27_REG_END 0x0045c470 ++#define BCHP_RFM_L2_REG_START 0x0045cc00 ++#define BCHP_RFM_L2_REG_END 0x0045cc2c ++#define BCHP_RFM_GRB_REG_START 0x0045d000 ++#define BCHP_RFM_GRB_REG_END 0x0045d00c ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00460000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0046003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00460048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0046004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004600ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004600e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00460100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00460134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00460160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00460178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00460180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004601a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00460404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00460418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00460428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00460630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00460800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00460998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00461000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00461424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00461800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00461e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00462000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0046203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00462048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0046204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00462050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00462054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00462058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00462064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004620a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004620a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004620ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004620e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00462100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00462134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0046213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00462144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00462150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0046215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00462160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00462178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00462180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004621a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00462404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00462418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00462428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00462630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00462800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00462998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00463000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00463424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00463800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00463e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00464000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004640cc ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00464100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00464104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00464200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00464204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00464300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0046432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00464400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0046446c ++#define BCHP_PCIE_0_MSI_INTR2_REG_START 0x00464500 ++#define BCHP_PCIE_0_MSI_INTR2_REG_END 0x0046452c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00468000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00469008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00469200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00469210 ++#define BCHP_PCIE_0_RG_REG_START 0x00469300 ++#define BCHP_PCIE_0_RG_REG_END 0x0046930c ++#define BCHP_USB_CAPS_REG_START 0x00470000 ++#define BCHP_USB_CAPS_REG_END 0x0047002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00470100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0047010c ++#define BCHP_USB_INTR2_REG_START 0x00470180 ++#define BCHP_USB_INTR2_REG_END 0x004701ac ++#define BCHP_USB_CTRL_REG_START 0x00470200 ++#define BCHP_USB_CTRL_REG_END 0x004702fc ++#define BCHP_USB_EHCI_REG_START 0x00470300 ++#define BCHP_USB_EHCI_REG_END 0x004703a4 ++#define BCHP_USB_OHCI_REG_START 0x00470400 ++#define BCHP_USB_OHCI_REG_END 0x00470454 ++#define BCHP_USB_EHCI1_REG_START 0x00470500 ++#define BCHP_USB_EHCI1_REG_END 0x004705a4 ++#define BCHP_USB_OHCI1_REG_START 0x00470600 ++#define BCHP_USB_OHCI1_REG_END 0x00470654 ++#define BCHP_USB_XHCI_REG_START 0x00471000 ++#define BCHP_USB_XHCI_REG_END 0x00471ffc ++#define BCHP_USB_BDC_REG_START 0x00472000 ++#define BCHP_USB_BDC_REG_END 0x00472fc0 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x00490000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x0049003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x00490048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x0049004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x004900ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x004900e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x00490100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x00490134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x00490160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x00490178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x00490180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x004901a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x00490404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x00490418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x00490428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x00490630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x00490800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x00490998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x00491000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x00491424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x00491800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x00491e1c ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_START 0x00492000 ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_END 0x0049203c ++#define BCHP_PCIE_1_EP_CFG_PM_REG_START 0x00492048 ++#define BCHP_PCIE_1_EP_CFG_PM_REG_END 0x0049204c ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_START 0x00492050 ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_END 0x00492054 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_START 0x00492058 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_END 0x00492064 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_START 0x004920a0 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_END 0x004920a8 ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_START 0x004920ac ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_END 0x004920e4 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_START 0x00492100 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_END 0x00492134 ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_START 0x0049213c ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_END 0x00492144 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_START 0x00492150 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_END 0x0049215c ++#define BCHP_PCIE_1_EP_CFG_VC_REG_START 0x00492160 ++#define BCHP_PCIE_1_EP_CFG_VC_REG_END 0x00492178 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_START 0x00492180 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_END 0x004921a4 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_START 0x00492404 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_END 0x00492418 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_START 0x00492428 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_END 0x00492630 ++#define BCHP_PCIE_1_EP_TL_REG_START 0x00492800 ++#define BCHP_PCIE_1_EP_TL_REG_END 0x00492998 ++#define BCHP_PCIE_1_EP_DL_REG_START 0x00493000 ++#define BCHP_PCIE_1_EP_DL_REG_END 0x00493424 ++#define BCHP_PCIE_1_EP_PL_REG_START 0x00493800 ++#define BCHP_PCIE_1_EP_PL_REG_END 0x00493e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x00494000 ++#define BCHP_PCIE_1_MISC_REG_END 0x004940cc ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x00494100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x00494104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x00494200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x00494204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x00494300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x0049432c ++#define BCHP_PCIE_1_DMA_REG_START 0x00494400 ++#define BCHP_PCIE_1_DMA_REG_END 0x0049446c ++#define BCHP_PCIE_1_MSI_INTR2_REG_START 0x00494500 ++#define BCHP_PCIE_1_MSI_INTR2_REG_END 0x0049452c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x00498000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x00499008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x00499200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x00499210 ++#define BCHP_PCIE_1_RG_REG_START 0x00499300 ++#define BCHP_PCIE_1_RG_REG_END 0x0049930c ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d18d8 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2804 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x004d4600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x004d4624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x004d4640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x004d4664 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e0680 ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4800 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4844 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_BVN_SEC_0_REG_START 0x004f0000 ++#define BCHP_BVN_SEC_0_REG_END 0x004f0cfc ++#define BCHP_BVN_SEC_1_REG_START 0x004f2000 ++#define BCHP_BVN_SEC_1_REG_END 0x004f2cfc ++#define BCHP_BVN_SEC_GR_REG_START 0x004f4000 ++#define BCHP_BVN_SEC_GR_REG_END 0x004f400c ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_MFD_2_REG_START 0x00600800 ++#define BCHP_MFD_2_REG_END 0x006009fc ++#define BCHP_MFD_3_REG_START 0x00600c00 ++#define BCHP_MFD_3_REG_END 0x00600dfc ++#define BCHP_VFD_0_REG_START 0x00602000 ++#define BCHP_VFD_0_REG_END 0x006021fc ++#define BCHP_VFD_1_REG_START 0x00602200 ++#define BCHP_VFD_1_REG_END 0x006023fc ++#define BCHP_VFD_2_REG_START 0x00602400 ++#define BCHP_VFD_2_REG_END 0x006025fc ++#define BCHP_VFD_3_REG_START 0x00602600 ++#define BCHP_VFD_3_REG_END 0x006027fc ++#define BCHP_VFD_4_REG_START 0x00602800 ++#define BCHP_VFD_4_REG_END 0x006029fc ++#define BCHP_VFD_5_REG_START 0x00602a00 ++#define BCHP_VFD_5_REG_END 0x00602bfc ++#define BCHP_RDC_REG_START 0x00603000 ++#define BCHP_RDC_REG_END 0x00603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x0060432c ++#define BCHP_BVNF_INTR2_5_REG_START 0x00604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060472c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060492c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060502c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060522c ++#define BCHP_FMISC_REG_START 0x00606000 ++#define BCHP_FMISC_REG_END 0x00606020 ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_SCL_2_REG_START 0x00620800 ++#define BCHP_SCL_2_REG_END 0x00620bfc ++#define BCHP_SCL_3_REG_START 0x00620c00 ++#define BCHP_SCL_3_REG_END 0x00620ffc ++#define BCHP_SCL_4_REG_START 0x00621000 ++#define BCHP_SCL_4_REG_END 0x006213fc ++#define BCHP_SCL_5_REG_START 0x00621400 ++#define BCHP_SCL_5_REG_END 0x006217fc ++#define BCHP_VNET_F_REG_START 0x00622000 ++#define BCHP_VNET_F_REG_END 0x006221fc ++#define BCHP_VNET_B_REG_START 0x00622200 ++#define BCHP_VNET_B_REG_END 0x006223fc ++#define BCHP_MMISC_REG_START 0x00622800 ++#define BCHP_MMISC_REG_END 0x00622828 ++#define BCHP_LBOX_0_REG_START 0x00624000 ++#define BCHP_LBOX_0_REG_END 0x00624070 ++#define BCHP_XSRC_0_REG_START 0x00624800 ++#define BCHP_XSRC_0_REG_END 0x00624bfc ++#define BCHP_XSRC_1_REG_START 0x00624c00 ++#define BCHP_XSRC_1_REG_END 0x00624ffc ++#define BCHP_DNR_0_REG_START 0x00626000 ++#define BCHP_DNR_0_REG_END 0x006260a4 ++#define BCHP_DNR_1_REG_START 0x00626200 ++#define BCHP_DNR_1_REG_END 0x006262a4 ++#define BCHP_DNR_2_REG_START 0x00626400 ++#define BCHP_DNR_2_REG_END 0x006264a4 ++#define BCHP_DNR_3_REG_START 0x00626600 ++#define BCHP_DNR_3_REG_END 0x006266a4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x0062702c ++#define BCHP_BVNM_INTR2_1_REG_START 0x00627100 ++#define BCHP_BVNM_INTR2_1_REG_END 0x0062712c ++#define BCHP_CAP_0_REG_START 0x00640000 ++#define BCHP_CAP_0_REG_END 0x0064010c ++#define BCHP_CAP_1_REG_START 0x00640200 ++#define BCHP_CAP_1_REG_END 0x0064030c ++#define BCHP_CAP_2_REG_START 0x00640400 ++#define BCHP_CAP_2_REG_END 0x0064050c ++#define BCHP_CAP_3_REG_START 0x00640600 ++#define BCHP_CAP_3_REG_END 0x0064070c ++#define BCHP_CAP_4_REG_START 0x00640800 ++#define BCHP_CAP_4_REG_END 0x0064090c ++#define BCHP_CAP_5_REG_START 0x00640a00 ++#define BCHP_CAP_5_REG_END 0x00640b0c ++#define BCHP_GFD_0_REG_START 0x00641000 ++#define BCHP_GFD_0_REG_END 0x0064122c ++#define BCHP_GFD_1_REG_START 0x00641400 ++#define BCHP_GFD_1_REG_END 0x0064162c ++#define BCHP_GFD_2_REG_START 0x00641800 ++#define BCHP_GFD_2_REG_END 0x00641a2c ++#define BCHP_GFD_3_REG_START 0x00641c00 ++#define BCHP_GFD_3_REG_END 0x00641e2c ++#define BCHP_CMP_0_REG_START 0x00642000 ++#define BCHP_CMP_0_REG_END 0x00642b28 ++#define BCHP_CMP_1_REG_START 0x00643000 ++#define BCHP_CMP_1_REG_END 0x00643b1c ++#define BCHP_CMP_2_REG_START 0x00644000 ++#define BCHP_CMP_2_REG_END 0x0064461c ++#define BCHP_CMP_3_REG_START 0x00645000 ++#define BCHP_CMP_3_REG_END 0x0064561c ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00645800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006458a4 ++#define BCHP_MASK_0_REG_START 0x00645c00 ++#define BCHP_MASK_0_REG_END 0x00645c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00646000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00647284 ++#define BCHP_BVNB_INTR2_REG_START 0x00648000 ++#define BCHP_BVNB_INTR2_REG_END 0x0064802c ++#define BCHP_BMISC_REG_START 0x00648400 ++#define BCHP_BMISC_REG_END 0x0064841c ++#define BCHP_DMISC_REG_START 0x00680000 ++#define BCHP_DMISC_REG_END 0x0068001c ++#define BCHP_MVP_TOP_0_REG_START 0x00688000 ++#define BCHP_MVP_TOP_0_REG_END 0x00688038 ++#define BCHP_SIOB_0_REG_START 0x00688200 ++#define BCHP_SIOB_0_REG_END 0x006882fc ++#define BCHP_HSCL_0_REG_START 0x00688400 ++#define BCHP_HSCL_0_REG_END 0x006887fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x00689000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x0068927c ++#define BCHP_HD_ANR_AND_0_REG_START 0x00689800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x00689888 ++#define BCHP_MDI_TOP_0_REG_START 0x0068a000 ++#define BCHP_MDI_TOP_0_REG_END 0x0068a0fc ++#define BCHP_MDI_FCB_0_REG_START 0x0068a400 ++#define BCHP_MDI_FCB_0_REG_END 0x0068a7fc ++#define BCHP_MDI_PPB_0_REG_START 0x0068a800 ++#define BCHP_MDI_PPB_0_REG_END 0x0068abfc ++#define BCHP_MDI_FCN_0_REG_START 0x0068ac00 ++#define BCHP_MDI_FCN_0_REG_END 0x0068adfc ++#define BCHP_MDI_MEMC_0_REG_START 0x0068ae00 ++#define BCHP_MDI_MEMC_0_REG_END 0x0068affc ++#define BCHP_MVP_TOP_1_REG_START 0x00690000 ++#define BCHP_MVP_TOP_1_REG_END 0x00690038 ++#define BCHP_SIOB_1_REG_START 0x00690200 ++#define BCHP_SIOB_1_REG_END 0x006902fc ++#define BCHP_HSCL_1_REG_START 0x00690400 ++#define BCHP_HSCL_1_REG_END 0x006907fc ++#define BCHP_MDI_TOP_1_REG_START 0x00692000 ++#define BCHP_MDI_TOP_1_REG_END 0x006920fc ++#define BCHP_MDI_PPB_1_REG_START 0x00692800 ++#define BCHP_MDI_PPB_1_REG_END 0x00692bfc ++#define BCHP_MDI_FCN_1_REG_START 0x00692c00 ++#define BCHP_MDI_FCN_1_REG_END 0x00692dfc ++#define BCHP_MVP_TOP_2_REG_START 0x00698000 ++#define BCHP_MVP_TOP_2_REG_END 0x00698038 ++#define BCHP_SIOB_2_REG_START 0x00698200 ++#define BCHP_SIOB_2_REG_END 0x006982fc ++#define BCHP_HSCL_2_REG_START 0x00698400 ++#define BCHP_HSCL_2_REG_END 0x006987fc ++#define BCHP_MDI_TOP_2_REG_START 0x0069a000 ++#define BCHP_MDI_TOP_2_REG_END 0x0069a0fc ++#define BCHP_MDI_PPB_2_REG_START 0x0069a800 ++#define BCHP_MDI_PPB_2_REG_END 0x0069abfc ++#define BCHP_MDI_FCN_2_REG_START 0x0069ac00 ++#define BCHP_MDI_FCN_2_REG_END 0x0069adfc ++#define BCHP_MVP_TOP_3_REG_START 0x006a0000 ++#define BCHP_MVP_TOP_3_REG_END 0x006a0038 ++#define BCHP_SIOB_3_REG_START 0x006a0200 ++#define BCHP_SIOB_3_REG_END 0x006a02fc ++#define BCHP_HSCL_3_REG_START 0x006a0400 ++#define BCHP_HSCL_3_REG_END 0x006a07fc ++#define BCHP_MDI_TOP_3_REG_START 0x006a2000 ++#define BCHP_MDI_TOP_3_REG_END 0x006a20fc ++#define BCHP_MDI_PPB_3_REG_START 0x006a2800 ++#define BCHP_MDI_PPB_3_REG_END 0x006a2bfc ++#define BCHP_MDI_FCN_3_REG_START 0x006a2c00 ++#define BCHP_MDI_FCN_3_REG_END 0x006a2dfc ++#define BCHP_MISC_REG_START 0x006e0000 ++#define BCHP_MISC_REG_END 0x006e00ac ++#define BCHP_IT_0_REG_START 0x006e1000 ++#define BCHP_IT_0_REG_END 0x006e17fc ++#define BCHP_IT_1_REG_START 0x006e2000 ++#define BCHP_IT_1_REG_END 0x006e27fc ++#define BCHP_IT_2_REG_START 0x006e3000 ++#define BCHP_IT_2_REG_END 0x006e37fc ++#define BCHP_VF_0_REG_START 0x006e4000 ++#define BCHP_VF_0_REG_END 0x006e4134 ++#define BCHP_VF_1_REG_START 0x006e4200 ++#define BCHP_VF_1_REG_END 0x006e4334 ++#define BCHP_SECAM_0_REG_START 0x006e4400 ++#define BCHP_SECAM_0_REG_END 0x006e4414 ++#define BCHP_SM_0_REG_START 0x006e4480 ++#define BCHP_SM_0_REG_END 0x006e44ac ++#define BCHP_SDSRC_0_REG_START 0x006e4500 ++#define BCHP_SDSRC_0_REG_END 0x006e450c ++#define BCHP_HDSRC_0_REG_START 0x006e4520 ++#define BCHP_HDSRC_0_REG_END 0x006e453c ++#define BCHP_CSC_0_REG_START 0x006e4580 ++#define BCHP_CSC_0_REG_END 0x006e45b0 ++#define BCHP_CSC_1_REG_START 0x006e4600 ++#define BCHP_CSC_1_REG_END 0x006e4630 ++#define BCHP_RM_0_REG_START 0x006e4680 ++#define BCHP_RM_0_REG_END 0x006e46b0 ++#define BCHP_RM_1_REG_START 0x006e46c0 ++#define BCHP_RM_1_REG_END 0x006e46f0 ++#define BCHP_RM_2_REG_START 0x006e4700 ++#define BCHP_RM_2_REG_END 0x006e4730 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006e4800 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006e4844 ++#define BCHP_DVI_MISC_0_REG_START 0x006e4900 ++#define BCHP_DVI_MISC_0_REG_END 0x006e4900 ++#define BCHP_DVI_DTG_0_REG_START 0x006e5000 ++#define BCHP_DVI_DTG_0_REG_END 0x006e5488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006e5800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006e5830 ++#define BCHP_DVI_CSC_0_REG_START 0x006e5900 ++#define BCHP_DVI_CSC_0_REG_END 0x006e5940 ++#define BCHP_DVI_FC_0_REG_START 0x006e5a00 ++#define BCHP_DVI_FC_0_REG_END 0x006e5a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006e5b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006e5b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006e5c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006e5c44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006e6000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006e6488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006e6600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006e6630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006e6700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006e6718 ++#define BCHP_ITU656_0_REG_START 0x006e6800 ++#define BCHP_ITU656_0_REG_END 0x006e6820 ++#define BCHP_VEC_CFG_REG_START 0x006e6c00 ++#define BCHP_VEC_CFG_REG_END 0x006e6d78 ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006e7000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006e702c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006e7200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006e7320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006e7400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006e745c ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x006e7500 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x006e755c ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006e7600 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006e7608 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006e7700 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006e772c ++#define BCHP_DVP_TVG_0_REG_START 0x006e7800 ++#define BCHP_DVP_TVG_0_REG_END 0x006e7888 ++#define BCHP_VBI_ENC_REG_START 0x006e8000 ++#define BCHP_VBI_ENC_REG_END 0x006e80a0 ++#define BCHP_CCE_0_REG_START 0x006e8400 ++#define BCHP_CCE_0_REG_END 0x006e8458 ++#define BCHP_CCE_1_REG_START 0x006e8500 ++#define BCHP_CCE_1_REG_END 0x006e8558 ++#define BCHP_WSE_0_REG_START 0x006e8600 ++#define BCHP_WSE_0_REG_END 0x006e8614 ++#define BCHP_WSE_1_REG_START 0x006e8700 ++#define BCHP_WSE_1_REG_END 0x006e8714 ++#define BCHP_CGMSAE_0_REG_START 0x006e8800 ++#define BCHP_CGMSAE_0_REG_END 0x006e8858 ++#define BCHP_CGMSAE_1_REG_START 0x006e8900 ++#define BCHP_CGMSAE_1_REG_END 0x006e8958 ++#define BCHP_TTE_0_REG_START 0x006e8a00 ++#define BCHP_TTE_0_REG_END 0x006e8a28 ++#define BCHP_TTE_1_REG_START 0x006e8b00 ++#define BCHP_TTE_1_REG_END 0x006e8b28 ++#define BCHP_GSE_0_REG_START 0x006e8c00 ++#define BCHP_GSE_0_REG_END 0x006e8c80 ++#define BCHP_GSE_1_REG_START 0x006e8d00 ++#define BCHP_GSE_1_REG_END 0x006e8d80 ++#define BCHP_AMOLE_0_REG_START 0x006e8e00 ++#define BCHP_AMOLE_0_REG_END 0x006e8e8c ++#define BCHP_AMOLE_1_REG_START 0x006e8f00 ++#define BCHP_AMOLE_1_REG_END 0x006e8f8c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006e9000 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006e9054 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006e9100 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006e910c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006e9200 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006e9228 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006e9300 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006e9380 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006e9400 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006e948c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006e9500 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006e9524 ++#define BCHP_DVP_HR_REG_START 0x006f0000 ++#define BCHP_DVP_HR_REG_END 0x006f03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x006f0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x006f042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x006f0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x006f0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x006f0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x006f090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x006f0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x006f0c28 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x006f1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x006f11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x006f1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x006f13fc ++#define BCHP_HDMI_RX_0_REG_START 0x006f2000 ++#define BCHP_HDMI_RX_0_REG_END 0x006f27fc ++#define BCHP_HDCP2_RX_0_REG_START 0x006f2800 ++#define BCHP_HDCP2_RX_0_REG_END 0x006f29fc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x006f2a00 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x006f2a2c ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_START 0x006f2a40 ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_END 0x006f2a6c ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_START 0x006f2a80 ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_END 0x006f2aac ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_START 0x006f2ac0 ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_END 0x006f2ad4 ++#define BCHP_HD_DVI_0_REG_START 0x006f4000 ++#define BCHP_HD_DVI_0_REG_END 0x006f427c ++#define BCHP_DVP_HR_TMR_REG_START 0x006f4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x006f4cfc ++#define BCHP_DVP_HT_REG_START 0x006f8000 ++#define BCHP_DVP_HT_REG_END 0x006f8114 ++#define BCHP_HDMI_REG_START 0x006f8800 ++#define BCHP_HDMI_REG_END 0x006f8afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006f8b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006f8dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006f8e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006f8e7c ++#define BCHP_HDMI_RM_REG_START 0x006f8e80 ++#define BCHP_HDMI_RM_REG_END 0x006f8eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006f8f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006f8f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006f8f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006f8fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006f9000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006f902c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006f9080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006f90ac ++#define BCHP_HDMI_RAM_REG_START 0x006f9100 ++#define BCHP_HDMI_RAM_REG_END 0x006f92fc ++#define BCHP_BVN_RGR_REG_START 0x006fe000 ++#define BCHP_BVN_RGR_REG_END 0x006fe010 ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x00700000 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x007002ec ++#define BCHP_VICE2_CME_0_0_REG_START 0x00700400 ++#define BCHP_VICE2_CME_0_0_REG_END 0x007004a0 ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x00700800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x0070088c ++#define BCHP_VICE2_FME_0_0_REG_START 0x00701000 ++#define BCHP_VICE2_FME_0_0_REG_END 0x007010c0 ++#define BCHP_VICE2_HA_0_0_REG_START 0x00701400 ++#define BCHP_VICE2_HA_0_0_REG_END 0x0070148c ++#define BCHP_VICE2_IMD_0_0_REG_START 0x00701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x0070187c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x00701c00 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x00701d28 ++#define BCHP_VICE2_MC_0_0_REG_START 0x00702000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x0070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x00702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x007025e4 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x00702800 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x00702a24 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x00702c00 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x00702e24 ++#define BCHP_VICE2_VIP2_0_0_REG_START 0x00703000 ++#define BCHP_VICE2_VIP2_0_0_REG_END 0x00703224 ++#define BCHP_VICE2_VIP3_0_0_REG_START 0x00703400 ++#define BCHP_VICE2_VIP3_0_0_REG_END 0x00703624 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x00704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x00705338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x00718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x007182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x00720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x007200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x00720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x0072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x00720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x0072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x00722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x007233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x00730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x0073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x00758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x007582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x00760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x007600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x00760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x0076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x00760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x0076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x00762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x007633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x00770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x0077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x00780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x0078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x00781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x00781050 ++#define BCHP_VICE2_L2_0_REG_START 0x00781100 ++#define BCHP_VICE2_L2_0_REG_END 0x0078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x00782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x007820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x00900000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x00900080 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00270 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02078 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f8 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02178 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f8 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02278 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f8 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02378 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f8 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02478 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f8 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02578 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f8 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02678 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f8 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e178 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_CH0_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_CH0_REG_END 0x00a6a0fc ++#define BCHP_XPT_WDMA_CH1_REG_START 0x00a6a100 ++#define BCHP_XPT_WDMA_CH1_REG_END 0x00a6a1fc ++#define BCHP_XPT_WDMA_CH2_REG_START 0x00a6a200 ++#define BCHP_XPT_WDMA_CH2_REG_END 0x00a6a2fc ++#define BCHP_XPT_WDMA_CH3_REG_START 0x00a6a300 ++#define BCHP_XPT_WDMA_CH3_REG_END 0x00a6a3fc ++#define BCHP_XPT_WDMA_CH4_REG_START 0x00a6a400 ++#define BCHP_XPT_WDMA_CH4_REG_END 0x00a6a4fc ++#define BCHP_XPT_WDMA_CH5_REG_START 0x00a6a500 ++#define BCHP_XPT_WDMA_CH5_REG_END 0x00a6a5fc ++#define BCHP_XPT_WDMA_CH6_REG_START 0x00a6a600 ++#define BCHP_XPT_WDMA_CH6_REG_END 0x00a6a6fc ++#define BCHP_XPT_WDMA_CH7_REG_START 0x00a6a700 ++#define BCHP_XPT_WDMA_CH7_REG_END 0x00a6a7fc ++#define BCHP_XPT_WDMA_CH8_REG_START 0x00a6a800 ++#define BCHP_XPT_WDMA_CH8_REG_END 0x00a6a8fc ++#define BCHP_XPT_WDMA_CH9_REG_START 0x00a6a900 ++#define BCHP_XPT_WDMA_CH9_REG_END 0x00a6a9fc ++#define BCHP_XPT_WDMA_CH10_REG_START 0x00a6aa00 ++#define BCHP_XPT_WDMA_CH10_REG_END 0x00a6aafc ++#define BCHP_XPT_WDMA_CH11_REG_START 0x00a6ab00 ++#define BCHP_XPT_WDMA_CH11_REG_END 0x00a6abfc ++#define BCHP_XPT_WDMA_CH12_REG_START 0x00a6ac00 ++#define BCHP_XPT_WDMA_CH12_REG_END 0x00a6acfc ++#define BCHP_XPT_WDMA_CH13_REG_START 0x00a6ad00 ++#define BCHP_XPT_WDMA_CH13_REG_END 0x00a6adfc ++#define BCHP_XPT_WDMA_CH14_REG_START 0x00a6ae00 ++#define BCHP_XPT_WDMA_CH14_REG_END 0x00a6aefc ++#define BCHP_XPT_WDMA_CH15_REG_START 0x00a6af00 ++#define BCHP_XPT_WDMA_CH15_REG_END 0x00a6affc ++#define BCHP_XPT_WDMA_CH16_REG_START 0x00a6b000 ++#define BCHP_XPT_WDMA_CH16_REG_END 0x00a6b0fc ++#define BCHP_XPT_WDMA_CH17_REG_START 0x00a6b100 ++#define BCHP_XPT_WDMA_CH17_REG_END 0x00a6b1fc ++#define BCHP_XPT_WDMA_CH18_REG_START 0x00a6b200 ++#define BCHP_XPT_WDMA_CH18_REG_END 0x00a6b2fc ++#define BCHP_XPT_WDMA_CH19_REG_START 0x00a6b300 ++#define BCHP_XPT_WDMA_CH19_REG_END 0x00a6b3fc ++#define BCHP_XPT_WDMA_CH20_REG_START 0x00a6b400 ++#define BCHP_XPT_WDMA_CH20_REG_END 0x00a6b4fc ++#define BCHP_XPT_WDMA_CH21_REG_START 0x00a6b500 ++#define BCHP_XPT_WDMA_CH21_REG_END 0x00a6b5fc ++#define BCHP_XPT_WDMA_CH22_REG_START 0x00a6b600 ++#define BCHP_XPT_WDMA_CH22_REG_END 0x00a6b6fc ++#define BCHP_XPT_WDMA_CH23_REG_START 0x00a6b700 ++#define BCHP_XPT_WDMA_CH23_REG_END 0x00a6b7fc ++#define BCHP_XPT_WDMA_CH24_REG_START 0x00a6b800 ++#define BCHP_XPT_WDMA_CH24_REG_END 0x00a6b8fc ++#define BCHP_XPT_WDMA_CH25_REG_START 0x00a6b900 ++#define BCHP_XPT_WDMA_CH25_REG_END 0x00a6b9fc ++#define BCHP_XPT_WDMA_CH26_REG_START 0x00a6ba00 ++#define BCHP_XPT_WDMA_CH26_REG_END 0x00a6bafc ++#define BCHP_XPT_WDMA_CH27_REG_START 0x00a6bb00 ++#define BCHP_XPT_WDMA_CH27_REG_END 0x00a6bbfc ++#define BCHP_XPT_WDMA_CH28_REG_START 0x00a6bc00 ++#define BCHP_XPT_WDMA_CH28_REG_END 0x00a6bcfc ++#define BCHP_XPT_WDMA_CH29_REG_START 0x00a6bd00 ++#define BCHP_XPT_WDMA_CH29_REG_END 0x00a6bdfc ++#define BCHP_XPT_WDMA_CH30_REG_START 0x00a6be00 ++#define BCHP_XPT_WDMA_CH30_REG_END 0x00a6befc ++#define BCHP_XPT_WDMA_CH31_REG_START 0x00a6bf00 ++#define BCHP_XPT_WDMA_CH31_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_GENET_0_SYS_REG_START 0x00b00000 ++#define BCHP_GENET_0_SYS_REG_END 0x00b00010 ++#define BCHP_GENET_0_GR_BRIDGE_REG_START 0x00b00040 ++#define BCHP_GENET_0_GR_BRIDGE_REG_END 0x00b0004c ++#define BCHP_GENET_0_EXT_REG_START 0x00b00080 ++#define BCHP_GENET_0_EXT_REG_END 0x00b000b4 ++#define BCHP_GENET_0_INTRL2_0_REG_START 0x00b00200 ++#define BCHP_GENET_0_INTRL2_0_REG_END 0x00b0022c ++#define BCHP_GENET_0_INTRL2_1_REG_START 0x00b00240 ++#define BCHP_GENET_0_INTRL2_1_REG_END 0x00b0026c ++#define BCHP_GENET_0_RBUF_REG_START 0x00b00300 ++#define BCHP_GENET_0_RBUF_REG_END 0x00b003b4 ++#define BCHP_GENET_0_TBUF_REG_START 0x00b00600 ++#define BCHP_GENET_0_TBUF_REG_END 0x00b00628 ++#define BCHP_GENET_0_UMAC_REG_START 0x00b00800 ++#define BCHP_GENET_0_UMAC_REG_END 0x00b00ed8 ++#define BCHP_GENET_0_RDMA_REG_START 0x00b02000 ++#define BCHP_GENET_0_RDMA_REG_END 0x00b030d4 ++#define BCHP_GENET_0_TDMA_REG_START 0x00b04000 ++#define BCHP_GENET_0_TDMA_REG_END 0x00b05084 ++#define BCHP_GENET_0_HFB_REG_START 0x00b08000 ++#define BCHP_GENET_0_HFB_REG_END 0x00b0fc48 ++#define BCHP_GENET_1_SYS_REG_START 0x00b20000 ++#define BCHP_GENET_1_SYS_REG_END 0x00b20010 ++#define BCHP_GENET_1_GR_BRIDGE_REG_START 0x00b20040 ++#define BCHP_GENET_1_GR_BRIDGE_REG_END 0x00b2004c ++#define BCHP_GENET_1_EXT_REG_START 0x00b20080 ++#define BCHP_GENET_1_EXT_REG_END 0x00b200b4 ++#define BCHP_GENET_1_INTRL2_0_REG_START 0x00b20200 ++#define BCHP_GENET_1_INTRL2_0_REG_END 0x00b2022c ++#define BCHP_GENET_1_INTRL2_1_REG_START 0x00b20240 ++#define BCHP_GENET_1_INTRL2_1_REG_END 0x00b2026c ++#define BCHP_GENET_1_RBUF_REG_START 0x00b20300 ++#define BCHP_GENET_1_RBUF_REG_END 0x00b203b4 ++#define BCHP_GENET_1_TBUF_REG_START 0x00b20600 ++#define BCHP_GENET_1_TBUF_REG_END 0x00b20628 ++#define BCHP_GENET_1_UMAC_REG_START 0x00b20800 ++#define BCHP_GENET_1_UMAC_REG_END 0x00b20ed8 ++#define BCHP_GENET_1_RDMA_REG_START 0x00b22000 ++#define BCHP_GENET_1_RDMA_REG_END 0x00b230d4 ++#define BCHP_GENET_1_TDMA_REG_START 0x00b24000 ++#define BCHP_GENET_1_TDMA_REG_END 0x00b25084 ++#define BCHP_GENET_1_HFB_REG_START 0x00b28000 ++#define BCHP_GENET_1_HFB_REG_END 0x00b2fc48 ++#define BCHP_GENET_2_SYS_REG_START 0x00b40000 ++#define BCHP_GENET_2_SYS_REG_END 0x00b40010 ++#define BCHP_GENET_2_GR_BRIDGE_REG_START 0x00b40040 ++#define BCHP_GENET_2_GR_BRIDGE_REG_END 0x00b4004c ++#define BCHP_GENET_2_EXT_REG_START 0x00b40080 ++#define BCHP_GENET_2_EXT_REG_END 0x00b400b4 ++#define BCHP_GENET_2_INTRL2_0_REG_START 0x00b40200 ++#define BCHP_GENET_2_INTRL2_0_REG_END 0x00b4022c ++#define BCHP_GENET_2_INTRL2_1_REG_START 0x00b40240 ++#define BCHP_GENET_2_INTRL2_1_REG_END 0x00b4026c ++#define BCHP_GENET_2_RBUF_REG_START 0x00b40300 ++#define BCHP_GENET_2_RBUF_REG_END 0x00b403b4 ++#define BCHP_GENET_2_TBUF_REG_START 0x00b40600 ++#define BCHP_GENET_2_TBUF_REG_END 0x00b40628 ++#define BCHP_GENET_2_UMAC_REG_START 0x00b40800 ++#define BCHP_GENET_2_UMAC_REG_END 0x00b40ed8 ++#define BCHP_GENET_2_RDMA_REG_START 0x00b42000 ++#define BCHP_GENET_2_RDMA_REG_END 0x00b430d4 ++#define BCHP_GENET_2_TDMA_REG_START 0x00b44000 ++#define BCHP_GENET_2_TDMA_REG_END 0x00b45084 ++#define BCHP_GENET_2_HFB_REG_START 0x00b48000 ++#define BCHP_GENET_2_HFB_REG_END 0x00b4fc48 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_M2MC1_REG_START 0x00be6000 ++#define BCHP_M2MC1_REG_END 0x00be67fc ++#define BCHP_M2MC1_L2_REG_START 0x00be7000 ++#define BCHP_M2MC1_L2_REG_END 0x00be702c ++#define BCHP_M2MC1_GR_REG_START 0x00be7800 ++#define BCHP_M2MC1_GR_REG_END 0x00be780c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea07c ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea1a4 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_AXM_REG_START 0x00bea700 ++#define BCHP_V3D_AXM_REG_END 0x00bea714 ++#define BCHP_V3D_GMP_REG_START 0x00bea800 ++#define BCHP_V3D_GMP_REG_END 0x00bea820 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea900 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea90c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaacc ++#define BCHP_V3D_ERROR_REG_START 0x00beaf00 ++#define BCHP_V3D_ERROR_REG_END 0x00beaf20 ++#define BCHP_V3D_QPUDBG_REG_START 0x00bec000 ++#define BCHP_V3D_QPUDBG_REG_END 0x00bedffc ++#define BCHP_V3D_HUB_CTL_REG_START 0x00bee000 ++#define BCHP_V3D_HUB_CTL_REG_END 0x00bee07c ++#define BCHP_V3D_MSO_REG_START 0x00bee100 ++#define BCHP_V3D_MSO_REG_END 0x00bee27c ++#define BCHP_V3D_TSY_REG_START 0x00bee300 ++#define BCHP_V3D_TSY_REG_END 0x00bee368 ++#define BCHP_V3D_TFU_REG_START 0x00bee400 ++#define BCHP_V3D_TFU_REG_END 0x00bee464 ++#define BCHP_V3D_MCS_REG_START 0x00bee500 ++#define BCHP_V3D_MCS_REG_END 0x00bee55c ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0284 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_END 0x00cb0384 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0400 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb04b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_END 0x00cb0f88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1430 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_START 0x00cb1500 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_END 0x00cb1530 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_END 0x00cb1630 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1924 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1a00 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb1a5c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb20fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb28ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb3000 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb3064 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb3100 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb3164 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++#define BCHP_MEMC_GEN_0_REG_START 0x01100000 ++#define BCHP_MEMC_GEN_0_REG_END 0x011007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x01100800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x011008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x01100a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x01100afc ++#define BCHP_MEMC_ARC_0_REG_START 0x01100c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x01100f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x01101000 ++#define BCHP_MEMC_ARB_0_REG_END 0x011014d0 ++#define BCHP_MEMC_DDR_0_REG_START 0x01102000 ++#define BCHP_MEMC_DDR_0_REG_END 0x011027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x01103000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x01103044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x01103200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x01103244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x01103400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x01103444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x01103800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x011039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x01104000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x01104010 ++#define BCHP_MEMC_MISC_0_REG_START 0x01105000 ++#define BCHP_MEMC_MISC_0_REG_END 0x01105010 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x01108000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x011080e4 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x01120000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x01120218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x01120400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x01120518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x01120600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x01120718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x01120800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x01120918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x01120a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x01120b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x01120c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x01120d18 ++#define BCHP_DPFE_CONTROLLER_0_REG_START 0x01122000 ++#define BCHP_DPFE_CONTROLLER_0_REG_END 0x01122050 ++#define BCHP_DPFE_EDIS_0_0_REG_START 0x01122400 ++#define BCHP_DPFE_EDIS_0_0_REG_END 0x01122560 ++#define BCHP_DPFE_EDIS_0_1_REG_START 0x01122800 ++#define BCHP_DPFE_EDIS_0_1_REG_END 0x01122960 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x01140000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0117fffc ++#define BCHP_MEMC_GEN_1_REG_START 0x01180000 ++#define BCHP_MEMC_GEN_1_REG_END 0x011807fc ++#define BCHP_MEMC_EDIS_1_0_REG_START 0x01180800 ++#define BCHP_MEMC_EDIS_1_0_REG_END 0x011808fc ++#define BCHP_MEMC_EDIS_1_1_REG_START 0x01180a00 ++#define BCHP_MEMC_EDIS_1_1_REG_END 0x01180afc ++#define BCHP_MEMC_ARC_1_REG_START 0x01180c00 ++#define BCHP_MEMC_ARC_1_REG_END 0x01180f74 ++#define BCHP_MEMC_ARB_1_REG_START 0x01181000 ++#define BCHP_MEMC_ARB_1_REG_END 0x011814d0 ++#define BCHP_MEMC_DDR_1_REG_START 0x01182000 ++#define BCHP_MEMC_DDR_1_REG_END 0x011827fc ++#define BCHP_MEMC_L2_1_0_REG_START 0x01183000 ++#define BCHP_MEMC_L2_1_0_REG_END 0x01183044 ++#define BCHP_MEMC_L2_1_1_REG_START 0x01183200 ++#define BCHP_MEMC_L2_1_1_REG_END 0x01183244 ++#define BCHP_MEMC_L2_1_2_REG_START 0x01183400 ++#define BCHP_MEMC_L2_1_2_REG_END 0x01183444 ++#define BCHP_MEMC_TRACELOG_0_1_REG_START 0x01183800 ++#define BCHP_MEMC_TRACELOG_0_1_REG_END 0x011839fc ++#define BCHP_MEMC_RGRB_1_REG_START 0x01184000 ++#define BCHP_MEMC_RGRB_1_REG_END 0x01184010 ++#define BCHP_MEMC_MISC_1_REG_START 0x01185000 ++#define BCHP_MEMC_MISC_1_REG_END 0x01185010 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_START 0x01188000 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_END 0x011880e4 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_START 0x011a0000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_END 0x011a0218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_START 0x011a0400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_END 0x011a0518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_START 0x011a0600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_END 0x011a0718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_START 0x011a0800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_END 0x011a0918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_START 0x011a0a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_END 0x011a0b18 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_START 0x011a0c00 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_END 0x011a0d18 ++#define BCHP_DPFE_CONTROLLER_1_REG_START 0x011a2000 ++#define BCHP_DPFE_CONTROLLER_1_REG_END 0x011a2050 ++#define BCHP_DPFE_EDIS_1_0_REG_START 0x011a2400 ++#define BCHP_DPFE_EDIS_1_0_REG_END 0x011a2560 ++#define BCHP_DPFE_EDIS_1_1_REG_START 0x011a2800 ++#define BCHP_DPFE_EDIS_1_1_REG_END 0x011a2960 ++#define BCHP_MEMC_SENTINEL_0_1_REG_START 0x011c0000 ++#define BCHP_MEMC_SENTINEL_0_1_REG_END 0x011ffffc ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_HD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_HD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_HD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_UHD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_UHD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_UHD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B_NODCD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B_NODCD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *DPFE_CONTROLLER ++ ***************************************************************************/ ++/*************************************************************************** ++ *Command_Code - DPFE Command Code Format ++ ***************************************************************************/ ++/* DPFE_CONTROLLER :: Command_Code :: reserved0 [07:05] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_reserved0_MASK 0xe0 ++#define BCHP_DPFE_CONTROLLER_Command_Code_reserved0_SHIFT 5 ++ ++/* union - case code [04:00] */ ++/* DPFE_CONTROLLER :: Command_Code :: code :: all [04:00] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_code_all_MASK 0x1f ++#define BCHP_DPFE_CONTROLLER_Command_Code_code_all_SHIFT 0 ++ ++/* union - case bits [04:00] */ ++/* DPFE_CONTROLLER :: Command_Code :: bits :: cs [04:03] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_cs_MASK 0x18 ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_cs_SHIFT 3 ++ ++/* DPFE_CONTROLLER :: Command_Code :: bits :: ras [02:02] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_ras_MASK 0x04 ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_ras_SHIFT 2 ++ ++/* DPFE_CONTROLLER :: Command_Code :: bits :: cas [01:01] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_cas_MASK 0x02 ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_cas_SHIFT 1 ++ ++/* DPFE_CONTROLLER :: Command_Code :: bits :: we [00:00] */ ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_we_MASK 0x01 ++#define BCHP_DPFE_CONTROLLER_Command_Code_bits_we_SHIFT 0 ++ ++/*************************************************************************** ++ *Row_Addr - DPFE Row Address Format ++ ***************************************************************************/ ++/* DPFE_CONTROLLER :: Row_Addr :: reserved0 [23:17] */ ++#define BCHP_DPFE_CONTROLLER_Row_Addr_reserved0_MASK 0xfe0000 ++#define BCHP_DPFE_CONTROLLER_Row_Addr_reserved0_SHIFT 17 ++ ++/* DPFE_CONTROLLER :: Row_Addr :: Row_Addr [16:00] */ ++#define BCHP_DPFE_CONTROLLER_Row_Addr_Row_Addr_MASK 0x01ffff ++#define BCHP_DPFE_CONTROLLER_Row_Addr_Row_Addr_SHIFT 0 ++ ++/*************************************************************************** ++ *Bank_Addr - DPFE Bank Address Format ++ ***************************************************************************/ ++/* DPFE_CONTROLLER :: Bank_Addr :: reserved0 [07:04] */ ++#define BCHP_DPFE_CONTROLLER_Bank_Addr_reserved0_MASK 0xf0 ++#define BCHP_DPFE_CONTROLLER_Bank_Addr_reserved0_SHIFT 4 ++ ++/* DPFE_CONTROLLER :: Bank_Addr :: Bank_Addr [03:00] */ ++#define BCHP_DPFE_CONTROLLER_Bank_Addr_Bank_Addr_MASK 0x0f ++#define BCHP_DPFE_CONTROLLER_Bank_Addr_Bank_Addr_SHIFT 0 ++ ++/*************************************************************************** ++ *Post_Command_Delay - DPFE Post Command Delay Format ++ ***************************************************************************/ ++/* DPFE_CONTROLLER :: Post_Command_Delay :: reserved0 [15:12] */ ++#define BCHP_DPFE_CONTROLLER_Post_Command_Delay_reserved0_MASK 0xf000 ++#define BCHP_DPFE_CONTROLLER_Post_Command_Delay_reserved0_SHIFT 12 ++ ++/* DPFE_CONTROLLER :: Post_Command_Delay :: Post_Command_Delay [11:00] */ ++#define BCHP_DPFE_CONTROLLER_Post_Command_Delay_Post_Command_Delay_MASK 0x0fff ++#define BCHP_DPFE_CONTROLLER_Post_Command_Delay_Post_Command_Delay_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_VSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_VSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x0000000000000000000000000000000000000000000000000000000000000000 ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7439b0/bchp_usb_ctrl.h b/include/linux/brcmstb/7439b0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..1509b9a9 +--- /dev/null ++++ b/include/linux/brcmstb/7439b0/bchp_usb_ctrl.h +@@ -0,0 +1,1718 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Fri Dec 19 03:17:34 2014 ++ * Full Compile MD5 Checksum 9e27b6ad4c64ff5a28f048a17a7bb056 ++ * (minus title and desc) ++ * MD5 Checksum a1a4b86f7693c062faaafa50c5ca64ce ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008008 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00470200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00470204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00470208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0047020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00470210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00470214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00470218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0047021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00470220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00470224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00470228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0047022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00470230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00470234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00470238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0047023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00470240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00470244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00470248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0047024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00470250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00470254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00470258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0047025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00470260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00470264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00470268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0047026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00470270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00470274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00470278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0047027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1 0x00470290 /* USB DEVICE CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2 0x00470294 /* USB DEVICE CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB_DEBOUNCE_COUNT 0x00470298 /* USB Debounce Count Register */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004702a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004702a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004702a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004702ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004702b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004702b4 /* SCB2 extn start and end address */ ++#define BCHP_USB_CTRL_USB20_ID 0x004702f0 /* USB REVID */ ++#define BCHP_USB_CTRL_USB30_ID 0x004702f4 /* USB REVID */ ++#define BCHP_USB_CTRL_BDC_COREID 0x004702f8 /* USB REVID */ ++#define BCHP_USB_CTRL_USB_REVID 0x004702fc /* USB REVID */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: strap_ipp_sel [25:25] */ ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_SHIFT 25 ++#define BCHP_USB_CTRL_SETUP_strap_ipp_sel_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [24:20] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x01f00000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 20 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [19:19] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00080000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [16:16] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb0_en [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb0_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb0_en_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb0_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [12:12] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: setup_spare2 [11:10] */ ++#define BCHP_USB_CTRL_SETUP_setup_spare2_MASK 0x00000c00 ++#define BCHP_USB_CTRL_SETUP_setup_spare2_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_setup_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_CTL_SPARE1 [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_CTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:18] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffc0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ESTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_ESTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000008 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:19] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ff80000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 19 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: ohci_memreq_disable [18:18] */ ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_MASK 0x00040000 ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_SHIFT 18 ++#define BCHP_USB_CTRL_OBRIDGE_ohci_memreq_disable_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OSTOP_SCB_REQ [17:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_MASK 0x00020000 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OSTOP_SCB_REQ_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: MDIO2_SPARE [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_MDIO2_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: PHY_TPOUT_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_PHY_TPOUT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL_SPARE [07:06] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SPARE_MASK 0x000000c0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SPARE_SHIFT 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [05:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x0000003f ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:10] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03fffc00 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 10 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: ss_hubsetup_min [09:09] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_MASK 0x00000200 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_SHIFT 9 ++#define BCHP_USB_CTRL_USB_SIMCTL_ss_hubsetup_min_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE2 [08:07] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_MASK 0x00000180 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_SHIFT 7 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: usb_cap_dis [06:06] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_SHIFT 6 ++#define BCHP_USB_CTRL_USB_SIMCTL_usb_cap_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scb_req_lgcy [05:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_scb_req_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:23] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 23 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [22:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00600000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: USB_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_USB_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE2 [30:28] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_MASK 0x70000000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_SHIFT 28 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_p1 [27:27] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_SHIFT 27 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_p0 [26:26] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_SHIFT 26 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_p0_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_usb30 [25:25] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_MASK 0x02000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_SHIFT 25 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: bond_dis_usb30_p1 [24:24] */ ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB_PM_bond_dis_usb30_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xdc_soft_resetb [23:23] */ ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_SHIFT 23 ++#define BCHP_USB_CTRL_USB_PM_xdc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_soft_resetb [22:22] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_SHIFT 22 ++#define BCHP_USB_CTRL_USB_PM_xhc_soft_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc1_resetb [21:21] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_SHIFT 21 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc1_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: usb20_hc0_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB_PM_usb20_hc0_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE1 [19:16] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_MASK 0x000f0000 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [15:15] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 15 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [14:14] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 14 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [13:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x00003fe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:16] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 16 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [15:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:23] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xff800000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_rxelectidle_sel [22:22] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_rxelectidle_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_sspll_suspend_en [21:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_sspll_suspend_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: cdr_reset [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_cdr_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: phy3_phystatus_override [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_phystatus_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_rxstatus_override [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_rxstatus_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_DEVICE_CTL1 - USB DEVICE CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_ctl1_spare2 [31:15] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_MASK 0xffff8000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_SHIFT 15 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_vdd_retention [14:14] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_MASK 0x00004000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_SHIFT 14 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_vdd_retention_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_rmt_wkup [13:13] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_SHIFT 13 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_rmt_wkup_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_buspwr [12:12] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_SHIFT 12 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_buspwr_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_spd [11:09] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_MASK 0x00000e00 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_SHIFT 9 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_spd_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_stp_ndr [08:08] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_SHIFT 8 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_stp_ndr_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usb_device_ctl1_spare1 [07:04] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_SHIFT 4 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usb_device_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: device_pullup_dis [03:03] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_SHIFT 3 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_device_pullup_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: usbphy_host_override [02:02] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_SHIFT 2 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_usbphy_host_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL1 :: port_mode [01:00] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL1_port_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_DEVICE_CTL2 - USB DEVICE CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: usbd_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: bdc_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: bdc_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: bdc_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: usbd_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_usbd_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: bdc_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB_DEVICE_CTL2 :: bdc_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB_DEVICE_CTL2_bdc_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_DEBOUNCE_COUNT - USB Debounce Count Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_DEBOUNCE_COUNT :: drd_debounce_count [31:00] */ ++#define BCHP_USB_CTRL_USB_DEBOUNCE_COUNT_drd_debounce_count_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_DEBOUNCE_COUNT_drd_debounce_count_SHIFT 0 ++#define BCHP_USB_CTRL_USB_DEBOUNCE_COUNT_drd_debounce_count_DEFAULT 0x00a4cb80 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x00000017 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++/*************************************************************************** ++ *USB20_ID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB20_ID :: USB20PHY_ID [31:16] */ ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_SHIFT 16 ++#define BCHP_USB_CTRL_USB20_ID_USB20PHY_ID_DEFAULT 0x0000d036 ++ ++/* USB_CTRL :: USB20_ID :: SYNOPSYS_CORE_ID [15:00] */ ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_SHIFT 0 ++#define BCHP_USB_CTRL_USB20_ID_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/*************************************************************************** ++ *USB30_ID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_ID :: USB30PHY_ID [31:16] */ ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_ID_USB30PHY_ID_DEFAULT 0x0000cb00 ++ ++/* USB_CTRL :: USB30_ID :: XHC_CORE_ID [15:00] */ ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_ID_XHC_CORE_ID_DEFAULT 0x00000200 ++ ++/*************************************************************************** ++ *BDC_COREID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: BDC_COREID :: BDC3_COREID [31:16] */ ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_SHIFT 16 ++#define BCHP_USB_CTRL_BDC_COREID_BDC3_COREID_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: BDC_COREID :: BDC2_COREID [15:00] */ ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_MASK 0x0000ffff ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_SHIFT 0 ++#define BCHP_USB_CTRL_BDC_COREID_BDC2_COREID_DEFAULT 0x00000200 ++ ++/*************************************************************************** ++ *USB_REVID - USB REVID ++ ***************************************************************************/ ++/* USB_CTRL :: USB_REVID :: USB_REVID [31:00] */ ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_SHIFT 0 ++#define BCHP_USB_CTRL_USB_REVID_USB_REVID_DEFAULT 0x00000001 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7445d0/bchp_common.h b/include/linux/brcmstb/7445d0/bchp_common.h +new file mode 100644 +index 00000000..faba7dc6 +--- /dev/null ++++ b/include/linux/brcmstb/7445d0/bchp_common.h +@@ -0,0 +1,4535 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Sep 3 11:52:25 2014 ++ * Full Compile MD5 Checksum 4a20c0e31b928020bbfa96c583b9e661 ++ * (minus title and desc) ++ * MD5 Checksum 077c6f684bcabb645ae9da4069fea8e4 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008005 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_COMMON_H__ ++#define BCHP_COMMON_H__ ++ ++/** ++ * m = memory, c = core, r = register, f = field, d = data. ++ */ ++#if !defined(GET_FIELD) && !defined(SET_FIELD) ++#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK ++#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT ++ ++#define GET_FIELD(m,c,r,f) \ ++((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f))) ++ ++#define SET_FIELD(m,c,r,f,d) \ ++((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d)) << BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f)))) ++ ++#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) ++#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) ++#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) ++ ++#endif /* GET & SET */ ++ ++/*************************************************************************** ++ *BCM7445_D0 ++ ***************************************************************************/ ++#define BCHP_PHYSICAL_OFFSET 0xf0000000 ++#define BCHP_REGISTER_START 0x00000000 /* HEVD_OL_CPU_REGS_0 is first */ ++#define BCHP_REGISTER_END 0x01280000 /* MEMC_SENTINEL_0_2 is last */ ++#define BCHP_REGISTER_SIZE 0x004a0000 /* Number of registers */ ++ ++/**************************************************************************** ++ * Core instance register start address. ++ ***************************************************************************/ ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_START 0x00000000 ++#define BCHP_HEVD_OL_CPU_REGS_0_REG_END 0x00000108 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_START 0x00000400 ++#define BCHP_HEVD_OL_CPU_DMA_0_REG_END 0x00000440 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_START 0x00000800 ++#define BCHP_HEVD_OL_CPU_DEBUG_0_REG_END 0x00000ffc ++#define BCHP_HEVD_OL_SINT_0_REG_START 0x00001000 ++#define BCHP_HEVD_OL_SINT_0_REG_END 0x00001028 ++#define BCHP_HEVD_OL_LDST_0_REG_START 0x00008000 ++#define BCHP_HEVD_OL_LDST_0_REG_END 0x0000fffc ++#define BCHP_REG_CABAC2BINS_0_REG_START 0x00010b00 ++#define BCHP_REG_CABAC2BINS_0_REG_END 0x00010bfc ++#define BCHP_REG_CABAC2BINS2_0_REG_START 0x00012400 ++#define BCHP_REG_CABAC2BINS2_0_REG_END 0x000127fc ++#define BCHP_HEVD_CABAC_0_REG_START 0x00013000 ++#define BCHP_HEVD_CABAC_0_REG_END 0x0001307c ++#define BCHP_HEVD_OL_CTL_0_REG_START 0x00014000 ++#define BCHP_HEVD_OL_CTL_0_REG_END 0x000151fc ++#define BCHP_DECODE_MAIN_0_REG_START 0x00020100 ++#define BCHP_DECODE_MAIN_0_REG_END 0x000201fc ++#define BCHP_DECODE_MCOM_0_REG_START 0x00020300 ++#define BCHP_DECODE_MCOM_0_REG_END 0x0002031c ++#define BCHP_DECODE_SPRE_0_REG_START 0x00020320 ++#define BCHP_DECODE_SPRE_0_REG_END 0x0002033c ++#define BCHP_DECODE_WPRD_0_REG_START 0x00020340 ++#define BCHP_DECODE_WPRD_0_REG_END 0x0002035c ++#define BCHP_DECODE_DQNT_0_REG_START 0x00020400 ++#define BCHP_DECODE_DQNT_0_REG_END 0x0002045c ++#define BCHP_DECODE_DQNT_8X8_0_REG_START 0x00020500 ++#define BCHP_DECODE_DQNT_8X8_0_REG_END 0x0002057c ++#define BCHP_DECODE_VP8_XFRM_0_REG_START 0x00020600 ++#define BCHP_DECODE_VP8_XFRM_0_REG_END 0x0002060c ++#define BCHP_DECODE_VP6_DCP_0_REG_START 0x00020620 ++#define BCHP_DECODE_VP6_DCP_0_REG_END 0x0002062c ++#define BCHP_DECODE_XFRM_0_REG_START 0x00020700 ++#define BCHP_DECODE_XFRM_0_REG_END 0x0002071c ++#define BCHP_DECODE_DBLK_0_REG_START 0x00020720 ++#define BCHP_DECODE_DBLK_0_REG_END 0x0002073c ++#define BCHP_DECODE_MB_0_REG_START 0x00020740 ++#define BCHP_DECODE_MB_0_REG_END 0x0002075c ++#define BCHP_DECODE_SINT_0_REG_START 0x00020c00 ++#define BCHP_DECODE_SINT_0_REG_END 0x00020dfc ++#define BCHP_DECODE_WPTBL_0_REG_START 0x00023000 ++#define BCHP_DECODE_WPTBL_0_REG_END 0x000231fc ++#define BCHP_HEVD_BE_GLOBAL_0_REG_START 0x00024000 ++#define BCHP_HEVD_BE_GLOBAL_0_REG_END 0x00024030 ++#define BCHP_HEVD_IXFORM_0_REG_START 0x00024100 ++#define BCHP_HEVD_IXFORM_0_REG_END 0x000241fc ++#define BCHP_HEVD_MCOMP_0_REG_START 0x00024200 ++#define BCHP_HEVD_MCOMP_0_REG_END 0x000242fc ++#define BCHP_HEVD_SPRED_0_REG_START 0x00024300 ++#define BCHP_HEVD_SPRED_0_REG_END 0x000243f0 ++#define BCHP_HEVD_FILTER_0_REG_START 0x00024400 ++#define BCHP_HEVD_FILTER_0_REG_END 0x000244fc ++#define BCHP_HEVD_OUTPUT_0_REG_START 0x00024500 ++#define BCHP_HEVD_OUTPUT_0_REG_END 0x000245fc ++#define BCHP_HEVD_MARKER_0_REG_START 0x00024f00 ++#define BCHP_HEVD_MARKER_0_REG_END 0x00024f7c ++#define BCHP_HEVD_FE_CTRL_0_REG_START 0x00025000 ++#define BCHP_HEVD_FE_CTRL_0_REG_END 0x00025048 ++#define BCHP_HEVD_STRM_IN_0_REG_START 0x00025100 ++#define BCHP_HEVD_STRM_IN_0_REG_END 0x00025118 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_START 0x00025200 ++#define BCHP_HEVD_CMDBUS_XMIT_0_REG_END 0x00025230 ++#define BCHP_HEVD_VECGEN_0_REG_START 0x00025400 ++#define BCHP_HEVD_VECGEN_0_REG_END 0x0002568c ++#define BCHP_DCD_PIPE_CTL_0_REG_START 0x00026000 ++#define BCHP_DCD_PIPE_CTL_0_REG_END 0x00026404 ++#define BCHP_HEVD_PCACHE_0_REG_START 0x00026800 ++#define BCHP_HEVD_PCACHE_0_REG_END 0x00026834 ++#define BCHP_HEVD_PFRI_0_REG_START 0x00026a00 ++#define BCHP_HEVD_PFRI_0_REG_END 0x00026b58 ++#define BCHP_RVC_0_REG_START 0x00026c00 ++#define BCHP_RVC_0_REG_END 0x00026c20 ++#define BCHP_ILS_REGS_0_REG_START 0x00027000 ++#define BCHP_ILS_REGS_0_REG_END 0x000270fc ++#define BCHP_ILS_SCALE_ADDR_0_REG_START 0x00027100 ++#define BCHP_ILS_SCALE_ADDR_0_REG_END 0x0002710c ++#define BCHP_ILS_SPSCALE_FILL_0_REG_START 0x00027180 ++#define BCHP_ILS_SPSCALE_FILL_0_REG_END 0x00027184 ++#define BCHP_ILS_MVSCALE_0_REG_START 0x00027200 ++#define BCHP_ILS_MVSCALE_0_REG_END 0x0002738c ++#define BCHP_ILB_REGS_0_REG_START 0x00027400 ++#define BCHP_ILB_REGS_0_REG_END 0x00027410 ++#define BCHP_BLD_DECODE_MAIN_0_REG_START 0x00028100 ++#define BCHP_BLD_DECODE_MAIN_0_REG_END 0x000281fc ++#define BCHP_BLD_DECODE_MCOM_0_REG_START 0x00028300 ++#define BCHP_BLD_DECODE_MCOM_0_REG_END 0x0002831c ++#define BCHP_BLD_DECODE_SPRE_0_REG_START 0x00028320 ++#define BCHP_BLD_DECODE_SPRE_0_REG_END 0x0002833c ++#define BCHP_BLD_DECODE_DQNT_0_REG_START 0x00028400 ++#define BCHP_BLD_DECODE_DQNT_0_REG_END 0x0002845c ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START 0x00028500 ++#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END 0x0002857c ++#define BCHP_BLD_DECODE_XFRM_0_REG_START 0x00028700 ++#define BCHP_BLD_DECODE_XFRM_0_REG_END 0x0002871c ++#define BCHP_BLD_DECODE_DBLK_0_REG_START 0x00028720 ++#define BCHP_BLD_DECODE_DBLK_0_REG_END 0x0002873c ++#define BCHP_BLD_DECODE_MB_0_REG_START 0x00028740 ++#define BCHP_BLD_DECODE_MB_0_REG_END 0x0002875c ++#define BCHP_BLD_DECODE_SINT_0_REG_START 0x00028c00 ++#define BCHP_BLD_DECODE_SINT_0_REG_END 0x00028dfc ++#define BCHP_BLD_DECODE_RVC_0_REG_START 0x00028e00 ++#define BCHP_BLD_DECODE_RVC_0_REG_END 0x00028efc ++#define BCHP_BLD_BL_CPU_REGS_0_REG_START 0x0002c000 ++#define BCHP_BLD_BL_CPU_REGS_0_REG_END 0x0002c108 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_START 0x0002c400 ++#define BCHP_BLD_BL_CPU_DMA_0_REG_END 0x0002c440 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_START 0x0002c800 ++#define BCHP_BLD_BL_CPU_DEBUG_0_REG_END 0x0002cffc ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START 0x0002d000 ++#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END 0x0002d090 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_START 0x00030000 ++#define BCHP_HEVD_IL_CPU_REGS_0_REG_END 0x00030108 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_START 0x00030400 ++#define BCHP_HEVD_IL_CPU_DMA_0_REG_END 0x00030440 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_START 0x00030800 ++#define BCHP_HEVD_IL_CPU_DEBUG_0_REG_END 0x00030ffc ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_START 0x00031000 ++#define BCHP_HEVD_IL_SLICE_DMA_0_REG_END 0x0003100c ++#define BCHP_HEVD_IL_LDST_0_REG_START 0x00034000 ++#define BCHP_HEVD_IL_LDST_0_REG_END 0x00037ffc ++#define BCHP_DECODE_MAIN_2_0_REG_START 0x00040100 ++#define BCHP_DECODE_MAIN_2_0_REG_END 0x000401fc ++#define BCHP_DECODE_MCOM_2_0_REG_START 0x00040300 ++#define BCHP_DECODE_MCOM_2_0_REG_END 0x0004031c ++#define BCHP_DECODE_SPRE_2_0_REG_START 0x00040320 ++#define BCHP_DECODE_SPRE_2_0_REG_END 0x0004033c ++#define BCHP_DECODE_WPRD_2_0_REG_START 0x00040340 ++#define BCHP_DECODE_WPRD_2_0_REG_END 0x0004035c ++#define BCHP_DECODE_DQNT_2_0_REG_START 0x00040400 ++#define BCHP_DECODE_DQNT_2_0_REG_END 0x0004045c ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_START 0x00040500 ++#define BCHP_DECODE_DQNT_8X8_2_0_REG_END 0x0004057c ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_START 0x00040600 ++#define BCHP_DECODE_VP8_XFRM_2_0_REG_END 0x0004060c ++#define BCHP_DECODE_VP6_DCP_2_0_REG_START 0x00040620 ++#define BCHP_DECODE_VP6_DCP_2_0_REG_END 0x0004062c ++#define BCHP_DECODE_XFRM_2_0_REG_START 0x00040700 ++#define BCHP_DECODE_XFRM_2_0_REG_END 0x0004071c ++#define BCHP_DECODE_DBLK_2_0_REG_START 0x00040720 ++#define BCHP_DECODE_DBLK_2_0_REG_END 0x0004073c ++#define BCHP_DECODE_MB_2_0_REG_START 0x00040740 ++#define BCHP_DECODE_MB_2_0_REG_END 0x0004075c ++#define BCHP_DECODE_SINT_2_0_REG_START 0x00040c00 ++#define BCHP_DECODE_SINT_2_0_REG_END 0x00040dfc ++#define BCHP_DECODE_WPTBL_2_0_REG_START 0x00043000 ++#define BCHP_DECODE_WPTBL_2_0_REG_END 0x000431fc ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_START 0x00044000 ++#define BCHP_HEVD_BE_GLOBAL_2_0_REG_END 0x00044030 ++#define BCHP_HEVD_IXFORM_2_0_REG_START 0x00044100 ++#define BCHP_HEVD_IXFORM_2_0_REG_END 0x000441fc ++#define BCHP_HEVD_MCOMP_2_0_REG_START 0x00044200 ++#define BCHP_HEVD_MCOMP_2_0_REG_END 0x000442fc ++#define BCHP_HEVD_SPRED_2_0_REG_START 0x00044300 ++#define BCHP_HEVD_SPRED_2_0_REG_END 0x000443f0 ++#define BCHP_HEVD_FILTER_2_0_REG_START 0x00044400 ++#define BCHP_HEVD_FILTER_2_0_REG_END 0x000444fc ++#define BCHP_HEVD_OUTPUT_2_0_REG_START 0x00044500 ++#define BCHP_HEVD_OUTPUT_2_0_REG_END 0x000445fc ++#define BCHP_HEVD_MARKER_2_0_REG_START 0x00044f00 ++#define BCHP_HEVD_MARKER_2_0_REG_END 0x00044f7c ++#define BCHP_HEVD_FE_CTRL_2_0_REG_START 0x00045000 ++#define BCHP_HEVD_FE_CTRL_2_0_REG_END 0x00045048 ++#define BCHP_HEVD_STRM_IN_2_0_REG_START 0x00045100 ++#define BCHP_HEVD_STRM_IN_2_0_REG_END 0x00045118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_START 0x00045200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_0_REG_END 0x00045230 ++#define BCHP_HEVD_VECGEN_2_0_REG_START 0x00045400 ++#define BCHP_HEVD_VECGEN_2_0_REG_END 0x0004568c ++#define BCHP_DCD_PIPE_CTL_2_0_REG_START 0x00046000 ++#define BCHP_DCD_PIPE_CTL_2_0_REG_END 0x00046404 ++#define BCHP_HEVD_PCACHE_2_0_REG_START 0x00046800 ++#define BCHP_HEVD_PCACHE_2_0_REG_END 0x00046834 ++#define BCHP_HEVD_PFRI_2_0_REG_START 0x00046a00 ++#define BCHP_HEVD_PFRI_2_0_REG_END 0x00046b58 ++#define BCHP_RVC_2_0_REG_START 0x00046c00 ++#define BCHP_RVC_2_0_REG_END 0x00046c20 ++#define BCHP_ILS_REGS_2_0_REG_START 0x00047000 ++#define BCHP_ILS_REGS_2_0_REG_END 0x000470fc ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_START 0x00047100 ++#define BCHP_ILS_SCALE_ADDR_2_0_REG_END 0x0004710c ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_START 0x00047180 ++#define BCHP_ILS_SPSCALE_FILL_2_0_REG_END 0x00047184 ++#define BCHP_ILS_MVSCALE_2_0_REG_START 0x00047200 ++#define BCHP_ILS_MVSCALE_2_0_REG_END 0x0004738c ++#define BCHP_ILB_REGS_2_0_REG_START 0x00047400 ++#define BCHP_ILB_REGS_2_0_REG_END 0x00047410 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_START 0x00048100 ++#define BCHP_BLD_DECODE_MAIN_2_0_REG_END 0x000481fc ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_START 0x00048300 ++#define BCHP_BLD_DECODE_MCOM_2_0_REG_END 0x0004831c ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_START 0x00048320 ++#define BCHP_BLD_DECODE_SPRE_2_0_REG_END 0x0004833c ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_START 0x00048400 ++#define BCHP_BLD_DECODE_DQNT_2_0_REG_END 0x0004845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_START 0x00048500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_0_REG_END 0x0004857c ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_START 0x00048700 ++#define BCHP_BLD_DECODE_XFRM_2_0_REG_END 0x0004871c ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_START 0x00048720 ++#define BCHP_BLD_DECODE_DBLK_2_0_REG_END 0x0004873c ++#define BCHP_BLD_DECODE_MB_2_0_REG_START 0x00048740 ++#define BCHP_BLD_DECODE_MB_2_0_REG_END 0x0004875c ++#define BCHP_BLD_DECODE_SINT_2_0_REG_START 0x00048c00 ++#define BCHP_BLD_DECODE_SINT_2_0_REG_END 0x00048dfc ++#define BCHP_BLD_DECODE_RVC_2_0_REG_START 0x00048e00 ++#define BCHP_BLD_DECODE_RVC_2_0_REG_END 0x00048efc ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_START 0x0004c000 ++#define BCHP_BLD_BL_CPU_REGS_2_0_REG_END 0x0004c108 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_START 0x0004c400 ++#define BCHP_BLD_BL_CPU_DMA_2_0_REG_END 0x0004c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_START 0x0004c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_0_REG_END 0x0004cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_START 0x0004d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_0_REG_END 0x0004d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_START 0x00050000 ++#define BCHP_HEVD_IL_CPU_REGS_2_0_REG_END 0x00050108 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_START 0x00050400 ++#define BCHP_HEVD_IL_CPU_DMA_2_0_REG_END 0x00050440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_START 0x00050800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_0_REG_END 0x00050ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_START 0x00051000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_0_REG_END 0x0005100c ++#define BCHP_HEVD_IL_LDST_2_0_REG_START 0x00054000 ++#define BCHP_HEVD_IL_LDST_2_0_REG_END 0x00057ffc ++#define BCHP_HVD_INTR2_0_REG_START 0x00080000 ++#define BCHP_HVD_INTR2_0_REG_END 0x0008002c ++#define BCHP_HVD_RGR_0_REG_START 0x00080400 ++#define BCHP_HVD_RGR_0_REG_END 0x00080410 ++#define BCHP_VICH_0_REG_START 0x000a0000 ++#define BCHP_VICH_0_REG_END 0x000a008b ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_START 0x00100000 ++#define BCHP_HEVD_OL_CPU_REGS_1_REG_END 0x00100108 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_START 0x00100400 ++#define BCHP_HEVD_OL_CPU_DMA_1_REG_END 0x00100440 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_START 0x00100800 ++#define BCHP_HEVD_OL_CPU_DEBUG_1_REG_END 0x00100ffc ++#define BCHP_HEVD_OL_SINT_1_REG_START 0x00101000 ++#define BCHP_HEVD_OL_SINT_1_REG_END 0x00101028 ++#define BCHP_HEVD_OL_LDST_1_REG_START 0x00108000 ++#define BCHP_HEVD_OL_LDST_1_REG_END 0x0010fffc ++#define BCHP_REG_CABAC2BINS_1_REG_START 0x00110b00 ++#define BCHP_REG_CABAC2BINS_1_REG_END 0x00110bfc ++#define BCHP_REG_CABAC2BINS2_1_REG_START 0x00112400 ++#define BCHP_REG_CABAC2BINS2_1_REG_END 0x001127fc ++#define BCHP_HEVD_CABAC_1_REG_START 0x00113000 ++#define BCHP_HEVD_CABAC_1_REG_END 0x0011307c ++#define BCHP_HEVD_OL_CTL_1_REG_START 0x00114000 ++#define BCHP_HEVD_OL_CTL_1_REG_END 0x001151fc ++#define BCHP_DECODE_MAIN_1_REG_START 0x00120100 ++#define BCHP_DECODE_MAIN_1_REG_END 0x001201fc ++#define BCHP_DECODE_MCOM_1_REG_START 0x00120300 ++#define BCHP_DECODE_MCOM_1_REG_END 0x0012031c ++#define BCHP_DECODE_SPRE_1_REG_START 0x00120320 ++#define BCHP_DECODE_SPRE_1_REG_END 0x0012033c ++#define BCHP_DECODE_WPRD_1_REG_START 0x00120340 ++#define BCHP_DECODE_WPRD_1_REG_END 0x0012035c ++#define BCHP_DECODE_DQNT_1_REG_START 0x00120400 ++#define BCHP_DECODE_DQNT_1_REG_END 0x0012045c ++#define BCHP_DECODE_DQNT_8X8_1_REG_START 0x00120500 ++#define BCHP_DECODE_DQNT_8X8_1_REG_END 0x0012057c ++#define BCHP_DECODE_VP8_XFRM_1_REG_START 0x00120600 ++#define BCHP_DECODE_VP8_XFRM_1_REG_END 0x0012060c ++#define BCHP_DECODE_VP6_DCP_1_REG_START 0x00120620 ++#define BCHP_DECODE_VP6_DCP_1_REG_END 0x0012062c ++#define BCHP_DECODE_XFRM_1_REG_START 0x00120700 ++#define BCHP_DECODE_XFRM_1_REG_END 0x0012071c ++#define BCHP_DECODE_DBLK_1_REG_START 0x00120720 ++#define BCHP_DECODE_DBLK_1_REG_END 0x0012073c ++#define BCHP_DECODE_MB_1_REG_START 0x00120740 ++#define BCHP_DECODE_MB_1_REG_END 0x0012075c ++#define BCHP_DECODE_SINT_1_REG_START 0x00120c00 ++#define BCHP_DECODE_SINT_1_REG_END 0x00120dfc ++#define BCHP_DECODE_WPTBL_1_REG_START 0x00123000 ++#define BCHP_DECODE_WPTBL_1_REG_END 0x001231fc ++#define BCHP_HEVD_BE_GLOBAL_1_REG_START 0x00124000 ++#define BCHP_HEVD_BE_GLOBAL_1_REG_END 0x00124030 ++#define BCHP_HEVD_IXFORM_1_REG_START 0x00124100 ++#define BCHP_HEVD_IXFORM_1_REG_END 0x001241fc ++#define BCHP_HEVD_MCOMP_1_REG_START 0x00124200 ++#define BCHP_HEVD_MCOMP_1_REG_END 0x001242fc ++#define BCHP_HEVD_SPRED_1_REG_START 0x00124300 ++#define BCHP_HEVD_SPRED_1_REG_END 0x001243f0 ++#define BCHP_HEVD_FILTER_1_REG_START 0x00124400 ++#define BCHP_HEVD_FILTER_1_REG_END 0x001244fc ++#define BCHP_HEVD_OUTPUT_1_REG_START 0x00124500 ++#define BCHP_HEVD_OUTPUT_1_REG_END 0x001245fc ++#define BCHP_HEVD_MARKER_1_REG_START 0x00124f00 ++#define BCHP_HEVD_MARKER_1_REG_END 0x00124f7c ++#define BCHP_HEVD_FE_CTRL_1_REG_START 0x00125000 ++#define BCHP_HEVD_FE_CTRL_1_REG_END 0x00125048 ++#define BCHP_HEVD_STRM_IN_1_REG_START 0x00125100 ++#define BCHP_HEVD_STRM_IN_1_REG_END 0x00125118 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_START 0x00125200 ++#define BCHP_HEVD_CMDBUS_XMIT_1_REG_END 0x00125230 ++#define BCHP_HEVD_VECGEN_1_REG_START 0x00125400 ++#define BCHP_HEVD_VECGEN_1_REG_END 0x0012568c ++#define BCHP_DCD_PIPE_CTL_1_REG_START 0x00126000 ++#define BCHP_DCD_PIPE_CTL_1_REG_END 0x00126404 ++#define BCHP_HEVD_PCACHE_1_REG_START 0x00126800 ++#define BCHP_HEVD_PCACHE_1_REG_END 0x00126834 ++#define BCHP_HEVD_PFRI_1_REG_START 0x00126a00 ++#define BCHP_HEVD_PFRI_1_REG_END 0x00126b58 ++#define BCHP_RVC_1_REG_START 0x00126c00 ++#define BCHP_RVC_1_REG_END 0x00126c20 ++#define BCHP_ILS_REGS_1_REG_START 0x00127000 ++#define BCHP_ILS_REGS_1_REG_END 0x001270fc ++#define BCHP_ILS_SCALE_ADDR_1_REG_START 0x00127100 ++#define BCHP_ILS_SCALE_ADDR_1_REG_END 0x0012710c ++#define BCHP_ILS_SPSCALE_FILL_1_REG_START 0x00127180 ++#define BCHP_ILS_SPSCALE_FILL_1_REG_END 0x00127184 ++#define BCHP_ILS_MVSCALE_1_REG_START 0x00127200 ++#define BCHP_ILS_MVSCALE_1_REG_END 0x0012738c ++#define BCHP_ILB_REGS_1_REG_START 0x00127400 ++#define BCHP_ILB_REGS_1_REG_END 0x00127410 ++#define BCHP_BLD_DECODE_MAIN_1_REG_START 0x00128100 ++#define BCHP_BLD_DECODE_MAIN_1_REG_END 0x001281fc ++#define BCHP_BLD_DECODE_MCOM_1_REG_START 0x00128300 ++#define BCHP_BLD_DECODE_MCOM_1_REG_END 0x0012831c ++#define BCHP_BLD_DECODE_SPRE_1_REG_START 0x00128320 ++#define BCHP_BLD_DECODE_SPRE_1_REG_END 0x0012833c ++#define BCHP_BLD_DECODE_DQNT_1_REG_START 0x00128400 ++#define BCHP_BLD_DECODE_DQNT_1_REG_END 0x0012845c ++#define BCHP_BLD_DECODE_DQNT_8X8_1_REG_START 0x00128500 ++#define BCHP_BLD_DECODE_DQNT_8X8_1_REG_END 0x0012857c ++#define BCHP_BLD_DECODE_XFRM_1_REG_START 0x00128700 ++#define BCHP_BLD_DECODE_XFRM_1_REG_END 0x0012871c ++#define BCHP_BLD_DECODE_DBLK_1_REG_START 0x00128720 ++#define BCHP_BLD_DECODE_DBLK_1_REG_END 0x0012873c ++#define BCHP_BLD_DECODE_MB_1_REG_START 0x00128740 ++#define BCHP_BLD_DECODE_MB_1_REG_END 0x0012875c ++#define BCHP_BLD_DECODE_SINT_1_REG_START 0x00128c00 ++#define BCHP_BLD_DECODE_SINT_1_REG_END 0x00128dfc ++#define BCHP_BLD_DECODE_RVC_1_REG_START 0x00128e00 ++#define BCHP_BLD_DECODE_RVC_1_REG_END 0x00128efc ++#define BCHP_BLD_BL_CPU_REGS_1_REG_START 0x0012c000 ++#define BCHP_BLD_BL_CPU_REGS_1_REG_END 0x0012c108 ++#define BCHP_BLD_BL_CPU_DMA_1_REG_START 0x0012c400 ++#define BCHP_BLD_BL_CPU_DMA_1_REG_END 0x0012c440 ++#define BCHP_BLD_BL_CPU_DEBUG_1_REG_START 0x0012c800 ++#define BCHP_BLD_BL_CPU_DEBUG_1_REG_END 0x0012cffc ++#define BCHP_BLD_DECODE_IP_SHIM_1_REG_START 0x0012d000 ++#define BCHP_BLD_DECODE_IP_SHIM_1_REG_END 0x0012d090 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_START 0x00130000 ++#define BCHP_HEVD_IL_CPU_REGS_1_REG_END 0x00130108 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_START 0x00130400 ++#define BCHP_HEVD_IL_CPU_DMA_1_REG_END 0x00130440 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_START 0x00130800 ++#define BCHP_HEVD_IL_CPU_DEBUG_1_REG_END 0x00130ffc ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_START 0x00131000 ++#define BCHP_HEVD_IL_SLICE_DMA_1_REG_END 0x0013100c ++#define BCHP_HEVD_IL_LDST_1_REG_START 0x00134000 ++#define BCHP_HEVD_IL_LDST_1_REG_END 0x00137ffc ++#define BCHP_DECODE_MAIN_2_1_REG_START 0x00140100 ++#define BCHP_DECODE_MAIN_2_1_REG_END 0x001401fc ++#define BCHP_DECODE_MCOM_2_1_REG_START 0x00140300 ++#define BCHP_DECODE_MCOM_2_1_REG_END 0x0014031c ++#define BCHP_DECODE_SPRE_2_1_REG_START 0x00140320 ++#define BCHP_DECODE_SPRE_2_1_REG_END 0x0014033c ++#define BCHP_DECODE_WPRD_2_1_REG_START 0x00140340 ++#define BCHP_DECODE_WPRD_2_1_REG_END 0x0014035c ++#define BCHP_DECODE_DQNT_2_1_REG_START 0x00140400 ++#define BCHP_DECODE_DQNT_2_1_REG_END 0x0014045c ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_START 0x00140500 ++#define BCHP_DECODE_DQNT_8X8_2_1_REG_END 0x0014057c ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_START 0x00140600 ++#define BCHP_DECODE_VP8_XFRM_2_1_REG_END 0x0014060c ++#define BCHP_DECODE_VP6_DCP_2_1_REG_START 0x00140620 ++#define BCHP_DECODE_VP6_DCP_2_1_REG_END 0x0014062c ++#define BCHP_DECODE_XFRM_2_1_REG_START 0x00140700 ++#define BCHP_DECODE_XFRM_2_1_REG_END 0x0014071c ++#define BCHP_DECODE_DBLK_2_1_REG_START 0x00140720 ++#define BCHP_DECODE_DBLK_2_1_REG_END 0x0014073c ++#define BCHP_DECODE_MB_2_1_REG_START 0x00140740 ++#define BCHP_DECODE_MB_2_1_REG_END 0x0014075c ++#define BCHP_DECODE_SINT_2_1_REG_START 0x00140c00 ++#define BCHP_DECODE_SINT_2_1_REG_END 0x00140dfc ++#define BCHP_DECODE_WPTBL_2_1_REG_START 0x00143000 ++#define BCHP_DECODE_WPTBL_2_1_REG_END 0x001431fc ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_START 0x00144000 ++#define BCHP_HEVD_BE_GLOBAL_2_1_REG_END 0x00144030 ++#define BCHP_HEVD_IXFORM_2_1_REG_START 0x00144100 ++#define BCHP_HEVD_IXFORM_2_1_REG_END 0x001441fc ++#define BCHP_HEVD_MCOMP_2_1_REG_START 0x00144200 ++#define BCHP_HEVD_MCOMP_2_1_REG_END 0x001442fc ++#define BCHP_HEVD_SPRED_2_1_REG_START 0x00144300 ++#define BCHP_HEVD_SPRED_2_1_REG_END 0x001443f0 ++#define BCHP_HEVD_FILTER_2_1_REG_START 0x00144400 ++#define BCHP_HEVD_FILTER_2_1_REG_END 0x001444fc ++#define BCHP_HEVD_OUTPUT_2_1_REG_START 0x00144500 ++#define BCHP_HEVD_OUTPUT_2_1_REG_END 0x001445fc ++#define BCHP_HEVD_MARKER_2_1_REG_START 0x00144f00 ++#define BCHP_HEVD_MARKER_2_1_REG_END 0x00144f7c ++#define BCHP_HEVD_FE_CTRL_2_1_REG_START 0x00145000 ++#define BCHP_HEVD_FE_CTRL_2_1_REG_END 0x00145048 ++#define BCHP_HEVD_STRM_IN_2_1_REG_START 0x00145100 ++#define BCHP_HEVD_STRM_IN_2_1_REG_END 0x00145118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_START 0x00145200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_1_REG_END 0x00145230 ++#define BCHP_HEVD_VECGEN_2_1_REG_START 0x00145400 ++#define BCHP_HEVD_VECGEN_2_1_REG_END 0x0014568c ++#define BCHP_DCD_PIPE_CTL_2_1_REG_START 0x00146000 ++#define BCHP_DCD_PIPE_CTL_2_1_REG_END 0x00146404 ++#define BCHP_HEVD_PCACHE_2_1_REG_START 0x00146800 ++#define BCHP_HEVD_PCACHE_2_1_REG_END 0x00146834 ++#define BCHP_HEVD_PFRI_2_1_REG_START 0x00146a00 ++#define BCHP_HEVD_PFRI_2_1_REG_END 0x00146b58 ++#define BCHP_RVC_2_1_REG_START 0x00146c00 ++#define BCHP_RVC_2_1_REG_END 0x00146c20 ++#define BCHP_ILS_REGS_2_1_REG_START 0x00147000 ++#define BCHP_ILS_REGS_2_1_REG_END 0x001470fc ++#define BCHP_ILS_SCALE_ADDR_2_1_REG_START 0x00147100 ++#define BCHP_ILS_SCALE_ADDR_2_1_REG_END 0x0014710c ++#define BCHP_ILS_SPSCALE_FILL_2_1_REG_START 0x00147180 ++#define BCHP_ILS_SPSCALE_FILL_2_1_REG_END 0x00147184 ++#define BCHP_ILS_MVSCALE_2_1_REG_START 0x00147200 ++#define BCHP_ILS_MVSCALE_2_1_REG_END 0x0014738c ++#define BCHP_ILB_REGS_2_1_REG_START 0x00147400 ++#define BCHP_ILB_REGS_2_1_REG_END 0x00147410 ++#define BCHP_BLD_DECODE_MAIN_2_1_REG_START 0x00148100 ++#define BCHP_BLD_DECODE_MAIN_2_1_REG_END 0x001481fc ++#define BCHP_BLD_DECODE_MCOM_2_1_REG_START 0x00148300 ++#define BCHP_BLD_DECODE_MCOM_2_1_REG_END 0x0014831c ++#define BCHP_BLD_DECODE_SPRE_2_1_REG_START 0x00148320 ++#define BCHP_BLD_DECODE_SPRE_2_1_REG_END 0x0014833c ++#define BCHP_BLD_DECODE_DQNT_2_1_REG_START 0x00148400 ++#define BCHP_BLD_DECODE_DQNT_2_1_REG_END 0x0014845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_1_REG_START 0x00148500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_1_REG_END 0x0014857c ++#define BCHP_BLD_DECODE_XFRM_2_1_REG_START 0x00148700 ++#define BCHP_BLD_DECODE_XFRM_2_1_REG_END 0x0014871c ++#define BCHP_BLD_DECODE_DBLK_2_1_REG_START 0x00148720 ++#define BCHP_BLD_DECODE_DBLK_2_1_REG_END 0x0014873c ++#define BCHP_BLD_DECODE_MB_2_1_REG_START 0x00148740 ++#define BCHP_BLD_DECODE_MB_2_1_REG_END 0x0014875c ++#define BCHP_BLD_DECODE_SINT_2_1_REG_START 0x00148c00 ++#define BCHP_BLD_DECODE_SINT_2_1_REG_END 0x00148dfc ++#define BCHP_BLD_DECODE_RVC_2_1_REG_START 0x00148e00 ++#define BCHP_BLD_DECODE_RVC_2_1_REG_END 0x00148efc ++#define BCHP_BLD_BL_CPU_REGS_2_1_REG_START 0x0014c000 ++#define BCHP_BLD_BL_CPU_REGS_2_1_REG_END 0x0014c108 ++#define BCHP_BLD_BL_CPU_DMA_2_1_REG_START 0x0014c400 ++#define BCHP_BLD_BL_CPU_DMA_2_1_REG_END 0x0014c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_1_REG_START 0x0014c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_1_REG_END 0x0014cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_1_REG_START 0x0014d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_1_REG_END 0x0014d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_START 0x00150000 ++#define BCHP_HEVD_IL_CPU_REGS_2_1_REG_END 0x00150108 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_START 0x00150400 ++#define BCHP_HEVD_IL_CPU_DMA_2_1_REG_END 0x00150440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_START 0x00150800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_1_REG_END 0x00150ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_START 0x00151000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_1_REG_END 0x0015100c ++#define BCHP_HEVD_IL_LDST_2_1_REG_START 0x00154000 ++#define BCHP_HEVD_IL_LDST_2_1_REG_END 0x00157ffc ++#define BCHP_HVD_INTR2_1_REG_START 0x00180000 ++#define BCHP_HVD_INTR2_1_REG_END 0x0018002c ++#define BCHP_HVD_RGR_1_REG_START 0x00180400 ++#define BCHP_HVD_RGR_1_REG_END 0x00180410 ++#define BCHP_VICH_1_REG_START 0x001a0000 ++#define BCHP_VICH_1_REG_END 0x001a008b ++#define BCHP_HEVD_OL_CPU_REGS_2_REG_START 0x00200000 ++#define BCHP_HEVD_OL_CPU_REGS_2_REG_END 0x00200108 ++#define BCHP_HEVD_OL_CPU_DMA_2_REG_START 0x00200400 ++#define BCHP_HEVD_OL_CPU_DMA_2_REG_END 0x00200440 ++#define BCHP_HEVD_OL_CPU_DEBUG_2_REG_START 0x00200800 ++#define BCHP_HEVD_OL_CPU_DEBUG_2_REG_END 0x00200ffc ++#define BCHP_HEVD_OL_SINT_2_REG_START 0x00201000 ++#define BCHP_HEVD_OL_SINT_2_REG_END 0x00201028 ++#define BCHP_HEVD_OL_LDST_2_REG_START 0x00208000 ++#define BCHP_HEVD_OL_LDST_2_REG_END 0x0020fffc ++#define BCHP_REG_CABAC2BINS_2_REG_START 0x00210b00 ++#define BCHP_REG_CABAC2BINS_2_REG_END 0x00210bfc ++#define BCHP_REG_CABAC2BINS2_2_REG_START 0x00212400 ++#define BCHP_REG_CABAC2BINS2_2_REG_END 0x002127fc ++#define BCHP_HEVD_CABAC_2_REG_START 0x00213000 ++#define BCHP_HEVD_CABAC_2_REG_END 0x0021307c ++#define BCHP_HEVD_OL_CTL_2_REG_START 0x00214000 ++#define BCHP_HEVD_OL_CTL_2_REG_END 0x002151fc ++#define BCHP_DECODE_MAIN_2_REG_START 0x00220100 ++#define BCHP_DECODE_MAIN_2_REG_END 0x002201fc ++#define BCHP_DECODE_MCOM_2_REG_START 0x00220300 ++#define BCHP_DECODE_MCOM_2_REG_END 0x0022031c ++#define BCHP_DECODE_SPRE_2_REG_START 0x00220320 ++#define BCHP_DECODE_SPRE_2_REG_END 0x0022033c ++#define BCHP_DECODE_WPRD_2_REG_START 0x00220340 ++#define BCHP_DECODE_WPRD_2_REG_END 0x0022035c ++#define BCHP_DECODE_DQNT_2_REG_START 0x00220400 ++#define BCHP_DECODE_DQNT_2_REG_END 0x0022045c ++#define BCHP_DECODE_DQNT_8X8_2_REG_START 0x00220500 ++#define BCHP_DECODE_DQNT_8X8_2_REG_END 0x0022057c ++#define BCHP_DECODE_VP8_XFRM_2_REG_START 0x00220600 ++#define BCHP_DECODE_VP8_XFRM_2_REG_END 0x0022060c ++#define BCHP_DECODE_VP6_DCP_2_REG_START 0x00220620 ++#define BCHP_DECODE_VP6_DCP_2_REG_END 0x0022062c ++#define BCHP_DECODE_XFRM_2_REG_START 0x00220700 ++#define BCHP_DECODE_XFRM_2_REG_END 0x0022071c ++#define BCHP_DECODE_DBLK_2_REG_START 0x00220720 ++#define BCHP_DECODE_DBLK_2_REG_END 0x0022073c ++#define BCHP_DECODE_MB_2_REG_START 0x00220740 ++#define BCHP_DECODE_MB_2_REG_END 0x0022075c ++#define BCHP_DECODE_SINT_2_REG_START 0x00220c00 ++#define BCHP_DECODE_SINT_2_REG_END 0x00220dfc ++#define BCHP_DECODE_WPTBL_2_REG_START 0x00223000 ++#define BCHP_DECODE_WPTBL_2_REG_END 0x002231fc ++#define BCHP_HEVD_BE_GLOBAL_2_REG_START 0x00224000 ++#define BCHP_HEVD_BE_GLOBAL_2_REG_END 0x00224030 ++#define BCHP_HEVD_IXFORM_2_REG_START 0x00224100 ++#define BCHP_HEVD_IXFORM_2_REG_END 0x002241fc ++#define BCHP_HEVD_MCOMP_2_REG_START 0x00224200 ++#define BCHP_HEVD_MCOMP_2_REG_END 0x002242fc ++#define BCHP_HEVD_SPRED_2_REG_START 0x00224300 ++#define BCHP_HEVD_SPRED_2_REG_END 0x002243f0 ++#define BCHP_HEVD_FILTER_2_REG_START 0x00224400 ++#define BCHP_HEVD_FILTER_2_REG_END 0x002244fc ++#define BCHP_HEVD_OUTPUT_2_REG_START 0x00224500 ++#define BCHP_HEVD_OUTPUT_2_REG_END 0x002245fc ++#define BCHP_HEVD_MARKER_2_REG_START 0x00224f00 ++#define BCHP_HEVD_MARKER_2_REG_END 0x00224f7c ++#define BCHP_HEVD_FE_CTRL_2_REG_START 0x00225000 ++#define BCHP_HEVD_FE_CTRL_2_REG_END 0x00225048 ++#define BCHP_HEVD_STRM_IN_2_REG_START 0x00225100 ++#define BCHP_HEVD_STRM_IN_2_REG_END 0x00225118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_REG_START 0x00225200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_REG_END 0x00225230 ++#define BCHP_HEVD_VECGEN_2_REG_START 0x00225400 ++#define BCHP_HEVD_VECGEN_2_REG_END 0x0022568c ++#define BCHP_DCD_PIPE_CTL_2_REG_START 0x00226000 ++#define BCHP_DCD_PIPE_CTL_2_REG_END 0x00226404 ++#define BCHP_HEVD_PCACHE_2_REG_START 0x00226800 ++#define BCHP_HEVD_PCACHE_2_REG_END 0x00226834 ++#define BCHP_HEVD_PFRI_2_REG_START 0x00226a00 ++#define BCHP_HEVD_PFRI_2_REG_END 0x00226b58 ++#define BCHP_RVC_2_REG_START 0x00226c00 ++#define BCHP_RVC_2_REG_END 0x00226c20 ++#define BCHP_ILS_REGS_2_REG_START 0x00227000 ++#define BCHP_ILS_REGS_2_REG_END 0x002270fc ++#define BCHP_ILS_SCALE_ADDR_2_REG_START 0x00227100 ++#define BCHP_ILS_SCALE_ADDR_2_REG_END 0x0022710c ++#define BCHP_ILS_SPSCALE_FILL_2_REG_START 0x00227180 ++#define BCHP_ILS_SPSCALE_FILL_2_REG_END 0x00227184 ++#define BCHP_ILS_MVSCALE_2_REG_START 0x00227200 ++#define BCHP_ILS_MVSCALE_2_REG_END 0x0022738c ++#define BCHP_ILB_REGS_2_REG_START 0x00227400 ++#define BCHP_ILB_REGS_2_REG_END 0x00227410 ++#define BCHP_BLD_DECODE_MAIN_2_REG_START 0x00228100 ++#define BCHP_BLD_DECODE_MAIN_2_REG_END 0x002281fc ++#define BCHP_BLD_DECODE_MCOM_2_REG_START 0x00228300 ++#define BCHP_BLD_DECODE_MCOM_2_REG_END 0x0022831c ++#define BCHP_BLD_DECODE_SPRE_2_REG_START 0x00228320 ++#define BCHP_BLD_DECODE_SPRE_2_REG_END 0x0022833c ++#define BCHP_BLD_DECODE_DQNT_2_REG_START 0x00228400 ++#define BCHP_BLD_DECODE_DQNT_2_REG_END 0x0022845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_REG_START 0x00228500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_REG_END 0x0022857c ++#define BCHP_BLD_DECODE_XFRM_2_REG_START 0x00228700 ++#define BCHP_BLD_DECODE_XFRM_2_REG_END 0x0022871c ++#define BCHP_BLD_DECODE_DBLK_2_REG_START 0x00228720 ++#define BCHP_BLD_DECODE_DBLK_2_REG_END 0x0022873c ++#define BCHP_BLD_DECODE_MB_2_REG_START 0x00228740 ++#define BCHP_BLD_DECODE_MB_2_REG_END 0x0022875c ++#define BCHP_BLD_DECODE_SINT_2_REG_START 0x00228c00 ++#define BCHP_BLD_DECODE_SINT_2_REG_END 0x00228dfc ++#define BCHP_BLD_DECODE_RVC_2_REG_START 0x00228e00 ++#define BCHP_BLD_DECODE_RVC_2_REG_END 0x00228efc ++#define BCHP_BLD_BL_CPU_REGS_2_REG_START 0x0022c000 ++#define BCHP_BLD_BL_CPU_REGS_2_REG_END 0x0022c108 ++#define BCHP_BLD_BL_CPU_DMA_2_REG_START 0x0022c400 ++#define BCHP_BLD_BL_CPU_DMA_2_REG_END 0x0022c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_REG_START 0x0022c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_REG_END 0x0022cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_REG_START 0x0022d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_REG_END 0x0022d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_REG_START 0x00230000 ++#define BCHP_HEVD_IL_CPU_REGS_2_REG_END 0x00230108 ++#define BCHP_HEVD_IL_CPU_DMA_2_REG_START 0x00230400 ++#define BCHP_HEVD_IL_CPU_DMA_2_REG_END 0x00230440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_REG_START 0x00230800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_REG_END 0x00230ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_REG_START 0x00231000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_REG_END 0x0023100c ++#define BCHP_HEVD_IL_LDST_2_REG_START 0x00234000 ++#define BCHP_HEVD_IL_LDST_2_REG_END 0x00237ffc ++#define BCHP_DECODE_MAIN_2_2_REG_START 0x00240100 ++#define BCHP_DECODE_MAIN_2_2_REG_END 0x002401fc ++#define BCHP_DECODE_MCOM_2_2_REG_START 0x00240300 ++#define BCHP_DECODE_MCOM_2_2_REG_END 0x0024031c ++#define BCHP_DECODE_SPRE_2_2_REG_START 0x00240320 ++#define BCHP_DECODE_SPRE_2_2_REG_END 0x0024033c ++#define BCHP_DECODE_WPRD_2_2_REG_START 0x00240340 ++#define BCHP_DECODE_WPRD_2_2_REG_END 0x0024035c ++#define BCHP_DECODE_DQNT_2_2_REG_START 0x00240400 ++#define BCHP_DECODE_DQNT_2_2_REG_END 0x0024045c ++#define BCHP_DECODE_DQNT_8X8_2_2_REG_START 0x00240500 ++#define BCHP_DECODE_DQNT_8X8_2_2_REG_END 0x0024057c ++#define BCHP_DECODE_VP8_XFRM_2_2_REG_START 0x00240600 ++#define BCHP_DECODE_VP8_XFRM_2_2_REG_END 0x0024060c ++#define BCHP_DECODE_VP6_DCP_2_2_REG_START 0x00240620 ++#define BCHP_DECODE_VP6_DCP_2_2_REG_END 0x0024062c ++#define BCHP_DECODE_XFRM_2_2_REG_START 0x00240700 ++#define BCHP_DECODE_XFRM_2_2_REG_END 0x0024071c ++#define BCHP_DECODE_DBLK_2_2_REG_START 0x00240720 ++#define BCHP_DECODE_DBLK_2_2_REG_END 0x0024073c ++#define BCHP_DECODE_MB_2_2_REG_START 0x00240740 ++#define BCHP_DECODE_MB_2_2_REG_END 0x0024075c ++#define BCHP_DECODE_SINT_2_2_REG_START 0x00240c00 ++#define BCHP_DECODE_SINT_2_2_REG_END 0x00240dfc ++#define BCHP_DECODE_WPTBL_2_2_REG_START 0x00243000 ++#define BCHP_DECODE_WPTBL_2_2_REG_END 0x002431fc ++#define BCHP_HEVD_BE_GLOBAL_2_2_REG_START 0x00244000 ++#define BCHP_HEVD_BE_GLOBAL_2_2_REG_END 0x00244030 ++#define BCHP_HEVD_IXFORM_2_2_REG_START 0x00244100 ++#define BCHP_HEVD_IXFORM_2_2_REG_END 0x002441fc ++#define BCHP_HEVD_MCOMP_2_2_REG_START 0x00244200 ++#define BCHP_HEVD_MCOMP_2_2_REG_END 0x002442fc ++#define BCHP_HEVD_SPRED_2_2_REG_START 0x00244300 ++#define BCHP_HEVD_SPRED_2_2_REG_END 0x002443f0 ++#define BCHP_HEVD_FILTER_2_2_REG_START 0x00244400 ++#define BCHP_HEVD_FILTER_2_2_REG_END 0x002444fc ++#define BCHP_HEVD_OUTPUT_2_2_REG_START 0x00244500 ++#define BCHP_HEVD_OUTPUT_2_2_REG_END 0x002445fc ++#define BCHP_HEVD_MARKER_2_2_REG_START 0x00244f00 ++#define BCHP_HEVD_MARKER_2_2_REG_END 0x00244f7c ++#define BCHP_HEVD_FE_CTRL_2_2_REG_START 0x00245000 ++#define BCHP_HEVD_FE_CTRL_2_2_REG_END 0x00245048 ++#define BCHP_HEVD_STRM_IN_2_2_REG_START 0x00245100 ++#define BCHP_HEVD_STRM_IN_2_2_REG_END 0x00245118 ++#define BCHP_HEVD_CMDBUS_XMIT_2_2_REG_START 0x00245200 ++#define BCHP_HEVD_CMDBUS_XMIT_2_2_REG_END 0x00245230 ++#define BCHP_HEVD_VECGEN_2_2_REG_START 0x00245400 ++#define BCHP_HEVD_VECGEN_2_2_REG_END 0x0024568c ++#define BCHP_DCD_PIPE_CTL_2_2_REG_START 0x00246000 ++#define BCHP_DCD_PIPE_CTL_2_2_REG_END 0x00246404 ++#define BCHP_HEVD_PCACHE_2_2_REG_START 0x00246800 ++#define BCHP_HEVD_PCACHE_2_2_REG_END 0x00246834 ++#define BCHP_HEVD_PFRI_2_2_REG_START 0x00246a00 ++#define BCHP_HEVD_PFRI_2_2_REG_END 0x00246b58 ++#define BCHP_RVC_2_2_REG_START 0x00246c00 ++#define BCHP_RVC_2_2_REG_END 0x00246c20 ++#define BCHP_ILS_REGS_2_2_REG_START 0x00247000 ++#define BCHP_ILS_REGS_2_2_REG_END 0x002470fc ++#define BCHP_ILS_SCALE_ADDR_2_2_REG_START 0x00247100 ++#define BCHP_ILS_SCALE_ADDR_2_2_REG_END 0x0024710c ++#define BCHP_ILS_SPSCALE_FILL_2_2_REG_START 0x00247180 ++#define BCHP_ILS_SPSCALE_FILL_2_2_REG_END 0x00247184 ++#define BCHP_ILS_MVSCALE_2_2_REG_START 0x00247200 ++#define BCHP_ILS_MVSCALE_2_2_REG_END 0x0024738c ++#define BCHP_ILB_REGS_2_2_REG_START 0x00247400 ++#define BCHP_ILB_REGS_2_2_REG_END 0x00247410 ++#define BCHP_BLD_DECODE_MAIN_2_2_REG_START 0x00248100 ++#define BCHP_BLD_DECODE_MAIN_2_2_REG_END 0x002481fc ++#define BCHP_BLD_DECODE_MCOM_2_2_REG_START 0x00248300 ++#define BCHP_BLD_DECODE_MCOM_2_2_REG_END 0x0024831c ++#define BCHP_BLD_DECODE_SPRE_2_2_REG_START 0x00248320 ++#define BCHP_BLD_DECODE_SPRE_2_2_REG_END 0x0024833c ++#define BCHP_BLD_DECODE_DQNT_2_2_REG_START 0x00248400 ++#define BCHP_BLD_DECODE_DQNT_2_2_REG_END 0x0024845c ++#define BCHP_BLD_DECODE_DQNT_8X8_2_2_REG_START 0x00248500 ++#define BCHP_BLD_DECODE_DQNT_8X8_2_2_REG_END 0x0024857c ++#define BCHP_BLD_DECODE_XFRM_2_2_REG_START 0x00248700 ++#define BCHP_BLD_DECODE_XFRM_2_2_REG_END 0x0024871c ++#define BCHP_BLD_DECODE_DBLK_2_2_REG_START 0x00248720 ++#define BCHP_BLD_DECODE_DBLK_2_2_REG_END 0x0024873c ++#define BCHP_BLD_DECODE_MB_2_2_REG_START 0x00248740 ++#define BCHP_BLD_DECODE_MB_2_2_REG_END 0x0024875c ++#define BCHP_BLD_DECODE_SINT_2_2_REG_START 0x00248c00 ++#define BCHP_BLD_DECODE_SINT_2_2_REG_END 0x00248dfc ++#define BCHP_BLD_DECODE_RVC_2_2_REG_START 0x00248e00 ++#define BCHP_BLD_DECODE_RVC_2_2_REG_END 0x00248efc ++#define BCHP_BLD_BL_CPU_REGS_2_2_REG_START 0x0024c000 ++#define BCHP_BLD_BL_CPU_REGS_2_2_REG_END 0x0024c108 ++#define BCHP_BLD_BL_CPU_DMA_2_2_REG_START 0x0024c400 ++#define BCHP_BLD_BL_CPU_DMA_2_2_REG_END 0x0024c440 ++#define BCHP_BLD_BL_CPU_DEBUG_2_2_REG_START 0x0024c800 ++#define BCHP_BLD_BL_CPU_DEBUG_2_2_REG_END 0x0024cffc ++#define BCHP_BLD_DECODE_IP_SHIM_2_2_REG_START 0x0024d000 ++#define BCHP_BLD_DECODE_IP_SHIM_2_2_REG_END 0x0024d090 ++#define BCHP_HEVD_IL_CPU_REGS_2_2_REG_START 0x00250000 ++#define BCHP_HEVD_IL_CPU_REGS_2_2_REG_END 0x00250108 ++#define BCHP_HEVD_IL_CPU_DMA_2_2_REG_START 0x00250400 ++#define BCHP_HEVD_IL_CPU_DMA_2_2_REG_END 0x00250440 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_2_REG_START 0x00250800 ++#define BCHP_HEVD_IL_CPU_DEBUG_2_2_REG_END 0x00250ffc ++#define BCHP_HEVD_IL_SLICE_DMA_2_2_REG_START 0x00251000 ++#define BCHP_HEVD_IL_SLICE_DMA_2_2_REG_END 0x0025100c ++#define BCHP_HEVD_IL_LDST_2_2_REG_START 0x00254000 ++#define BCHP_HEVD_IL_LDST_2_2_REG_END 0x00257ffc ++#define BCHP_HVD_INTR2_2_REG_START 0x00280000 ++#define BCHP_HVD_INTR2_2_REG_END 0x0028002c ++#define BCHP_HVD_RGR_2_REG_START 0x00280400 ++#define BCHP_HVD_RGR_2_REG_END 0x00280410 ++#define BCHP_VICH_2_REG_START 0x002a0000 ++#define BCHP_VICH_2_REG_END 0x002a008b ++#define BCHP_SCPU_LOCALRAM_REG_START 0x00300000 ++#define BCHP_SCPU_LOCALRAM_REG_END 0x0030fffc ++#define BCHP_SCPU_GLOBALRAM_REG_START 0x00310000 ++#define BCHP_SCPU_GLOBALRAM_REG_END 0x003103fc ++#define BCHP_SCPU_MISB_BRIDGE_REG_START 0x00310400 ++#define BCHP_SCPU_MISB_BRIDGE_REG_END 0x00310450 ++#define BCHP_SCPU_RGR_BRIDGE_REG_START 0x00310460 ++#define BCHP_SCPU_RGR_BRIDGE_REG_END 0x00310470 ++#define BCHP_SCPU_INTR1_REG_START 0x00310480 ++#define BCHP_SCPU_INTR1_REG_END 0x00310498 ++#define BCHP_INTERNAL_INTR2_REG_START 0x003104c0 ++#define BCHP_INTERNAL_INTR2_REG_END 0x003104ec ++#define BCHP_BSP_IPI_INTR2_REG_START 0x00310500 ++#define BCHP_BSP_IPI_INTR2_REG_END 0x0031052c ++#define BCHP_SCPU_HW_INTR2_REG_START 0x00310540 ++#define BCHP_SCPU_HW_INTR2_REG_END 0x0031056c ++#define BCHP_CPU_IPI_INTR2_REG_START 0x00311000 ++#define BCHP_CPU_IPI_INTR2_REG_END 0x0031102c ++#define BCHP_SCPU_HOST_INTR2_REG_START 0x00311040 ++#define BCHP_SCPU_HOST_INTR2_REG_END 0x0031106c ++#define BCHP_SCPU_TOP_CTRL_REG_START 0x00312000 ++#define BCHP_SCPU_TOP_CTRL_REG_END 0x00312008 ++#define BCHP_SCPU_HDMI_CTRL_REG_START 0x00312080 ++#define BCHP_SCPU_HDMI_CTRL_REG_END 0x00312084 ++#define BCHP_SCPU_SEC_TIME_REG_START 0x00312100 ++#define BCHP_SCPU_SEC_TIME_REG_END 0x00312114 ++#define BCHP_SAGE_UART_REG_START 0x00312200 ++#define BCHP_SAGE_UART_REG_END 0x0031221c ++#define BCHP_SCPU_PM_REG_START 0x00312980 ++#define BCHP_SCPU_PM_REG_END 0x00312988 ++#define BCHP_SCPU_TIMER_REG_START 0x00312e80 ++#define BCHP_SCPU_TIMER_REG_END 0x00312ebc ++#define BCHP_BSP_CMDBUF_REG_START 0x0032c800 ++#define BCHP_BSP_CMDBUF_REG_END 0x0032cffc ++#define BCHP_BSP_GLB_CONTROL_REG_START 0x0032d000 ++#define BCHP_BSP_GLB_CONTROL_REG_END 0x0032d0b0 ++#define BCHP_BSP_PKL_REG_START 0x0032d300 ++#define BCHP_BSP_PKL_REG_END 0x0032d37c ++#define BCHP_BSP_CONTROL_INTR2_REG_START 0x0032d800 ++#define BCHP_BSP_CONTROL_INTR2_REG_END 0x0032d82c ++#define BCHP_BSP_VISTA_GENACC_REG_START 0x0032d900 ++#define BCHP_BSP_VISTA_GENACC_REG_END 0x0032d9fc ++#define BCHP_BSP_OTP_SCRATCH_REG_START 0x0032e000 ++#define BCHP_BSP_OTP_SCRATCH_REG_END 0x0032fffc ++#define BCHP_XPT_SECURITY_REG_START 0x00360000 ++#define BCHP_XPT_SECURITY_REG_END 0x0037fffc ++#define BCHP_SECTOP_GRB_REG_START 0x00380000 ++#define BCHP_SECTOP_GRB_REG_END 0x0038000c ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_START 0x00380080 ++#define BCHP_XPT_SECURITY_NS_INTR2_0_REG_END 0x003800ac ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_START 0x00380100 ++#define BCHP_XPT_SECURITY_NS_INTR2_1_REG_END 0x0038012c ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_START 0x00380180 ++#define BCHP_XPT_SECURITY_NS_INTR2_2_REG_END 0x003801ac ++#define BCHP_XPT_SECURITY_NS_REG_START 0x00380200 ++#define BCHP_XPT_SECURITY_NS_REG_END 0x003802c8 ++#define BCHP_S_MEMC_0_REG_START 0x003bc000 ++#define BCHP_S_MEMC_0_REG_END 0x003bc780 ++#define BCHP_S_MEMC_1_REG_START 0x003cc000 ++#define BCHP_S_MEMC_1_REG_END 0x003cc780 ++#define BCHP_S_MEMC_2_REG_START 0x003dc000 ++#define BCHP_S_MEMC_2_REG_END 0x003dc780 ++#define BCHP_SDIO_0_HOST_REG_START 0x003e0000 ++#define BCHP_SDIO_0_HOST_REG_END 0x003e00fc ++#define BCHP_SDIO_0_CFG_REG_START 0x003e0100 ++#define BCHP_SDIO_0_CFG_REG_END 0x003e01fc ++#define BCHP_SDIO_1_HOST_REG_START 0x003e0200 ++#define BCHP_SDIO_1_HOST_REG_END 0x003e02fc ++#define BCHP_SDIO_1_CFG_REG_START 0x003e0300 ++#define BCHP_SDIO_1_CFG_REG_END 0x003e03fc ++#define BCHP_SDIO_1_BOOT_REG_START 0x003e0400 ++#define BCHP_SDIO_1_BOOT_REG_END 0x003e043c ++#define BCHP_EBI_REG_START 0x003e0800 ++#define BCHP_EBI_REG_END 0x003e0bfc ++#define BCHP_HIF_INTR2_REG_START 0x003e1000 ++#define BCHP_HIF_INTR2_REG_END 0x003e102c ++#define BCHP_HIF_CPU_INTR1_REG_START 0x003e1500 ++#define BCHP_HIF_CPU_INTR1_REG_END 0x003e154c ++#define BCHP_PCI_PCIE_INTR1_REG_START 0x003e1600 ++#define BCHP_PCI_PCIE_INTR1_REG_END 0x003e164c ++#define BCHP_HIF_RGR2_REG_START 0x003e1700 ++#define BCHP_HIF_RGR2_REG_END 0x003e1710 ++#define BCHP_HIF_SPI_INTR2_REG_START 0x003e1a00 ++#define BCHP_HIF_SPI_INTR2_REG_END 0x003e1a2c ++#define BCHP_HIF_TOP_CTRL_REG_START 0x003e2000 ++#define BCHP_HIF_TOP_CTRL_REG_END 0x003e203c ++#define BCHP_WEBHIF_L1_MASK_REG_START 0x003e2100 ++#define BCHP_WEBHIF_L1_MASK_REG_END 0x003e2110 ++#define BCHP_HIF_CPUBIUARCH_REG_START 0x003e2200 ++#define BCHP_HIF_CPUBIUARCH_REG_END 0x003e23fc ++#define BCHP_HIF_CPUBIUCTRL_REG_START 0x003e2400 ++#define BCHP_HIF_CPUBIUCTRL_REG_END 0x003e27fc ++#define BCHP_NAND_REG_START 0x003e2800 ++#define BCHP_NAND_REG_END 0x003e2dfc ++#define BCHP_FLASH_DMA_REG_START 0x003e3000 ++#define BCHP_FLASH_DMA_REG_END 0x003e3028 ++#define BCHP_BSPI_REG_START 0x003e3200 ++#define BCHP_BSPI_REG_END 0x003e324c ++#define BCHP_BSPI_RAF_REG_START 0x003e3300 ++#define BCHP_BSPI_RAF_REG_END 0x003e3320 ++#define BCHP_HIF_MSPI_REG_START 0x003e3400 ++#define BCHP_HIF_MSPI_REG_END 0x003e3584 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_START 0x003e3600 ++#define BCHP_HIF_CONTINUATION_SECURE_TM_REG_END 0x003e3604 ++#define BCHP_IPI0_INTR2_REG_START 0x003e4000 ++#define BCHP_IPI0_INTR2_REG_END 0x003e402c ++#define BCHP_IPI1_INTR2_REG_START 0x003e4100 ++#define BCHP_IPI1_INTR2_REG_END 0x003e412c ++#define BCHP_IPI2_INTR2_REG_START 0x003e4200 ++#define BCHP_IPI2_INTR2_REG_END 0x003e422c ++#define BCHP_IPI3_INTR2_REG_START 0x003e4300 ++#define BCHP_IPI3_INTR2_REG_END 0x003e432c ++#define BCHP_BOOTSRAM_TM_REG_START 0x003f0000 ++#define BCHP_BOOTSRAM_TM_REG_END 0x003ffffc ++#define BCHP_SUN_GISB_ARB_REG_START 0x00400000 ++#define BCHP_SUN_GISB_ARB_REG_END 0x004007fc ++#define BCHP_SUN_GR_REG_START 0x00401000 ++#define BCHP_SUN_GR_REG_END 0x0040100c ++#define BCHP_SSP_RG_REG_START 0x00401200 ++#define BCHP_SSP_RG_REG_END 0x0040120c ++#define BCHP_SUN_RG_REG_START 0x00401400 ++#define BCHP_SUN_RG_REG_END 0x0040140c ++#define BCHP_TPCAP_REG_START 0x00401800 ++#define BCHP_TPCAP_REG_END 0x0040189c ++#define BCHP_SM_L2_REG_START 0x00402000 ++#define BCHP_SM_L2_REG_END 0x0040202c ++#define BCHP_SM_REG_START 0x00402400 ++#define BCHP_SM_REG_END 0x00402424 ++#define BCHP_SM_FAST_REG_START 0x00402800 ++#define BCHP_SM_FAST_REG_END 0x00402818 ++#define BCHP_SUN_L2_REG_START 0x00403000 ++#define BCHP_SUN_L2_REG_END 0x00403044 ++#define BCHP_SUN_TOP_CTRL_REG_START 0x00404000 ++#define BCHP_SUN_TOP_CTRL_REG_END 0x00404518 ++#define BCHP_BBSI_RG_REG_START 0x00405c00 ++#define BCHP_BBSI_RG_REG_END 0x00405c0c ++#define BCHP_PWM_REG_START 0x00408000 ++#define BCHP_PWM_REG_END 0x00408024 ++#define BCHP_PWMB_REG_START 0x00409000 ++#define BCHP_PWMB_REG_END 0x00409024 ++#define BCHP_IRB_REG_START 0x0040a000 ++#define BCHP_IRB_REG_END 0x0040a138 ++#define BCHP_PM_REG_START 0x0040a180 ++#define BCHP_PM_REG_END 0x0040a18c ++#define BCHP_BSCA_REG_START 0x0040a200 ++#define BCHP_BSCA_REG_END 0x0040a254 ++#define BCHP_BSCD_REG_START 0x0040a280 ++#define BCHP_BSCD_REG_END 0x0040a2d4 ++#define BCHP_BSCE_REG_START 0x0040a300 ++#define BCHP_BSCE_REG_END 0x0040a354 ++#define BCHP_GIO_REG_START 0x0040a700 ++#define BCHP_GIO_REG_END 0x0040a77c ++#define BCHP_IRQ0_REG_START 0x0040a780 ++#define BCHP_IRQ0_REG_END 0x0040a784 ++#define BCHP_IRQ1_REG_START 0x0040a788 ++#define BCHP_IRQ1_REG_END 0x0040a78c ++#define BCHP_TIMER_REG_START 0x0040a7c0 ++#define BCHP_TIMER_REG_END 0x0040a7fc ++#define BCHP_UARTA_REG_START 0x0040ab00 ++#define BCHP_UARTA_REG_END 0x0040ab1c ++#define BCHP_UARTB_REG_START 0x0040ab40 ++#define BCHP_UARTB_REG_END 0x0040ab5c ++#define BCHP_UARTC_REG_START 0x0040ab80 ++#define BCHP_UARTC_REG_END 0x0040ab9c ++#define BCHP_SCA_REG_START 0x0040ac00 ++#define BCHP_SCA_REG_END 0x0040acbc ++#define BCHP_SCB_REG_START 0x0040ad00 ++#define BCHP_SCB_REG_END 0x0040adbc ++#define BCHP_SCIRQ0_REG_START 0x0040ae40 ++#define BCHP_SCIRQ0_REG_END 0x0040ae44 ++#define BCHP_SCIRQ1_REG_START 0x0040ae48 ++#define BCHP_SCIRQ1_REG_END 0x0040ae4c ++#define BCHP_SCIRQ_SCPU_REG_START 0x0040ae50 ++#define BCHP_SCIRQ_SCPU_REG_END 0x0040ae54 ++#define BCHP_MCIF_REG_START 0x0040b000 ++#define BCHP_MCIF_REG_END 0x0040b028 ++#define BCHP_MCIF1_REG_START 0x0040b040 ++#define BCHP_MCIF1_REG_END 0x0040b068 ++#define BCHP_MCIF_INTR2_REG_START 0x0040b080 ++#define BCHP_MCIF_INTR2_REG_END 0x0040b0c4 ++#define BCHP_TMON_REG_START 0x0040b100 ++#define BCHP_TMON_REG_END 0x0040b154 ++#define BCHP_UPG_AUX_INTR2_REG_START 0x0040b180 ++#define BCHP_UPG_AUX_INTR2_REG_END 0x0040b1ac ++#define BCHP_CTK_REG_START 0x0040b200 ++#define BCHP_CTK_REG_END 0x0040b378 ++#define BCHP_UPG_UART_DMA_REG_START 0x0040b600 ++#define BCHP_UPG_UART_DMA_REG_END 0x0040b630 ++#define BCHP_AON_CTRL_REG_START 0x00410000 ++#define BCHP_AON_CTRL_REG_END 0x004105fc ++#define BCHP_AON_L2_REG_START 0x00410600 ++#define BCHP_AON_L2_REG_END 0x0041062c ++#define BCHP_AON_PM_L2_REG_START 0x00410640 ++#define BCHP_AON_PM_L2_REG_END 0x0041066c ++#define BCHP_AON_PIN_CTRL_REG_START 0x00410700 ++#define BCHP_AON_PIN_CTRL_REG_END 0x00410714 ++#define BCHP_AON_HDMI_TX_REG_START 0x00410800 ++#define BCHP_AON_HDMI_TX_REG_END 0x004108ac ++#define BCHP_AON_HDMI_RX_REG_START 0x00411000 ++#define BCHP_AON_HDMI_RX_REG_END 0x004110d4 ++#define BCHP_CNTControlBase_REG_START 0x00412000 ++#define BCHP_CNTControlBase_REG_END 0x00412ffc ++#define BCHP_CNTReadBase_REG_START 0x00414000 ++#define BCHP_CNTReadBase_REG_END 0x00414ffc ++#define BCHP_MSPI_REG_START 0x00416000 ++#define BCHP_MSPI_REG_END 0x0041617c ++#define BCHP_LDK_REG_START 0x00417000 ++#define BCHP_LDK_REG_END 0x0041703c ++#define BCHP_PM_AON_REG_START 0x00417040 ++#define BCHP_PM_AON_REG_END 0x00417048 ++#define BCHP_ICAP_REG_START 0x00417080 ++#define BCHP_ICAP_REG_END 0x004170bc ++#define BCHP_KBD1_REG_START 0x004170c0 ++#define BCHP_KBD1_REG_END 0x004170fc ++#define BCHP_KBD2_REG_START 0x00417100 ++#define BCHP_KBD2_REG_END 0x0041713c ++#define BCHP_KBD3_REG_START 0x00417140 ++#define BCHP_KBD3_REG_END 0x0041717c ++#define BCHP_BSCB_REG_START 0x00417180 ++#define BCHP_BSCB_REG_END 0x004171d4 ++#define BCHP_BSCC_REG_START 0x00417200 ++#define BCHP_BSCC_REG_END 0x00417254 ++#define BCHP_IRQ0_AON_REG_START 0x00417280 ++#define BCHP_IRQ0_AON_REG_END 0x00417284 ++#define BCHP_IRQ1_AON_REG_START 0x00417288 ++#define BCHP_IRQ1_AON_REG_END 0x0041728c ++#define BCHP_GIO_AON_REG_START 0x004172c0 ++#define BCHP_GIO_AON_REG_END 0x004172fc ++#define BCHP_BICAP_REG_START 0x00417500 ++#define BCHP_BICAP_REG_END 0x00417538 ++#define BCHP_UPG_AUX_AON_INTR2_REG_START 0x00417540 ++#define BCHP_UPG_AUX_AON_INTR2_REG_END 0x0041756c ++#define BCHP_WKTMR_REG_START 0x00417580 ++#define BCHP_WKTMR_REG_END 0x00417590 ++#define BCHP_SYS_GISB_ARB_SEC_REG_START 0x0041e000 ++#define BCHP_SYS_GISB_ARB_SEC_REG_END 0x0041e7fc ++#define BCHP_SYS_TOP_CTRL_SEC_REG_START 0x0041e800 ++#define BCHP_SYS_TOP_CTRL_SEC_REG_END 0x0041e808 ++#define BCHP_AON_CTRL_SECURE_REG_START 0x0041e900 ++#define BCHP_AON_CTRL_SECURE_REG_END 0x0041e97c ++#define BCHP_BOOTSRAM_SECURE_REG_START 0x00420000 ++#define BCHP_BOOTSRAM_SECURE_REG_END 0x0042fffc ++#define BCHP_ITCH0_REG_START 0x00430000 ++#define BCHP_ITCH0_REG_END 0x00430000 ++#define BCHP_HIF_SECURE_CTRL_REG_START 0x00430400 ++#define BCHP_HIF_SECURE_CTRL_REG_END 0x00430400 ++#define BCHP_HIF_SECURE_BSPI_REG_START 0x00430500 ++#define BCHP_HIF_SECURE_BSPI_REG_END 0x00430500 ++#define BCHP_HIF_SECURE_LR_SPI_REG_START 0x00430600 ++#define BCHP_HIF_SECURE_LR_SPI_REG_END 0x00430600 ++#define BCHP_NAND_SECURE_REG_START 0x00430800 ++#define BCHP_NAND_SECURE_REG_END 0x00430800 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_START 0x00430c00 ++#define BCHP_HIF_SECURE_INDIRECT_MSPI_PIPE_REG_END 0x00430c00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_START 0x00430e00 ++#define BCHP_HIF_CPUBIUARCH_SECURE_REG_END 0x00430ffc ++#define BCHP_HIF_CONTINUATION_SECURE_REG_START 0x00431000 ++#define BCHP_HIF_CONTINUATION_SECURE_REG_END 0x00431004 ++#define BCHP_ITCH1_REG_START 0x00431200 ++#define BCHP_ITCH1_REG_END 0x00431200 ++#define BCHP_HIF_CONTINUATION_REG_START 0x00452000 ++#define BCHP_HIF_CONTINUATION_REG_END 0x004520fc ++#define BCHP_WEBHIF_CONTINUATION_REG_START 0x00452800 ++#define BCHP_WEBHIF_CONTINUATION_REG_END 0x00452814 ++#define BCHP_WEBHIF_RGR1_REG_START 0x00454000 ++#define BCHP_WEBHIF_RGR1_REG_END 0x00454010 ++#define BCHP_WEBHIF_INTR2_REG_START 0x00454100 ++#define BCHP_WEBHIF_INTR2_REG_END 0x0045412c ++#define BCHP_WEBHIF_CPU_INTR1_REG_START 0x00454600 ++#define BCHP_WEBHIF_CPU_INTR1_REG_END 0x0045464c ++#define BCHP_WEBHIF_SCRATCH_REG_START 0x00454800 ++#define BCHP_WEBHIF_SCRATCH_REG_END 0x0045481c ++#define BCHP_WEBHIF_TIMER_REG_START 0x00454900 ++#define BCHP_WEBHIF_TIMER_REG_END 0x0045493c ++#define BCHP_WEBHIF_TOP_CTRL_REG_START 0x00454a00 ++#define BCHP_WEBHIF_TOP_CTRL_REG_END 0x00454a08 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_START 0x00455000 ++#define BCHP_WEBHIF_IPI0_INTR2_REG_END 0x0045502c ++#define BCHP_WEBHIF_IPI1_INTR2_REG_START 0x00455100 ++#define BCHP_WEBHIF_IPI1_INTR2_REG_END 0x0045512c ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_START 0x00456000 ++#define BCHP_WEBHIF_STB_IPI0_INTR2_REG_END 0x0045602c ++#define BCHP_WEBHIF_STB_IPI1_INTR2_REG_START 0x00456100 ++#define BCHP_WEBHIF_STB_IPI1_INTR2_REG_END 0x0045612c ++#define BCHP_SATA_GRB_REG_START 0x00458000 ++#define BCHP_SATA_GRB_REG_END 0x0045800c ++#define BCHP_SATA_TOP_CTRL_REG_START 0x00458040 ++#define BCHP_SATA_TOP_CTRL_REG_END 0x00458060 ++#define BCHP_SATA3_INTR2_REG_START 0x00458080 ++#define BCHP_SATA3_INTR2_REG_END 0x004580ac ++#define BCHP_PORT0_SATA3_PCB_REG_START 0x00458100 ++#define BCHP_PORT0_SATA3_PCB_REG_END 0x00458ffc ++#define BCHP_PORT1_SATA3_PCB_REG_START 0x00459100 ++#define BCHP_PORT1_SATA3_PCB_REG_END 0x00459ffc ++#define BCHP_SATA_AHCI_GHC_REG_START 0x0045a000 ++#define BCHP_SATA_AHCI_GHC_REG_END 0x0045a028 ++#define BCHP_SATA_GLOBAL_RESERVED_REG_START 0x0045a02c ++#define BCHP_SATA_GLOBAL_RESERVED_REG_END 0x0045a09c ++#define BCHP_SATA_PORT0_AHCI_S1_REG_START 0x0045a100 ++#define BCHP_SATA_PORT0_AHCI_S1_REG_END 0x0045a11c ++#define BCHP_SATA_PORT0_AHCI_S2_REG_START 0x0045a120 ++#define BCHP_SATA_PORT0_AHCI_S2_REG_END 0x0045a134 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_START 0x0045a138 ++#define BCHP_SATA_PORT0_AHCI_S3_REG_END 0x0045a17c ++#define BCHP_SATA_PORT1_AHCI_S1_REG_START 0x0045a180 ++#define BCHP_SATA_PORT1_AHCI_S1_REG_END 0x0045a19c ++#define BCHP_SATA_PORT1_AHCI_S2_REG_START 0x0045a1a0 ++#define BCHP_SATA_PORT1_AHCI_S2_REG_END 0x0045a1b4 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_START 0x0045a1b8 ++#define BCHP_SATA_PORT1_AHCI_S3_REG_END 0x0045a1fc ++#define BCHP_SATA_AHCI_PCICFG_REG_START 0x0045a600 ++#define BCHP_SATA_AHCI_PCICFG_REG_END 0x0045a664 ++#define BCHP_SATA_PORT0_CTRL_REG_START 0x0045a700 ++#define BCHP_SATA_PORT0_CTRL_REG_END 0x0045a730 ++#define BCHP_SATA_PORT0_CJPAT_REG_START 0x0045a740 ++#define BCHP_SATA_PORT0_CJPAT_REG_END 0x0045a764 ++#define BCHP_SATA_PORT1_CTRL_REG_START 0x0045a780 ++#define BCHP_SATA_PORT1_CTRL_REG_END 0x0045a7b0 ++#define BCHP_SATA_PORT1_CJPAT_REG_START 0x0045a7c0 ++#define BCHP_SATA_PORT1_CJPAT_REG_END 0x0045a7e4 ++#define BCHP_SATA_LEG_PCICFG_REG_START 0x0045a800 ++#define BCHP_SATA_LEG_PCICFG_REG_END 0x0045a880 ++#define BCHP_SATA_PORT0_LEG_S1_REG_START 0x0045a900 ++#define BCHP_SATA_PORT0_LEG_S1_REG_END 0x0045a934 ++#define BCHP_SATA_PORT0_LEG_S2_REG_START 0x0045a940 ++#define BCHP_SATA_PORT0_LEG_S2_REG_END 0x0045a954 ++#define BCHP_SATA_PORT0_LEG_S3_REG_START 0x0045a958 ++#define BCHP_SATA_PORT0_LEG_S3_REG_END 0x0045a998 ++#define BCHP_SATA_PORT1_LEG_S1_REG_START 0x0045aa00 ++#define BCHP_SATA_PORT1_LEG_S1_REG_END 0x0045aa34 ++#define BCHP_SATA_PORT1_LEG_S2_REG_START 0x0045aa40 ++#define BCHP_SATA_PORT1_LEG_S2_REG_END 0x0045aa54 ++#define BCHP_SATA_PORT1_LEG_S3_REG_START 0x0045aa58 ++#define BCHP_SATA_PORT1_LEG_S3_REG_END 0x0045aa98 ++#define BCHP_RFM_SYSCLK_REG_START 0x0045c000 ++#define BCHP_RFM_SYSCLK_REG_END 0x0045c124 ++#define BCHP_RFM_CLK27_REG_START 0x0045c000 ++#define BCHP_RFM_CLK27_REG_END 0x0045c470 ++#define BCHP_RFM_L2_REG_START 0x0045cc00 ++#define BCHP_RFM_L2_REG_END 0x0045cc2c ++#define BCHP_RFM_GRB_REG_START 0x0045d000 ++#define BCHP_RFM_GRB_REG_END 0x0045d00c ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_START 0x00460000 ++#define BCHP_PCIE_0_RC_CFG_TYPE1_REG_END 0x0046003c ++#define BCHP_PCIE_0_RC_CFG_PM_REG_START 0x00460048 ++#define BCHP_PCIE_0_RC_CFG_PM_REG_END 0x0046004c ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_START 0x004600ac ++#define BCHP_PCIE_0_RC_CFG_PCIE_REG_END 0x004600e4 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_START 0x00460100 ++#define BCHP_PCIE_0_RC_CFG_AER_REG_END 0x00460134 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_START 0x00460160 ++#define BCHP_PCIE_0_RC_CFG_VC_REG_END 0x00460178 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_START 0x00460180 ++#define BCHP_PCIE_0_RC_CFG_VENDOR_REG_END 0x004601a4 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_START 0x00460404 ++#define BCHP_PCIE_0_RC_CFG_PRIV0_REG_END 0x00460418 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_START 0x00460428 ++#define BCHP_PCIE_0_RC_CFG_PRIV1_REG_END 0x00460630 ++#define BCHP_PCIE_0_RC_TL_REG_START 0x00460800 ++#define BCHP_PCIE_0_RC_TL_REG_END 0x00460998 ++#define BCHP_PCIE_0_RC_DL_REG_START 0x00461000 ++#define BCHP_PCIE_0_RC_DL_REG_END 0x00461424 ++#define BCHP_PCIE_0_RC_PL_REG_START 0x00461800 ++#define BCHP_PCIE_0_RC_PL_REG_END 0x00461e1c ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_START 0x00462000 ++#define BCHP_PCIE_0_EP_CFG_TYPE0_REG_END 0x0046203c ++#define BCHP_PCIE_0_EP_CFG_PM_REG_START 0x00462048 ++#define BCHP_PCIE_0_EP_CFG_PM_REG_END 0x0046204c ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_START 0x00462050 ++#define BCHP_PCIE_0_EP_CFG_VPD_REG_END 0x00462054 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_START 0x00462058 ++#define BCHP_PCIE_0_EP_CFG_MSI_REG_END 0x00462064 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_START 0x004620a0 ++#define BCHP_PCIE_0_EP_CFG_MSIX_REG_END 0x004620a8 ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_START 0x004620ac ++#define BCHP_PCIE_0_EP_CFG_PCIE_REG_END 0x004620e4 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_START 0x00462100 ++#define BCHP_PCIE_0_EP_CFG_AER_REG_END 0x00462134 ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_START 0x0046213c ++#define BCHP_PCIE_0_EP_CFG_DEV_REG_END 0x00462144 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_START 0x00462150 ++#define BCHP_PCIE_0_EP_CFG_PB_REG_END 0x0046215c ++#define BCHP_PCIE_0_EP_CFG_VC_REG_START 0x00462160 ++#define BCHP_PCIE_0_EP_CFG_VC_REG_END 0x00462178 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_START 0x00462180 ++#define BCHP_PCIE_0_EP_CFG_VENDOR_REG_END 0x004621a4 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_START 0x00462404 ++#define BCHP_PCIE_0_EP_CFG_PRIV0_REG_END 0x00462418 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_START 0x00462428 ++#define BCHP_PCIE_0_EP_CFG_PRIV1_REG_END 0x00462630 ++#define BCHP_PCIE_0_EP_TL_REG_START 0x00462800 ++#define BCHP_PCIE_0_EP_TL_REG_END 0x00462998 ++#define BCHP_PCIE_0_EP_DL_REG_START 0x00463000 ++#define BCHP_PCIE_0_EP_DL_REG_END 0x00463424 ++#define BCHP_PCIE_0_EP_PL_REG_START 0x00463800 ++#define BCHP_PCIE_0_EP_PL_REG_END 0x00463e1c ++#define BCHP_PCIE_0_MISC_REG_START 0x00464000 ++#define BCHP_PCIE_0_MISC_REG_END 0x004640c8 ++#define BCHP_PCIE_0_MISC_PERST_REG_START 0x00464100 ++#define BCHP_PCIE_0_MISC_PERST_REG_END 0x00464104 ++#define BCHP_PCIE_0_MISC_HARD_REG_START 0x00464200 ++#define BCHP_PCIE_0_MISC_HARD_REG_END 0x00464204 ++#define BCHP_PCIE_0_INTR2_REG_START 0x00464300 ++#define BCHP_PCIE_0_INTR2_REG_END 0x0046432c ++#define BCHP_PCIE_0_DMA_REG_START 0x00464400 ++#define BCHP_PCIE_0_DMA_REG_END 0x0046446c ++#define BCHP_PCIE_0_EXT_CFG_REG_START 0x00468000 ++#define BCHP_PCIE_0_EXT_CFG_REG_END 0x00469008 ++#define BCHP_PCIE_0_RGR1_REG_START 0x00469200 ++#define BCHP_PCIE_0_RGR1_REG_END 0x00469210 ++#define BCHP_PCIE_0_RG_REG_START 0x00469300 ++#define BCHP_PCIE_0_RG_REG_END 0x0046930c ++#define BCHP_USB_CAPS_REG_START 0x00470000 ++#define BCHP_USB_CAPS_REG_END 0x0047002c ++#define BCHP_USB_GR_BRIDGE_REG_START 0x00470100 ++#define BCHP_USB_GR_BRIDGE_REG_END 0x0047010c ++#define BCHP_USB_INTR2_REG_START 0x00470180 ++#define BCHP_USB_INTR2_REG_END 0x004701ac ++#define BCHP_USB_CTRL_REG_START 0x00470200 ++#define BCHP_USB_CTRL_REG_END 0x004702b4 ++#define BCHP_USB_EHCI_REG_START 0x00470300 ++#define BCHP_USB_EHCI_REG_END 0x004703a4 ++#define BCHP_USB_OHCI_REG_START 0x00470400 ++#define BCHP_USB_OHCI_REG_END 0x00470454 ++#define BCHP_USB_EHCI1_REG_START 0x00470500 ++#define BCHP_USB_EHCI1_REG_END 0x004705a4 ++#define BCHP_USB_OHCI1_REG_START 0x00470600 ++#define BCHP_USB_OHCI1_REG_END 0x00470654 ++#define BCHP_USB_XHCI_REG_START 0x00471000 ++#define BCHP_USB_XHCI_REG_END 0x004718c4 ++#define BCHP_USB_XHCI_EC_REG_START 0x00471940 ++#define BCHP_USB_XHCI_EC_REG_END 0x00471ffc ++#define BCHP_USB1_CAPS_REG_START 0x00480000 ++#define BCHP_USB1_CAPS_REG_END 0x0048002c ++#define BCHP_USB1_GR_BRIDGE_REG_START 0x00480100 ++#define BCHP_USB1_GR_BRIDGE_REG_END 0x0048010c ++#define BCHP_USB1_INTR2_REG_START 0x00480180 ++#define BCHP_USB1_INTR2_REG_END 0x004801ac ++#define BCHP_USB1_CTRL_REG_START 0x00480200 ++#define BCHP_USB1_CTRL_REG_END 0x004802b4 ++#define BCHP_USB1_EHCI_REG_START 0x00480300 ++#define BCHP_USB1_EHCI_REG_END 0x004803a4 ++#define BCHP_USB1_OHCI_REG_START 0x00480400 ++#define BCHP_USB1_OHCI_REG_END 0x00480454 ++#define BCHP_USB1_EHCI1_REG_START 0x00480500 ++#define BCHP_USB1_EHCI1_REG_END 0x004805a4 ++#define BCHP_USB1_OHCI1_REG_START 0x00480600 ++#define BCHP_USB1_OHCI1_REG_END 0x00480654 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_START 0x00490000 ++#define BCHP_PCIE_1_RC_CFG_TYPE1_REG_END 0x0049003c ++#define BCHP_PCIE_1_RC_CFG_PM_REG_START 0x00490048 ++#define BCHP_PCIE_1_RC_CFG_PM_REG_END 0x0049004c ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_START 0x004900ac ++#define BCHP_PCIE_1_RC_CFG_PCIE_REG_END 0x004900e4 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_START 0x00490100 ++#define BCHP_PCIE_1_RC_CFG_AER_REG_END 0x00490134 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_START 0x00490160 ++#define BCHP_PCIE_1_RC_CFG_VC_REG_END 0x00490178 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_START 0x00490180 ++#define BCHP_PCIE_1_RC_CFG_VENDOR_REG_END 0x004901a4 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_START 0x00490404 ++#define BCHP_PCIE_1_RC_CFG_PRIV0_REG_END 0x00490418 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_START 0x00490428 ++#define BCHP_PCIE_1_RC_CFG_PRIV1_REG_END 0x00490630 ++#define BCHP_PCIE_1_RC_TL_REG_START 0x00490800 ++#define BCHP_PCIE_1_RC_TL_REG_END 0x00490998 ++#define BCHP_PCIE_1_RC_DL_REG_START 0x00491000 ++#define BCHP_PCIE_1_RC_DL_REG_END 0x00491424 ++#define BCHP_PCIE_1_RC_PL_REG_START 0x00491800 ++#define BCHP_PCIE_1_RC_PL_REG_END 0x00491e1c ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_START 0x00492000 ++#define BCHP_PCIE_1_EP_CFG_TYPE0_REG_END 0x0049203c ++#define BCHP_PCIE_1_EP_CFG_PM_REG_START 0x00492048 ++#define BCHP_PCIE_1_EP_CFG_PM_REG_END 0x0049204c ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_START 0x00492050 ++#define BCHP_PCIE_1_EP_CFG_VPD_REG_END 0x00492054 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_START 0x00492058 ++#define BCHP_PCIE_1_EP_CFG_MSI_REG_END 0x00492064 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_START 0x004920a0 ++#define BCHP_PCIE_1_EP_CFG_MSIX_REG_END 0x004920a8 ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_START 0x004920ac ++#define BCHP_PCIE_1_EP_CFG_PCIE_REG_END 0x004920e4 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_START 0x00492100 ++#define BCHP_PCIE_1_EP_CFG_AER_REG_END 0x00492134 ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_START 0x0049213c ++#define BCHP_PCIE_1_EP_CFG_DEV_REG_END 0x00492144 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_START 0x00492150 ++#define BCHP_PCIE_1_EP_CFG_PB_REG_END 0x0049215c ++#define BCHP_PCIE_1_EP_CFG_VC_REG_START 0x00492160 ++#define BCHP_PCIE_1_EP_CFG_VC_REG_END 0x00492178 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_START 0x00492180 ++#define BCHP_PCIE_1_EP_CFG_VENDOR_REG_END 0x004921a4 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_START 0x00492404 ++#define BCHP_PCIE_1_EP_CFG_PRIV0_REG_END 0x00492418 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_START 0x00492428 ++#define BCHP_PCIE_1_EP_CFG_PRIV1_REG_END 0x00492630 ++#define BCHP_PCIE_1_EP_TL_REG_START 0x00492800 ++#define BCHP_PCIE_1_EP_TL_REG_END 0x00492998 ++#define BCHP_PCIE_1_EP_DL_REG_START 0x00493000 ++#define BCHP_PCIE_1_EP_DL_REG_END 0x00493424 ++#define BCHP_PCIE_1_EP_PL_REG_START 0x00493800 ++#define BCHP_PCIE_1_EP_PL_REG_END 0x00493e1c ++#define BCHP_PCIE_1_MISC_REG_START 0x00494000 ++#define BCHP_PCIE_1_MISC_REG_END 0x004940c8 ++#define BCHP_PCIE_1_MISC_PERST_REG_START 0x00494100 ++#define BCHP_PCIE_1_MISC_PERST_REG_END 0x00494104 ++#define BCHP_PCIE_1_MISC_HARD_REG_START 0x00494200 ++#define BCHP_PCIE_1_MISC_HARD_REG_END 0x00494204 ++#define BCHP_PCIE_1_INTR2_REG_START 0x00494300 ++#define BCHP_PCIE_1_INTR2_REG_END 0x0049432c ++#define BCHP_PCIE_1_DMA_REG_START 0x00494400 ++#define BCHP_PCIE_1_DMA_REG_END 0x0049446c ++#define BCHP_PCIE_1_EXT_CFG_REG_START 0x00498000 ++#define BCHP_PCIE_1_EXT_CFG_REG_END 0x00499008 ++#define BCHP_PCIE_1_RGR1_REG_START 0x00499200 ++#define BCHP_PCIE_1_RGR1_REG_END 0x00499210 ++#define BCHP_PCIE_1_RG_REG_START 0x00499300 ++#define BCHP_PCIE_1_RG_REG_END 0x0049930c ++#define BCHP_SYSTEMPORT_TOPCTRL_REG_START 0x004a0000 ++#define BCHP_SYSTEMPORT_TOPCTRL_REG_END 0x004a000c ++#define BCHP_SYSTEMPORT_GR_BRIDGE_REG_START 0x004a0040 ++#define BCHP_SYSTEMPORT_GR_BRIDGE_REG_END 0x004a004c ++#define BCHP_SYSTEMPORT_INTRL2_0_REG_START 0x004a0200 ++#define BCHP_SYSTEMPORT_INTRL2_0_REG_END 0x004a022c ++#define BCHP_SYSTEMPORT_INTRL2_1_REG_START 0x004a0240 ++#define BCHP_SYSTEMPORT_INTRL2_1_REG_END 0x004a026c ++#define BCHP_SYSTEMPORT_RXCHK_REG_START 0x004a0300 ++#define BCHP_SYSTEMPORT_RXCHK_REG_END 0x004a0350 ++#define BCHP_SYSTEMPORT_TXCHK_REG_START 0x004a0380 ++#define BCHP_SYSTEMPORT_TXCHK_REG_END 0x004a0380 ++#define BCHP_SYSTEMPORT_RBUF_REG_START 0x004a0400 ++#define BCHP_SYSTEMPORT_RBUF_REG_END 0x004a0410 ++#define BCHP_SYSTEMPORT_TBUF_REG_START 0x004a0600 ++#define BCHP_SYSTEMPORT_TBUF_REG_END 0x004a0600 ++#define BCHP_SYSTEMPORT_UMAC_REG_START 0x004a0800 ++#define BCHP_SYSTEMPORT_UMAC_REG_END 0x004a0e4c ++#define BCHP_SYSTEMPORT_RDMA_REG_START 0x004a2000 ++#define BCHP_SYSTEMPORT_RDMA_REG_END 0x004a3048 ++#define BCHP_SYSTEMPORT_TDMA_REG_START 0x004a4000 ++#define BCHP_SYSTEMPORT_TDMA_REG_END 0x004a464c ++#define BCHP_AVS_CPU_PROG_MEM_REG_START 0x004c0000 ++#define BCHP_AVS_CPU_PROG_MEM_REG_END 0x004c2ffc ++#define BCHP_AVS_CPU_DATA_MEM_REG_START 0x004c4000 ++#define BCHP_AVS_CPU_DATA_MEM_REG_END 0x004c4bfc ++#define BCHP_AVS_CPU_CORE_REGS_REG_START 0x004c8000 ++#define BCHP_AVS_CPU_CORE_REGS_REG_END 0x004c80fc ++#define BCHP_AVS_CPU_AUX_REGS_REG_START 0x004ca000 ++#define BCHP_AVS_CPU_AUX_REGS_REG_END 0x004cb058 ++#define BCHP_AVS_UART_REG_START 0x004d0000 ++#define BCHP_AVS_UART_REG_END 0x004d0ffc ++#define BCHP_AVS_CPU_L2_REG_START 0x004d1100 ++#define BCHP_AVS_CPU_L2_REG_END 0x004d112c ++#define BCHP_AVS_HOST_L2_REG_START 0x004d1200 ++#define BCHP_AVS_HOST_L2_REG_END 0x004d1244 ++#define BCHP_AVS_CPU_CTRL_REG_START 0x004d1300 ++#define BCHP_AVS_CPU_CTRL_REG_END 0x004d1330 ++#define BCHP_AVS_BSTI_REG_START 0x004d1400 ++#define BCHP_AVS_BSTI_REG_END 0x004d1404 ++#define BCHP_AVS_TMON_REG_START 0x004d1500 ++#define BCHP_AVS_TMON_REG_END 0x004d1524 ++#define BCHP_AVS_TOP_CTRL_REG_START 0x004d1800 ++#define BCHP_AVS_TOP_CTRL_REG_END 0x004d18d4 ++#define BCHP_AVS_HW_MNTR_REG_START 0x004d2000 ++#define BCHP_AVS_HW_MNTR_REG_END 0x004d20c8 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START 0x004d2100 ++#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END 0x004d2124 ++#define BCHP_AVS_RO_REGISTERS_0_REG_START 0x004d2200 ++#define BCHP_AVS_RO_REGISTERS_0_REG_END 0x004d22e0 ++#define BCHP_AVS_RO_REGISTERS_1_REG_START 0x004d2800 ++#define BCHP_AVS_RO_REGISTERS_1_REG_END 0x004d2804 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START 0x004d2d00 ++#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END 0x004d2dfc ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START 0x004d2e00 ++#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END 0x004d2efc ++#define BCHP_AVS_WDOG_REG_START 0x004d3000 ++#define BCHP_AVS_WDOG_REG_END 0x004d3ffc ++#define BCHP_AVS_PMB_S_000_REG_START 0x004d4000 ++#define BCHP_AVS_PMB_S_000_REG_END 0x004d4024 ++#define BCHP_AVS_PMB_S_001_REG_START 0x004d4040 ++#define BCHP_AVS_PMB_S_001_REG_END 0x004d4064 ++#define BCHP_AVS_PMB_S_002_REG_START 0x004d4080 ++#define BCHP_AVS_PMB_S_002_REG_END 0x004d40a4 ++#define BCHP_AVS_PMB_S_003_REG_START 0x004d40c0 ++#define BCHP_AVS_PMB_S_003_REG_END 0x004d40e4 ++#define BCHP_AVS_PMB_S_004_REG_START 0x004d4100 ++#define BCHP_AVS_PMB_S_004_REG_END 0x004d4124 ++#define BCHP_AVS_PMB_S_005_REG_START 0x004d4140 ++#define BCHP_AVS_PMB_S_005_REG_END 0x004d4164 ++#define BCHP_AVS_PMB_S_006_REG_START 0x004d4180 ++#define BCHP_AVS_PMB_S_006_REG_END 0x004d41a4 ++#define BCHP_AVS_PMB_S_007_REG_START 0x004d41c0 ++#define BCHP_AVS_PMB_S_007_REG_END 0x004d41e4 ++#define BCHP_AVS_PMB_S_008_REG_START 0x004d4200 ++#define BCHP_AVS_PMB_S_008_REG_END 0x004d4224 ++#define BCHP_AVS_PMB_S_009_REG_START 0x004d4240 ++#define BCHP_AVS_PMB_S_009_REG_END 0x004d4264 ++#define BCHP_AVS_PMB_S_010_REG_START 0x004d4280 ++#define BCHP_AVS_PMB_S_010_REG_END 0x004d42a4 ++#define BCHP_AVS_PMB_S_011_REG_START 0x004d42c0 ++#define BCHP_AVS_PMB_S_011_REG_END 0x004d42e4 ++#define BCHP_AVS_PMB_S_012_REG_START 0x004d4300 ++#define BCHP_AVS_PMB_S_012_REG_END 0x004d4324 ++#define BCHP_AVS_PMB_S_013_REG_START 0x004d4340 ++#define BCHP_AVS_PMB_S_013_REG_END 0x004d4364 ++#define BCHP_AVS_PMB_S_014_REG_START 0x004d4380 ++#define BCHP_AVS_PMB_S_014_REG_END 0x004d43a4 ++#define BCHP_AVS_PMB_S_015_REG_START 0x004d43c0 ++#define BCHP_AVS_PMB_S_015_REG_END 0x004d43e4 ++#define BCHP_AVS_PMB_S_016_REG_START 0x004d4400 ++#define BCHP_AVS_PMB_S_016_REG_END 0x004d4424 ++#define BCHP_AVS_PMB_S_017_REG_START 0x004d4440 ++#define BCHP_AVS_PMB_S_017_REG_END 0x004d4464 ++#define BCHP_AVS_PMB_S_018_REG_START 0x004d4480 ++#define BCHP_AVS_PMB_S_018_REG_END 0x004d44a4 ++#define BCHP_AVS_PMB_S_019_REG_START 0x004d44c0 ++#define BCHP_AVS_PMB_S_019_REG_END 0x004d44e4 ++#define BCHP_AVS_PMB_S_020_REG_START 0x004d4500 ++#define BCHP_AVS_PMB_S_020_REG_END 0x004d4524 ++#define BCHP_AVS_PMB_S_021_REG_START 0x004d4540 ++#define BCHP_AVS_PMB_S_021_REG_END 0x004d4564 ++#define BCHP_AVS_PMB_S_022_REG_START 0x004d4580 ++#define BCHP_AVS_PMB_S_022_REG_END 0x004d45a4 ++#define BCHP_AVS_PMB_S_023_REG_START 0x004d45c0 ++#define BCHP_AVS_PMB_S_023_REG_END 0x004d45e4 ++#define BCHP_AVS_PMB_S_024_REG_START 0x004d4600 ++#define BCHP_AVS_PMB_S_024_REG_END 0x004d4624 ++#define BCHP_AVS_PMB_S_025_REG_START 0x004d4640 ++#define BCHP_AVS_PMB_S_025_REG_END 0x004d4664 ++#define BCHP_AVS_PMB_S_026_REG_START 0x004d4680 ++#define BCHP_AVS_PMB_S_026_REG_END 0x004d46a4 ++#define BCHP_AVS_PMB_S_027_REG_START 0x004d46c0 ++#define BCHP_AVS_PMB_S_027_REG_END 0x004d46e4 ++#define BCHP_AVS_PMB_S_028_REG_START 0x004d4700 ++#define BCHP_AVS_PMB_S_028_REG_END 0x004d4724 ++#define BCHP_AVS_PMB_REGISTERS_REG_START 0x004d6000 ++#define BCHP_AVS_PMB_REGISTERS_REG_END 0x004d6008 ++#define BCHP_CLKGEN_REG_START 0x004e0000 ++#define BCHP_CLKGEN_REG_END 0x004e06f8 ++#define BCHP_VCXO_0_RM_REG_START 0x004e2800 ++#define BCHP_VCXO_0_RM_REG_END 0x004e2838 ++#define BCHP_VCXO_1_RM_REG_START 0x004e2880 ++#define BCHP_VCXO_1_RM_REG_END 0x004e28b8 ++#define BCHP_VCXO_2_RM_REG_START 0x004e2900 ++#define BCHP_VCXO_2_RM_REG_END 0x004e2938 ++#define BCHP_CLKGEN_GR_REG_START 0x004e3000 ++#define BCHP_CLKGEN_GR_REG_END 0x004e300c ++#define BCHP_CLKGEN_INTR2_REG_START 0x004e4000 ++#define BCHP_CLKGEN_INTR2_REG_END 0x004e4044 ++#define BCHP_AVS_RANGE_BLOCKER_REG_START 0x004e5000 ++#define BCHP_AVS_RANGE_BLOCKER_REG_END 0x004e5058 ++#define BCHP_PROD_OTP_GRB_REG_START 0x004e6000 ++#define BCHP_PROD_OTP_GRB_REG_END 0x004e600c ++#define BCHP_JTAG_OTP_REG_START 0x004e6100 ++#define BCHP_JTAG_OTP_REG_END 0x004e615c ++#define BCHP_MFD_0_REG_START 0x00600000 ++#define BCHP_MFD_0_REG_END 0x006001fc ++#define BCHP_MFD_1_REG_START 0x00600400 ++#define BCHP_MFD_1_REG_END 0x006005fc ++#define BCHP_MFD_2_REG_START 0x00600800 ++#define BCHP_MFD_2_REG_END 0x006009fc ++#define BCHP_MFD_3_REG_START 0x00600c00 ++#define BCHP_MFD_3_REG_END 0x00600dfc ++#define BCHP_MFD_4_REG_START 0x00601000 ++#define BCHP_MFD_4_REG_END 0x006011fc ++#define BCHP_MFD_5_REG_START 0x00601400 ++#define BCHP_MFD_5_REG_END 0x006015fc ++#define BCHP_VFD_0_REG_START 0x00602000 ++#define BCHP_VFD_0_REG_END 0x006021fc ++#define BCHP_VFD_1_REG_START 0x00602200 ++#define BCHP_VFD_1_REG_END 0x006023fc ++#define BCHP_VFD_2_REG_START 0x00602400 ++#define BCHP_VFD_2_REG_END 0x006025fc ++#define BCHP_VFD_3_REG_START 0x00602600 ++#define BCHP_VFD_3_REG_END 0x006027fc ++#define BCHP_VFD_4_REG_START 0x00602800 ++#define BCHP_VFD_4_REG_END 0x006029fc ++#define BCHP_VFD_5_REG_START 0x00602a00 ++#define BCHP_VFD_5_REG_END 0x00602bfc ++#define BCHP_VFD_6_REG_START 0x00602c00 ++#define BCHP_VFD_6_REG_END 0x00602dfc ++#define BCHP_VFD_7_REG_START 0x00602e00 ++#define BCHP_VFD_7_REG_END 0x00602ffc ++#define BCHP_RDC_REG_START 0x00603000 ++#define BCHP_RDC_REG_END 0x00603cfc ++#define BCHP_BVNF_INTR2_0_REG_START 0x00604000 ++#define BCHP_BVNF_INTR2_0_REG_END 0x0060402c ++#define BCHP_BVNF_INTR2_1_REG_START 0x00604100 ++#define BCHP_BVNF_INTR2_1_REG_END 0x0060412c ++#define BCHP_BVNF_INTR2_3_REG_START 0x00604300 ++#define BCHP_BVNF_INTR2_3_REG_END 0x00604344 ++#define BCHP_BVNF_INTR2_5_REG_START 0x00604500 ++#define BCHP_BVNF_INTR2_5_REG_END 0x0060452c ++#define BCHP_BVNF_INTR2_6_REG_START 0x00604600 ++#define BCHP_BVNF_INTR2_6_REG_END 0x0060462c ++#define BCHP_BVNF_INTR2_7_REG_START 0x00604700 ++#define BCHP_BVNF_INTR2_7_REG_END 0x0060472c ++#define BCHP_BVNF_INTR2_8_REG_START 0x00604800 ++#define BCHP_BVNF_INTR2_8_REG_END 0x0060482c ++#define BCHP_BVNF_INTR2_9_REG_START 0x00604900 ++#define BCHP_BVNF_INTR2_9_REG_END 0x0060492c ++#define BCHP_BVNF_INTR2_11_REG_START 0x00604b00 ++#define BCHP_BVNF_INTR2_11_REG_END 0x00604b44 ++#define BCHP_BVNF_INTR2_14_REG_START 0x00604e00 ++#define BCHP_BVNF_INTR2_14_REG_END 0x00604e2c ++#define BCHP_BVNF_INTR2_15_REG_START 0x00604f00 ++#define BCHP_BVNF_INTR2_15_REG_END 0x00604f2c ++#define BCHP_BVNF_INTR2_16_REG_START 0x00605000 ++#define BCHP_BVNF_INTR2_16_REG_END 0x0060502c ++#define BCHP_BVNF_INTR2_18_REG_START 0x00605200 ++#define BCHP_BVNF_INTR2_18_REG_END 0x0060522c ++#define BCHP_FMISC_REG_START 0x00606000 ++#define BCHP_FMISC_REG_END 0x00606020 ++#define BCHP_SCL_0_REG_START 0x00620000 ++#define BCHP_SCL_0_REG_END 0x006203fc ++#define BCHP_SCL_1_REG_START 0x00620400 ++#define BCHP_SCL_1_REG_END 0x006207fc ++#define BCHP_SCL_2_REG_START 0x00620800 ++#define BCHP_SCL_2_REG_END 0x00620bfc ++#define BCHP_SCL_3_REG_START 0x00620c00 ++#define BCHP_SCL_3_REG_END 0x00620ffc ++#define BCHP_SCL_4_REG_START 0x00621000 ++#define BCHP_SCL_4_REG_END 0x006213fc ++#define BCHP_SCL_5_REG_START 0x00621400 ++#define BCHP_SCL_5_REG_END 0x006217fc ++#define BCHP_SCL_6_REG_START 0x00621800 ++#define BCHP_SCL_6_REG_END 0x00621bfc ++#define BCHP_SCL_7_REG_START 0x00621c00 ++#define BCHP_SCL_7_REG_END 0x00621ffc ++#define BCHP_VNET_F_REG_START 0x00622000 ++#define BCHP_VNET_F_REG_END 0x006221fc ++#define BCHP_VNET_B_REG_START 0x00622200 ++#define BCHP_VNET_B_REG_END 0x006223fc ++#define BCHP_MMISC_REG_START 0x00622800 ++#define BCHP_MMISC_REG_END 0x00622828 ++#define BCHP_LBOX_0_REG_START 0x00624000 ++#define BCHP_LBOX_0_REG_END 0x00624070 ++#define BCHP_XSRC_0_REG_START 0x00624800 ++#define BCHP_XSRC_0_REG_END 0x00624bfc ++#define BCHP_XSRC_1_REG_START 0x00624c00 ++#define BCHP_XSRC_1_REG_END 0x00624ffc ++#define BCHP_TNTD_0_REG_START 0x00625000 ++#define BCHP_TNTD_0_REG_END 0x006250ec ++#define BCHP_DNR_0_REG_START 0x00626000 ++#define BCHP_DNR_0_REG_END 0x006260a4 ++#define BCHP_DNR_1_REG_START 0x00626200 ++#define BCHP_DNR_1_REG_END 0x006262a4 ++#define BCHP_DNR_2_REG_START 0x00626400 ++#define BCHP_DNR_2_REG_END 0x006264a4 ++#define BCHP_DNR_3_REG_START 0x00626600 ++#define BCHP_DNR_3_REG_END 0x006266a4 ++#define BCHP_DNR_4_REG_START 0x00626800 ++#define BCHP_DNR_4_REG_END 0x006268a4 ++#define BCHP_DNR_5_REG_START 0x00626a00 ++#define BCHP_DNR_5_REG_END 0x00626aa4 ++#define BCHP_BVNM_INTR2_0_REG_START 0x00627000 ++#define BCHP_BVNM_INTR2_0_REG_END 0x0062702c ++#define BCHP_BVNM_INTR2_1_REG_START 0x00627100 ++#define BCHP_BVNM_INTR2_1_REG_END 0x0062712c ++#define BCHP_CAP_0_REG_START 0x00640000 ++#define BCHP_CAP_0_REG_END 0x0064010c ++#define BCHP_CAP_1_REG_START 0x00640200 ++#define BCHP_CAP_1_REG_END 0x0064030c ++#define BCHP_CAP_2_REG_START 0x00640400 ++#define BCHP_CAP_2_REG_END 0x0064050c ++#define BCHP_CAP_3_REG_START 0x00640600 ++#define BCHP_CAP_3_REG_END 0x0064070c ++#define BCHP_CAP_4_REG_START 0x00640800 ++#define BCHP_CAP_4_REG_END 0x0064090c ++#define BCHP_CAP_5_REG_START 0x00640a00 ++#define BCHP_CAP_5_REG_END 0x00640b0c ++#define BCHP_CAP_6_REG_START 0x00640c00 ++#define BCHP_CAP_6_REG_END 0x00640d0c ++#define BCHP_CAP_7_REG_START 0x00640e00 ++#define BCHP_CAP_7_REG_END 0x00640f0c ++#define BCHP_GFD_0_REG_START 0x00641000 ++#define BCHP_GFD_0_REG_END 0x0064122c ++#define BCHP_GFD_1_REG_START 0x00641400 ++#define BCHP_GFD_1_REG_END 0x0064162c ++#define BCHP_GFD_2_REG_START 0x00641800 ++#define BCHP_GFD_2_REG_END 0x00641a2c ++#define BCHP_GFD_3_REG_START 0x00641c00 ++#define BCHP_GFD_3_REG_END 0x00641e2c ++#define BCHP_GFD_4_REG_START 0x00642000 ++#define BCHP_GFD_4_REG_END 0x0064222c ++#define BCHP_GFD_5_REG_START 0x00642400 ++#define BCHP_GFD_5_REG_END 0x0064262c ++#define BCHP_GFD_6_REG_START 0x00642800 ++#define BCHP_GFD_6_REG_END 0x00642a2c ++#define BCHP_CMP_0_REG_START 0x00643000 ++#define BCHP_CMP_0_REG_END 0x006434c0 ++#define BCHP_CMP_1_REG_START 0x00643800 ++#define BCHP_CMP_1_REG_END 0x00643cb0 ++#define BCHP_CMP_2_REG_START 0x00644000 ++#define BCHP_CMP_2_REG_END 0x00644260 ++#define BCHP_CMP_3_REG_START 0x00644400 ++#define BCHP_CMP_3_REG_END 0x00644660 ++#define BCHP_CMP_4_REG_START 0x00644800 ++#define BCHP_CMP_4_REG_END 0x00644a60 ++#define BCHP_CMP_5_REG_START 0x00644c00 ++#define BCHP_CMP_5_REG_END 0x00644e60 ++#define BCHP_CMP_6_REG_START 0x00645000 ++#define BCHP_CMP_6_REG_END 0x00645260 ++#define BCHP_TNT_CMP_0_V0_REG_START 0x00645800 ++#define BCHP_TNT_CMP_0_V0_REG_END 0x006458a4 ++#define BCHP_MASK_0_REG_START 0x00645c00 ++#define BCHP_MASK_0_REG_END 0x00645c20 ++#define BCHP_PEP_CMP_0_V0_REG_START 0x00646000 ++#define BCHP_PEP_CMP_0_V0_REG_END 0x00647284 ++#define BCHP_BVNB_INTR2_REG_START 0x00648000 ++#define BCHP_BVNB_INTR2_REG_END 0x0064802c ++#define BCHP_BVNB_INTR2_1_REG_START 0x00648100 ++#define BCHP_BVNB_INTR2_1_REG_END 0x0064812c ++#define BCHP_BMISC_REG_START 0x00648400 ++#define BCHP_BMISC_REG_END 0x0064841c ++#define BCHP_DMISC_REG_START 0x00680000 ++#define BCHP_DMISC_REG_END 0x0068001c ++#define BCHP_MVP_TOP_0_REG_START 0x00688000 ++#define BCHP_MVP_TOP_0_REG_END 0x0068802c ++#define BCHP_SIOB_0_REG_START 0x00688200 ++#define BCHP_SIOB_0_REG_END 0x006882fc ++#define BCHP_HSCL_0_REG_START 0x00688400 ++#define BCHP_HSCL_0_REG_END 0x006887fc ++#define BCHP_HD_ANR_MCTF_0_REG_START 0x00689000 ++#define BCHP_HD_ANR_MCTF_0_REG_END 0x0068927c ++#define BCHP_HD_ANR_AND_0_REG_START 0x00689800 ++#define BCHP_HD_ANR_AND_0_REG_END 0x00689888 ++#define BCHP_MDI_TOP_0_REG_START 0x0068a000 ++#define BCHP_MDI_TOP_0_REG_END 0x0068a0fc ++#define BCHP_MDI_FCB_0_REG_START 0x0068a400 ++#define BCHP_MDI_FCB_0_REG_END 0x0068a7fc ++#define BCHP_MDI_PPB_0_REG_START 0x0068a800 ++#define BCHP_MDI_PPB_0_REG_END 0x0068abfc ++#define BCHP_MDI_MEMC_0_REG_START 0x0068ac00 ++#define BCHP_MDI_MEMC_0_REG_END 0x0068adfc ++#define BCHP_MDI_FCN_0_REG_START 0x0068ae00 ++#define BCHP_MDI_FCN_0_REG_END 0x0068b1fc ++#define BCHP_MVP_TOP_1_REG_START 0x00690000 ++#define BCHP_MVP_TOP_1_REG_END 0x0069002c ++#define BCHP_SIOB_1_REG_START 0x00690200 ++#define BCHP_SIOB_1_REG_END 0x006902fc ++#define BCHP_HSCL_1_REG_START 0x00690400 ++#define BCHP_HSCL_1_REG_END 0x006907fc ++#define BCHP_MDI_TOP_1_REG_START 0x00692000 ++#define BCHP_MDI_TOP_1_REG_END 0x006920fc ++#define BCHP_MDI_PPB_1_REG_START 0x00692800 ++#define BCHP_MDI_PPB_1_REG_END 0x00692bfc ++#define BCHP_MDI_FCN_1_REG_START 0x00692c00 ++#define BCHP_MDI_FCN_1_REG_END 0x00692ffc ++#define BCHP_MVP_TOP_2_REG_START 0x00698000 ++#define BCHP_MVP_TOP_2_REG_END 0x0069802c ++#define BCHP_SIOB_2_REG_START 0x00698200 ++#define BCHP_SIOB_2_REG_END 0x006982fc ++#define BCHP_HSCL_2_REG_START 0x00698400 ++#define BCHP_HSCL_2_REG_END 0x006987fc ++#define BCHP_MDI_TOP_2_REG_START 0x0069a000 ++#define BCHP_MDI_TOP_2_REG_END 0x0069a0fc ++#define BCHP_MDI_PPB_2_REG_START 0x0069a800 ++#define BCHP_MDI_PPB_2_REG_END 0x0069abfc ++#define BCHP_MDI_FCN_2_REG_START 0x0069ac00 ++#define BCHP_MDI_FCN_2_REG_END 0x0069affc ++#define BCHP_MVP_TOP_3_REG_START 0x006a0000 ++#define BCHP_MVP_TOP_3_REG_END 0x006a002c ++#define BCHP_SIOB_3_REG_START 0x006a0200 ++#define BCHP_SIOB_3_REG_END 0x006a02fc ++#define BCHP_HSCL_3_REG_START 0x006a0400 ++#define BCHP_HSCL_3_REG_END 0x006a07fc ++#define BCHP_MDI_TOP_3_REG_START 0x006a2000 ++#define BCHP_MDI_TOP_3_REG_END 0x006a20fc ++#define BCHP_MDI_PPB_3_REG_START 0x006a2800 ++#define BCHP_MDI_PPB_3_REG_END 0x006a2bfc ++#define BCHP_MDI_FCN_3_REG_START 0x006a2c00 ++#define BCHP_MDI_FCN_3_REG_END 0x006a2ffc ++#define BCHP_MVP_TOP_4_REG_START 0x006a8000 ++#define BCHP_MVP_TOP_4_REG_END 0x006a802c ++#define BCHP_SIOB_4_REG_START 0x006a8200 ++#define BCHP_SIOB_4_REG_END 0x006a82fc ++#define BCHP_HSCL_4_REG_START 0x006a8400 ++#define BCHP_HSCL_4_REG_END 0x006a87fc ++#define BCHP_MDI_TOP_4_REG_START 0x006aa000 ++#define BCHP_MDI_TOP_4_REG_END 0x006aa0fc ++#define BCHP_MDI_PPB_4_REG_START 0x006aa800 ++#define BCHP_MDI_PPB_4_REG_END 0x006aabfc ++#define BCHP_MDI_FCN_4_REG_START 0x006aac00 ++#define BCHP_MDI_FCN_4_REG_END 0x006aaffc ++#define BCHP_MVP_TOP_5_REG_START 0x006b0000 ++#define BCHP_MVP_TOP_5_REG_END 0x006b002c ++#define BCHP_SIOB_5_REG_START 0x006b0200 ++#define BCHP_SIOB_5_REG_END 0x006b02fc ++#define BCHP_HSCL_5_REG_START 0x006b0400 ++#define BCHP_HSCL_5_REG_END 0x006b07fc ++#define BCHP_MDI_TOP_5_REG_START 0x006b2000 ++#define BCHP_MDI_TOP_5_REG_END 0x006b20fc ++#define BCHP_MDI_PPB_5_REG_START 0x006b2800 ++#define BCHP_MDI_PPB_5_REG_END 0x006b2bfc ++#define BCHP_MDI_FCN_5_REG_START 0x006b2c00 ++#define BCHP_MDI_FCN_5_REG_END 0x006b2ffc ++#define BCHP_MISC_REG_START 0x006e0000 ++#define BCHP_MISC_REG_END 0x006e00ac ++#define BCHP_IT_0_REG_START 0x006e1000 ++#define BCHP_IT_0_REG_END 0x006e17fc ++#define BCHP_IT_1_REG_START 0x006e2000 ++#define BCHP_IT_1_REG_END 0x006e27fc ++#define BCHP_IT_2_REG_START 0x006e3000 ++#define BCHP_IT_2_REG_END 0x006e37fc ++#define BCHP_VF_0_REG_START 0x006e4000 ++#define BCHP_VF_0_REG_END 0x006e4134 ++#define BCHP_VF_1_REG_START 0x006e4200 ++#define BCHP_VF_1_REG_END 0x006e4334 ++#define BCHP_SECAM_0_REG_START 0x006e4400 ++#define BCHP_SECAM_0_REG_END 0x006e4414 ++#define BCHP_SM_0_REG_START 0x006e4480 ++#define BCHP_SM_0_REG_END 0x006e44ac ++#define BCHP_SDSRC_0_REG_START 0x006e4500 ++#define BCHP_SDSRC_0_REG_END 0x006e450c ++#define BCHP_HDSRC_0_REG_START 0x006e4520 ++#define BCHP_HDSRC_0_REG_END 0x006e453c ++#define BCHP_CSC_0_REG_START 0x006e4580 ++#define BCHP_CSC_0_REG_END 0x006e45b0 ++#define BCHP_CSC_1_REG_START 0x006e4600 ++#define BCHP_CSC_1_REG_END 0x006e4630 ++#define BCHP_RM_0_REG_START 0x006e4680 ++#define BCHP_RM_0_REG_END 0x006e46b0 ++#define BCHP_RM_1_REG_START 0x006e46c0 ++#define BCHP_RM_1_REG_END 0x006e46f0 ++#define BCHP_RM_2_REG_START 0x006e4700 ++#define BCHP_RM_2_REG_END 0x006e4730 ++#define BCHP_ANA_DEBUG_0_REG_START 0x006e4800 ++#define BCHP_ANA_DEBUG_0_REG_END 0x006e4844 ++#define BCHP_DVI_MISC_0_REG_START 0x006e4900 ++#define BCHP_DVI_MISC_0_REG_END 0x006e4900 ++#define BCHP_DVI_DTG_0_REG_START 0x006e5000 ++#define BCHP_DVI_DTG_0_REG_END 0x006e5488 ++#define BCHP_DVI_DTG_RM_0_REG_START 0x006e5800 ++#define BCHP_DVI_DTG_RM_0_REG_END 0x006e5830 ++#define BCHP_DVI_CSC_0_REG_START 0x006e5900 ++#define BCHP_DVI_CSC_0_REG_END 0x006e5930 ++#define BCHP_DVI_FC_0_REG_START 0x006e5a00 ++#define BCHP_DVI_FC_0_REG_END 0x006e5a04 ++#define BCHP_DVI_DVF_0_REG_START 0x006e5b00 ++#define BCHP_DVI_DVF_0_REG_END 0x006e5b18 ++#define BCHP_DVI_DEBUG_0_REG_START 0x006e5c00 ++#define BCHP_DVI_DEBUG_0_REG_END 0x006e5c44 ++#define BCHP_ITU656_DTG_0_REG_START 0x006e6000 ++#define BCHP_ITU656_DTG_0_REG_END 0x006e6488 ++#define BCHP_ITU656_CSC_0_REG_START 0x006e6600 ++#define BCHP_ITU656_CSC_0_REG_END 0x006e6630 ++#define BCHP_ITU656_DVF_0_REG_START 0x006e6700 ++#define BCHP_ITU656_DVF_0_REG_END 0x006e6718 ++#define BCHP_ITU656_0_REG_START 0x006e6800 ++#define BCHP_ITU656_0_REG_END 0x006e6820 ++#define BCHP_VEC_CFG_REG_START 0x006e6c00 ++#define BCHP_VEC_CFG_REG_END 0x006e6dbc ++#define BCHP_VIDEO_ENC_INTR2_REG_START 0x006e7000 ++#define BCHP_VIDEO_ENC_INTR2_REG_END 0x006e702c ++#define BCHP_VIDEO_ENC_TPG_0_REG_START 0x006e7200 ++#define BCHP_VIDEO_ENC_TPG_0_REG_END 0x006e7320 ++#define BCHP_VIDEO_ENC_STG_0_REG_START 0x006e7400 ++#define BCHP_VIDEO_ENC_STG_0_REG_END 0x006e745c ++#define BCHP_VIDEO_ENC_STG_1_REG_START 0x006e7500 ++#define BCHP_VIDEO_ENC_STG_1_REG_END 0x006e755c ++#define BCHP_VIDEO_ENC_STG_2_REG_START 0x006e7600 ++#define BCHP_VIDEO_ENC_STG_2_REG_END 0x006e765c ++#define BCHP_VIDEO_ENC_STG_3_REG_START 0x006e7700 ++#define BCHP_VIDEO_ENC_STG_3_REG_END 0x006e775c ++#define BCHP_VIDEO_ENC_STG_4_REG_START 0x006e7800 ++#define BCHP_VIDEO_ENC_STG_4_REG_END 0x006e785c ++#define BCHP_VIDEO_ENC_STG_5_REG_START 0x006e7900 ++#define BCHP_VIDEO_ENC_STG_5_REG_END 0x006e795c ++#define BCHP_VIDEO_ENC_DECIM_0_REG_START 0x006e7a00 ++#define BCHP_VIDEO_ENC_DECIM_0_REG_END 0x006e7a08 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_START 0x006e7b00 ++#define BCHP_VIDEO_ENC_BP_FIFO_0_REG_END 0x006e7b2c ++#define BCHP_DVP_TVG_0_REG_START 0x006e7c00 ++#define BCHP_DVP_TVG_0_REG_END 0x006e7c88 ++#define BCHP_VBI_ENC_REG_START 0x006e8000 ++#define BCHP_VBI_ENC_REG_END 0x006e80a0 ++#define BCHP_CCE_0_REG_START 0x006e8400 ++#define BCHP_CCE_0_REG_END 0x006e8458 ++#define BCHP_CCE_1_REG_START 0x006e8500 ++#define BCHP_CCE_1_REG_END 0x006e8558 ++#define BCHP_WSE_0_REG_START 0x006e8600 ++#define BCHP_WSE_0_REG_END 0x006e8614 ++#define BCHP_WSE_1_REG_START 0x006e8700 ++#define BCHP_WSE_1_REG_END 0x006e8714 ++#define BCHP_CGMSAE_0_REG_START 0x006e8800 ++#define BCHP_CGMSAE_0_REG_END 0x006e8858 ++#define BCHP_CGMSAE_1_REG_START 0x006e8900 ++#define BCHP_CGMSAE_1_REG_END 0x006e8958 ++#define BCHP_TTE_0_REG_START 0x006e8a00 ++#define BCHP_TTE_0_REG_END 0x006e8a28 ++#define BCHP_TTE_1_REG_START 0x006e8b00 ++#define BCHP_TTE_1_REG_END 0x006e8b28 ++#define BCHP_GSE_0_REG_START 0x006e8c00 ++#define BCHP_GSE_0_REG_END 0x006e8c80 ++#define BCHP_GSE_1_REG_START 0x006e8d00 ++#define BCHP_GSE_1_REG_END 0x006e8d80 ++#define BCHP_AMOLE_0_REG_START 0x006e8e00 ++#define BCHP_AMOLE_0_REG_END 0x006e8e8c ++#define BCHP_AMOLE_1_REG_START 0x006e8f00 ++#define BCHP_AMOLE_1_REG_END 0x006e8f8c ++#define BCHP_CCE_ANCIL_0_REG_START 0x006e9000 ++#define BCHP_CCE_ANCIL_0_REG_END 0x006e9054 ++#define BCHP_WSE_ANCIL_0_REG_START 0x006e9100 ++#define BCHP_WSE_ANCIL_0_REG_END 0x006e910c ++#define BCHP_TTE_ANCIL_0_REG_START 0x006e9200 ++#define BCHP_TTE_ANCIL_0_REG_END 0x006e9228 ++#define BCHP_GSE_ANCIL_0_REG_START 0x006e9300 ++#define BCHP_GSE_ANCIL_0_REG_END 0x006e9380 ++#define BCHP_AMOLE_ANCIL_0_REG_START 0x006e9400 ++#define BCHP_AMOLE_ANCIL_0_REG_END 0x006e948c ++#define BCHP_ANCI656_ANCIL_0_REG_START 0x006e9500 ++#define BCHP_ANCI656_ANCIL_0_REG_END 0x006e9524 ++#define BCHP_DVP_HR_REG_START 0x006f0000 ++#define BCHP_DVP_HR_REG_END 0x006f03fc ++#define BCHP_DVP_HR_INTR2_REG_START 0x006f0400 ++#define BCHP_DVP_HR_INTR2_REG_END 0x006f042c ++#define BCHP_DVP_HR_KEY_RAM_REG_START 0x006f0600 ++#define BCHP_DVP_HR_KEY_RAM_REG_END 0x006f0614 ++#define BCHP_HDMI_RX_FE_SHARED_REG_START 0x006f0800 ++#define BCHP_HDMI_RX_FE_SHARED_REG_END 0x006f090c ++#define BCHP_HDMI_RX_SHARED_REG_START 0x006f0c00 ++#define BCHP_HDMI_RX_SHARED_REG_END 0x006f0c28 ++#define BCHP_HDMI_RX_FE_0_REG_START 0x006f1000 ++#define BCHP_HDMI_RX_FE_0_REG_END 0x006f11fc ++#define BCHP_HDMI_RX_EQ_0_REG_START 0x006f1200 ++#define BCHP_HDMI_RX_EQ_0_REG_END 0x006f13fc ++#define BCHP_HDMI_RX_0_REG_START 0x006f2000 ++#define BCHP_HDMI_RX_0_REG_END 0x006f27fc ++#define BCHP_HDCP2_RX_0_REG_START 0x006f2800 ++#define BCHP_HDCP2_RX_0_REG_END 0x006f29fc ++#define BCHP_HDMI_RX_INTR2_0_REG_START 0x006f2a00 ++#define BCHP_HDMI_RX_INTR2_0_REG_END 0x006f2a2c ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_START 0x006f2a40 ++#define BCHP_HDMI_RX_BANK2_INTR2_0_REG_END 0x006f2a6c ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_START 0x006f2a80 ++#define BCHP_HDMI_RX_HAE_INTR2_0_REG_END 0x006f2aac ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_START 0x006f2ac0 ++#define BCHP_HDCP2_RX_HAE_INTR2_0_REG_END 0x006f2ad4 ++#define BCHP_HD_DVI_0_REG_START 0x006f4000 ++#define BCHP_HD_DVI_0_REG_END 0x006f427c ++#define BCHP_DVP_HR_TMR_REG_START 0x006f4cc0 ++#define BCHP_DVP_HR_TMR_REG_END 0x006f4cfc ++#define BCHP_DVP_HT_REG_START 0x006f8000 ++#define BCHP_DVP_HT_REG_END 0x006f8140 ++#define BCHP_HDMI_REG_START 0x006f8800 ++#define BCHP_HDMI_REG_END 0x006f8afc ++#define BCHP_HDMI_TX_AUTO_I2C_REG_START 0x006f8b00 ++#define BCHP_HDMI_TX_AUTO_I2C_REG_END 0x006f8dfc ++#define BCHP_HDMI_TX_PHY_REG_START 0x006f8e00 ++#define BCHP_HDMI_TX_PHY_REG_END 0x006f8e7c ++#define BCHP_HDMI_RM_REG_START 0x006f8e80 ++#define BCHP_HDMI_RM_REG_END 0x006f8eb8 ++#define BCHP_HDMI_TX_INTR2_REG_START 0x006f8f00 ++#define BCHP_HDMI_TX_INTR2_REG_END 0x006f8f2c ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_START 0x006f8f80 ++#define BCHP_HDMI_TX_SCDC_INTR2_0_REG_END 0x006f8fac ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_START 0x006f9000 ++#define BCHP_HDCP2_TX_HAE_INTR2_0_REG_END 0x006f902c ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_START 0x006f9080 ++#define BCHP_HDMI_TX_HAE_INTR2_0_REG_END 0x006f90ac ++#define BCHP_HDMI_RAM_REG_START 0x006f9100 ++#define BCHP_HDMI_RAM_REG_END 0x006f92fc ++#define BCHP_BVN_RGR_REG_START 0x006fe000 ++#define BCHP_BVN_RGR_REG_END 0x006fe010 ++#define BCHP_VICE2_CABAC_0_0_REG_START 0x00700000 ++#define BCHP_VICE2_CABAC_0_0_REG_END 0x007002ec ++#define BCHP_VICE2_CME_0_0_REG_START 0x00700400 ++#define BCHP_VICE2_CME_0_0_REG_END 0x007004a0 ++#define BCHP_VICE2_DBLK_0_0_REG_START 0x00700800 ++#define BCHP_VICE2_DBLK_0_0_REG_END 0x0070088c ++#define BCHP_VICE2_FME_0_0_REG_START 0x00701000 ++#define BCHP_VICE2_FME_0_0_REG_END 0x007010c0 ++#define BCHP_VICE2_HA_0_0_REG_START 0x00701400 ++#define BCHP_VICE2_HA_0_0_REG_END 0x0070148c ++#define BCHP_VICE2_IMD_0_0_REG_START 0x00701800 ++#define BCHP_VICE2_IMD_0_0_REG_END 0x0070187c ++#define BCHP_VICE2_MAU_0_0_REG_START 0x00701c00 ++#define BCHP_VICE2_MAU_0_0_REG_END 0x00701d28 ++#define BCHP_VICE2_MC_0_0_REG_START 0x00702000 ++#define BCHP_VICE2_MC_0_0_REG_END 0x0070208c ++#define BCHP_VICE2_SG_0_0_REG_START 0x00702400 ++#define BCHP_VICE2_SG_0_0_REG_END 0x007025e4 ++#define BCHP_VICE2_VIP_0_0_REG_START 0x00702800 ++#define BCHP_VICE2_VIP_0_0_REG_END 0x00702a24 ++#define BCHP_VICE2_VIP1_0_0_REG_START 0x00702c00 ++#define BCHP_VICE2_VIP1_0_0_REG_END 0x00702e24 ++#define BCHP_VICE2_VIP2_0_0_REG_START 0x00703000 ++#define BCHP_VICE2_VIP2_0_0_REG_END 0x00703224 ++#define BCHP_VICE2_VIP3_0_0_REG_START 0x00703400 ++#define BCHP_VICE2_VIP3_0_0_REG_END 0x00703624 ++#define BCHP_VICE2_XQ_0_0_REG_START 0x00704000 ++#define BCHP_VICE2_XQ_0_0_REG_END 0x00705338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_START 0x00718000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_0_REG_END 0x007182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_START 0x00720000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_0_REG_END 0x007200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_START 0x00720400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_0_REG_END 0x0072042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_START 0x00720600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_0_REG_END 0x0072062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_START 0x00722000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_0_REG_END 0x007233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_START 0x00730000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_0_REG_END 0x0073fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_START 0x00758000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_0_REG_END 0x007582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_START 0x00760000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_0_REG_END 0x007600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_START 0x00760400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_0_REG_END 0x0076042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_START 0x00760600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_0_REG_END 0x0076062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_START 0x00762000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_0_REG_END 0x007633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_START 0x00770000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_0_REG_END 0x0077fffc ++#define BCHP_VICE2_RGR_0_REG_START 0x00780000 ++#define BCHP_VICE2_RGR_0_REG_END 0x0078000c ++#define BCHP_VICE2_MISC_0_REG_START 0x00781000 ++#define BCHP_VICE2_MISC_0_REG_END 0x00781050 ++#define BCHP_VICE2_L2_0_REG_START 0x00781100 ++#define BCHP_VICE2_L2_0_REG_END 0x0078112c ++#define BCHP_VICE2_ARCSS_MISC_0_REG_START 0x00782000 ++#define BCHP_VICE2_ARCSS_MISC_0_REG_END 0x007820b8 ++#define BCHP_VICE2_CABAC_0_1_REG_START 0x00800000 ++#define BCHP_VICE2_CABAC_0_1_REG_END 0x008002ec ++#define BCHP_VICE2_CME_0_1_REG_START 0x00800400 ++#define BCHP_VICE2_CME_0_1_REG_END 0x008004a0 ++#define BCHP_VICE2_DBLK_0_1_REG_START 0x00800800 ++#define BCHP_VICE2_DBLK_0_1_REG_END 0x0080088c ++#define BCHP_VICE2_FME_0_1_REG_START 0x00801000 ++#define BCHP_VICE2_FME_0_1_REG_END 0x008010c0 ++#define BCHP_VICE2_HA_0_1_REG_START 0x00801400 ++#define BCHP_VICE2_HA_0_1_REG_END 0x0080148c ++#define BCHP_VICE2_IMD_0_1_REG_START 0x00801800 ++#define BCHP_VICE2_IMD_0_1_REG_END 0x0080187c ++#define BCHP_VICE2_MAU_0_1_REG_START 0x00801c00 ++#define BCHP_VICE2_MAU_0_1_REG_END 0x00801d28 ++#define BCHP_VICE2_MC_0_1_REG_START 0x00802000 ++#define BCHP_VICE2_MC_0_1_REG_END 0x0080208c ++#define BCHP_VICE2_SG_0_1_REG_START 0x00802400 ++#define BCHP_VICE2_SG_0_1_REG_END 0x008025e4 ++#define BCHP_VICE2_VIP_0_1_REG_START 0x00802800 ++#define BCHP_VICE2_VIP_0_1_REG_END 0x00802a24 ++#define BCHP_VICE2_VIP1_0_1_REG_START 0x00802c00 ++#define BCHP_VICE2_VIP1_0_1_REG_END 0x00802e24 ++#define BCHP_VICE2_VIP2_0_1_REG_START 0x00803000 ++#define BCHP_VICE2_VIP2_0_1_REG_END 0x00803224 ++#define BCHP_VICE2_VIP3_0_1_REG_START 0x00803400 ++#define BCHP_VICE2_VIP3_0_1_REG_END 0x00803624 ++#define BCHP_VICE2_XQ_0_1_REG_START 0x00804000 ++#define BCHP_VICE2_XQ_0_1_REG_END 0x00805338 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_1_REG_START 0x00818000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_0_1_REG_END 0x008182b4 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_1_REG_START 0x00820000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_0_1_REG_END 0x008200a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_1_REG_START 0x00820400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_1_REG_END 0x0082042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_1_REG_START 0x00820600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_1_REG_END 0x0082062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_1_REG_START 0x00822000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_1_REG_END 0x008233fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_1_REG_START 0x00830000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_0_1_REG_END 0x0083fffc ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_1_REG_START 0x00858000 ++#define BCHP_VICE2_ARCSS_ESS_ADI_1_1_REG_END 0x008582a8 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_1_REG_START 0x00860000 ++#define BCHP_VICE2_ARCSS_ESS_CTRL_1_1_REG_END 0x008600a4 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_1_REG_START 0x00860400 ++#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_1_REG_END 0x0086042c ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_1_REG_START 0x00860600 ++#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_1_REG_END 0x0086062c ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_1_REG_START 0x00862000 ++#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_1_REG_END 0x008633fc ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_1_REG_START 0x00870000 ++#define BCHP_VICE2_ARCSS_ESS_DCCM_1_1_REG_END 0x0087fffc ++#define BCHP_VICE2_RGR_1_REG_START 0x00880000 ++#define BCHP_VICE2_RGR_1_REG_END 0x0088000c ++#define BCHP_VICE2_MISC_1_REG_START 0x00881000 ++#define BCHP_VICE2_MISC_1_REG_END 0x00881050 ++#define BCHP_VICE2_L2_1_REG_START 0x00881100 ++#define BCHP_VICE2_L2_1_REG_END 0x0088112c ++#define BCHP_VICE2_ARCSS_MISC_1_REG_START 0x00882000 ++#define BCHP_VICE2_ARCSS_MISC_1_REG_END 0x008820b8 ++#define BCHP_VICE2_SEC_CTRL_0_REG_START 0x00900000 ++#define BCHP_VICE2_SEC_CTRL_0_REG_END 0x00900080 ++#define BCHP_VICE2_SEC_CTRL_1_REG_START 0x00901000 ++#define BCHP_VICE2_SEC_CTRL_1_REG_END 0x00901080 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_START 0x00a00000 ++#define BCHP_XPT_BUS_IF_SUB_MODULE_SOFT_INIT_DONE_INTR2_REG_END 0x00a0002c ++#define BCHP_XPT_BUS_IF_REG_START 0x00a00080 ++#define BCHP_XPT_BUS_IF_REG_END 0x00a000fc ++#define BCHP_XPT_XMEMIF_REG_START 0x00a00100 ++#define BCHP_XPT_XMEMIF_REG_END 0x00a001fc ++#define BCHP_XPT_PMU_REG_START 0x00a00200 ++#define BCHP_XPT_PMU_REG_END 0x00a00218 ++#define BCHP_XPT_GR_REG_START 0x00a00300 ++#define BCHP_XPT_GR_REG_END 0x00a0030c ++#define BCHP_XPT_RMX0_IO_REG_START 0x00a00400 ++#define BCHP_XPT_RMX0_IO_REG_END 0x00a00420 ++#define BCHP_XPT_RMX1_IO_REG_START 0x00a00500 ++#define BCHP_XPT_RMX1_IO_REG_END 0x00a00520 ++#define BCHP_XPT_WAKEUP_REG_START 0x00a01000 ++#define BCHP_XPT_WAKEUP_REG_END 0x00a01fbc ++#define BCHP_XPT_DPCR0_REG_START 0x00a02000 ++#define BCHP_XPT_DPCR0_REG_END 0x00a02074 ++#define BCHP_XPT_DPCR1_REG_START 0x00a02080 ++#define BCHP_XPT_DPCR1_REG_END 0x00a020f4 ++#define BCHP_XPT_DPCR2_REG_START 0x00a02100 ++#define BCHP_XPT_DPCR2_REG_END 0x00a02174 ++#define BCHP_XPT_DPCR3_REG_START 0x00a02180 ++#define BCHP_XPT_DPCR3_REG_END 0x00a021f4 ++#define BCHP_XPT_DPCR4_REG_START 0x00a02200 ++#define BCHP_XPT_DPCR4_REG_END 0x00a02274 ++#define BCHP_XPT_DPCR5_REG_START 0x00a02280 ++#define BCHP_XPT_DPCR5_REG_END 0x00a022f4 ++#define BCHP_XPT_DPCR6_REG_START 0x00a02300 ++#define BCHP_XPT_DPCR6_REG_END 0x00a02374 ++#define BCHP_XPT_DPCR7_REG_START 0x00a02380 ++#define BCHP_XPT_DPCR7_REG_END 0x00a023f4 ++#define BCHP_XPT_DPCR8_REG_START 0x00a02400 ++#define BCHP_XPT_DPCR8_REG_END 0x00a02474 ++#define BCHP_XPT_DPCR9_REG_START 0x00a02480 ++#define BCHP_XPT_DPCR9_REG_END 0x00a024f4 ++#define BCHP_XPT_DPCR10_REG_START 0x00a02500 ++#define BCHP_XPT_DPCR10_REG_END 0x00a02574 ++#define BCHP_XPT_DPCR11_REG_START 0x00a02580 ++#define BCHP_XPT_DPCR11_REG_END 0x00a025f4 ++#define BCHP_XPT_DPCR12_REG_START 0x00a02600 ++#define BCHP_XPT_DPCR12_REG_END 0x00a02674 ++#define BCHP_XPT_DPCR13_REG_START 0x00a02680 ++#define BCHP_XPT_DPCR13_REG_END 0x00a026f4 ++#define BCHP_XPT_DPCR_PP_REG_START 0x00a02800 ++#define BCHP_XPT_DPCR_PP_REG_END 0x00a02804 ++#define BCHP_XPT_PSUB_REG_START 0x00a02a00 ++#define BCHP_XPT_PSUB_REG_END 0x00a02b88 ++#define BCHP_XPT_MPOD_REG_START 0x00a02c00 ++#define BCHP_XPT_MPOD_REG_END 0x00a02c20 ++#define BCHP_XPT_RMX0_REG_START 0x00a02d00 ++#define BCHP_XPT_RMX0_REG_END 0x00a02d10 ++#define BCHP_XPT_RMX1_REG_START 0x00a02e00 ++#define BCHP_XPT_RMX1_REG_END 0x00a02e10 ++#define BCHP_XPT_RSBUFF_REG_START 0x00a04000 ++#define BCHP_XPT_RSBUFF_REG_END 0x00a054fc ++#define BCHP_XPT_XCBUFF_REG_START 0x00a06000 ++#define BCHP_XPT_XCBUFF_REG_END 0x00a07e9c ++#define BCHP_XPT_PCROFFSET_REG_START 0x00a08000 ++#define BCHP_XPT_PCROFFSET_REG_END 0x00a0aafc ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_START 0x00a0c000 ++#define BCHP_XPT_TSIO_CONFIG_REGISTERS_REG_END 0x00a0ea04 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_START 0x00a0f000 ++#define BCHP_XPT_TSIO_CALIB_REGISTERS_REG_END 0x00a0f9fc ++#define BCHP_XPT_TSIO_INTR_L2_REG_START 0x00a0fc00 ++#define BCHP_XPT_TSIO_INTR_L2_REG_END 0x00a0fc2c ++#define BCHP_XPT_FULL_PID_PARSER_REG_START 0x00a10000 ++#define BCHP_XPT_FULL_PID_PARSER_REG_END 0x00a14050 ++#define BCHP_XPT_FE_REG_START 0x00a20000 ++#define BCHP_XPT_FE_REG_END 0x00a25ffc ++#define BCHP_XPT_MSG_REG_START 0x00a30000 ++#define BCHP_XPT_MSG_REG_END 0x00a3ca14 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb1c ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_START 0x00a3fb20 ++#define BCHP_XPT_MSG_BUF_OVFL_CPU_INTR_AGGREGATOR_REG_END 0x00a3fb3c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb5c ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_START 0x00a3fb60 ++#define BCHP_XPT_MSG_BUF_OVFL_PCI_INTR_AGGREGATOR_REG_END 0x00a3fb7c ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_START 0x00a3fb80 ++#define BCHP_XPT_MSG_DAT_ERR_INTR_L2_REG_END 0x00a3fbac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_START 0x00a3fc00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_00_31_L2_REG_END 0x00a3fc2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_START 0x00a3fc40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_32_63_L2_REG_END 0x00a3fc6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_START 0x00a3fc80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_64_95_L2_REG_END 0x00a3fcac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_START 0x00a3fcc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_96_127_L2_REG_END 0x00a3fcec ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_START 0x00a3fd00 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_128_159_L2_REG_END 0x00a3fd2c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_START 0x00a3fd40 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_160_191_L2_REG_END 0x00a3fd6c ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_START 0x00a3fd80 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_192_223_L2_REG_END 0x00a3fdac ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_START 0x00a3fdc0 ++#define BCHP_XPT_MSG_BUF_DAT_RDY_INTR_224_255_L2_REG_END 0x00a3fdec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_START 0x00a3fe00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_00_31_L2_REG_END 0x00a3fe2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_START 0x00a3fe40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_32_63_L2_REG_END 0x00a3fe6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_START 0x00a3fe80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_64_95_L2_REG_END 0x00a3feac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_START 0x00a3fec0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_96_127_L2_REG_END 0x00a3feec ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_START 0x00a3ff00 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_128_159_L2_REG_END 0x00a3ff2c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_START 0x00a3ff40 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_160_191_L2_REG_END 0x00a3ff6c ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_START 0x00a3ff80 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_192_223_L2_REG_END 0x00a3ffac ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_START 0x00a3ffc0 ++#define BCHP_XPT_MSG_BUF_OVFL_INTR_224_255_L2_REG_END 0x00a3ffec ++#define BCHP_XPT_RAVE_REG_START 0x00a40000 ++#define BCHP_XPT_RAVE_REG_END 0x00a4e174 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_START 0x00a4f000 ++#define BCHP_XPT_RAVE_CPU_INTR_AGGREGATOR_REG_END 0x00a4f01c ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_START 0x00a4f020 ++#define BCHP_XPT_RAVE_PCI_INTR_AGGREGATOR_REG_END 0x00a4f03c ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_START 0x00a4f040 ++#define BCHP_XPT_RAVE_MISC_L2_INTR_REG_END 0x00a4f06c ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f080 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f0ac ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f0c0 ++#define BCHP_XPT_RAVE_EMU_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f0ec ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f100 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f12c ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f140 ++#define BCHP_XPT_RAVE_PUSI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f16c ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f180 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f1ac ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f1c0 ++#define BCHP_XPT_RAVE_TEI_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f1ec ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_START 0x00a4f200 ++#define BCHP_XPT_RAVE_CC_ERROR_CX00_31_L2_INTR_REG_END 0x00a4f22c ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_START 0x00a4f240 ++#define BCHP_XPT_RAVE_CC_ERROR_CX32_47_L2_INTR_REG_END 0x00a4f26c ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f280 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f2ac ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f2c0 ++#define BCHP_XPT_RAVE_CDB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f2ec ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_START 0x00a4f300 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX00_31_L2_INTR_REG_END 0x00a4f32c ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_START 0x00a4f340 ++#define BCHP_XPT_RAVE_ITB_OVERFLOW_CX32_47_L2_INTR_REG_END 0x00a4f36c ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_START 0x00a4f380 ++#define BCHP_XPT_RAVE_SPLICE_CX00_31_L2_INTR_REG_END 0x00a4f3ac ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_START 0x00a4f3c0 ++#define BCHP_XPT_RAVE_SPLICE_CX32_47_L2_INTR_REG_END 0x00a4f3ec ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_START 0x00a4f400 ++#define BCHP_XPT_RAVE_LAST_CMD_CX00_31_L2_INTR_REG_END 0x00a4f42c ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_START 0x00a4f440 ++#define BCHP_XPT_RAVE_LAST_CMD_CX32_47_L2_INTR_REG_END 0x00a4f46c ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f480 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f4ac ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f4c0 ++#define BCHP_XPT_RAVE_CDB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f4ec ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f500 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f52c ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f540 ++#define BCHP_XPT_RAVE_CDB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f56c ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f580 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f5ac ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f5c0 ++#define BCHP_XPT_RAVE_ITB_LOWER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f5ec ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f600 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f62c ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f640 ++#define BCHP_XPT_RAVE_ITB_UPPER_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f66c ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f680 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f6ac ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f6c0 ++#define BCHP_XPT_RAVE_CDB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f6ec ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_START 0x00a4f700 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX00_31_L2_INTR_REG_END 0x00a4f72c ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_START 0x00a4f740 ++#define BCHP_XPT_RAVE_ITB_MIN_DEPTH_THRESH_CX32_47_L2_INTR_REG_END 0x00a4f76c ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_START 0x00a4f780 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX00_31_L2_INTR_REG_END 0x00a4f7ac ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_START 0x00a4f7c0 ++#define BCHP_XPT_RAVE_TSIO_DMA_END_CX32_47_L2_INTR_REG_END 0x00a4f7ec ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_START 0x00a4f800 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX00_31_L2_INTR_REG_END 0x00a4f82c ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_START 0x00a4f840 ++#define BCHP_XPT_RAVE_FW_GENERIC_1_CX32_47_L2_INTR_REG_END 0x00a4f86c ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_START 0x00a4ff80 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_0_31_REG_END 0x00a4ffac ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_START 0x00a4ffc0 ++#define BCHP_XPT_RAVE_TO_SCPU_L2_INTR_32_47_REG_END 0x00a4ffec ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a60000 ++#define BCHP_XPT_MEMDMA_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a6001c ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a60020 ++#define BCHP_XPT_MEMDMA_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a6003c ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a60040 ++#define BCHP_XPT_MEMDMA_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a6006c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a60080 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a600ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a600c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a600ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a60100 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a6012c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a60140 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a6016c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a60180 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a601ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a601c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a601ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a60200 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a6022c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a60240 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a6026c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a60280 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a602ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a602c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a602ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a60300 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a6032c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a60340 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a6036c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a60380 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a603ac ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a603c0 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a603ec ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60400 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6042c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a60440 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a6046c ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a60480 ++#define BCHP_XPT_MEMDMA_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a604ac ++#define BCHP_XPT_MEMDMA_MCPB_REG_START 0x00a60800 ++#define BCHP_XPT_MEMDMA_MCPB_REG_END 0x00a60b98 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_START 0x00a60c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH0_REG_END 0x00a60d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_START 0x00a60e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH1_REG_END 0x00a60f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_START 0x00a61000 ++#define BCHP_XPT_MEMDMA_MCPB_CH2_REG_END 0x00a6115c ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_START 0x00a61200 ++#define BCHP_XPT_MEMDMA_MCPB_CH3_REG_END 0x00a6135c ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_START 0x00a61400 ++#define BCHP_XPT_MEMDMA_MCPB_CH4_REG_END 0x00a6155c ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_START 0x00a61600 ++#define BCHP_XPT_MEMDMA_MCPB_CH5_REG_END 0x00a6175c ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_START 0x00a61800 ++#define BCHP_XPT_MEMDMA_MCPB_CH6_REG_END 0x00a6195c ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_START 0x00a61a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH7_REG_END 0x00a61b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_START 0x00a61c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH8_REG_END 0x00a61d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_START 0x00a61e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH9_REG_END 0x00a61f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_START 0x00a62000 ++#define BCHP_XPT_MEMDMA_MCPB_CH10_REG_END 0x00a6215c ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_START 0x00a62200 ++#define BCHP_XPT_MEMDMA_MCPB_CH11_REG_END 0x00a6235c ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_START 0x00a62400 ++#define BCHP_XPT_MEMDMA_MCPB_CH12_REG_END 0x00a6255c ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_START 0x00a62600 ++#define BCHP_XPT_MEMDMA_MCPB_CH13_REG_END 0x00a6275c ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_START 0x00a62800 ++#define BCHP_XPT_MEMDMA_MCPB_CH14_REG_END 0x00a6295c ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_START 0x00a62a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH15_REG_END 0x00a62b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_START 0x00a62c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH16_REG_END 0x00a62d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_START 0x00a62e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH17_REG_END 0x00a62f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_START 0x00a63000 ++#define BCHP_XPT_MEMDMA_MCPB_CH18_REG_END 0x00a6315c ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_START 0x00a63200 ++#define BCHP_XPT_MEMDMA_MCPB_CH19_REG_END 0x00a6335c ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_START 0x00a63400 ++#define BCHP_XPT_MEMDMA_MCPB_CH20_REG_END 0x00a6355c ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_START 0x00a63600 ++#define BCHP_XPT_MEMDMA_MCPB_CH21_REG_END 0x00a6375c ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_START 0x00a63800 ++#define BCHP_XPT_MEMDMA_MCPB_CH22_REG_END 0x00a6395c ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_START 0x00a63a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH23_REG_END 0x00a63b5c ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_START 0x00a63c00 ++#define BCHP_XPT_MEMDMA_MCPB_CH24_REG_END 0x00a63d5c ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_START 0x00a63e00 ++#define BCHP_XPT_MEMDMA_MCPB_CH25_REG_END 0x00a63f5c ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_START 0x00a64000 ++#define BCHP_XPT_MEMDMA_MCPB_CH26_REG_END 0x00a6415c ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_START 0x00a64200 ++#define BCHP_XPT_MEMDMA_MCPB_CH27_REG_END 0x00a6435c ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_START 0x00a64400 ++#define BCHP_XPT_MEMDMA_MCPB_CH28_REG_END 0x00a6455c ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_START 0x00a64600 ++#define BCHP_XPT_MEMDMA_MCPB_CH29_REG_END 0x00a6475c ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_START 0x00a64800 ++#define BCHP_XPT_MEMDMA_MCPB_CH30_REG_END 0x00a6495c ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_START 0x00a64a00 ++#define BCHP_XPT_MEMDMA_MCPB_CH31_REG_END 0x00a64b5c ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_START 0x00a68000 ++#define BCHP_XPT_WDMA_PCI_INTR_AGGREGATOR_REG_END 0x00a6801c ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_START 0x00a68020 ++#define BCHP_XPT_WDMA_CPU_INTR_AGGREGATOR_REG_END 0x00a6803c ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_START 0x00a68040 ++#define BCHP_XPT_WDMA_SCPU_INTR_AGGREGATOR_REG_END 0x00a6805c ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_START 0x00a68100 ++#define BCHP_XPT_WDMA_BTP_INTR_L2_REG_END 0x00a68144 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_START 0x00a68200 ++#define BCHP_XPT_WDMA_OVERFLOW_INTR_L2_REG_END 0x00a68244 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_START 0x00a68300 ++#define BCHP_XPT_WDMA_DESC_DONE_INTR_L2_REG_END 0x00a68344 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_START 0x00a68400 ++#define BCHP_XPT_WDMA_PM_INTR_L2_REG_END 0x00a68444 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_START 0x00a68500 ++#define BCHP_XPT_WDMA_PM_CONTROL_REG_END 0x00a68510 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_START 0x00a68600 ++#define BCHP_XPT_WDMA_PM_RESULTS_REG_END 0x00a68658 ++#define BCHP_XPT_WDMA_REGS_REG_START 0x00a69000 ++#define BCHP_XPT_WDMA_REGS_REG_END 0x00a69068 ++#define BCHP_XPT_WDMA_RAMS_REG_START 0x00a6a000 ++#define BCHP_XPT_WDMA_RAMS_REG_END 0x00a6bffc ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_START 0x00a6ff00 ++#define BCHP_XPT_MEMDMA_XMEMIF_REG_END 0x00a6fffc ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_START 0x00a70000 ++#define BCHP_XPT_MCPB_CPU_INTR_AGGREGATOR_REG_END 0x00a7001c ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_START 0x00a70020 ++#define BCHP_XPT_MCPB_PCI_INTR_AGGREGATOR_REG_END 0x00a7003c ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_START 0x00a70040 ++#define BCHP_XPT_MCPB_DESC_DONE_INTR_L2_REG_END 0x00a7006c ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_START 0x00a70080 ++#define BCHP_XPT_MCPB_MISC_FALSE_WAKE_INTR_L2_REG_END 0x00a700ac ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_START 0x00a700c0 ++#define BCHP_XPT_MCPB_MISC_OOS_INTR_L2_REG_END 0x00a700ec ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_START 0x00a70100 ++#define BCHP_XPT_MCPB_MISC_TS_PARITY_ERR_INTR_L2_REG_END 0x00a7012c ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_START 0x00a70140 ++#define BCHP_XPT_MCPB_MISC_TEI_INTR_L2_REG_END 0x00a7016c ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_START 0x00a70180 ++#define BCHP_XPT_MCPB_MISC_ASF_LEN_ERR_INTR_L2_REG_END 0x00a701ac ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_START 0x00a701c0 ++#define BCHP_XPT_MCPB_MISC_WATCHDOG_TIMEOUT_OR_ASF_FATAL_ERR_INTR_L2_REG_END 0x00a701ec ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_START 0x00a70200 ++#define BCHP_XPT_MCPB_MISC_ASF_COMPRESSED_DATA_RECEIVED_INTR_L2_REG_END 0x00a7022c ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_START 0x00a70240 ++#define BCHP_XPT_MCPB_MISC_ASF_PROTOCOL_ERR_INTR_L2_REG_END 0x00a7026c ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_START 0x00a70280 ++#define BCHP_XPT_MCPB_MISC_ASF_PADDING_LEN_ERR_INTR_L2_REG_END 0x00a702ac ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_START 0x00a702c0 ++#define BCHP_XPT_MCPB_MISC_TS_RANGE_ERR_INTR_L2_REG_END 0x00a702ec ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_START 0x00a70300 ++#define BCHP_XPT_MCPB_MISC_PES_NEXT_TS_RANGE_ERR_INTR_L2_REG_END 0x00a7032c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_START 0x00a70340 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_READ_INTR_L2_REG_END 0x00a7036c ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_START 0x00a70380 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AT_DESC_END_INTR_L2_REG_END 0x00a703ac ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_START 0x00a703c0 ++#define BCHP_XPT_MCPB_MISC_PAUSE_AFTER_GROUP_PACKETS_INTR_L2_REG_END 0x00a703ec ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70400 ++#define BCHP_XPT_MCPB_MISC_DESC_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7042c ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_START 0x00a70440 ++#define BCHP_XPT_MCPB_MISC_DATA_TAGID_MISMATCH_INTR_L2_REG_END 0x00a7046c ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_START 0x00a70480 ++#define BCHP_XPT_MCPB_MISC_CRC_COMPARE_ERROR_INTR_L2_REG_END 0x00a704ac ++#define BCHP_XPT_MCPB_REG_START 0x00a70800 ++#define BCHP_XPT_MCPB_REG_END 0x00a70b98 ++#define BCHP_XPT_MCPB_CH0_REG_START 0x00a70c00 ++#define BCHP_XPT_MCPB_CH0_REG_END 0x00a70d5c ++#define BCHP_XPT_MCPB_CH1_REG_START 0x00a70e00 ++#define BCHP_XPT_MCPB_CH1_REG_END 0x00a70f5c ++#define BCHP_XPT_MCPB_CH2_REG_START 0x00a71000 ++#define BCHP_XPT_MCPB_CH2_REG_END 0x00a7115c ++#define BCHP_XPT_MCPB_CH3_REG_START 0x00a71200 ++#define BCHP_XPT_MCPB_CH3_REG_END 0x00a7135c ++#define BCHP_XPT_MCPB_CH4_REG_START 0x00a71400 ++#define BCHP_XPT_MCPB_CH4_REG_END 0x00a7155c ++#define BCHP_XPT_MCPB_CH5_REG_START 0x00a71600 ++#define BCHP_XPT_MCPB_CH5_REG_END 0x00a7175c ++#define BCHP_XPT_MCPB_CH6_REG_START 0x00a71800 ++#define BCHP_XPT_MCPB_CH6_REG_END 0x00a7195c ++#define BCHP_XPT_MCPB_CH7_REG_START 0x00a71a00 ++#define BCHP_XPT_MCPB_CH7_REG_END 0x00a71b5c ++#define BCHP_XPT_MCPB_CH8_REG_START 0x00a71c00 ++#define BCHP_XPT_MCPB_CH8_REG_END 0x00a71d5c ++#define BCHP_XPT_MCPB_CH9_REG_START 0x00a71e00 ++#define BCHP_XPT_MCPB_CH9_REG_END 0x00a71f5c ++#define BCHP_XPT_MCPB_CH10_REG_START 0x00a72000 ++#define BCHP_XPT_MCPB_CH10_REG_END 0x00a7215c ++#define BCHP_XPT_MCPB_CH11_REG_START 0x00a72200 ++#define BCHP_XPT_MCPB_CH11_REG_END 0x00a7235c ++#define BCHP_XPT_MCPB_CH12_REG_START 0x00a72400 ++#define BCHP_XPT_MCPB_CH12_REG_END 0x00a7255c ++#define BCHP_XPT_MCPB_CH13_REG_START 0x00a72600 ++#define BCHP_XPT_MCPB_CH13_REG_END 0x00a7275c ++#define BCHP_XPT_MCPB_CH14_REG_START 0x00a72800 ++#define BCHP_XPT_MCPB_CH14_REG_END 0x00a7295c ++#define BCHP_XPT_MCPB_CH15_REG_START 0x00a72a00 ++#define BCHP_XPT_MCPB_CH15_REG_END 0x00a72b5c ++#define BCHP_XPT_MCPB_CH16_REG_START 0x00a72c00 ++#define BCHP_XPT_MCPB_CH16_REG_END 0x00a72d5c ++#define BCHP_XPT_MCPB_CH17_REG_START 0x00a72e00 ++#define BCHP_XPT_MCPB_CH17_REG_END 0x00a72f5c ++#define BCHP_XPT_MCPB_CH18_REG_START 0x00a73000 ++#define BCHP_XPT_MCPB_CH18_REG_END 0x00a7315c ++#define BCHP_XPT_MCPB_CH19_REG_START 0x00a73200 ++#define BCHP_XPT_MCPB_CH19_REG_END 0x00a7335c ++#define BCHP_XPT_MCPB_CH20_REG_START 0x00a73400 ++#define BCHP_XPT_MCPB_CH20_REG_END 0x00a7355c ++#define BCHP_XPT_MCPB_CH21_REG_START 0x00a73600 ++#define BCHP_XPT_MCPB_CH21_REG_END 0x00a7375c ++#define BCHP_XPT_MCPB_CH22_REG_START 0x00a73800 ++#define BCHP_XPT_MCPB_CH22_REG_END 0x00a7395c ++#define BCHP_XPT_MCPB_CH23_REG_START 0x00a73a00 ++#define BCHP_XPT_MCPB_CH23_REG_END 0x00a73b5c ++#define BCHP_XPT_MCPB_CH24_REG_START 0x00a73c00 ++#define BCHP_XPT_MCPB_CH24_REG_END 0x00a73d5c ++#define BCHP_XPT_MCPB_CH25_REG_START 0x00a73e00 ++#define BCHP_XPT_MCPB_CH25_REG_END 0x00a73f5c ++#define BCHP_XPT_MCPB_CH26_REG_START 0x00a74000 ++#define BCHP_XPT_MCPB_CH26_REG_END 0x00a7415c ++#define BCHP_XPT_MCPB_CH27_REG_START 0x00a74200 ++#define BCHP_XPT_MCPB_CH27_REG_END 0x00a7435c ++#define BCHP_XPT_MCPB_CH28_REG_START 0x00a74400 ++#define BCHP_XPT_MCPB_CH28_REG_END 0x00a7455c ++#define BCHP_XPT_MCPB_CH29_REG_START 0x00a74600 ++#define BCHP_XPT_MCPB_CH29_REG_END 0x00a7475c ++#define BCHP_XPT_MCPB_CH30_REG_START 0x00a74800 ++#define BCHP_XPT_MCPB_CH30_REG_END 0x00a7495c ++#define BCHP_XPT_MCPB_CH31_REG_START 0x00a74a00 ++#define BCHP_XPT_MCPB_CH31_REG_END 0x00a74b5c ++#define BCHP_XPT_XPU_REG_START 0x00a78000 ++#define BCHP_XPT_XPU_REG_END 0x00a7c7fc ++#define BCHP_XPT_SECURE_BUS_IF_REG_START 0x00a7f000 ++#define BCHP_XPT_SECURE_BUS_IF_REG_END 0x00a7f000 ++#define BCHP_SWITCH_CORE_REG_START 0x00b00000 ++#define BCHP_SWITCH_CORE_REG_END 0x00b3fffc ++#define BCHP_SWITCH_REG_REG_START 0x00b40000 ++#define BCHP_SWITCH_REG_REG_END 0x00b4010c ++#define BCHP_SWITCH_INDIR_RW_REG_START 0x00b40300 ++#define BCHP_SWITCH_INDIR_RW_REG_END 0x00b40314 ++#define BCHP_SWITCH_INTRL2_0_REG_START 0x00b40340 ++#define BCHP_SWITCH_INTRL2_0_REG_END 0x00b4036c ++#define BCHP_SWITCH_INTRL2_1_REG_START 0x00b40380 ++#define BCHP_SWITCH_INTRL2_1_REG_END 0x00b403ac ++#define BCHP_SWITCH_MDIO_REG_START 0x00b403c0 ++#define BCHP_SWITCH_MDIO_REG_END 0x00b403c4 ++#define BCHP_SWITCH_FCB_REG_START 0x00b40400 ++#define BCHP_SWITCH_FCB_REG_END 0x00b40430 ++#define BCHP_SWITCH_ACB_REG_START 0x00b40600 ++#define BCHP_SWITCH_ACB_REG_END 0x00b40804 ++#define BCHP_SID_REG_START 0x00bc0100 ++#define BCHP_SID_REG_END 0x00bc019c ++#define BCHP_SID_RLE_REG_START 0x00bc0300 ++#define BCHP_SID_RLE_REG_END 0x00bc039c ++#define BCHP_SID_DQ_REG_START 0x00bc0400 ++#define BCHP_SID_DQ_REG_END 0x00bc04bc ++#define BCHP_SID_STRM_REG_START 0x00bc0800 ++#define BCHP_SID_STRM_REG_END 0x00bc087c ++#define BCHP_SID_OUTPUT_REG_START 0x00bc0c00 ++#define BCHP_SID_OUTPUT_REG_END 0x00bc0c40 ++#define BCHP_SID_ARC_REG_START 0x00bc0f00 ++#define BCHP_SID_ARC_REG_END 0x00bc0f3c ++#define BCHP_SID_ARCDMA_REG_START 0x00bc1800 ++#define BCHP_SID_ARCDMA_REG_END 0x00bc1840 ++#define BCHP_SID_DMARAM_REG_START 0x00bc1a00 ++#define BCHP_SID_DMARAM_REG_END 0x00bc1bfc ++#define BCHP_SID_PEEK_BITS_REG_START 0x00bc2b00 ++#define BCHP_SID_PEEK_BITS_REG_END 0x00bc2b3c ++#define BCHP_SID_EXTRACT_BITS_REG_START 0x00bc2b40 ++#define BCHP_SID_EXTRACT_BITS_REG_END 0x00bc2b7c ++#define BCHP_SID_HUFF_SYMB_REG_START 0x00bc3000 ++#define BCHP_SID_HUFF_SYMB_REG_END 0x00bc37fc ++#define BCHP_SID_HUFF_CODE_REG_START 0x00bc3900 ++#define BCHP_SID_HUFF_CODE_REG_END 0x00bc39fc ++#define BCHP_SID_SYMB_REG_START 0x00bc3a00 ++#define BCHP_SID_SYMB_REG_END 0x00bc3a10 ++#define BCHP_SID_SYMB_JPEG_REG_START 0x00bc3a80 ++#define BCHP_SID_SYMB_JPEG_REG_END 0x00bc3a8c ++#define BCHP_SID_BIGRAM_REG_START 0x00bc8000 ++#define BCHP_SID_BIGRAM_REG_END 0x00bcfffc ++#define BCHP_SID_ARC_DBG_REG_START 0x00bd1000 ++#define BCHP_SID_ARC_DBG_REG_END 0x00bd1010 ++#define BCHP_SID_ARC_CORE_REG_START 0x00bd5000 ++#define BCHP_SID_ARC_CORE_REG_END 0x00bd5014 ++#define BCHP_SID_GR_REG_START 0x00be0000 ++#define BCHP_SID_GR_REG_END 0x00be000c ++#define BCHP_SID_L2_REG_START 0x00be0100 ++#define BCHP_SID_L2_REG_END 0x00be012c ++#define BCHP_SICH_REG_START 0x00be2000 ++#define BCHP_SICH_REG_END 0x00be203c ++#define BCHP_M2MC_REG_START 0x00be4000 ++#define BCHP_M2MC_REG_END 0x00be47fc ++#define BCHP_M2MC_L2_REG_START 0x00be5000 ++#define BCHP_M2MC_L2_REG_END 0x00be502c ++#define BCHP_M2MC_GR_REG_START 0x00be5800 ++#define BCHP_M2MC_GR_REG_END 0x00be580c ++#define BCHP_M2MC1_REG_START 0x00be6000 ++#define BCHP_M2MC1_REG_END 0x00be67fc ++#define BCHP_M2MC1_L2_REG_START 0x00be7000 ++#define BCHP_M2MC1_L2_REG_END 0x00be702c ++#define BCHP_M2MC1_GR_REG_START 0x00be7800 ++#define BCHP_M2MC1_GR_REG_END 0x00be780c ++#define BCHP_V3D_CTL_REG_START 0x00bea000 ++#define BCHP_V3D_CTL_REG_END 0x00bea040 ++#define BCHP_V3D_CLE_REG_START 0x00bea100 ++#define BCHP_V3D_CLE_REG_END 0x00bea138 ++#define BCHP_V3D_PTB_REG_START 0x00bea300 ++#define BCHP_V3D_PTB_REG_END 0x00bea310 ++#define BCHP_V3D_QPS_REG_START 0x00bea400 ++#define BCHP_V3D_QPS_REG_END 0x00bea43c ++#define BCHP_V3D_VPM_REG_START 0x00bea500 ++#define BCHP_V3D_VPM_REG_END 0x00bea504 ++#define BCHP_V3D_PCTR_REG_START 0x00bea600 ++#define BCHP_V3D_PCTR_REG_END 0x00bea6fc ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_START 0x00bea800 ++#define BCHP_V3D_TOP_GR_BRIDGE_REG_END 0x00bea80c ++#define BCHP_V3D_GCA_REG_START 0x00beaa00 ++#define BCHP_V3D_GCA_REG_END 0x00beaa64 ++#define BCHP_V3D_DBG_REG_START 0x00beae00 ++#define BCHP_V3D_DBG_REG_END 0x00beaf20 ++#define BCHP_RAAGA_DSP_SEC0_REG_START 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_REG_END 0x00bf0000 ++#define BCHP_RAAGA_DSP_SEC0_1_REG_START 0x00bf1000 ++#define BCHP_RAAGA_DSP_SEC0_1_REG_END 0x00bf1000 ++#define BCHP_RAAGA_DSP_RGR_REG_START 0x00c00000 ++#define BCHP_RAAGA_DSP_RGR_REG_END 0x00c00008 ++#define BCHP_RAAGA_DSP_MISC_REG_START 0x00c20000 ++#define BCHP_RAAGA_DSP_MISC_REG_END 0x00c2044c ++#define BCHP_RAAGA_DSP_TIMERS_REG_START 0x00c21000 ++#define BCHP_RAAGA_DSP_TIMERS_REG_END 0x00c21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START 0x00c21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END 0x00c2109c ++#define BCHP_RAAGA_DSP_PERI_SW_REG_START 0x00c21100 ++#define BCHP_RAAGA_DSP_PERI_SW_REG_END 0x00c21154 ++#define BCHP_RAAGA_DSP_DMA_REG_START 0x00c21400 ++#define BCHP_RAAGA_DSP_DMA_REG_END 0x00c21664 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_START 0x00c22000 ++#define BCHP_RAAGA_DSP_ESR_SI_REG_END 0x00c22014 ++#define BCHP_RAAGA_DSP_INTH_REG_START 0x00c22200 ++#define BCHP_RAAGA_DSP_INTH_REG_END 0x00c2222c ++#define BCHP_RAAGA_DSP_FW_INTH_REG_START 0x00c22400 ++#define BCHP_RAAGA_DSP_FW_INTH_REG_END 0x00c2242c ++#define BCHP_RAAGA_DSP_FW_CFG_REG_START 0x00c23000 ++#define BCHP_RAAGA_DSP_FW_CFG_REG_END 0x00c2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START 0x00c30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END 0x00c3bffc ++#define BCHP_AUD_MISC_REG_START 0x00c80000 ++#define BCHP_AUD_MISC_REG_END 0x00c80120 ++#define BCHP_AUD_INTH_REG_START 0x00c80800 ++#define BCHP_AUD_INTH_REG_END 0x00c8082c ++#define BCHP_AUD_FMM_BF_CTRL_REG_START 0x00ca0000 ++#define BCHP_AUD_FMM_BF_CTRL_REG_END 0x00ca0d3c ++#define BCHP_AUD_FMM_BF_ESR_REG_START 0x00ca1000 ++#define BCHP_AUD_FMM_BF_ESR_REG_END 0x00ca1074 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_START 0x00ca2000 ++#define BCHP_AUD_FMM_SRC_CTRL0_REG_END 0x00ca2bfc ++#define BCHP_AUD_FMM_SRC_ESR0_REG_START 0x00ca3000 ++#define BCHP_AUD_FMM_SRC_ESR0_REG_END 0x00ca3014 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_START 0x00ca4000 ++#define BCHP_AUD_FMM_DP_CTRL0_REG_END 0x00ca612c ++#define BCHP_AUD_FMM_DP_ESR0_REG_START 0x00ca7c00 ++#define BCHP_AUD_FMM_DP_ESR0_REG_END 0x00ca7c2c ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_START 0x00cb0000 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_0_REG_END 0x00cb0084 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_START 0x00cb0100 ++#define BCHP_AUD_FMM_IOP_OUT_I2S_STEREO_1_REG_END 0x00cb0184 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_START 0x00cb0200 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_0_REG_END 0x00cb0284 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_START 0x00cb0300 ++#define BCHP_AUD_FMM_IOP_OUT_SPDIF_1_REG_END 0x00cb0384 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_START 0x00cb0400 ++#define BCHP_AUD_FMM_IOP_OUT_MAI_0_REG_END 0x00cb04b4 ++#define BCHP_HIFIDAC_CTRL_0_REG_START 0x00cb0800 ++#define BCHP_HIFIDAC_CTRL_0_REG_END 0x00cb09fc ++#define BCHP_HIFIDAC_RM_0_REG_START 0x00cb0a00 ++#define BCHP_HIFIDAC_RM_0_REG_END 0x00cb0a30 ++#define BCHP_HIFIDAC_ESR_0_REG_START 0x00cb0b00 ++#define BCHP_HIFIDAC_ESR_0_REG_END 0x00cb0b14 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_START 0x00cb0c00 ++#define BCHP_AUD_FMM_IOP_OUT_DAC_CTRL_0_REG_END 0x00cb0c98 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_START 0x00cb0d00 ++#define BCHP_AUD_FMM_IOP_PLL_0_REG_END 0x00cb0d88 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_START 0x00cb0e00 ++#define BCHP_AUD_FMM_IOP_PLL_1_REG_END 0x00cb0e88 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_START 0x00cb0f00 ++#define BCHP_AUD_FMM_IOP_PLL_2_REG_END 0x00cb0f88 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_START 0x00cb1000 ++#define BCHP_AUD_FMM_IOP_NCO_0_REG_END 0x00cb1030 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_START 0x00cb1100 ++#define BCHP_AUD_FMM_IOP_NCO_1_REG_END 0x00cb1130 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_START 0x00cb1200 ++#define BCHP_AUD_FMM_IOP_NCO_2_REG_END 0x00cb1230 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_START 0x00cb1300 ++#define BCHP_AUD_FMM_IOP_NCO_3_REG_END 0x00cb1330 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_START 0x00cb1400 ++#define BCHP_AUD_FMM_IOP_NCO_4_REG_END 0x00cb1430 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_START 0x00cb1500 ++#define BCHP_AUD_FMM_IOP_NCO_5_REG_END 0x00cb1530 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_START 0x00cb1600 ++#define BCHP_AUD_FMM_IOP_NCO_6_REG_END 0x00cb1630 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_START 0x00cb1800 ++#define BCHP_AUD_FMM_IOP_LOOPBACK_0_REG_END 0x00cb1924 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_START 0x00cb1a00 ++#define BCHP_AUD_FMM_IOP_DUMMYSINK_0_REG_END 0x00cb1a5c ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_START 0x00cb2000 ++#define BCHP_AUD_FMM_IOP_IN_SPDIF_0_REG_END 0x00cb20fc ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_START 0x00cb2800 ++#define BCHP_AUD_FMM_IOP_IN_HDMI_0_REG_END 0x00cb28ac ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_START 0x00cb3000 ++#define BCHP_AUD_FMM_IOP_IN_I2S_STEREO_0_REG_END 0x00cb3064 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_START 0x00cb3100 ++#define BCHP_AUD_FMM_IOP_ATTG_0_REG_END 0x00cb3164 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_START 0x00cb4000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_0_REG_END 0x00cb41fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_START 0x00cb4400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_0_REG_END 0x00cb4414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_START 0x00cb6000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_0_REG_END 0x00cb7bfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_START 0x00cb7d00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_0_REG_END 0x00cb7d14 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_START 0x00cb8000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_CFG_1_REG_END 0x00cb81fc ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_START 0x00cb8400 ++#define BCHP_AUD_FMM_IOP_OUT_MS_STRM_ESR_1_REG_END 0x00cb8414 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_START 0x00cba000 ++#define BCHP_AUD_FMM_IOP_OUT_MS_CTRL_1_REG_END 0x00cbbbfc ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_START 0x00cbbd00 ++#define BCHP_AUD_FMM_IOP_OUT_MS_ESR_1_REG_END 0x00cbbd14 ++#define BCHP_AUD_FMM_IOP_MISC_REG_START 0x00cbc100 ++#define BCHP_AUD_FMM_IOP_MISC_REG_END 0x00cbc154 ++#define BCHP_RAAGA_DSP_RGR_1_REG_START 0x00d00000 ++#define BCHP_RAAGA_DSP_RGR_1_REG_END 0x00d00008 ++#define BCHP_RAAGA_DSP_MISC_1_REG_START 0x00d20000 ++#define BCHP_RAAGA_DSP_MISC_1_REG_END 0x00d2044c ++#define BCHP_RAAGA_DSP_TIMERS_1_REG_START 0x00d21000 ++#define BCHP_RAAGA_DSP_TIMERS_1_REG_END 0x00d21058 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_1_REG_START 0x00d21080 ++#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_1_REG_END 0x00d2109c ++#define BCHP_RAAGA_DSP_PERI_SW_1_REG_START 0x00d21100 ++#define BCHP_RAAGA_DSP_PERI_SW_1_REG_END 0x00d21154 ++#define BCHP_RAAGA_DSP_DMA_1_REG_START 0x00d21400 ++#define BCHP_RAAGA_DSP_DMA_1_REG_END 0x00d21664 ++#define BCHP_RAAGA_DSP_ESR_SI_1_REG_START 0x00d22000 ++#define BCHP_RAAGA_DSP_ESR_SI_1_REG_END 0x00d22014 ++#define BCHP_RAAGA_DSP_INTH_1_REG_START 0x00d22200 ++#define BCHP_RAAGA_DSP_INTH_1_REG_END 0x00d2222c ++#define BCHP_RAAGA_DSP_FW_INTH_1_REG_START 0x00d22400 ++#define BCHP_RAAGA_DSP_FW_INTH_1_REG_END 0x00d2242c ++#define BCHP_RAAGA_DSP_FW_CFG_1_REG_START 0x00d23000 ++#define BCHP_RAAGA_DSP_FW_CFG_1_REG_END 0x00d2357c ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_1_REG_START 0x00d30000 ++#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_1_REG_END 0x00d3bffc ++#define BCHP_DATA_MEM_REG_START 0x00e00000 ++#define BCHP_DATA_MEM_REG_END 0x00e47ffc ++#define BCHP_CNTL_MEM_REG_START 0x00f20000 ++#define BCHP_CNTL_MEM_REG_END 0x00f67ffc ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END 0x00fc0000 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END 0x00fc0010 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END 0x00fc0020 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END 0x00fc0030 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END 0x00fc0040 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END 0x00fc0050 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END 0x00fc0060 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END 0x00fc0070 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END 0x00fc0080 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END 0x00fc0090 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END 0x00fc00a0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END 0x00fc00b0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END 0x00fc00c0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END 0x00fc00d0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END 0x00fc00e0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END 0x00fc00f0 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END 0x00fc0100 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END 0x00fc0110 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END 0x00fc0120 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END 0x00fc0130 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START 0x00fc0800 ++#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END 0x00fc0800 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END 0x00fc4000 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END 0x00fc4010 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END 0x00fc4020 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END 0x00fc4030 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END 0x00fc4040 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END 0x00fc4050 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END 0x00fc4060 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END 0x00fc4070 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END 0x00fc4080 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END 0x00fc4090 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END 0x00fc40a0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END 0x00fc40b0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END 0x00fc40c0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END 0x00fc40d0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END 0x00fc40e0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END 0x00fc40f0 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END 0x00fc4100 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END 0x00fc4110 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END 0x00fc4120 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END 0x00fc4130 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END 0x00fc4200 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END 0x00fc4210 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END 0x00fc4220 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END 0x00fc4230 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END 0x00fc4240 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END 0x00fc4250 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END 0x00fc4260 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END 0x00fc4270 ++#define BCHP_DMA_AHB_CMD_TX0_REG_START 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX0_REG_END 0x00fc4800 ++#define BCHP_DMA_AHB_CMD_TX1_REG_START 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_TX1_REG_END 0x00fc4a00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_START 0x00fc4c00 ++#define BCHP_DMA_AHB_CMD_CONF0_REG_END 0x00fc4c00 ++#define BCHP_MAC_AHB_REG_START 0x00fc5000 ++#define BCHP_MAC_AHB_REG_END 0x00fc500c ++#define BCHP_LLM_AHB_REG_START 0x00fc8000 ++#define BCHP_LLM_AHB_REG_END 0x00fc805c ++#define BCHP_PHY_REG_START 0x00fe0000 ++#define BCHP_PHY_REG_END 0x00fe47fc ++#define BCHP_ECL_REG_START 0x00fe8000 ++#define BCHP_ECL_REG_END 0x00fecb20 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START 0x00fed000 ++#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END 0x00fed014 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START 0x00fed040 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END 0x00fed06c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START 0x00fed080 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END 0x00fed0ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START 0x00fed0c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END 0x00fed0ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START 0x00fed100 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END 0x00fed12c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START 0x00fed140 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END 0x00fed16c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START 0x00fed180 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END 0x00fed1ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START 0x00fed1c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END 0x00fed1ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START 0x00fed200 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END 0x00fed22c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START 0x00fed240 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END 0x00fed26c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START 0x00fed280 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END 0x00fed2ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START 0x00fed2c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END 0x00fed2ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START 0x00fed300 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END 0x00fed32c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START 0x00fed340 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END 0x00fed36c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START 0x00fed380 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END 0x00fed3ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START 0x00fed3c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END 0x00fed3ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START 0x00fed400 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END 0x00fed42c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START 0x00fed440 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END 0x00fed46c ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START 0x00fed480 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END 0x00fed4ac ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START 0x00fed4c0 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END 0x00fed4ec ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START 0x00fed500 ++#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END 0x00fed52c ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START 0x00fed800 ++#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END 0x00fed828 ++#define BCHP_GMII_REG_START 0x00fedc00 ++#define BCHP_GMII_REG_END 0x00fedc58 ++#define BCHP_MAC_APB_REG_START 0x00ff0000 ++#define BCHP_MAC_APB_REG_END 0x00ff14fc ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START 0x00ff4000 ++#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END 0x00ff4014 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START 0x00ff4040 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END 0x00ff406c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START 0x00ff4080 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END 0x00ff40ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START 0x00ff40c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END 0x00ff40ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START 0x00ff4100 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END 0x00ff412c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START 0x00ff4140 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END 0x00ff416c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START 0x00ff4180 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END 0x00ff41ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START 0x00ff41c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END 0x00ff41ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START 0x00ff4200 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END 0x00ff422c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START 0x00ff4240 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END 0x00ff426c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START 0x00ff4280 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END 0x00ff42ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START 0x00ff42c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END 0x00ff42ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START 0x00ff4300 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END 0x00ff432c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START 0x00ff4340 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END 0x00ff436c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START 0x00ff4380 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END 0x00ff43ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START 0x00ff43c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END 0x00ff43ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START 0x00ff4400 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END 0x00ff442c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START 0x00ff4440 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END 0x00ff446c ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START 0x00ff4480 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END 0x00ff44ac ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START 0x00ff44c0 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END 0x00ff44ec ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START 0x00ff4500 ++#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END 0x00ff452c ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START 0x00ff4800 ++#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END 0x00ff4814 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START 0x00ff4840 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END 0x00ff486c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START 0x00ff4880 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END 0x00ff48ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START 0x00ff48c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END 0x00ff48ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START 0x00ff4900 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END 0x00ff492c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START 0x00ff4940 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END 0x00ff496c ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START 0x00ff4980 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END 0x00ff49ac ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START 0x00ff49c0 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END 0x00ff49ec ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START 0x00ff4a00 ++#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END 0x00ff4a2c ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START 0x00ff6000 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END 0x00ff6028 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START 0x00ff6400 ++#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END 0x00ff6428 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START 0x00ff6800 ++#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END 0x00ff6828 ++#define BCHP_MOCA_INTC_L2_HI_REG_START 0x00ff8000 ++#define BCHP_MOCA_INTC_L2_HI_REG_END 0x00ff8584 ++#define BCHP_MOCA_INTC_L2_LO_REG_START 0x00ff8800 ++#define BCHP_MOCA_INTC_L2_LO_REG_END 0x00ff8d84 ++#define BCHP_LLM_APB_REG_START 0x00ffc000 ++#define BCHP_LLM_APB_REG_END 0x00ffd00c ++#define BCHP_TRX_REG_START 0x00ffe000 ++#define BCHP_TRX_REG_END 0x00ffe1fc ++#define BCHP_MOCA_TIMER_REG_START 0x00ffe400 ++#define BCHP_MOCA_TIMER_REG_END 0x00ffe4ec ++#define BCHP_MOCA_GPIO_REG_START 0x00ffe800 ++#define BCHP_MOCA_GPIO_REG_END 0x00ffe818 ++#define BCHP_EXTRAS_REG_START 0x00ffec00 ++#define BCHP_EXTRAS_REG_END 0x00ffed18 ++#define BCHP_MOCA_BSC_REG_START 0x00fff000 ++#define BCHP_MOCA_BSC_REG_END 0x00fff058 ++#define BCHP_MOCA_HOSTM2M_REG_START 0x00fffc00 ++#define BCHP_MOCA_HOSTM2M_REG_END 0x00fffc14 ++#define BCHP_AHB_M2M_DMA_REG_START 0x00fffc20 ++#define BCHP_AHB_M2M_DMA_REG_END 0x00fffc2c ++#define BCHP_MOCA_L2_REG_START 0x00fffc40 ++#define BCHP_MOCA_L2_REG_END 0x00fffc6c ++#define BCHP_MOCA_GR_BRIDGE_REG_START 0x00fffc80 ++#define BCHP_MOCA_GR_BRIDGE_REG_END 0x00fffc8c ++#define BCHP_MOCA_HOSTMISC_REG_START 0x00fffd00 ++#define BCHP_MOCA_HOSTMISC_REG_END 0x00fffd9c ++#define BCHP_MEMC_GEN_0_REG_START 0x01100000 ++#define BCHP_MEMC_GEN_0_REG_END 0x011007fc ++#define BCHP_MEMC_EDIS_0_0_REG_START 0x01100800 ++#define BCHP_MEMC_EDIS_0_0_REG_END 0x011008fc ++#define BCHP_MEMC_EDIS_0_1_REG_START 0x01100a00 ++#define BCHP_MEMC_EDIS_0_1_REG_END 0x01100afc ++#define BCHP_MEMC_ARC_0_REG_START 0x01100c00 ++#define BCHP_MEMC_ARC_0_REG_END 0x01100f74 ++#define BCHP_MEMC_ARB_0_REG_START 0x01101000 ++#define BCHP_MEMC_ARB_0_REG_END 0x011014cc ++#define BCHP_MEMC_DDR_0_REG_START 0x01102000 ++#define BCHP_MEMC_DDR_0_REG_END 0x011027fc ++#define BCHP_MEMC_L2_0_0_REG_START 0x01103000 ++#define BCHP_MEMC_L2_0_0_REG_END 0x01103044 ++#define BCHP_MEMC_L2_0_1_REG_START 0x01103200 ++#define BCHP_MEMC_L2_0_1_REG_END 0x01103244 ++#define BCHP_MEMC_L2_0_2_REG_START 0x01103400 ++#define BCHP_MEMC_L2_0_2_REG_END 0x01103444 ++#define BCHP_MEMC_TRACELOG_0_0_REG_START 0x01103800 ++#define BCHP_MEMC_TRACELOG_0_0_REG_END 0x011039fc ++#define BCHP_MEMC_RGRB_0_REG_START 0x01104000 ++#define BCHP_MEMC_RGRB_0_REG_END 0x01104010 ++#define BCHP_MEMC_MISC_0_REG_START 0x01105000 ++#define BCHP_MEMC_MISC_0_REG_END 0x01105010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_START 0x01106000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_0_REG_END 0x01106218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_START 0x01106400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_0_REG_END 0x01106518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_START 0x01106600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_0_REG_END 0x01106718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_START 0x01106800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_0_REG_END 0x01106918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_START 0x01106a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_0_REG_END 0x01106b18 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_START 0x01106c00 ++#define BCHP_DDR34_PHY_ECC_LANE_0_REG_END 0x01106d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_START 0x01108000 ++#define BCHP_SHIMPHY_ADDR_CNTL_0_REG_END 0x011080e0 ++#define BCHP_MEMC_SENTINEL_0_0_REG_START 0x01140000 ++#define BCHP_MEMC_SENTINEL_0_0_REG_END 0x0117fffc ++#define BCHP_MEMC_GEN_1_REG_START 0x01180000 ++#define BCHP_MEMC_GEN_1_REG_END 0x011807fc ++#define BCHP_MEMC_EDIS_1_0_REG_START 0x01180800 ++#define BCHP_MEMC_EDIS_1_0_REG_END 0x011808fc ++#define BCHP_MEMC_EDIS_1_1_REG_START 0x01180a00 ++#define BCHP_MEMC_EDIS_1_1_REG_END 0x01180afc ++#define BCHP_MEMC_ARC_1_REG_START 0x01180c00 ++#define BCHP_MEMC_ARC_1_REG_END 0x01180f74 ++#define BCHP_MEMC_ARB_1_REG_START 0x01181000 ++#define BCHP_MEMC_ARB_1_REG_END 0x011814cc ++#define BCHP_MEMC_DDR_1_REG_START 0x01182000 ++#define BCHP_MEMC_DDR_1_REG_END 0x011827fc ++#define BCHP_MEMC_L2_1_0_REG_START 0x01183000 ++#define BCHP_MEMC_L2_1_0_REG_END 0x01183044 ++#define BCHP_MEMC_L2_1_1_REG_START 0x01183200 ++#define BCHP_MEMC_L2_1_1_REG_END 0x01183244 ++#define BCHP_MEMC_L2_1_2_REG_START 0x01183400 ++#define BCHP_MEMC_L2_1_2_REG_END 0x01183444 ++#define BCHP_MEMC_TRACELOG_0_1_REG_START 0x01183800 ++#define BCHP_MEMC_TRACELOG_0_1_REG_END 0x011839fc ++#define BCHP_MEMC_RGRB_1_REG_START 0x01184000 ++#define BCHP_MEMC_RGRB_1_REG_END 0x01184010 ++#define BCHP_MEMC_MISC_1_REG_START 0x01185000 ++#define BCHP_MEMC_MISC_1_REG_END 0x01185010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_START 0x01186000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_1_REG_END 0x01186218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_START 0x01186400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_1_REG_END 0x01186518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_START 0x01186600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_1_REG_END 0x01186718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_START 0x01186800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_1_REG_END 0x01186918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_START 0x01186a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_1_REG_END 0x01186b18 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_START 0x01186c00 ++#define BCHP_DDR34_PHY_ECC_LANE_1_REG_END 0x01186d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_START 0x01188000 ++#define BCHP_SHIMPHY_ADDR_CNTL_1_REG_END 0x011880e0 ++#define BCHP_MEMC_SENTINEL_0_1_REG_START 0x011c0000 ++#define BCHP_MEMC_SENTINEL_0_1_REG_END 0x011ffffc ++#define BCHP_MEMC_GEN_2_REG_START 0x01200000 ++#define BCHP_MEMC_GEN_2_REG_END 0x012007fc ++#define BCHP_MEMC_EDIS_2_0_REG_START 0x01200800 ++#define BCHP_MEMC_EDIS_2_0_REG_END 0x012008fc ++#define BCHP_MEMC_EDIS_2_1_REG_START 0x01200a00 ++#define BCHP_MEMC_EDIS_2_1_REG_END 0x01200afc ++#define BCHP_MEMC_ARC_2_REG_START 0x01200c00 ++#define BCHP_MEMC_ARC_2_REG_END 0x01200f74 ++#define BCHP_MEMC_ARB_2_REG_START 0x01201000 ++#define BCHP_MEMC_ARB_2_REG_END 0x012014cc ++#define BCHP_MEMC_DDR_2_REG_START 0x01202000 ++#define BCHP_MEMC_DDR_2_REG_END 0x012027fc ++#define BCHP_MEMC_L2_2_0_REG_START 0x01203000 ++#define BCHP_MEMC_L2_2_0_REG_END 0x01203044 ++#define BCHP_MEMC_L2_2_1_REG_START 0x01203200 ++#define BCHP_MEMC_L2_2_1_REG_END 0x01203244 ++#define BCHP_MEMC_L2_2_2_REG_START 0x01203400 ++#define BCHP_MEMC_L2_2_2_REG_END 0x01203444 ++#define BCHP_MEMC_TRACELOG_0_2_REG_START 0x01203800 ++#define BCHP_MEMC_TRACELOG_0_2_REG_END 0x012039fc ++#define BCHP_MEMC_RGRB_2_REG_START 0x01204000 ++#define BCHP_MEMC_RGRB_2_REG_END 0x01204010 ++#define BCHP_MEMC_MISC_2_REG_START 0x01205000 ++#define BCHP_MEMC_MISC_2_REG_END 0x01205010 ++#define BCHP_DDR34_PHY_CONTROL_REGS_2_REG_START 0x01206000 ++#define BCHP_DDR34_PHY_CONTROL_REGS_2_REG_END 0x01206218 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_2_REG_START 0x01206400 ++#define BCHP_DDR34_PHY_BYTE_LANE_0_2_REG_END 0x01206518 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_2_REG_START 0x01206600 ++#define BCHP_DDR34_PHY_BYTE_LANE_1_2_REG_END 0x01206718 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_2_REG_START 0x01206800 ++#define BCHP_DDR34_PHY_BYTE_LANE_2_2_REG_END 0x01206918 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_2_REG_START 0x01206a00 ++#define BCHP_DDR34_PHY_BYTE_LANE_3_2_REG_END 0x01206b18 ++#define BCHP_DDR34_PHY_ECC_LANE_2_REG_START 0x01206c00 ++#define BCHP_DDR34_PHY_ECC_LANE_2_REG_END 0x01206d18 ++#define BCHP_SHIMPHY_ADDR_CNTL_2_REG_START 0x01208000 ++#define BCHP_SHIMPHY_ADDR_CNTL_2_REG_END 0x012080e0 ++#define BCHP_MEMC_SENTINEL_0_2_REG_START 0x01240000 ++#define BCHP_MEMC_SENTINEL_0_2_REG_END 0x0127fffc ++ ++ ++/*************************************************************************** ++ *AUD_FMM_MS_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits ++ ***************************************************************************/ ++/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */ ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK 0xffffffff ++#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0 ++ ++/*************************************************************************** ++ *AUD_FMM_OP_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI ++ ***************************************************************************/ ++/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */ ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_MFD_8B_SLOWBVB ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_MFD_8B_SLOWBVB :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_MFD_8B_SLOWBVB_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_MFD_8B_SLOWBVB_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *BVN_MVFD_VFD_8B_NODCD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* BVN_MVFD_VFD_8B_NODCD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_BVN_MVFD_VFD_8B_NODCD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *GFD_HSCL_VSCL_ONLY ++ ***************************************************************************/ ++/*************************************************************************** ++ *DRAM_DATA_STRUCTURE - DRAM Data Structure ++ ***************************************************************************/ ++/* GFD_HSCL_VSCL_ONLY :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */ ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff ++#define BCHP_GFD_HSCL_VSCL_ONLY_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0 ++ ++/*************************************************************************** ++ *HIFIDAC_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_02_MUTE_USAGE - Mute usage ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change ++ ***************************************************************************/ ++/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */ ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *M2MC ++ ***************************************************************************/ ++/*************************************************************************** ++ *TYPE_CLUT_COLOR_DATA - color data for color look up table ++ ***************************************************************************/ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK 0xff000000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT 24 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK 0x00ff0000 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT 16 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK 0x0000ff00 ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT 8 ++ ++/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */ ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK 0x000000ff ++#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */ ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK 0xf0000000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT 28 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK 0x0fffffe0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT 5 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK 0x0000001e ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT 1 ++ ++/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1 ++ ++/*************************************************************************** ++ *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1 ++ ***************************************************************************/ ++/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK 0xffff8000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT 15 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK 0x00004000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT 14 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK 0x00002000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT 13 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK 0x00000800 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT 11 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK 0x00000400 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK 0x00000200 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK 0x00000100 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT 8 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK 0x00000020 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT 5 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK 0x00000002 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */ ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK 0x00000001 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT 0 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1 ++#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0 ++ ++/*************************************************************************** ++ *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */ ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff ++#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *LIST_PKT_11_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT ++ ***************************************************************************/ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: reserved0 [31:29] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_MASK 0xe0000000 ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_reserved0_SHIFT 29 ++ ++/* M2MC :: LIST_PKT_11_SRC_CLUT :: REGISTER_CONTENTS [28:00] */ ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_MASK 0x1fffffff ++#define BCHP_M2MC_LIST_PKT_11_SRC_CLUT_REGISTER_CONTENTS_SHIFT 0 ++ ++/*************************************************************************** ++ *PCIE_DMA ++ ***************************************************************************/ ++/*************************************************************************** ++ *DESC_WORD0 - PCIE DMA Descriptor Word 0 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD1 - PCIE DMA Descriptor Word 1 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD2 - PCIE DMA Descriptor Word 2 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD3 - PCIE DMA Descriptor Word 3 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK 0x7e000000 ++#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT 25 ++ ++/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK 0x01ffffff ++#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD4 - PCIE DMA Descriptor Word 4 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK 0x80000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT 31 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK 0x40000000 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT 30 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE 0 ++ ++/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK 0x3ffffff8 ++#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT 3 ++ ++/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK 0x00000004 ++#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT 2 ++ ++/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK 0x00000003 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP 0 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32 1 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32 2 ++#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved 3 ++ ++/*************************************************************************** ++ *DESC_WORD5 - PCIE DMA Descriptor Word 5 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK 0xffffffe0 ++#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT 5 ++ ++/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK 0x0000001f ++#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD6 - PCIE DMA Descriptor Word 6 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK 0xffffffff ++#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *DESC_WORD7 - PCIE DMA Descriptor Word 7 ++ ***************************************************************************/ ++/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:08] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK 0xffffff00 ++#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT 8 ++ ++/* PCIE_DMA :: DESC_WORD7 :: MEMORY_ADDRESS_HI [07:00] */ ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_MASK 0x000000ff ++#define BCHP_PCIE_DMA_DESC_WORD7_MEMORY_ADDRESS_HI_SHIFT 0 ++ ++/*************************************************************************** ++ *RAAGA_REGSET_DSP_CFG ++ ***************************************************************************/ ++/*************************************************************************** ++ *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo 2 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0 ++ ++/*************************************************************************** ++ *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK 0xffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0 ++ ++/*************************************************************************** ++ *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right -2147483648 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0 ++ ++/*************************************************************************** ++ *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647 ++#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono 1 ++ ++/*************************************************************************** ++ *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE ++ ***************************************************************************/ ++/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */ ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK 0xffffffff ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2 ++#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3 ++ ++/*************************************************************************** ++ *RDC ++ ***************************************************************************/ ++/*************************************************************************** ++ *RUL - RUL Command. ++ ***************************************************************************/ ++/* RDC :: RUL :: opcode [31:24] */ ++#define BCHP_RDC_RUL_opcode_MASK 0xff000000 ++#define BCHP_RDC_RUL_opcode_SHIFT 24 ++#define BCHP_RDC_RUL_opcode_NOP 0 ++#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM 1 ++#define BCHP_RDC_RUL_opcode_REG_WRITE 2 ++#define BCHP_RDC_RUL_opcode_REG_READ 3 ++#define BCHP_RDC_RUL_opcode_LOAD_IMM 4 ++#define BCHP_RDC_RUL_opcode_WINDOW_WRITE 5 ++#define BCHP_RDC_RUL_opcode_BLOCK_WRITE 6 ++#define BCHP_RDC_RUL_opcode_WINDOW_COPY 7 ++#define BCHP_RDC_RUL_opcode_BLOCK_COPY 8 ++#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK 9 ++#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW 10 ++#define BCHP_RDC_RUL_opcode_AND 11 ++#define BCHP_RDC_RUL_opcode_AND_IMM 12 ++#define BCHP_RDC_RUL_opcode_OR 13 ++#define BCHP_RDC_RUL_opcode_OR_IMM 14 ++#define BCHP_RDC_RUL_opcode_XOR 15 ++#define BCHP_RDC_RUL_opcode_XOR_IMM 16 ++#define BCHP_RDC_RUL_opcode_NOT 17 ++#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT 18 ++#define BCHP_RDC_RUL_opcode_SUM 19 ++#define BCHP_RDC_RUL_opcode_SUM_IMM 20 ++#define BCHP_RDC_RUL_opcode_COND_SKIP 21 ++#define BCHP_RDC_RUL_opcode_SKIP 22 ++#define BCHP_RDC_RUL_opcode_EXIT 23 ++#define BCHP_RDC_RUL_opcode_WAIT_EOP 24 ++#define BCHP_RDC_RUL_opcode_PLACEHOLDER 255 ++ ++/* RDC :: RUL :: reserved0 [23:23] */ ++#define BCHP_RDC_RUL_reserved0_MASK 0x00800000 ++#define BCHP_RDC_RUL_reserved0_SHIFT 23 ++ ++/* union - case rdc_args [22:00] */ ++/* RDC :: RUL :: rdc_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_rdc_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: rdc_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_rdc_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_rdc_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: rdc_args :: src2 [11:06] */ ++#define BCHP_RDC_RUL_rdc_args_src2_MASK 0x00000fc0 ++#define BCHP_RDC_RUL_rdc_args_src2_SHIFT 6 ++ ++/* RDC :: RUL :: rdc_args :: dest [05:00] */ ++#define BCHP_RDC_RUL_rdc_args_dest_MASK 0x0000003f ++#define BCHP_RDC_RUL_rdc_args_dest_SHIFT 0 ++ ++/* union - case reg_args [22:00] */ ++/* RDC :: RUL :: reg_args :: rotation [22:18] */ ++#define BCHP_RDC_RUL_reg_args_rotation_MASK 0x007c0000 ++#define BCHP_RDC_RUL_reg_args_rotation_SHIFT 18 ++ ++/* RDC :: RUL :: reg_args :: src1 [17:12] */ ++#define BCHP_RDC_RUL_reg_args_src1_MASK 0x0003f000 ++#define BCHP_RDC_RUL_reg_args_src1_SHIFT 12 ++ ++/* RDC :: RUL :: reg_args :: count [11:00] */ ++#define BCHP_RDC_RUL_reg_args_count_MASK 0x00000fff ++#define BCHP_RDC_RUL_reg_args_count_SHIFT 0 ++ ++/* union - case eop_args [22:00] */ ++/* RDC :: RUL :: eop_args :: reserved0 [22:08] */ ++#define BCHP_RDC_RUL_eop_args_reserved0_MASK 0x007fff00 ++#define BCHP_RDC_RUL_eop_args_reserved0_SHIFT 8 ++ ++/* RDC :: RUL :: eop_args :: eop [07:00] */ ++#define BCHP_RDC_RUL_eop_args_eop_MASK 0x000000ff ++#define BCHP_RDC_RUL_eop_args_eop_SHIFT 0 ++ ++/*************************************************************************** ++ *EOP_ID_256 - EOP_ID ++ ***************************************************************************/ ++/* RDC :: EOP_ID_256 :: eop_id [255:00] */ ++#define BCHP_RDC_EOP_ID_256_eop_id_MASK 0x00000000000000000000000000000000000000000000000000000000ffffffff ++#define BCHP_RDC_EOP_ID_256_eop_id_SHIFT 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_0 0 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_1 1 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_2 2 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_3 3 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_4 4 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_5 5 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_6 6 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_scl_7 7 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_0 8 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_1 9 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_2 10 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_3 11 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_4 12 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_5 13 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_6 14 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_mvp_7 15 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_0 16 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_1 17 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_2 18 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_3 19 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_4 20 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_5 21 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_6 22 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_dnr_7 23 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_0 24 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_1 25 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_2 26 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_3 27 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_4 28 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_5 29 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_lbox_6 30 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_pfa_0 31 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_0 32 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_1 33 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_2 34 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_3 35 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_4 36 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_5 37 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_6 38 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_null_7 39 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_nvp_0 40 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_s3dh_0 41 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_v0_be 42 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_tntd_0 43 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_0 44 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_xsrc_1 45 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_0 46 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_1 47 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_0 48 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_1 49 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_2 50 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_3 51 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_4 52 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_5 53 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_6 54 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_7 55 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_8 56 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_9 57 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_10 58 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_11 59 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_12 60 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_fch_13 61 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_2 62 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_f_reserved_3 63 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_0 64 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_1 65 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_2 66 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_3 67 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_4 68 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_5 69 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_6 70 ++#define BCHP_RDC_EOP_ID_256_eop_id_mfd_7 71 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_0 72 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_1 73 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_2 74 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_3 75 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_4 76 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_5 77 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_6 78 ++#define BCHP_RDC_EOP_ID_256_eop_id_vfd_7 79 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_0 80 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_1 81 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_2 82 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_3 83 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_4 84 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_5 85 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_6 86 ++#define BCHP_RDC_EOP_ID_256_eop_id_cap_7 87 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_0 88 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_1 89 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_2 90 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_3 91 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_4 92 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_5 93 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_6 94 ++#define BCHP_RDC_EOP_ID_256_eop_id_gfd_7 95 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_0 96 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_1 97 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_2 98 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_3 99 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_4 100 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_5 101 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_6 102 ++#define BCHP_RDC_EOP_ID_256_eop_id_scl_7 103 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_0 104 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_1 105 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_2 106 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_3 107 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_4 108 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_5 109 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_6 110 ++#define BCHP_RDC_EOP_ID_256_eop_id_xsrc_7 111 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_0 112 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_1 113 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_2 114 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_3 115 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_4 116 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_5 117 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_6 118 ++#define BCHP_RDC_EOP_ID_256_eop_id_mvp_7 119 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_0 120 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_1 121 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_2 122 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_3 123 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_4 124 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_5 125 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_6 126 ++#define BCHP_RDC_EOP_ID_256_eop_id_dnr_7 127 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_0 128 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_1 129 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_2 130 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_3 131 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_4 132 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_5 133 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_6 134 ++#define BCHP_RDC_EOP_ID_256_eop_id_cmp_7 135 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_0 136 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_1 137 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_2 138 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_3 139 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_4 140 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_5 141 ++#define BCHP_RDC_EOP_ID_256_eop_id_hd_dvi_6 142 ++#define BCHP_RDC_EOP_ID_256_eop_id_tpg_0 143 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_0 144 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_1 145 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_2 146 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_3 147 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_4 148 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_5 149 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_6 150 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_7 151 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_0 152 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_1 153 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_2 154 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_3 155 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_4 156 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_5 157 ++#define BCHP_RDC_EOP_ID_256_eop_id_lbox_6 158 ++#define BCHP_RDC_EOP_ID_256_eop_id_pfa_0 159 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_0 160 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_1 161 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_2 162 ++#define BCHP_RDC_EOP_ID_256_eop_id_crc_3 163 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_0 164 ++#define BCHP_RDC_EOP_ID_256_eop_id_hist_1 165 ++#define BCHP_RDC_EOP_ID_256_eop_id_psm_0 166 ++#define BCHP_RDC_EOP_ID_256_eop_id_plm_0 167 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_0 168 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_1 169 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_2 170 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_3 171 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_4 172 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_5 173 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_6 174 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cap_7 175 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_0 176 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_1 177 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_2 178 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_crc_3 179 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_0 180 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_hist_1 181 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_psm_0 182 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_plm_0 183 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v0 184 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v0 185 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v0 186 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v0 187 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v0 188 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v0 189 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v0 190 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v0 191 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_0_v1 192 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_1_v1 193 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_2_v1 194 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_3_v1 195 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_4_v1 196 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_5_v1 197 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_6_v1 198 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_cmp_7_v1 199 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_0 200 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_1 201 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_2 202 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_3 203 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_4 204 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_5 205 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_6 206 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_null_7 207 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_b3dc_0 208 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_frc_0 209 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_0 210 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_1 211 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_2 212 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_3 213 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_4 214 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_5 215 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_0 216 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_1 217 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_2 218 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_3 219 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_4 220 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_5 221 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_6 222 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_7 223 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_8 224 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_9 225 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_10 226 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_11 227 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_12 228 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_13 229 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_loopback_14 230 ++#define BCHP_RDC_EOP_ID_256_eop_id_vnet_b_reserved_9 231 ++#define BCHP_RDC_EOP_ID_256_eop_id_nvp_0 232 ++#define BCHP_RDC_EOP_ID_256_eop_id_s3dh_0 233 ++#define BCHP_RDC_EOP_ID_256_eop_id_v0_be 234 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_0 235 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_1 236 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_2 237 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_3 238 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_4 239 ++#define BCHP_RDC_EOP_ID_256_eop_id_b3dc_0 240 ++#define BCHP_RDC_EOP_ID_256_eop_id_frc_0 241 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpf_0 242 ++#define BCHP_RDC_EOP_ID_256_eop_id_pdpb_0 243 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_5 244 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_6 245 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_7 246 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_8 247 ++#define BCHP_RDC_EOP_ID_256_eop_id_tntd_0 248 ++#define BCHP_RDC_EOP_ID_256_eop_id_vec_hddvi_0_passthr 249 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_11 250 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_12 251 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_13 252 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_14 253 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_15 254 ++#define BCHP_RDC_EOP_ID_256_eop_id_reserved_16 255 ++ ++/*************************************************************************** ++ *SPDIF_RCVR_CTRL ++ ***************************************************************************/ ++/*************************************************************************** ++ *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling ++ ***************************************************************************/ ++/* SPDIF_RCVR_CTRL :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */ ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff ++#define BCHP_SPDIF_RCVR_CTRL_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0 ++ ++/*************************************************************************** ++ *VICE2_REGSET_MISC ++ ***************************************************************************/ ++/*************************************************************************** ++ *DCCM - registers interface address offset in DCCM. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START 16 ++#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START 40 ++ ++/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID 1 ++ ++/*************************************************************************** ++ *MBOX - MBOX registers interface address offset. ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_05_BARDATA_INFO_OFFSET 20 ++#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE 6 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MAJORREVISION [15:08] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_MASK 0x0000ff00 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MAJORREVISION_ID 1 ++ ++/* VICE2_REGSET_MISC :: MBOX :: MINORREVISION [07:00] */ ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_MASK 0x000000ff ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_SHIFT 0 ++#define BCHP_VICE2_REGSET_MISC_MBOX_MINORREVISION_ID 0 ++ ++/*************************************************************************** ++ *DWORD_00_BVB_PIC_SIZE - BVB Picture Size ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_02_PIC_INFO - Picture Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK 0xffff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK 0x00000c00 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT 10 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME 2 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK 0x00000200 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT 9 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK 0x00000100 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT 8 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK 0x00000080 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT 7 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:05] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK 0x00000020 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT 5 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATA [04:04] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_MASK 0x00000010 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_SHIFT 4 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_FALSE 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATA_TRUE 1 ++ ++/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: ACTIVEFORMATDATAMODE [03:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_MASK 0x0000000f ++#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_ACTIVEFORMATDATAMODE_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_03_ORIGINAL_PTS - Source PTS Value ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_04_STG_PICTURE_ID - STG Picture ID ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK 0xffffffff ++#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT 0 ++ ++/*************************************************************************** ++ *DWORD_05_BARDATA_INFO - bar data Information ++ ***************************************************************************/ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: reserved0 [31:30] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_MASK 0xc0000000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_reserved0_SHIFT 30 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: TOPLEFTBARVALUE [29:16] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_MASK 0x3fff0000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_TOPLEFTBARVALUE_SHIFT 16 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BARDATATYPE [15:14] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_MASK 0x0000c000 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_SHIFT 14 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_invalidBarData 0 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_TopBottom 1 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_LeftRight 2 ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BARDATATYPE_reserved 3 ++ ++/* VICE2_REGSET_MISC :: DWORD_05_BARDATA_INFO :: BOTRIGHTBARVALUE [13:00] */ ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_MASK 0x00003fff ++#define BCHP_VICE2_REGSET_MISC_DWORD_05_BARDATA_INFO_BOTRIGHTBARVALUE_SHIFT 0 ++ ++/*************************************************************************** ++ *XPT_RAVE ++ ***************************************************************************/ ++/*************************************************************************** ++ *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */ ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */ ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEC_PES_LAYER_SELECTION - PES Layer Selection ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */ ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0 ++ ++/*************************************************************************** ++ *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio ++ ***************************************************************************/ ++/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */ ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff ++#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0 ++ ++#endif /* #ifndef BCHP_COMMON_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/7445d0/bchp_usb_ctrl.h b/include/linux/brcmstb/7445d0/bchp_usb_ctrl.h +new file mode 100644 +index 00000000..6452741d +--- /dev/null ++++ b/include/linux/brcmstb/7445d0/bchp_usb_ctrl.h +@@ -0,0 +1,1450 @@ ++/*************************************************************************** ++ * Copyright (c) 1999-2014, Broadcom Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Module Description: ++ * DO NOT EDIT THIS FILE DIRECTLY ++ * ++ * This module was generated magically with RDB from a source description ++ * file. You must edit the source file for changes to be made to this file. ++ * ++ * ++ * Date: Generated on Wed Sep 3 11:52:57 2014 ++ * Full Compile MD5 Checksum 4a20c0e31b928020bbfa96c583b9e661 ++ * (minus title and desc) ++ * MD5 Checksum 077c6f684bcabb645ae9da4069fea8e4 ++ * ++ * Compiled with: RDB Utility combo_header.pl ++ * RDB Parser 3.0 ++ * unknown unknown ++ * Perl Interpreter 5.008005 ++ * Operating System linux ++ * ++ * Revision History: ++ * ++ * $brcm_Log: $ ++ * ++ ***************************************************************************/ ++ ++#ifndef BCHP_USB_CTRL_H__ ++#define BCHP_USB_CTRL_H__ ++ ++/*************************************************************************** ++ *USB_CTRL - USB Control Registers ++ ***************************************************************************/ ++#define BCHP_USB_CTRL_SETUP 0x00470200 /* Setup Register */ ++#define BCHP_USB_CTRL_PLL_CTL 0x00470204 /* PLL Control Register */ ++#define BCHP_USB_CTRL_FLADJ_VALUE 0x00470208 /* Frame Adjust Value */ ++#define BCHP_USB_CTRL_EBRIDGE 0x0047020c /* Control Register for EHCI Bridge */ ++#define BCHP_USB_CTRL_OBRIDGE 0x00470210 /* Control Register for OHCI Bridge */ ++#define BCHP_USB_CTRL_MDIO 0x00470214 /* MDIO Interface Programming Register */ ++#define BCHP_USB_CTRL_MDIO2 0x00470218 /* MDIO Interface Read Register */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL 0x0047021c /* Test Port Control Register */ ++#define BCHP_USB_CTRL_USB_SIMCTL 0x00470220 /* Simulation Register */ ++#define BCHP_USB_CTRL_USB_TESTCTL 0x00470224 /* Throutput Test Control */ ++#define BCHP_USB_CTRL_USB_TESTMON 0x00470228 /* Throughput Test Monitor */ ++#define BCHP_USB_CTRL_UTMI_CTL_1 0x0047022c /* UTMI Control Register */ ++#define BCHP_USB_CTRL_UTMI_CTL_2 0x00470230 /* UTMI Control 2 Register */ ++#define BCHP_USB_CTRL_USB_PM 0x00470234 /* Power Management Register */ ++#define BCHP_USB_CTRL_USB_PM_STATUS 0x00470238 /* usb20 Power Management Status Register */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT 0x0047023c /* OHCI ADDRESS Extension */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL 0x00470240 /* 28NM USBPHY LDO Control */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS 0x00470244 /* 28NM USBPHY PLLBIAS Control */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL 0x00470248 /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST 0x0047024c /* 28NM USBPHY AFE Bandgap Control */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC 0x00470250 /* PLL Feedback Divider Control Register */ ++#define BCHP_USB_CTRL_TP_DIAG 0x00470254 /* diagnostic for tp bus */ ++#define BCHP_USB_CTRL_SPARE3 0x00470258 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE4 0x0047025c /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_USB30_CTL1 0x00470260 /* USB30 CONTROL Register 1 */ ++#define BCHP_USB_CTRL_USB30_CTL2 0x00470264 /* USB30 CONTROL Register 2 */ ++#define BCHP_USB_CTRL_USB30_CTL3 0x00470268 /* USB30 CONTROL Register 3 */ ++#define BCHP_USB_CTRL_USB30_CTL4 0x0047026c /* USB30 CONTROL Register 4 */ ++#define BCHP_USB_CTRL_USB30_PCTL 0x00470270 /* USB30 PORT CONTROL Register */ ++#define BCHP_USB_CTRL_USB30_CTL5 0x00470274 /* USB30 CONTROL Register 5 */ ++#define BCHP_USB_CTRL_SPARE5 0x00470278 /* Spare1 Register for future use */ ++#define BCHP_USB_CTRL_SPARE6 0x0047027c /* Spare2 Register for future use */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE 0x004702a0 /* SCB0 base start and end address */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE 0x004702a4 /* SCB1 base start and end address */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE 0x004702a8 /* SCB2 base start and end address */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE 0x004702ac /* SCB0 extn start and end address */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE 0x004702b0 /* SCB1 extn start and end address */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE 0x004702b4 /* SCB2 extn start and end address */ ++ ++/*************************************************************************** ++ *SETUP - Setup Register ++ ***************************************************************************/ ++/* USB_CTRL :: SETUP :: OC3_DISABLE [31:30] */ ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_MASK 0xc0000000 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_SHIFT 30 ++#define BCHP_USB_CTRL_SETUP_OC3_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: OC_DISABLE [29:28] */ ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_MASK 0x30000000 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_SHIFT 28 ++#define BCHP_USB_CTRL_SETUP_OC_DISABLE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_force [27:27] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_MASK 0x08000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_SHIFT 27 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_force_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_pwron_val [26:26] */ ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_MASK 0x04000000 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_SHIFT 26 ++#define BCHP_USB_CTRL_SETUP_usb_pwron_val_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: SETUP_SPARE [25:19] */ ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_MASK 0x03f80000 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_SHIFT 19 ++#define BCHP_USB_CTRL_SETUP_SETUP_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ohci_susp_lgcy [18:18] */ ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_MASK 0x00040000 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_SHIFT 18 ++#define BCHP_USB_CTRL_SETUP_ohci_susp_lgcy_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ulpi_pp2vbus [17:17] */ ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_MASK 0x00020000 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_SHIFT 17 ++#define BCHP_USB_CTRL_SETUP_ss_ulpi_pp2vbus_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: ss_ehci64bit_en [16:16] */ ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_MASK 0x00010000 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_SHIFT 16 ++#define BCHP_USB_CTRL_SETUP_ss_ehci64bit_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: scb2_en [15:15] */ ++#define BCHP_USB_CTRL_SETUP_scb2_en_MASK 0x00008000 ++#define BCHP_USB_CTRL_SETUP_scb2_en_SHIFT 15 ++#define BCHP_USB_CTRL_SETUP_scb2_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb1_en [14:14] */ ++#define BCHP_USB_CTRL_SETUP_scb1_en_MASK 0x00004000 ++#define BCHP_USB_CTRL_SETUP_scb1_en_SHIFT 14 ++#define BCHP_USB_CTRL_SETUP_scb1_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: SETUP :: scb_client_swap [13:13] */ ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_MASK 0x00002000 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_SHIFT 13 ++#define BCHP_USB_CTRL_SETUP_scb_client_swap_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: async_expire_dis [12:12] */ ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_MASK 0x00001000 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_SHIFT 12 ++#define BCHP_USB_CTRL_SETUP_async_expire_dis_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_device_sel [11:11] */ ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_MASK 0x00000800 ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_SHIFT 11 ++#define BCHP_USB_CTRL_SETUP_usb_device_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: usb_soft_reset_bcm6xxx [10:10] */ ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_MASK 0x00000400 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_SHIFT 10 ++#define BCHP_USB_CTRL_SETUP_usb_soft_reset_bcm6xxx_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_shutdown [09:09] */ ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_MASK 0x00000200 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_SHIFT 9 ++#define BCHP_USB_CTRL_SETUP_soft_shutdown_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_bkward_en [08:08] */ ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_MASK 0x00000100 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_SHIFT 8 ++#define BCHP_USB_CTRL_SETUP_utmi_bkward_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: utmi_pls_en [07:07] */ ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_MASK 0x00000080 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_SHIFT 7 ++#define BCHP_USB_CTRL_SETUP_utmi_pls_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: soft_reset [06:06] */ ++#define BCHP_USB_CTRL_SETUP_soft_reset_MASK 0x00000040 ++#define BCHP_USB_CTRL_SETUP_soft_reset_SHIFT 6 ++#define BCHP_USB_CTRL_SETUP_soft_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IPP [05:05] */ ++#define BCHP_USB_CTRL_SETUP_IPP_MASK 0x00000020 ++#define BCHP_USB_CTRL_SETUP_IPP_SHIFT 5 ++#define BCHP_USB_CTRL_SETUP_IPP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: IOC [04:04] */ ++#define BCHP_USB_CTRL_SETUP_IOC_MASK 0x00000010 ++#define BCHP_USB_CTRL_SETUP_IOC_SHIFT 4 ++#define BCHP_USB_CTRL_SETUP_IOC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: WABO [03:03] */ ++#define BCHP_USB_CTRL_SETUP_WABO_MASK 0x00000008 ++#define BCHP_USB_CTRL_SETUP_WABO_SHIFT 3 ++#define BCHP_USB_CTRL_SETUP_WABO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNBO [02:02] */ ++#define BCHP_USB_CTRL_SETUP_FNBO_MASK 0x00000004 ++#define BCHP_USB_CTRL_SETUP_FNBO_SHIFT 2 ++#define BCHP_USB_CTRL_SETUP_FNBO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: FNHW [01:01] */ ++#define BCHP_USB_CTRL_SETUP_FNHW_MASK 0x00000002 ++#define BCHP_USB_CTRL_SETUP_FNHW_SHIFT 1 ++#define BCHP_USB_CTRL_SETUP_FNHW_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SETUP :: BABO [00:00] */ ++#define BCHP_USB_CTRL_SETUP_BABO_MASK 0x00000001 ++#define BCHP_USB_CTRL_SETUP_BABO_SHIFT 0 ++#define BCHP_USB_CTRL_SETUP_BABO_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_CTL - PLL Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_CTL :: PLL_IDDQ_PWRDN [31:31] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK 0x80000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SHIFT 31 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_RESETB [30:30] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_MASK 0x40000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_SHIFT 30 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PHYPLL_BYP [29:29] */ ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_MASK 0x20000000 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_SHIFT 29 ++#define BCHP_USB_CTRL_PLL_CTL_PHYPLL_BYP_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_PWRDWNB [28:28] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_MASK 0x10000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_SHIFT 28 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_SUSPEND_EN [27:27] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_MASK 0x08000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_SHIFT 27 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_SUSPEND_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ka [26:24] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_MASK 0x07000000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_SHIFT 24 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ka_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE3 [23:23] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_MASK 0x00800000 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_SHIFT 23 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE3_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Ki [22:20] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_MASK 0x00700000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Ki_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_Kp [19:16] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_MASK 0x000f0000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_Kp_DEFAULT 0x0000000a ++ ++/* USB_CTRL :: PLL_CTL :: PLL_pdiv [15:12] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_pdiv_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_CTL :: PLLCTL_SPARE1 [11:10] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_MASK 0x00000c00 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_PLL_CTL_PLLCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_CTL :: PLL_ndiv [09:00] */ ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_MASK 0x000003ff ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_CTL_PLL_ndiv_DEFAULT 0x00000020 ++ ++/*************************************************************************** ++ *FLADJ_VALUE - Frame Adjust Value ++ ***************************************************************************/ ++/* USB_CTRL :: FLADJ_VALUE :: FLADJ_VAL [31:00] */ ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_MASK 0xffffffff ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_SHIFT 0 ++#define BCHP_USB_CTRL_FLADJ_VALUE_FLADJ_VAL_DEFAULT 0x000c0020 ++ ++/*************************************************************************** ++ *EBRIDGE - Control Register for EHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: EBRIDGE :: EBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebrff_reset [30:30] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_EBRIDGE_ebrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: ebr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_EBRIDGE_ebr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SPARE [27:17] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_MASK 0x0ffe0000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: EBRIDGE :: EBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_EBRIDGE_EBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OBRIDGE - Control Register for OHCI Bridge ++ ***************************************************************************/ ++/* USB_CTRL :: OBRIDGE :: OBR_SOFT_RESET [31:31] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_MASK 0x80000000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_SHIFT 31 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SOFT_RESET_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obrff_reset [30:30] */ ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_MASK 0x40000000 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_SHIFT 30 ++#define BCHP_USB_CTRL_OBRIDGE_obrff_reset_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_wrgwordcnt_sel [29:29] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_MASK 0x20000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_SHIFT 29 ++#define BCHP_USB_CTRL_OBRIDGE_obr_wrgwordcnt_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: obr_size_sel [28:28] */ ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_MASK 0x10000000 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_SHIFT 28 ++#define BCHP_USB_CTRL_OBRIDGE_obr_size_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SPARE [27:17] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_MASK 0x0ffe0000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_RD_THRESH [16:12] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_MASK 0x0001f000 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_SHIFT 12 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_RD_THRESH_DEFAULT 0x00000002 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SCB_SIZE [11:07] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_MASK 0x00000f80 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_SHIFT 7 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SCB_SIZE_DEFAULT 0x00000004 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_MISC [06:01] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_MASK 0x0000007e ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_SHIFT 1 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_MISC_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OBRIDGE :: OBR_SEQ_EN [00:00] */ ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_MASK 0x00000001 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_SHIFT 0 ++#define BCHP_USB_CTRL_OBRIDGE_OBR_SEQ_EN_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO - MDIO Interface Programming Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO :: MDIO_PHY_SEL [31:31] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_MASK 0x80000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_SHIFT 31 ++#define BCHP_USB_CTRL_MDIO_MDIO_PHY_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_SPARE [30:26] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_MASK 0x7c000000 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_SHIFT 26 ++#define BCHP_USB_CTRL_MDIO_MDIO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: WR_START [25:25] */ ++#define BCHP_USB_CTRL_MDIO_WR_START_MASK 0x02000000 ++#define BCHP_USB_CTRL_MDIO_WR_START_SHIFT 25 ++#define BCHP_USB_CTRL_MDIO_WR_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: RD_START [24:24] */ ++#define BCHP_USB_CTRL_MDIO_RD_START_MASK 0x01000000 ++#define BCHP_USB_CTRL_MDIO_RD_START_SHIFT 24 ++#define BCHP_USB_CTRL_MDIO_RD_START_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_ADDR [23:16] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO_MDIO_ADDR_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: MDIO :: MDIO_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO_MDIO_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *MDIO2 - MDIO Interface Read Register ++ ***************************************************************************/ ++/* USB_CTRL :: MDIO2 :: SYNOPSYS_CORE_ID [31:16] */ ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_MASK 0xffff0000 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_SHIFT 16 ++#define BCHP_USB_CTRL_MDIO2_SYNOPSYS_CORE_ID_DEFAULT 0x0000298a ++ ++/* USB_CTRL :: MDIO2 :: MDIO_RD_DATA [15:00] */ ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_MASK 0x0000ffff ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_SHIFT 0 ++#define BCHP_USB_CTRL_MDIO2_MDIO_RD_DATA_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TEST_PORT_CTL - Test Port Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: TEST_PORT_CTL :: TPCTL_SPARE [31:28] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_MASK 0xf0000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_SHIFT 28 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb2_wr_data_sel [27:27] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_MASK 0x08000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_SHIFT 27 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb2_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb1_wr_data_sel [26:26] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_MASK 0x04000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_SHIFT 26 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb1_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: scb0_wr_data_sel [25:25] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_MASK 0x02000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_SHIFT 25 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_scb0_wr_data_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: testclk_sel [24:23] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_MASK 0x01800000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_SHIFT 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_testclk_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt_testsel [22:21] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_MASK 0x00600000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_SHIFT 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt1_oe [20:20] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_MASK 0x00100000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_SHIFT 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt1_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwrflt0_oe [19:19] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_MASK 0x00080000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_SHIFT 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwrflt0_oe_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron1_testsel [18:18] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_MASK 0x00040000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_SHIFT 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron1_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: pwron0_testsel [17:17] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_MASK 0x00020000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_SHIFT 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_pwron0_testsel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: tpin_sel [16:16] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_MASK 0x00010000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_SHIFT 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_tpin_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: UTMI_TP_SEL [15:08] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_SHIFT 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_UTMI_TP_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: TEST_PORT_CTL :: TPOUT_SEL [07:00] */ ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_SHIFT 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag0 0 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag1 1 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag2 2 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag3 3 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag4 4 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag5 5 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag6 6 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag7 7 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag8 8 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag9 9 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag10 10 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag11 11 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag12 12 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag13 13 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag14 14 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag15 15 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag16 16 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag17 17 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag18 18 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag19 19 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag20 20 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag21 21 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag22 22 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag23 23 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag24 24 ++#define BCHP_USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_hc_diag25 25 ++ ++/*************************************************************************** ++ *USB_SIMCTL - Simulation Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_SIMCTL :: sim_mode_en [31:31] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_SHIFT 31 ++#define BCHP_USB_CTRL_USB_SIMCTL_sim_mode_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: scale_down_en [30:30] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_SHIFT 30 ++#define BCHP_USB_CTRL_USB_SIMCTL_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: otg_scale_down_en [29:28] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_MASK 0x30000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_SHIFT 28 ++#define BCHP_USB_CTRL_USB_SIMCTL_otg_scale_down_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: intr_test [27:27] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_SHIFT 27 ++#define BCHP_USB_CTRL_USB_SIMCTL_intr_test_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: AUTOPPD_ON_OVERCUR_EN [26:26] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_MASK 0x04000000 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_SHIFT 26 ++#define BCHP_USB_CTRL_USB_SIMCTL_AUTOPPD_ON_OVERCUR_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE [25:05] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_MASK 0x03ffffe0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: rel_270a_comp [04:04] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_SHIFT 4 ++#define BCHP_USB_CTRL_USB_SIMCTL_rel_270a_comp_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_SIMCTL :: SIMCTL_SPARE1 [03:00] */ ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_MASK 0x0000000f ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_SHIFT 0 ++#define BCHP_USB_CTRL_USB_SIMCTL_SIMCTL_SPARE1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTCTL - Throutput Test Control ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE2 [31:22] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_MASK 0xffc00000 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_SHIFT 22 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: CONTROLLER_SEL [21:21] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_SHIFT 21 ++#define BCHP_USB_CTRL_USB_TESTCTL_CONTROLLER_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_EN [20:20] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_SHIFT 20 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: SPEED_SEL [19:19] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_SHIFT 19 ++#define BCHP_USB_CTRL_USB_TESTCTL_SPEED_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: DCNT_SEL [18:16] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_MASK 0x00070000 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_SHIFT 16 ++#define BCHP_USB_CTRL_USB_TESTCTL_DCNT_SEL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: TESTCTL_SPARE1 [15:10] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_MASK 0x0000fc00 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_SHIFT 10 ++#define BCHP_USB_CTRL_USB_TESTCTL_TESTCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTCTL :: MSEC_PRESCALER [09:00] */ ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_MASK 0x000003ff ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_SHIFT 0 ++#define BCHP_USB_CTRL_USB_TESTCTL_MSEC_PRESCALER_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_TESTMON - Throughput Test Monitor ++ ***************************************************************************/ ++/* USB_CTRL :: USB_TESTMON :: PLL_SS_LOCK [31:31] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_SHIFT 31 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_SS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: PLL_HS_LOCK [30:30] */ ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_SHIFT 30 ++#define BCHP_USB_CTRL_USB_TESTMON_PLL_HS_LOCK_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: LDO_FLAG_ON [29:29] */ ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_SHIFT 29 ++#define BCHP_USB_CTRL_USB_TESTMON_LDO_FLAG_ON_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_TESTMON :: TESTMON_STAT [28:00] */ ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_MASK 0x1fffffff ++#define BCHP_USB_CTRL_USB_TESTMON_TESTMON_STAT_SHIFT 0 ++ ++/*************************************************************************** ++ *UTMI_CTL_1 - UTMI Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB_P1 [31:31] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_MASK 0x80000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_SHIFT 31 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG_P1 [30:28] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_MASK 0x70000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_SHIFT 28 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB_P1 [26:26] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_MASK 0x04000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_SHIFT 26 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU_P1 [25:25] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_MASK 0x02000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_SHIFT 25 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED_P1 [24:24] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_SHIFT 24 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU_P1 [23:23] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_SHIFT 23 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU_P1 [22:22] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_SHIFT 22 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD_P1 [21:21] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_SHIFT 21 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD_P1 [20:20] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_SHIFT 20 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_P1_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: USB11_TX_OEB [15:15] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_MASK 0x00008000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_SHIFT 15 ++#define BCHP_USB_CTRL_UTMI_CTL_1_USB11_TX_OEB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: SYNC_DET_LENG [14:12] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_MASK 0x00007000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_SHIFT 12 ++#define BCHP_USB_CTRL_UTMI_CTL_1_SYNC_DET_LENG_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_EN [11:11] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_SHIFT 11 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_EN_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: NO_R45_CALIB [10:10] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_MASK 0x00000400 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_SHIFT 10 ++#define BCHP_USB_CTRL_UTMI_CTL_1_NO_R45_CALIB_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_ACTIVE_IDLE_PU [09:09] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_MASK 0x00000200 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_SHIFT 9 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_ACTIVE_IDLE_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: POWER_UP_FSM_SPEED [08:08] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_MASK 0x00000100 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_SHIFT 8 ++#define BCHP_USB_CTRL_UTMI_CTL_1_POWER_UP_FSM_SPEED_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PU [07:07] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_MASK 0x00000080 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_SHIFT 7 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PU [06:06] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_MASK 0x00000040 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_SHIFT 6 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PU_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DM_PD [05:05] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_MASK 0x00000020 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_SHIFT 5 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DM_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: BC10_DP_PD [04:04] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_MASK 0x00000010 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_SHIFT 4 ++#define BCHP_USB_CTRL_UTMI_CTL_1_BC10_DP_PD_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: PHY_MODE [03:02] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_DEFAULT 0x00000000 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Host 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_Device 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_OTG 2 ++#define BCHP_USB_CTRL_UTMI_CTL_1_PHY_MODE_BC10 3 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: UTMI_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_UTMI_CTL_1_UTMI_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: UTMI_CTL_1 :: AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_1_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *UTMI_CTL_2 - UTMI Control 2 Register ++ ***************************************************************************/ ++/* USB_CTRL :: UTMI_CTL_2 :: UTMICTL2_SPARE [31:00] */ ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_MASK 0xffffffff ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_SHIFT 0 ++#define BCHP_USB_CTRL_UTMI_CTL_2_UTMICTL2_SPARE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM - Power Management Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM :: ehci_rmtwkup_override [31:31] */ ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_MASK 0x80000000 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_SHIFT 31 ++#define BCHP_USB_CTRL_USB_PM_ehci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: ohci_rmtwkup_override [30:30] */ ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_MASK 0x40000000 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_SHIFT 30 ++#define BCHP_USB_CTRL_USB_PM_ohci_rmtwkup_override_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: USB_PM_SPARE [29:05] */ ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_MASK 0x3fffffe0 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_SHIFT 5 ++#define BCHP_USB_CTRL_USB_PM_USB_PM_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: xhc_pme_en [04:04] */ ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_SHIFT 4 ++#define BCHP_USB_CTRL_USB_PM_xhc_pme_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S2_discon_intr_en [03:03] */ ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_SHIFT 3 ++#define BCHP_USB_CTRL_USB_PM_S2_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: S0_discon_intr_en [02:02] */ ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB_PM_S0_discon_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: con_intr_en [01:01] */ ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_SHIFT 1 ++#define BCHP_USB_CTRL_USB_PM_con_intr_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM :: rmtwkup_en [00:00] */ ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_rmtwkup_en_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB_PM_STATUS - usb20 Power Management Status Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB_PM_STATUS :: SPARE1_BITS [31:08] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_MASK 0xffffff00 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_SHIFT 8 ++#define BCHP_USB_CTRL_USB_PM_STATUS_SPARE1_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB_PM_STATUS :: PM_STATUS [07:00] */ ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_MASK 0x000000ff ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_SHIFT 0 ++#define BCHP_USB_CTRL_USB_PM_STATUS_PM_STATUS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *OHCI_ADDR_EXT - OHCI ADDRESS Extension ++ ***************************************************************************/ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_SPARE [31:08] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_MASK 0xffffff00 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_SHIFT 8 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: OHCI_ADDR_EXT :: OHCI_ADDR_EXT [07:00] */ ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_MASK 0x000000ff ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_SHIFT 0 ++#define BCHP_USB_CTRL_OHCI_ADDR_EXT_OHCI_ADDR_EXT_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_LDO_CTL - 28NM USBPHY LDO Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_PLL_LDO_CNTL [31:16] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_MASK 0xffff0000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_SHIFT 16 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_PLL_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: DFE_LDO_CNTL [15:12] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_MASK 0x0000f000 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_DFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_CNTL [11:08] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_CNTL_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_SPARE [07:03] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_MASK 0x000000f8 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_SHIFT 3 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_CORERDY_VDDC [02:02] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_MASK 0x00000004 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_SHIFT 2 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_CORERDY_VDDC_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_LDO_PWRDWNB [01:01] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_SHIFT 1 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_LDO_PWRDWNB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: PLL_LDO_CTL :: AFE_BG_PWRDWNB [00:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_CTL_AFE_BG_PWRDWNB_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *PLL_LDO_PLLBIAS - 28NM USBPHY PLLBIAS Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: PLLBIAS_SPARE [31:18] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_MASK 0xfffc0000 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_SHIFT 18 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_PLLBIAS_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_LDO_PLLBIAS :: AFE_PLLBIAS_TESTMODE [17:00] */ ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_MASK 0x0003ffff ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_LDO_PLLBIAS_AFE_PLLBIAS_TESTMODE_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_AFE_BG_CNTL - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: PLL_AFE_BG_SPARE [31:17] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_MASK 0xfffe0000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_SHIFT 17 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_PLL_AFE_BG_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_PRGM [16:12] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_MASK 0x0001f000 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_SHIFT 12 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_AFE_PRGM [11:08] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_MASK 0x00000f00 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_SHIFT 8 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_AFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF0P7_DFE_PRGM [07:04] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_MASK 0x000000f0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_SHIFT 4 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF0P7_DFE_PRGM_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_AFE_BG_CNTL :: AFE_BG_VREF1P0_TRIM [03:00] */ ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_MASK 0x0000000f ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_AFE_BG_CNTL_AFE_BG_VREF1P0_TRIM_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *AFE_USBIO_TST - 28NM USBPHY AFE Bandgap Control ++ ***************************************************************************/ ++/* USB_CTRL :: AFE_USBIO_TST :: ANALOG_TESTMODE [31:31] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_MASK 0x80000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_SHIFT 31 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_ANALOG_TESTMODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: PHY_ISO [30:30] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_MASK 0x40000000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_SHIFT 30 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_PHY_ISO_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_SPARE [29:16] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_MASK 0x3fff0000 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_SHIFT 16 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_SPARE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P2 [15:08] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_SHIFT 8 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: AFE_USBIO_TST :: AFE_USBIO_TST_P1 [07:00] */ ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_MASK 0x000000ff ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_SHIFT 0 ++#define BCHP_USB_CTRL_AFE_USBIO_TST_AFE_USBIO_TST_P1_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *PLL_NDIV_FRAC - PLL Feedback Divider Control Register ++ ***************************************************************************/ ++/* USB_CTRL :: PLL_NDIV_FRAC :: PLL_NDIV_FRAC_SPARE2 [31:20] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_MASK 0xfff00000 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_SHIFT 20 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_PLL_NDIV_FRAC_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: PLL_NDIV_FRAC :: pll_ndiv_frac [19:00] */ ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_MASK 0x000fffff ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_SHIFT 0 ++#define BCHP_USB_CTRL_PLL_NDIV_FRAC_pll_ndiv_frac_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *TP_DIAG - diagnostic for tp bus ++ ***************************************************************************/ ++/* USB_CTRL :: TP_DIAG :: TP_DIAG_BITS [31:00] */ ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_TP_DIAG_TP_DIAG_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE3 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE3 :: SPARE3_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE3_SPARE3_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE4 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE4 :: SPARE4_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE4_SPARE4_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL1 - USB30 CONTROL Register 1 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare2 [31:21] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_MASK 0xffe00000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_pipe_resetb [20:20] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_pipe_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: mdio_resetb [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL1_mdio_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: aux_resetb [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL1_aux_resetb_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: xhc_soft_resetb [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL1_xhc_soft_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_resetb [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_resetb_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL1 :: usb30_ctl1_spare1 [15:07] */ ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_MASK 0x0000ff80 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_CTL1_usb30_ctl1_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_standalonemode [06:06] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_standalonemode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_phy_iso [05:05] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_phy_iso_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_seq_start [04:04] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_seq_start_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_refclk_sel [03:01] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_MASK 0x0000000e ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_DEFAULT 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_CML_Refclk 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_XTAL 1 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N 2 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_REFCLKP_N_with_Termination 3 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_refclk_sel_Cmos_Refclk 4 ++ ++/* USB_CTRL :: USB30_CTL1 :: phy3_pll_auxclk_sel [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL1_phy3_pll_auxclk_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL2 - USB30 CONTROL Register 2 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_max_scb_size [29:24] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_MASK 0x3f000000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_max_scb_size_DEFAULT 0x00000020 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_wrfifo_thrshld [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_wrfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_rdfifo_thrshld [15:08] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_MASK 0x0000ff00 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_rdfifo_thrshld_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: usb30_ctl2_spare1 [07:03] */ ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_MASK 0x000000f8 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL2_usb30_ctl2_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_cntl_client_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_cntl_client_en_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL2 :: xhci_swap_mode [01:00] */ ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_MASK 0x00000003 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL2_xhci_swap_mode_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL3 - USB30 CONTROL Register 3 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare2 [31:30] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_MASK 0xc0000000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_SHIFT 30 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en_p1 [29:29] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_MASK 0x20000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_p1 [28:24] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_MASK 0x1f000000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_p1_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_p1 [23:20] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_MASK 0x00f00000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_p1_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode_p1 [19:19] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_MASK 0x00080000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_SHIFT 19 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en_p1 [18:18] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_MASK 0x00040000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing_p1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_p1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode_p1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_p1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_CTL3 :: usb30_ctl3_spare1 [15:14] */ ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_MASK 0x0000c000 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_SHIFT 14 ++#define BCHP_USB_CTRL_USB30_CTL3_usb30_ctl3_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph_en [13:13] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_MASK 0x00002000 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txdeemph [12:08] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_MASK 0x00001f00 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txdeemph_DEFAULT 0x00000009 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin [07:04] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_MASK 0x000000f0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_rxebufmode [03:03] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_MASK 0x00000008 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_SHIFT 3 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_rxebufmode_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txmargin_en [02:02] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_MASK 0x00000004 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txmargin_en_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_txswing [01:01] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_txswing_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL3 :: phy3_pipe_mode [00:00] */ ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL3_phy3_pipe_mode_DEFAULT 0x00000001 ++ ++/*************************************************************************** ++ *USB30_CTL4 - USB30 CONTROL Register 4 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL4 :: usb30_ctl4_spare1 [31:24] */ ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_MASK 0xff000000 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_CTL4_usb30_ctl4_spare1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: phy3_tpout_sel [23:16] */ ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_MASK 0x00ff0000 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_CTL4_phy3_tpout_sel_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_CTL4 :: xhci_tpout_sel [15:00] */ ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_MASK 0x0000ffff ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL4_xhci_tpout_sel_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_PCTL - USB30 PORT CONTROL Register ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE2 [31:29] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_MASK 0xe0000000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_SHIFT 29 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE2_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX_P1 [28:28] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_MASK 0x10000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_SHIFT 28 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1 [27:27] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_MASK 0x08000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_SHIFT 27 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1 [26:25] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_MASK 0x06000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_SHIFT 25 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE_P1 [24:24] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_MASK 0x01000000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_SHIFT 24 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE_P1 [23:23] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_MASK 0x00800000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_SHIFT 23 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE_P1 [22:22] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_MASK 0x00400000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_SHIFT 22 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE_P1 [21:21] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_MASK 0x00200000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_SHIFT 21 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE_P1 [20:20] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_MASK 0x00100000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_SHIFT 20 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE_P1 [19:18] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_MASK 0x000c0000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_SHIFT 18 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB_P1 [17:17] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_MASK 0x00020000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_SHIFT 17 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_P1_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING_P1 [16:16] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_MASK 0x00010000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_SHIFT 16 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_P1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_IDDQ_OVERRIDE [15:15] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_MASK 0x00008000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_SHIFT 15 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_IDDQ_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: USB3_PCTL_SPARE1 [14:13] */ ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_MASK 0x00006000 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_SHIFT 13 ++#define BCHP_USB_CTRL_USB30_PCTL_USB3_PCTL_SPARE1_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_BYP_CLKMUX [12:12] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_MASK 0x00001000 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_SHIFT 12 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_BYP_CLKMUX_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_EN [11:11] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_MASK 0x00000800 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_SHIFT 11 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_EN_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_PIPE_PWRDWN_OVERRIDE_VALUE [10:09] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_MASK 0x00000600 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_SHIFT 9 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_PIPE_PWRDWN_OVERRIDE_VALUE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetOut_OVERRIDE [08:08] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_MASK 0x00000100 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_SHIFT 8 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetOut_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_ElecIdle_OVERRIDE [07:07] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_MASK 0x00000080 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_SHIFT 7 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_ElecIdle_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_RxDetReq_OVERRIDE [06:06] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_MASK 0x00000040 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_SHIFT 6 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_RxDetReq_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_TX_PD_OVERRIDE [05:05] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_MASK 0x00000020 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_SHIFT 5 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_TX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_RX_PD_OVERRIDE [04:04] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_MASK 0x00000010 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_SHIFT 4 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_RX_PD_OVERRIDE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_MODE [03:02] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_MASK 0x0000000c ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_SHIFT 2 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_MODE_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_SOFT_RESETB [01:01] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_MASK 0x00000002 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_SHIFT 1 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_SOFT_RESETB_DEFAULT 0x00000001 ++ ++/* USB_CTRL :: USB30_PCTL :: PHY3_AFE_NON_DRIVING [00:00] */ ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_MASK 0x00000001 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_PCTL_PHY3_AFE_NON_DRIVING_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *USB30_CTL5 - USB30 CONTROL Register 5 ++ ***************************************************************************/ ++/* USB_CTRL :: USB30_CTL5 :: USB30_CTL5 [31:00] */ ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_MASK 0xffffffff ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_SHIFT 0 ++#define BCHP_USB_CTRL_USB30_CTL5_USB30_CTL5_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE5 - Spare1 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE5 :: SPARE5_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE5_SPARE5_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SPARE6 - Spare2 Register for future use ++ ***************************************************************************/ ++/* USB_CTRL :: SPARE6 :: SPARE6_BITS [31:00] */ ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_MASK 0xffffffff ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_SHIFT 0 ++#define BCHP_USB_CTRL_SPARE6_SPARE6_BITS_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB0_BASE_RANGE - SCB0 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_END_ADDR_DEFAULT 0x00000003 ++ ++/* USB_CTRL :: SCB0_BASE_RANGE :: SCB0_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_BASE_RANGE_SCB0_BASE_START_ADDR_DEFAULT 0x00000000 ++ ++/*************************************************************************** ++ *SCB1_BASE_RANGE - SCB1 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_END_ADDR_DEFAULT 0x00000007 ++ ++/* USB_CTRL :: SCB1_BASE_RANGE :: SCB1_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_BASE_RANGE_SCB1_BASE_START_ADDR_DEFAULT 0x00000004 ++ ++/*************************************************************************** ++ *SCB2_BASE_RANGE - SCB2 base start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_END_ADDR_DEFAULT 0x0000000b ++ ++/* USB_CTRL :: SCB2_BASE_RANGE :: SCB2_BASE_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_BASE_RANGE_SCB2_BASE_START_ADDR_DEFAULT 0x00000008 ++ ++/*************************************************************************** ++ *SCB0_EXTN_RANGE - SCB0 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_END_ADDR_DEFAULT 0x0000001b ++ ++/* USB_CTRL :: SCB0_EXTN_RANGE :: SCB0_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB0_EXTN_RANGE_SCB0_EXTN_START_ADDR_DEFAULT 0x00000010 ++ ++/*************************************************************************** ++ *SCB1_EXTN_RANGE - SCB1 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_END_ADDR_DEFAULT 0x0000003b ++ ++/* USB_CTRL :: SCB1_EXTN_RANGE :: SCB1_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB1_EXTN_RANGE_SCB1_EXTN_START_ADDR_DEFAULT 0x00000030 ++ ++/*************************************************************************** ++ *SCB2_EXTN_RANGE - SCB2 extn start and end address ++ ***************************************************************************/ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_SPARE_BITS [31:24] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_MASK 0xff000000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_SHIFT 24 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_SPARE_BITS_DEFAULT 0x00000000 ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_END_ADDR [23:12] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_MASK 0x00fff000 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_SHIFT 12 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_END_ADDR_DEFAULT 0x000000cb ++ ++/* USB_CTRL :: SCB2_EXTN_RANGE :: SCB2_EXTN_START_ADDR [11:00] */ ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_MASK 0x00000fff ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_SHIFT 0 ++#define BCHP_USB_CTRL_SCB2_EXTN_RANGE_SCB2_EXTN_START_ADDR_DEFAULT 0x000000c0 ++ ++#endif /* #ifndef BCHP_USB_CTRL_H__ */ ++ ++/* End of File */ +diff --git a/include/linux/brcmstb/brcmstb.h b/include/linux/brcmstb/brcmstb.h +index 197d36f1..fc4055d6 100644 +--- a/include/linux/brcmstb/brcmstb.h ++++ b/include/linux/brcmstb/brcmstb.h +@@ -64,4 +64,65 @@ int brcmstb_pm_mem_region(phys_addr_t addr, size_t len); + + #endif /* !defined(__ASSEMBLY__) */ + ++/*********************************************************************** ++ * BCHP header lists ++ * ++ * NOTE: This section is autogenerated. Do not edit by hand. ++ ***********************************************************************/ ++ ++#if defined(CONFIG_BCM3390A0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7145A0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7145B0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7250B0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7364A0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7366B0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7366C0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM74371A0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7439A0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7439B0) ++#include ++#include ++ ++#elif defined(CONFIG_BCM7445D0) ++#include ++#include ++ ++#endif ++ ++#if !defined(__ASSEMBLY__) ++ ++#define DEV_RD(x) (*((volatile unsigned long *)(x))) ++#define DEV_WR(x, y) do { *((volatile unsigned long *)(x)) = (y); } while (0) ++#define DEV_UNSET(x, y) do { DEV_WR((x), DEV_RD(x) & ~(y)); } while (0) ++#define DEV_SET(x, y) do { DEV_WR((x), DEV_RD(x) | (y)); } while (0) ++ ++#endif /* !defined(__ASSEMBLY__) */ ++ + #endif /* _ASM_BRCMSTB_BRCMSTB_H */ +-- +2.17.0 + diff --git a/board/uma/patches_4.1/01_mtd-brcmstb_nand-ucorrectable-ECC-error.patch b/board/uma/patches_4.1/01_mtd-brcmstb_nand-ucorrectable-ECC-error.patch new file mode 100644 index 000000000000..92157c6b305c --- /dev/null +++ b/board/uma/patches_4.1/01_mtd-brcmstb_nand-ucorrectable-ECC-error.patch @@ -0,0 +1,28 @@ +diff -Naur ref/drivers/mtd/nand/nand_base.c mod/drivers/mtd/nand/nand_base.c +--- ref/drivers/mtd/nand/nand_base.c 2017-01-20 11:36:18.048540137 +0000 ++++ mod/drivers/mtd/nand/nand_base.c 2017-01-20 11:38:22.367849844 +0000 +@@ -499,11 +499,11 @@ + { + struct nand_chip *chip = mtd->priv; + +- if (!chip->bbt) ++/* if (!chip->bbt) */ + return chip->block_bad(mtd, ofs, getchip); + + /* Return info from the table */ +- return nand_isbad_bbt(mtd, ofs, allowbbt); ++/* return nand_isbad_bbt(mtd, ofs, allowbbt); */ + } + + /** +@@ -2719,8 +2719,10 @@ + chip->page_shift, 0, allowbbt)) { + pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", + __func__, page); ++/* + instr->state = MTD_ERASE_FAILED; + goto erase_exit; ++*/ + } + + /* diff --git a/board/uma/patches_4.1/04_jffs2_nooob_write.patch b/board/uma/patches_4.1/04_jffs2_nooob_write.patch new file mode 100644 index 000000000000..96d7100a4736 --- /dev/null +++ b/board/uma/patches_4.1/04_jffs2_nooob_write.patch @@ -0,0 +1,133 @@ +diff -Naur linux/fs/jffs2/fs.c linux.new/fs/jffs2/fs.c +--- linux/fs/jffs2/fs.c 2014-12-07 10:41:15.000000000 +0100 ++++ linux.new/fs/jffs2/fs.c 2015-03-11 12:20:19.093282577 +0100 +@@ -710,6 +710,8 @@ + int ret = 0; + + if (jffs2_cleanmarker_oob(c)) { ++ if(!jffs2_oob_write_enabled(c)) ++ pr_info("JFFS2 doesn't use OOB.\n"); + /* NAND flash... do setup accordingly */ + ret = jffs2_nand_flash_setup(c); + if (ret) +diff -Naur linux/fs/jffs2/os-linux.h linux.new/fs/jffs2/os-linux.h +--- linux/fs/jffs2/os-linux.h 2014-12-07 10:41:15.000000000 +0100 ++++ linux.new/fs/jffs2/os-linux.h 2015-03-11 12:20:19.085282544 +0100 +@@ -108,6 +108,7 @@ + #endif + + #define jffs2_cleanmarker_oob(c) (c->mtd->type == MTD_NANDFLASH) ++#define jffs2_oob_write_enabled(c) (c->mtd->flags & MTD_OOB_WRITEABLE) + + #define jffs2_wbuf_dirty(c) (!!(c)->wbuf_len) + +diff -Naur linux/fs/jffs2/wbuf.c linux.new/fs/jffs2/wbuf.c +--- linux/fs/jffs2/wbuf.c 2015-04-25 10:00:02.000000000 +0530 ++++ linux.new/fs/jffs2/wbuf.c 2016-05-20 11:59:27.370298022 +0530 +@@ -1037,6 +1037,9 @@ + int cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + struct mtd_oob_ops ops; + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = NR_OOB_SCAN_PAGES * c->oobavail; + ops.oobbuf = c->oobbuf; +@@ -1079,6 +1082,9 @@ + struct mtd_oob_ops ops; + int ret, cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = cmlen; + ops.oobbuf = c->oobbuf; +@@ -1104,6 +1110,9 @@ + struct mtd_oob_ops ops; + int cmlen = min_t(int, c->oobavail, OOB_CM_SIZE); + ++ if(!jffs2_oob_write_enabled(c)) ++ return 0; ++ + ops.mode = MTD_OPS_AUTO_OOB; + ops.ooblen = cmlen; + ops.oobbuf = (uint8_t *)&oob_cleanmarker; +@@ -1181,6 +1190,42 @@ + jffs2_dbg(1, "%s()\n", __func__); + } + ++static int jffs2_nand_clean_bad_blocks(struct jffs2_sb_info *c) ++{ ++ loff_t offs; ++ int good_block_thresold,blocks, good_blocks, bad_blocks; ++ struct erase_info instr; ++ ++ blocks = good_blocks = bad_blocks = 0; ++ ++ for(offs = 0; offs < c->mtd->size; offs += c->mtd->erasesize ) ++ { ++ if (mtd_block_isbad(c->mtd, offs)) ++ bad_blocks++; ++ blocks++; ++ } ++ good_blocks = blocks - bad_blocks; ++ good_block_thresold = blocks/4; ++ ++ if(good_blocks < good_block_thresold) ++ { ++ pr_info("%d good blocks not enough , erasing %d bad blocks\n",good_blocks,bad_blocks); ++ for(offs = 0; offs < c->mtd->size; offs += c->mtd->erasesize ) ++ { ++ if (mtd_block_isbad(c->mtd, offs)) ++ { ++ memset(&instr, 0, sizeof(instr)); ++ instr.mtd = c->mtd; ++ instr.addr = offs; ++ instr.len = c->mtd->erasesize; ++ instr.callback = NULL; ++ mtd_erase(c->mtd, &instr); ++ } ++ } ++ } ++ return 0; ++} ++ + int jffs2_nand_flash_setup(struct jffs2_sb_info *c) + { + struct nand_ecclayout *oinfo = c->mtd->ecclayout; +@@ -1197,6 +1242,8 @@ + } + + jffs2_dbg(1, "using OOB on NAND\n"); ++ ++ jffs2_nand_clean_bad_blocks(c); + + c->oobavail = oinfo->oobavail; + +diff -Naur linux/include/uapi/mtd/mtd-abi.h linux.new/include/uapi/mtd/mtd-abi.h +--- linux/include/uapi/mtd/mtd-abi.h 2014-12-07 10:41:16.000000000 +0100 ++++ linux.new/include/uapi/mtd/mtd-abi.h 2015-03-11 12:20:19.085282544 +0100 +@@ -103,6 +103,7 @@ + #define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ + #define MTD_NO_ERASE 0x1000 /* No erase necessary */ + #define MTD_POWERUP_LOCK 0x2000 /* Always locked after reset */ ++#define MTD_OOB_WRITEABLE 0x4000 /* Use Out-Of-Band area */ + + /* Some common devices / combinations of capabilities */ + #define MTD_CAP_ROM 0 +diff -Naur linux/fs/jffs2/erase.c linux.new/fs/jffs2/erase.c +--- linux/fs/jffs2/erase.c 2015-04-25 10:00:02.000000000 +0530 ++++ linux/fs/jffs2/erase.c 2016-05-13 17:59:29.433389720 +0530 +@@ -421,6 +421,10 @@ + ret = 0; + fail: + kfree(ebuf); ++ /* Sumil: buggy driver may return error on reading freshly erased block. ++ * Therer is no reason to mark block to bad because of the error returned by mtd_read() ++ */ ++ ret = 0; + return ret; + } + diff --git a/board/uma/patches_4.1/brcm_usb_legacy.cfg b/board/uma/patches_4.1/brcm_usb_legacy.cfg new file mode 100644 index 000000000000..a44e7c1d7dae --- /dev/null +++ b/board/uma/patches_4.1/brcm_usb_legacy.cfg @@ -0,0 +1,4 @@ +# Use legacy USB drivers. +CONFIG_BRCM_USB_LEGACY=y +# Set the chipset info required by legacy USB drivers. +CONFIG_BCM7439B0=y diff --git a/board/uma/patches_4.1/nand.cfg b/board/uma/patches_4.1/nand.cfg new file mode 100644 index 000000000000..02457e1ba995 --- /dev/null +++ b/board/uma/patches_4.1/nand.cfg @@ -0,0 +1,11 @@ +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_IDS=y +CONFIG_BRCM_HAS_NAND_MINOR_1=y +CONFIG_BRCM_HAS_NAND_MAJOR_7=y +CONFIG_BRCMNAND_MAJOR_VERS=7 +CONFIG_BRCMNAND_MINOR_VERS=1 +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y diff --git a/board/uma/patches_4.1/spare_area_calc.patch b/board/uma/patches_4.1/spare_area_calc.patch new file mode 100644 index 000000000000..78adde2515cd --- /dev/null +++ b/board/uma/patches_4.1/spare_area_calc.patch @@ -0,0 +1,26 @@ +diff -Naur a/linux/drivers/mtd/nand/brcmnand/brcmnand.c b/linux/drivers/mtd/nand/brcmnand/brcmnand.c +--- a/linux/drivers/mtd/nand/brcmnand/brcmnand.c 2018-07-06 09:00:57.611122716 +0100 ++++ b/linux/drivers/mtd/nand/brcmnand/brcmnand.c 2018-07-06 08:56:50.815339876 +0100 +@@ -2238,8 +2238,20 @@ + &oob_sector); + if (ret) { + /* Use detected size */ +- cfg->spare_area_size = mtd->oobsize / +- (mtd->writesize >> FC_SHIFT); ++ ++ /* Arris workaround, this calculation does not work and results in spare_area_size=56 rather than 27 ++ so just set spare_area_size to the register value. ++ */ ++ ++ /*cfg->spare_area_size = mtd->oobsize / ++ (mtd->writesize >> FC_SHIFT);*/ ++ u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, ++ BRCMNAND_CS_ACC_CONTROL); ++ ++ tmp = nand_readreg(ctrl, acc_control_offs); ++ tmp &= brcmnand_spare_area_mask(ctrl); ++ cfg->spare_area_size = tmp; ++ + } else { + cfg->spare_area_size = oob_sector; + } diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index edc893098fa6..fbe5d533563e 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -5,7 +5,7 @@ BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_TOOLCHAIN_BUILDROOT_VENDOR="uma" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_GCC_ENABLE_GRAPHITE=y BR2_PACKAGE_HOST_GDB=y @@ -17,11 +17,11 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_SYSTEM_DHCP="eth0" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y -BR2_LINUX_KERNEL_CUSTOM_REPO_URL="ssh://git@github.com/Metrological/bcm-stblinux-3.14" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="3.14-1.9-hf" -BR2_LINUX_KERNEL_PATCH="board/uma/patches" +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="1fefb34bba153294198288b75dc2c273e1bb6e10" +BR2_LINUX_KERNEL_PATCH="board/uma/patches-4.1" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/uma/linux-3-14.config" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/uma/linux-4.1.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_FFMPEG_GPL=y BR2_PACKAGE_FFMPEG_NONFREE=y @@ -30,6 +30,7 @@ BR2_PACKAGE_FFMPEG_POSTPROC=y BR2_PACKAGE_FFMPEG_SWSCALE=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +BR2_PACKAGE_GST1_BCM_ENABLE_SVP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y @@ -63,6 +64,8 @@ BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_7439=y +BR2_PACKAGE_BCM_REFSW_SAGE=y BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE="104857600" BR2_PACKAGE_BCM_REFSW_BOXMODE="1" BR2_PACKAGE_ALSA_LIB=y @@ -95,6 +98,8 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST="306" BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 1cddcd7e3a05..90b987e68012 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -143,7 +143,6 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_GRAPHICS) $(BCM_REFSW_BUILD_EGLCUBE) $(BCM_REFSW_BUILD_SAGE_SRAI) - $(BCM_REFSW_BUILD_SAGE_PRDY30_SVP) $(BCM_REFSW_BUILD_WAYLAND_EGL) $(BCM_REFSW_BUILD_NEXUS_LIBB_OS) endef diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index e2b9699c6d61..0d914708bc5b 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -6,7 +6,7 @@ BCM_REFSW_PLATFORM_REV = A0 BCM_REFSW_BCHP_CHIP = 7437 BCM_REFSW_BCHP_VER_LOWER = a0 BCM_REFSW_MAKE_ENV += \ - NEXUS_USE_74371_XID="y" +NEXUS_USE_74371_XID="y" else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7271),y) BCM_REFSW_PLATFORM = 97271 BCM_REFSW_PLATFORM_REV = B0 @@ -34,10 +34,12 @@ BCM_REFSW_MAKE_ENV += ARM_PLATFORM='yes' \ else BCM_REFSW_PLATFORM = 97439 BCM_REFSW_PLATFORM_REV = B0 -BCM_REFSW_MAKE_ENV += NEXUS_USE_7439_SFF=y BCM_REFSW_PLATFORM_VC = vc5 BCM_REFSW_BCHP_CHIP = 7439 BCM_REFSW_BCHP_VER_LOWER = b0 +BCM_REFSW_MAKE_ENV += \ + NEXUS_USE_7439_SFF=n \ + NEXUS_USE_74371_XID=y endif BCM_REFSW_MAKE_ENV += \ NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE diff --git a/package/gstreamer1/gst1-bcm/Config.in b/package/gstreamer1/gst1-bcm/Config.in index 95ffdb5ce567..be5e30ad5907 100644 --- a/package/gstreamer1/gst1-bcm/Config.in +++ b/package/gstreamer1/gst1-bcm/Config.in @@ -53,4 +53,17 @@ config BR2_PACKAGE_GST1_BCM_VIDFILTER help Add BRCM libbrcmvidfilter.so +config BR2_PACKAGE_GST1_BCM_ENABLE_SVP + bool "enable svp" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Enable SVP support + +config BR2_PACKAGE_GST1_BCM_WPEFRAMEWORK_CDM + bool "WPEframework CDM" + depends on BR2_PACKAGE_GST1_BCM_ENABLE_SVP && BR2_PACKAGE_WPEFRAMEWORK_CDM + default y + help + Use WPEFramework CDM endif diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index fcbe73fa162e..2f5b86992fae 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -48,6 +48,10 @@ ifeq ($(BR2_PACKAGE_GST1_BCM_VP9_SUPPORT),y) CFLAGS += -DVP9_SUPPORT endif +ifeq ($(BR2_PACKAGE_GST1_BCM_WPEFRAMEWORK_CDM),y) +GST1_BCM_DEPENDENCIES += wpeframework +CFLAGS += -DGST_BRCM_WPEFRAMEWORK_CDM +endif GST1_BCM_AUTORECONF = YES GST1_BCM_CONF_ENV += \ @@ -127,6 +131,9 @@ else GST1_BCM_CONF_OPTS += --disable-vidfilter endif +ifeq ($(BR2_PACKAGE_GST1_BCM_ENABLE_SVP),y) +GST1_BCM_CONF_OPTS += --enable-svp + # Temporary audio fix for youtube on vss platforms ifeq ($(BR2_PACKAGE_NEXUS_REMOVE_OPUS),y) GST1_BCM_PKGDIR = "$(TOP_DIR)/package/gstreamer1/gst1-bcm" From 99990b5c209de75c7b3de809aa873e8646e871f1 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 9 Aug 2018 00:06:57 +0200 Subject: [PATCH 330/614] [gst1-bcm] close if condition properly --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 2f5b86992fae..e62258e24c9d 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -133,6 +133,7 @@ endif ifeq ($(BR2_PACKAGE_GST1_BCM_ENABLE_SVP),y) GST1_BCM_CONF_OPTS += --enable-svp +endif # Temporary audio fix for youtube on vss platforms ifeq ($(BR2_PACKAGE_NEXUS_REMOVE_OPUS),y) From 241f42669f71badbc3257e1bcba940e776a6a522 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 9 Aug 2018 00:31:42 +0200 Subject: [PATCH 331/614] [bcm-refsw] Add uma r5 specific config --- configs/uma7439_full_wpe_nf_defconfig | 7 +------ package/bcm-refsw/Config.in | 4 ++++ package/bcm-refsw/platforms.inc | 10 +++++++++- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index fbe5d533563e..897a123986fd 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -23,11 +23,6 @@ BR2_LINUX_KERNEL_PATCH="board/uma/patches-4.1" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/uma/linux-4.1.config" BR2_PACKAGE_BUSYBOX_SMP=y -BR2_PACKAGE_FFMPEG_GPL=y -BR2_PACKAGE_FFMPEG_NONFREE=y -BR2_PACKAGE_FFMPEG_AVRESAMPLE=y -BR2_PACKAGE_FFMPEG_POSTPROC=y -BR2_PACKAGE_FFMPEG_SWSCALE=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_BCM_ENABLE_SVP=y @@ -64,7 +59,7 @@ BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y -BR2_PACKAGE_BCM_REFSW_PLATFORM_7439=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y BR2_PACKAGE_BCM_REFSW_SAGE=y BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE="104857600" BR2_PACKAGE_BCM_REFSW_BOXMODE="1" diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 9b6b97abc667..cb4d8bdf0c64 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -96,6 +96,10 @@ choice config BR2_PACKAGE_BCM_REFSW_PLATFORM_7437 bool "BCM 7437" depends on BR2_arm + + config BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5 + bool "UMA r5" + depends on BR2_arm config BR2_PACKAGE_BCM_REFSW_PLATFORM_DCX960 bool "Arris DCX960 EPR2/PPR2" diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index 0d914708bc5b..18b64e95327b 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -31,7 +31,7 @@ BCM_REFSW_MAKE_ENV += ARM_PLATFORM='yes' \ NEXUS_PLATFORM_DOCSIS_BCM33843_SUPPORT='y' \ NEXUS_PLATFORM_DOCSIS_IB_SUPPORT='y' \ NEXUS_PLATFORM_DOCSIS_OOB_SUPPORT='y' -else +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5),y) BCM_REFSW_PLATFORM = 97439 BCM_REFSW_PLATFORM_REV = B0 BCM_REFSW_PLATFORM_VC = vc5 @@ -40,6 +40,14 @@ BCM_REFSW_BCHP_VER_LOWER = b0 BCM_REFSW_MAKE_ENV += \ NEXUS_USE_7439_SFF=n \ NEXUS_USE_74371_XID=y +else +BCM_REFSW_PLATFORM = 97439 +BCM_REFSW_PLATFORM_REV = B0 +BCM_REFSW_PLATFORM_VC = vc5 +BCM_REFSW_BCHP_CHIP = 7439 +BCM_REFSW_BCHP_VER_LOWER = b0 +BCM_REFSW_MAKE_ENV += \ + NEXUS_USE_7439_SFF=Y endif BCM_REFSW_MAKE_ENV += \ NEXUS_ENDIAN=BSTD_ENDIAN_LITTLE From 3bd7012fd1772f380b3a786bd472e22ebe42500e Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 9 Aug 2018 01:10:00 +0200 Subject: [PATCH 332/614] [gstreamer-brcm]: Use 17.3 rdk version of sink for refsw 17.4 --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index e62258e24c9d..b8146c214c02 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -9,7 +9,7 @@ GST1_BCM_VERSION = 16.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_2),y) GST1_BCM_VERSION = 16.2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) -GST1_BCM_VERSION = 17.1-7 +GST1_BCM_VERSION = 17.3-rdkv-20180327 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1),y) GST1_BCM_VERSION = 17.1-7 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) From 649e22467f71a780ffd95d41293e145ca4e414c3 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 9 Aug 2018 08:01:43 +0200 Subject: [PATCH 333/614] [UMA] Add versioning scheme compliant to current supported RDK. Enable automatic install op SAGE on SVP platforms. --- package/Config.in | 2 ++ package/bcm-refsw/nexus.inc | 2 +- package/icu/icu.mk | 6 +++++- package/openssl/openssl.hash | 2 ++ package/openssl/openssl.mk | 3 +++ package/rdk-sdk/Config.in | 9 +++++++++ package/rdk-sdk/rdk-sdk.mk | 7 +++++++ package/sage-firmware/Config.in | 5 +++++ package/sage-firmware/sage-firmware.mk | 12 ++++++++++++ package/zlib/zlib.hash | 1 + package/zlib/zlib.mk | 4 ++++ 11 files changed, 51 insertions(+), 2 deletions(-) create mode 100644 package/rdk-sdk/Config.in create mode 100644 package/rdk-sdk/rdk-sdk.mk create mode 100644 package/sage-firmware/Config.in create mode 100644 package/sage-firmware/sage-firmware.mk diff --git a/package/Config.in b/package/Config.in index eebe77f7b8d3..21166d4caf24 100644 --- a/package/Config.in +++ b/package/Config.in @@ -357,6 +357,7 @@ menu "Hardware handling" menu "Firmware" source "package/am33x-cm3/Config.in" source "package/b43-firmware/Config.in" + source "package/sage-firmware/Config.in" source "package/linux-firmware/Config.in" source "package/rpi-firmware/Config.in" source "package/rpi-wifi-firmware/Config.in" @@ -481,6 +482,7 @@ endmenu source "package/pps-tools/Config.in" source "package/pru-software-support/Config.in" source "package/pulseview/Config.in" + source "package/rdk-sdk/Config.in" source "package/read-edid/Config.in" source "package/rfkill/Config.in" source "package/rng-tools/Config.in" diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index 87118d006cbd..41732ad9c058 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -33,7 +33,7 @@ define BCM_REFSW_BUILD_PMLIB endef define BCM_REFSW_INSTALL_PMLIB_DEV - $(INSTALL) -m 644 -D $(BCM_REFSW_OUTPUT)/BSEAV/lib/pmlib/libpmlib.a $(STAGING_DIR)/usr/lib/libpmlib.a + $(INSTALL) -m 644 -D $(BCM_REFSW_OUTPUT)/BSEAV/lib/$(BR2_ARCH)-linux/pmlib/libpmlib.a $(STAGING_DIR)/usr/lib/libpmlib.a $(INSTALL) -m 644 $(BCM_REFSW_DIR)/BSEAV/lib/pmlib/$(BCM_PMLIB_VERSION)/pmlib.h $(STAGING_DIR)/usr/include/refsw endef endif diff --git a/package/icu/icu.mk b/package/icu/icu.mk index 10670bb36d9a..518327e2c6ae 100644 --- a/package/icu/icu.mk +++ b/package/icu/icu.mk @@ -4,10 +4,14 @@ # ################################################################################ +ifeq ($(BR2_PACKAGE_RDK_VERSIONING),y) ICU_VERSION = 57.1 -ifeq ($(BR2_PACKAGE_NETFLIX5),y) +else ifeq ($(BR2_PACKAGE_NETFLIX5),y) +ICU_VERSION = 58.2 +else ICU_VERSION = 58.2 endif + ICU_SOURCE = icu4c-$(subst .,_,$(ICU_VERSION))-src.tgz ICU_SITE = http://download.icu-project.org/files/icu4c/$(ICU_VERSION) ICU_LICENSE = ICU License diff --git a/package/openssl/openssl.hash b/package/openssl/openssl.hash index a127e05cba84..da05c7962f7d 100644 --- a/package/openssl/openssl.hash +++ b/package/openssl/openssl.hash @@ -1,8 +1,10 @@ # From https://www.openssl.org/source/openssl-1.0.2k.tar.gz.sha256 sha256 6b3977c61f2aedf0f96367dcfb5c6e578cf37e7b8d913b4ecb6643c3cb88d8c0 openssl-1.0.2k.tar.gz sha256 932b4ee4def2b434f85435d9e3e19ca8ba99ce9a065a61524b429a9d5e9b2e9c openssl-1.0.2f.tar.gz +sha256 671c36487785628a703374c652ad2cebea45fa920ae5681515df25d9f2c9a8c8 openssl-1.0.2d.tar.gz # Locally computed sha256 eddd8a5123748052c598214487ac178e4bfa4e31ba2ec520c70d59c8c5bfa2e9 openssl-1.0.2a-parallel-install-dirs.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d sha256 147c3eeaad614c044749ea527cb433eae5e2d5cad34a78c6ba61cd967bfbe01f openssl-1.0.2a-parallel-obj-headers.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d sha256 30cb49489de5041841a74da9155cd4fabfbce33237262ba7cd23974314ae2956 openssl-1.0.2a-parallel-symlinking.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d sha256 deaf6f3af41874ecc6d63841ea14b8e6c71cea81d4a511a754bc90c9a993147f openssl-1.0.2d-parallel-build.patch?id=c8abcbe8de5d3b6cdd68c162f398c011ff6e2d9d + diff --git a/package/openssl/openssl.mk b/package/openssl/openssl.mk index 3300a6d28d03..e46fe3ed23fd 100644 --- a/package/openssl/openssl.mk +++ b/package/openssl/openssl.mk @@ -8,6 +8,9 @@ OPENSSL_VERSION = 1.0.2k ifeq ($(BR2_PACKAGE_NETFLIX5),y) OPENSSL_VERSION = 1.0.2f endif +ifeq ($(BR2_PACKAGE_RDK_VERSIONING),y) +OPENSSL_VERSION = 1.0.2d +endif OPENSSL_SITE = http://www.openssl.org/source OPENSSL_LICENSE = OpenSSL or SSLeay OPENSSL_LICENSE_FILES = LICENSE diff --git a/package/rdk-sdk/Config.in b/package/rdk-sdk/Config.in new file mode 100644 index 000000000000..f975083a19cb --- /dev/null +++ b/package/rdk-sdk/Config.in @@ -0,0 +1,9 @@ +config BR2_PACKAGE_RDK_SDK + bool "rdk-sdk" + select BR2_PACKAGE_RDK_VERSIONING + help + If this flag is enabled, some of the packages will be set to + the version as found in the currently supported RDK Yocto. + +config BR2_PACKAGE_RDK_VERSIONING + bool diff --git a/package/rdk-sdk/rdk-sdk.mk b/package/rdk-sdk/rdk-sdk.mk new file mode 100644 index 000000000000..8c15a578ef6f --- /dev/null +++ b/package/rdk-sdk/rdk-sdk.mk @@ -0,0 +1,7 @@ +################################################################################ +# +# rdk-sdk +# +################################################################################ + +$(eval $(virtual-package)) diff --git a/package/sage-firmware/Config.in b/package/sage-firmware/Config.in new file mode 100644 index 000000000000..c01de24a5080 --- /dev/null +++ b/package/sage-firmware/Config.in @@ -0,0 +1,5 @@ +config BR2_PACKAGE_SAGE_FIRMWARE + bool "bcm-sage" + depends on BR2_PACKAGE_HAS_NEXUS + help + Pre-compiled Sage binaries for a platform diff --git a/package/sage-firmware/sage-firmware.mk b/package/sage-firmware/sage-firmware.mk new file mode 100644 index 000000000000..befedb695f69 --- /dev/null +++ b/package/sage-firmware/sage-firmware.mk @@ -0,0 +1,12 @@ +################################################################################ +# +# sage-firmware +# +################################################################################ +SAGE_FIRMWARE_VERSION = master +SAGE_FIRMWARE_SITE = git@github.com:Metrogical/bcm-sage.git +SAGE_FIRMWARE_SITE_METHOD = git +SAGE_FIRMWARE_INSTALL_STAGING = NO +SAGE_FIRMWARE_INSTALL_TARGET = YES + +$(eval $(virtual-package)) diff --git a/package/zlib/zlib.hash b/package/zlib/zlib.hash index 81cb64ef62f4..6e1d311ee48a 100644 --- a/package/zlib/zlib.hash +++ b/package/zlib/zlib.hash @@ -1,2 +1,3 @@ # From http://www.zlib.net/ sha256 4ff941449631ace0d4d203e3483be9dbc9da454084111f97ea0a2114e19bf066 zlib-1.2.11.tar.xz +sha256 03d9c7f67976cf1389589782de46f45011053ea7f4222c2fb8c2cf9fd813bb68 zlib-1.2.9.tar.xz diff --git a/package/zlib/zlib.mk b/package/zlib/zlib.mk index deea5a5ee7a4..0692fbd50ddd 100644 --- a/package/zlib/zlib.mk +++ b/package/zlib/zlib.mk @@ -4,7 +4,11 @@ # ################################################################################ +ifeq ($(BR2_PACKAGE_RDK_VERSIONING),y) +ZLIB_VERSION = 1.2.9 +else ZLIB_VERSION = 1.2.11 +endif ZLIB_SOURCE = zlib-$(ZLIB_VERSION).tar.xz ZLIB_SITE = http://www.zlib.net ZLIB_LICENSE = zlib license From 13f3e18052d2b7c7056d4c733c99107a4ce409df Mon Sep 17 00:00:00 2001 From: Carlos Garcia Campos Date: Wed, 8 Aug 2018 13:53:33 +0200 Subject: [PATCH 334/614] [wpebackend][wpewebkit] bump to latest --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 20 +++++++++----------- package/wpe/wpebackend/Config.in | 1 + package/wpe/wpebackend/wpebackend.mk | 4 ++-- package/wpe/wpewebkit/wpewebkit.mk | 4 ++-- 4 files changed, 14 insertions(+), 15 deletions(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index f8ef908037c7..5b28fca9bb20 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -12,9 +12,7 @@ WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 WPEBACKEND_RDK_FLAGS = ifeq ($(BR2_PACKAGE_LIBXKBCOMMON),y) -WPEBACKEND_RDK_DEPENDENCIES += libxkbcommon xkeyboard-config -else -WPEBACKEND_RDK_FLAGS += -DUSE_KEY_INPUT_HANDLING_LINUX_INPUT=ON +WPEBACKEND_RDK_DEPENDENCIES += xkeyboard-config endif ifeq ($(BR2_PACKAGE_GLUELOGIC_VIRTUAL_KEYBOARD),y) @@ -31,11 +29,11 @@ endif ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyn) -WPEBACKEND_RDK_DEPENDENCIES += wayland westeros libxkbcommon -WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_KEY_INPUT_HANDLING_LINUX_INPUT=OFF -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF +WPEBACKEND_RDK_DEPENDENCIES += wayland westeros +WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyy) -WPEBACKEND_RDK_DEPENDENCIES += libegl wayland westeros wpeframework-plugins libxkbcommon -WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_KEY_INPUT_HANDLING_LINUX_INPUT=OFF -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF +WPEBACKEND_RDK_DEPENDENCIES += libegl wayland westeros wpeframework-plugins +WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF else WPEBACKEND_RDK_DEPENDENCIES += libegl WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_RPI=ON @@ -48,11 +46,11 @@ ifeq ($(BR2_PACKAGE_BCM_WESTON),y) WPEBACKEND_RDK_DEPENDENCIES += bcm-weston WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_NEXUS_WAYLAND=ON else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyn) - WPEBACKEND_RDK_DEPENDENCIES += wayland westeros libxkbcommon - WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_KEY_INPUT_HANDLING_LINUX_INPUT=OFF -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF + WPEBACKEND_RDK_DEPENDENCIES += wayland westeros + WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyy) - WPEBACKEND_RDK_DEPENDENCIES += wayland westeros wpeframework-plugins libxkbcommon wayland-egl-bnxs bcm-refsw - WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_KEY_INPUT_HANDLING_LINUX_INPUT=OFF -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF + WPEBACKEND_RDK_DEPENDENCIES += wayland westeros wpeframework-plugins wayland-egl-bnxs bcm-refsw + WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF else WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_NEXUS=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) diff --git a/package/wpe/wpebackend/Config.in b/package/wpe/wpebackend/Config.in index 0b5a9083ee9f..aa7c90c30e79 100644 --- a/package/wpe/wpebackend/Config.in +++ b/package/wpe/wpebackend/Config.in @@ -1,4 +1,5 @@ config BR2_PACKAGE_WPEBACKEND bool "wpebackend" + select BR2_PACKAGE_LIBXKBCOMMON help Base library for the WPE port of WebKit. diff --git a/package/wpe/wpebackend/wpebackend.mk b/package/wpe/wpebackend/wpebackend.mk index 3430ebed3b43..4d6b088fddde 100644 --- a/package/wpe/wpebackend/wpebackend.mk +++ b/package/wpe/wpebackend/wpebackend.mk @@ -4,10 +4,10 @@ # ################################################################################ -WPEBACKEND_VERSION = 8e5b96fadea9d32515ee590417925878dfa49045 +WPEBACKEND_VERSION = 6955316a9c885a0325f3d1adab7062ce3a12810b WPEBACKEND_SITE = $(call github,WebPlatformForEmbedded,WPEBackend,$(WPEBACKEND_VERSION)) WPEBACKEND_INSTALL_STAGING = YES -WPEBACKEND_DEPENDENCIES += libegl +WPEBACKEND_DEPENDENCIES += libegl libxkbcommon WPEBACKEND_CONF_OPTS += \ -DCMAKE_C_FLAGS="$(TARGET_CFLAGS) -D_GNU_SOURCE" \ -DCMAKE_CXX_FLAGS="$(TARGET_CXXFLAGS) -D_GNU_SOURCE" diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 3e8b2625364f..488cb984dc45 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -6,9 +6,9 @@ # If enabled, choose the development version hash. ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) -WPEWEBKIT_VERSION_VALUE = a9d380f24c4a7553a5461e62022cad01375d1920 +WPEWEBKIT_VERSION_VALUE = 090826b4cd8fe8fb6ac4f2dbae6c4fe519610431 else -WPEWEBKIT_VERSION_VALUE = a9d380f24c4a7553a5461e62022cad01375d1920 +WPEWEBKIT_VERSION_VALUE = 090826b4cd8fe8fb6ac4f2dbae6c4fe519610431 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From b953777e66faf5c3f21f1656b52788428ecde27f Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 9 Aug 2018 14:10:37 +0200 Subject: [PATCH 335/614] [NETFLIX5] Use netflix5 specific branch of WPEFramework plugin --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 24c3f65126f9..682238825cac 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -8,7 +8,7 @@ WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc +WPEFRAMEWORK_NETFLIX_VERSION = ca237132a3ce7d6be01fbe941fdf9a65bebc2c42 endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git From a98b5e1b33b0405854098bdab4815f6ff4817cce Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 9 Aug 2018 15:43:10 +0200 Subject: [PATCH 336/614] [icu]: Rollback the icu version to prior one to fix compilation issue --- package/icu/icu.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/icu/icu.mk b/package/icu/icu.mk index 518327e2c6ae..e0e0f8d0c920 100644 --- a/package/icu/icu.mk +++ b/package/icu/icu.mk @@ -9,7 +9,7 @@ ICU_VERSION = 57.1 else ifeq ($(BR2_PACKAGE_NETFLIX5),y) ICU_VERSION = 58.2 else -ICU_VERSION = 58.2 +ICU_VERSION = 57.1 endif ICU_SOURCE = icu4c-$(subst .,_,$(ICU_VERSION))-src.tgz From 0af68db2c25ec779392591f5529ffcf2f0746b3a Mon Sep 17 00:00:00 2001 From: zubair khan Date: Thu, 9 Aug 2018 13:06:27 -0700 Subject: [PATCH 337/614] [Homecast] Updated homecast defconfig and wpeframework script --- board/homecast/homecast/wpeframework.sh | 58 ++++++------------------- configs/homecast_wpe_defconfig | 4 +- 2 files changed, 17 insertions(+), 45 deletions(-) diff --git a/board/homecast/homecast/wpeframework.sh b/board/homecast/homecast/wpeframework.sh index f14daf247b05..bcf93c47ae7d 100755 --- a/board/homecast/homecast/wpeframework.sh +++ b/board/homecast/homecast/wpeframework.sh @@ -1,57 +1,27 @@ #!/bin/sh export SOURCE=/tmp/nfs/metrological -export DESTINATION=/tmp/nfs/cwc -export LD_LIBRARY_PATH=$SOURCE/usr/lib:/lib:/usr/lib:$SOURCE/lib +export LD_LIBRARY_PATH=$SOURCE/usr/lib:$SOURCE/lib:/lib/:usr/lib export PATH=$PATH:$SOURCE/usr/bin export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/lib/gstreamer-1.0 -# Currently the root system is read-only. Since we cannot add anything there we bind -# existing directories with a copy of the actual system. All the stuff we want to -# add is symbolicly linked in from our sources.. -if [ ! -d $DESTINATION ]; then - -mkdir -p $DESTINATION/share -mkdir -p $DESTINATION/etc -mkdir -p $DESTINATION/lib -cp -rfap /usr/share/* $DESTINATION/share -cp -rfap /etc/* $DESTINATION/etc -cp -rfap /usr/lib/* $DESTINATION/lib - -ln -s $SOURCE/usr/share/mime $DESTINATION/share/mime -ln -s $SOURCE/usr/share/X11 $DESTINATION/share/X11 -ln -s $SOURCE/usr/share/WPEFramework $DESTINATION/share/WPEFramework -ln -s $SOURCE/usr/share/fonts $DESTINATION/share/fonts +# Added missing paths +export FONTCONFIG_PATH=/tmp/nfs/metrological/etc/fonts/ +export XKB_CONFIG_ROOT=/tmp/nfs/metrological/usr/share/X11/xkb/ +export GIO_MODULE_DIR=$SOURCE/usr/lib/gio/modules -if [-f "$DESTINATION/etc/ssl" ]; then -cp -rfap $SOURCE/etc/ssl/* $DESTINATION/etc/ssl/ -else -ln -s $SOURCE/etc/ssl $DESTINATION/etc/ssl -fi - -ln -s $SOURCE/etc/ssl $DESTINATION/lib/ssl -ln -s $SOURCE/etc/fonts $DESTINATION/etc/fonts -ln -s $SOURCE/etc/WPEFramework $DESTINATION/etc/WPEFramework -ln -s $SOURCE/usr/lib/gio $DESTINATION/lib/gio -ln -s /lib/libv3ddriver.so $SOURCE/usr/lib/libEGL.so -ln -s /lib/libv3ddriver.so $SOURCE/usr/lib/libGLESv2.so +# GnuTLS doesn’t honor an environment variable like ‘SSL_CERT_DIR’. +# As temporary solution bind directory with ca-certificates. +export DESTINATION=/tmp/nfs/cwc +if [ ! -d $DESTINATION ]; then +mkdir -p $DESTINATION//etc/ssl/certs + cp -rfap /etc/* $DESTINATION//etc/ssl/certs + ln -s $SOURCE/etc/ssl/certs/ca-certificates.crt $DESTINATION/etc/ssl/certs/ca-certificates.crt fi -grep -q "/usr/share" /proc/mounts && echo "/usr/share is already mounted" || mount --bind $DESTINATION/share /usr/share/ -grep -q "/etc" /proc/mounts && echo "/etc is already mounted" || mount --bind $DESTINATION/etc /etc/ -grep -q "/usr/lib" /proc/mounts && echo "/usr/lib is already mounted" || mount --bind $DESTINATION/lib /usr/lib/ - -cp -rfap $SOURCE/etc/playready/* /etc/playready/ -#ln -s $SOURCE/etc/ssl /etc/ssl - -if [ ! -d $SOURCE/persistent/Netflix ]; then - mkdir -p $SOURCE/persistent/Netflix/dpi - ln -sfn /etc/playready $SOURCE/persistent/Netflix/dpi/playready -fi +grep -q "/etc/ssl/certs" /proc/mounts && echo "/etc/ssl/certs is already mounted" || mount --bind $DESTINATION/etc/ssl/certs /etc/ssl/certs # Firewall for non-prod builds iptables -I INPUT -i eth0 -p tcp --dport 80 -m state --state NEW,ESTABLISHED -j ACCEPT - -LD_PRELOAD=$SOURCE/lib/libstdc\+\+.so.6.0.21:/lib/libnexus.so WPEFramework -c $SOURCE/etc/WPEFramework/config.json - +LD_PRELOAD=$SOURCE/lib/libstdc\+\+.so.6.0.21:/lib/libnexus.so WPEFramework -c $SOURCE/etc/WPEFramework/config.json 2>&1 | logger -t “WPEFramework” diff --git a/configs/homecast_wpe_defconfig b/configs/homecast_wpe_defconfig index 920a1cc4a589..c8caa7b3054b 100644 --- a/configs/homecast_wpe_defconfig +++ b/configs/homecast_wpe_defconfig @@ -55,11 +55,14 @@ BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/tmp/nfs/metrological/persistent" BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/tmp/nfs/metrological/usr/share/WPEFramework" BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/plugins" BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/proxystubs" +BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_CDM=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP="homecast.json" BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y @@ -67,7 +70,6 @@ BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y # BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -# BR2_PACKAGE_WPEFRAMEWORK_UI is not set BR2_PACKAGE_WPEWEBKIT=y # BR2_PACKAGE_WPEWEBKIT_USE_WEB_AUDIO is not set BR2_PACKAGE_LIBXKBCOMMON=y From fdb61661a732fb6b26d9b456adc31600c8b0e4e5 Mon Sep 17 00:00:00 2001 From: Carlos Garcia Campos Date: Fri, 10 Aug 2018 11:19:03 +0200 Subject: [PATCH 338/614] [wpebackend-rdk] bump to latest --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 5b28fca9bb20..bb47136aa6ec 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 91bb2a743a22f6416aa12a1641c7a9c662d5f19b +WPEBACKEND_RDK_VERSION = f55421075d22ee9831bf1fc42184a10473c78f79 WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 089e8104af1f21b7103f66d8225667deb35f69a3 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Fri, 10 Aug 2018 16:53:27 +0200 Subject: [PATCH 339/614] [bcm-refsw] Bump 16.1 (and set it branch instead of tag) --- package/bcm-refsw/bcm-refsw.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 90b987e68012..751d41f2b09d 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -11,7 +11,7 @@ BCM_REFSW_VERSION = 13.4-1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_15_2),y) BCM_REFSW_VERSION = 15.2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_1),y) -BCM_REFSW_VERSION = 16.1-3 +BCM_REFSW_VERSION = 16.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_2),y) BCM_REFSW_VERSION = 16.2-7 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_3),y) From 7755094a7b1e7099f25977d99ed57eea17f6f6ff Mon Sep 17 00:00:00 2001 From: Xabier Rodriguez Calvar Date: Fri, 10 Aug 2018 18:46:34 +0200 Subject: [PATCH 340/614] wpewebkit: bump to latest Fixes build because of wpebackend-rdk changes. --- package/wpe/wpewebkit/wpewebkit.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 488cb984dc45..63dbc3f14678 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -6,9 +6,9 @@ # If enabled, choose the development version hash. ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) -WPEWEBKIT_VERSION_VALUE = 090826b4cd8fe8fb6ac4f2dbae6c4fe519610431 +WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 090826b4cd8fe8fb6ac4f2dbae6c4fe519610431 +WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 76404661cafda2e342536cfc51ba0eee96643390 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Fri, 10 Aug 2018 17:07:38 -0700 Subject: [PATCH 341/614] [TVCONTROL] Enable to Deubg build type for Tracing --- package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk index f87e65c54d61..6eb7a51aee4c 100644 --- a/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk +++ b/package/wpe/wpetvplatform-bcm/wpetvplatform-bcm.mk @@ -16,4 +16,8 @@ ifeq ($(BR2_PACKAGE_WPETVPLATFORM_BCM_DEBUG),y) WPETVPLATFORM_BCM_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) +WPETVPLATFORM_BCM_CONF_OPTS += -DCMAKE_BUILD_TYPE=Debug +endif + $(eval $(cmake-package)) From ca970d4f5a0802efeb8c9e234477f847acd658c9 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 13 Aug 2018 21:17:01 +0200 Subject: [PATCH 342/614] [BCM-REFSW][PLUGINS]: Adding compositor server settings for JSON generation --- package/bcm-refsw/Config.in | 13 ++-- package/wpe/wpeframework-plugins/Config.in | 69 +++++++++++++++++-- .../wpeframework-plugins.mk | 34 ++++++++- 3 files changed, 102 insertions(+), 14 deletions(-) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index cb4d8bdf0c64..e591521af0ec 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -114,6 +114,13 @@ config BR2_PACKAGE_BCM_REFSW_SAGE help Add SAGE support in Nexus. +config BR2_PACKAGE_BCM_REFSW_SAGE_PATH + string "SAGE Path" + default "/usr/bin/" + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Sage binaries path + config BR2_PACKAGE_PROVIDES_NEXUS default "bcm-refsw" @@ -146,12 +153,6 @@ config BR2_PACKAGE_BCM_REFSW_NXCLIENT_EXAMPLES help Build the Nexus client exaples. -config BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE - string "Graphics heap size" - depends on BR2_PACKAGE_BCM_REFSW && BR2_PACKAGE_BCM_REFSW_17_4 - help - Custom graphics heap size - config BR2_PACKAGE_BCM_REFSW_BOXMODE string "Memory Box Mode" depends on BR2_PACKAGE_BCM_REFSW diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 6a30693623c0..56fff0dab4e3 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -44,13 +44,70 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS help Allow unauthenticated clients on the nxserver. - -config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE - string "graphics heap (MB)" +choice + prompt "SVP type" + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL if BR2_PACKAGE_BCM_REFSW_SAGE + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE if !BR2_PACKAGE_BCM_REFSW_SAGE + help + Select the SVP type + + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE + bool "None" + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO + bool "Video" + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL + bool "All" +endchoice + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + bool "Memories" depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - default 100 - help - The ammount of memory in MB to be configured for the GPU. + default n + help + Allow memory heap updates + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX + string "Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Graphics memory. The amount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2 + string "Secondary Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secondary Graphics memory. The amount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED + string "Compressed Restricted Region Memory (Video Secure)" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Compressed Restricted Region Memory (Video Secure) memory. The amount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN + string "Main Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of main memory. The amount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT + string "Export Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Export Region memory. The ammount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX + string "Secure Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secure Graphics memory. The amount of memory in MB to be configured for. + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT + string "Client Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY string "Manual overrule of the time it takes to initialisize all hardware (ms)" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 8a588f85c8de..75a7435efd51 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -257,9 +257,39 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_BOXMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE))" endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_GRAPHICS_HEAP_SIZE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE))" +ifneq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PATH),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SAGE_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH))" endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="None" +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="Video" +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="All" +endif + +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_GFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_GFX2="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_RESTRICTED="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_MAIN="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_EXPORT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_SECUREGFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX))" +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_CLIENT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT))" +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=false else From 0111c728b8382eff2660ae5f5e9bdec4ee604597 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 13 Aug 2018 22:33:54 +0200 Subject: [PATCH 343/614] [UMA]: Update config file --- configs/uma7439_full_wpe_nf_defconfig | 5 ++++- package/bcm-refsw/bcm-refsw.mk | 4 ++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 897a123986fd..2403ed053a4c 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -61,7 +61,7 @@ BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y BR2_PACKAGE_BCM_REFSW_SAGE=y -BR2_PACKAGE_BCM_REFSW_GRAPHICS_HEAP_SIZE="104857600" +BR2_PACKAGE_BCM_REFSW_PMLIB=y BR2_PACKAGE_BCM_REFSW_BOXMODE="1" BR2_PACKAGE_ALSA_LIB=y # BR2_PACKAGE_ALSA_LIB_ALOAD is not set @@ -80,6 +80,9 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT="2" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 751d41f2b09d..baef9c2e01a0 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -27,7 +27,11 @@ BCM_REFSW_VERSION = 17.3-1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) BCM_REFSW_VERSION = 17.3-2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) +ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5),y) +BCM_REFSW_VERSION = 17.4-uma +else BCM_REFSW_VERSION = 17.4-3 +endif else BCM_REFSW_VERSION = 16.2-7 endif From 2db1d6faf48bfe95ef47cfe170e9fcfdc531b40b Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 14 Aug 2018 00:00:29 +0200 Subject: [PATCH 344/614] [UMA]: install sage binaries --- configs/uma7439_full_wpe_nf_defconfig | 1 + package/sage-firmware/sage-firmware.mk | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 2403ed053a4c..042def0f5d1e 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -57,6 +57,7 @@ BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_WIDEVINE=y BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_SAGE_FIRMWARE=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y diff --git a/package/sage-firmware/sage-firmware.mk b/package/sage-firmware/sage-firmware.mk index befedb695f69..b24474422495 100644 --- a/package/sage-firmware/sage-firmware.mk +++ b/package/sage-firmware/sage-firmware.mk @@ -4,9 +4,15 @@ # ################################################################################ SAGE_FIRMWARE_VERSION = master -SAGE_FIRMWARE_SITE = git@github.com:Metrogical/bcm-sage.git +SAGE_FIRMWARE_SITE = git@github.com:Metrological/bcm-sage.git SAGE_FIRMWARE_SITE_METHOD = git SAGE_FIRMWARE_INSTALL_STAGING = NO SAGE_FIRMWARE_INSTALL_TARGET = YES +ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5),y) +define SAGE_FIRMWARE_INSTALL_TARGET_CMDS + $(INSTALL) -D -m 0644 $(@D)/uma-r5/* $(TARGET_DIR)/$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH)/ +endef +endif + $(eval $(virtual-package)) From 04d3b77b8ef52adf106222adcb350a8d494c5ba0 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 14 Aug 2018 14:55:56 +0200 Subject: [PATCH 345/614] [wpeframework-plugins] cleaning up buildroot config file --- package/wpe/wpeframework-plugins/Config.in | 137 +++++++++++---------- 1 file changed, 74 insertions(+), 63 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 56fff0dab4e3..36d41e996869 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -15,6 +15,7 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR WPE Platform Compositor plugin if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART bool "Start Automatically" help @@ -27,91 +28,95 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER bool "Nexus server" - depends on BR2_PACKAGE_HAS_NEXUS + depends on BR2_PACKAGE_HAS_NEXUS help Include a nxserver with the compositor. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE - string "Memory Box Mode" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - help - Memory box mode, you can find details from release notes per platform + string "Memory Box Mode" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + help + Memory box mode, you can find details from release notes per platform config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS bool "Allow unauthenticated clients" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER default n help Allow unauthenticated clients on the nxserver. choice - prompt "SVP type" - default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL if BR2_PACKAGE_BCM_REFSW_SAGE - default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE if !BR2_PACKAGE_BCM_REFSW_SAGE - help - Select the SVP type - - config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE - bool "None" - config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO - bool "Video" - config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL - bool "All" + prompt "svp type" + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL if BR2_PACKAGE_BCM_REFSW_SAGE + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE if !BR2_PACKAGE_BCM_REFSW_SAGE + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE + bool "none" + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO + depends on BR2_PACKAGE_BCM_REFSW_SAGE + bool "video" + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL + depends on BR2_PACKAGE_BCM_REFSW_SAGE + bool "all" + endchoice config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - bool "Memories" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - default n - help - Allow memory heap updates + bool "Memories" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + default n + help + Allow memory heap updates config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX - string "Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Graphics memory. The amount of memory in MB to be configured for. + string "Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2 - string "Secondary Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Secondary Graphics memory. The amount of memory in MB to be configured for. + string "Secondary Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secondary Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED - string "Compressed Restricted Region Memory (Video Secure)" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Compressed Restricted Region Memory (Video Secure) memory. The amount of memory in MB to be configured for. + string "Compressed Restricted Region Memory (Video Secure)" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Compressed Restricted Region Memory (Video Secure) memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN - string "Main Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of main memory. The amount of memory in MB to be configured for. + string "Main Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of main memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT - string "Export Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Export Region memory. The ammount of memory in MB to be configured for. + string "Export Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Export Region memory. The ammount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX - string "Secure Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Secure Graphics memory. The amount of memory in MB to be configured for. + string "Secure Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secure Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT - string "Client Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - depends on BR2_PACKAGE_BCM_REFSW_SAGE - help - Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. + string "Client Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY string "Manual overrule of the time it takes to initialisize all hardware (ms)" default 0 + endif config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO @@ -182,12 +187,12 @@ config BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL WPEFramework (static IPv4/IPv6 or dhcp IPv4) menuconfig BR2_PACKAGE_WPEFRAMEWORK_CDMI - bool "CDMi" - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - select BR2_PACKAGE_WPEFRAMEWORK_CDM - default y - help - A CDM server plugin to interact with CDMi plugins. + bool "CDMi" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + default y + help + A CDM server plugin to interact with CDMi plugins. if BR2_PACKAGE_WPEFRAMEWORK_CDMI source "package/wpe/wpeframework-cdmi/Config.in" @@ -200,25 +205,28 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH select BR2_PACKAGE_BLUEZ_ALSA default n help - A Bluetooth plugin to interact with Bluetooth devices. + A Bluetooth plugin to interact with Bluetooth devices. if BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH + choice bool "Select Platform" default BR2_PACKAGE_PLATFORM_RASPBERRY_PI help - Choose Platform. + Choose Platform. menuconfig BR2_PACKAGE_PLATFORM_RASPBERRY_PI bool "Raspberry Pi" help - Enable Raspberry Pi Platform. + Enable Raspberry Pi Platform. menuconfig BR2_PACKAGE_PLATFORM_BCMXXXX bool "BCM Platform" help - Enable BCM Platform. + Enable BCM Platform. + endchoice + endif menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL @@ -445,7 +453,7 @@ menuconfig BR2_PACKAGE_TVPLATFORM_LINUXTV bool "wpetvplatform-linuxtv" depends on BR2_PACKAGE_DVB_APPS help - Base library for TVPlatform Implementation for LinuxTV. + Base library for TVPlatform Implementation for LinuxTV. source "package/wpe/wpetvplatform-bcm/Config.in" @@ -495,12 +503,14 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID endif if BR2_PACKAGE_BCM_REFSW + config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM string "Tune Param" default "SYMBOL_RATE=6900000" depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL help Sets the Tuner Param, symbol rate. + endif config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST @@ -511,4 +521,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST Sets the Frequency List for scanning in MHz using either ',' as the separator or '-' to define the range. eg:- 354,362,370 or 354-370 endif + comment "External plugins below" From 3223eac760c3a3027ab8bfbb88fcaff7cda4349a Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 15 Aug 2018 09:43:47 +0200 Subject: [PATCH 346/614] [SAGE] Add the firmware in case the SAGE is selected. --- package/bcm-refsw/Config.in | 1 + 1 file changed, 1 insertion(+) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index e591521af0ec..ed5736c67dec 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -111,6 +111,7 @@ config BR2_PACKAGE_BCM_REFSW_SAGE bool "SAGE v3.x" default n depends on BR2_PACKAGE_BCM_REFSW && (BR2_PACKAGE_BCM_REFSW_16_2 || BR2_PACKAGE_BCM_REFSW_16_3 || BR2_PACKAGE_BCM_REFSW_17_1 || BR2_PACKAGE_BCM_REFSW_17_1_RDK || BR2_PACKAGE_BCM_REFSW_17_2 || BR2_PACKAGE_BCM_REFSW_17_4) + select BR2_PACKAGE_SAGE_FIRMWARE help Add SAGE support in Nexus. From 3edac67c356aef78122bd394a1a8a45ddbd93ae9 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 11 Jul 2018 00:37:26 +0200 Subject: [PATCH 347/614] [BACKEND] Also use the WPEFramework for Nexus builds and WPEFramework. --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index bb47136aa6ec..b4816253b516 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -48,9 +48,13 @@ ifeq ($(BR2_PACKAGE_BCM_WESTON),y) else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyn) WPEBACKEND_RDK_DEPENDENCIES += wayland westeros WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF -else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyy) - WPEBACKEND_RDK_DEPENDENCIES += wayland westeros wpeframework-plugins wayland-egl-bnxs bcm-refsw - WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),y) + WPEBACKEND_RDK_DEPENDENCIES += wpeframework wpeframework-plugins bcm-refsw + WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_VIRTUAL_KEYBOARD=OFF -DUSE_INPUT_LIBINPUT=OFF + + ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS),yy) + WPEBACKEND_RDK_DEPENDENCIES += wayland westeros wayland-egl-bnxs + endif else WPEBACKEND_RDK_FLAGS += -DUSE_BACKEND_BCM_NEXUS=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) From 4b2310eed5ff93dabb8dfc5ce457731344dbe5d8 Mon Sep 17 00:00:00 2001 From: Xabier Rodriguez Calvar Date: Wed, 15 Aug 2018 15:59:06 +0200 Subject: [PATCH 348/614] [WPEFRAMEWORK] Add options for symbols and no opts --- package/wpe/wpeframework-devtools/Config.in | 18 +++++++++++++++++- package/wpe/wpeframework/wpeframework.mk | 9 ++++++++- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-devtools/Config.in b/package/wpe/wpeframework-devtools/Config.in index ffa30c851db5..e20c64635efc 100644 --- a/package/wpe/wpeframework-devtools/Config.in +++ b/package/wpe/wpeframework-devtools/Config.in @@ -5,7 +5,23 @@ config BR2_PACKAGE_WPEFRAMEWORK_DEBUG help Allow the WPE Framework to be more verbose. All development traces are turned on. - + +config BR2_PACKAGE_WPEFRAMEWORK_SYMBOLS + bool "Build with symbols" + help + Allow the WPE Framework to be compiled with symbols for better backtraces. + +if BR2_PACKAGE_WPEFRAMEWORK_SYMBOLS + +config BR2_PACKAGE_WPEFRAMEWORK_NO_OPTIMIZATIONS + bool "Build with no optimizations" + default y if BR2_PACKAGE_WPEFRAMEWORK_SYMBOLS + default n + help + Compile with no optimizations. + +endif + config BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD bool "Verbose build" help diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index d343093a6b00..69c1ab25057b 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -27,9 +27,16 @@ WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_OOMADJUST=$(BR2_PACKAGE_WPEFRAMEWORK_OO # WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_POLICY= # WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_STACKSIZE= +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_SYMBOLS),y) +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NO_OPTIMIZATIONS),y) +WPEFRAMEWORK_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' +else +WPEFRAMEWORK_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g' +endif +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) WPEFRAMEWORK_CONF_OPTS += -DCMAKE_BUILD_TYPE=Debug -#WPEFRAMEWORK_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD),y) From 15267f4e7e48f592e2c7ad3036f2e63f16629966 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 15 Aug 2018 18:03:03 +0200 Subject: [PATCH 349/614] [BUMP] WPEWebkitBackend-RDK --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index b4816253b516..3a74768a3872 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = f55421075d22ee9831bf1fc42184a10473c78f79 +WPEBACKEND_RDK_VERSION = d91c273a034b836e2c1442dad659d813a6fe4c24 WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 1689490a23191aedf8134cb1a94a92fd205bbb11 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 16 Aug 2018 10:21:36 +0200 Subject: [PATCH 350/614] [wpeframework-netflix] bump nf5 to latest version --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 682238825cac..9b6c59bd19dc 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -8,7 +8,7 @@ WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = ca237132a3ce7d6be01fbe941fdf9a65bebc2c42 +WPEFRAMEWORK_NETFLIX_VERSION = d844095a3e7f6e6e43564f3e4d15453c24636db1 endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git From 7c4fccf6329454222b781548e3915b019feeaf41 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 16 Aug 2018 14:35:26 +0200 Subject: [PATCH 351/614] [bcm-refsw] Added OPUS/VP9 decoder flags --- configs/arrisrdk_wpe_ml_defconfig | 3 ++- configs/bcm72604_wpe_ml_defconfig | 3 ++- package/bcm-refsw/Config.in | 31 +++++++++++++++++++++---- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 3 +-- package/nexus/Config.in | 14 +++++++++++ package/vss-sdk/Config.in | 5 +++- 6 files changed, 49 insertions(+), 10 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 0b5f5eba79b0..e9664d3afa90 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -58,7 +58,8 @@ BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y -BR2_PACKAGE_NEXUS_REMOVE_OPUS=y +# BR2_PACKAGE_BCM_OPUS_DECODER_SUPPORT is not set +# BR2_PACKAGE_BCM_VP9_DECODER_SUPPORT is not set BR2_PACKAGE_BCM_REFSW_BOXMODE="4" # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_WPEFRAMEWORK=y diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index f1475ac30dea..ef9e3089f93c 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -58,7 +58,8 @@ BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_3_RDK=y BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y -BR2_PACKAGE_NEXUS_REMOVE_OPUS=y +# BR2_PACKAGE_BCM_OPUS_DECODER_SUPPORT is not set +# BR2_PACKAGE_BCM_VP9_DECODER_SUPPORT is not set # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index ed5736c67dec..27550208d623 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -107,6 +107,32 @@ choice endchoice +menu "Codec support" +config BR2_PACKAGE_BCM_OPUS_DECODER_SUPPORT + bool "OPUS decoder" + default y + select BR2_PACKAGE_HAS_OPUS_DECODER + help + Enable OPUS for other OPUS depending packages. + +if BR2_PACKAGE_BCM_OPUS_DECODER_SUPPORT +config BR2_PACKAGE_PROVIDES_OPUS_DECODER + default "bcm-refsw" +endif + +config BR2_PACKAGE_BCM_VP9_DECODER_SUPPORT + bool "VP9 decoder" + default y + select BR2_PACKAGE_HAS_VP9_DECODER + help + Enable VP9 for other VP9 depending packages. + +if BR2_PACKAGE_BCM_VP9_SUPPORT +config BR2_PACKAGE_PROVIDES_VP9_DECODER + default "bcm-refsw" +endif +endmenu + config BR2_PACKAGE_BCM_REFSW_SAGE bool "SAGE v3.x" default n @@ -131,11 +157,6 @@ config BR2_PACKAGE_PROVIDES_LIBEGL config BR2_PACKAGE_PROVIDES_LIBGLES default "bcm-refsw" -config BR2_PACKAGE_NEXUS_REMOVE_OPUS - depends on BR2_PACKAGE_HAS_NEXUS - bool "disable opus" - default n - config BR2_PACKAGE_BCM_REFSW_EGLCUBE bool "eglcube" default n diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index b8146c214c02..153191afc23f 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -135,8 +135,7 @@ ifeq ($(BR2_PACKAGE_GST1_BCM_ENABLE_SVP),y) GST1_BCM_CONF_OPTS += --enable-svp endif -# Temporary audio fix for youtube on vss platforms -ifeq ($(BR2_PACKAGE_NEXUS_REMOVE_OPUS),y) +ifeq ($(BR2_PACKAGE_HAS_OPUS_DECODER),) GST1_BCM_PKGDIR = "$(TOP_DIR)/package/gstreamer1/gst1-bcm" define GST1_BCM_APPLY_LOCAL_PATCHES diff --git a/package/nexus/Config.in b/package/nexus/Config.in index aeb8904ea404..6521a6e860ac 100644 --- a/package/nexus/Config.in +++ b/package/nexus/Config.in @@ -4,3 +4,17 @@ config BR2_PACKAGE_HAS_NEXUS config BR2_PACKAGE_PROVIDES_NEXUS depends on BR2_PACKAGE_HAS_NEXUS string + +config BR2_PACKAGE_HAS_OPUS_DECODER + bool + +config BR2_PACKAGE_PROVIDES_OPUS_DECODER + depends on BR2_PACKAGE_HAS_OPUS_DECODER + string + +config BR2_PACKAGE_HAS_VP9_DECODER + bool + +config BR2_PACKAGE_PROVIDES_VP9_DECODER + depends on BR2_PACKAGE_HAS_VP9_DECODER + string diff --git a/package/vss-sdk/Config.in b/package/vss-sdk/Config.in index b0bac7a649fc..7f80b5855ff1 100644 --- a/package/vss-sdk/Config.in +++ b/package/vss-sdk/Config.in @@ -4,7 +4,7 @@ config BR2_PACKAGE_VSS_SDK select BR2_PACKAGE_HAS_LIBEGL select BR2_PACKAGE_HAS_LIBGLES select BR2_PACKAGE_HAS_NEXUS - select BR2_PACKAGE_NEXUS_REMOVE_OPUS + select BR2_PACKAGE_HAS_VP9_DECODER help Pre-compiled binaries for a platform @@ -19,4 +19,7 @@ config BR2_PACKAGE_PROVIDES_LIBGLES config BR2_PACKAGE_PROVIDES_NEXUS default "vss-sdk" +config BR2_PACKAGE_PROVIDES_VP9_DECODER + default "vss-sdk" + endif From 2b8e7ec0d11769ad4c420e2ebbb768191074e757 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 16 Aug 2018 14:44:49 +0200 Subject: [PATCH 352/614] [playready] Completed has/provides flags constuction --- package/playready/Config.in | 9 +++++++++ package/vip-sdk/Config.in | 3 +++ package/vss-sdk/Config.in | 4 ++++ 3 files changed, 16 insertions(+) diff --git a/package/playready/Config.in b/package/playready/Config.in index 2398ee661480..288a9e967990 100644 --- a/package/playready/Config.in +++ b/package/playready/Config.in @@ -6,3 +6,12 @@ config BR2_PACKAGE_PLAYREADY config BR2_PACKAGE_HAS_PLAYREADY bool + +config BR2_PACKAGE_PROVIDES_PLAYREADY + depends on BR2_PACKAGE_HAS_PLAYREADY + string + +if BR2_PACKAGE_PLAYREADY +config BR2_PACKAGE_PROVIDES_PLAYREADY + default "playready" +endif diff --git a/package/vip-sdk/Config.in b/package/vip-sdk/Config.in index aff62c716e39..b3f87ecbce72 100644 --- a/package/vip-sdk/Config.in +++ b/package/vip-sdk/Config.in @@ -19,4 +19,7 @@ config BR2_PACKAGE_PROVIDES_LIBEGL config BR2_PACKAGE_PROVIDES_LIBGLES default "vip-sdk" +config BR2_PACKAGE_PROVIDES_PLAYREADY + default "vip-sdk" + endif diff --git a/package/vss-sdk/Config.in b/package/vss-sdk/Config.in index 7f80b5855ff1..d54bb0a1f447 100644 --- a/package/vss-sdk/Config.in +++ b/package/vss-sdk/Config.in @@ -4,6 +4,7 @@ config BR2_PACKAGE_VSS_SDK select BR2_PACKAGE_HAS_LIBEGL select BR2_PACKAGE_HAS_LIBGLES select BR2_PACKAGE_HAS_NEXUS + select BR2_PACKAGE_HAS_PLAYREADY select BR2_PACKAGE_HAS_VP9_DECODER help Pre-compiled binaries for a platform @@ -19,6 +20,9 @@ config BR2_PACKAGE_PROVIDES_LIBGLES config BR2_PACKAGE_PROVIDES_NEXUS default "vss-sdk" +config BR2_PACKAGE_PROVIDES_PLAYREADY + default "vss-sdk" + config BR2_PACKAGE_PROVIDES_VP9_DECODER default "vss-sdk" From 7a6c7f6140db552add23faba1eca5c3ed4c87cc0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Tue, 21 Aug 2018 10:25:58 +0000 Subject: [PATCH 353/614] [gst1-bcm] Enable pcmsink to fix WebAudio in WPE --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 153191afc23f..ad76123cc6e1 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -85,7 +85,7 @@ GST1_BCM_CONF_OPTS = \ --disable-matroska \ --disable-mp3swdecode \ --disable-mp4demux \ - --disable-pcmsink \ + --enable-pcmsink \ --disable-pesdemux \ --disable-playback \ --disable-qtdemux \ From 3d1a0151908dd70b2d9d99f8760a4d7e725c7c0d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 22 Aug 2018 08:35:41 +0200 Subject: [PATCH 354/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 69c1ab25057b..6598e24a4ee4 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = c9b40d44d22e7be0a0ad99cd8570f521570ba2b6 +WPEFRAMEWORK_VERSION = 31274cf2c5419fea86d0b0c164cfb262bf8c2eab WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 57a8a87a85423b469ac5556ca18acb93e9eff05d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 22 Aug 2018 08:36:16 +0200 Subject: [PATCH 355/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 75a7435efd51..0edb28073d6e 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = c64c925f19b3283cfb72ecef7b23710462d9dc03 +WPEFRAMEWORK_PLUGINS_VERSION = f8c8861938a8298dfe1e6c36a86ccdc2ed057b36 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From a4dab6888ea759c56519aa002f7af10e00911e9d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 22 Aug 2018 08:36:50 +0200 Subject: [PATCH 356/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 63dbc3f14678..0a9b0ae0ac5a 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f +WPEWEBKIT_VERSION_VALUE = d53be79a6a8e3ab9d9a325ee0dc30cdc656a0169 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 67cffab0035b371c709ccd6c539a66e75a4c0a5d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 22 Aug 2018 08:38:41 +0200 Subject: [PATCH 357/614] [gst1-plugins-bad] backported upstream patches for dash playback --- ...daptivemutex-Fix-double-mutex-unlock.patch | 41 ++++++++++ ...try-download-MAX_DOWNLOAD_RETRY_COUN.patch | 33 ++++++++ ...n-t-hold-locks-when-pushing-FLUSH_ST.patch | 36 +++++++++ ...sue-when-manifest-update-sets-slow-s.patch | 81 +++++++++++++++++++ ...x-startup-SEGMENT-seeking-and-settin.patch | 60 ++++++++++++++ 5 files changed, 251 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0014-adaptivemutex-Fix-double-mutex-unlock.patch create mode 100644 package/gstreamer1/gst1-plugins-bad/0015-adaptivedemux-retry-download-MAX_DOWNLOAD_RETRY_COUN.patch create mode 100644 package/gstreamer1/gst1-plugins-bad/0016-adaptivedemux-Don-t-hold-locks-when-pushing-FLUSH_ST.patch create mode 100644 package/gstreamer1/gst1-plugins-bad/0017-dashdemux-Fix-issue-when-manifest-update-sets-slow-s.patch create mode 100644 package/gstreamer1/gst1-plugins-bad/0018-adaptivedemux-Fix-startup-SEGMENT-seeking-and-settin.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0014-adaptivemutex-Fix-double-mutex-unlock.patch b/package/gstreamer1/gst1-plugins-bad/0014-adaptivemutex-Fix-double-mutex-unlock.patch new file mode 100644 index 000000000000..77affbb09e02 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0014-adaptivemutex-Fix-double-mutex-unlock.patch @@ -0,0 +1,41 @@ +From 3004ec54e1b5515d4bc3971bf9d07a34007d7df7 Mon Sep 17 00:00:00 2001 +From: Thomas Bluemel +Date: Mon, 27 Feb 2017 14:54:43 -0700 +Subject: [PATCH 2/5] adaptivemutex: Fix double mutex unlock + +https://bugzilla.gnome.org/show_bug.cgi?id=779480 +--- + gst-libs/gst/adaptivedemux/gstadaptivedemux.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +index b3e354e6f..baa2685ea 100644 +--- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c ++++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +@@ -2831,6 +2831,11 @@ gst_adaptive_demux_stream_download_uri (GstAdaptiveDemux * demux, + *http_status = stream->last_status_code; + } + } ++ ++ /* changing src element state might try to join the streaming thread, so ++ * we must not hold the manifest lock. ++ */ ++ GST_MANIFEST_UNLOCK (demux); + } else { + GST_MANIFEST_UNLOCK (demux); + if (stream->last_ret == GST_FLOW_OK) +@@ -2838,11 +2843,6 @@ gst_adaptive_demux_stream_download_uri (GstAdaptiveDemux * demux, + ret = GST_FLOW_CUSTOM_ERROR; + } + +- /* changing src element state might try to join the streaming thread, so +- * we must not hold the manifest lock. +- */ +- GST_MANIFEST_UNLOCK (demux); +- + stream->src_at_ready = FALSE; + + gst_element_set_locked_state (stream->src, TRUE); +-- +2.17.0 + diff --git a/package/gstreamer1/gst1-plugins-bad/0015-adaptivedemux-retry-download-MAX_DOWNLOAD_RETRY_COUN.patch b/package/gstreamer1/gst1-plugins-bad/0015-adaptivedemux-retry-download-MAX_DOWNLOAD_RETRY_COUN.patch new file mode 100644 index 000000000000..df41f8b8040a --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0015-adaptivedemux-retry-download-MAX_DOWNLOAD_RETRY_COUN.patch @@ -0,0 +1,33 @@ +From 29f733ab28651d2d6130918ae8b7cac0c6678ecd Mon Sep 17 00:00:00 2001 +From: Matthew Waters +Date: Fri, 2 Dec 2016 17:51:57 +1100 +Subject: [PATCH 3/5] adaptivedemux: retry download MAX_DOWNLOAD_RETRY_COUNT + times before erroring + +What we want is to retry downloading the fragment on 4xx/5xx errors +however returning EOS will cause waiting for a manifest update for live +(which may be a really long time) or stop everything for non-live. + +Change that to only return EOS/ERROR once we've reached the error limit. + +https://bugzilla.gnome.org/show_bug.cgi?id=776609 +--- + gst-libs/gst/adaptivedemux/gstadaptivedemux.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +index baa2685ea..1f4f8013f 100644 +--- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c ++++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +@@ -3113,7 +3113,7 @@ again: + } + + flushing: +- if (++stream->download_error_count <= MAX_DOWNLOAD_ERROR_COUNT) { ++ if (stream->download_error_count >= MAX_DOWNLOAD_ERROR_COUNT) { + /* looks like there is no way of knowing when a live stream has ended + * Have to assume we are falling behind and cause a manifest reload */ + GST_DEBUG_OBJECT (stream->pad, "Converting error of live stream to EOS"); +-- +2.17.0 + diff --git a/package/gstreamer1/gst1-plugins-bad/0016-adaptivedemux-Don-t-hold-locks-when-pushing-FLUSH_ST.patch b/package/gstreamer1/gst1-plugins-bad/0016-adaptivedemux-Don-t-hold-locks-when-pushing-FLUSH_ST.patch new file mode 100644 index 000000000000..082b92978128 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0016-adaptivedemux-Don-t-hold-locks-when-pushing-FLUSH_ST.patch @@ -0,0 +1,36 @@ +From dc99f7652391096253fff925487c0f9be813c412 Mon Sep 17 00:00:00 2001 +From: Edward Hervey +Date: Fri, 14 Apr 2017 18:16:28 +0200 +Subject: [PATCH 4/5] adaptivedemux: Don't hold locks when pushing FLUSH_START + +Some actions (Qos, reconfigure, ...) might take place before we finish pushing out flush_start. + +One problem would be that: +1) The QOS handling in adaptivedemux takes the MANIFEST LOCK + That QOS event comes from basesink with its PREROLL_LOCK taken +2) FLUSH_START is sent from adaptivedemux with the MANIFEST_LOCK taken and the basesink flushing handler needs to take the PREROLL_LOCK + + => deadlock + +https://bugzilla.gnome.org/show_bug.cgi?id=781320 +--- + gst-libs/gst/adaptivedemux/gstadaptivedemux.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +index 1f4f8013f..ae0a2bb53 100644 +--- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c ++++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +@@ -1404,7 +1404,9 @@ gst_adaptive_demux_handle_seek_event (GstAdaptiveDemux * demux, GstPad * pad, + GST_DEBUG_OBJECT (demux, "sending flush start"); + fevent = gst_event_new_flush_start (); + gst_event_set_seqnum (fevent, seqnum); ++ GST_MANIFEST_UNLOCK (demux); + gst_adaptive_demux_push_src_event (demux, fevent); ++ GST_MANIFEST_LOCK (demux); + + gst_adaptive_demux_stop_tasks (demux); + } else if ((rate > 0 && start_type != GST_SEEK_TYPE_NONE) || +-- +2.17.0 + diff --git a/package/gstreamer1/gst1-plugins-bad/0017-dashdemux-Fix-issue-when-manifest-update-sets-slow-s.patch b/package/gstreamer1/gst1-plugins-bad/0017-dashdemux-Fix-issue-when-manifest-update-sets-slow-s.patch new file mode 100644 index 000000000000..64459b56c12b --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0017-dashdemux-Fix-issue-when-manifest-update-sets-slow-s.patch @@ -0,0 +1,81 @@ +From 6980121d0e216baae19d972fbf5b9e4ab764c1ad Mon Sep 17 00:00:00 2001 +From: WeiChungChang +Date: Tue, 17 Jan 2017 10:33:03 +0800 +Subject: [PATCH 5/5] dashdemux: Fix issue when manifest update sets slow start + without passing necessary header & caps changes downstream + +https://bugzilla.gnome.org/show_bug.cgi?id=777206 +--- + ext/dash/gstdashdemux.c | 29 +++++++++++++++++++++++++++++ + ext/dash/gstdashdemux.h | 1 + + 2 files changed, 30 insertions(+) + +diff --git a/ext/dash/gstdashdemux.c b/ext/dash/gstdashdemux.c +index b10465eb9..0bc58f136 100644 +--- a/ext/dash/gstdashdemux.c ++++ b/ext/dash/gstdashdemux.c +@@ -711,6 +711,7 @@ gst_dash_demux_setup_all_streams (GstDashDemux * demux) + (stream), tags); + stream->index = i; + stream->pending_seek_ts = GST_CLOCK_TIME_NONE; ++ stream->last_representation_id = NULL; + if (active_stream->cur_adapt_set && + active_stream->cur_adapt_set->RepresentationBase && + active_stream->cur_adapt_set->RepresentationBase->ContentProtection) { +@@ -1149,6 +1150,33 @@ gst_dash_demux_stream_update_fragment_info (GstAdaptiveDemuxStream * stream) + + if (gst_mpd_client_get_next_fragment_timestamp (dashdemux->client, + dashstream->index, &ts)) { ++ if (gst_mpd_client_is_live (dashdemux->client)) { ++ if (!GST_ADAPTIVE_DEMUX_STREAM_NEED_HEADER (stream)) { ++ if (dashstream->active_stream ++ && dashstream->active_stream->cur_representation) { ++ /* id specifies an identifier for this Representation. The ++ * identifier shall be unique within a Period unless the ++ * Representation is functionally identically to another ++ * Representation in the same Period. */ ++ if (!g_strcmp0 (dashstream->active_stream->cur_representation->id, ++ dashstream->last_representation_id)) { ++ GstCaps *caps; ++ stream->need_header = TRUE; ++ ++ GST_INFO_OBJECT (dashdemux, "Switching bitrate to %d", ++ dashstream->active_stream->cur_representation->bandwidth); ++ caps = ++ gst_dash_demux_get_input_caps (dashdemux, ++ dashstream->active_stream); ++ gst_adaptive_demux_stream_set_caps (stream, caps); ++ } ++ } ++ } ++ g_free (dashstream->last_representation_id); ++ dashstream->last_representation_id = ++ g_strdup (dashstream->active_stream->cur_representation->id); ++ } ++ + if (GST_ADAPTIVE_DEMUX_STREAM_NEED_HEADER (stream)) { + gst_adaptive_demux_stream_fragment_clear (&stream->fragment); + gst_dash_demux_stream_update_headers_info (stream); +@@ -2680,6 +2708,7 @@ gst_dash_demux_stream_free (GstAdaptiveDemuxStream * stream) + gst_isoff_moof_box_free (dash_stream->moof); + if (dash_stream->moof_sync_samples) + g_array_free (dash_stream->moof_sync_samples, TRUE); ++ g_free (dash_stream->last_representation_id); + } + + static GstDashDemuxClockDrift * +diff --git a/ext/dash/gstdashdemux.h b/ext/dash/gstdashdemux.h +index 0757d76b1..2bbd4f18b 100644 +--- a/ext/dash/gstdashdemux.h ++++ b/ext/dash/gstdashdemux.h +@@ -96,6 +96,7 @@ struct _GstDashDemuxStream + + guint64 moof_average_size, first_sync_sample_average_size; + gboolean first_sync_sample_after_moof, first_sync_sample_always_after_moof; ++ gchar *last_representation_id; + }; + + /** +-- +2.17.0 + diff --git a/package/gstreamer1/gst1-plugins-bad/0018-adaptivedemux-Fix-startup-SEGMENT-seeking-and-settin.patch b/package/gstreamer1/gst1-plugins-bad/0018-adaptivedemux-Fix-startup-SEGMENT-seeking-and-settin.patch new file mode 100644 index 000000000000..6b2446b165ce --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0018-adaptivedemux-Fix-startup-SEGMENT-seeking-and-settin.patch @@ -0,0 +1,60 @@ +From a6cefff08613bbadb1e6ad825f30076efaae3274 Mon Sep 17 00:00:00 2001 +From: Seungha Yang +Date: Thu, 10 Nov 2016 23:07:50 +0900 +Subject: [PATCH] adaptivedemux: Fix startup SEGMENT seeking and setting for + live + +Because fragment.timestamp is relative value to period_start, +startup SEGMENT seeking should be pointed to "fragment.timestamp + period_start" + +https://bugzilla.gnome.org/show_bug.cgi?id=774196 +--- + gst-libs/gst/adaptivedemux/gstadaptivedemux.c | 16 +++++++++++----- + 1 file changed, 11 insertions(+), 5 deletions(-) + +diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +index ae0a2bb..774a68a 100644 +--- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c ++++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +@@ -997,6 +997,8 @@ gst_adaptive_demux_expose_streams (GstAdaptiveDemux * demux, + } + } + ++ period_start = gst_adaptive_demux_get_period_start_time (demux); ++ + /* For live streams, the subclass is supposed to seek to the current + * fragment and then tell us its timestamp in stream->fragment.timestamp. + * We now also have to seek our demuxer segment to reflect this. +@@ -1005,12 +1007,10 @@ gst_adaptive_demux_expose_streams (GstAdaptiveDemux * demux, + */ + if (first_and_live) { + gst_segment_do_seek (&demux->segment, demux->segment.rate, GST_FORMAT_TIME, +- GST_SEEK_FLAG_FLUSH, GST_SEEK_TYPE_SET, min_pts, GST_SEEK_TYPE_NONE, -1, +- NULL); ++ GST_SEEK_FLAG_FLUSH, GST_SEEK_TYPE_SET, min_pts + period_start, ++ GST_SEEK_TYPE_NONE, -1, NULL); + } + +- period_start = gst_adaptive_demux_get_period_start_time (demux); +- + for (iter = demux->streams; iter; iter = g_list_next (iter)) { + GstAdaptiveDemuxStream *stream = iter->data; + GstClockTime offset; +@@ -1067,7 +1067,13 @@ gst_adaptive_demux_expose_streams (GstAdaptiveDemux * demux, + * equivalent. + */ + +- if (demux->segment.start > period_start) { ++ /* If first and live, demuxer did seek to the current position already */ ++ if (first_and_live) { ++ stream->segment.start = demux->segment.start - period_start + offset; ++ stream->segment.position = stream->segment.start; ++ stream->segment.time = demux->segment.time; ++ stream->segment.base = demux->segment.base; ++ } else if (demux->segment.start > period_start) { + stream->segment.start = demux->segment.start - period_start + offset; + stream->segment.position = offset; + stream->segment.time = demux->segment.time; +-- +2.17.0 + From e85a5d00f5eaf7e8ea16cf645db10326824a08d2 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 22 Aug 2018 16:29:18 +0200 Subject: [PATCH 358/614] [wpeframework-cdmi] Add VideoGuard DRM OCDM module --- package/wpe/wpeframework-cdmi/Config.in | 1 + .../wpeframework-cdmi-playready-vgdrm/Config.in | 9 +++++++++ .../wpeframework-cdmi-playready-vgrdm.mk | 13 +++++++++++++ 3 files changed, 23 insertions(+) create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk diff --git a/package/wpe/wpeframework-cdmi/Config.in b/package/wpe/wpeframework-cdmi/Config.in index 8393b46af614..6e01e7251f93 100644 --- a/package/wpe/wpeframework-cdmi/Config.in +++ b/package/wpe/wpeframework-cdmi/Config.in @@ -1,4 +1,5 @@ source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/Config.in" +source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/Config.in" diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in new file mode 100644 index 000000000000..ad79174e013a --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in @@ -0,0 +1,9 @@ +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM + bool "vgdrm" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + depends on BR2_PACKAGE_VGDRM + default y + help + PlayReady using Video Guard DRM + diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk new file mode 100644 index 000000000000..6ac1b42811f7 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk @@ -0,0 +1,13 @@ +################################################################################ +# +# wpeframework-cdmi-playready-vgdrm +# +################################################################################ + +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = da3be6c4bc8374b093e21117c00d1bb003164f05 +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE_METHOD = git +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-VGDRM.git +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_INSTALL_STAGING = YES +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_DEPENDENCIES = wpeframework vgdrm + +$(eval $(cmake-package)) From 28661c9e5a21681dcb0c212c73647372d2c654e8 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 23 Aug 2018 09:15:51 +0200 Subject: [PATCH 359/614] [cdmi vgdrm] update version --- .../wpeframework-cdmi-playready-vgrdm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk index 6ac1b42811f7..6395bd7c5081 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = da3be6c4bc8374b093e21117c00d1bb003164f05 +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = c3f909f717a2125f531a691329d91dbacd86ff6b WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-VGDRM.git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_INSTALL_STAGING = YES From 7f61bfab96f320775a2093471ff2f924b8a536ea Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Thu, 23 Aug 2018 10:19:20 -0700 Subject: [PATCH 360/614] [TVControl] Configure Home Transport Stream --- package/wpe/wpeframework-plugins/Config.in | 608 +++++++++--------- .../wpeframework-plugins.mk | 1 + 2 files changed, 308 insertions(+), 301 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 36d41e996869..65677f232f0a 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -1,525 +1,531 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool + bool config BR2_PACKAGE_WPEFRAMEWORK_COMMANDER - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - default n - bool "Commander" - help - Commander Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + default n + bool "Commander" + help + Commander Plugin menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR - select BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT - bool "Compositor" - help - WPE Platform Compositor plugin + select BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT + bool "Compositor" + help + WPE Platform Compositor plugin if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART - bool "Start Automatically" - help - Select this to start the plugin automatically when starting WPEFramework + bool "Start Automatically" + help + Select this to start the plugin automatically when starting WPEFramework config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS - bool "Out of process" - help - Select this to run this plugin in its own process. + bool "Out of process" + help + Select this to run this plugin in its own process. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - bool "Nexus server" - depends on BR2_PACKAGE_HAS_NEXUS - help - Include a nxserver with the compositor. + bool "Nexus server" + depends on BR2_PACKAGE_HAS_NEXUS + help + Include a nxserver with the compositor. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE - string "Memory Box Mode" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - help - Memory box mode, you can find details from release notes per platform + string "Memory Box Mode" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + help + Memory box mode, you can find details from release notes per platform config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS - bool "Allow unauthenticated clients" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - default n - help - Allow unauthenticated clients on the nxserver. + bool "Allow unauthenticated clients" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + default n + help + Allow unauthenticated clients on the nxserver. choice - prompt "svp type" - default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL if BR2_PACKAGE_BCM_REFSW_SAGE - default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE if !BR2_PACKAGE_BCM_REFSW_SAGE + prompt "svp type" + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL if BR2_PACKAGE_BCM_REFSW_SAGE + default BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE if !BR2_PACKAGE_BCM_REFSW_SAGE menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE - bool "none" + bool "none" menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO - depends on BR2_PACKAGE_BCM_REFSW_SAGE - bool "video" + depends on BR2_PACKAGE_BCM_REFSW_SAGE + bool "video" menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL - depends on BR2_PACKAGE_BCM_REFSW_SAGE - bool "all" + depends on BR2_PACKAGE_BCM_REFSW_SAGE + bool "all" endchoice config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - bool "Memories" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER - default n - help - Allow memory heap updates + bool "Memories" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + default n + help + Allow memory heap updates config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX - string "Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Graphics memory. The amount of memory in MB to be configured for. + string "Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2 - string "Secondary Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Secondary Graphics memory. The amount of memory in MB to be configured for. + string "Secondary Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secondary Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED - string "Compressed Restricted Region Memory (Video Secure)" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Compressed Restricted Region Memory (Video Secure) memory. The amount of memory in MB to be configured for. + string "Compressed Restricted Region Memory (Video Secure)" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Compressed Restricted Region Memory (Video Secure) memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN - string "Main Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of main memory. The amount of memory in MB to be configured for. + string "Main Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of main memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT - string "Export Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Export Region memory. The ammount of memory in MB to be configured for. + string "Export Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Export Region memory. The ammount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX - string "Secure Graphics Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - help - Allow update of Secure Graphics memory. The amount of memory in MB to be configured for. + string "Secure Graphics Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + help + Allow update of Secure Graphics memory. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT - string "Client Memory" - depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES - depends on BR2_PACKAGE_BCM_REFSW_SAGE - help - Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. + string "Client Memory" + depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER && BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY - string "Manual overrule of the time it takes to initialisize all hardware (ms)" - default 0 + string "Manual overrule of the time it takes to initialisize all hardware (ms)" + default 0 endif config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "DeviceInfo" - default y - help - DeviceInfo Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "DeviceInfo" + default y + help + DeviceInfo Plugin config BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "DHCPServer" - help - IPv4 DHCP server functionality. Distribute IPv4 addresses throughout the - network. + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "DHCPServer" + help + IPv4 DHCP server functionality. Distribute IPv4 addresses throughout the + network. menuconfig BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "LocationSync" - help - LocationSync Plugin - WPE Platform Dictionary plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "LocationSync" + help + LocationSync Plugin + WPE Platform Dictionary plugin if BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC config BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI - string "location URI" - default "http://ip-api.com/json" + string "location URI" + default "http://ip-api.com/json" endif menuconfig BR2_PACKAGE_WPEFRAMEWORK_MONITOR - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "Monitor" - help - Monitor Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "Monitor" + help + Monitor Plugin if BR2_PACKAGE_WPEFRAMEWORK_MONITOR config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_WEBKIT - depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER - string "webkit-limit" - default "614400" + depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER + string "webkit-limit" + default "614400" config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE - depends on BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE - string "youtube-limit" - default "614400" + depends on BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE + string "youtube-limit" + default "614400" config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX - depends on BR2_PACKAGE_WPEFRAMEWORK_UX - string "ux-limit" - default "614400" + depends on BR2_PACKAGE_WPEFRAMEWORK_UX + string "ux-limit" + default "614400" config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_NETFLIX - depends on BR2_PACKAGE_WPEFRAMEWORK_NETFLIX - string "netflix-limit" - default "307200" + depends on BR2_PACKAGE_WPEFRAMEWORK_NETFLIX + string "netflix-limit" + default "307200" endif config BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "NetworkControl" - help - Control the IP adressing of the interfaces in the system from - WPEFramework (static IPv4/IPv6 or dhcp IPv4) + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "NetworkControl" + help + Control the IP adressing of the interfaces in the system from + WPEFramework (static IPv4/IPv6 or dhcp IPv4) menuconfig BR2_PACKAGE_WPEFRAMEWORK_CDMI - bool "CDMi" - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - select BR2_PACKAGE_WPEFRAMEWORK_CDM - default y - help - A CDM server plugin to interact with CDMi plugins. + bool "CDMi" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + default y + help + A CDM server plugin to interact with CDMi plugins. if BR2_PACKAGE_WPEFRAMEWORK_CDMI source "package/wpe/wpeframework-cdmi/Config.in" endif config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH - bool "Bluetooth" - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - select BR2_PACKAGE_BLUEZ5_UTILS - select BR2_PACKAGE_BLUEZ_ALSA - default n - help - A Bluetooth plugin to interact with Bluetooth devices. + bool "Bluetooth" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_BLUEZ5_UTILS + select BR2_PACKAGE_BLUEZ_ALSA + default n + help + A Bluetooth plugin to interact with Bluetooth devices. if BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH choice - bool "Select Platform" - default BR2_PACKAGE_PLATFORM_RASPBERRY_PI - help - Choose Platform. + bool "Select Platform" + default BR2_PACKAGE_PLATFORM_RASPBERRY_PI + help + Choose Platform. menuconfig BR2_PACKAGE_PLATFORM_RASPBERRY_PI - bool "Raspberry Pi" - help - Enable Raspberry Pi Platform. + bool "Raspberry Pi" + help + Enable Raspberry Pi Platform. menuconfig BR2_PACKAGE_PLATFORM_BCMXXXX - bool "BCM Platform" - help - Enable BCM Platform. + bool "BCM Platform" + help + Enable BCM Platform. endchoice endif menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "RemoteControl" - help - RemoteControl Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "RemoteControl" + help + RemoteControl Plugin if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR - bool "IR (Infrared)" - help - Select devices which are based on Infrared (IR) technology + bool "IR (Infrared)" + help + Select devices which are based on Infrared (IR) technology if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - bool "BCM Nexus IR Remote Control Unit" - default false - depends on (BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS) && BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR - help - Enable the Nexus IR remote input + bool "BCM Nexus IR Remote Control Unit" + default false + depends on (BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS) && BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR + help + Enable the Nexus IR remote input if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE - string "IR mode" - default "16" - depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - help - Sets the IR Mode to be used with IR Nexus. Every remote has a different mode and key mapping. + string "IR mode" + default "16" + depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS + help + Sets the IR Mode to be used with IR Nexus. Every remote has a different mode and key mapping. config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_CODEMASK - string "IR code mask" - depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - help - Sets a key code mask if the device generates same code based on trigger bit + string "IR code mask" + depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS + help + Sets a key code mask if the device generates same code based on trigger bit config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_KEYMAP - string "keymap" - default "" - help - Select a keymap file + string "keymap" + default "" + help + Select a keymap file endif endif menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT - bool "devinput (linux input system)" - depends on BR2_PACKAGE_HAS_UDEV - help - Select devices which are annunced in the linux operating system under /dev/input/ as eventX + bool "devinput (linux input system)" + depends on BR2_PACKAGE_HAS_UDEV + help + Select devices which are annunced in the linux operating system under /dev/input/ as eventX if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP - string "keymap" - default "" - help - Select a keymap file + string "keymap" + default "" + help + Select a keymap file endif config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP - string "keymap" - default "" - help - Select a keymap file + string "keymap" + default "" + help + Select a keymap file endif config BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "Snapshot" - help - Snapshot Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "Snapshot" + help + Snapshot Plugin config BR2_PACKAGE_WPEFRAMEWORK_SICONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "SI control" - help - SI Control Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "SI control" + help + SI Control Plugin config BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "TimeSync" - help - TimeSync Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "TimeSync" + help + TimeSync Plugin config BR2_PACKAGE_WPEFRAMEWORK_TUNER - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "Tuner" - help - Tuner Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "Tuner" + help + Tuner Plugin config BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "TraceControl" - help - TraceControl Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "TraceControl" + help + TraceControl Plugin menuconfig BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "WebKitBrowser" - depends on BR2_PACKAGE_WPEWEBKIT - help - WebKitBrowser Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "WebKitBrowser" + depends on BR2_PACKAGE_WPEWEBKIT + help + WebKitBrowser Plugin if BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART - bool "autostart" - default y + bool "autostart" + default y config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL - string "start-url" - default "about:blank" + string "start-url" + default "about:blank" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT - string "useragent" - default "Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17" + string "useragent" + default "Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE - string "memory-profile" - default "128m" + string "memory-profile" + default "128m" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE - string "memory-pressure" - default "databaseprocess:50m,networkprocess:100m,webprocess:300m,rpcprocess:50m" + string "memory-pressure" + default "databaseprocess:50m,networkprocess:100m,webprocess:300m,rpcprocess:50m" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE - bool "media-disk-cache" - default n + bool "media-disk-cache" + default n config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE - string "disk-cache" - default "0" + string "disk-cache" + default "0" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE - bool "xhr-cache" - default false + bool "xhr-cache" + default false config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT - bool "transparent" - default false + bool "transparent" + default false config BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE - depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER - bool "youtube" - help - A wrapper around the youtube app to start it as a - wpeframework plugin. + depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER + bool "youtube" + help + A wrapper around the youtube app to start it as a + wpeframework plugin. config BR2_PACKAGE_WPEFRAMEWORK_UX - depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER - bool "ux" - help - A WPEUIFramework non-compositing WebGL enabled tab. + depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER + bool "ux" + help + A WPEUIFramework non-compositing WebGL enabled tab. config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER - string "clientidentifier" - default "" + string "clientidentifier" + default "" config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING - string "threaded-painting" - default "" + string "threaded-painting" + default "" endif comment "WebKitBrowser depends on WPE WebKit to be selected" - depends on !BR2_PACKAGE_WPEWEBKIT + depends on !BR2_PACKAGE_WPEWEBKIT config BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "WebProxy" - help - WebProxy Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "WebProxy" + help + WebProxy Plugin menuconfig BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "WebServer" - help - WebServer Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "WebServer" + help + WebServer Plugin if BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER config BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH - string "path" - default "/www" + string "path" + default "/www" endif config BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - bool "WebShell" - help - WebShell Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "WebShell" + help + WebShell Plugin config BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - select BR2_PACKAGE_WPA_SUPPLICANT - select BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL - bool "WifiControl" - help - WifiControl Plugin for Wifi access, linked to Network Control + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPA_SUPPLICANT + select BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL + bool "WifiControl" + help + WifiControl Plugin for Wifi access, linked to Network Control menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL - select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS - select BR2_PACKAGE_SQLITE - select BR2_PACKAGE_DVB_APPS if BR2_PACKAGE_RPI_FIRMWARE - bool "TVControl" - help - TVControl Plugin + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_SQLITE + select BR2_PACKAGE_DVB_APPS if BR2_PACKAGE_RPI_FIRMWARE + bool "TVControl" + help + TVControl Plugin if BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL choice - bool "TVPlatform" - help - Choose TVPlatform + bool "TVPlatform" + help + Choose TVPlatform menuconfig BR2_PACKAGE_TVPLATFORM_LINUXTV - bool "wpetvplatform-linuxtv" - depends on BR2_PACKAGE_DVB_APPS - help - Base library for TVPlatform Implementation for LinuxTV. + bool "wpetvplatform-linuxtv" + depends on BR2_PACKAGE_DVB_APPS + help + Base library for TVPlatform Implementation for LinuxTV. source "package/wpe/wpetvplatform-bcm/Config.in" endchoice choice - bool "DBS Options" - default BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB - help - Choose the DBS flavor. + bool "DBS Options" + default BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB + help + Choose the DBS flavor. menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB - bool "DVB" - help - Enable DVB DBS + bool "DVB" + help + Enable DVB DBS menuconfig BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ATSC - select BR2_PACKAGE_DVB_APPS - bool "ATSC" - help - Enable ATSC DBS + select BR2_PACKAGE_DVB_APPS + bool "ATSC" + help + Enable ATSC DBS endchoice if BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB - config BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ENABLE_BOUQUET_PARSING - bool "Enable Bouquet Parsing" - help - Enable Bouquet Table Parsing + config BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ENABLE_BOUQUET_PARSING + bool "Enable Bouquet Parsing" + help + Enable Bouquet Table Parsing config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE - string "Country Code" - default "GBR" - depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL - help - Sets the country code like - United Kingdom has 3-character code "GBR", which is coded as: - "0100 0111 0100 0010 0101 0010". + string "Country Code" + default "GBR" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the country code like + United Kingdom has 3-character code "GBR", which is coded as: + "0100 0111 0100 0010 0101 0010". config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID - string "Country Region ID" - default "0" - depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL - help - Sets the country region id like - '0' - no time zone extension used, - '1'- time zone 1 (most easterly region)etc. + string "Country Region ID" + default "0" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the country region id like + '0' - no time zone extension used, + '1'- time zone 1 (most easterly region)etc. endif if BR2_PACKAGE_BCM_REFSW +config BR2_PACKAGE_WPEFRAMEWORK_HOME_TS + string "Home transport stream which carries DVB-SI" + default "0" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the Home trasnsport config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM - string "Tune Param" - default "SYMBOL_RATE=6900000" - depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL - help - Sets the Tuner Param, symbol rate. + string "Tune Param" + default "SYMBOL_RATE=6900000" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the Tuner Param, symbol rate. endif config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST - string "Frequency List" - default "0" - depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL - help - Sets the Frequency List for scanning in MHz using either ',' as the separator - or '-' to define the range. eg:- 354,362,370 or 354-370 + string "Frequency List" + default "0" + depends on BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL + help + Sets the Frequency List for scanning in MHz using either ',' as the separator + or '-' to define the range. eg:- 354,362,370 or 354-370 endif comment "External plugins below" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 0edb28073d6e..1b7cd5e81a24 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -205,6 +205,7 @@ else ifeq ($(BR2_PACKAGE_TVPLATFORM_LINUXTV), y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_LINUXTV=ON endif WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_HOME_TS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_HOME_TS)) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST)) ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB),y) From e7f78c4d1e201ac7229ef10f23d4019510e58fc8 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 23 Aug 2018 22:45:12 +0200 Subject: [PATCH 361/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 6598e24a4ee4..f34417b084d4 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 31274cf2c5419fea86d0b0c164cfb262bf8c2eab +WPEFRAMEWORK_VERSION = 7e21ad6913342b47060731bc344100699914dce1 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 6d5217a44cffd25cb51dc1903a142846bf32d67e Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 23 Aug 2018 22:45:33 +0200 Subject: [PATCH 362/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 1b7cd5e81a24..7965dba61803 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = f8c8861938a8298dfe1e6c36a86ccdc2ed057b36 +WPEFRAMEWORK_PLUGINS_VERSION = c9f9a60bf6b62a19261b079a93ac5bde90751625 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 5a8c7467499af1c0bf363f64734c2f7ab8afd0f3 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 23 Aug 2018 22:46:03 +0200 Subject: [PATCH 363/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 0a9b0ae0ac5a..f4ce0a9dba7d 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = d53be79a6a8e3ab9d9a325ee0dc30cdc656a0169 +WPEWEBKIT_VERSION_VALUE = e5dfbafc8c0faabea1ac9b6ce04e2619638caf80 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 751495f9e50dab4053370b6ba4ca8310c3669f90 Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 28 Aug 2018 14:18:12 +0200 Subject: [PATCH 364/614] [wpebackend-rdk]: bump the version --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 3a74768a3872..5541ac4c19ec 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = d91c273a034b836e2c1442dad659d813a6fe4c24 +WPEBACKEND_RDK_VERSION = 08a71fcd2e0fe900bf92860a3ec5fd3a95430a25 WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 69124138863c3db69c3b05d5e7c09ab06cf19212 Mon Sep 17 00:00:00 2001 From: Arunakiran Chennubhatla Date: Wed, 29 Aug 2018 11:23:56 +0530 Subject: [PATCH 365/614] Updated Cobalt's buildroot config to Cobalt 19 --- package/bison/bison.mk | 3 - .../0001-cobalt-fixes-for-buildroot.patch | 64 ------------------- package/cobalt/cobalt.mk | 20 +++--- 3 files changed, 10 insertions(+), 77 deletions(-) delete mode 100644 package/cobalt/0001-cobalt-fixes-for-buildroot.patch diff --git a/package/bison/bison.mk b/package/bison/bison.mk index d29a4f2a38cb..5779673e12b0 100644 --- a/package/bison/bison.mk +++ b/package/bison/bison.mk @@ -5,9 +5,6 @@ ################################################################################ BISON_VERSION = 3.0.4 -ifeq ($(BR2_PACKAGE_COBALT),y) -BISON_VERSION = 2.7.1 -endif BISON_SOURCE = bison-$(BISON_VERSION).tar.xz BISON_SITE = $(BR2_GNU_MIRROR)/bison BISON_LICENSE = GPLv3+ diff --git a/package/cobalt/0001-cobalt-fixes-for-buildroot.patch b/package/cobalt/0001-cobalt-fixes-for-buildroot.patch deleted file mode 100644 index d2dfed857fc7..000000000000 --- a/package/cobalt/0001-cobalt-fixes-for-buildroot.patch +++ /dev/null @@ -1,64 +0,0 @@ -diff -rup cobalt/src/starboard/raspi/shared/gyp_configuration.gypi cobalt.fixed/src/starboard/raspi/shared/gyp_configuration.gypi ---- cobalt/src/starboard/raspi/shared/gyp_configuration.gypi 2017-10-05 11:14:25.000000000 +0530 -+++ cobalt.fixed/src/starboard/raspi/shared/gyp_configuration.gypi 2017-11-13 14:16:00.003878442 +0530 -@@ -130,6 +130,7 @@ - '-lbcm_host', - '-lvcos', - '-lvchiq_arm', -+ '-lvchostif', - ], - 'conditions': [ - ['cobalt_fastbuild==0', { -diff -rup cobalt/src/starboard/raspi/shared/gyp_configuration.py cobalt.fixed/src/starboard/raspi/shared/gyp_configuration.py ---- cobalt/src/starboard/raspi/shared/gyp_configuration.py 2017-10-05 11:14:25.000000000 +0530 -+++ cobalt.fixed/src/starboard/raspi/shared/gyp_configuration.py 2017-11-13 14:15:17.771878657 +0530 -@@ -38,7 +38,7 @@ class RaspiPlatformConfig(config.starboa - - def GetVariables(self, configuration): - raspi_home = self._GetRasPiHome() -- sysroot = os.path.realpath(os.path.join(raspi_home, 'sysroot')) -+ sysroot = os.path.realpath(os.path.join(raspi_home, 'arm-buildroot-linux-gnueabihf/sysroot')) - if not os.path.isdir(sysroot): - logging.critical('RasPi builds require $RASPI_HOME/sysroot ' - 'to be a valid directory.') -@@ -52,15 +52,15 @@ class RaspiPlatformConfig(config.starboa - return variables - - def GetEnvironmentVariables(self): -- env_variables = gyp_utils.GetHostCompilerEnvironment() -+ env_variables = { } - raspi_home = self._GetRasPiHome() - - toolchain = os.path.realpath(os.path.join( - raspi_home, -- 'tools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian-x64')) -+ '.')) - toolchain_bin_dir = os.path.join(toolchain, 'bin') - env_variables.update({ -- 'CC': os.path.join(toolchain_bin_dir, 'arm-linux-gnueabihf-gcc'), -- 'CXX': os.path.join(toolchain_bin_dir, 'arm-linux-gnueabihf-g++'), -+ 'CC': os.path.join(toolchain_bin_dir, 'arm-buildroot-linux-gnueabihf-gcc'), -+ 'CXX': os.path.join(toolchain_bin_dir, 'arm-buildroot-linux-gnueabihf-g++'), - }) - return env_variables -diff -rup cobalt/src/starboard/shared/ffmpeg/ffmpeg_audio_decoder.cc cobalt.fixed/src/starboard/shared/ffmpeg/ffmpeg_audio_decoder.cc ---- cobalt/src/starboard/shared/ffmpeg/ffmpeg_audio_decoder.cc 2017-10-05 11:14:25.000000000 +0530 -+++ cobalt.fixed/src/starboard/shared/ffmpeg/ffmpeg_audio_decoder.cc 2017-11-13 14:17:36.211877953 +0530 -@@ -89,7 +89,7 @@ void AudioDecoder::Decode(const scoped_r - packet.data = const_cast(input_buffer->data()); - packet.size = input_buffer->size(); - -- avcodec_get_frame_defaults(av_frame_); -+ av_frame_unref(av_frame_); - int frame_decoded = 0; - int result = - avcodec_decode_audio4(codec_context_, av_frame_, &frame_decoded, &packet); -@@ -245,7 +245,7 @@ void AudioDecoder::InitializeCodec() { - return; - } - -- av_frame_ = avcodec_alloc_frame(); -+ av_frame_ = av_frame_alloc(); - if (av_frame_ == NULL) { - SB_LOG(ERROR) << "Unable to allocate audio frame"; - TeardownCodec(); diff --git a/package/cobalt/cobalt.mk b/package/cobalt/cobalt.mk index 80a6922c243d..cde680e99a1b 100644 --- a/package/cobalt/cobalt.mk +++ b/package/cobalt/cobalt.mk @@ -4,17 +4,17 @@ # ################################################################################ -COBALT_VERSION = 9eb2e829be81aab86f2e6b57eb035b6f10911301 +COBALT_VERSION = 8c7a8bd5b66160eb32bcc59d535665ae02961159 COBALT_SITE_METHOD = git COBALT_SITE = git@github.com:Metrological/cobalt COBALT_INSTALL_STAGING = YES COBALT_DEPENDENCIES = alsa-lib gstreamer1 gst1-plugins-base gst1-plugins-good gst1-plugins-bad host-bison host-ninja -export BUILDROOT_HOME=$(HOST_DIR)/usr +export RASPI_HOME=$(HOST_DIR)/usr export PATH := $(HOST_DIR)/bin:$(HOST_DIR)/usr/bin:$(HOST_DIR)/usr/sbin:$(PATH) -PLATFORM_DIR = wpe-rpi -PLATFORM_QA_DIR = wpe-rpi_qa +PLATFORMDIR = raspi-2 +PLATFORM_QA_DIR = raspi-2_qa ifeq ($(BR2_PACKAGE_COBALT_IMAGE_AS_LIB), y) export COBALT_EXECUTABLE_TYPE = shared_library @@ -27,12 +27,12 @@ define COBALT_INSTALL_IMAGE cp -a $(@D)/src/out/$(PLATFORM_QA_DIR)/lib/libcobalt.so $(TARGET_DIR)/usr/lib endef define COBALT_INSTALL_STAGING_IMAGE - mkdir -p $(STAGING_DIR)/usr/include/starboard/wpe/shared - mkdir -p $(STAGING_DIR)/usr/include/starboard/wpe/rpi + mkdir -p $(STAGING_DIR)/usr/include/starboard/raspi/shared + mkdir -p $(STAGING_DIR)/usr/include/starboard/raspi/2 cp $(@D)/src/starboard/*.h $(STAGING_DIR)/usr/include/starboard/ - cp $(@D)/src/starboard/wpe/rpi/*.h $(STAGING_DIR)/usr/include/starboard/wpe/rpi - cp $(@D)/src/starboard/wpe/shared/*.h $(STAGING_DIR)/usr/include/starboard/wpe/shared + cp $(@D)/src/starboard/raspi/2/*.h $(STAGING_DIR)/usr/include/starboard/raspi/2 + cp $(@D)/src/starboard/raspi/shared/*.h $(STAGING_DIR)/usr/include/starboard/raspi/shared cp -a $(@D)/src/out/$(PLATFORM_QA_DIR)/lib/libcobalt.so $(STAGING_DIR)/usr/lib endef @@ -43,8 +43,8 @@ endef endif define COBALT_BUILD_CMDS - $(@D)/src/cobalt/build/gyp_cobalt -C qa $(PLATFORM_DIR) - $(BUILDROOT_HOME)/bin/ninja -C $(@D)/src/out/$(PLATFORM_QA_DIR) cobalt + $(@D)/src/cobalt/build/gyp_cobalt -C qa $(PLATFORMDIR) + $(RASPI_HOME)/bin/ninja -C $(@D)/src/out/$(PLATFORM_QA_DIR) cobalt endef define COBALT_INSTALL_TARGET_CMDS From d38d93c08bfab85a857e2501b4417c6e2e06ed18 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Fri, 31 Aug 2018 11:25:35 -0700 Subject: [PATCH 366/614] [bcm7429] update config --- configs/bcm7429_wpe_ml_defconfig | 37 +++++++++++--------------------- 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index a34894b53a9d..40117668e3c0 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -2,11 +2,9 @@ BR2_mipsel=y # BR2_MIPS_SOFT_FLOAT is not set BR2_CCACHE=y BR2_OPTIMIZE_2=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3=y BR2_TOOLCHAIN_BUILDROOT_CXX=y -BR2_ENABLE_LOCALE_PURGE=y -BR2_ENABLE_LOCALE_WHITELIST="C en_US" BR2_TARGET_GENERIC_CABUNDLE=y BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" @@ -17,52 +15,50 @@ BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-3.3.git" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="db9c5293e7ee11874ddc2d832a4fcc46ba2ba3b3" -BR2_LINUX_KERNEL_USE_DEFCONFIG=y BR2_LINUX_KERNEL_DEFCONFIG="bcm7429b0" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="board/bcm/bcm_base_defconfig" BR2_LINUX_KERNEL_VMLINUX=y BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +# BR2_PACKAGE_GST1_BCM_VP9_SUPPORT is not set BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NETFLIX=y +BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_PLATFORM_7429=y BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_7429=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_PLAYREADY=y -BR2_PACKAGE_LIBPROVISION=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y -BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y -BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO=y -# BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC is not set BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y -BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" @@ -73,19 +69,10 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y -#BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_IRNEXUS_MODE="16" +BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y - -BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y -BR2_PACKAGE_GST1_BCM_VP9_SUPPORT=n From dfdf89759fbba48d1cac90996d6eafd6a743c63d Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Fri, 31 Aug 2018 14:23:21 -0700 Subject: [PATCH 367/614] [wpeframework-ui] bump to latest --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index e1cec0686b2e..dec521f7efb2 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 2fa14b85a733bce7fcd2f6f6469ec4bf4b0c2553 +WPEFRAMEWORK_UI_VERSION = 7ff4eff4c66d24845efe0ba0bcb2fbc15a61d120 WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From eab45625d3ffec6dbc606aae8e769459c1d64b51 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Fri, 31 Aug 2018 14:23:50 -0700 Subject: [PATCH 368/614] [wpeframework] provide -c flag on startup to find config --- package/wpe/wpeframework/S80WPEFramework | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index 2ecaa6c5b94f..e2e28bab46ad 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -18,7 +18,7 @@ start() { export XDG_RUNTIME_DIR=/tmp echo -n "Starting WPEFramework: " - start-stop-daemon -S -q -b -m -p /var/run/WPEFramework.pid --exec /usr/bin/WPEFramework -- -b /dev/null 2>&1 + start-stop-daemon -S -q -b -m -p /var/run/WPEFramework.pid --exec /usr/bin/WPEFramework -- -b -c /etc/WPEFramework/config.json /dev/null 2>&1 [ $? == 0 ] && echo "OK" || echo "FAIL" } stop() { From afec838c266c39eceaad97ff3cb2f80083f42db3 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 2 Sep 2018 21:57:23 +0200 Subject: [PATCH 369/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index f4ce0a9dba7d..db1e894df7a4 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = e5dfbafc8c0faabea1ac9b6ce04e2619638caf80 +WPEWEBKIT_VERSION_VALUE = c24242bfa5bb254bd61e78cb0ef48918addc17b5 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From fb94895c8e31aec98705722148e57f324a6be57e Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 2 Sep 2018 21:57:44 +0200 Subject: [PATCH 370/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index f34417b084d4..86d57efb3053 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 7e21ad6913342b47060731bc344100699914dce1 +WPEFRAMEWORK_VERSION = dc64db6ab27e2ed9d80411da725e7b63df416956 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From e49dbcf574ef2aa8a01284238a4a9cb9881c3414 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 2 Sep 2018 21:57:57 +0200 Subject: [PATCH 371/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index a45a719b95e1..09f1e1664f89 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = c9f9a60bf6b62a19261b079a93ac5bde90751625 +WPEFRAMEWORK_PLUGINS_VERSION = d9f8ade99517d18071feb9016d4b516e8675e613 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 1ab2b4cb681e68916eb36328079635d0a37ffa25 Mon Sep 17 00:00:00 2001 From: albertd Date: Sun, 2 Sep 2018 22:00:31 +0200 Subject: [PATCH 372/614] [rpi] add webp by default --- configs/raspberrypi0_wpe_defconfig | 1 + configs/raspberrypi0_wpe_ml_defconfig | 1 + configs/raspberrypi2_wpe_defconfig | 1 + configs/raspberrypi2_wpe_ml_defconfig | 1 + configs/raspberrypi3_wpe_defconfig | 1 + configs/raspberrypi3_wpe_ml_defconfig | 1 + 6 files changed, 6 insertions(+) diff --git a/configs/raspberrypi0_wpe_defconfig b/configs/raspberrypi0_wpe_defconfig index 93bf9f615fad..318064e8fc7d 100644 --- a/configs/raspberrypi0_wpe_defconfig +++ b/configs/raspberrypi0_wpe_defconfig @@ -52,6 +52,7 @@ BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index 37ac3cb5f266..f8da82f85df2 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -53,6 +53,7 @@ BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y diff --git a/configs/raspberrypi2_wpe_defconfig b/configs/raspberrypi2_wpe_defconfig index 567f54e3eab5..922b719a294e 100644 --- a/configs/raspberrypi2_wpe_defconfig +++ b/configs/raspberrypi2_wpe_defconfig @@ -55,6 +55,7 @@ BR2_PACKAGE_LINUX_FIRMWARE=y BR2_PACKAGE_RPI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index 0a56ae8b9b6d..bf116fd3d779 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -56,6 +56,7 @@ BR2_PACKAGE_LINUX_FIRMWARE=y BR2_PACKAGE_RPI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y diff --git a/configs/raspberrypi3_wpe_defconfig b/configs/raspberrypi3_wpe_defconfig index 28abb1b09b72..c91f82125003 100644 --- a/configs/raspberrypi3_wpe_defconfig +++ b/configs/raspberrypi3_wpe_defconfig @@ -57,6 +57,7 @@ BR2_PACKAGE_RPI_FIRMWARE=y BR2_PACKAGE_RPI_WIFI_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index a71801cc1075..69305ed4fba6 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -60,6 +60,7 @@ BR2_PACKAGE_RPI_WIFI_FIRMWARE=y BR2_PACKAGE_RPI_BT_FIRMWARE=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y From 798464d5133ae492e3ab6a06639337e965d0890f Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Mon, 3 Sep 2018 17:41:30 +0200 Subject: [PATCH 373/614] [ArrisRDK] updated config and remote patch --- configs/arrisrdk_wpe_ml_defconfig | 9 +- package/bcm-refsw/0001-arrisremote.patch | 152 +++++++++++++++++++++++ 2 files changed, 157 insertions(+), 4 deletions(-) create mode 100644 package/bcm-refsw/0001-arrisremote.patch diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index e9664d3afa90..d131f189a6d4 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -68,9 +68,10 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="4" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_GRAPHICS_HEAP_SIZE="200" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y @@ -78,6 +79,8 @@ BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE="18" +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_KEYMAP="IRRemoteKeyMap-ArrisRDK-18.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -94,8 +97,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_ORC=y diff --git a/package/bcm-refsw/0001-arrisremote.patch b/package/bcm-refsw/0001-arrisremote.patch new file mode 100644 index 000000000000..c1320068de43 --- /dev/null +++ b/package/bcm-refsw/0001-arrisremote.patch @@ -0,0 +1,152 @@ +--- a/magnum/portinginterface/kir/include/bkir.h ++++ b/magnum/portinginterface/kir/include/bkir.h +@@ -193,6 +193,7 @@ typedef enum + BKIR_KirDevice_eSonySejin, /* Sony Sejin keyboard using UART D */ + BKIR_KirDevice_eCirNec, /* Consumer NEC */ + BKIR_KirDevice_eCirRC6, /* Consumer RC6 */ ++ BKIR_KirDevice_eCirKreaTv, /* Krea TV protocol*/ + BKIR_KirDevice_eCirGISat, /* Consumer GI Satellite */ + BKIR_KirDevice_eCirCustom, /* Customer specific type */ + BKIR_KirDevice_eCirDirectvUhfr, /* DIRECTV uhfr */ +--- a/magnum/portinginterface/kir/src/bkir.c ++++ b/magnum/portinginterface/kir/src/bkir.c +@@ -961,6 +961,66 @@ static const CIR_Param rC6Mode6AParam = { + /* the received data. */ + }; + ++/* CIR configuration parameters for KreaTV */ ++static const CIR_Param kreatvParam = { ++ ( 86-1 ), /* count divisor: */ ++ /* divide by 86 for 3.1852 us period or 0.0099095T */ ++ { {807,1}, ++ {605,1}, ++ {202,1}, ++ {101,1} }, /* pa[], preamble A pulse sequence */ ++ { {807,1}, ++ {605,1}, ++ {303,1}, ++ {0,0} }, /* pb[], preamble B pulse sequence */ ++ 4, /* number of entries in pa[] */ ++ 3, /* number of entries in pb[] */ ++ 1, /* measure preamble pulse: */ ++ /* 0 => even counts specifies cycle period */ ++ /* 1 => even counts specifies off pulse period */ ++ 0, /* if true, pb[] matches a repeat sequence */ ++ 0, /* pulse tolerance = value not used */ ++ 202, /* bit Period = 643.407 us (PS T0) */ ++ 0, /* not used for bi-phase (PS delta T) */ ++ 0, /* - " - (symbol pulse position) */ ++ 0, /* - " - (measure spacing for complete cycle) */ ++ {0, 1}, /* - " - (data symbol fix-width pulse period) */ ++ {0, 1}, /* bit period tolerance value = not applicable, */ ++ /* and select code = 12.5% */ ++ 31-1, /* no. of symbols for sequence with preamble A */ ++ 31-1, /* no. of symbols for sequence with preamble B */ ++ 1-1, /* no. of data bits per symbol */ ++ 1, /* most/!least significant symbol received first */ ++ 0, /* left/!right adjust received data */ ++ 1, /* bi-phase/!pulse-spacing coded */ ++ 0, /* two symbols per cycle */ ++ 0, /* check stop symbol */ ++ 0, /* variable length data */ ++ 40-1, /* time-out clock divisor: divide by 40 or 127.4074 us */ ++ 240, /* frame time-out = 30.58 ms */ ++ 26, /* edge time-out = 3.313 ms */ ++ 20, /* minimum dead-time after fault = 2.548 ms */ ++ {0, 0}, /* stop symbol pulse or cycle period */ ++ 0, /* data symbol timeout */ ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, /* restrictive decoding enabled: 0:false, 1:true */ ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0, ++ 0 ++}; ++ + #if RCMM_VARIABLE_LENGTH_SUPPORT != 1 + static const CIR_Param s_RCMMParam = { + /* +@@ -1862,6 +1922,9 @@ BERR_Code BKIR_GetDefaultCirParam ( + case BKIR_KirDevice_eCirXip: + pCirParam = &xipParam; + break; ++ case BKIR_KirDevice_eCirKreaTv: ++ pCirParam = &kreatvParam; ++ break; + default: + retCode = BERR_TRACE(BERR_INVALID_PARAMETER); + break; +@@ -2101,6 +2164,7 @@ BERR_Code BKIR_EnableIrDevice ( + case BKIR_KirDevice_eCirDirectvUhfr: + case BKIR_KirDevice_eCirEchostarUhfr: + case BKIR_KirDevice_eCirRC6: ++ case BKIR_KirDevice_eCirKreaTv: + case BKIR_KirDevice_eCirRcmmRcu: + case BKIR_KirDevice_eCirRstep: + case BKIR_KirDevice_eCirXmp2: +@@ -2135,6 +2199,7 @@ BERR_Code BKIR_EnableIrDevice ( + if ((device == BKIR_KirDevice_eCirRfUei) || + (device == BKIR_KirDevice_eCirDirectvUhfr) || + (device == BKIR_KirDevice_eCirEchostarUhfr) || ++ (device == BKIR_KirDevice_eCirKreaTv) || + (device == BKIR_KirDevice_eCirRC6)) { + /* Disable following remote types : */ + lval &= ~( KBD_CMD_TWIRP_ENABLE | +@@ -2143,6 +2208,7 @@ BERR_Code BKIR_EnableIrDevice ( + if ((hChn->customDevice == BKIR_KirDevice_eCirRfUei) || + (hChn->customDevice == BKIR_KirDevice_eCirDirectvUhfr) || + (hChn->customDevice == BKIR_KirDevice_eCirEchostarUhfr) || ++ (hChn->customDevice == BKIR_KirDevice_eCirKreaTv) || + (hChn->customDevice == BKIR_KirDevice_eCirRC6)) + lval &= ~( KBD_CMD_TWIRP_ENABLE | + KBD_CMD_SEJIN_ENABLE | +@@ -2244,6 +2310,7 @@ BERR_Code BKIR_DisableIrDevice ( + case BKIR_KirDevice_eCirDirectvUhfr: + case BKIR_KirDevice_eCirEchostarUhfr: + case BKIR_KirDevice_eCirRC6: ++ case BKIR_KirDevice_eCirKreaTv: + case BKIR_KirDevice_eCirRcmmRcu: + case BKIR_KirDevice_eCirRstep: + case BKIR_KirDevice_eCirXmp2: +@@ -2789,6 +2856,9 @@ void BKIR_P_ConfigCir ( + case BKIR_KirDevice_eCirXip: + pCirParam = &xipParam; + break; ++ case BKIR_KirDevice_eCirKreaTv: ++ pCirParam = &kreatvParam; ++ break; + default: + return; + } +--- a/nexus/modules/ir_input/include/nexus_ir_input.h ++++ b/nexus/modules/ir_input/include/nexus_ir_input.h +@@ -90,6 +90,7 @@ typedef enum NEXUS_IrInputMode + NEXUS_IrInputMode_eSonySejin, /* Sony Sejin keyboard using UART D */ + NEXUS_IrInputMode_eCirNec, /* Consumer NEC */ + NEXUS_IrInputMode_eCirRC6, /* Consumer RC6 */ ++ NEXUS_IrInputMode_eCirKreaTv, /* Consumer Krea TV */ + NEXUS_IrInputMode_eCirGISat, /* Consumer GI Satellite */ + NEXUS_IrInputMode_eCustom, /* Customer specific type. See NEXUS_IrInput_SetCustomSettings. */ + NEXUS_IrInputMode_eCirDirectvUhfr, /* DIRECTV uhfr (In IR mode) */ +--- a/nexus/modules/ir_input/src/nexus_ir_input.c ++++ b/nexus/modules/ir_input/src/nexus_ir_input.c +@@ -251,6 +251,7 @@ static BERR_Code NEXUS_IrInput_P_DataReady_isr(BKIR_ChannelHandle hChn, void *co + case NEXUS_IrInputMode_eSejin56KhzKbd: + case NEXUS_IrInputMode_eCirXmp: + case NEXUS_IrInputMode_eCirRcmmRcu: ++ case NEXUS_IrInputMode_eCirKreaTv: + if (irInput->settings.repeatFilterTime == 0) /* maintain compatibility with older application code */ + irInput->settings.repeatFilterTime = 150; /* that did not over-ride the default timeout */ + /* no hardware to detect this, so measure time */ + From 7a040732ce236d3ff72117c5aec57652b2722c54 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 09:49:35 +0200 Subject: [PATCH 374/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 86d57efb3053..8f05a6388835 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = dc64db6ab27e2ed9d80411da725e7b63df416956 +WPEFRAMEWORK_VERSION = e7756de2c1d49db55b87322001b21a18a54851c4 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From a2853a60d66e9f0c781906448b807efb08040b93 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 14:34:00 +0200 Subject: [PATCH 375/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index db1e894df7a4..387766e97bd2 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = c24242bfa5bb254bd61e78cb0ef48918addc17b5 +WPEWEBKIT_VERSION_VALUE = 9df06fedb7eacf19a53a86551e81e36bed69a236 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From a3a51560d64cd10572ab908afae1ac6f132416e6 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Tue, 4 Sep 2018 18:09:22 +0200 Subject: [PATCH 376/614] [ArrisRDK] updated config --- configs/arrisrdk_wpe_ml_defconfig | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index d131f189a6d4..686dc8b2bde0 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -48,12 +48,7 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y -BR2_PACKAGE_WIDEVINE=y -BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y @@ -62,8 +57,9 @@ BR2_PACKAGE_BCM_REFSW_PLATFORM_72604=y # BR2_PACKAGE_BCM_VP9_DECODER_SUPPORT is not set BR2_PACKAGE_BCM_REFSW_BOXMODE="4" # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_CDM=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y @@ -71,16 +67,14 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" -BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="350" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y -BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y -BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE="18" -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_KEYMAP="IRRemoteKeyMap-ArrisRDK-18.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -91,16 +85,14 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,netwo BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y -BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" -BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y +# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y BR2_PACKAGE_GESFTPSERVER=y +BR2_TARGET_ROOTFS_INITRAMFS=y +# BR2_TARGET_ROOTFS_TAR is not set From e39e52ac658a8e213732f0f06211bc7a7118ecb3 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 18:13:43 +0200 Subject: [PATCH 377/614] [bcm] use default /www directory for webserver --- board/bcm/post-build.sh | 4 ++-- configs/bcm72604_wpe_ml_defconfig | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/board/bcm/post-build.sh b/board/bcm/post-build.sh index 9da698abe273..cdbabef142e0 100755 --- a/board/bcm/post-build.sh +++ b/board/bcm/post-build.sh @@ -10,6 +10,6 @@ BOARD_DIR="$(dirname $0)" # Copy index.html page for WPE Framework if [ -f "${BOARD_DIR}/index.html" ]; then - mkdir -p "${TARGET_DIR}/var/www/" - cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/var/www/" + mkdir -p "${TARGET_DIR}/www/" + cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" fi diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index ef9e3089f93c..e6d4183dc3a0 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -90,7 +90,6 @@ BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH="/var/www" BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y From 07bfc2c6e7b8a226438bc3b98ce80db9db7d5660 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 18:31:08 +0200 Subject: [PATCH 378/614] [arrisrdk] cleaning up defconfig --- configs/arrisrdk_wpe_ml_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 686dc8b2bde0..59f1ffe29fbc 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_BCM_REFSW_BOXMODE="4" # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_CDM=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y From 3a38b25b2f78f235f1ddb6ca0293dd284738b546 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 19:29:33 +0200 Subject: [PATCH 379/614] [arrisrdk] fix keymap selection properly --- configs/arrisrdk_wpe_ml_defconfig | 2 +- package/wpe/wpeframework-plugins/Config.in | 6 ------ 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 59f1ffe29fbc..7ac61efe3b0b 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -8,7 +8,7 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y BR2_GLIBC_VERSION_2_23=y BR2_TOOLCHAIN_BUILDROOT_CXX=y -BR2_TARGET_GENERIC_HOSTNAME="WPE" +BR2_TARGET_GENERIC_HOSTNAME="ArrisRDK" BR2_TARGET_GENERIC_ISSUE="Welcome to ArrisRDK" BR2_TARGET_GENERIC_CABUNDLE=y # BR2_TARGET_GENERIC_NETWORK is not set diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 615054c41070..c6330370cc3c 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -272,12 +272,6 @@ config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_CODEMASK help Sets a key code mask if the device generates same code based on trigger bit -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_KEYMAP - string "keymap" - default "" - help - Select a keymap file - endif endif From 0f67bd881bc31654e8d951acad35f9a8d32a3f35 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 19:30:38 +0200 Subject: [PATCH 380/614] [wpeframework-plugins] bump to latest versionn --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 09f1e1664f89..84befc41ab31 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = d9f8ade99517d18071feb9016d4b516e8675e613 +WPEFRAMEWORK_PLUGINS_VERSION = 9d93a104dfc2e4c18fa4d815bdeb02d40f99359e WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 1f04235a2e7c25d59cba2638a514ea6b44d3f2c0 Mon Sep 17 00:00:00 2001 From: Wouter lucas van Boesschoten Date: Tue, 4 Sep 2018 13:48:31 -0700 Subject: [PATCH 381/614] [bcm7252] update to 17.4 --- configs/bcm7252_wpe_ml_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/bcm7252_wpe_ml_defconfig b/configs/bcm7252_wpe_ml_defconfig index 7ebd5dec6f74..9d0702ede254 100644 --- a/configs/bcm7252_wpe_ml_defconfig +++ b/configs/bcm7252_wpe_ml_defconfig @@ -44,7 +44,7 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_17_1=y +BR2_PACKAGE_BCM_REFSW_17_4=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y From cb016e2926fc2c3804a6ad4fdfae7346cfd0296c Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 4 Sep 2018 23:09:04 +0200 Subject: [PATCH 382/614] [wpeframework-plugins] use keymaps from board configurations --- board/arris/arris-ir-remote.json | 94 +++++++++++++++ board/arris/post-build.sh | 20 ++++ board/bcm/bcm-16-ir-remote.json | 101 +++++++++++++++++ board/bcm/bcm-22-ir-remote.json | 40 +++++++ board/bcm/bcm-4-ir-remote.json | 107 ++++++++++++++++++ board/dawn/dawn-16-ir-remote.json | 21 ++++ board/dawn/dawn-22-ir-remote.json | 40 +++++++ board/dawn/dawn-rf4ce-remote.json | 4 + board/homecast/homecast-ir-remote.json | 104 +++++++++++++++++ board/raspberrypi/osmc-devinput-remote.json | 22 ++++ board/raspberrypi/post-build.sh | 6 + configs/arrisrdk_wpe_ml_defconfig | 9 +- configs/bcm7252_wpe_ml_defconfig | 1 - configs/bcm72604_wpe_ml_defconfig | 1 - configs/bcm7271_wpe_ml_defconfig | 2 - configs/bcm7425_wpe_ml_defconfig | 1 - configs/bcm7428_wpe_ml_defconfig | 1 - configs/bcm7429_wpe_ml_defconfig | 1 - configs/bcm7437_wpe_ml_defconfig | 2 - configs/bcm7439_wpe_ml_defconfig | 2 - configs/dawn7002_wpe_defconfig | 1 - configs/iot-gate-rpi_wpe_ml_defconfig | 1 - configs/raspberrypi0_wpe_defconfig | 1 - configs/raspberrypi0_wpe_ml_defconfig | 1 - configs/raspberrypi2_wpe_defconfig | 1 - configs/raspberrypi2_wpe_ml_defconfig | 1 - configs/raspberrypi3+_wpe_ml_defconfig | 1 - configs/raspberrypi3_wpe_defconfig | 1 - configs/raspberrypi3_wpe_ml_defconfig | 2 +- configs/spectrum_wpe_defconfig | 1 - package/wpe/wpeframework-plugins/Config.in | 50 +++----- .../wpeframework-plugins.mk | 28 ++--- .../wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 33 files changed, 585 insertions(+), 85 deletions(-) create mode 100644 board/arris/arris-ir-remote.json create mode 100755 board/arris/post-build.sh create mode 100644 board/bcm/bcm-16-ir-remote.json create mode 100644 board/bcm/bcm-22-ir-remote.json create mode 100644 board/bcm/bcm-4-ir-remote.json create mode 100644 board/dawn/dawn-16-ir-remote.json create mode 100644 board/dawn/dawn-22-ir-remote.json create mode 100644 board/dawn/dawn-rf4ce-remote.json create mode 100644 board/homecast/homecast-ir-remote.json create mode 100644 board/raspberrypi/osmc-devinput-remote.json diff --git a/board/arris/arris-ir-remote.json b/board/arris/arris-ir-remote.json new file mode 100644 index 000000000000..bf3a4b8c3671 --- /dev/null +++ b/board/arris/arris-ir-remote.json @@ -0,0 +1,94 @@ +[ + { "_comment" : "Name convention: IRRemoteKeyMap-.json"}, + + { "_comment" : "Arris remote keys"}, + { "code": "0X6FFFF088", "key": 28, "char": "[OK]" }, + { "code": "0X6FFFC78C", "key": 103, "char": "[UP]" }, + { "code": "0X6FFFB78B", "key": 108, "char": "[DOWN]" }, + { "code": "0X6FFFA78A", "key": 105, "char": "[LEFT]" }, + { "code": "0X6FFF9789", "key": 106, "char": "[RIGHT]" }, + { "code": "0x6FFFA487", "key": 14, "char": "[BACKSPACE]" }, + { "code": "0X6FFFD086", "key": 1, "char": "[HOME]" }, + { "code": "0x6FFF9082", "key": 217, "char": "[SEARCH]" }, + + + { "_comment" : "webui bindings below"}, + { "code": "0x0001", "key": 103 }, + { "code": "0x0002", "key": 108 }, + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, + { "code": "0x0020", "key": 11 }, + { "code": "0x0021", "key": 2 }, + { "code": "0x0022", "key": 3 }, + { "code": "0x0023", "key": 4 }, + { "code": "0x0024", "key": 5 }, + { "code": "0x0025", "key": 6 }, + { "code": "0x0026", "key": 7 }, + { "code": "0x0027", "key": 8 }, + { "code": "0x0028", "key": 9 }, + { "code": "0x0029", "key": 10 }, + { "code": "0x002B", "key": 28 }, + { "code": "0x0030", "key": 104 }, + { "code": "0x0031", "key": 109 }, + { "code": "0x0032", "key": 14 }, + { "code": "0x0071", "key": 401 }, + { "code": "0x0072", "key": 398 }, + { "code": "0x0073", "key": 399 }, + { "code": "0x0074", "key": 400 }, + { "code": "0x8004", "key": 30 }, + { "code": "0x8005", "key": 48 }, + { "code": "0x8006", "key": 46 }, + { "code": "0x8007", "key": 32 }, + { "code": "0x8008", "key": 18 }, + { "code": "0x8009", "key": 33 }, + { "code": "0x800A", "key": 34 }, + { "code": "0x800B", "key": 35 }, + { "code": "0x800C", "key": 23 }, + { "code": "0x800D", "key": 36 }, + { "code": "0x800E", "key": 37 }, + { "code": "0x800F", "key": 38 }, + { "code": "0x8010", "key": 50 }, + { "code": "0x8011", "key": 49 }, + { "code": "0x8012", "key": 24 }, + { "code": "0x8013", "key": 25 }, + { "code": "0x8014", "key": 16 }, + { "code": "0x8015", "key": 19 }, + { "code": "0x8016", "key": 31 }, + { "code": "0x8017", "key": 20 }, + { "code": "0x8018", "key": 22 }, + { "code": "0x8019", "key": 47 }, + { "code": "0x801A", "key": 17 }, + { "code": "0x801B", "key": 45 }, + { "code": "0x801C", "key": 21 }, + { "code": "0x801D", "key": 44 }, + { "code": "0x8028", "key": 28 }, + { "code": "0x802A", "key": 111 }, + { "code": "0x802C", "key": 57 }, + { "code": "0x802D", "key": 12 }, + { "code": "0x802E", "key": 13 }, + { "code": "0x8031", "key": 43 }, + { "code": "0x8033", "key": 39 }, + { "code": "0x8034", "key": 40 }, + { "code": "0x8035", "key": 108 }, + { "code": "0x8036", "key": 51 }, + { "code": "0x8037", "key": 52 }, + { "code": "0x8038", "key": 53 }, + { "code": "0x8039", "key": 58 }, + { "code": "0xE021", "key": 523 }, + { "code": "0xC022", "key": 435 }, + { "code": "0xA01E", "key": 2, "modifiers": ["shift"] }, + { "code": "0xA01F", "key": 3, "modifiers": ["shift"] }, + { "code": "0xA020", "key": 4, "modifiers": ["shift"] }, + { "code": "0xA021", "key": 5, "modifiers": ["shift"] }, + { "code": "0xA022", "key": 6, "modifiers": ["shift"] }, + { "code": "0xA023", "key": 7, "modifiers": ["shift"] }, + { "code": "0xA024", "key": 8, "modifiers": ["shift"] }, + { "code": "0xA025", "key": 9, "modifiers": ["shift"] }, + { "code": "0xA026", "key": 10, "modifiers": ["shift"] }, + { "code": "0xA027", "key": 11, "modifiers": ["shift"] }, + { "code": "0xA02E", "key": 13, "modifiers": ["shift"] }, + { "code": "0xA033", "key": 39, "modifiers": ["shift"] }, + { "code": "0xA034", "key": 40, "modifiers": ["shift"] }, + { "code": "0xA038", "key": 53, "modifiers": ["shift"] } +] diff --git a/board/arris/post-build.sh b/board/arris/post-build.sh new file mode 100755 index 000000000000..b3be498acdc7 --- /dev/null +++ b/board/arris/post-build.sh @@ -0,0 +1,20 @@ +#!/bin/bash + +set -u +set -e + +echo "Post-build: processing $@" + +BOARD_DIR="$(dirname $0)" + +# Copy index.html page for WPE Framework +if [ -f "${BOARD_DIR}/index.html" ]; then + mkdir -p "${TARGET_DIR}/www/" + cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" +fi + +# Copy keymap for Arris remote +if [ -f "${BOARD_DIR}/arris-ir-remote.json" ]; then + mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/" + cp -pf "${BOARD_DIR}/arris-ir-remote.json" "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/ir-remote.json" +fi diff --git a/board/bcm/bcm-16-ir-remote.json b/board/bcm/bcm-16-ir-remote.json new file mode 100644 index 000000000000..8886a8193319 --- /dev/null +++ b/board/bcm/bcm-16-ir-remote.json @@ -0,0 +1,101 @@ +[ + { "_comment" : "Name convention: IRRemoteKeyMap-.json"}, + + { "_comment" : "BCM NEC/silver remote keys"}, + { "code": "0xF708FF00", "key": 28, "char": "[OK]" }, + { "code": "0xB14EFF00", "key": 103, "char": "[UP]" }, + { "code": "0xF30CFF00", "key": 108, "char": "[DOWN]" }, + { "code": "0xF40BFF00", "key": 105, "char": "[LEFT]" }, + { "code": "0xB649FF00", "key": 106, "char": "[RIGHT]" }, + { "code": "0xB04FFF00", "key": 1, "char": "[RETURN]" }, + { "code": "0xB24DFF00", "key": 14, "char": "[BACKSPACE]" }, + { "code": "0xF50AFF00", "key": 116, "char": "[POWER]" }, + + { "_comment" : "Flow Remote keys"}, + { "code": "0xf20d4040", "key": 28, "char": "[OK]" }, + { "code": "0xf40b4040", "key": 103, "char": "[UP]" }, + { "code": "0xf10e4040", "key": 108, "char": "[DOWN]" }, + { "code": "0xef104040", "key": 105, "char": "[LEFT]" }, + { "code": "0xee114040", "key": 106, "char": "[RIGHT]" }, + { "code": "0xbe414040", "key": 1, "char": "[RETURN]" }, + + { "_comment" : "webui bindings below"}, + { "code": "0x0001", "key": 103 }, + { "code": "0x0002", "key": 108 }, + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, + { "code": "0x0020", "key": 11 }, + { "code": "0x0021", "key": 2 }, + { "code": "0x0022", "key": 3 }, + { "code": "0x0023", "key": 4 }, + { "code": "0x0024", "key": 5 }, + { "code": "0x0025", "key": 6 }, + { "code": "0x0026", "key": 7 }, + { "code": "0x0027", "key": 8 }, + { "code": "0x0028", "key": 9 }, + { "code": "0x0029", "key": 10 }, + { "code": "0x002B", "key": 28 }, + { "code": "0x0030", "key": 104 }, + { "code": "0x0031", "key": 109 }, + { "code": "0x0032", "key": 14 }, + { "code": "0x0071", "key": 401 }, + { "code": "0x0072", "key": 398 }, + { "code": "0x0073", "key": 399 }, + { "code": "0x0074", "key": 400 }, + { "code": "0x8004", "key": 30 }, + { "code": "0x8005", "key": 48 }, + { "code": "0x8006", "key": 46 }, + { "code": "0x8007", "key": 32 }, + { "code": "0x8008", "key": 18 }, + { "code": "0x8009", "key": 33 }, + { "code": "0x800A", "key": 34 }, + { "code": "0x800B", "key": 35 }, + { "code": "0x800C", "key": 23 }, + { "code": "0x800D", "key": 36 }, + { "code": "0x800E", "key": 37 }, + { "code": "0x800F", "key": 38 }, + { "code": "0x8010", "key": 50 }, + { "code": "0x8011", "key": 49 }, + { "code": "0x8012", "key": 24 }, + { "code": "0x8013", "key": 25 }, + { "code": "0x8014", "key": 16 }, + { "code": "0x8015", "key": 19 }, + { "code": "0x8016", "key": 31 }, + { "code": "0x8017", "key": 20 }, + { "code": "0x8018", "key": 22 }, + { "code": "0x8019", "key": 47 }, + { "code": "0x801A", "key": 17 }, + { "code": "0x801B", "key": 45 }, + { "code": "0x801C", "key": 21 }, + { "code": "0x801D", "key": 44 }, + { "code": "0x8028", "key": 28 }, + { "code": "0x802A", "key": 111 }, + { "code": "0x802C", "key": 57 }, + { "code": "0x802D", "key": 12 }, + { "code": "0x802E", "key": 13 }, + { "code": "0x8031", "key": 43 }, + { "code": "0x8033", "key": 39 }, + { "code": "0x8034", "key": 40 }, + { "code": "0x8035", "key": 108 }, + { "code": "0x8036", "key": 51 }, + { "code": "0x8037", "key": 52 }, + { "code": "0x8038", "key": 53 }, + { "code": "0x8039", "key": 58 }, + { "code": "0xE021", "key": 523 }, + { "code": "0xC022", "key": 435 }, + { "code": "0xA01E", "key": 2, "modifiers": ["shift"] }, + { "code": "0xA01F", "key": 3, "modifiers": ["shift"] }, + { "code": "0xA020", "key": 4, "modifiers": ["shift"] }, + { "code": "0xA021", "key": 5, "modifiers": ["shift"] }, + { "code": "0xA022", "key": 6, "modifiers": ["shift"] }, + { "code": "0xA023", "key": 7, "modifiers": ["shift"] }, + { "code": "0xA024", "key": 8, "modifiers": ["shift"] }, + { "code": "0xA025", "key": 9, "modifiers": ["shift"] }, + { "code": "0xA026", "key": 10, "modifiers": ["shift"] }, + { "code": "0xA027", "key": 11, "modifiers": ["shift"] }, + { "code": "0xA02E", "key": 13, "modifiers": ["shift"] }, + { "code": "0xA033", "key": 39, "modifiers": ["shift"] }, + { "code": "0xA034", "key": 40, "modifiers": ["shift"] }, + { "code": "0xA038", "key": 53, "modifiers": ["shift"] } +] diff --git a/board/bcm/bcm-22-ir-remote.json b/board/bcm/bcm-22-ir-remote.json new file mode 100644 index 000000000000..2e77411b3c06 --- /dev/null +++ b/board/bcm/bcm-22-ir-remote.json @@ -0,0 +1,40 @@ +[ + { "_comment" : "Name convention: IRRemoteKeyMap-.json"}, + + { "_comment" : "UPC old remote controller"}, + { "code": "0x20c0265c", "key": 28, "char": "[OK]" }, + { "code": "0x20c02658", "key": 103, "char": "[UP]" }, + { "code": "0x20c02659", "key": 108, "char": "[DOWN]"}, + { "code": "0x20c0265a", "key": 105, "char": "[LEFT]"}, + { "code": "0x20c0265b", "key": 106, "char": "[RIGHT]"}, + { "code": "0x20c0264d", "key": 1, "char": "[BACK]" }, + { "code": "0x20c026db", "key": 14, "char": "[MENU]"}, + { "code": "0x20c02600", "key": 11, "char": "0" }, + { "code": "0x20c02601", "key": 2, "char": "1" }, + { "code": "0x20c02602", "key": 3, "char": "2" }, + { "code": "0x20c02603", "key": 4, "char": "3" }, + { "code": "0x20c02604", "key": 5, "char": "4" }, + { "code": "0x20c02605", "key": 6, "char": "5" }, + { "code": "0x20c02606", "key": 7, "char": "6" }, + { "code": "0x20c02607", "key": 8, "char": "7" }, + { "code": "0x20c02608", "key": 9, "char": "8" }, + { "code": "0x20c02609", "key": 10, "char": "9" }, + { "code": "0x20c02620", "key": 402, "char": "[CHANNEL UP]" }, + { "code": "0x20c02621", "key": 403, "char": "[CHANNEL DOWN]" }, + { "code": "0x20c02605", "key": 226, "char": "[MIC]" }, + { "code": "0x20c026cb", "key": 358, "char": "[INFO]" }, + { "code": "0x20c026f5", "key": 358, "char": "[VOD]" }, + { "code": "0x20c02681", "key": 138, "char": "[HELP]" }, + { "code": "0x20c0262c", "key": 200, "char": "[PLAY]" }, + { "code": "0x20c02630", "key": 201, "char": "[PAUSE]" }, + { "code": "0x20c02631", "key": 166, "char": "[STOP]" }, + { "code": "0x20c02637", "key": 167, "char": "[RECORD]" }, + { "code": "0x20c02629", "key": 168, "char": "[REWIND]" }, + { "code": "0x20c02628", "key": 159, "char": "[FORWARD]" }, + { "code": "0x20c026cc", "key": 365, "char": "[GUIDE]" }, + { "code": "0x20c0260c", "key": 116, "char": "[POWER]" }, + { "code": "0x20c0266e", "key": 399, "char": "[GREEN]" }, + { "code": "0x20c0266f", "key": 400, "char": "[YELLOW]" }, + { "code": "0x20c02670", "key": 401, "char": "[BLUE]" }, + { "code": "0x20c0266d", "key": 398, "char": "[RED]" } +] diff --git a/board/bcm/bcm-4-ir-remote.json b/board/bcm/bcm-4-ir-remote.json new file mode 100644 index 000000000000..7b8547b6dd7f --- /dev/null +++ b/board/bcm/bcm-4-ir-remote.json @@ -0,0 +1,107 @@ +[ + { "_comment" : "Name convention: IRRemoteKeyMap-.json"}, + { "code": "0xE011", "key": 28, "char": "[OK]" }, + { "code": "0x9034", "key": 103, "char": "[UP]" }, + { "code": "0x8035", "key": 108, "char": "[DOWN]" }, + { "code": "0x7036", "key": 105, "char": "[LEFT]" }, + { "code": "0x6037", "key": 106, "char": "[RIGHT]" }, + { "code": "0xD012", "key": 1, "char": "[ESC EXIT]" }, + { "code": "0xa051", "key": 14, "char": "[BACKSPACE]"}, + { "code": "0x0000", "key": 11, "char": "0" }, + { "code": "0xF001", "key": 2, "char": "1" }, + { "code": "0xE002", "key": 3, "char": "2" }, + { "code": "0xD003", "key": 4, "char": "3" }, + { "code": "0xC004", "key": 5, "char": "4" }, + { "code": "0xB005", "key": 6, "char": "5" }, + { "code": "0xA006", "key": 7, "char": "6" }, + { "code": "0x9007", "key": 8, "char": "7" }, + { "code": "0x8008", "key": 9, "char": "8" }, + { "code": "0x7009", "key": 10, "char": "9" }, + { "code": "0x400C", "key": 12, "char": "[- CHANNEL DOWN]" }, + { "code": "0x500B", "key": 13, "char": "[= CHANNEL UP]" }, + { "code": "0x003d", "key": 32, "char": "[D DVR]" }, + { "code": "0xd030", "key": 34, "char": "[G GUIDE]" }, + { "code": "0xa033", "key": 23, "char": "[I INFO]" }, + { "code": "0xc013", "key": 38, "char": "[L LAST]" }, + { "code": "0x6019", "key": 50, "char": "[M MENU]" }, + { "code": "0x600A", "key": 25, "char": "[P POWER]" }, + { "code": "0x9052", "key": 24, "char": "[O OPTION]" }, + { "code": "0xc031", "key": 19, "char": "[R REC]" }, + { "code": "0xf010", "key": 31, "char": "[S SEARCH]" }, + { "code": "0x100f", "key": 113, "char": "[MUTE]" }, + { "code": "0x300d", "key": 115, "char": "[VOLUP]" }, + { "code": "0x200e", "key": 114, "char": "[VOLDWN]" }, + { "code": "0xB050", "key": 164, "char": "[PLAYPAUSE]" }, + { "_comment" : "webui bindings below"}, + { "code": "0x0001", "key": 103 }, + { "code": "0x0002", "key": 108 }, + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, + { "code": "0x0020", "key": 11 }, + { "code": "0x0021", "key": 2 }, + { "code": "0x0022", "key": 3 }, + { "code": "0x0023", "key": 4 }, + { "code": "0x0024", "key": 5 }, + { "code": "0x0025", "key": 6 }, + { "code": "0x0026", "key": 7 }, + { "code": "0x0027", "key": 8 }, + { "code": "0x0028", "key": 9 }, + { "code": "0x0029", "key": 10 }, + { "code": "0x002B", "key": 28 }, + { "code": "0x0030", "key": 104 }, + { "code": "0x0031", "key": 109 }, + { "code": "0x8004", "key": 30 }, + { "code": "0x8005", "key": 48 }, + { "code": "0x8006", "key": 46 }, + { "code": "0x8007", "key": 32 }, + { "code": "0x8009", "key": 33 }, + { "code": "0x800A", "key": 34 }, + { "code": "0x800B", "key": 35 }, + { "code": "0x800C", "key": 23 }, + { "code": "0x800D", "key": 36 }, + { "code": "0x800E", "key": 37 }, + { "code": "0x800F", "key": 38 }, + { "code": "0x8010", "key": 50 }, + { "code": "0x8011", "key": 49 }, + { "code": "0x8012", "key": 24 }, + { "code": "0x8013", "key": 25 }, + { "code": "0x8014", "key": 16 }, + { "code": "0x8015", "key": 19 }, + { "code": "0x8016", "key": 31 }, + { "code": "0x8017", "key": 20 }, + { "code": "0x8018", "key": 22 }, + { "code": "0x8019", "key": 47 }, + { "code": "0x801A", "key": 17 }, + { "code": "0x801B", "key": 45 }, + { "code": "0x801C", "key": 21 }, + { "code": "0x801D", "key": 44 }, + { "code": "0x8028", "key": 28 }, + { "code": "0x802A", "key": 111 }, + { "code": "0x802C", "key": 57 }, + { "code": "0x802D", "key": 12 }, + { "code": "0x802E", "key": 13 }, + { "code": "0x8031", "key": 43 }, + { "code": "0x8033", "key": 39 }, + { "code": "0x8034", "key": 40 }, + { "code": "0x8036", "key": 51 }, + { "code": "0x8037", "key": 52 }, + { "code": "0x8038", "key": 53 }, + { "code": "0x8039", "key": 58 }, + { "code": "0xE021", "key": 523 }, + { "code": "0xC022", "key": 435 }, + { "code": "0xA01E", "key": 2, "modifiers": ["shift"] }, + { "code": "0xA01F", "key": 3, "modifiers": ["shift"] }, + { "code": "0xA020", "key": 4, "modifiers": ["shift"] }, + { "code": "0xA021", "key": 5, "modifiers": ["shift"] }, + { "code": "0xA022", "key": 6, "modifiers": ["shift"] }, + { "code": "0xA023", "key": 7, "modifiers": ["shift"] }, + { "code": "0xA024", "key": 8, "modifiers": ["shift"] }, + { "code": "0xA025", "key": 9, "modifiers": ["shift"] }, + { "code": "0xA026", "key": 10, "modifiers": ["shift"] }, + { "code": "0xA027", "key": 11, "modifiers": ["shift"] }, + { "code": "0xA02E", "key": 13, "modifiers": ["shift"] }, + { "code": "0xA033", "key": 39, "modifiers": ["shift"] }, + { "code": "0xA034", "key": 40, "modifiers": ["shift"] } + { "code": "0xA038", "key": 53, "modifiers": ["shift"] } +] diff --git a/board/dawn/dawn-16-ir-remote.json b/board/dawn/dawn-16-ir-remote.json new file mode 100644 index 000000000000..18d452561b10 --- /dev/null +++ b/board/dawn/dawn-16-ir-remote.json @@ -0,0 +1,21 @@ +[ + { "_comment" : "Name convention: -IRRemoteKeyMap-.json"}, + + { "_comment" : "BCM NEC/silver remote keys"}, + { "code": "0xF708FF00", "key": 28, "char": "[OK]" }, + { "code": "0xB14EFF00", "key": 103, "char": "[UP]" }, + { "code": "0xF30CFF00", "key": 108, "char": "[DOWN]" }, + { "code": "0xF40BFF00", "key": 105, "char": "[LEFT]" }, + { "code": "0xB649FF00", "key": 106, "char": "[RIGHT]" }, + { "code": "0xB04FFF00", "key": 1, "char": "[RETURN]" }, + { "code": "0xB24DFF00", "key": 14, "char": "[BACKSPACE]" }, + { "code": "0xF50AFF00", "key": 116, "char": "[POWER]" }, + + { "_comment" : "Flow Remote keys"}, + { "code": "0xf20d4040", "key": 28, "char": "[OK]" }, + { "code": "0xf40b4040", "key": 103, "char": "[UP]" }, + { "code": "0xf10e4040", "key": 108, "char": "[DOWN]" }, + { "code": "0xef104040", "key": 105, "char": "[LEFT]" }, + { "code": "0xee114040", "key": 106, "char": "[RIGHT]" }, + { "code": "0xbe414040", "key": 1, "char": "[RETURN]" } +] diff --git a/board/dawn/dawn-22-ir-remote.json b/board/dawn/dawn-22-ir-remote.json new file mode 100644 index 000000000000..a9e13ace11e2 --- /dev/null +++ b/board/dawn/dawn-22-ir-remote.json @@ -0,0 +1,40 @@ +[ + { "_comment" : "Name convention: -IRRemoteKeyMap-.json"}, + + { "_comment" : "UPC old remote controller"}, + { "code": "0x20c0265c", "key": 28, "char": "[OK]" }, + { "code": "0x20c02658", "key": 103, "char": "[UP]" }, + { "code": "0x20c02659", "key": 108, "char": "[DOWN]"}, + { "code": "0x20c0265a", "key": 105, "char": "[LEFT]"}, + { "code": "0x20c0265b", "key": 106, "char": "[RIGHT]"}, + { "code": "0x20c0264d", "key": 1, "char": "[BACK]" }, + { "code": "0x20c026db", "key": 14, "char": "[MENU]"}, + { "code": "0x20c02600", "key": 11, "char": "0" }, + { "code": "0x20c02601", "key": 2, "char": "1" }, + { "code": "0x20c02602", "key": 3, "char": "2" }, + { "code": "0x20c02603", "key": 4, "char": "3" }, + { "code": "0x20c02604", "key": 5, "char": "4" }, + { "code": "0x20c02605", "key": 6, "char": "5" }, + { "code": "0x20c02606", "key": 7, "char": "6" }, + { "code": "0x20c02607", "key": 8, "char": "7" }, + { "code": "0x20c02608", "key": 9, "char": "8" }, + { "code": "0x20c02609", "key": 10, "char": "9" }, + { "code": "0x20c02620", "key": 402, "char": "[CHANNEL UP]" }, + { "code": "0x20c02621", "key": 403, "char": "[CHANNEL DOWN]" }, + { "code": "0x20c02605", "key": 226, "char": "[MIC]" }, + { "code": "0x20c026cb", "key": 358, "char": "[INFO]" }, + { "code": "0x20c026f5", "key": 358, "char": "[VOD]" }, + { "code": "0x20c02681", "key": 138, "char": "[HELP]" }, + { "code": "0x20c0262c", "key": 200, "char": "[PLAY]" }, + { "code": "0x20c02630", "key": 201, "char": "[PAUSE]" }, + { "code": "0x20c02631", "key": 166, "char": "[STOP]" }, + { "code": "0x20c02637", "key": 167, "char": "[RECORD]" }, + { "code": "0x20c02629", "key": 168, "char": "[REWIND]" }, + { "code": "0x20c02628", "key": 159, "char": "[FORWARD]" }, + { "code": "0x20c026cc", "key": 365, "char": "[GUIDE]" }, + { "code": "0x20c0260c", "key": 116, "char": "[POWER]" }, + { "code": "0x20c0266e", "key": 399, "char": "[GREEN]" }, + { "code": "0x20c0266f", "key": 400, "char": "[YELLOW]" }, + { "code": "0x20c02670", "key": 401, "char": "[BLUE]" }, + { "code": "0x20c0266d", "key": 398, "char": "[RED]" } +] diff --git a/board/dawn/dawn-rf4ce-remote.json b/board/dawn/dawn-rf4ce-remote.json new file mode 100644 index 000000000000..9290b57c3887 --- /dev/null +++ b/board/dawn/dawn-rf4ce-remote.json @@ -0,0 +1,4 @@ +[ + { "_comment" : "Name convention: -RFRemoteKeyMap.json"}, + { "_comment" : "DAWN RF REMOTE KeyMap - EMPTY"} +] diff --git a/board/homecast/homecast-ir-remote.json b/board/homecast/homecast-ir-remote.json new file mode 100644 index 000000000000..ba388456db9f --- /dev/null +++ b/board/homecast/homecast-ir-remote.json @@ -0,0 +1,104 @@ +[ + + { "_comment" : "Homecast remote key mapping"}, + { "code": "0x0030", "key": 11, "char": "0" }, + { "code": "0x0031", "key": 2, "char": "1" }, + { "code": "0x0032", "key": 3, "char": "2" }, + { "code": "0x0033", "key": 4, "char": "3" }, + { "code": "0x0034", "key": 5, "char": "4" }, + { "code": "0x0035", "key": 6, "char": "5" }, + { "code": "0x0036", "key": 7, "char": "6" }, + { "code": "0x0037", "key": 8, "char": "7" }, + { "code": "0x0038", "key": 9, "char": "8" }, + { "code": "0x0039", "key": 10, "char": "9" }, + { "code": "0xE041", "key": 103, "char": "Up" }, + { "code": "0xE042", "key": 108, "char": "Down" }, + { "code": "0xE020", "key": 28, "char": "Enter" }, + { "code": "0xE044", "key": 105, "char": "Left" }, + { "code": "0xE043", "key": 106, "char": "Right" }, + { "code": "0xE05B", "key": 14, "char": "Exit (mapped to backspace)" }, + { "code": "0xE0E9", "key": 164, "char": "Play/Pause" }, + { "code": "0xE06A", "key": 168, "char": "Rewind"}, + { "code": "0xE06C", "key": 208, "char": "Fastforward"}, + { "code": "0xE071", "key": 128, "char": "Stop"}, + + { "_comment" : "webui bindings below"}, + { "code": "0x0001", "key": 103 }, + { "code": "0x0002", "key": 108 }, + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, + { "code": "0x0020", "key": 11 }, + { "code": "0x0021", "key": 2 }, + { "code": "0x0022", "key": 3 }, + { "code": "0x0023", "key": 4 }, + { "code": "0x0024", "key": 5 }, + { "code": "0x0025", "key": 6 }, + { "code": "0x0026", "key": 7 }, + { "code": "0x0027", "key": 8 }, + { "code": "0x0028", "key": 9 }, + { "code": "0x0029", "key": 10 }, + { "code": "0x002B", "key": 28 }, + { "code": "0x0030", "key": 104 }, + { "code": "0x0031", "key": 109 }, + { "code": "0x0032", "key": 14 }, + { "code": "0x0071", "key": 401 }, + { "code": "0x0072", "key": 398 }, + { "code": "0x0073", "key": 399 }, + { "code": "0x0074", "key": 400 }, + { "code": "0x8004", "key": 30 }, + { "code": "0x8005", "key": 48 }, + { "code": "0x8006", "key": 46 }, + { "code": "0x8007", "key": 32 }, + { "code": "0x8008", "key": 18 }, + { "code": "0x8009", "key": 33 }, + { "code": "0x800A", "key": 34 }, + { "code": "0x800B", "key": 35 }, + { "code": "0x800C", "key": 23 }, + { "code": "0x800D", "key": 36 }, + { "code": "0x800E", "key": 37 }, + { "code": "0x800F", "key": 38 }, + { "code": "0x8010", "key": 50 }, + { "code": "0x8011", "key": 49 }, + { "code": "0x8012", "key": 24 }, + { "code": "0x8013", "key": 25 }, + { "code": "0x8014", "key": 16 }, + { "code": "0x8015", "key": 19 }, + { "code": "0x8016", "key": 31 }, + { "code": "0x8017", "key": 20 }, + { "code": "0x8018", "key": 22 }, + { "code": "0x8019", "key": 47 }, + { "code": "0x801A", "key": 17 }, + { "code": "0x801B", "key": 45 }, + { "code": "0x801C", "key": 21 }, + { "code": "0x801D", "key": 44 }, + { "code": "0x8028", "key": 28 }, + { "code": "0x802A", "key": 111 }, + { "code": "0x802C", "key": 57 }, + { "code": "0x802D", "key": 12 }, + { "code": "0x802E", "key": 13 }, + { "code": "0x8031", "key": 43 }, + { "code": "0x8033", "key": 39 }, + { "code": "0x8034", "key": 40 }, + { "code": "0x8035", "key": 108 }, + { "code": "0x8036", "key": 51 }, + { "code": "0x8037", "key": 52 }, + { "code": "0x8038", "key": 53 }, + { "code": "0x8039", "key": 58 }, + { "code": "0xE021", "key": 523 }, + { "code": "0xC022", "key": 435 }, + { "code": "0xA01E", "key": 2, "modifiers": ["shift"] }, + { "code": "0xA01F", "key": 3, "modifiers": ["shift"] }, + { "code": "0xA020", "key": 4, "modifiers": ["shift"] }, + { "code": "0xA021", "key": 5, "modifiers": ["shift"] }, + { "code": "0xA022", "key": 6, "modifiers": ["shift"] }, + { "code": "0xA023", "key": 7, "modifiers": ["shift"] }, + { "code": "0xA024", "key": 8, "modifiers": ["shift"] }, + { "code": "0xA025", "key": 9, "modifiers": ["shift"] }, + { "code": "0xA026", "key": 10, "modifiers": ["shift"] }, + { "code": "0xA027", "key": 11, "modifiers": ["shift"] }, + { "code": "0xA02E", "key": 13, "modifiers": ["shift"] }, + { "code": "0xA033", "key": 39, "modifiers": ["shift"] }, + { "code": "0xA034", "key": 40, "modifiers": ["shift"] }, + { "code": "0xA038", "key": 53, "modifiers": ["shift"] } +] diff --git a/board/raspberrypi/osmc-devinput-remote.json b/board/raspberrypi/osmc-devinput-remote.json new file mode 100644 index 000000000000..bc4f3abad628 --- /dev/null +++ b/board/raspberrypi/osmc-devinput-remote.json @@ -0,0 +1,22 @@ +[ + { "code": "0x0001", "key": 103 }, + { "code": "0x0002", "key": 108 }, + { "code": "0x0003", "key": 105 }, + { "code": "0x0004", "key": 106 }, + { "code": "0x0009", "key": 1 }, + { "code": "0x002B", "key": 28 }, + { "code": "0x0032", "key": 14 }, + { "code": "0x000C", "key": 114 }, + { "code": "0x000D", "key": 115 }, + { "code": "0x0017", "key": 116 }, + { "code": "0x001C", "key": 28 }, + { "code": "0x002E", "key": 139 }, + { "code": "0x0066", "key": 1 }, + { "code": "0x0067", "key": 103 }, + { "code": "0x0069", "key": 105 }, + { "code": "0x006A", "key": 106 }, + { "code": "0x006C", "key": 108 }, + { "code": "0x0080", "key": 166 }, + { "code": "0x009E", "key": 14 }, + { "code": "0x00A4", "key": 164 } +] diff --git a/board/raspberrypi/post-build.sh b/board/raspberrypi/post-build.sh index a9d171715d98..2261c1629ad3 100755 --- a/board/raspberrypi/post-build.sh +++ b/board/raspberrypi/post-build.sh @@ -18,3 +18,9 @@ if [ -f "${BOARD_DIR}/index.html" ]; then mkdir -p "${TARGET_DIR}/www/" cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" fi + +# Copy keymap for OSMC remote +if [ -f "${BOARD_DIR}/osmc-devinput-remote.json" ]; then + mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/" + cp -pf "${BOARD_DIR}/osmc-devinput-remote.json" "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/devinput-remote.json" +fi diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 7ac61efe3b0b..7d2775a79ee2 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -8,15 +8,15 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y BR2_GLIBC_VERSION_2_23=y BR2_TOOLCHAIN_BUILDROOT_CXX=y -BR2_TARGET_GENERIC_HOSTNAME="ArrisRDK" -BR2_TARGET_GENERIC_ISSUE="Welcome to ArrisRDK" +BR2_TARGET_GENERIC_HOSTNAME="wpe" +BR2_TARGET_GENERIC_ISSUE="Welcome to WPE" BR2_TARGET_GENERIC_CABUNDLE=y # BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" BR2_SYSTEM_DHCP="eth0" -BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/post-build.sh" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/arris/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" @@ -63,6 +63,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y @@ -72,8 +73,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE="18" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/bcm7252_wpe_ml_defconfig b/configs/bcm7252_wpe_ml_defconfig index 9d0702ede254..d3aa3ab27f63 100644 --- a/configs/bcm7252_wpe_ml_defconfig +++ b/configs/bcm7252_wpe_ml_defconfig @@ -69,7 +69,6 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index e6d4183dc3a0..63ee18a05748 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -77,7 +77,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/bcm7271_wpe_ml_defconfig b/configs/bcm7271_wpe_ml_defconfig index c0d03abc7e74..9a9b7d80a4f1 100644 --- a/configs/bcm7271_wpe_ml_defconfig +++ b/configs/bcm7271_wpe_ml_defconfig @@ -75,9 +75,7 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/bcm7425_wpe_ml_defconfig b/configs/bcm7425_wpe_ml_defconfig index 112a99a9536b..759dce931bc5 100644 --- a/configs/bcm7425_wpe_ml_defconfig +++ b/configs/bcm7425_wpe_ml_defconfig @@ -62,7 +62,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" diff --git a/configs/bcm7428_wpe_ml_defconfig b/configs/bcm7428_wpe_ml_defconfig index 63958f0cac01..3ec36a6d9ad4 100644 --- a/configs/bcm7428_wpe_ml_defconfig +++ b/configs/bcm7428_wpe_ml_defconfig @@ -62,7 +62,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index 40117668e3c0..266887aecc6b 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -57,7 +57,6 @@ BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y diff --git a/configs/bcm7437_wpe_ml_defconfig b/configs/bcm7437_wpe_ml_defconfig index 703824bcc56a..ff4718f89cae 100644 --- a/configs/bcm7437_wpe_ml_defconfig +++ b/configs/bcm7437_wpe_ml_defconfig @@ -68,7 +68,5 @@ BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,n BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WEBBRIDGE_PLUGIN_DIALSERVER=y BR2_PACKAGE_WEBBRIDGE_PLUGIN_WEBSERVER=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_IRNEXUS=y -BR2_PACKAGE_WEBBRIDGE_PLUGIN_IRNEXUS_MODE="16" BR2_TARGET_ROOTFS_CPIO=y BR2_TARGET_ROOTFS_CPIO_XZ=y diff --git a/configs/bcm7439_wpe_ml_defconfig b/configs/bcm7439_wpe_ml_defconfig index a51771c0f2bb..a2e5ac92c890 100644 --- a/configs/bcm7439_wpe_ml_defconfig +++ b/configs/bcm7439_wpe_ml_defconfig @@ -73,9 +73,7 @@ BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/dawn7002_wpe_defconfig b/configs/dawn7002_wpe_defconfig index 66c8e7e01426..33795d5846eb 100644 --- a/configs/dawn7002_wpe_defconfig +++ b/configs/dawn7002_wpe_defconfig @@ -65,7 +65,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://37.153.111.234" diff --git a/configs/iot-gate-rpi_wpe_ml_defconfig b/configs/iot-gate-rpi_wpe_ml_defconfig index 11f240fd6a32..bb30acc83aba 100644 --- a/configs/iot-gate-rpi_wpe_ml_defconfig +++ b/configs/iot-gate-rpi_wpe_ml_defconfig @@ -67,7 +67,6 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=t BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi0_wpe_defconfig b/configs/raspberrypi0_wpe_defconfig index 318064e8fc7d..9c8ffc16a36a 100644 --- a/configs/raspberrypi0_wpe_defconfig +++ b/configs/raspberrypi0_wpe_defconfig @@ -62,7 +62,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi0_wpe_ml_defconfig b/configs/raspberrypi0_wpe_ml_defconfig index f8da82f85df2..00ee32cd11f4 100644 --- a/configs/raspberrypi0_wpe_ml_defconfig +++ b/configs/raspberrypi0_wpe_ml_defconfig @@ -63,7 +63,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi2_wpe_defconfig b/configs/raspberrypi2_wpe_defconfig index 922b719a294e..899448060d6b 100644 --- a/configs/raspberrypi2_wpe_defconfig +++ b/configs/raspberrypi2_wpe_defconfig @@ -65,7 +65,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi2_wpe_ml_defconfig b/configs/raspberrypi2_wpe_ml_defconfig index bf116fd3d779..d3cb2f6a4dde 100644 --- a/configs/raspberrypi2_wpe_ml_defconfig +++ b/configs/raspberrypi2_wpe_ml_defconfig @@ -67,7 +67,6 @@ BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi3+_wpe_ml_defconfig b/configs/raspberrypi3+_wpe_ml_defconfig index 94aca3cb9290..b21854891fa6 100644 --- a/configs/raspberrypi3+_wpe_ml_defconfig +++ b/configs/raspberrypi3+_wpe_ml_defconfig @@ -67,7 +67,6 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=t BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi3_wpe_defconfig b/configs/raspberrypi3_wpe_defconfig index c91f82125003..00f266c662a0 100644 --- a/configs/raspberrypi3_wpe_defconfig +++ b/configs/raspberrypi3_wpe_defconfig @@ -67,7 +67,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y diff --git a/configs/raspberrypi3_wpe_ml_defconfig b/configs/raspberrypi3_wpe_ml_defconfig index 69305ed4fba6..17f6feeda09a 100644 --- a/configs/raspberrypi3_wpe_ml_defconfig +++ b/configs/raspberrypi3_wpe_ml_defconfig @@ -71,7 +71,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP="OSMCKeyMap.json" BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y @@ -83,6 +82,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y diff --git a/configs/spectrum_wpe_defconfig b/configs/spectrum_wpe_defconfig index 8f6b81c10624..2762d8d234c0 100644 --- a/configs/spectrum_wpe_defconfig +++ b/configs/spectrum_wpe_defconfig @@ -69,7 +69,6 @@ BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y -BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index c6330370cc3c..5b036a5102af 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -32,6 +32,14 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER help Include a nxserver with the compositor. +if BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER + +config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE + string "IR mode" + default "16" + help + Sets the IR Mode to be used with IR Nexus. Every remote has a different mode and key mapping. + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE string "Memory Box Mode" depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER @@ -118,6 +126,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY default 0 endif +endif config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS @@ -250,54 +259,21 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR -menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - bool "BCM Nexus IR Remote Control Unit" - default false - depends on (BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS) && BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR - help - Enable the Nexus IR remote input - -if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE - string "IR mode" - default "16" - depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS - help - Sets the IR Mode to be used with IR Nexus. Every remote has a different mode and key mapping. - -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_CODEMASK +config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK string "IR code mask" - depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS + depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR help Sets a key code mask if the device generates same code based on trigger bit endif -endif - -menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT +config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT bool "devinput (linux input system)" + depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR depends on BR2_PACKAGE_HAS_UDEV help Select devices which are annunced in the linux operating system under /dev/input/ as eventX -if BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT - -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP - string "keymap" - default "" - help - Select a keymap file - -endif - -config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP - string "keymap" - default "" - help - Select a keymap file - endif config BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 84befc41ab31..b0c6ba81a436 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 9d93a104dfc2e4c18fa4d815bdeb02d40f99359e +WPEFRAMEWORK_PLUGINS_VERSION = 930f7fbe873ea284cebc9fe0060de52d11ac5b97 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -104,26 +104,12 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_DEVINPUT=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += udev -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_DEVINPUT_KEYMAP="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT_KEYMAP))" -endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR),y) -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_IRNEXUS=ON -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_IRMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE))" -endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_CODEMASK),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_CODEMASK="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_CODEMASK))" -endif -endif +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_IR=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_CODEMASK="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK))" endif -ifneq ($(BR2_TARGET_GENERIC_HOSTNAME),"buildroot") -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_HOST="$(call qstrip,$(BR2_TARGET_GENERIC_HOSTNAME))" -endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_KEYMAP="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_KEYMAP))" endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT),y) @@ -259,6 +245,9 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=fal endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IRMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE))" +endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_BOXMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE))" endif @@ -304,9 +293,6 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_VIRTUALINPUT=ON endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IRNEXUS_MODE=${BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IRNEXUS_MODE} -endif WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_HARDWAREREADY=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY} diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index dec521f7efb2..5cd5ffdc8cd9 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 7ff4eff4c66d24845efe0ba0bcb2fbc15a61d120 +WPEFRAMEWORK_UI_VERSION = 8b17a00032760d6257b45bdecccf29285896960c WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From de8da31ebb0f83b9b7580f47268e954107b56492 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 5 Sep 2018 00:01:21 +0200 Subject: [PATCH 383/614] [arris] add mount points for usb --- board/arris/post-build.sh | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/board/arris/post-build.sh b/board/arris/post-build.sh index b3be498acdc7..a610d68a3064 100755 --- a/board/arris/post-build.sh +++ b/board/arris/post-build.sh @@ -18,3 +18,11 @@ if [ -f "${BOARD_DIR}/arris-ir-remote.json" ]; then mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/" cp -pf "${BOARD_DIR}/arris-ir-remote.json" "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/ir-remote.json" fi + +mkdir -p "${TARGET_DIR}/boot" +grep -q '^/dev/sda1' "${TARGET_DIR}/etc/fstab" || \ + echo -e '/dev/sda1 /boot vfat defaults 0 0' >> "${TARGET_DIR}/etc/fstab" + +mkdir -p "$(TARGET_DIR)/root" +grep -q '^/dev/sda2' "${TARGET_DIR}/etc/fstab" || \ + echo -e '/dev/sda2 /root ext4 defaults 0 0' >> "${TARGET_DIR}/etc/fstab" From 19fdba574d18fdc0f7dcda1607c4cdb7267d67f2 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 5 Sep 2018 00:01:43 +0200 Subject: [PATCH 384/614] [arris] move to lz4 compression for ramdisk --- configs/arrisrdk_wpe_ml_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 7d2775a79ee2..667570521046 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -23,6 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.g BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="1c8184cabe3e74c2dd746451920eb077f91ea58e" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm72604_defconfig" +BR2_LINUX_KERNEL_LZ4=y BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y From c79d11122cd7a454d2318b56c7642c44fefd8c34 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 5 Sep 2018 00:08:07 +0200 Subject: [PATCH 385/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 387766e97bd2..10061c2f7219 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 9df06fedb7eacf19a53a86551e81e36bed69a236 +WPEWEBKIT_VERSION_VALUE = f91f93370b8860a2ad4a93dac0d8a503cf525fc7 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From e3e3bd862bdebb7bfcd6acc21ec1947746f267ed Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 5 Sep 2018 11:50:50 +0200 Subject: [PATCH 386/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 1 - package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5b036a5102af..0ff197353acf 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -269,7 +269,6 @@ endif config BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT bool "devinput (linux input system)" - depends on BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR depends on BR2_PACKAGE_HAS_UDEV help Select devices which are annunced in the linux operating system under /dev/input/ as eventX diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index b0c6ba81a436..14e33a67bae4 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 930f7fbe873ea284cebc9fe0060de52d11ac5b97 +WPEFRAMEWORK_PLUGINS_VERSION = 80c922ce45dcbdafbde50216d851e04c3b016637 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 1f38f214d12a204e5d06a8671c25b56cc2c48126 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 5 Sep 2018 11:51:22 +0200 Subject: [PATCH 387/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 10061c2f7219..31b3dc009c32 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = f91f93370b8860a2ad4a93dac0d8a503cf525fc7 +WPEWEBKIT_VERSION_VALUE = ee89a40f92fd01bedcf4d9d8dd483b67363a1a69 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 35f26bb3556cf0caba89a491e302465413b1bb65 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Wed, 5 Sep 2018 11:28:46 +0000 Subject: [PATCH 388/614] gst-omx: Also adjust library paths when building from an overridden source dir --- package/gstreamer1/gst-omx/gst-omx.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/package/gstreamer1/gst-omx/gst-omx.mk b/package/gstreamer1/gst-omx/gst-omx.mk index 78c413f6c072..de4b0b7827e2 100644 --- a/package/gstreamer1/gst-omx/gst-omx.mk +++ b/package/gstreamer1/gst-omx/gst-omx.mk @@ -59,5 +59,6 @@ define GST_OMX_FIXUP_CONFIG_PATHS endef GST_OMX_POST_PATCH_HOOKS += GST_OMX_FIXUP_CONFIG_PATHS +GST_OMX_POST_RSYNC_HOOKS += GST_OMX_FIXUP_CONFIG_PATHS $(eval $(autotools-package)) From 4fa84fc15d49336a3feb7dd057c5f1a4f3c2035b Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 00:12:49 +0200 Subject: [PATCH 389/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 12 ++++++++++++ .../wpe/wpeframework-plugins/wpeframework-plugins.mk | 8 +++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 0ff197353acf..3625af200443 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -181,6 +181,11 @@ config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE string "youtube-limit" default "614400" +config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS + depends on BR2_PACKAGE_WPEFRAMEWORK_APPS + string "apps-limit" + default "614400" + config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX depends on BR2_PACKAGE_WPEFRAMEWORK_UX string "ux-limit" @@ -357,6 +362,13 @@ config BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE A wrapper around the youtube app to start it as a wpeframework plugin. +config BR2_PACKAGE_WPEFRAMEWORK_APPS + depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER + bool "apps" + help + A webkit instance for apps to start it as a + wpeframework plugin. + config BR2_PACKAGE_WPEFRAMEWORK_UX depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER bool "ux" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 14e33a67bae4..e4c5f048c445 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 80c922ce45dcbdafbde50216d851e04c3b016637 +WPEFRAMEWORK_PLUGINS_VERSION = 613326381fa25ef821c986cb0eb9e5b44b9e4ea0 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -50,6 +50,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_YOUTUBE_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE} endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS} +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX} endif @@ -165,6 +168,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_APPS=ON +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_UX=ON endif From 19c15b4c20d6577ac56d47e219b078694cd32a4e Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 13:59:56 +0200 Subject: [PATCH 390/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 8f05a6388835..0e3a286007d5 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = e7756de2c1d49db55b87322001b21a18a54851c4 +WPEFRAMEWORK_VERSION = 8bbdee3f74dc78c3d9c8be660fa4e0ebb854ca66 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From f6dfe3325898cf9ad91fa918c9acf4ff6b5ddd6e Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 14:00:22 +0200 Subject: [PATCH 391/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 24 +------------------ .../wpeframework-plugins.mk | 10 ++++---- 2 files changed, 7 insertions(+), 27 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 3625af200443..540350150448 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -194,7 +194,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX config BR2_PACKAGE_WPEFRAMEWORK_MONITOR_NETFLIX depends on BR2_PACKAGE_WPEFRAMEWORK_NETFLIX string "netflix-limit" - default "307200" + default "409600" endif @@ -227,28 +227,6 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH help A Bluetooth plugin to interact with Bluetooth devices. -if BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH - -choice - bool "Select Platform" - default BR2_PACKAGE_PLATFORM_RASPBERRY_PI - help - Choose Platform. - -menuconfig BR2_PACKAGE_PLATFORM_RASPBERRY_PI - bool "Raspberry Pi" - help - Enable Raspberry Pi Platform. - -menuconfig BR2_PACKAGE_PLATFORM_BCMXXXX - bool "BCM Platform" - help - Enable BCM Platform. - -endchoice - -endif - menuconfig BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "RemoteControl" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index e4c5f048c445..98a50d56d34d 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 613326381fa25ef821c986cb0eb9e5b44b9e4ea0 +WPEFRAMEWORK_PLUGINS_VERSION = 253a7a3c97e7c376fdba8def65079861c7ad1b30 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -93,9 +93,9 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH=ON WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_AUTOSTART=true WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_OOP=true -ifeq ($(BR2_PACKAGE_PLATFORM_RASPBERRY_PI),y) -WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD -define WPEFRAMEWORK_COMPOSITOR_POST_TARGET_INITD +ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) +WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD +define WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD mkdir -p $(TARGET_DIR)/etc/init.d $(INSTALL) -D -m 0755 package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth $(TARGET_DIR)/etc/init.d endef @@ -236,6 +236,8 @@ WPEFRAMEWORK_PLUGINS_DEPENDENCIES += bcm-refsw WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus +else ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=RPI else $(error Missing a compositor implemtation, please provide one or disable WPEFRAMEWORK_PLUGIN_COMPOSITOR) endif From ea5e634e1a5148ae05a205075101ef6dd9928ed4 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 14:01:13 +0200 Subject: [PATCH 392/614] [wpebackend-rdk] add support for compositor on rpi --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 5541ac4c19ec..1c24ec1b2950 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -28,11 +28,14 @@ endif # USE_BACKEND_WESTEROS or USE_BACKEND_BCM_RPI ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) -ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyn) +ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyy) +WPEBACKEND_RDK_DEPENDENCIES += libegl wayland westeros wpeframework-plugins +WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF +else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS),yy) WPEBACKEND_RDK_DEPENDENCIES += wayland westeros WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WESTEROS=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_WESTEROS_SINK=OFF -else ifeq ($(BR2_PACKAGE_WAYLAND)$(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yyy) -WPEBACKEND_RDK_DEPENDENCIES += libegl wayland westeros wpeframework-plugins +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),y) +WPEBACKEND_RDK_DEPENDENCIES += libegl wpeframework-plugins WPEBACKEND_RDK_FLAGS +=-DUSE_BACKEND_WPEFRAMEWORK=ON -DUSE_HOLE_PUNCH_GSTREAMER=OFF -DUSE_INPUT_LIBINPUT=OFF else WPEBACKEND_RDK_DEPENDENCIES += libegl From 820df66bcfad06f185b81478fd3f4004ffd64ef9 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 14:01:42 +0200 Subject: [PATCH 393/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 31b3dc009c32..20acad1bfa8a 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = ee89a40f92fd01bedcf4d9d8dd483b67363a1a69 +WPEWEBKIT_VERSION_VALUE = 3ed4515ac28a11e652b8c6bba9f2acff679c54e4 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From cb933ae0af19135f84f997bb5ff37f88a86fe7c1 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 14:02:07 +0200 Subject: [PATCH 394/614] [rpi-firmware] wait for maint and move console to serial --- package/rpi-firmware/S30mountroot | 28 ++++++++++++++++++++++++++++ package/rpi-firmware/cmdline.txt | 2 +- package/rpi-firmware/rpi-firmware.mk | 2 ++ 3 files changed, 31 insertions(+), 1 deletion(-) create mode 100755 package/rpi-firmware/S30mountroot diff --git a/package/rpi-firmware/S30mountroot b/package/rpi-firmware/S30mountroot new file mode 100755 index 000000000000..a1cfa4546934 --- /dev/null +++ b/package/rpi-firmware/S30mountroot @@ -0,0 +1,28 @@ +#!/bin/sh + +start() +{ + while true + do + if mount | grep /root > /dev/null; then + break; + else + mount -a && sleep 1; + fi + done +} + +case "$1" in + start) + start + ;; + stop) + ;; + restart|reload) + start + ;; + *) + echo "Usage: $0 {start|stop|restart|reload}" >&2 + exit 1 + ;; +esac diff --git a/package/rpi-firmware/cmdline.txt b/package/rpi-firmware/cmdline.txt index 445567feca8f..4c119c1e279c 100644 --- a/package/rpi-firmware/cmdline.txt +++ b/package/rpi-firmware/cmdline.txt @@ -1 +1 @@ -vt.global_cursor_default=0 root=/dev/mmcblk0p2 rootwait console=tty0,115200 quiet +vt.global_cursor_default=0 root=/dev/mmcblk0p2 rootwait console=ttyAMA0,115200 quiet diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index f76290a1801e..16431b6c9b28 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -45,6 +45,8 @@ define RPI_FIRMWARE_MOUNT_ROOT mkdir -p $(TARGET_DIR)/root grep -q '^/dev/mmcblk0p2' $(TARGET_DIR)/etc/fstab || \ echo -e '/dev/mmcblk0p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab + $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot \ + $(TARGET_DIR)/etc/init.d/S30mountroot endef endif From a4498fe6a2fc57745b366d516add42ff4e52661a Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 14:02:40 +0200 Subject: [PATCH 395/614] [netflix] bump to latest version --- package/netflix/netflix.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/netflix/netflix.mk b/package/netflix/netflix.mk index 4f03594b10f5..0ccad5d02156 100644 --- a/package/netflix/netflix.mk +++ b/package/netflix/netflix.mk @@ -4,7 +4,7 @@ # ################################################################################ -NETFLIX_VERSION = 9a3fd8196fa91ab362032e2c65e0dfc868ee41bb +NETFLIX_VERSION = f7a49c9f05660d2742481596eb23833eaeabe704 NETFLIX_SITE = git@github.com:Metrological/netflix.git NETFLIX_SITE_METHOD = git NETFLIX_LICENSE = PROPRIETARY From befbc893ecb7e9329e13e16ad4c233fc0ddeb26e Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 7 Sep 2018 16:22:14 +0200 Subject: [PATCH 396/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 98a50d56d34d..a8d2536ddfc4 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 253a7a3c97e7c376fdba8def65079861c7ad1b30 +WPEFRAMEWORK_PLUGINS_VERSION = c7c83bfb9aee121789a10915254b7020d4e683d8 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From d2e08f1c91e21ff79e795ba5a5c99d34d056e1b2 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Fri, 7 Sep 2018 13:21:39 -0700 Subject: [PATCH 397/614] [bcm7429] disable WEBKIT HTTP SRC --- configs/bcm7429_wpe_ml_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index 266887aecc6b..e36540ff2273 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -70,6 +70,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y +# BR2_PACKAGE_WPEWEBKIT_USE_GSTREAMER_WEBKIT_HTTP_SRC is not set BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From b959d301b19d89ee53577fd2f38d392d8fb33448 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 10 Sep 2018 00:01:37 +0200 Subject: [PATCH 398/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/Config.in | 16 ++++++++++++++++ .../wpeframework-plugins/wpeframework-plugins.mk | 8 +++++++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 540350150448..41a2fea87897 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -347,12 +347,28 @@ config BR2_PACKAGE_WPEFRAMEWORK_APPS A webkit instance for apps to start it as a wpeframework plugin. +if BR2_PACKAGE_WPEFRAMEWORK_APPS + +config BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART + bool "autostart" + default y + +endif + config BR2_PACKAGE_WPEFRAMEWORK_UX depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER bool "ux" help A WPEUIFramework non-compositing WebGL enabled tab. +if BR2_PACKAGE_WPEFRAMEWORK_UX + +config BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART + bool "autostart" + default y + +endif + config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER string "clientidentifier" default "" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index a8d2536ddfc4..404265b9657d 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = c7c83bfb9aee121789a10915254b7020d4e683d8 +WPEFRAMEWORK_PLUGINS_VERSION = e55bba1a554176c04f6ab33dc37c7c46d17708fd WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -170,9 +170,15 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_APPS=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_AUTOSTART=true +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_UX=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_AUTOSTART=true +endif endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY),y) From c576989dfd9db4dc3ffd93c50e457edd4a5031f7 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 10 Sep 2018 00:02:05 +0200 Subject: [PATCH 399/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 20acad1bfa8a..4f28f2f0cf26 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 3ed4515ac28a11e652b8c6bba9f2acff679c54e4 +WPEWEBKIT_VERSION_VALUE = 9450fb4c00fd0ad4d5e9f5d465c81229a24ad2b7 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 17e5d22796f15414f0b8315a180f5d2c238e92e2 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 10 Sep 2018 03:28:39 +0200 Subject: [PATCH 400/614] [wpeframework-plugins] disable autostart for ux and apps --- package/wpe/wpeframework-plugins/Config.in | 2 -- 1 file changed, 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 41a2fea87897..0810c674593e 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -351,7 +351,6 @@ if BR2_PACKAGE_WPEFRAMEWORK_APPS config BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART bool "autostart" - default y endif @@ -365,7 +364,6 @@ if BR2_PACKAGE_WPEFRAMEWORK_UX config BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART bool "autostart" - default y endif From d3d0b14a61c623bd60196e847408066493a840b3 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 01:29:50 +0200 Subject: [PATCH 401/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 0e3a286007d5..84458fbe2e24 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 8bbdee3f74dc78c3d9c8be660fa4e0ebb854ca66 +WPEFRAMEWORK_VERSION = 92e60855ddb00bd5a82bc4fdbde2c6f77b20a698 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 7aa908933f84ed511e9c9d42c768f10f2eed4147 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 01:30:15 +0200 Subject: [PATCH 402/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 404265b9657d..8303b05a73a9 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = e55bba1a554176c04f6ab33dc37c7c46d17708fd +WPEFRAMEWORK_PLUGINS_VERSION = 9f2862838c8e8a98c4743722d41fcae6b136a946 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 10330e40af584290220e988e5a60ad6ab4431bff Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 02:10:37 +0200 Subject: [PATCH 403/614] [wpeframework-plugins] add support for useragent per tab --- package/wpe/wpeframework-plugins/Config.in | 22 ++++++++++++++++--- .../wpeframework-plugins.mk | 11 +++++++++- 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 0810c674593e..2b246a6cd2ac 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -333,14 +333,22 @@ config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT bool "transparent" default false -config BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE +menuconfig BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER bool "youtube" help A wrapper around the youtube app to start it as a wpeframework plugin. -config BR2_PACKAGE_WPEFRAMEWORK_APPS +if BR2_PACKAGE_WPEFRAMEWORK_UX + +config BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT + string "useragent" + default "Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17" + +endif + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_APPS depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER bool "apps" help @@ -352,9 +360,13 @@ if BR2_PACKAGE_WPEFRAMEWORK_APPS config BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART bool "autostart" +config BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT + string "useragent" + default "" + endif -config BR2_PACKAGE_WPEFRAMEWORK_UX +menuconfig BR2_PACKAGE_WPEFRAMEWORK_UX depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER bool "ux" help @@ -365,6 +377,10 @@ if BR2_PACKAGE_WPEFRAMEWORK_UX config BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART bool "autostart" +config BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT + string "useragent" + default "" + endif config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 8303b05a73a9..3803f67eaad5 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 9f2862838c8e8a98c4743722d41fcae6b136a946 +WPEFRAMEWORK_PLUGINS_VERSION = b2b1355e3dbf7b69a778b14ec9acb05124d8e5cc WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -167,18 +167,27 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_THREADEDPA endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_YOUTUBE_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT) +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_APPS=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_AUTOSTART=true endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT) +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_UX=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_AUTOSTART=true endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT) +endif endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY),y) From a1990a67228bae45a27899a095eb3e86ccbedc60 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 02:15:59 +0200 Subject: [PATCH 404/614] [rpi] backport rpi-poe-fan --- .../raspberrypi/add-rpi-poe-fan-driver.patch | 1062 +++++++++++++++++ board/raspberrypi/rpi23-linux-4.9.config | 8 +- 2 files changed, 1065 insertions(+), 5 deletions(-) create mode 100644 board/raspberrypi/add-rpi-poe-fan-driver.patch diff --git a/board/raspberrypi/add-rpi-poe-fan-driver.patch b/board/raspberrypi/add-rpi-poe-fan-driver.patch new file mode 100644 index 000000000000..876bdd35834c --- /dev/null +++ b/board/raspberrypi/add-rpi-poe-fan-driver.patch @@ -0,0 +1,1062 @@ +From 6bad15ac01c3c454a692318fa0051354d56285be Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Mon, 9 Jul 2018 12:54:25 +0100 +Subject: [PATCH] Add rpi-poe-fan driver + +Signed-off-by: Serge Schneider +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 61 +++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + drivers/hwmon/Kconfig | 10 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/rpi-poe-fan.c | 443 ++++++++++++++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 2 + + 9 files changed, 526 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts + create mode 100644 drivers/hwmon/rpi-poe-fan.c + +diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile +index 969f407210387..bc15f26560409 100644 +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -103,6 +103,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + rpi-dac.dtbo \ + rpi-display.dtbo \ + rpi-ft5406.dtbo \ ++ rpi-poe.dtbo \ + rpi-proto.dtbo \ + rpi-sense.dtbo \ + rpi-tv.dtbo \ +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index eeb4acb2221a7..0c6afe53dbdec 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1576,6 +1576,12 @@ Params: touchscreen-size-x Touchscreen X resolution (default 800) + touchscreen-swapped-x-y Swap X and Y cordinates (default 0); + + ++Name: rpi-poe ++Info: Raspberry Pi POE HAT ++Load: dtoverlay=rpi-poe ++Params: ++ ++ + Name: rpi-proto + Info: Configures the RPi Proto audio card + Load: dtoverlay=rpi-proto +diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +new file mode 100644 +index 0000000000000..9137279bb9237 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -0,0 +1,61 @@ ++/* ++ * Overlay for the Raspberry Pi POE HAT. ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ fan0: rpi-poe-fan@0 { ++ compatible = "rpi-poe-fan"; ++ firmware = <&firmware>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <0 50 150 255>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&cpu_thermal>; ++ __overlay__ { ++ trips { ++ threshold: trip-point@0 { ++ temperature = <45000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ target: trip-point@1 { ++ temperature = <50000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ cpu_hot: cpu_hot@0 { ++ temperature = <55000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&threshold>; ++ cooling-device = <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&target>; ++ cooling-device = <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_hot>; ++ cooling-device = <&fan0 2 3>; ++ }; ++ }; ++ }; ++ }; ++}; +diff --git a/arch/arm/configs/bcm2709_defconfig b/arch/arm/configs/bcm2709_defconfig +index 4e1d7c2de5fb7..5d91978f5d191 100644 +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -658,6 +658,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m + CONFIG_SENSORS_SHTC1=m +diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig +index 56e514dd15c4a..c4915115db01e 100644 +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -651,6 +651,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m + CONFIG_SENSORS_SHTC1=m +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index d65431417b17c..95357b084b025 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1286,6 +1286,16 @@ config SENSORS_PWM_FAN + This driver can also be built as a module. If so, the module + will be called pwm-fan. + ++config SENSORS_RPI_POE_FAN ++ tristate "Raspberry Pi POE HAT fan" ++ depends on RASPBERRYPI_FIRMWARE ++ depends on THERMAL || THERMAL=n ++ help ++ If you say yes here you get support for Raspberry Pi POE HAT fan. ++ ++ This driver can also be built as a module. If so, the module ++ will be called rpi-poe-fan. ++ + config SENSORS_SHT15 + tristate "Sensiron humidity and temperature sensors. SHT15 and compat." + depends on GPIOLIB || COMPILE_TEST +diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile +index 23e195a5a2f33..d0b6351509100 100644 +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -138,6 +138,7 @@ obj-$(CONFIG_SENSORS_PC87427) += pc87427.o + obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o + obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o + obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o ++obj-$(CONFIG_SENSORS_RPI_POE_FAN) += rpi-poe-fan.o + obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o + obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o + obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +new file mode 100644 +index 0000000000000..e65cb178412b8 +--- /dev/null ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -0,0 +1,443 @@ ++/* ++ * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. ++ * ++ * Copyright (C) 2018 Raspberry Pi (Trading) Ltd. ++ * Based on pwm-fan.c by Kamil Debski ++ * ++ * Author: Serge Schneider ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_PWM 255 ++ ++#define POE_CUR_PWM 0x0 ++#define POE_DEF_PWM 0x1 ++ ++struct rpi_poe_fan_ctx { ++ struct mutex lock; ++ struct rpi_firmware *fw; ++ unsigned int pwm_value; ++ unsigned int def_pwm_value; ++ unsigned int rpi_poe_fan_state; ++ unsigned int rpi_poe_fan_max_state; ++ unsigned int *rpi_poe_fan_cooling_levels; ++ struct thermal_cooling_device *cdev; ++ struct notifier_block nb; ++}; ++ ++struct m_data_s{ ++ u32 reg; ++ u32 val; ++ u32 ret; ++}; ++ ++static int write_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ ++ struct m_data_s m_data = { ++ .reg = reg, ++ .val = *val ++ }; ++ int ret; ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_POE_HAT_VAL, ++ &m_data, sizeof(m_data)); ++ if (ret) { ++ return ret; ++ } else if (m_data.ret) { ++ return -EIO; ++ } ++ return 0; ++} ++ ++static int read_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ ++ struct m_data_s m_data = { ++ .reg = reg, ++ }; ++ int ret; ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_POE_HAT_VAL, ++ &m_data, sizeof(m_data)); ++ if (ret) { ++ return ret; ++ } else if (m_data.ret) { ++ return -EIO; ++ } ++ *val = m_data.val; ++ return 0; ++} ++ ++static int rpi_poe_reboot(struct notifier_block *nb, unsigned long code, ++ void *unused) ++{ ++ struct rpi_poe_fan_ctx *ctx = container_of(nb, struct rpi_poe_fan_ctx, ++ nb); ++ ++ if (ctx->pwm_value != ctx->def_pwm_value) ++ write_reg(ctx->fw, POE_CUR_PWM, &ctx->def_pwm_value); ++ ++ return NOTIFY_DONE; ++} ++ ++static int __set_pwm(struct rpi_poe_fan_ctx *ctx, u32 pwm) ++{ ++ int ret = 0; ++ ++ mutex_lock(&ctx->lock); ++ if (ctx->pwm_value == pwm) ++ goto exit_set_pwm_err; ++ ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &pwm); ++ if (!ret) ++ ctx->pwm_value = pwm; ++exit_set_pwm_err: ++ mutex_unlock(&ctx->lock); ++ return ret; ++} ++ ++static int __set_def_pwm(struct rpi_poe_fan_ctx *ctx, u32 def_pwm) ++{ ++ int ret = 0; ++ mutex_lock(&ctx->lock); ++ if (ctx->def_pwm_value == def_pwm) ++ goto exit_set_def_pwm_err; ++ ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &def_pwm); ++ if (!ret) ++ ctx->def_pwm_value = def_pwm; ++exit_set_def_pwm_err: ++ mutex_unlock(&ctx->lock); ++ return ret; ++} ++ ++static void rpi_poe_fan_update_state(struct rpi_poe_fan_ctx *ctx, ++ unsigned long pwm) ++{ ++ int i; ++ ++ for (i = 0; i < ctx->rpi_poe_fan_max_state; ++i) ++ if (pwm < ctx->rpi_poe_fan_cooling_levels[i + 1]) ++ break; ++ ++ ctx->rpi_poe_fan_state = i; ++} ++ ++static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ unsigned long pwm; ++ int ret; ++ ++ if (kstrtoul(buf, 10, &pwm) || pwm > MAX_PWM) ++ return -EINVAL; ++ ++ ret = __set_pwm(ctx, pwm); ++ if (ret) ++ return ret; ++ ++ rpi_poe_fan_update_state(ctx, pwm); ++ return count; ++} ++ ++static ssize_t set_def_pwm(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ unsigned long def_pwm; ++ int ret; ++ ++ if (kstrtoul(buf, 10, &def_pwm) || def_pwm > MAX_PWM) ++ return -EINVAL; ++ ++ ret = __set_def_pwm(ctx, def_pwm); ++ if (ret) ++ return ret; ++ return count; ++} ++ ++static ssize_t show_pwm(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ ++ return sprintf(buf, "%u\n", ctx->pwm_value); ++} ++ ++static ssize_t show_def_pwm(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ ++ return sprintf(buf, "%u\n", ctx->def_pwm_value); ++} ++ ++ ++static SENSOR_DEVICE_ATTR(pwm1, 0644, show_pwm, set_pwm, 0); ++static SENSOR_DEVICE_ATTR(def_pwm1, 0644, show_def_pwm, set_def_pwm, 1); ++ ++static struct attribute *rpi_poe_fan_attrs[] = { ++ &sensor_dev_attr_pwm1.dev_attr.attr, ++ &sensor_dev_attr_def_pwm1.dev_attr.attr, ++ NULL, ++}; ++ ++ATTRIBUTE_GROUPS(rpi_poe_fan); ++ ++/* thermal cooling device callbacks */ ++static int rpi_poe_fan_get_max_state(struct thermal_cooling_device *cdev, ++ unsigned long *state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ ++ if (!ctx) ++ return -EINVAL; ++ ++ *state = ctx->rpi_poe_fan_max_state; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_get_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long *state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ ++ if (!ctx) ++ return -EINVAL; ++ ++ *state = ctx->rpi_poe_fan_state; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_set_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ int ret; ++ ++ if (!ctx || (state > ctx->rpi_poe_fan_max_state)) ++ return -EINVAL; ++ ++ if (state == ctx->rpi_poe_fan_state) ++ return 0; ++ ++ ret = __set_pwm(ctx, ctx->rpi_poe_fan_cooling_levels[state]); ++ if (ret) { ++ dev_err(&cdev->device, "Cannot set pwm!\n"); ++ return ret; ++ } ++ ++ ctx->rpi_poe_fan_state = state; ++ ++ return ret; ++} ++ ++static const struct thermal_cooling_device_ops rpi_poe_fan_cooling_ops = { ++ .get_max_state = rpi_poe_fan_get_max_state, ++ .get_cur_state = rpi_poe_fan_get_cur_state, ++ .set_cur_state = rpi_poe_fan_set_cur_state, ++}; ++ ++static int rpi_poe_fan_of_get_cooling_data(struct device *dev, ++ struct rpi_poe_fan_ctx *ctx) ++{ ++ struct device_node *np = dev->of_node; ++ int num, i, ret; ++ ++ if (!of_find_property(np, "cooling-levels", NULL)) ++ return 0; ++ ++ ret = of_property_count_u32_elems(np, "cooling-levels"); ++ if (ret <= 0) { ++ dev_err(dev, "Wrong data!\n"); ++ return ret ? : -EINVAL; ++ } ++ ++ num = ret; ++ ctx->rpi_poe_fan_cooling_levels = devm_kzalloc(dev, num * sizeof(u32), ++ GFP_KERNEL); ++ if (!ctx->rpi_poe_fan_cooling_levels) ++ return -ENOMEM; ++ ++ ret = of_property_read_u32_array(np, "cooling-levels", ++ ctx->rpi_poe_fan_cooling_levels, num); ++ if (ret) { ++ dev_err(dev, "Property 'cooling-levels' cannot be read!\n"); ++ return ret; ++ } ++ ++ for (i = 0; i < num; i++) { ++ if (ctx->rpi_poe_fan_cooling_levels[i] > MAX_PWM) { ++ dev_err(dev, "PWM fan state[%d]:%d > %d\n", i, ++ ctx->rpi_poe_fan_cooling_levels[i], MAX_PWM); ++ return -EINVAL; ++ } ++ } ++ ++ ctx->rpi_poe_fan_max_state = num - 1; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_probe(struct platform_device *pdev) ++{ ++ struct thermal_cooling_device *cdev; ++ struct rpi_poe_fan_ctx *ctx; ++ struct device *hwmon; ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *fw_node; ++ int ret; ++ ++ fw_node = of_parse_phandle(np, "firmware", 0); ++ if (!fw_node) { ++ dev_err(&pdev->dev, "Missing firmware node\n"); ++ return -ENOENT; ++ } ++ ++ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); ++ if (!ctx) ++ return -ENOMEM; ++ ++ mutex_init(&ctx->lock); ++ ++ ctx->fw = rpi_firmware_get(fw_node); ++ if (!ctx->fw) ++ return -EPROBE_DEFER; ++ ++ platform_set_drvdata(pdev, ctx); ++ ++ ctx->nb.notifier_call = rpi_poe_reboot; ++ ret = register_reboot_notifier(&ctx->nb); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register reboot notifier: %i\n", ++ ret); ++ return ret; ++ } ++ ret = read_reg(ctx->fw, POE_DEF_PWM, &ctx->def_pwm_value); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to get default PWM value: %i\n", ++ ret); ++ goto err; ++ } ++ ret = read_reg(ctx->fw, POE_CUR_PWM, &ctx->pwm_value); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to get current PWM value: %i\n", ++ ret); ++ goto err; ++ } ++ ++ hwmon = devm_hwmon_device_register_with_groups(&pdev->dev, "rpipoefan", ++ ctx, rpi_poe_fan_groups); ++ if (IS_ERR(hwmon)) { ++ dev_err(&pdev->dev, "Failed to register hwmon device\n"); ++ ret = PTR_ERR(hwmon); ++ goto err; ++ } ++ ++ ret = rpi_poe_fan_of_get_cooling_data(&pdev->dev, ctx); ++ if (ret) ++ return ret; ++ ++ rpi_poe_fan_update_state(ctx, ctx->pwm_value); ++ if (!IS_ENABLED(CONFIG_THERMAL)) ++ return 0; ++ ++ cdev = thermal_of_cooling_device_register(np, ++ "rpi-poe-fan", ctx, ++ &rpi_poe_fan_cooling_ops); ++ if (IS_ERR(cdev)) { ++ dev_err(&pdev->dev, ++ "Failed to register rpi-poe-fan as cooling device"); ++ ret = PTR_ERR(cdev); ++ goto err; ++ } ++ ctx->cdev = cdev; ++ thermal_cdev_update(cdev); ++ ++ return 0; ++err: ++ unregister_reboot_notifier(&ctx->nb); ++ return ret; ++} ++ ++static int rpi_poe_fan_remove(struct platform_device *pdev) ++{ ++ struct rpi_poe_fan_ctx *ctx = platform_get_drvdata(pdev); ++ u32 value = ctx->def_pwm_value; ++ ++ unregister_reboot_notifier(&ctx->nb); ++ thermal_cooling_device_unregister(ctx->cdev); ++ if (ctx->pwm_value != value) { ++ write_reg(ctx->fw, POE_CUR_PWM, &value); ++ } ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int rpi_poe_fan_suspend(struct device *dev) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ u32 value = 0; ++ ++ if (ctx->pwm_value != value) ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); ++ return 0; ++} ++ ++static int rpi_poe_fan_resume(struct device *dev) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ u32 value = ctx->pwm_value; ++ int ret = 0; ++ ++ if (value != 0) ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); ++ ++ return ret; ++} ++#endif ++ ++static SIMPLE_DEV_PM_OPS(rpi_poe_fan_pm, rpi_poe_fan_suspend, ++ rpi_poe_fan_resume); ++ ++static const struct of_device_id of_rpi_poe_fan_match[] = { ++ { .compatible = "rpi-poe-fan", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, of_rpi_poe_fan_match); ++ ++static struct platform_driver rpi_poe_fan_driver = { ++ .probe = rpi_poe_fan_probe, ++ .remove = rpi_poe_fan_remove, ++ .driver = { ++ .name = "rpi-poe-fan", ++ .pm = &rpi_poe_fan_pm, ++ .of_match_table = of_rpi_poe_fan_match, ++ }, ++}; ++ ++module_platform_driver(rpi_poe_fan_driver); ++ ++MODULE_AUTHOR("Serge Schneider "); ++MODULE_ALIAS("platform:rpi-poe-fan"); ++MODULE_DESCRIPTION("Raspberry Pi POE HAT fan driver"); ++MODULE_LICENSE("GPL"); +diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h +index 5a77cb921cf42..8ab5501c8d292 100644 +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -93,6 +93,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043, + RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045, + RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, ++ RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, ++ RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, + + + /* Dispmanx TAGS */ +From 29d173004d1f1ab2ca89294e828a90db353cfb18 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 09:11:10 +0100 +Subject: [PATCH 1/8] rpi-poe-fan: Fix undeclared variable in + rpi_poe_fan_suspend + +closes #2665 + +Signed-off-by: Serge Schneider +--- + drivers/hwmon/rpi-poe-fan.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index e65cb178412b8..c4a48a72856b5 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -397,10 +397,11 @@ static int rpi_poe_fan_suspend(struct device *dev) + { + struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); + u32 value = 0; ++ int ret = 0; + + if (ctx->pwm_value != value) + ret = write_reg(ctx->fw, POE_CUR_PWM, &value); +- return 0; ++ return ret; + } + + static int rpi_poe_fan_resume(struct device *dev) + +From cd96cb49b406df547236c6f722a2e92f7c68f275 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 09:23:32 +0100 +Subject: [PATCH 2/8] rpi-poe-fan: Add SPDX-License-Identifier + +Signed-off-by: Serge Schneider +--- + drivers/hwmon/rpi-poe-fan.c | 11 +---------- + 1 file changed, 1 insertion(+), 10 deletions(-) + +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index c4a48a72856b5..808717921ec39 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0 + /* + * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. + * +@@ -5,16 +6,6 @@ + * Based on pwm-fan.c by Kamil Debski + * + * Author: Serge Schneider +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. + */ + + #include + +From ac05da2426038325ae4e2cc93554551d3b359e53 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 09:30:04 +0100 +Subject: [PATCH 3/8] rpi-poe-fan: Expand PoE acronym in Kconfig help + +Signed-off-by: Serge Schneider +--- + drivers/hwmon/Kconfig | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index 95357b084b025..7fcb8e846ac3c 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1291,7 +1291,8 @@ config SENSORS_RPI_POE_FAN + depends on RASPBERRYPI_FIRMWARE + depends on THERMAL || THERMAL=n + help +- If you say yes here you get support for Raspberry Pi POE HAT fan. ++ If you say yes here you get support for Raspberry Pi POE (Power over ++ Ethernet) HAT fan. + + This driver can also be built as a module. If so, the module + will be called rpi-poe-fan. + +From 90373c3d84c8a859985224ca055a4e1d22c911a4 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 09:38:41 +0100 +Subject: [PATCH 4/8] rpi-poe-fan: Give clearer error message on + of_property_count_u32_elems fail + +Signed-off-by: Serge Schneider +--- + drivers/hwmon/rpi-poe-fan.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index 808717921ec39..2a37a5cfbc1c3 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -259,7 +259,8 @@ static int rpi_poe_fan_of_get_cooling_data(struct device *dev, + + ret = of_property_count_u32_elems(np, "cooling-levels"); + if (ret <= 0) { +- dev_err(dev, "Wrong data!\n"); ++ dev_err(dev, "cooling-levels property missing or invalid: %d\n", ++ ret); + return ret ? : -EINVAL; + } + + +From 542203dc6cf188443b253258ff75102f5e7eea72 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 10:10:41 +0100 +Subject: [PATCH 5/8] rpi-poe-fan: Add documentation + +Signed-off-by: Serge Schneider +--- + .../devicetree/bindings/hwmon/rpi-poe-fan.txt | 55 +++++++++++++++++++ + Documentation/hwmon/rpi-poe-fan | 15 +++++ + 2 files changed, 70 insertions(+) + create mode 100644 Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt + create mode 100644 Documentation/hwmon/rpi-poe-fan + +diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +new file mode 100644 +index 0000000000000..6f4b2de7fcb1a +--- /dev/null ++++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +@@ -0,0 +1,55 @@ ++Bindings for the Raspberry Pi POE HAT fan ++ ++Required properties: ++- compatible : "rpi-poe-fan" ++- firmware : Reference to the RPi firmware device node ++- pwms : the PWM that is used to control the PWM fan ++- cooling-levels : PWM duty cycle values in a range from 0 to 255 ++ which correspond to thermal cooling states ++ ++Example: ++ fan0: rpi-poe-fan@0 { ++ compatible = "rpi-poe-fan"; ++ firmware = <&firmware>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <0 50 150 255>; ++ status = "okay"; ++ }; ++ ++ thermal-zones { ++ cpu_thermal: cpu-thermal { ++ trips { ++ threshold: trip-point@0 { ++ temperature = <45000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ target: trip-point@1 { ++ temperature = <50000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ cpu_hot: cpu_hot@0 { ++ temperature = <55000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&threshold>; ++ cooling-device = <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&target>; ++ cooling-device = <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_hot>; ++ cooling-device = <&fan0 2 3>; ++ }; ++ }; ++ }; ++ }; +diff --git a/Documentation/hwmon/rpi-poe-fan b/Documentation/hwmon/rpi-poe-fan +new file mode 100644 +index 0000000000000..2dcacaef9e681 +--- /dev/null ++++ b/Documentation/hwmon/rpi-poe-fan +@@ -0,0 +1,15 @@ ++Kernel driver rpi-poe-fan ++===================== ++ ++This driver enables the use of the Raspberry Pi POE HAT fan. ++ ++Author: Serge Schneider ++ ++Description ++----------- ++ ++The driver implements a simple interface for driving the Raspberry Pi POE ++(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry pi ++firmware through the mailbox property interface. The firmware then forwards ++the commands to the board over I2C on the ID_EEPROM pins. The driver exposes ++the fan to the user space through the hwmon's sysfs interface. + +From 108dbb80e1353a74448116eb62a6eab226e6c50c Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 09:43:04 +0100 +Subject: [PATCH 6/8] rpi-poe-fan: Add vendor to of_device_id compatible + string. + +Signed-off-by: Serge Schneider +--- + Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt | 4 ++-- + arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 2 +- + drivers/hwmon/rpi-poe-fan.c | 2 +- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +index 6f4b2de7fcb1a..51c28498d58a5 100644 +--- a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt ++++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +@@ -1,7 +1,7 @@ + Bindings for the Raspberry Pi POE HAT fan + + Required properties: +-- compatible : "rpi-poe-fan" ++- compatible : "raspberrypi,rpi-poe-fan" + - firmware : Reference to the RPi firmware device node + - pwms : the PWM that is used to control the PWM fan + - cooling-levels : PWM duty cycle values in a range from 0 to 255 +@@ -9,7 +9,7 @@ Required properties: + + Example: + fan0: rpi-poe-fan@0 { +- compatible = "rpi-poe-fan"; ++ compatible = "raspberrypi,rpi-poe-fan"; + firmware = <&firmware>; + cooling-min-state = <0>; + cooling-max-state = <3>; +diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +index 9137279bb9237..0a32fff036a7c 100644 +--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -11,7 +11,7 @@ + target-path = "/"; + __overlay__ { + fan0: rpi-poe-fan@0 { +- compatible = "rpi-poe-fan"; ++ compatible = "raspberrypi,rpi-poe-fan"; + firmware = <&firmware>; + cooling-min-state = <0>; + cooling-max-state = <3>; +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index 2a37a5cfbc1c3..e3a7708a3751e 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -413,7 +413,7 @@ static SIMPLE_DEV_PM_OPS(rpi_poe_fan_pm, rpi_poe_fan_suspend, + rpi_poe_fan_resume); + + static const struct of_device_id of_rpi_poe_fan_match[] = { +- { .compatible = "rpi-poe-fan", }, ++ { .compatible = "raspberrypi,rpi-poe-fan", }, + {}, + }; + MODULE_DEVICE_TABLE(of, of_rpi_poe_fan_match); + +From 9f6b06cede4d8d1d6d4228ca8c8ba399c1e2a7fd Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 28 Aug 2018 10:38:02 +0100 +Subject: [PATCH 7/8] rpi-poe-fan: Rename m_data_s struct to fw_data_s + +Signed-off-by: Serge Schneider +--- + drivers/hwmon/rpi-poe-fan.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index e3a7708a3751e..b1baeecc73132 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -37,41 +37,41 @@ struct rpi_poe_fan_ctx { + struct notifier_block nb; + }; + +-struct m_data_s{ ++struct fw_tag_data_s{ + u32 reg; + u32 val; + u32 ret; + }; + + static int write_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ +- struct m_data_s m_data = { ++ struct fw_tag_data_s fw_tag_data = { + .reg = reg, + .val = *val + }; + int ret; + ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_POE_HAT_VAL, +- &m_data, sizeof(m_data)); ++ &fw_tag_data, sizeof(fw_tag_data)); + if (ret) { + return ret; +- } else if (m_data.ret) { ++ } else if (fw_tag_data.ret) { + return -EIO; + } + return 0; + } + + static int read_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ +- struct m_data_s m_data = { ++ struct fw_tag_data_s fw_tag_data = { + .reg = reg, + }; + int ret; + ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_POE_HAT_VAL, +- &m_data, sizeof(m_data)); ++ &fw_tag_data, sizeof(fw_tag_data)); + if (ret) { + return ret; +- } else if (m_data.ret) { ++ } else if (fw_tag_data.ret) { + return -EIO; + } +- *val = m_data.val; ++ *val = fw_tag_data.val; + return 0; + } + + +From e4094a632994812c0bc3e184158b43f02edbc501 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Wed, 29 Aug 2018 14:54:52 +0100 +Subject: [PATCH 8/8] rpi-poe-fan: Fix typos + +Signed-off-by: Serge Schneider +--- + Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt | 2 +- + Documentation/hwmon/rpi-poe-fan | 8 ++++---- + drivers/hwmon/Kconfig | 4 ++-- + drivers/hwmon/rpi-poe-fan.c | 4 ++-- + 4 files changed, 9 insertions(+), 9 deletions(-) + +diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +index 51c28498d58a5..c71f8569a4dc9 100644 +--- a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt ++++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +@@ -1,4 +1,4 @@ +-Bindings for the Raspberry Pi POE HAT fan ++Bindings for the Raspberry Pi PoE HAT fan + + Required properties: + - compatible : "raspberrypi,rpi-poe-fan" +diff --git a/Documentation/hwmon/rpi-poe-fan b/Documentation/hwmon/rpi-poe-fan +index 2dcacaef9e681..9182ab6339933 100644 +--- a/Documentation/hwmon/rpi-poe-fan ++++ b/Documentation/hwmon/rpi-poe-fan +@@ -1,15 +1,15 @@ + Kernel driver rpi-poe-fan + ===================== + +-This driver enables the use of the Raspberry Pi POE HAT fan. ++This driver enables the use of the Raspberry Pi PoE HAT fan. + + Author: Serge Schneider + + Description + ----------- + +-The driver implements a simple interface for driving the Raspberry Pi POE +-(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry pi ++The driver implements a simple interface for driving the Raspberry Pi PoE ++(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry Pi + firmware through the mailbox property interface. The firmware then forwards + the commands to the board over I2C on the ID_EEPROM pins. The driver exposes +-the fan to the user space through the hwmon's sysfs interface. ++the fan to the user space through the hwmon sysfs interface. +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index 7fcb8e846ac3c..af4ccd8a88e04 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1287,11 +1287,11 @@ config SENSORS_PWM_FAN + will be called pwm-fan. + + config SENSORS_RPI_POE_FAN +- tristate "Raspberry Pi POE HAT fan" ++ tristate "Raspberry Pi PoE HAT fan" + depends on RASPBERRYPI_FIRMWARE + depends on THERMAL || THERMAL=n + help +- If you say yes here you get support for Raspberry Pi POE (Power over ++ If you say yes here you get support for Raspberry Pi PoE (Power over + Ethernet) HAT fan. + + This driver can also be built as a module. If so, the module +diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c +index b1baeecc73132..3effaf2eb86db 100644 +--- a/drivers/hwmon/rpi-poe-fan.c ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. ++ * rpi-poe-fan.c - Hwmon driver for Raspberry Pi PoE HAT fan. + * + * Copyright (C) 2018 Raspberry Pi (Trading) Ltd. + * Based on pwm-fan.c by Kamil Debski +@@ -432,5 +432,5 @@ module_platform_driver(rpi_poe_fan_driver); + + MODULE_AUTHOR("Serge Schneider "); + MODULE_ALIAS("platform:rpi-poe-fan"); +-MODULE_DESCRIPTION("Raspberry Pi POE HAT fan driver"); ++MODULE_DESCRIPTION("Raspberry Pi PoE HAT fan driver"); + MODULE_LICENSE("GPL"); + diff --git a/board/raspberrypi/rpi23-linux-4.9.config b/board/raspberrypi/rpi23-linux-4.9.config index 3655f05a3a01..33a8d9cb73dc 100644 --- a/board/raspberrypi/rpi23-linux-4.9.config +++ b/board/raspberrypi/rpi23-linux-4.9.config @@ -61,7 +61,6 @@ CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_VLAN_8021Q=y CONFIG_BT=y -CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=y @@ -161,10 +160,7 @@ CONFIG_TOUCHSCREEN_ADS7846=m CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set -CONFIG_HIDRAW=y -CONFIG_UHID=y CONFIG_BRCM_CHAR_DRIVERS=y -CONFIG_BCM_VC_CMA=y CONFIG_BCM_VCIO=y CONFIG_BCM_VC_SM=y # CONFIG_BCM2835_DEVGPIOMEM is not set @@ -186,7 +182,7 @@ CONFIG_GPIO_SYSFS=y CONFIG_W1=m CONFIG_W1_MASTER_GPIO=m CONFIG_W1_SLAVE_THERM=m -# CONFIG_HWMON is not set +CONFIG_SENSORS_RPI_POE_FAN=y CONFIG_THERMAL=y CONFIG_THERMAL_BCM2835=y CONFIG_WATCHDOG=y @@ -212,6 +208,8 @@ CONFIG_SND=y # CONFIG_SND_VERBOSE_PROCFS is not set CONFIG_SND_BCM2835=y # CONFIG_SND_SPI is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y CONFIG_HID_MULTITOUCH=y CONFIG_USB=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y From 347457114ba33b8ee19bb102469c8c5394bf1bd4 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 02:17:10 +0200 Subject: [PATCH 405/614] [rpi3] ibc defconfig --- configs/raspberrypi3_wpe_ibc_defconfig | 98 ++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 configs/raspberrypi3_wpe_ibc_defconfig diff --git a/configs/raspberrypi3_wpe_ibc_defconfig b/configs/raspberrypi3_wpe_ibc_defconfig new file mode 100644 index 000000000000..76ce15dc925d --- /dev/null +++ b/configs/raspberrypi3_wpe_ibc_defconfig @@ -0,0 +1,98 @@ +BR2_arm=y +BR2_cortex_a7=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_TARGET_GENERIC_GETTY_PORT="ttyAMA0" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --tvmode-720 --overclock-pi3 --silent" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="be97febf4aa42b1d019ad24e7948739da8557f66" +BR2_LINUX_KERNEL_PATCH="board/raspberrypi/add-rpi-poe-fan-driver.patch" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_ALSA=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_GST_OMX=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_RPI_FIRMWARE=y +# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:200m,webprocess:400m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_APPS=y +BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Blank" +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEWEBKIT=y +# BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set +# BR2_PACKAGE_WPEWEBKIT_USE_GSTREAMER_WEBKIT_HTTP_SRC is not set +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_TARGET_ROOTFS_INITRAMFS=y +# BR2_TARGET_ROOTFS_TAR is not set From b788b9f5f4eb3f50aadc638ea1be191c21cf426b Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 02:20:32 +0200 Subject: [PATCH 406/614] [arris] update defconfig --- configs/arrisrdk_wpe_ml_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 667570521046..33d25d2be7be 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -80,7 +80,7 @@ BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:200m,webprocess:400m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y @@ -88,6 +88,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEWEBKIT=y # BR2_PACKAGE_WPEWEBKIT_USE_ENCRYPTED_MEDIA is not set +# BR2_PACKAGE_WPEWEBKIT_USE_GSTREAMER_WEBKIT_HTTP_SRC is not set BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y From 75acea31c9221c65263850611502f45bec4ccce9 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Mon, 10 Sep 2018 19:42:47 -0700 Subject: [PATCH 407/614] [bcm7429] enable id3demux --- configs/bcm7429_wpe_ml_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index e36540ff2273..b8363dfc8315 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -31,6 +31,7 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y From f8dd1192f3762576e0c7166f5de1f1294bc28867 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 10:49:04 +0200 Subject: [PATCH 408/614] [vss-sdk] Remove hardcoded output path --- package/vss-sdk/vss-sdk.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index ee453513f35f..da1275b8ddd6 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -21,8 +21,8 @@ BUILDROOT_FLAGS = .stamp_downloaded \ define VSS_EXCLUDE_PACKAGE $(info "Excluding ${${1}_NAME}-${${1}_VERSION} from build, provided by SDK") - rm -rf $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION} - ln -sf $(@D)/br_flags $(TOPDIR)/output/build/${${1}_NAME}-${${1}_VERSION} + rm -rf $(BASE_DIR)/build/${${1}_NAME}-${${1}_VERSION} + ln -sf $(@D)/br_flags $(BASE_DIR)/build/${${1}_NAME}-${${1}_VERSION} endef define VSS_WRITE_FLAGS From fce2da2f91a0b1872e2c9dc7d5ec7827c258c65e Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 11:29:14 +0200 Subject: [PATCH 409/614] [wpeframework-plugins] Add VGDRM PlayReady option --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 3803f67eaad5..325945c51312 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -83,6 +83,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_NEXUS=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-playready-nexus endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_VGDRM=ON +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-playready-vgdrm +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_WIDEVINE=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-widevine From 0f1af153c2ed0950c0a8d9971dc9b9c5d5492734 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 11:58:01 +0200 Subject: [PATCH 410/614] [greenpeak] Add support specific support for ZD4500ZNO platform --- package/greenpeak/Config.in | 13 +++++++----- package/greenpeak/greenpeak.mk | 36 ++++++++++++++++++++++++++++++---- 2 files changed, 40 insertions(+), 9 deletions(-) diff --git a/package/greenpeak/Config.in b/package/greenpeak/Config.in index 0463d26ced29..5fd77f3d291b 100644 --- a/package/greenpeak/Config.in +++ b/package/greenpeak/Config.in @@ -13,11 +13,11 @@ config BR2_PACKAGE_GREENPEAK_KERNEL_MODULE config BR2_PACKAGE_GREENPEAK_LIB bool "userland library" help - Build a Rf4ce library for use by appplications working with - the greenpeak chip in stead of building an application that - reads keys from an Rf4ce remote and ingest them into the + Build a Rf4ce library for use by appplications working with + the greenpeak chip in stead of building an application that + reads keys from an Rf4ce remote and ingest them into the linux input system. - + config BR2_PACKAGE_GREENPEAK_DEVICE_NODE_PATH string "device node" default /dev/gpK5 if BR2_PACKAGE_GREENPEAK_GP501 || BR2_PACKAGE_GREENPEAK_GP510 || BR2_PACKAGE_GREENPEAK_GP711 @@ -46,6 +46,9 @@ choice config BR2_PACKAGE_GREENPEAK_GP712 bool "GP712" + config BR2_PACKAGE_GREENPEAK_ZD4500ZNO + bool "ZD4500ZNO" + endchoice config BR2_PACKAGE_GREENPEAK_TYPE @@ -55,5 +58,5 @@ config BR2_PACKAGE_GREENPEAK_TYPE default GP510 if BR2_PACKAGE_GREENPEAK_GP510 default GP711 if BR2_PACKAGE_GREENPEAK_GP711 default GP712 if BR2_PACKAGE_GREENPEAK_GP712 - + default ZD4500ZNO if BR2_PACKAGE_GREENPEAK_ZD4500ZNO endif diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index d2069db915a4..0eebbac8f6f0 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -23,6 +23,9 @@ ifneq (,$(findstring $(GREENPEAK_CHIP), GP501 GP510 GP711)) GREENPEAK_CHIP_REPO = gp501 else ifneq (,$(findstring $(GREENPEAK_CHIP), GP502 GP712)) GREENPEAK_CHIP_REPO = gp712 +else ifneq (,$(findstring $(GREENPEAK_CHIP), ZD4500ZNO)) + GREENPEAK_CHIP_REPO = zd4500zno + GREENPEAK_CHIP = GP501 else $(error "Chip ${GREENPEAK_CHIP} is not supported.") endif @@ -32,9 +35,28 @@ GREENPEAK_VERSION = ${GREENPEAK_CHIP_REPO}_${GREENPEAK_PLATFORM}_${ARCH}_${GREEN ifeq ($(BR2_PACKAGE_GREENPEAK_KERNEL_MODULE),y) GREENPEAK_EXTRA_MOD_CFLAGS = \ - -D$(GREENPEAK_CHIP) -I$(STAGING_DIR)/usr/include -I$(STAGING_DIR)/usr/include/linux -I$(STAGING_DIR)/usr/include/refsw \ - + -D$(GREENPEAK_CHIP) \ + -I$(STAGING_DIR)/usr/include \ + -I$(STAGING_DIR)/usr/include/linux \ + -nodefaultlibs \ + -Wno-unused-variable \ + -Wno-incompatible-pointer-types + +ifneq (,$(findstring $(GREENPEAK_CHIP), ZD4500ZNO)) +GREENPEAK_EXTRA_MOD_CFLAGS += \ + -I$(STAGING_DIR)/usr/include/refsw/ \ + -I$(STAGING_DIR)/usr/include/refsw/linuxkernel/include/ \ + -DGP_USE_NEXUS_SPI \ + -I${@D}/Driver/BCM97358Ref \ + +define GREENPEAK_PREPARE_MODULE + $(INSTALL) -m 644 -D $(STAGING_DIR)/usr/include/refsw/linuxkernel/Module.symvers ${@D}/Driver/ + $(INSTALL) -m 775 -D $(STAGING_DIR)/usr/include/refsw/linuxkernel/libnexus_driver.a ${@D}/Driver/ +endef +endif + define GREENPEAK_BUILD_MODULE + $(GREENPEAK_PREPARE_MODULE) $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) GP_CHIP=$(GREENPEAK_CHIP) EXTRA_CFLAGS="$(GREENPEAK_EXTRA_MOD_CFLAGS)" M=$(@D)/Driver modules endef @@ -51,13 +73,19 @@ GREENPEAK_EXTRA_CFLAGS = \ -fPIC \ -ffreestanding \ -DGP_NVM_PATH=/root/gp \ - -DGP_NVM_FILENAME=/root/gp/gpNvm.dat + -DGP_NVM_FILENAME=/root/gp/gpNvm.dat \ -DGP_DEVICE_PATH=${BR2_PACKAGE_GREENPEAK_DEVICE_NODE_PATH} +GREENPEAK_OPTIONS = \ + TOOLCHAINBIN="$(HOST_DIR)/usr/bin" \ + TOOLCHAIN="$(HOST_DIR)/usr" \ + CROSS_COMPILE="$(GNU_TARGET_NAME)-" \ + CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" + define GREENPEAK_BUILD_LIB $(info "Building RF4CE lib") $(MAKE1) -C $(@D)/Stack clean - COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) TOOLCHAIN="$(HOST_DIR)/usr" CROSS_COMPILE="$(GNU_TARGET_NAME)-" CFLAGS_COMPILER="$(TARGET_CFLAGS) $(GREENPEAK_EXTRA_CFLAGS)" -C $(@D)/Stack archive + COMPILER=buildroot $(TARGET_MAKE_ENV) $(MAKE1) ${GREENPEAK_OPTIONS} -C $(@D)/Stack archive endef define GREENPEAK_INSTALL_LIB_DEV From 25b89ae2f2a5f4dc78ca80c8206da97bff76e1cd Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 12:26:48 +0200 Subject: [PATCH 411/614] [bcm-refsw] add option to generate/install kernelspace headers --- package/bcm-refsw/Config.in | 5 +++++ package/bcm-refsw/bcm-refsw.mk | 1 + package/bcm-refsw/nexus.inc | 28 ++++++++++++++++++++++++++++ 3 files changed, 34 insertions(+) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 27550208d623..19d149475e9a 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -181,4 +181,9 @@ config BR2_PACKAGE_BCM_REFSW_BOXMODE help Memory box mode, you can find details from release notes per platform +config BR2_PACKAGE_BCM_REFSW_KERNELSPACE_HEADERS + bool "Kernelspace headers" + default n + help + Installs kernelspace nexus headers used to build some kernelmodules like greenpeak. endif diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index baef9c2e01a0..69663900a4e9 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -149,6 +149,7 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_SAGE_SRAI) $(BCM_REFSW_BUILD_WAYLAND_EGL) $(BCM_REFSW_BUILD_NEXUS_LIBB_OS) + $(BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS) endef define BCM_REFSW_INSTALL_STAGING_CMDS diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index 41732ad9c058..c9eee5d0bf82 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -135,3 +135,31 @@ define BCM_REFSW_INSTALL_NEXUS_LIBB_OS_DEV $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS,$(STAGING_DIR)) cp -a $(@D)/nexus/lib/os/include/* $(1)/usr/include/refsw/os endef + +ifeq ($(BR2_PACKAGE_BCM_REFSW_KERNELSPACE_HEADERS),y) +define BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS + $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/include/refsw/linuxkernel + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + NEXUS_BIN_DIR=$(STAGING_DIR)/usr/include/refsw/linuxkernel \ + B_REFSW_ARCH=$(ARCH)-linux \ + PLATFORM=${BCM_REFSW_PLATFORM} \ + NEXUS_PLATFORM=${BCM_REFSW_PLATFORM} \ + BCHP_CHIP=${BCM_REFSW_BCHP_CHIP} \ + BCHP_VER=${BCM_REFSW_PLATFORM_REV} \ + BCHP_VER_LC=${BCM_REFSW_BCHP_VER_LOWER} \ + BCHP_KERNEL_VER=${BCM_REFSW_BCHP_CHIP}${BCM_REFSW_BCHP_VER_LOWER} \ + BCHP_DEFCONFIG=bcm${BCM_REFSW_BCHP_CHIP}${BCM_REFSW_BCHP_VER_LOWER} \ + BCM_CONFIG=${BCM_REFSW_BCHP_CHIP}${BCM_REFSW_BCHP_VER_LOWER} \ + B_REFSW_CROSS_COMPILE=${TARGET_CROSS} \ + OS=linuxkernel \ + MODE=linuxkernel \ + B_REFSW_OS=linuxkernel \ + $(MAKE) -C $(@D)/nexus/build nexus_headers \ + $(BCM_REFSW_BUILD_ADDITIONS) + + $(INSTALL) -m 644 -D $(BCM_REFSW_BIN)/../core/linuxkernel.$(ARCH)-linux.driver/Module.symvers $(STAGING_DIR)/usr/include/refsw/linuxkernel + $(INSTALL) -m 755 -D $(BCM_REFSW_BIN)/../core/linuxkernel.$(ARCH)-linux.driver/libnexus_driver.a $(STAGING_DIR)/usr/include/refsw/linuxkernel +endef +endif From 82506a636e89c01ac500961eaec284f8fc59b1d4 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 12:28:24 +0200 Subject: [PATCH 412/614] [wpeframework-cdmi-playready-vgrdm] Bump version --- .../wpeframework-cdmi-playready-vgrdm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk index 6395bd7c5081..731b49153e7d 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = c3f909f717a2125f531a691329d91dbacd86ff6b +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = 4d2c73832fc505fa0ba5ef7734119873576837e6 WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-VGDRM.git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_INSTALL_STAGING = YES From b5b1b2b9f401cf6e7bd611db1b09f151d3e0be9a Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 12:48:03 +0200 Subject: [PATCH 413/614] [libsoup] Added conditional patch for vss platform --- ...0003-soup-cookie-jar-add-symbol.patch.conditional | 12 ++++++++++++ package/libsoup/libsoup.mk | 8 ++++++++ 2 files changed, 20 insertions(+) create mode 100644 package/libsoup/0003-soup-cookie-jar-add-symbol.patch.conditional diff --git a/package/libsoup/0003-soup-cookie-jar-add-symbol.patch.conditional b/package/libsoup/0003-soup-cookie-jar-add-symbol.patch.conditional new file mode 100644 index 000000000000..6bd02fea655d --- /dev/null +++ b/package/libsoup/0003-soup-cookie-jar-add-symbol.patch.conditional @@ -0,0 +1,12 @@ +diff --git a/libsoup/libsoup-2.4.sym b/libsoup/libsoup-2.4.sym +index e6ff89e..d3682ca 100644 +--- a/libsoup/libsoup-2.4.sym ++++ b/libsoup/libsoup-2.4.sym +@@ -153,6 +153,7 @@ soup_cookie_jar_save + soup_cookie_jar_set_accept_policy + soup_cookie_jar_set_cookie + soup_cookie_jar_set_cookie_with_first_party ++soup_cookie_jar_set_limit + soup_cookie_jar_text_get_type + soup_cookie_jar_text_new + soup_cookie_new diff --git a/package/libsoup/libsoup.mk b/package/libsoup/libsoup.mk index 6dd917201ff7..aa60efc71a83 100644 --- a/package/libsoup/libsoup.mk +++ b/package/libsoup/libsoup.mk @@ -33,4 +33,12 @@ else LIBSOUP_CONF_OPTS += --disable-tls-check endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +LIBSOUP_PKGDIR = "$(TOP_DIR)/package/libsoup" +define LIBSOUP_APPLY_LOCAL_PATCHES + $(APPLY_PATCHES) $(@D) "$(LIBSOUP_PKGDIR)" 0003-soup-cookie-jar-add-symbol.patch.conditional +endef +LIBSOUP_POST_PATCH_HOOKS += LIBSOUP_APPLY_LOCAL_PATCHES +endif + $(eval $(autotools-package)) From c41f2b5ac31bc74a9555537c7dae2495d2749533 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 12:49:59 +0200 Subject: [PATCH 414/614] [configs] added vgdrm to vss config --- configs/vss_wpe_ml_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index a07677835e98..0ecc2a62bc28 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -47,6 +47,7 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_MEMSTAT=y BR2_PACKAGE_STRACE=y BR2_PACKAGE_NINJA=y +BR2_PACKAGE_VGDRM=y BR2_PACKAGE_BITSTREAM_VERA=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_VSS_SDK=y @@ -60,8 +61,6 @@ BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/flash/persistent" BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/home/metrological/usr/share/WPEFramework" BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/home/metrological/usr/lib/wpeframework/plugins" BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/home/metrological/usr/lib/wpeframework/proxystubs" -BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y -BR2_PACKAGE_WPEFRAMEWORK_VERBOSE_BUILD=y BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y BR2_PACKAGE_WPEFRAMEWORK_EGLTEST=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y From 903a82ee496b718c5b350902929296209ac77697 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 11 Sep 2018 13:10:18 +0200 Subject: [PATCH 415/614] [vss] Added missing files for coping --- board/bcm/vss.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt index 336420a68af9..9c7f084eb3a2 100644 --- a/board/bcm/vss.txt +++ b/board/bcm/vss.txt @@ -1,7 +1,8 @@ -WPEDatabaseProcess WPEFramework WPENetworkProcess WPEProcess +WPEStorageProcess +WPEWebDriver WPEWebProcess gst-inspect-1.0 gst-launch-1.0 From 2f30d366ffbdc45e15d30543b24720c5d25c5d1d Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:05:08 +0200 Subject: [PATCH 416/614] [rpi] support for dts --- linux/Config.in | 7 +++++++ linux/linux.mk | 11 +++++++++++ package/rpi-firmware/Config.in | 5 +++-- 3 files changed, 21 insertions(+), 2 deletions(-) diff --git a/linux/Config.in b/linux/Config.in index 6a45f06fef60..8bcd17612b43 100644 --- a/linux/Config.in +++ b/linux/Config.in @@ -383,6 +383,13 @@ config BR2_LINUX_KERNEL_CUSTOM_DTS_PATH endif +config BR2_LINUX_KERNEL_DTS_OVERLAYS_SUPPORT + bool "Build Device Tree Overlays" + depends on BR2_LINUX_KERNEL_DTS_SUPPORT + help + Build in-tree device tree overlays. + Currently supports Raspberry Pi kernels. + config BR2_LINUX_KERNEL_INSTALL_TARGET bool "Install kernel image to /boot in target" depends on !BR2_TARGET_ROOTFS_INITRAMFS diff --git a/linux/linux.mk b/linux/linux.mk index 7f4432e7b16b..6a75e1e40ba5 100644 --- a/linux/linux.mk +++ b/linux/linux.mk @@ -311,6 +311,13 @@ endif # BR2_LINUX_KERNEL_APPENDED_DTB endif # BR2_LINUX_KERNEL_DTB_IS_SELF_BUILT endif # BR2_LINUX_KERNEL_DTS_SUPPORT +ifeq ($(BR2_LINUX_KERNEL_DTS_OVERLAYS_SUPPORT),y) +define LINUX_INSTALL_DTB_OVERLAYS + mkdir -p $(1) + cp $(KERNEL_ARCH_PATH)/boot/dts/overlays/*.dtbo $(1) +endef +endif # BR2_LINUX_KERNEL_DTS_OVERLAYS + ifeq ($(BR2_LINUX_KERNEL_APPENDED_DTB),y) # dtbs moved from arch/$ARCH/boot to arch/$ARCH/boot/dts since 3.8-rc1 define LINUX_APPEND_DTB @@ -350,6 +357,9 @@ define LINUX_BUILD_CMDS @if grep -q "CONFIG_MODULES=y" $(@D)/.config; then \ $(LINUX_MAKE_ENV) $(MAKE) $(LINUX_MAKE_FLAGS) -C $(@D) modules ; \ fi + $(if $(BR2_LINUX_KERNEL_DTS_OVERLAYS_SUPPORT), + $(LINUX_MAKE_ENV) $(MAKE) $(LINUX_MAKE_FLAGS) -C $(@D) dtbs ; \ + ) $(LINUX_BUILD_DTB) $(LINUX_APPEND_DTB) endef @@ -390,6 +400,7 @@ endef define LINUX_INSTALL_IMAGES_CMDS $(call LINUX_INSTALL_IMAGE,$(BINARIES_DIR)) $(call LINUX_INSTALL_DTB,$(BINARIES_DIR)) + $(call LINUX_INSTALL_DTB_OVERLAYS,$(BINARIES_DIR)/overlays) endef ifeq ($(BR2_STRIP_strip),y) diff --git a/package/rpi-firmware/Config.in b/package/rpi-firmware/Config.in index 7b37a3072bff..ccfbd90ba4d8 100644 --- a/package/rpi-firmware/Config.in +++ b/package/rpi-firmware/Config.in @@ -58,8 +58,9 @@ config BR2_PACKAGE_RPI_FIRMWARE_INSTALL_DTBS config BR2_PACKAGE_RPI_FIRMWARE_INSTALL_DTB_OVERLAYS bool "Install DTB overlays" - depends on BR2_PACKAGE_RPI_FIRMWARE_INSTALL_DTBS \ - || BR2_LINUX_KERNEL_DTS_SUPPORT + depends on (BR2_PACKAGE_RPI_FIRMWARE_INSTALL_DTBS \ + || BR2_LINUX_KERNEL_DTS_SUPPORT) && \ + !BR2_LINUX_KERNEL_DTS_OVERLAYS_SUPPORT default y help Say 'y' here if you need to load one or more of the DTB overlays, From ebc0859f4acd0404f05f1706a2a30c4f515bec20 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:06:01 +0200 Subject: [PATCH 417/614] [linux] add support for kernels till 4.14 --- package/linux-headers/Config.in.host | 32 ++++++++++++++++++++++++++++ toolchain/toolchain-common.in | 20 +++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/package/linux-headers/Config.in.host b/package/linux-headers/Config.in.host index 48f9ce5d6d9b..ea898531fafb 100644 --- a/package/linux-headers/Config.in.host +++ b/package/linux-headers/Config.in.host @@ -62,6 +62,22 @@ choice bool "Linux 4.10.x kernel headers" select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_10 + config BR2_KERNEL_HEADERS_4_11 + bool "Linux 4.11.x kernel headers" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_11 + + config BR2_KERNEL_HEADERS_4_12 + bool "Linux 4.12.x kernel headers" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_12 + + config BR2_KERNEL_HEADERS_4_13 + bool "Linux 4.13.x kernel headers" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_13 + + config BR2_KERNEL_HEADERS_4_14 + bool "Linux 4.14.x kernel headers" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14 + config BR2_KERNEL_HEADERS_VERSION bool "Manually specified Linux version" endchoice @@ -82,6 +98,22 @@ choice This is used to hide/show some packages that have strict requirements on the version of kernel headers. +config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14 + bool "4.14.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14 + +config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_13 + bool "4.13.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_13 + +config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_12 + bool "4.12.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_12 + +config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_11 + bool "4.11.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_11 + config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_10 bool "4.10.x" select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_10 diff --git a/toolchain/toolchain-common.in b/toolchain/toolchain-common.in index 379006d02431..c6b4725f298f 100644 --- a/toolchain/toolchain-common.in +++ b/toolchain/toolchain-common.in @@ -247,10 +247,30 @@ config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_10 bool select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_9 +config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_11 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_10 + +config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_12 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_11 + +config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_13 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_12 + +config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_13 + # This order guarantees that the highest version is set, as kconfig # stops affecting a value on the first matching default. config BR2_TOOLCHAIN_HEADERS_AT_LEAST string + default "4.14" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14 + default "4.13" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_13 + default "4.12" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_12 + default "4.11" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_11 default "4.10" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_10 default "4.9" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_9 default "4.8" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_8 From 0c6b85f4e63bc83e8f21ee5d0c2ff1129dfc64d5 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:07:01 +0200 Subject: [PATCH 418/614] [rpi] update ibc defconfig --- configs/raspberrypi3_wpe_ibc_defconfig | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/configs/raspberrypi3_wpe_ibc_defconfig b/configs/raspberrypi3_wpe_ibc_defconfig index 76ce15dc925d..b5f5f4982126 100644 --- a/configs/raspberrypi3_wpe_ibc_defconfig +++ b/configs/raspberrypi3_wpe_ibc_defconfig @@ -5,7 +5,6 @@ BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y @@ -15,17 +14,17 @@ BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyAMA0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --tvmode-720 --overclock-pi3 --silent" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --tvmode-720 --overclock-pi3+ --silent" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="be97febf4aa42b1d019ad24e7948739da8557f66" -BR2_LINUX_KERNEL_PATCH="board/raspberrypi/add-rpi-poe-fan-driver.patch" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="27e84c625ebbdfccf78220f2f90995a050c7b64a" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.14.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3" +BR2_LINUX_KERNEL_DTS_OVERLAYS_SUPPORT=y BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y From 7a7ab1814aa2788cc0f673af12e37a801231c4d0 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:07:26 +0200 Subject: [PATCH 419/614] [rpi] rename ibc config to rpi3+ --- ...berrypi3_wpe_ibc_defconfig => raspberrypi3+_wpe_ibc_defconfig} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename configs/{raspberrypi3_wpe_ibc_defconfig => raspberrypi3+_wpe_ibc_defconfig} (100%) diff --git a/configs/raspberrypi3_wpe_ibc_defconfig b/configs/raspberrypi3+_wpe_ibc_defconfig similarity index 100% rename from configs/raspberrypi3_wpe_ibc_defconfig rename to configs/raspberrypi3+_wpe_ibc_defconfig From a72376348aebabd5f940d2567103df024a5876d8 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:08:14 +0200 Subject: [PATCH 420/614] [rpi] add linux defconfig for 4.14 --- board/raspberrypi/rpi23-linux-4.14.config | 269 ++++++++++++++++++++++ 1 file changed, 269 insertions(+) create mode 100644 board/raspberrypi/rpi23-linux-4.14.config diff --git a/board/raspberrypi/rpi23-linux-4.14.config b/board/raspberrypi/rpi23-linux-4.14.config new file mode 100644 index 000000000000..05db2a4d856f --- /dev/null +++ b/board/raspberrypi/rpi23-linux-4.14.config @@ -0,0 +1,269 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM2835=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_HOTPLUG_CPU=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_CMA=y +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y +# CONFIG_ATAGS is not set +CONFIG_CPU_FREQ=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_DIAG is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_VLAN_8021Q=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_MAC80211_MESH=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=5 +CONFIG_CONNECTOR=y +CONFIG_OF_OVERLAY=y +CONFIG_BCM2835_SMI=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_ASYNC=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +# CONFIG_USB_NET_AX88179_178A is not set +# CONFIG_USB_NET_CDCETHER is not set +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_QMI_WWAN=m +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_USB=y +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +CONFIG_RT2X00=m +CONFIG_RT2800USB=m +# CONFIG_RT2800USB_RT35XX is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_RPISENSE=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO is not set +CONFIG_BRCM_CHAR_DRIVERS=y +CONFIG_BCM_VCIO=y +CONFIG_BCM_VC_SM=y +# CONFIG_BCM2835_DEVGPIOMEM is not set +# CONFIG_BCM2835_SMI_DEV is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_HW_RANDOM=y +CONFIG_RAW_DRIVER=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_BCM2708=m +CONFIG_I2C_BCM2835=m +CONFIG_SPI=y +CONFIG_SPI_BCM2835=y +CONFIG_SPI_BCM2835AUX=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_W1=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_SENSORS_RPI_POE_FAN=y +CONFIG_THERMAL=y +CONFIG_BCM2835_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_BCM2835_WDT=y +CONFIG_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_BCM2708=y +CONFIG_FB_RPISENSE=m +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_SPI is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_MULTITOUCH=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DYNAMIC_MINORS=y +CONFIG_USB_DWCOTG=y +CONFIG_USB_ACM=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_BCM2835_MMC=y +CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_SDHOST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_BCM2835=y +CONFIG_DMADEVICES=y +CONFIG_DMA_BCM2835=y +CONFIG_DMA_BCM2708=y +CONFIG_STAGING=y +CONFIG_SND_BCM2835=y +CONFIG_VIDEO_BCM2835=y +CONFIG_MAILBOX=y +CONFIG_BCM2835_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_RASPBERRYPI_POWER=y +CONFIG_RASPBERRYPI_FIRMWARE=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=850 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_STRIP_ASM_SYMS=y +CONFIG_PANIC_ON_OOPS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_ANSI_CPRNG=y +# CONFIG_CRYPTO_HW is not set +CONFIG_ARM_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y From 9a20eb5b72cbe6521148307c2e09704b52ea1861 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:24:15 +0200 Subject: [PATCH 421/614] [rpi] cleaning up --- .../raspberrypi/add-rpi-poe-fan-driver.patch | 1062 ----------------- 1 file changed, 1062 deletions(-) delete mode 100644 board/raspberrypi/add-rpi-poe-fan-driver.patch diff --git a/board/raspberrypi/add-rpi-poe-fan-driver.patch b/board/raspberrypi/add-rpi-poe-fan-driver.patch deleted file mode 100644 index 876bdd35834c..000000000000 --- a/board/raspberrypi/add-rpi-poe-fan-driver.patch +++ /dev/null @@ -1,1062 +0,0 @@ -From 6bad15ac01c3c454a692318fa0051354d56285be Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Mon, 9 Jul 2018 12:54:25 +0100 -Subject: [PATCH] Add rpi-poe-fan driver - -Signed-off-by: Serge Schneider ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 + - .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 61 +++ - arch/arm/configs/bcm2709_defconfig | 1 + - arch/arm/configs/bcmrpi_defconfig | 1 + - drivers/hwmon/Kconfig | 10 + - drivers/hwmon/Makefile | 1 + - drivers/hwmon/rpi-poe-fan.c | 443 ++++++++++++++++++ - include/soc/bcm2835/raspberrypi-firmware.h | 2 + - 9 files changed, 526 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts - create mode 100644 drivers/hwmon/rpi-poe-fan.c - -diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile -index 969f407210387..bc15f26560409 100644 ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -103,6 +103,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - rpi-dac.dtbo \ - rpi-display.dtbo \ - rpi-ft5406.dtbo \ -+ rpi-poe.dtbo \ - rpi-proto.dtbo \ - rpi-sense.dtbo \ - rpi-tv.dtbo \ -diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README -index eeb4acb2221a7..0c6afe53dbdec 100644 ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1576,6 +1576,12 @@ Params: touchscreen-size-x Touchscreen X resolution (default 800) - touchscreen-swapped-x-y Swap X and Y cordinates (default 0); - - -+Name: rpi-poe -+Info: Raspberry Pi POE HAT -+Load: dtoverlay=rpi-poe -+Params: -+ -+ - Name: rpi-proto - Info: Configures the RPi Proto audio card - Load: dtoverlay=rpi-proto -diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts -new file mode 100644 -index 0000000000000..9137279bb9237 ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts -@@ -0,0 +1,61 @@ -+/* -+ * Overlay for the Raspberry Pi POE HAT. -+ */ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target-path = "/"; -+ __overlay__ { -+ fan0: rpi-poe-fan@0 { -+ compatible = "rpi-poe-fan"; -+ firmware = <&firmware>; -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 50 150 255>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&cpu_thermal>; -+ __overlay__ { -+ trips { -+ threshold: trip-point@0 { -+ temperature = <45000>; -+ hysteresis = <5000>; -+ type = "active"; -+ }; -+ target: trip-point@1 { -+ temperature = <50000>; -+ hysteresis = <2000>; -+ type = "active"; -+ }; -+ cpu_hot: cpu_hot@0 { -+ temperature = <55000>; -+ hysteresis = <2000>; -+ type = "active"; -+ }; -+ }; -+ cooling-maps { -+ map0 { -+ trip = <&threshold>; -+ cooling-device = <&fan0 0 1>; -+ }; -+ map1 { -+ trip = <&target>; -+ cooling-device = <&fan0 1 2>; -+ }; -+ map2 { -+ trip = <&cpu_hot>; -+ cooling-device = <&fan0 2 3>; -+ }; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm/configs/bcm2709_defconfig b/arch/arm/configs/bcm2709_defconfig -index 4e1d7c2de5fb7..5d91978f5d191 100644 ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -658,6 +658,7 @@ CONFIG_HWMON=m - CONFIG_SENSORS_DS1621=m - CONFIG_SENSORS_JC42=m - CONFIG_SENSORS_LM75=m -+CONFIG_SENSORS_RPI_POE_FAN=m - CONFIG_SENSORS_SHT21=m - CONFIG_SENSORS_SHT3x=m - CONFIG_SENSORS_SHTC1=m -diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig -index 56e514dd15c4a..c4915115db01e 100644 ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -651,6 +651,7 @@ CONFIG_HWMON=m - CONFIG_SENSORS_DS1621=m - CONFIG_SENSORS_JC42=m - CONFIG_SENSORS_LM75=m -+CONFIG_SENSORS_RPI_POE_FAN=m - CONFIG_SENSORS_SHT21=m - CONFIG_SENSORS_SHT3x=m - CONFIG_SENSORS_SHTC1=m -diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index d65431417b17c..95357b084b025 100644 ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -1286,6 +1286,16 @@ config SENSORS_PWM_FAN - This driver can also be built as a module. If so, the module - will be called pwm-fan. - -+config SENSORS_RPI_POE_FAN -+ tristate "Raspberry Pi POE HAT fan" -+ depends on RASPBERRYPI_FIRMWARE -+ depends on THERMAL || THERMAL=n -+ help -+ If you say yes here you get support for Raspberry Pi POE HAT fan. -+ -+ This driver can also be built as a module. If so, the module -+ will be called rpi-poe-fan. -+ - config SENSORS_SHT15 - tristate "Sensiron humidity and temperature sensors. SHT15 and compat." - depends on GPIOLIB || COMPILE_TEST -diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index 23e195a5a2f33..d0b6351509100 100644 ---- a/drivers/hwmon/Makefile -+++ b/drivers/hwmon/Makefile -@@ -138,6 +138,7 @@ obj-$(CONFIG_SENSORS_PC87427) += pc87427.o - obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o - obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o - obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o -+obj-$(CONFIG_SENSORS_RPI_POE_FAN) += rpi-poe-fan.o - obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o - obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o - obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -new file mode 100644 -index 0000000000000..e65cb178412b8 ---- /dev/null -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -0,0 +1,443 @@ -+/* -+ * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. -+ * -+ * Copyright (C) 2018 Raspberry Pi (Trading) Ltd. -+ * Based on pwm-fan.c by Kamil Debski -+ * -+ * Author: Serge Schneider -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MAX_PWM 255 -+ -+#define POE_CUR_PWM 0x0 -+#define POE_DEF_PWM 0x1 -+ -+struct rpi_poe_fan_ctx { -+ struct mutex lock; -+ struct rpi_firmware *fw; -+ unsigned int pwm_value; -+ unsigned int def_pwm_value; -+ unsigned int rpi_poe_fan_state; -+ unsigned int rpi_poe_fan_max_state; -+ unsigned int *rpi_poe_fan_cooling_levels; -+ struct thermal_cooling_device *cdev; -+ struct notifier_block nb; -+}; -+ -+struct m_data_s{ -+ u32 reg; -+ u32 val; -+ u32 ret; -+}; -+ -+static int write_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ -+ struct m_data_s m_data = { -+ .reg = reg, -+ .val = *val -+ }; -+ int ret; -+ ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_POE_HAT_VAL, -+ &m_data, sizeof(m_data)); -+ if (ret) { -+ return ret; -+ } else if (m_data.ret) { -+ return -EIO; -+ } -+ return 0; -+} -+ -+static int read_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ -+ struct m_data_s m_data = { -+ .reg = reg, -+ }; -+ int ret; -+ ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_POE_HAT_VAL, -+ &m_data, sizeof(m_data)); -+ if (ret) { -+ return ret; -+ } else if (m_data.ret) { -+ return -EIO; -+ } -+ *val = m_data.val; -+ return 0; -+} -+ -+static int rpi_poe_reboot(struct notifier_block *nb, unsigned long code, -+ void *unused) -+{ -+ struct rpi_poe_fan_ctx *ctx = container_of(nb, struct rpi_poe_fan_ctx, -+ nb); -+ -+ if (ctx->pwm_value != ctx->def_pwm_value) -+ write_reg(ctx->fw, POE_CUR_PWM, &ctx->def_pwm_value); -+ -+ return NOTIFY_DONE; -+} -+ -+static int __set_pwm(struct rpi_poe_fan_ctx *ctx, u32 pwm) -+{ -+ int ret = 0; -+ -+ mutex_lock(&ctx->lock); -+ if (ctx->pwm_value == pwm) -+ goto exit_set_pwm_err; -+ -+ ret = write_reg(ctx->fw, POE_CUR_PWM, &pwm); -+ if (!ret) -+ ctx->pwm_value = pwm; -+exit_set_pwm_err: -+ mutex_unlock(&ctx->lock); -+ return ret; -+} -+ -+static int __set_def_pwm(struct rpi_poe_fan_ctx *ctx, u32 def_pwm) -+{ -+ int ret = 0; -+ mutex_lock(&ctx->lock); -+ if (ctx->def_pwm_value == def_pwm) -+ goto exit_set_def_pwm_err; -+ -+ ret = write_reg(ctx->fw, POE_CUR_PWM, &def_pwm); -+ if (!ret) -+ ctx->def_pwm_value = def_pwm; -+exit_set_def_pwm_err: -+ mutex_unlock(&ctx->lock); -+ return ret; -+} -+ -+static void rpi_poe_fan_update_state(struct rpi_poe_fan_ctx *ctx, -+ unsigned long pwm) -+{ -+ int i; -+ -+ for (i = 0; i < ctx->rpi_poe_fan_max_state; ++i) -+ if (pwm < ctx->rpi_poe_fan_cooling_levels[i + 1]) -+ break; -+ -+ ctx->rpi_poe_fan_state = i; -+} -+ -+static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ unsigned long pwm; -+ int ret; -+ -+ if (kstrtoul(buf, 10, &pwm) || pwm > MAX_PWM) -+ return -EINVAL; -+ -+ ret = __set_pwm(ctx, pwm); -+ if (ret) -+ return ret; -+ -+ rpi_poe_fan_update_state(ctx, pwm); -+ return count; -+} -+ -+static ssize_t set_def_pwm(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ unsigned long def_pwm; -+ int ret; -+ -+ if (kstrtoul(buf, 10, &def_pwm) || def_pwm > MAX_PWM) -+ return -EINVAL; -+ -+ ret = __set_def_pwm(ctx, def_pwm); -+ if (ret) -+ return ret; -+ return count; -+} -+ -+static ssize_t show_pwm(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ -+ return sprintf(buf, "%u\n", ctx->pwm_value); -+} -+ -+static ssize_t show_def_pwm(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ -+ return sprintf(buf, "%u\n", ctx->def_pwm_value); -+} -+ -+ -+static SENSOR_DEVICE_ATTR(pwm1, 0644, show_pwm, set_pwm, 0); -+static SENSOR_DEVICE_ATTR(def_pwm1, 0644, show_def_pwm, set_def_pwm, 1); -+ -+static struct attribute *rpi_poe_fan_attrs[] = { -+ &sensor_dev_attr_pwm1.dev_attr.attr, -+ &sensor_dev_attr_def_pwm1.dev_attr.attr, -+ NULL, -+}; -+ -+ATTRIBUTE_GROUPS(rpi_poe_fan); -+ -+/* thermal cooling device callbacks */ -+static int rpi_poe_fan_get_max_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ struct rpi_poe_fan_ctx *ctx = cdev->devdata; -+ -+ if (!ctx) -+ return -EINVAL; -+ -+ *state = ctx->rpi_poe_fan_max_state; -+ -+ return 0; -+} -+ -+static int rpi_poe_fan_get_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ struct rpi_poe_fan_ctx *ctx = cdev->devdata; -+ -+ if (!ctx) -+ return -EINVAL; -+ -+ *state = ctx->rpi_poe_fan_state; -+ -+ return 0; -+} -+ -+static int rpi_poe_fan_set_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long state) -+{ -+ struct rpi_poe_fan_ctx *ctx = cdev->devdata; -+ int ret; -+ -+ if (!ctx || (state > ctx->rpi_poe_fan_max_state)) -+ return -EINVAL; -+ -+ if (state == ctx->rpi_poe_fan_state) -+ return 0; -+ -+ ret = __set_pwm(ctx, ctx->rpi_poe_fan_cooling_levels[state]); -+ if (ret) { -+ dev_err(&cdev->device, "Cannot set pwm!\n"); -+ return ret; -+ } -+ -+ ctx->rpi_poe_fan_state = state; -+ -+ return ret; -+} -+ -+static const struct thermal_cooling_device_ops rpi_poe_fan_cooling_ops = { -+ .get_max_state = rpi_poe_fan_get_max_state, -+ .get_cur_state = rpi_poe_fan_get_cur_state, -+ .set_cur_state = rpi_poe_fan_set_cur_state, -+}; -+ -+static int rpi_poe_fan_of_get_cooling_data(struct device *dev, -+ struct rpi_poe_fan_ctx *ctx) -+{ -+ struct device_node *np = dev->of_node; -+ int num, i, ret; -+ -+ if (!of_find_property(np, "cooling-levels", NULL)) -+ return 0; -+ -+ ret = of_property_count_u32_elems(np, "cooling-levels"); -+ if (ret <= 0) { -+ dev_err(dev, "Wrong data!\n"); -+ return ret ? : -EINVAL; -+ } -+ -+ num = ret; -+ ctx->rpi_poe_fan_cooling_levels = devm_kzalloc(dev, num * sizeof(u32), -+ GFP_KERNEL); -+ if (!ctx->rpi_poe_fan_cooling_levels) -+ return -ENOMEM; -+ -+ ret = of_property_read_u32_array(np, "cooling-levels", -+ ctx->rpi_poe_fan_cooling_levels, num); -+ if (ret) { -+ dev_err(dev, "Property 'cooling-levels' cannot be read!\n"); -+ return ret; -+ } -+ -+ for (i = 0; i < num; i++) { -+ if (ctx->rpi_poe_fan_cooling_levels[i] > MAX_PWM) { -+ dev_err(dev, "PWM fan state[%d]:%d > %d\n", i, -+ ctx->rpi_poe_fan_cooling_levels[i], MAX_PWM); -+ return -EINVAL; -+ } -+ } -+ -+ ctx->rpi_poe_fan_max_state = num - 1; -+ -+ return 0; -+} -+ -+static int rpi_poe_fan_probe(struct platform_device *pdev) -+{ -+ struct thermal_cooling_device *cdev; -+ struct rpi_poe_fan_ctx *ctx; -+ struct device *hwmon; -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *fw_node; -+ int ret; -+ -+ fw_node = of_parse_phandle(np, "firmware", 0); -+ if (!fw_node) { -+ dev_err(&pdev->dev, "Missing firmware node\n"); -+ return -ENOENT; -+ } -+ -+ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); -+ if (!ctx) -+ return -ENOMEM; -+ -+ mutex_init(&ctx->lock); -+ -+ ctx->fw = rpi_firmware_get(fw_node); -+ if (!ctx->fw) -+ return -EPROBE_DEFER; -+ -+ platform_set_drvdata(pdev, ctx); -+ -+ ctx->nb.notifier_call = rpi_poe_reboot; -+ ret = register_reboot_notifier(&ctx->nb); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to register reboot notifier: %i\n", -+ ret); -+ return ret; -+ } -+ ret = read_reg(ctx->fw, POE_DEF_PWM, &ctx->def_pwm_value); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to get default PWM value: %i\n", -+ ret); -+ goto err; -+ } -+ ret = read_reg(ctx->fw, POE_CUR_PWM, &ctx->pwm_value); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to get current PWM value: %i\n", -+ ret); -+ goto err; -+ } -+ -+ hwmon = devm_hwmon_device_register_with_groups(&pdev->dev, "rpipoefan", -+ ctx, rpi_poe_fan_groups); -+ if (IS_ERR(hwmon)) { -+ dev_err(&pdev->dev, "Failed to register hwmon device\n"); -+ ret = PTR_ERR(hwmon); -+ goto err; -+ } -+ -+ ret = rpi_poe_fan_of_get_cooling_data(&pdev->dev, ctx); -+ if (ret) -+ return ret; -+ -+ rpi_poe_fan_update_state(ctx, ctx->pwm_value); -+ if (!IS_ENABLED(CONFIG_THERMAL)) -+ return 0; -+ -+ cdev = thermal_of_cooling_device_register(np, -+ "rpi-poe-fan", ctx, -+ &rpi_poe_fan_cooling_ops); -+ if (IS_ERR(cdev)) { -+ dev_err(&pdev->dev, -+ "Failed to register rpi-poe-fan as cooling device"); -+ ret = PTR_ERR(cdev); -+ goto err; -+ } -+ ctx->cdev = cdev; -+ thermal_cdev_update(cdev); -+ -+ return 0; -+err: -+ unregister_reboot_notifier(&ctx->nb); -+ return ret; -+} -+ -+static int rpi_poe_fan_remove(struct platform_device *pdev) -+{ -+ struct rpi_poe_fan_ctx *ctx = platform_get_drvdata(pdev); -+ u32 value = ctx->def_pwm_value; -+ -+ unregister_reboot_notifier(&ctx->nb); -+ thermal_cooling_device_unregister(ctx->cdev); -+ if (ctx->pwm_value != value) { -+ write_reg(ctx->fw, POE_CUR_PWM, &value); -+ } -+ return 0; -+} -+ -+#ifdef CONFIG_PM_SLEEP -+static int rpi_poe_fan_suspend(struct device *dev) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ u32 value = 0; -+ -+ if (ctx->pwm_value != value) -+ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); -+ return 0; -+} -+ -+static int rpi_poe_fan_resume(struct device *dev) -+{ -+ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); -+ u32 value = ctx->pwm_value; -+ int ret = 0; -+ -+ if (value != 0) -+ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); -+ -+ return ret; -+} -+#endif -+ -+static SIMPLE_DEV_PM_OPS(rpi_poe_fan_pm, rpi_poe_fan_suspend, -+ rpi_poe_fan_resume); -+ -+static const struct of_device_id of_rpi_poe_fan_match[] = { -+ { .compatible = "rpi-poe-fan", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, of_rpi_poe_fan_match); -+ -+static struct platform_driver rpi_poe_fan_driver = { -+ .probe = rpi_poe_fan_probe, -+ .remove = rpi_poe_fan_remove, -+ .driver = { -+ .name = "rpi-poe-fan", -+ .pm = &rpi_poe_fan_pm, -+ .of_match_table = of_rpi_poe_fan_match, -+ }, -+}; -+ -+module_platform_driver(rpi_poe_fan_driver); -+ -+MODULE_AUTHOR("Serge Schneider "); -+MODULE_ALIAS("platform:rpi-poe-fan"); -+MODULE_DESCRIPTION("Raspberry Pi POE HAT fan driver"); -+MODULE_LICENSE("GPL"); -diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h -index 5a77cb921cf42..8ab5501c8d292 100644 ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -93,6 +93,8 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043, - RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045, - RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, -+ RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, -+ RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, - - - /* Dispmanx TAGS */ -From 29d173004d1f1ab2ca89294e828a90db353cfb18 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 09:11:10 +0100 -Subject: [PATCH 1/8] rpi-poe-fan: Fix undeclared variable in - rpi_poe_fan_suspend - -closes #2665 - -Signed-off-by: Serge Schneider ---- - drivers/hwmon/rpi-poe-fan.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index e65cb178412b8..c4a48a72856b5 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -397,10 +397,11 @@ static int rpi_poe_fan_suspend(struct device *dev) - { - struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); - u32 value = 0; -+ int ret = 0; - - if (ctx->pwm_value != value) - ret = write_reg(ctx->fw, POE_CUR_PWM, &value); -- return 0; -+ return ret; - } - - static int rpi_poe_fan_resume(struct device *dev) - -From cd96cb49b406df547236c6f722a2e92f7c68f275 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 09:23:32 +0100 -Subject: [PATCH 2/8] rpi-poe-fan: Add SPDX-License-Identifier - -Signed-off-by: Serge Schneider ---- - drivers/hwmon/rpi-poe-fan.c | 11 +---------- - 1 file changed, 1 insertion(+), 10 deletions(-) - -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index c4a48a72856b5..808717921ec39 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -1,3 +1,4 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. - * -@@ -5,16 +6,6 @@ - * Based on pwm-fan.c by Kamil Debski - * - * Author: Serge Schneider -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. - */ - - #include - -From ac05da2426038325ae4e2cc93554551d3b359e53 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 09:30:04 +0100 -Subject: [PATCH 3/8] rpi-poe-fan: Expand PoE acronym in Kconfig help - -Signed-off-by: Serge Schneider ---- - drivers/hwmon/Kconfig | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 95357b084b025..7fcb8e846ac3c 100644 ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -1291,7 +1291,8 @@ config SENSORS_RPI_POE_FAN - depends on RASPBERRYPI_FIRMWARE - depends on THERMAL || THERMAL=n - help -- If you say yes here you get support for Raspberry Pi POE HAT fan. -+ If you say yes here you get support for Raspberry Pi POE (Power over -+ Ethernet) HAT fan. - - This driver can also be built as a module. If so, the module - will be called rpi-poe-fan. - -From 90373c3d84c8a859985224ca055a4e1d22c911a4 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 09:38:41 +0100 -Subject: [PATCH 4/8] rpi-poe-fan: Give clearer error message on - of_property_count_u32_elems fail - -Signed-off-by: Serge Schneider ---- - drivers/hwmon/rpi-poe-fan.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index 808717921ec39..2a37a5cfbc1c3 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -259,7 +259,8 @@ static int rpi_poe_fan_of_get_cooling_data(struct device *dev, - - ret = of_property_count_u32_elems(np, "cooling-levels"); - if (ret <= 0) { -- dev_err(dev, "Wrong data!\n"); -+ dev_err(dev, "cooling-levels property missing or invalid: %d\n", -+ ret); - return ret ? : -EINVAL; - } - - -From 542203dc6cf188443b253258ff75102f5e7eea72 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 10:10:41 +0100 -Subject: [PATCH 5/8] rpi-poe-fan: Add documentation - -Signed-off-by: Serge Schneider ---- - .../devicetree/bindings/hwmon/rpi-poe-fan.txt | 55 +++++++++++++++++++ - Documentation/hwmon/rpi-poe-fan | 15 +++++ - 2 files changed, 70 insertions(+) - create mode 100644 Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt - create mode 100644 Documentation/hwmon/rpi-poe-fan - -diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -new file mode 100644 -index 0000000000000..6f4b2de7fcb1a ---- /dev/null -+++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -@@ -0,0 +1,55 @@ -+Bindings for the Raspberry Pi POE HAT fan -+ -+Required properties: -+- compatible : "rpi-poe-fan" -+- firmware : Reference to the RPi firmware device node -+- pwms : the PWM that is used to control the PWM fan -+- cooling-levels : PWM duty cycle values in a range from 0 to 255 -+ which correspond to thermal cooling states -+ -+Example: -+ fan0: rpi-poe-fan@0 { -+ compatible = "rpi-poe-fan"; -+ firmware = <&firmware>; -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 50 150 255>; -+ status = "okay"; -+ }; -+ -+ thermal-zones { -+ cpu_thermal: cpu-thermal { -+ trips { -+ threshold: trip-point@0 { -+ temperature = <45000>; -+ hysteresis = <5000>; -+ type = "active"; -+ }; -+ target: trip-point@1 { -+ temperature = <50000>; -+ hysteresis = <2000>; -+ type = "active"; -+ }; -+ cpu_hot: cpu_hot@0 { -+ temperature = <55000>; -+ hysteresis = <2000>; -+ type = "active"; -+ }; -+ }; -+ cooling-maps { -+ map0 { -+ trip = <&threshold>; -+ cooling-device = <&fan0 0 1>; -+ }; -+ map1 { -+ trip = <&target>; -+ cooling-device = <&fan0 1 2>; -+ }; -+ map2 { -+ trip = <&cpu_hot>; -+ cooling-device = <&fan0 2 3>; -+ }; -+ }; -+ }; -+ }; -diff --git a/Documentation/hwmon/rpi-poe-fan b/Documentation/hwmon/rpi-poe-fan -new file mode 100644 -index 0000000000000..2dcacaef9e681 ---- /dev/null -+++ b/Documentation/hwmon/rpi-poe-fan -@@ -0,0 +1,15 @@ -+Kernel driver rpi-poe-fan -+===================== -+ -+This driver enables the use of the Raspberry Pi POE HAT fan. -+ -+Author: Serge Schneider -+ -+Description -+----------- -+ -+The driver implements a simple interface for driving the Raspberry Pi POE -+(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry pi -+firmware through the mailbox property interface. The firmware then forwards -+the commands to the board over I2C on the ID_EEPROM pins. The driver exposes -+the fan to the user space through the hwmon's sysfs interface. - -From 108dbb80e1353a74448116eb62a6eab226e6c50c Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 09:43:04 +0100 -Subject: [PATCH 6/8] rpi-poe-fan: Add vendor to of_device_id compatible - string. - -Signed-off-by: Serge Schneider ---- - Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt | 4 ++-- - arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 2 +- - drivers/hwmon/rpi-poe-fan.c | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -index 6f4b2de7fcb1a..51c28498d58a5 100644 ---- a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -+++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -@@ -1,7 +1,7 @@ - Bindings for the Raspberry Pi POE HAT fan - - Required properties: --- compatible : "rpi-poe-fan" -+- compatible : "raspberrypi,rpi-poe-fan" - - firmware : Reference to the RPi firmware device node - - pwms : the PWM that is used to control the PWM fan - - cooling-levels : PWM duty cycle values in a range from 0 to 255 -@@ -9,7 +9,7 @@ Required properties: - - Example: - fan0: rpi-poe-fan@0 { -- compatible = "rpi-poe-fan"; -+ compatible = "raspberrypi,rpi-poe-fan"; - firmware = <&firmware>; - cooling-min-state = <0>; - cooling-max-state = <3>; -diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts -index 9137279bb9237..0a32fff036a7c 100644 ---- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts -+++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts -@@ -11,7 +11,7 @@ - target-path = "/"; - __overlay__ { - fan0: rpi-poe-fan@0 { -- compatible = "rpi-poe-fan"; -+ compatible = "raspberrypi,rpi-poe-fan"; - firmware = <&firmware>; - cooling-min-state = <0>; - cooling-max-state = <3>; -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index 2a37a5cfbc1c3..e3a7708a3751e 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -413,7 +413,7 @@ static SIMPLE_DEV_PM_OPS(rpi_poe_fan_pm, rpi_poe_fan_suspend, - rpi_poe_fan_resume); - - static const struct of_device_id of_rpi_poe_fan_match[] = { -- { .compatible = "rpi-poe-fan", }, -+ { .compatible = "raspberrypi,rpi-poe-fan", }, - {}, - }; - MODULE_DEVICE_TABLE(of, of_rpi_poe_fan_match); - -From 9f6b06cede4d8d1d6d4228ca8c8ba399c1e2a7fd Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Tue, 28 Aug 2018 10:38:02 +0100 -Subject: [PATCH 7/8] rpi-poe-fan: Rename m_data_s struct to fw_data_s - -Signed-off-by: Serge Schneider ---- - drivers/hwmon/rpi-poe-fan.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index e3a7708a3751e..b1baeecc73132 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -37,41 +37,41 @@ struct rpi_poe_fan_ctx { - struct notifier_block nb; - }; - --struct m_data_s{ -+struct fw_tag_data_s{ - u32 reg; - u32 val; - u32 ret; - }; - - static int write_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ -- struct m_data_s m_data = { -+ struct fw_tag_data_s fw_tag_data = { - .reg = reg, - .val = *val - }; - int ret; - ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_POE_HAT_VAL, -- &m_data, sizeof(m_data)); -+ &fw_tag_data, sizeof(fw_tag_data)); - if (ret) { - return ret; -- } else if (m_data.ret) { -+ } else if (fw_tag_data.ret) { - return -EIO; - } - return 0; - } - - static int read_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ -- struct m_data_s m_data = { -+ struct fw_tag_data_s fw_tag_data = { - .reg = reg, - }; - int ret; - ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_POE_HAT_VAL, -- &m_data, sizeof(m_data)); -+ &fw_tag_data, sizeof(fw_tag_data)); - if (ret) { - return ret; -- } else if (m_data.ret) { -+ } else if (fw_tag_data.ret) { - return -EIO; - } -- *val = m_data.val; -+ *val = fw_tag_data.val; - return 0; - } - - -From e4094a632994812c0bc3e184158b43f02edbc501 Mon Sep 17 00:00:00 2001 -From: Serge Schneider -Date: Wed, 29 Aug 2018 14:54:52 +0100 -Subject: [PATCH 8/8] rpi-poe-fan: Fix typos - -Signed-off-by: Serge Schneider ---- - Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt | 2 +- - Documentation/hwmon/rpi-poe-fan | 8 ++++---- - drivers/hwmon/Kconfig | 4 ++-- - drivers/hwmon/rpi-poe-fan.c | 4 ++-- - 4 files changed, 9 insertions(+), 9 deletions(-) - -diff --git a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -index 51c28498d58a5..c71f8569a4dc9 100644 ---- a/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -+++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt -@@ -1,4 +1,4 @@ --Bindings for the Raspberry Pi POE HAT fan -+Bindings for the Raspberry Pi PoE HAT fan - - Required properties: - - compatible : "raspberrypi,rpi-poe-fan" -diff --git a/Documentation/hwmon/rpi-poe-fan b/Documentation/hwmon/rpi-poe-fan -index 2dcacaef9e681..9182ab6339933 100644 ---- a/Documentation/hwmon/rpi-poe-fan -+++ b/Documentation/hwmon/rpi-poe-fan -@@ -1,15 +1,15 @@ - Kernel driver rpi-poe-fan - ===================== - --This driver enables the use of the Raspberry Pi POE HAT fan. -+This driver enables the use of the Raspberry Pi PoE HAT fan. - - Author: Serge Schneider - - Description - ----------- - --The driver implements a simple interface for driving the Raspberry Pi POE --(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry pi -+The driver implements a simple interface for driving the Raspberry Pi PoE -+(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry Pi - firmware through the mailbox property interface. The firmware then forwards - the commands to the board over I2C on the ID_EEPROM pins. The driver exposes --the fan to the user space through the hwmon's sysfs interface. -+the fan to the user space through the hwmon sysfs interface. -diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 7fcb8e846ac3c..af4ccd8a88e04 100644 ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -1287,11 +1287,11 @@ config SENSORS_PWM_FAN - will be called pwm-fan. - - config SENSORS_RPI_POE_FAN -- tristate "Raspberry Pi POE HAT fan" -+ tristate "Raspberry Pi PoE HAT fan" - depends on RASPBERRYPI_FIRMWARE - depends on THERMAL || THERMAL=n - help -- If you say yes here you get support for Raspberry Pi POE (Power over -+ If you say yes here you get support for Raspberry Pi PoE (Power over - Ethernet) HAT fan. - - This driver can also be built as a module. If so, the module -diff --git a/drivers/hwmon/rpi-poe-fan.c b/drivers/hwmon/rpi-poe-fan.c -index b1baeecc73132..3effaf2eb86db 100644 ---- a/drivers/hwmon/rpi-poe-fan.c -+++ b/drivers/hwmon/rpi-poe-fan.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * rpi-poe-fan.c - Hwmon driver for Raspberry Pi POE HAT fan. -+ * rpi-poe-fan.c - Hwmon driver for Raspberry Pi PoE HAT fan. - * - * Copyright (C) 2018 Raspberry Pi (Trading) Ltd. - * Based on pwm-fan.c by Kamil Debski -@@ -432,5 +432,5 @@ module_platform_driver(rpi_poe_fan_driver); - - MODULE_AUTHOR("Serge Schneider "); - MODULE_ALIAS("platform:rpi-poe-fan"); --MODULE_DESCRIPTION("Raspberry Pi POE HAT fan driver"); -+MODULE_DESCRIPTION("Raspberry Pi PoE HAT fan driver"); - MODULE_LICENSE("GPL"); - From a9a81e7f8db881a0bb1614b203261d2c6adbaeb3 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:34:26 +0200 Subject: [PATCH 422/614] [rpi] map list key to backslash --- board/raspberrypi/osmc-devinput-remote.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/raspberrypi/osmc-devinput-remote.json b/board/raspberrypi/osmc-devinput-remote.json index bc4f3abad628..7e28c21d7718 100644 --- a/board/raspberrypi/osmc-devinput-remote.json +++ b/board/raspberrypi/osmc-devinput-remote.json @@ -10,7 +10,7 @@ { "code": "0x000D", "key": 115 }, { "code": "0x0017", "key": 116 }, { "code": "0x001C", "key": 28 }, - { "code": "0x002E", "key": 139 }, + { "code": "0x002E", "key": 43 }, { "code": "0x0066", "key": 1 }, { "code": "0x0067", "key": 103 }, { "code": "0x0069", "key": 105 }, From c2241db8f8d2968e45fafcf6df7830085ffc128a Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:43:52 +0200 Subject: [PATCH 423/614] [rpi-firmware] bump to latest version --- package/rpi-firmware/rpi-firmware.hash | 2 +- package/rpi-firmware/rpi-firmware.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/rpi-firmware/rpi-firmware.hash b/package/rpi-firmware/rpi-firmware.hash index 7a78f5970822..e56b2c917db9 100644 --- a/package/rpi-firmware/rpi-firmware.hash +++ b/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 17763f507af3dbe5926917fcf601298e19944fc0816b20342457b9155c152c26 rpi-firmware-25cf637ccc90d7d2fa37277c807ab33b655bd0f4.tar.gz +sha256 4cb43c57e8fbfe81d27653d273a9f2f20f9ac497464770c3b06531de947ad3dc rpi-firmware-70c60c5c57d9d639fbd92276f18558ada51b7c53.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 16431b6c9b28..8629786230cc 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -3,7 +3,7 @@ # rpi-firmware # ################################################################################ -RPI_FIRMWARE_VERSION = 25cf637ccc90d7d2fa37277c807ab33b655bd0f4 +RPI_FIRMWARE_VERSION = 70c60c5c57d9d639fbd92276f18558ada51b7c53 RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3c RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom From 8c6a3a97b2c7d62fb317b9f7e18fc8f3bc822337 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 11 Sep 2018 22:52:53 +0200 Subject: [PATCH 424/614] [rpi] proper rpi3b+ overclock --- board/raspberrypi/post-image.sh | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 839839464e71..2a385c1fb8bb 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -111,13 +111,10 @@ __EOF__ cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" # Overclock -arm_freq=1450 -gpu_freq=560 -over_voltage=6 -force_turbo=1 -sdram_freq=720 -over_voltage_sdram=8 -sdram_schmoo=0x02000020 +arm_freq=1500 +gpu_freq=500 +sdram_freq=560 +over_voltage=5 avoid_warnings=1 __EOF__ fi From db7d494d7db13a5da4bf3b440a93f7875af1aea2 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 12 Sep 2018 13:48:51 +0200 Subject: [PATCH 425/614] [rpi-firmware] support for old and new kernel --- .../{S30mountroot => S30mountroot-0} | 19 ++++++--- package/rpi-firmware/S30mountroot-1 | 35 ++++++++++++++++ .../{cmdline.txt => cmdline.txt-0} | 0 package/rpi-firmware/cmdline.txt-1 | 1 + package/rpi-firmware/rpi-firmware.mk | 41 ++++++++++++++++++- 5 files changed, 88 insertions(+), 8 deletions(-) rename package/rpi-firmware/{S30mountroot => S30mountroot-0} (56%) create mode 100755 package/rpi-firmware/S30mountroot-1 rename package/rpi-firmware/{cmdline.txt => cmdline.txt-0} (100%) create mode 100644 package/rpi-firmware/cmdline.txt-1 diff --git a/package/rpi-firmware/S30mountroot b/package/rpi-firmware/S30mountroot-0 similarity index 56% rename from package/rpi-firmware/S30mountroot rename to package/rpi-firmware/S30mountroot-0 index a1cfa4546934..67bdb4d4bf2b 100755 --- a/package/rpi-firmware/S30mountroot +++ b/package/rpi-firmware/S30mountroot-0 @@ -2,14 +2,21 @@ start() { - while true + + while [ ! -e /dev/mmcblk0p1 ]; + do + sleep 1 + done + + while [ ! -e /dev/mmcblk0p2 ]; do - if mount | grep /root > /dev/null; then - break; - else - mount -a && sleep 1; - fi + sleep 1 done + + # wait a bit for mount + sleep 1 + + mount -a } case "$1" in diff --git a/package/rpi-firmware/S30mountroot-1 b/package/rpi-firmware/S30mountroot-1 new file mode 100755 index 000000000000..89292245a2d0 --- /dev/null +++ b/package/rpi-firmware/S30mountroot-1 @@ -0,0 +1,35 @@ +#!/bin/sh + +start() +{ + + while [ ! -e /dev/mmcblk1p1 ]; + do + sleep 1 + done + + while [ ! -e /dev/mmcblk1p2 ]; + do + sleep 1 + done + + # wait a bit for mount + sleep 1 + + mount -a +} + +case "$1" in + start) + start + ;; + stop) + ;; + restart|reload) + start + ;; + *) + echo "Usage: $0 {start|stop|restart|reload}" >&2 + exit 1 + ;; +esac diff --git a/package/rpi-firmware/cmdline.txt b/package/rpi-firmware/cmdline.txt-0 similarity index 100% rename from package/rpi-firmware/cmdline.txt rename to package/rpi-firmware/cmdline.txt-0 diff --git a/package/rpi-firmware/cmdline.txt-1 b/package/rpi-firmware/cmdline.txt-1 new file mode 100644 index 000000000000..1ffb554fa702 --- /dev/null +++ b/package/rpi-firmware/cmdline.txt-1 @@ -0,0 +1 @@ +vt.global_cursor_default=0 root=/dev/mmcblk1p2 rootwait console=ttyAMA0,115200 quiet diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 8629786230cc..c84f0b645f80 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -34,32 +34,69 @@ define RPI_FIRMWARE_INSTALL_TARGET_CMDS endef endif # INSTALL_VCDBG +ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) define RPI_FIRMWARE_MOUNT_BOOT mkdir -p $(TARGET_DIR)/boot grep -q '^/dev/mmcblk0p1' $(TARGET_DIR)/etc/fstab || \ echo -e '/dev/mmcblk0p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab endef +define RPI_FIRMWARE_CMDLINE + $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-0 $(BINARIES_DIR)/rpi-firmware/cmdline.txt +endef +else +define RPI_FIRMWARE_MOUNT_BOOT + mkdir -p $(TARGET_DIR)/boot + grep -q '^/dev/mmcblk1p1' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk1p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab +endef +define RPI_FIRMWARE_CMDLINE + $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-1 $(BINARIES_DIR)/rpi-firmware/cmdline.txt +endef +endif ifeq ($(BR2_TARGET_ROOTFS_CPIO),y) +ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) define RPI_FIRMWARE_MOUNT_ROOT mkdir -p $(TARGET_DIR)/root grep -q '^/dev/mmcblk0p2' $(TARGET_DIR)/etc/fstab || \ echo -e '/dev/mmcblk0p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab - $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot \ + $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-0 \ $(TARGET_DIR)/etc/init.d/S30mountroot endef +else +define RPI_FIRMWARE_MOUNT_ROOT + mkdir -p $(TARGET_DIR)/root + grep -q '^/dev/mmcblk1p2' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk1p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab + $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-1 \ + $(TARGET_DIR)/etc/init.d/S30mountroot +endef +endif endif +ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) +define RPI_FIRMWARE_INSTALL_IMAGES_CMDS + $(INSTALL) -D -m 0644 $(@D)/boot/bootcode.bin $(BINARIES_DIR)/rpi-firmware/bootcode.bin + $(INSTALL) -D -m 0644 $(@D)/boot/start$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).elf $(BINARIES_DIR)/rpi-firmware/start.elf + $(INSTALL) -D -m 0644 $(@D)/boot/fixup$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).dat $(BINARIES_DIR)/rpi-firmware/fixup.dat + $(INSTALL) -D -m 0644 package/rpi-firmware/config-0.txt $(BINARIES_DIR)/rpi-firmware/config.txt + $(RPI_FIRMWARE_MOUNT_BOOT) + $(RPI_FIRMWARE_MOUNT_ROOT) + $(RPI_FIRMWARE_INSTALL_DTB) + $(RPI_FIRMWARE_INSTALL_DTB_OVERLAYS) +endef +else define RPI_FIRMWARE_INSTALL_IMAGES_CMDS $(INSTALL) -D -m 0644 $(@D)/boot/bootcode.bin $(BINARIES_DIR)/rpi-firmware/bootcode.bin $(INSTALL) -D -m 0644 $(@D)/boot/start$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).elf $(BINARIES_DIR)/rpi-firmware/start.elf $(INSTALL) -D -m 0644 $(@D)/boot/fixup$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).dat $(BINARIES_DIR)/rpi-firmware/fixup.dat $(INSTALL) -D -m 0644 package/rpi-firmware/config.txt $(BINARIES_DIR)/rpi-firmware/config.txt - $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt $(BINARIES_DIR)/rpi-firmware/cmdline.txt + $(RPI_FIRMWARE_CMDLINE) $(RPI_FIRMWARE_MOUNT_BOOT) $(RPI_FIRMWARE_MOUNT_ROOT) $(RPI_FIRMWARE_INSTALL_DTB) $(RPI_FIRMWARE_INSTALL_DTB_OVERLAYS) endef +endif $(eval $(generic-package)) From 63ddd5e9d47090910bf6424a9ce947eee80797cb Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 12 Sep 2018 13:49:50 +0200 Subject: [PATCH 426/614] [wpeframework] cleaning up --- package/wpe/wpeframework/S80WPEFramework | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index e2e28bab46ad..2586f42375b0 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -9,14 +9,36 @@ start() { #ulimit -c unlimited mount -a + # make sure netflix has proper mapping if [ ! -d /root/Netflix/dpi ]; then mkdir -p /root/Netflix/dpi ln -sfn /etc/playready /root/Netflix/dpi/playready fi - + + # wait a bit + sleep 1 + # needed for wayland/westeros/weston export XDG_RUNTIME_DIR=/tmp + # wait for cpuinfo to come available + while [ ! -f /proc/cpuinfo ]; + do + sleep 1 + done + + export DEF="123" + + # read proxy settings from /boot/proxy + if [ -f /boot/proxy ]; then + PROXY_IP=`cat /boot/proxy` + export http_proxy="http://$PROXY_IP" + export HTTP_PROXY="http://$PROXY_IP" + export no_proxy="127.0.0.1,localhost,ws.metrological.com,widgets.metrological.com" + export NO_PROXY="127.0.0.1,localhost,ws.metrological.com,widgets.metrological.com" + fi + export + echo -n "Starting WPEFramework: " start-stop-daemon -S -q -b -m -p /var/run/WPEFramework.pid --exec /usr/bin/WPEFramework -- -b -c /etc/WPEFramework/config.json /dev/null 2>&1 [ $? == 0 ] && echo "OK" || echo "FAIL" From 1af4c96481b38d88726bc36c3bf9de601e071e40 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 12 Sep 2018 20:10:35 +0200 Subject: [PATCH 427/614] [vss-sdk] Add gstreamer rename scripts --- package/vss-sdk/gst1/brcm.fix.sh | 17 +++++++++ package/vss-sdk/gst1/brcm.no_opus.fix.sh | 17 +++++++++ package/vss-sdk/gst1/gst1.fix.sh | 45 ++++++++++++++++++++++++ package/vss-sdk/gst1/gst1.plugins.fix.sh | 45 ++++++++++++++++++++++++ 4 files changed, 124 insertions(+) create mode 100755 package/vss-sdk/gst1/brcm.fix.sh create mode 100755 package/vss-sdk/gst1/brcm.no_opus.fix.sh create mode 100755 package/vss-sdk/gst1/gst1.fix.sh create mode 100755 package/vss-sdk/gst1/gst1.plugins.fix.sh diff --git a/package/vss-sdk/gst1/brcm.fix.sh b/package/vss-sdk/gst1/brcm.fix.sh new file mode 100755 index 000000000000..ddb713e5a2bb --- /dev/null +++ b/package/vss-sdk/gst1/brcm.fix.sh @@ -0,0 +1,17 @@ +#!/bin/bash + +patch_files () { + pushd $1 + if [ ! -f vss_patch_files.done ]; then + for f in `find -name Makefile.in -o -name Makefile.am -o -name configure.ac`; do \ + sed -i \ + -e "s;\[gstreamer-;\[wpe-gstreamer-;g" \ + -e "s;plugindir=.*;plugindir=\"\\\\$\(libdir\)/gstreamer\-\$\{GST_MAJORMINOR\}\-wpe\";g" \ + $f; \ + done + touch vss_patch_files.done + fi + popd +} + +patch_files $1 diff --git a/package/vss-sdk/gst1/brcm.no_opus.fix.sh b/package/vss-sdk/gst1/brcm.no_opus.fix.sh new file mode 100755 index 000000000000..94d98490d061 --- /dev/null +++ b/package/vss-sdk/gst1/brcm.no_opus.fix.sh @@ -0,0 +1,17 @@ +#!/bin/bash + +patch_files () { + pushd $1 + if [ ! -f disable_opus.done ]; then + for f in `find ${S} -name *.c -o -name *.h -type f`; do \ + sed -i \ + -e "s;case baudio_format_opus.*;;g" \ + -e "s;\"audio/x-opus\;\ \";;g" \ + $f; \ + done + touch disable_opus.done + fi + popd +} + +patch_files $1 diff --git a/package/vss-sdk/gst1/gst1.fix.sh b/package/vss-sdk/gst1/gst1.fix.sh new file mode 100755 index 000000000000..96152e0a275b --- /dev/null +++ b/package/vss-sdk/gst1/gst1.fix.sh @@ -0,0 +1,45 @@ +#!/bin/bash + +patch_files () { + pushd $1 + if [ ! -f vss_patch_files.done ]; then + for f in `ls pkgconfig/gstreamer*.pc.in`; \ + do \ + file=`echo $f | sed "s/.*\///"` ; \ + pc=`echo $f | sed -r "s/.+\/(.+)\..+/\1/"` ; \ + sed -i \ + -e "s;pluginsdir=.*;pluginsdir=\@PLUGINDIR\@;g" \ + -e "s;girdir=.*;girdir=${datadir}/girwpe-1.0;g" \ + -e "s;typelibdir=.*;typelibdir=${libdir}/giwperepository-1.0;g" \ + -e "s;datarootdir=.*;datarootdir=${prefix}/share/gstreamer-wpe;g" \ + -e "s;helpersdir=.*;;g" \ + -e "s;completionsdir=.*;;g" \ + -e "s;\ gstreamer-;\ wpe-gstreamer-;g" \ + -e "s/lgst/lwpegst/g" \ + $f ; \ + mv ${f} pkgconfig/wpe-${file} ; \ + done + sed -i -e "s;pkgconfig/gstreamer;pkgconfig/wpe-gstreamer;g" configure.ac + sed -i -e s/gstreamer/wpe-gstreamer/g pkgconfig/Makefile.in + sed -i -e s/gstreamer/wpe-gstreamer/g pkgconfig/Makefile.am + # correct plugin install location + sed -i -e "s;/gstreamer-\$GST_API_VERSION;/gstreamer-\$\{GST_API_VERSION\}-wpe;g" common/m4/gst-plugindir.m4 + #rename libs + for f in `find -name Makefile.in -o -name Makefile.am -o -name configure.ac`; do \ + sed -i \ + -e s/libgst/libwpegst/g \ + -e s/lgst/lwpegst/g \ + -e s/girepository/giwperepository/g \ + -e s/gir-1.0/girwpe-1.0/g \ + $f ; \ + done + sed -i -e "s;gst-plugin-scanner;wpegst-plugin-scanner;g" configure.ac + sed -i -e "s;gst-plugin-scanner;wpegst-plugin-scanner;g" gst/Makefile.am + sed -i -e "s;gst-ptp-helper;wpegst-ptp-helper;g" configure.ac + sed -i -e "s;gst-ptp-helper;wpegst-ptp-helper;g" libs/gst/net/Makefile.am + touch vss_patch_files.done + fi + popd +} + +patch_files $1 diff --git a/package/vss-sdk/gst1/gst1.plugins.fix.sh b/package/vss-sdk/gst1/gst1.plugins.fix.sh new file mode 100755 index 000000000000..776a70f87c34 --- /dev/null +++ b/package/vss-sdk/gst1/gst1.plugins.fix.sh @@ -0,0 +1,45 @@ +#!/bin/bash + +patch_files () { + pushd $1 + if [ ! -f vss_patch_files.done ]; then + for f in `ls pkgconfig/gstreamer*.pc.in`; \ + do \ + file=`echo $f | sed "s/.*\///"` ; \ + pc=`echo $f | sed -r "s/.+\/(.+)\..+/\1/"` ; \ + sed -i \ + -e "s;pluginsdir=.*;pluginsdir=\@PLUGINDIR\@;g" \ + -e "s;girdir=.*;girdir=${datadir}/girwpe-1.0;g" \ + -e "s;typelibdir=.*;typelibdir=${libdir}/giwperepository-1.0;g" \ + -e "s;datarootdir=.*;datarootdir=${prefix}/share/gstreamer-wpe;g" \ + -e "s;helpersdir=.*;;g" \ + -e "s;completionsdir=.*;;g" \ + -e "s;\ gstreamer-;\ wpe-gstreamer-;g" \ + -e "s/lgst/lwpegst/g" \ + $f ; \ + mv ${f} pkgconfig/wpe-${file} ; \ + done + sed -i -e "s;pkgconfig/gstreamer;pkgconfig/wpe-gstreamer;g" \ + -e "s;toolsdir\ gstreamer-;toolsdir\ wpe-gstreamer-;g" configure.ac + sed -i -e s/gstreamer/wpe-gstreamer/g pkgconfig/Makefile.in + sed -i -e s/gstreamer/wpe-gstreamer/g pkgconfig/Makefile.am + # This is for the package so it will pickup the correct pc files from sysroot. + sed -i -e s/\ gstreamer/\ wpe-gstreamer/g common/m4/gst-check.m4 + sed -i -e s/prefix\ gstreamer/prefix\ wpe-gstreamer/g configure.ac + # correct plugin install location + sed -i -e "s;/gstreamer-\$GST_API_VERSION;/gstreamer-\$\{GST_API_VERSION\}-wpe;g" common/m4/gst-plugindir.m4 + #rename libs + for f in `find -name Makefile.in -o -name Makefile.am -o -name configure.ac`; do \ + sed -i \ + -e s/libgst/libwpegst/g \ + -e s/lgst/lwpegst/g \ + -e s/girepository/giwperepository/g \ + -e s/gir-1.0/girwpe-1.0/g \ + $f ; \ + done + touch vss_patch_files.done + fi + popd +} + +patch_files $1 From e5a14a841ab4caa3ef0d2a0e6b3e0428f4fb67b2 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 12 Sep 2018 20:11:20 +0200 Subject: [PATCH 428/614] [gstreamer1] Rename libs if vss platform is selected --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 18 ++++++++++++++---- .../gst1-plugins-bad/gst1-plugins-bad.mk | 18 ++++++++++++++++++ .../gst1-plugins-base/gst1-plugins-base.mk | 18 ++++++++++++++++++ .../gst1-plugins-good/gst1-plugins-good.mk | 18 ++++++++++++++++++ .../gst1-plugins-ugly/gst1-plugins-ugly.mk | 18 ++++++++++++++++++ package/gstreamer1/gstreamer1/gstreamer1.mk | 18 ++++++++++++++++++ 6 files changed, 104 insertions(+), 4 deletions(-) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index ad76123cc6e1..3c1e96d1c452 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -137,12 +137,22 @@ endif ifeq ($(BR2_PACKAGE_HAS_OPUS_DECODER),) GST1_BCM_PKGDIR = "$(TOP_DIR)/package/gstreamer1/gst1-bcm" +endif -define GST1_BCM_APPLY_LOCAL_PATCHES - $(APPLY_PATCHES) $(@D) $(GST1_BCM_PKGDIR) 0001_remove_opus_support.patch.conditional; +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older version. +GST1_BCM_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GST1_BCM_APPLY_VSS_FIX + package/vss-sdk/gst1/brcm.no_opus.fix.sh ${@D} + package/vss-sdk/gst1/brcm.fix.sh ${@D} endef - -GST1_BCM_POST_PATCH_HOOKS += GST1_BCM_APPLY_LOCAL_PATCHES +GST1_BCM_POST_PATCH_HOOKS += GST1_BCM_APPLY_VSS_FIX endif $(eval $(autotools-package)) diff --git a/package/gstreamer1/gst1-plugins-bad/gst1-plugins-bad.mk b/package/gstreamer1/gst1-plugins-bad/gst1-plugins-bad.mk index a79aaad4e541..14bc256a0de6 100644 --- a/package/gstreamer1/gst1-plugins-bad/gst1-plugins-bad.mk +++ b/package/gstreamer1/gst1-plugins-bad/gst1-plugins-bad.mk @@ -862,4 +862,22 @@ endif # Use the following command to extract license info for plugins. # # find . -name 'plugin-*.xml' | xargs grep license +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older one. +GST1_PLUGINS_BAD_AUTORECONF = YES +GST1_PLUGINS_BAD_AUTORECONF_OPTS = -I $(@D)/common/m4 +GST1_PLUGINS_BAD_GETTEXTIZE = YES +GST1_PLUGINS_BAD_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GST1_PLUGINS_BAD_APPLY_VSS_FIX + package/vss-sdk/gst1/gst1.plugins.fix.sh ${@D} +endef +GST1_PLUGINS_BAD_POST_PATCH_HOOKS += GST1_PLUGINS_BAD_APPLY_VSS_FIX +endif + $(eval $(autotools-package)) diff --git a/package/gstreamer1/gst1-plugins-base/gst1-plugins-base.mk b/package/gstreamer1/gst1-plugins-base/gst1-plugins-base.mk index 86b813f73092..a2c70fb6a838 100644 --- a/package/gstreamer1/gst1-plugins-base/gst1-plugins-base.mk +++ b/package/gstreamer1/gst1-plugins-base/gst1-plugins-base.mk @@ -223,4 +223,22 @@ else GST1_PLUGINS_BASE_CONF_OPTS += --disable-vorbis endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older version. +GST1_PLUGINS_BASE_AUTORECONF = YES +GST1_PLUGINS_BASE_AUTORECONF_OPTS = -I $(@D)/common/m4 +GST1_PLUGINS_BASE_GETTEXTIZE = YES +GST1_PLUGINS_BASE_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GST1_PLUGINS_BASE_APPLY_VSS_FIX + package/vss-sdk/gst1/gst1.plugins.fix.sh ${@D} +endef +GST1_PLUGINS_BASE_POST_PATCH_HOOKS += GST1_PLUGINS_BASE_APPLY_VSS_FIX +endif + $(eval $(autotools-package)) diff --git a/package/gstreamer1/gst1-plugins-good/gst1-plugins-good.mk b/package/gstreamer1/gst1-plugins-good/gst1-plugins-good.mk index ad914209aaea..4f421ad36497 100644 --- a/package/gstreamer1/gst1-plugins-good/gst1-plugins-good.mk +++ b/package/gstreamer1/gst1-plugins-good/gst1-plugins-good.mk @@ -451,4 +451,22 @@ ifeq ($(BR2_PACKAGE_GST1_PLUGINS_DORNE),y) GST1_PLUGINS_GOOD_POST_PATCH_HOOKS += GST1_PLUGINS_GOOD_APPLY_DORNE_PATCHES endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older version. +GST1_PLUGINS_GOOD_AUTORECONF = YES +GST1_PLUGINS_GOOD_AUTORECONF_OPTS = -I $(@D)/common/m4 +GST1_PLUGINS_GOOD_GETTEXTIZE = YES +GST1_PLUGINS_GOOD_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GST1_PLUGINS_GOOD_APPLY_VSS_FIX + package/vss-sdk/gst1/gst1.plugins.fix.sh ${@D} +endef +GST1_PLUGINS_GOOD_POST_PATCH_HOOKS += GST1_PLUGINS_GOOD_APPLY_VSS_FIX +endif + $(eval $(autotools-package)) diff --git a/package/gstreamer1/gst1-plugins-ugly/gst1-plugins-ugly.mk b/package/gstreamer1/gst1-plugins-ugly/gst1-plugins-ugly.mk index 7d9fd62bf951..28ec516a1de6 100644 --- a/package/gstreamer1/gst1-plugins-ugly/gst1-plugins-ugly.mk +++ b/package/gstreamer1/gst1-plugins-ugly/gst1-plugins-ugly.mk @@ -136,4 +136,22 @@ endif # Use the following command to extract license info for plugins. # # find . -name 'plugin-*.xml' | xargs grep license +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older version. +GST1_PLUGINS_UGLY_AUTORECONF = YES +GST1_PLUGINS_UGLY_AUTORECONF_OPTS = -I $(@D)/common/m4 +GST1_PLUGINS_UGLY_GETTEXTIZE = YES +GST1_PLUGINS_UGLY_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GST1_PLUGINS_UGLY_APPLY_VSS_FIX + package/vss-sdk/gst1/gst1.plugins.fix.sh ${@D} +endef +GST1_PLUGINS_UGLY_POST_PATCH_HOOKS += GST1_PLUGINS_UGLY_APPLY_VSS_FIX +endif + $(eval $(autotools-package)) diff --git a/package/gstreamer1/gstreamer1/gstreamer1.mk b/package/gstreamer1/gstreamer1/gstreamer1.mk index 8f5d9138b686..0caba0f37c7a 100644 --- a/package/gstreamer1/gstreamer1/gstreamer1.mk +++ b/package/gstreamer1/gstreamer1/gstreamer1.mk @@ -66,4 +66,22 @@ ifeq ($(BR2_PACKAGE_GSTREAMER1_GIT),y) GSTREAMER1_DEPENDENCIES += gst1-common endif +ifeq ($(BR2_PACKAGE_VSS_SDK),y) +# this platform needs to run this gstreamer version parallel +# to an older version. +GSTREAMER1_AUTORECONF = YES +GSTREAMER1_AUTORECONF_OPTS = -I $(@D)/common/m4 +GSTREAMER1_GETTEXTIZE = YES +GSTREAMER1_CONF_OPTS += \ + --datadir=/usr/share/gstreamer-wpe \ + --datarootdir=/usr/share/gstreamer-wpe \ + --sysconfdir=/etc/gstreamer-wpe \ + --includedir=/usr/include/gstreamer-wpe \ + --program-prefix wpe +define GSTREAMER1_APPLY_VSS_FIX + package/vss-sdk/gst1/gst1.fix.sh ${@D} +endef +GSTREAMER1_POST_PATCH_HOOKS += GSTREAMER1_APPLY_VSS_FIX +endif + $(eval $(autotools-package)) From f388d9f62b8c59591b88326a9ba4507745cdbb5c Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 12 Sep 2018 20:12:36 +0200 Subject: [PATCH 429/614] [wpewebkit] If vss platform is selected link to renamed gstreamer --- .../9999-link_to_wpe_gstreamer.conditional | 36 +++++++++++++++++++ package/wpe/wpewebkit/wpewebkit.mk | 4 ++- 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional diff --git a/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional b/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional new file mode 100644 index 000000000000..270e90fff5bd --- /dev/null +++ b/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional @@ -0,0 +1,36 @@ +diff --git a/Source/cmake/FindGStreamer.cmake b/Source/cmake/FindGStreamer.cmake +index 4577817..6afa70a 100644 +--- a/Source/cmake/FindGStreamer.cmake ++++ b/Source/cmake/FindGStreamer.cmake +@@ -75,21 +75,21 @@ endmacro() + # ------------------------ + + # 1.1. Find headers and libraries +-FIND_GSTREAMER_COMPONENT(GSTREAMER gstreamer-1.0 gstreamer-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE gstreamer-base-1.0 gstbase-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER wpe-gstreamer-1.0 wpegstreamer-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE wpe-gstreamer-base-1.0 wpegstbase-1.0) + + # ------------------------- + # 2. Find GStreamer plugins + # ------------------------- + +-FIND_GSTREAMER_COMPONENT(GSTREAMER_APP gstreamer-app-1.0 gstapp-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO gstreamer-audio-1.0 gstaudio-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT gstreamer-fft-1.0 gstfft-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_GL gstreamer-gl-1.0 gstgl-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS gstreamer-mpegts-1.0>=1.4.0 gstmpegts-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS gstreamer-pbutils-1.0 gstpbutils-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG gstreamer-tag-1.0 gsttag-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO gstreamer-video-1.0 gstvideo-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_APP wpe-gstreamer-app-1.0 wpegstapp-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO wpe-gstreamer-audio-1.0 wpegstaudio-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT wpe-gstreamer-fft-1.0 wpegstfft-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_GL wpe-gstreamer-gl-1.0 wpegstgl-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS wpe-gstreamer-mpegts-1.0>=1.4.0 wpegstmpegts-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS wpe-gstreamer-pbutils-1.0 wpegstpbutils-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG wpe-gstreamer-tag-1.0 wpegsttag-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO wpe-gstreamer-video-1.0 wpegstvideo-1.0) + + # ------------------------------------------------ + # 3. Process the COMPONENTS passed to FIND_PACKAGE diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 4f28f2f0cf26..bc184dc1aa49 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -306,7 +306,9 @@ define WPEWEBKIT_APPLY_LOCAL_PATCHES $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0006-brcm-force-sink-av-factories.patch.conditional - $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0011-change-position-query-frequency-10ms.patch.conditional + # this platform needs to run this gstreamer version parallel + # to an older version. + $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 9999-link_to_wpe_gstreamer.patch.conditional endef WPEWEBKIT_POST_PATCH_HOOKS += WPEWEBKIT_APPLY_LOCAL_PATCHES From f0b50cbd1cb07ec7075535eee821b5d1c01c7f6e Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 12 Sep 2018 20:13:46 +0200 Subject: [PATCH 430/614] [board] update vss scripts --- board/bcm/vss.sh | 10 ----- board/bcm/vss.txt | 104 +++------------------------------------------- 2 files changed, 6 insertions(+), 108 deletions(-) diff --git a/board/bcm/vss.sh b/board/bcm/vss.sh index 24e88624307b..dfd3dfa8c27a 100755 --- a/board/bcm/vss.sh +++ b/board/bcm/vss.sh @@ -22,20 +22,10 @@ do done < "${BOARD_DIR}/vss.txt" # Append missing folders -echo "usr/lib/gstreamer-1.0" >> "${ROOTFS_FILES}" echo "usr/lib/gio" >> "${ROOTFS_FILES}" rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_INSTALL_DIR}" -# select general libs that need priority over default version on the box -mkdir -p "${ROOTFS_INSTALL_DIR}/usr/ml_libs/gstreamer-1.0" -find "${ROOTFS_INSTALL_DIR}/usr/lib/" -maxdepth 1 -name "libgst*" -exec mv {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; -find "${ROOTFS_INSTALL_DIR}/usr/lib/" -maxdepth 1 -name "libbrcm*" -exec mv {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; -mv -f "${ROOTFS_INSTALL_DIR}/usr/lib/gstreamer-1.0" "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" -# workaround to prevent mixing libs and slow HTTPS -find "${TARGET_DIR}/usr/lib/" -maxdepth 1 -name "libsoup*" -exec cp -pf {} "${ROOTFS_INSTALL_DIR}/usr/ml_libs/" \; - - # WPEFramework launcher cp -apf "${BOARD_DIR}/start.vss.sh" "${ROOTFS_DIR}/usr/bin/wpe" diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt index 9c7f084eb3a2..c3e49f1e29f3 100644 --- a/board/bcm/vss.txt +++ b/board/bcm/vss.txt @@ -1,100 +1,8 @@ -WPEFramework -WPENetworkProcess -WPEProcess -WPEStorageProcess -WPEWebDriver -WPEWebProcess -gst-inspect-1.0 -gst-launch-1.0 -gst-plugin-scanner -gst-typefind-1.0 -libWPE-platform.so -libWPE.so -libWPEBackend-default.so -libWPEBackend-rdk.so -libWPEBackend.so -libWPEFrameworkCore.so -libWPEFrameworkCompositor.so -libWPEFrameworkCryptalgo.so -libWPEFrameworkDIALServer.so -libWPEFrameworkDeviceInfo.so -libWPEFrameworkInterfaces.so -libWPEFrameworkMonitor.so -libWPEFrameworkOCDM.so -libWPEFrameworkPlugins.so -libWPEFrameworkProtocols.so -libWPEFrameworkProxyStubs.so -libWPEFrameworkRemoteControl.so -libWPEFrameworkSnapshot.so -libWPEFrameworkTraceControl.so -libWPEFrameworkTracing.so -libWPEFrameworkVirtualInput.so -libWPEFrameworkWebKitBrowser.so -libWPEInjectedBundle.so -libWPEWebInspectorResources.so -libWPEWebKit.so -libatomic.so -libbrcmaudiodecoder.so -libbrcmaudiofilter.so -libbrcmaudiosink.so -libbrcmgstutil.so -libbrcmvideodecoder.so -libbrcmvideosink.so -libbrcmvidfilter.so -libcares.so -libcrypto.so -libcurl.so +WPE* +libWPE*.so +libwpegst*.so +libbrcm*.so +wpegst-* libepoxy.so -libevdev.so -libfaad.so -libgcrypt.so -libgmp.so -libgnutls-openssl.so -libgnutls.so -libgnutlsxx.so -libgraphite2.so -libgstadaptivedemux-1.0.so -libgstapp-1.0.so -libgstapp.so -libgstaudio-1.0.so -libgstaudioconvert.so -libgstaudioparsers.so -libgstaudioresample.so -libgstbase-1.0.so -libgstcodecparsers-1.0.so -libgstcoreelements.so -libgstfaad.so -libgstfft-1.0.so -libgstgio.so -libgstinterleave.so -libgstisomp4.so -libgstmatroska.so -libgstmpegts-1.0.so -libgstnet-1.0.so -libgstpbutils-1.0.so -libgstplayback.so -libgstreamer-1.0.so -libgstriff-1.0.so -libgstrtp-1.0.so -libgsttag-1.0.so -libgsttypefindfunctions.so -libgsturidownloader-1.0.so -libgstvideo-1.0.so -libharfbuzz-icu.so -libhogweed.so -libiconv.so -libinput.so -libintl.so -libjpeg.so -libmng.so -libmpg123.so -libmtdev.so -libnettle.so libocdm.so -librpc.so -libssl.so -libtasn1.so -libudev.so -libunistring.so -libwebsocket.so -libxslt.so +libjpeg*.so From 0f82a4907c3c26204fdfea83f244d274fd110218 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 07:25:19 +0200 Subject: [PATCH 431/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index bc184dc1aa49..ac418b209188 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 9450fb4c00fd0ad4d5e9f5d465c81229a24ad2b7 +WPEWEBKIT_VERSION_VALUE = ad5e8326cb2d1f1047edd5a1716d276acc72c0bd endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 9a2096db66a9bd4c503e04170626b0528abba1f0 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 07:26:20 +0200 Subject: [PATCH 432/614] [wpebackend-rdk] patch for wpeframework --- .../0000-wpeframework-limit-draws.patch | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch diff --git a/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch b/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch new file mode 100644 index 000000000000..8920eb4155f8 --- /dev/null +++ b/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch @@ -0,0 +1,58 @@ +diff --git a/src/wpeframework/view-backend.cpp b/src/wpeframework/view-backend.cpp +index 156f2d2..b48c582 100644 +--- a/src/wpeframework/view-backend.cpp ++++ b/src/wpeframework/view-backend.cpp +@@ -47,18 +47,29 @@ struct ViewBackend : public IPC::Host::Handler { + void ackBufferCommit(); + void initialize(); + ++ static gboolean vsyncCallback(gpointer); ++ + struct wpe_view_backend* backend; + IPC::Host ipcHost; ++ GSource* vsyncSource; ++ bool bufferAckPending { false }; + }; + + ViewBackend::ViewBackend(struct wpe_view_backend* backend) + : backend(backend) + { + ipcHost.initialize(*this); ++ ++ vsyncSource = g_timeout_source_new(1000 / 60); ++ g_source_set_callback(vsyncSource, static_cast(vsyncCallback), this, nullptr); ++ g_source_set_priority(vsyncSource, G_PRIORITY_HIGH + 30); ++ g_source_set_can_recurse(vsyncSource, TRUE); ++ g_source_attach(vsyncSource, g_main_context_get_thread_default()); + } + + ViewBackend::~ViewBackend() + { ++ g_source_destroy(vsyncSource); + ipcHost.deinitialize(); + } + +@@ -95,7 +106,7 @@ void ViewBackend::handleMessage(char* data, size_t size) + } + case IPC::BufferCommit::code: + { +- ackBufferCommit(); ++ bufferAckPending = true; + break; + } + default: +@@ -128,6 +139,14 @@ void ViewBackend::ackBufferCommit() + wpe_view_backend_dispatch_frame_displayed(backend); + } + ++gboolean ViewBackend::vsyncCallback(gpointer data) ++{ ++ auto& backend = *static_cast(data); ++ if (backend.bufferAckPending) ++ backend.ackBufferCommit(); ++ backend.bufferAckPending = false; ++} ++ + } // namespace WPEFramework + + extern "C" { From a69ed1066c47ad909897df669bd03264153d2fc0 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 10:49:14 +0200 Subject: [PATCH 433/614] [arris] add mount script for cache --- board/arris/S30mountroot | 35 +++++++++++++++++++++++++++++++++++ board/arris/post-build.sh | 5 ++++- 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 board/arris/S30mountroot diff --git a/board/arris/S30mountroot b/board/arris/S30mountroot new file mode 100644 index 000000000000..866db3369c63 --- /dev/null +++ b/board/arris/S30mountroot @@ -0,0 +1,35 @@ +#!/bin/sh + +start() +{ + + while [ ! -e /dev/sda1 ]; + do + sleep 1 + done + + while [ ! -e /dev/sda2 ]; + do + sleep 1 + done + + # wait a bit for mount + sleep 1 + + mount -a +} + +case "$1" in + start) + start + ;; + stop) + ;; + restart|reload) + start + ;; + *) + echo "Usage: $0 {start|stop|restart|reload}" >&2 + exit 1 + ;; +esac diff --git a/board/arris/post-build.sh b/board/arris/post-build.sh index a610d68a3064..889dcffd8d25 100755 --- a/board/arris/post-build.sh +++ b/board/arris/post-build.sh @@ -23,6 +23,9 @@ mkdir -p "${TARGET_DIR}/boot" grep -q '^/dev/sda1' "${TARGET_DIR}/etc/fstab" || \ echo -e '/dev/sda1 /boot vfat defaults 0 0' >> "${TARGET_DIR}/etc/fstab" -mkdir -p "$(TARGET_DIR)/root" +mkdir -p "${TARGET_DIR}/root" grep -q '^/dev/sda2' "${TARGET_DIR}/etc/fstab" || \ echo -e '/dev/sda2 /root ext4 defaults 0 0' >> "${TARGET_DIR}/etc/fstab" + +install -m 0755 -D board/arris/S30mountroot \ + ${TARGET_DIR}/etc/init.d/S30mountroot From 20d6630372f6b4bcd469f171129ab7d6cad5c74c Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 11:00:24 +0200 Subject: [PATCH 434/614] [wpeframework] use index.html from boot if exists --- package/wpe/wpeframework/S80WPEFramework | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index 2586f42375b0..4da4a981878c 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -7,6 +7,10 @@ start() { #echo "/root/cores/core-pid_%p--process%E" > /proc/sys/kernel/core_pattern #mkdir -p /root/cores #ulimit -c unlimited + + # wait a bit + sleep 3 + mount -a # make sure netflix has proper mapping @@ -15,9 +19,6 @@ start() { ln -sfn /etc/playready /root/Netflix/dpi/playready fi - # wait a bit - sleep 1 - # needed for wayland/westeros/weston export XDG_RUNTIME_DIR=/tmp @@ -27,7 +28,10 @@ start() { sleep 1 done - export DEF="123" + # override index.html + if [ -f /boot/index.html ]; then + cp /boot/index.html /www/ + fi # read proxy settings from /boot/proxy if [ -f /boot/proxy ]; then @@ -51,7 +55,6 @@ stop() { } restart() { stop - sleep 3 start } From 77b5f34fe7f81432bb1a3799bc39688c973a033a Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 11:01:17 +0200 Subject: [PATCH 435/614] [wpebackend-rdk] remove after testing --- .../0000-wpeframework-limit-draws.patch | 58 ------------------- 1 file changed, 58 deletions(-) delete mode 100644 package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch diff --git a/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch b/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch deleted file mode 100644 index 8920eb4155f8..000000000000 --- a/package/wpe/wpebackend-rdk/0000-wpeframework-limit-draws.patch +++ /dev/null @@ -1,58 +0,0 @@ -diff --git a/src/wpeframework/view-backend.cpp b/src/wpeframework/view-backend.cpp -index 156f2d2..b48c582 100644 ---- a/src/wpeframework/view-backend.cpp -+++ b/src/wpeframework/view-backend.cpp -@@ -47,18 +47,29 @@ struct ViewBackend : public IPC::Host::Handler { - void ackBufferCommit(); - void initialize(); - -+ static gboolean vsyncCallback(gpointer); -+ - struct wpe_view_backend* backend; - IPC::Host ipcHost; -+ GSource* vsyncSource; -+ bool bufferAckPending { false }; - }; - - ViewBackend::ViewBackend(struct wpe_view_backend* backend) - : backend(backend) - { - ipcHost.initialize(*this); -+ -+ vsyncSource = g_timeout_source_new(1000 / 60); -+ g_source_set_callback(vsyncSource, static_cast(vsyncCallback), this, nullptr); -+ g_source_set_priority(vsyncSource, G_PRIORITY_HIGH + 30); -+ g_source_set_can_recurse(vsyncSource, TRUE); -+ g_source_attach(vsyncSource, g_main_context_get_thread_default()); - } - - ViewBackend::~ViewBackend() - { -+ g_source_destroy(vsyncSource); - ipcHost.deinitialize(); - } - -@@ -95,7 +106,7 @@ void ViewBackend::handleMessage(char* data, size_t size) - } - case IPC::BufferCommit::code: - { -- ackBufferCommit(); -+ bufferAckPending = true; - break; - } - default: -@@ -128,6 +139,14 @@ void ViewBackend::ackBufferCommit() - wpe_view_backend_dispatch_frame_displayed(backend); - } - -+gboolean ViewBackend::vsyncCallback(gpointer data) -+{ -+ auto& backend = *static_cast(data); -+ if (backend.bufferAckPending) -+ backend.ackBufferCommit(); -+ backend.bufferAckPending = false; -+} -+ - } // namespace WPEFramework - - extern "C" { From e84e9ab0b00c0b94e2d39752b90f8cb237b78b22 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 11:23:46 +0200 Subject: [PATCH 436/614] [rpi-firmware] fix build for non 3b+ builds --- package/rpi-firmware/rpi-firmware.mk | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index c84f0b645f80..5ed79cf03cf2 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -74,18 +74,6 @@ endef endif endif -ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) -define RPI_FIRMWARE_INSTALL_IMAGES_CMDS - $(INSTALL) -D -m 0644 $(@D)/boot/bootcode.bin $(BINARIES_DIR)/rpi-firmware/bootcode.bin - $(INSTALL) -D -m 0644 $(@D)/boot/start$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).elf $(BINARIES_DIR)/rpi-firmware/start.elf - $(INSTALL) -D -m 0644 $(@D)/boot/fixup$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).dat $(BINARIES_DIR)/rpi-firmware/fixup.dat - $(INSTALL) -D -m 0644 package/rpi-firmware/config-0.txt $(BINARIES_DIR)/rpi-firmware/config.txt - $(RPI_FIRMWARE_MOUNT_BOOT) - $(RPI_FIRMWARE_MOUNT_ROOT) - $(RPI_FIRMWARE_INSTALL_DTB) - $(RPI_FIRMWARE_INSTALL_DTB_OVERLAYS) -endef -else define RPI_FIRMWARE_INSTALL_IMAGES_CMDS $(INSTALL) -D -m 0644 $(@D)/boot/bootcode.bin $(BINARIES_DIR)/rpi-firmware/bootcode.bin $(INSTALL) -D -m 0644 $(@D)/boot/start$(BR2_PACKAGE_RPI_FIRMWARE_BOOT).elf $(BINARIES_DIR)/rpi-firmware/start.elf @@ -97,6 +85,5 @@ define RPI_FIRMWARE_INSTALL_IMAGES_CMDS $(RPI_FIRMWARE_INSTALL_DTB) $(RPI_FIRMWARE_INSTALL_DTB_OVERLAYS) endef -endif $(eval $(generic-package)) From ddab33d3a1785e8f6ddb906ae39152869c6d4567 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Thu, 13 Sep 2018 13:13:42 +0200 Subject: [PATCH 437/614] [bcm-refsw] Generate nexus pkg-config files --- package/bcm-refsw/bcm-refsw.mk | 2 + package/bcm-refsw/generate_nexus_pc.sh | 76 ++++++++++++++++++++++++++ package/bcm-refsw/nexus.inc | 9 +++ package/bcm-refsw/nexus.pc.template | 10 ++++ 4 files changed, 97 insertions(+) create mode 100755 package/bcm-refsw/generate_nexus_pc.sh create mode 100644 package/bcm-refsw/nexus.pc.template diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 69663900a4e9..dc0fff4671ce 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -150,6 +150,7 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_WAYLAND_EGL) $(BCM_REFSW_BUILD_NEXUS_LIBB_OS) $(BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS) + $(BCM_REFSW_GENERATE_NEXUS_PC) endef define BCM_REFSW_INSTALL_STAGING_CMDS @@ -160,6 +161,7 @@ define BCM_REFSW_INSTALL_STAGING_CMDS $(call BCM_REFSW_INSTALL_SAGE_SRAI_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_PMLIB_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS_DEV, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_NEXUS_PC, $(STAGING_DIR)) endef define BCM_REFSW_INSTALL_TARGET_CMDS diff --git a/package/bcm-refsw/generate_nexus_pc.sh b/package/bcm-refsw/generate_nexus_pc.sh new file mode 100755 index 000000000000..c31879cb6813 --- /dev/null +++ b/package/bcm-refsw/generate_nexus_pc.sh @@ -0,0 +1,76 @@ +#!/bin/bash + +read_config () { + local __resultvar=$1 + + config_file=`find $2 -name nexus_config.h` + + while read -r line + do + defines+=`echo $line | awk 'match($0, /#define\s+(\w+)\s*(.*)/, a) { if (a[2] != "") {print "-D"a[1]"="a[2]}}'` + done < "$config_file" + + eval $__resultvar="'$defines'" +} + +parse_platform_app () { + local __resultvar=$1 + + platform_app=`find $2 -name platform_app.inc` + tmp_file="/tmp/"`cat /dev/urandom | tr -dc 'a-zA-Z0-9' | fold -w 32 | head -n 1` + + while read -r line + do + if [[ $line =~ "=" ]]; then + sanitized=`echo $line | sed -E 's;\s+[?]*[=]+\s*;=\";'` + echo $sanitized'"' >> $tmp_file + fi + done < "$platform_app" + + eval $__resultvar="'$tmp_file'" +} + + +############################################################################## +# IN 1 Location where platform_app.inc can be found +# IN 2 Location of nexus.pc.template +# IN 3 Location where to output th pc files +############################################################################## +generate () { + template_pc="$2" + + parse_platform_app safe_platform_app "$1" + source $safe_platform_app + + for f in $NEXUS_CFLAGS + do + if [[ $f == -D* && $f != -D_* ]]; then + defines+=" $f" + fi + if [[ $f == -I* ]]; then + includes+=" $f" + fi + done + + sed -e "s;%VERSION_MAJOR%;${NEXUS_PLATFORM_VERSION_MAJOR};g" \ + -e "s;%VERSION_MINOR%;${NEXUS_PLATFORM_VERSION_MINOR};g" \ + -e "s;%NAME%;nexus;g" \ + -e "s;%DESCRIPTION%;Broadcom Nexus;g" \ + -e "s;%LIBS%;${NEXUS_LD_LIBRARIES};g" \ + -e "s;%INCLUDES%;${includes};g" \ + -e "s;%DEFINES%;${defines};g" \ + "$template_pc" > "$3"/nexus.pc + + sed -e "s;%VERSION_MAJOR%;${NEXUS_PLATFORM_VERSION_MAJOR};g" \ + -e "s;%VERSION_MINOR%;${NEXUS_PLATFORM_VERSION_MINOR};g" \ + -e "s;%NAME%;nexus-client;g" \ + -e "s;%DESCRIPTION%;Broadcom Nexus Client;g" \ + -e "s;%LIBS%;${NEXUS_CLIENT_LD_LIBRARIES};g" \ + -e "s;%INCLUDES%;${includes};g" \ + -e "s;%DEFINES%;${defines};g" \ + "$template_pc" > "$3"/nexus-client.pc + + rm $safe_platform_app +} + +generate $@ diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index c9eee5d0bf82..da551a0633f4 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -163,3 +163,12 @@ define BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS $(INSTALL) -m 755 -D $(BCM_REFSW_BIN)/../core/linuxkernel.$(ARCH)-linux.driver/libnexus_driver.a $(STAGING_DIR)/usr/include/refsw/linuxkernel endef endif + +define BCM_REFSW_GENERATE_NEXUS_PC + package/bcm-refsw/generate_nexus_pc.sh ${BCM_REFSW_BIN} package/bcm-refsw/nexus.pc.template ${BCM_REFSW_OUTPUT} +endef + +define BCM_REFSW_INSTALL_NEXUS_PC + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/nexus.pc $(1)/usr/lib/pkgconfig/ + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/nexus-client.pc $(1)/usr/lib/pkgconfig/ +endef diff --git a/package/bcm-refsw/nexus.pc.template b/package/bcm-refsw/nexus.pc.template new file mode 100644 index 000000000000..c0cc1898139c --- /dev/null +++ b/package/bcm-refsw/nexus.pc.template @@ -0,0 +1,10 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${exec_prefix}/lib +includedir=${prefix}/include/refsw + +Name: %NAME% +Description: %DESCRIPTION% +Version: %VERSION_MAJOR%.%VERSION_MINOR% +Libs: %LIBS% +Cflags: -I${includedir} %INCLUDES% %DEFINES% From 5ca7d6418c64dcf5d512af9e31cd584064fc2dda Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 13 Sep 2018 13:58:33 +0200 Subject: [PATCH 438/614] [rpi] set overclock more generic --- board/raspberrypi/post-image.sh | 103 +++++++++++--------------------- 1 file changed, 35 insertions(+), 68 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 2a385c1fb8bb..1588481faa37 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -20,19 +20,21 @@ __EOF__ fi fi -for i in "$@" -do -case "$i" in - --arm64) +AARCH64="$(grep ^BR2_aarch64=y ${BR2_CONFIG})" +if [ "x${AARCH64}" != "x" ]; then if ! grep -qE '^arm_64bit=1' "${BINARIES_DIR}/rpi-firmware/config.txt"; then echo "Adding 'arm_64bit=1' to config.txt." cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" -# Set to 64bit +# Force 64bit arm_64bit=1 __EOF__ fi - ;; +fi + +for i in "$@" +do +case "$i" in --add-pi3-miniuart-bt-overlay) if [ "x${BLUETOOTH}" = "x" ]; then if ! grep -qE '^dtoverlay=pi3-miniuart-bt' "${BINARIES_DIR}/rpi-firmware/config.txt"; then @@ -74,58 +76,6 @@ __EOF__ # Force dvi output hdmi_drive=2 -__EOF__ - fi - ;; - --overclock-pi012) - if ! grep -qE '^arm_freq=' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'overclock=pi012' to config.txt." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" - -# Overclock -arm_freq=1000 -gpu_freq=500 -sdram_freq=500 -over_voltage=6 -avoid_warnings=1 -__EOF__ - fi - ;; - --overclock-pi3) - if ! grep -qE '^arm_freq=' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'overclock=pi3' to config.txt." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" - -# Overclock -arm_freq=1350 -gpu_freq=500 -sdram_freq=500 -over_voltage=5 -avoid_warnings=1 -__EOF__ - fi - ;; - --overclock-pi3+) - if ! grep -qE '^arm_freq=' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'overclock=pi3+' to config.txt." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" - -# Overclock -arm_freq=1500 -gpu_freq=500 -sdram_freq=560 -over_voltage=5 -avoid_warnings=1 -__EOF__ - fi - ;; - --overclock-avoid) - if ! grep -qE '^avoid_warnings=' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'overclock=avoid' to config.txt." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" - -# Overclock -avoid_warnings=1 __EOF__ fi ;; @@ -207,20 +157,37 @@ __EOF__ mv "${BINARIES_DIR}/rpi-firmware/config_.txt" "${BINARIES_DIR}/rpi-firmware/config.txt" fi ;; -esac -done - -AARCH64="$(grep ^BR2_aarch64=y ${BR2_CONFIG})" -if [ "x${AARCH64}" != "x" ]; then - if ! grep -qE '^arm_64bit=1' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'arm_64bit=1' to config.txt." + --overclock*) + if ! grep -qE '^arm_freq=' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'overclock' to config.txt." cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" -# Force 64bit -arm_64bit=1 +# Overclock +[pi0] +[pi0w] +[pi1] +[pi2] +arm_freq=1000 +gpu_freq=500 +sdram_freq=500 +over_voltage=6 +[pi3] +arm_freq=1350 +gpu_freq=500 +sdram_freq=500 +over_voltage=5 +[pi3+] +arm_freq=1500 +gpu_freq=500 +sdram_freq=560 +over_voltage=5 +[all] +avoid_warnings=1 __EOF__ fi -fi + ;; +esac +done INITRAMFS="$(grep ^BR2_TARGET_ROOTFS_INITRAMFS=y ${BR2_CONFIG})" ROOTFS_CPIO="$(grep ^BR2_TARGET_ROOTFS_CPIO=y ${BR2_CONFIG})" From ea1879a297ac53ef4366d1087f43f61720609c7f Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 14 Sep 2018 10:21:03 +0200 Subject: [PATCH 439/614] [rpi23] disable vlan on new kernel --- board/raspberrypi/rpi23-linux-4.14.config | 1 - 1 file changed, 1 deletion(-) diff --git a/board/raspberrypi/rpi23-linux-4.14.config b/board/raspberrypi/rpi23-linux-4.14.config index 05db2a4d856f..bc93e6d2e661 100644 --- a/board/raspberrypi/rpi23-linux-4.14.config +++ b/board/raspberrypi/rpi23-linux-4.14.config @@ -58,7 +58,6 @@ CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y -CONFIG_VLAN_8021Q=y CONFIG_BT=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y From 1d9790e6ff986b6877c58918be8a9298766c5a52 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 14 Sep 2018 10:40:09 +0200 Subject: [PATCH 440/614] [rpi] support for config.json in index.html --- board/raspberrypi/index.html | 60 ++++++++++++++++++++++++++++----- board/raspberrypi/post-build.sh | 8 ++++- 2 files changed, 58 insertions(+), 10 deletions(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index fb99ff5e3dcd..80a6483be1aa 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -34,7 +34,7 @@ div#logo div { width: 45%; height: 45%; -} +} div#logo.animate div { opacity: 0; animation: fade 3s linear infinite; @@ -117,7 +117,8 @@ (function (host, lan, wlan) { var logoEl = document.getElementById('logo'), statusEl = document.getElementById('status'), - interfacesEl = document.getElementById('interfaces'); + interfacesEl = document.getElementById('interfaces'), + deviceId; function delay(t, v) { return new Promise((resolve) => { setTimeout(resolve.bind(null, v), t) @@ -132,7 +133,7 @@ resolve(interfaces); }); } - function wpe(arr) { + function xhr(method, url, body) { return new Promise((resolve, reject) => { var http = new XMLHttpRequest(); http.onreadystatechange = (event) => { @@ -140,7 +141,7 @@ if (req.readyState == 4) { if (req.status == 200) { try { - resolve(arr[0] === 'GET' ? JSON.parse(req.responseText) : undefined); + resolve(method === 'GET' ? JSON.parse(req.responseText) : undefined); } catch(err) { reject(err); } @@ -150,15 +151,20 @@ } }; - http.open(arr[0] || 'GET', `http://${host}/Service${arr[1]}`, true); - http.send(arr[2]); + http.open(method || 'GET', url, true); + http.send(body); }); } + function wpe(arr) { + return xhr(arr[0], `http://${host}/Service${arr[1]}`, arr[2]); + } function interfaces() { return new Promise((resolve, reject) => { wpe(['GET', '/DeviceInfo']) .then((deviceInfo) => { var result = []; + if (deviceInfo.systeminfo.deviceid) + deviceId = deviceInfo.systeminfo.deviceid; if (!deviceInfo.addresses) return resolve(result); for (var i = 0; i < deviceInfo.addresses.length; i++) { if (Array.isArray(deviceInfo.addresses[i].ip) && deviceInfo.addresses[i].ip[0] !== '127.0.0.1') @@ -168,6 +174,25 @@ }); }); } + function configUX() { + return xhr('GET', '/config.json'); + } + function loadUX(config) { + return new Promise((resolve, reject) => { + var id = encodeURIComponent(deviceId); + xhr('GET', `${config.ux}${id}`) + .then((result) => { + if (result && result.url) + wpe(['PUT', '/Controller/Activate/UX']) + .then(wpe.bind(null, ['POST', '/UX/URL', `{"url":"${result.url}"}`])) + .then(resolve) + .catch(reject); + else + reject(); + }) + .catch(reject); + }); + } return new Promise((resolve, reject) => { var joining = false; var socket = new WebSocket(`ws://${host}/Service/Controller`, 'notification'); @@ -201,6 +226,8 @@ joining = false; } interfaces().then(log); + } else if (data.data.running) { + statusEl.innerHTML = `Acquiring Network (${data.data.interface})`; } else if (data.data.status === 11) { // Ignore wlan DHCP failure when not in joining progress if (data.data.interface === wlan && !joining) return; @@ -209,9 +236,24 @@ .catch(reject); } } - if (data.events && data.events.Decryption) { - logoEl.className = ''; - statusEl.innerHTML = 'We're ready!'; + if (data.callsign === 'UX' && data.data && data.data.url && data.data.loaded) { + delay(5000).then(wpe.bind(null, ['PUT', '/Controller/Deactivate/WebKitBrowser'])); + } + if (data.subsystems && data.subsystems.Internet) { + statusEl.innerHTML = 'We're connected!'; + } + if (data.subsystems && data.subsystems.Time) { + statusEl.innerHTML = 'Loading UX'; + configUX() + .then(loadUX) + .then(() => { + logoEl.className = ''; + statusEl.innerHTML = 'We're ready!'; + }) + .catch((err) => { + statusEl.innerHTML = 'Something went wrong (' + deviceId + ')'; + }); + } }; socket.onopen = () => { diff --git a/board/raspberrypi/post-build.sh b/board/raspberrypi/post-build.sh index 2261c1629ad3..54068fa00959 100755 --- a/board/raspberrypi/post-build.sh +++ b/board/raspberrypi/post-build.sh @@ -13,12 +13,18 @@ if [ -f "${BOARD_DIR}/libgstfluac3dec.so" ]; then cp -pf "${BOARD_DIR}/libgstfluac3dec.so" "${TARGET_DIR}/usr/lib/gstreamer-1.0/" fi -# Copy index.html page for WPE Framework +# Copy index.html page for boot up if [ -f "${BOARD_DIR}/index.html" ]; then mkdir -p "${TARGET_DIR}/www/" cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" fi +# Copy config.json to webserver +if [ -f "${BOARD_DIR}/config.json" ]; then + mkdir -p "${TARGET_DIR}/www/" + cp -pf "${BOARD_DIR}/config.json" "${TARGET_DIR}/www/" +fi + # Copy keymap for OSMC remote if [ -f "${BOARD_DIR}/osmc-devinput-remote.json" ]; then mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/" From 06374274c0e667b5c52e94782b116372fa9706c1 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Wed, 19 Sep 2018 09:01:38 +0200 Subject: [PATCH 441/614] [wpewebkit] Rename conditional patch --- .../9999-link_to_wpe_gstreamer.conditional | 36 -------- ...99-link_to_wpe_gstreamer.patch.conditional | 84 +++++++++++++++++++ 2 files changed, 84 insertions(+), 36 deletions(-) delete mode 100644 package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional create mode 100644 package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.patch.conditional diff --git a/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional b/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional deleted file mode 100644 index 270e90fff5bd..000000000000 --- a/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.conditional +++ /dev/null @@ -1,36 +0,0 @@ -diff --git a/Source/cmake/FindGStreamer.cmake b/Source/cmake/FindGStreamer.cmake -index 4577817..6afa70a 100644 ---- a/Source/cmake/FindGStreamer.cmake -+++ b/Source/cmake/FindGStreamer.cmake -@@ -75,21 +75,21 @@ endmacro() - # ------------------------ - - # 1.1. Find headers and libraries --FIND_GSTREAMER_COMPONENT(GSTREAMER gstreamer-1.0 gstreamer-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE gstreamer-base-1.0 gstbase-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER wpe-gstreamer-1.0 wpegstreamer-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE wpe-gstreamer-base-1.0 wpegstbase-1.0) - - # ------------------------- - # 2. Find GStreamer plugins - # ------------------------- - --FIND_GSTREAMER_COMPONENT(GSTREAMER_APP gstreamer-app-1.0 gstapp-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO gstreamer-audio-1.0 gstaudio-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT gstreamer-fft-1.0 gstfft-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_GL gstreamer-gl-1.0 gstgl-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS gstreamer-mpegts-1.0>=1.4.0 gstmpegts-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS gstreamer-pbutils-1.0 gstpbutils-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG gstreamer-tag-1.0 gsttag-1.0) --FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO gstreamer-video-1.0 gstvideo-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_APP wpe-gstreamer-app-1.0 wpegstapp-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO wpe-gstreamer-audio-1.0 wpegstaudio-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT wpe-gstreamer-fft-1.0 wpegstfft-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_GL wpe-gstreamer-gl-1.0 wpegstgl-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS wpe-gstreamer-mpegts-1.0>=1.4.0 wpegstmpegts-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS wpe-gstreamer-pbutils-1.0 wpegstpbutils-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG wpe-gstreamer-tag-1.0 wpegsttag-1.0) -+FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO wpe-gstreamer-video-1.0 wpegstvideo-1.0) - - # ------------------------------------------------ - # 3. Process the COMPONENTS passed to FIND_PACKAGE diff --git a/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.patch.conditional b/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.patch.conditional new file mode 100644 index 000000000000..8091862f39a3 --- /dev/null +++ b/package/wpe/wpewebkit/9999-link_to_wpe_gstreamer.patch.conditional @@ -0,0 +1,84 @@ +diff --git a/Source/cmake/FindGStreamer.cmake b/Source/cmake/FindGStreamer.cmake +index 4577817..8ba2d4d 100644 +--- a/Source/cmake/FindGStreamer.cmake ++++ b/Source/cmake/FindGStreamer.cmake +@@ -5,25 +5,25 @@ + # GSTREAMER_INCLUDE_DIRS - the GStreamer include directories + # GSTREAMER_LIBRARIES - link these to use GStreamer + # +-# Additionally, gstreamer-base is always looked for and required, and ++# Additionally, wpe-gstreamer-base is always looked for and required, and + # the following related variables are defined: + # +-# GSTREAMER_BASE_INCLUDE_DIRS - gstreamer-base's include directory +-# GSTREAMER_BASE_LIBRARIES - link to these to use gstreamer-base ++# GSTREAMER_BASE_INCLUDE_DIRS - wpe-gstreamer-base's include directory ++# GSTREAMER_BASE_LIBRARIES - link to these to use wpe-gstreamer-base + # + # Optionally, the COMPONENTS keyword can be passed to find_package() + # and GStreamer plugins can be looked for. Currently, the following + # plugins can be searched, and they define the following variables if + # found: + # +-# gstreamer-app: GSTREAMER_APP_INCLUDE_DIRS and GSTREAMER_APP_LIBRARIES +-# gstreamer-audio: GSTREAMER_AUDIO_INCLUDE_DIRS and GSTREAMER_AUDIO_LIBRARIES +-# gstreamer-fft: GSTREAMER_FFT_INCLUDE_DIRS and GSTREAMER_FFT_LIBRARIES +-# gstreamer-gl: GSTREAMER_GL_INCLUDE_DIRS and GSTREAMER_GL_LIBRARIES +-# gstreamer-mpegts: GSTREAMER_MPEGTS_INCLUDE_DIRS and GSTREAMER_MPEGTS_LIBRARIES +-# gstreamer-pbutils: GSTREAMER_PBUTILS_INCLUDE_DIRS and GSTREAMER_PBUTILS_LIBRARIES +-# gstreamer-tag: GSTREAMER_TAG_INCLUDE_DIRS and GSTREAMER_TAG_LIBRARIES +-# gstreamer-video: GSTREAMER_VIDEO_INCLUDE_DIRS and GSTREAMER_VIDEO_LIBRARIES ++# wpe-gstreamer-app: GSTREAMER_APP_INCLUDE_DIRS and GSTREAMER_APP_LIBRARIES ++# wpe-gstreamer-audio: GSTREAMER_AUDIO_INCLUDE_DIRS and GSTREAMER_AUDIO_LIBRARIES ++# wpe-gstreamer-fft: GSTREAMER_FFT_INCLUDE_DIRS and GSTREAMER_FFT_LIBRARIES ++# wpe-gstreamer-gl: GSTREAMER_GL_INCLUDE_DIRS and GSTREAMER_GL_LIBRARIES ++# wpe-gstreamer-mpegts: GSTREAMER_MPEGTS_INCLUDE_DIRS and GSTREAMER_MPEGTS_LIBRARIES ++# wpe-gstreamer-pbutils: GSTREAMER_PBUTILS_INCLUDE_DIRS and GSTREAMER_PBUTILS_LIBRARIES ++# wpe-gstreamer-tag: GSTREAMER_TAG_INCLUDE_DIRS and GSTREAMER_TAG_LIBRARIES ++# wpe-gstreamer-video: GSTREAMER_VIDEO_INCLUDE_DIRS and GSTREAMER_VIDEO_LIBRARIES + # + # Copyright (C) 2012 Raphael Kubo da Costa + # +@@ -52,8 +52,8 @@ find_package(PkgConfig) + + # Helper macro to find a GStreamer plugin (or GStreamer itself) + # _component_prefix is prepended to the _INCLUDE_DIRS and _LIBRARIES variables (eg. "GSTREAMER_AUDIO") +-# _pkgconfig_name is the component's pkg-config name (eg. "gstreamer-1.0", or "gstreamer-video-1.0"). +-# _library is the component's library name (eg. "gstreamer-1.0" or "gstvideo-1.0") ++# _pkgconfig_name is the component's pkg-config name (eg. "wpe-gstreamer-1.0", or "wpe-gstreamer-video-1.0"). ++# _library is the component's library name (eg. "wpe-gstreamer-1.0" or "gstvideo-1.0") + macro(FIND_GSTREAMER_COMPONENT _component_prefix _pkgconfig_name _library) + + string(REGEX MATCH "(.*)>=(.*)" _dummy "${_pkgconfig_name}") +@@ -75,21 +75,21 @@ endmacro() + # ------------------------ + + # 1.1. Find headers and libraries +-FIND_GSTREAMER_COMPONENT(GSTREAMER gstreamer-1.0 gstreamer-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE gstreamer-base-1.0 gstbase-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER wpe-gstreamer-1.0 wpegstreamer-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_BASE wpe-gstreamer-base-1.0 wpegstbase-1.0) + + # ------------------------- + # 2. Find GStreamer plugins + # ------------------------- + +-FIND_GSTREAMER_COMPONENT(GSTREAMER_APP gstreamer-app-1.0 gstapp-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO gstreamer-audio-1.0 gstaudio-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT gstreamer-fft-1.0 gstfft-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_GL gstreamer-gl-1.0 gstgl-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS gstreamer-mpegts-1.0>=1.4.0 gstmpegts-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS gstreamer-pbutils-1.0 gstpbutils-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG gstreamer-tag-1.0 gsttag-1.0) +-FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO gstreamer-video-1.0 gstvideo-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_APP wpe-gstreamer-app-1.0 wpegstapp-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_AUDIO wpe-gstreamer-audio-1.0 wpegstaudio-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_FFT wpe-gstreamer-fft-1.0 wpegstfft-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_GL wpe-gstreamer-gl-1.0 wpegstgl-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_MPEGTS wpe-gstreamer-mpegts-1.0>=1.4.0 wpegstmpegts-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_PBUTILS wpe-gstreamer-pbutils-1.0 wpegstpbutils-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_TAG wpe-gstreamer-tag-1.0 wpegsttag-1.0) ++FIND_GSTREAMER_COMPONENT(GSTREAMER_VIDEO wpe-gstreamer-video-1.0 wpegstvideo-1.0) + + # ------------------------------------------------ + # 3. Process the COMPONENTS passed to FIND_PACKAGE From 805882979acb850c8c471dad0b55ff51bf2aefc6 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 20 Sep 2018 19:48:28 +0200 Subject: [PATCH 442/614] [UMA] Copy artifacts needed for building full UMA image. --- package/uma-sdk/uma-sdk.mk | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index 82fe015c78b6..32548c1d7899 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,5 +3,19 @@ # uma-sdk # ################################################################################ +UMA_SDK_VERSION = master +UMA_SDK_SITE = git@github.com:Metrological/OperatorDeliveries.git +UMA_SDK_SITE_METHOD = git +UMA_SDK_INSTALL_STAGING = YES +UMA_SDK_INSTALL_TARGET = YES + +define UMA_SDK_INSTALL_STAGING_CMDS + cp -Rf $(@D)/nos/player/* $(STAGING_DIR)/ +endef + +define UMA_SDK_INSTALL_TARGET_CMDS + cp -Rf $(@D)/nos/player/* $(TARGET_DIR)/ +endef + $(eval $(virtual-package)) From a203db3b1adfe5921afa6a90ebcd1cdc6514e642 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 20 Sep 2018 19:54:03 +0200 Subject: [PATCH 443/614] [uma-sdk] cleaning up mk file --- package/uma-sdk/uma-sdk.mk | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index 32548c1d7899..8ae8997632cd 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -10,12 +10,12 @@ UMA_SDK_INSTALL_STAGING = YES UMA_SDK_INSTALL_TARGET = YES define UMA_SDK_INSTALL_STAGING_CMDS - cp -Rf $(@D)/nos/player/* $(STAGING_DIR)/ + cp -Rpf $(@D)/nos/player/usr/include/*.h $(STAGING_DIR)/usr/include/ + $(INSTALL) -m 0755 -D $(@D)/nos/player/usr/lib/libplayer.so $(STAGING_DIR)/usr/lib/ endef define UMA_SDK_INSTALL_TARGET_CMDS - cp -Rf $(@D)/nos/player/* $(TARGET_DIR)/ + $(INSTALL) -m 0755 -D $(@D)/nos/player/usr/lib/libplayer.so $(TARGET_DIR)/usr/lib/ endef - -$(eval $(virtual-package)) +$(eval $(generic-package)) From e205a1aabdd122321e0b78551c347afcd9a1b287 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 24 Sep 2018 16:03:36 +0200 Subject: [PATCH 444/614] [OCDM-Playready-Nexus-SVP]: Adding package --- package/wpe/wpeframework-cdmi/Config.in | 1 + .../Config.in | 21 ++++++++++++ .../wpeframework-cdmi-playready-nexus-svp.mk | 33 +++++++++++++++++++ 3 files changed, 55 insertions(+) create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk diff --git a/package/wpe/wpeframework-cdmi/Config.in b/package/wpe/wpeframework-cdmi/Config.in index 6e01e7251f93..6fff1da23b78 100644 --- a/package/wpe/wpeframework-cdmi/Config.in +++ b/package/wpe/wpeframework-cdmi/Config.in @@ -1,5 +1,6 @@ source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/Config.in" +source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/Config.in" diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in new file mode 100644 index 000000000000..3b8b59fbb135 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in @@ -0,0 +1,21 @@ +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP + bool "broadcom svp/sage" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + select BR2_PACKAGE_HAS_PLAYREADY + depends on BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS + depends on BR2_PACKAGE_BCM_REFSW_SAGE + default n + help + Broadcom Playready SVP SAGE implementation + +if BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP + +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_ENABLE + bool "Use SVP" + default y + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Use SVP enabled + +endif diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk new file mode 100644 index 000000000000..4d0d1057b047 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk @@ -0,0 +1,33 @@ +################################################################################ +# +# wpeframework-cdmi-playready-nexus-svp +# +################################################################################ + +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = 971480c43d47be94b3328e52d2461e418edf5d3a +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE_METHOD = git +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus-SVP.git +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_STAGING = YES +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_DEPENDENCIES = wpeframework + +ifeq ($(BR2_PACKAGE_BCM_REFSW),y) +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_DEPENDENCIES += bcm-refsw +endif + +define WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_PLAYREADY_PC_FILE + $(INSTALL) -m 0644 -D $(@D)/playready_3.0.pc $(STAGING_DIR)/usr/lib/pkgconfig/playready.pc +endef + +define WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_OCDM_PC_FILE + $(INSTALL) -m 0644 -D $(@D)/ocdm-nexus.pc $(STAGING_DIR)/usr/lib/pkgconfig/ocdm-nexus.pc +endef + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_ENABLE),y) +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_CONF_OPTS += -DNEXUS_PLAYREADY_SVP_ENABLE=ON +endif + +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_POST_EXTRACT_HOOKS += \ + WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_PLAYREADY_PC_FILE \ + WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_OCDM_PC_FILE + +$(eval $(cmake-package)) From 4dfca625fb74a276f4e2c148c580b9b387e171ce Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 24 Sep 2018 22:18:41 +0200 Subject: [PATCH 445/614] [bcm-refsw]: Build with SVP/SAGE/PR3.0 related files --- package/bcm-refsw/bcm-refsw.mk | 8 +++++++- package/bcm-refsw/nexus.inc | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index dc0fff4671ce..40a72811bf13 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -30,7 +30,7 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5),y) BCM_REFSW_VERSION = 17.4-uma else -BCM_REFSW_VERSION = 17.4-3 +BCM_REFSW_VERSION = 17.4-4 endif else BCM_REFSW_VERSION = 16.2-7 @@ -147,10 +147,12 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_GRAPHICS) $(BCM_REFSW_BUILD_EGLCUBE) $(BCM_REFSW_BUILD_SAGE_SRAI) + $(BCM_REFSW_BUILD_SECBUF) $(BCM_REFSW_BUILD_WAYLAND_EGL) $(BCM_REFSW_BUILD_NEXUS_LIBB_OS) $(BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS) $(BCM_REFSW_GENERATE_NEXUS_PC) + $(BCM_REFSW_BUILD_SAGE_PRDY30_SVP) endef define BCM_REFSW_INSTALL_STAGING_CMDS @@ -159,9 +161,11 @@ define BCM_REFSW_INSTALL_STAGING_CMDS $(call BCM_REFSW_INSTALL_NXSERVER_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_WAYLAND_EGL_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_SAGE_SRAI_DEV, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_SECBUF_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_PMLIB_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_PC, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_PLAYREADY30_DEV, $(STAGING_DIR)) endef define BCM_REFSW_INSTALL_TARGET_CMDS @@ -172,7 +176,9 @@ define BCM_REFSW_INSTALL_TARGET_CMDS $(call BCM_REFSW_INSTALL_EGLCUBE, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_WAYLAND_EGL, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_SAGE_SRAI, $(TARGET_DIR)) + $(call BCM_REFSW_INSTALL_SECBUF, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS, $(TARGET_DIR)) + $(call BCM_REFSW_INSTALL_PLAYREADY30, $(TARGET_DIR)) endef $(eval $(generic-package)) diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index da551a0633f4..62d949aedb72 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -67,6 +67,17 @@ define BCM_REFSW_BUILD_SAGE_SRAI $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR) \ LIBDIR=${BCM_REFSW_BIN} endef + +BCM_NEXUS_SECBUF_DIR = /BSEAV/lib/security/secbuf +define BCM_REFSW_BUILD_SECBUF + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SECBUF_DIR) \ + LIBDIR=${BCM_REFSW_BIN} +endef + BCM_NEXUS_SAGE_UTILITY_DIR = /BSEAV/lib/security/sage/utility define BCM_REFSW_BUILD_SAGE_UTILITY $(TARGET_CONFIGURE_OPTS) \ @@ -106,6 +117,27 @@ define BCM_REFSW_INSTALL_SAGE_SRAI_DEV $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ $(INSTALL) -m 644 $(@D)/$(BCM_MAGNUM_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ endef + +BCM_NEXUS_PLAYREADY30_DIR = /BSEAV/thirdparty/playready/3.0 +define BCM_REFSW_INSTALL_PLAYREADY30_DEV + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/inc/* $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/../http/include/* $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/BSEAV/lib/drmrootfs/drm_data.h $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/* $(1)/usr/lib/ +endef + +define BCM_REFSW_INSTALL_PLAYREADY30 + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/*.so $(1)/usr/lib/ +endef + +define BCM_REFSW_INSTALL_SECBUF + $(INSTALL) -D $(BCM_REFSW_BIN)/../../BSEAV/lib/security/secbuf/libb_secbuf.so $(1)/usr/lib/libb_secbuf.so +endef + +define BCM_REFSW_INSTALL_SECBUF_DEV + $(call BCM_REFSW_INSTALL_SECBUF,$(1)) + $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SECBUF_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +endef endif From 81b8dbfecbfa49142100e0b584f0eadb5bcaf959 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 24 Sep 2018 22:20:38 +0200 Subject: [PATCH 446/614] [gst1-bcm]: Add SVP flag and copy binaries also into staging, not only target --- package/gstreamer1/gst1-bcm/Config.in | 6 ------ package/gstreamer1/gst1-bcm/gst1-bcm.mk | 11 ++++++----- 2 files changed, 6 insertions(+), 11 deletions(-) diff --git a/package/gstreamer1/gst1-bcm/Config.in b/package/gstreamer1/gst1-bcm/Config.in index be5e30ad5907..aa940c805d9c 100644 --- a/package/gstreamer1/gst1-bcm/Config.in +++ b/package/gstreamer1/gst1-bcm/Config.in @@ -60,10 +60,4 @@ config BR2_PACKAGE_GST1_BCM_ENABLE_SVP help Enable SVP support -config BR2_PACKAGE_GST1_BCM_WPEFRAMEWORK_CDM - bool "WPEframework CDM" - depends on BR2_PACKAGE_GST1_BCM_ENABLE_SVP && BR2_PACKAGE_WPEFRAMEWORK_CDM - default y - help - Use WPEFramework CDM endif diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 3c1e96d1c452..2222237da943 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -9,7 +9,7 @@ GST1_BCM_VERSION = 16.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_2),y) GST1_BCM_VERSION = 16.2 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_4),y) -GST1_BCM_VERSION = 17.3-rdkv-20180327 +GST1_BCM_VERSION = 17.4-rdkv-20180503 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1),y) GST1_BCM_VERSION = 17.1-7 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) @@ -27,6 +27,7 @@ endif GST1_BCM_SITE = git@github.com:Metrological/gstreamer-plugins-soc.git GST1_BCM_SITE_METHOD = git GST1_BCM_LICENSE = PROPRIETARY +GST1_BCM_INSTALL_STAGING = YES GST1_BCM_DEPENDENCIES = gstreamer1 gst1-plugins-base libcurl mpg123 ifeq ($(BR2_PACKAGE_BCM_REFSW),y) @@ -48,10 +49,6 @@ ifeq ($(BR2_PACKAGE_GST1_BCM_VP9_SUPPORT),y) CFLAGS += -DVP9_SUPPORT endif -ifeq ($(BR2_PACKAGE_GST1_BCM_WPEFRAMEWORK_CDM),y) -GST1_BCM_DEPENDENCIES += wpeframework -CFLAGS += -DGST_BRCM_WPEFRAMEWORK_CDM -endif GST1_BCM_AUTORECONF = YES GST1_BCM_CONF_ENV += \ @@ -59,6 +56,10 @@ GST1_BCM_CONF_ENV += \ GSTREAMER_REFSW_SERVER_NXCLIENT_SUPPORT=y \ PKG_CONFIG_SYSROOT_DIR=$(STAGING_DIR) +ifeq ($(BR2_PACKAGE_GST1_BCM_ENABLE_SVP),y) +GST1_BCM_CONF_ENV += GST_SVP_SUPPORT=y +endif + GST1_BCM_MAKE_ENV += \ $(BCM_REFSW_MAKE_ENV) \ PKG_CONFIG_SYSROOT_DIR=$(STAGING_DIR) From 68fd0e93ee05b9641a6a533398be40faf92877a9 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 24 Sep 2018 22:28:44 +0200 Subject: [PATCH 447/614] [wpeframework-cdmi-playready-nexus-svp]: bump the version --- .../wpeframework-cdmi-playready-nexus-svp.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk index 4d0d1057b047..3f062992c615 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = 971480c43d47be94b3328e52d2461e418edf5d3a +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = d0a4d4eae54ba5bdfac26090e16fa4145c3ed6b1 WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus-SVP.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_STAGING = YES From 475195f903f97634ee559b7b59c53fbb3633b4ea Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 25 Sep 2018 13:24:33 +0200 Subject: [PATCH 448/614] [wpeframework-plugins]: Add dependency for OCDM plugin when Nexus SVP is selected --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 325945c51312..5f305da2404c 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -83,6 +83,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_NEXUS=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-playready-nexus endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_NEXUS=ON +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-playready-nexus-svp +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_PLAYREADY_VGDRM=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-playready-vgdrm From 25fcfdaf35b7baecd88c365089fdaf549c81aaca Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 28 Sep 2018 12:06:23 +0200 Subject: [PATCH 449/614] [vss-sdk] slimmed down the build a bit --- board/bcm/vss.txt | 1 - package/vss-sdk/vss-sdk.mk | 32 ++++++++++++++------------------ 2 files changed, 14 insertions(+), 19 deletions(-) diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt index c3e49f1e29f3..308be3e554a2 100644 --- a/board/bcm/vss.txt +++ b/board/bcm/vss.txt @@ -5,4 +5,3 @@ libbrcm*.so wpegst-* libepoxy.so libocdm.so -libjpeg*.so diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index da1275b8ddd6..e9007fbbaa39 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -35,38 +35,34 @@ define VSS_EXCLUDE_PACKAGE_LIST $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) $(call VSS_EXCLUDE_PACKAGE,ICU) $(call VSS_EXCLUDE_PACKAGE,ICUDATA) -endef - -define VSS_EXCLUDE_UNKNOWN_LIST - $(call VSS_EXCLUDE_PACKAGE,FREETYPE) - $(call VSS_EXCLUDE_PACKAGE,FONTCONFIG) + $(call VSS_EXCLUDE_PACKAGE,LIBJPEG) + $(call VSS_EXCLUDE_PACKAGE,JPEG_TURBO) $(call VSS_EXCLUDE_PACKAGE,OPENSSL) $(call VSS_EXCLUDE_PACKAGE,ZLIB) $(call VSS_EXCLUDE_PACKAGE,LIBPNG) - $(call VSS_EXCLUDE_PACKAGE,LIBJPEG) - $(call VSS_EXCLUDE_PACKAGE,JPEG_TURBO) + $(call VSS_EXCLUDE_PACKAGE,LIBCURL) + $(call VSS_EXCLUDE_PACKAGE,PANGO) + $(call VSS_EXCLUDE_PACKAGE,WEBP) + $(call VSS_EXCLUDE_PACKAGE,MPG123) + $(call VSS_EXCLUDE_PACKAGE,LIBMNG) + $(call VSS_EXCLUDE_PACKAGE,OPUS) + $(call VSS_EXCLUDE_PACKAGE,PIXMAN) + $(call VSS_EXCLUDE_PACKAGE,BITSTREAM_VERA) +endef + +define VSS_EXCLUDE_UNKNOWN_LIST $(call VSS_EXCLUDE_PACKAGE,EXPAT) + $(call VSS_EXCLUDE_PACKAGE,LIBFFI) $(call VSS_EXCLUDE_PACKAGE,C_ARES) - $(call VSS_EXCLUDE_PACKAGE,LIBCURL) $(call VSS_EXCLUDE_PACKAGE,LIBXKBCOMMON) $(call VSS_EXCLUDE_PACKAGE,LIBSOUP) $(call VSS_EXCLUDE_PACKAGE,LIBGLIB2) - $(call VSS_EXCLUDE_PACKAGE,LIBFFI) - $(call VSS_EXCLUDE_PACKAGE,ICU) - $(call VSS_EXCLUDE_PACKAGE,ICUDATA) $(call VSS_EXCLUDE_PACKAGE,ORC) $(call VSS_EXCLUDE_PACKAGE,SQLITE) $(call VSS_EXCLUDE_PACKAGE,KMOD) $(call VSS_EXCLUDE_PACKAGE,SHARED_MIME_INFO) # cairo-gl.h missing --> ACCELERATED_2D_CANVAS=OFF $(call VSS_EXCLUDE_PACKAGE,CAIRO) - $(call VSS_EXCLUDE_PACKAGE,MPG123) - $(call VSS_EXCLUDE_PACKAGE,PANGO) - $(call VSS_EXCLUDE_PACKAGE,OPUS) - $(call VSS_EXCLUDE_PACKAGE,LIBMNG) - $(call VSS_EXCLUDE_PACKAGE,PIXMAN) - $(call VSS_EXCLUDE_PACKAGE,WEBP) - $(call VSS_EXCLUDE_PACKAGE,BITSTREAM_VERA) $(call VSS_EXCLUDE_PACKAGE,DASH) $(call VSS_EXCLUDE_PACKAGE,UTIL_LINUX) $(call VSS_EXCLUDE_PACKAGE,XUTIL_UTIL_MACROS) From 630624157cfcc35721afc8136c972640a1ad12bd Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 28 Sep 2018 12:20:34 +0200 Subject: [PATCH 450/614] [configs] Add new platform config --- configs/multichoice_bcm7271_wpe_ml_defconfig | 104 +++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 configs/multichoice_bcm7271_wpe_ml_defconfig diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig new file mode 100644 index 000000000000..85fd6712d2f3 --- /dev/null +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -0,0 +1,104 @@ +BR2_arm=y +BR2_cortex_a15=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y +BR2_BINUTILS_VERSION_2_24_X=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_GCC_ENABLE_LTO=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" +BR2_SYSTEM_DHCP="eth0" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/arris/post-build.sh" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.9hf" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_BCM=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_BCM_REFSW=y +BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_7271=y +BR2_PACKAGE_GRAPHITE2=y +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_C_ARES=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_WPA_SUPPLICANT=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y From 223a6d69325a924389318dc4882e7bf18443fb2c Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 1 Oct 2018 16:29:32 +0200 Subject: [PATCH 451/614] [bcm-refsw]: make components of bcm-refsw configurable via defconfig --- package/bcm-refsw/Config.in | 35 +++++++++++ package/bcm-refsw/bcm-refsw.mk | 7 +++ package/bcm-refsw/nexus.inc | 107 ++++++++++++++++++++++++++------- 3 files changed, 127 insertions(+), 22 deletions(-) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 19d149475e9a..a1b61edde6da 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -148,6 +148,41 @@ config BR2_PACKAGE_BCM_REFSW_SAGE_PATH help Sage binaries path +config BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING + bool "SAGE Manufacturing" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Sage manufacturing lib for on-field provisioning + +config BR2_PACKAGE_BCM_REFSW_SAGE_EXAMPLES + bool "SAGE examples" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Sage examples + +config BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF + bool "SAGE/SVP b_secbuf library" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Sage/SVP secure library for multiprocess environment + +config BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30 + bool "Playready 3.0 SVP" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Playready 3.0 SVP + +config BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30_EXAMPLE + bool "Playready 3.0 SVP example" + default n + depends on BR2_PACKAGE_BCM_REFSW_SAGE + help + Playready 3.0 SVP example + config BR2_PACKAGE_PROVIDES_NEXUS default "bcm-refsw" diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 40a72811bf13..3fc591db105b 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -153,6 +153,9 @@ define BCM_REFSW_BUILD_CMDS $(BCM_REFSW_BUILD_NEXUS_KERNEL_HEADERS) $(BCM_REFSW_GENERATE_NEXUS_PC) $(BCM_REFSW_BUILD_SAGE_PRDY30_SVP) + $(BCM_REFSW_BUILD_DRMROOTFS) + $(BCM_REFSW_BUILD_PRDYHTTP) + $(BCM_REFSW_BUILD_SAGE_MANUFACTURING) endef define BCM_REFSW_INSTALL_STAGING_CMDS @@ -166,6 +169,8 @@ define BCM_REFSW_INSTALL_STAGING_CMDS $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS_DEV, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_PC, $(STAGING_DIR)) $(call BCM_REFSW_INSTALL_PLAYREADY30_DEV, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_DRMROOTFS_DEV, $(STAGING_DIR)) + $(call BCM_REFSW_INSTALL_PRDYHTTP_DEV, $(STAGING_DIR)) endef define BCM_REFSW_INSTALL_TARGET_CMDS @@ -179,6 +184,8 @@ define BCM_REFSW_INSTALL_TARGET_CMDS $(call BCM_REFSW_INSTALL_SECBUF, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_NEXUS_LIBB_OS, $(TARGET_DIR)) $(call BCM_REFSW_INSTALL_PLAYREADY30, $(TARGET_DIR)) + $(call BCM_REFSW_INSTALL_DRMROOTFS, $(TARGET_DIR)) + $(call BCM_REFSW_INSTALL_PRDYHTTP, $(TARGET_DIR)) endef $(eval $(generic-package)) diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index 62d949aedb72..35c555492b96 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -68,6 +68,18 @@ define BCM_REFSW_BUILD_SAGE_SRAI LIBDIR=${BCM_REFSW_BIN} endef +define BCM_REFSW_INSTALL_SAGE_SRAI + $(INSTALL) -D $(BCM_REFSW_BIN)/libsrai.so $(1)/usr/lib/libsrai.so +endef + +define BCM_REFSW_INSTALL_SAGE_SRAI_DEV + $(call BCM_REFSW_INSTALL_SAGE_SRAI,$(1)) + $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ + $(INSTALL) -m 644 $(@D)/$(BCM_MAGNUM_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +endef + +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF),y) + BCM_NEXUS_SECBUF_DIR = /BSEAV/lib/security/secbuf define BCM_REFSW_BUILD_SECBUF $(TARGET_CONFIGURE_OPTS) \ @@ -78,6 +90,31 @@ define BCM_REFSW_BUILD_SECBUF LIBDIR=${BCM_REFSW_BIN} endef +define BCM_REFSW_INSTALL_SECBUF + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/$(BCM_NEXUS_SECBUF_DIR)/libb_secbuf.so $(1)/usr/lib/libb_secbuf.so +endef + +define BCM_REFSW_INSTALL_SECBUF_DEV + $(call BCM_REFSW_INSTALL_SECBUF,$(1)) + $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SECBUF_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +endef + +endif + +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING),y) +BCM_NEXUS_SAGE_MANUFACTURING_DIR = /BSEAV/lib/security/sage/manufacturing +define BCM_REFSW_BUILD_SAGE_MANUFACTURING + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_MANUFACTURING_DIR)/src all \ + LIBDIR=${BCM_REFSW_BIN} +endef +endif + +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_EXAMPLES),y) + BCM_NEXUS_SAGE_UTILITY_DIR = /BSEAV/lib/security/sage/utility define BCM_REFSW_BUILD_SAGE_UTILITY $(TARGET_CONFIGURE_OPTS) \ @@ -97,48 +134,74 @@ define BCM_REFSW_BUILD_SAGE_EXAMPLE $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_EXAMPLE_DIR) \ LIBDIR=${BCM_REFSW_BIN} endef +endif -BCM_NEXUS_SAGE_PRDY30_SVP_DIR = /BSEAV/thirdparty/playready/3.0/examples -define BCM_REFSW_BUILD_SAGE_PRDY30_SVP +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30),y) + +BCM_NEXUS_PLAYREADY30_DIR = /BSEAV/thirdparty/playready/3.0 +define BCM_REFSW_INSTALL_PLAYREADY30_DEV + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/inc/* $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/../http/include/* $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/BSEAV/lib/drmrootfs/drm_data.h $(1)/usr/include/refsw/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/* $(1)/usr/lib/ +endef + +define BCM_REFSW_INSTALL_PLAYREADY30 + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/*.so $(1)/usr/lib/ +endef + +BCM_NEXUS_DRMROOTFS_DIR = /BSEAV/lib/drmrootfs +define BCM_REFSW_BUILD_DRMROOTFS $(TARGET_CONFIGURE_OPTS) \ $(TARGET_MAKE_ENV) \ $(BCM_REFSW_CONF_OPTS) \ $(BCM_REFSW_MAKE_ENV) \ - $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_PRDY30_SVP_DIR) target=prdy30_svp all \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_DRMROOTFS_DIR) all \ LIBDIR=${BCM_REFSW_BIN} endef -define BCM_REFSW_INSTALL_SAGE_SRAI - $(INSTALL) -D $(BCM_REFSW_BIN)/libsrai.so $(1)/usr/lib/libsrai.so +define BCM_REFSW_INSTALL_DRMROOTFS_DEV + $(INSTALL) -D $(@D)/$(BCM_NEXUS_DRMROOTFS_DIR)/drm_data.h $(1)/usr/include/refsw/ + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/$(BCM_NEXUS_DRMROOTFS_DIR)/libdrmrootfs.so $(1)/usr/lib/libdrmrootfs.so endef -define BCM_REFSW_INSTALL_SAGE_SRAI_DEV - $(call BCM_REFSW_INSTALL_SAGE_SRAI,$(1)) - $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ - $(INSTALL) -m 644 $(@D)/$(BCM_MAGNUM_SAGE_SRAI_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +define BCM_REFSW_INSTALL_DRMROOTFS + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/$(BCM_NEXUS_DRMROOTFS_DIR)/libdrmrootfs.so $(1)/usr/lib/libdrmrootfs.so endef -BCM_NEXUS_PLAYREADY30_DIR = /BSEAV/thirdparty/playready/3.0 -define BCM_REFSW_INSTALL_PLAYREADY30_DEV - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/inc/* $(1)/usr/include/refsw/ - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/../http/include/* $(1)/usr/include/refsw/ - $(INSTALL) -D $(@D)/BSEAV/lib/drmrootfs/drm_data.h $(1)/usr/include/refsw/ - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/* $(1)/usr/lib/ +BCM_NEXUS_PRDYHTTP_DIR = /BSEAV/thirdparty/playready/http +define BCM_REFSW_BUILD_PRDYHTTP + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_PRDYHTTP_DIR) all \ + LIBDIR=${BCM_REFSW_BIN} endef -define BCM_REFSW_INSTALL_PLAYREADY30 - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/*.so $(1)/usr/lib/ +define BCM_REFSW_INSTALL_PRDYHTTP_DEV + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PRDYHTTP_DIR)/include/prdy_http.h $(1)/usr/include/refsw/ + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/$(BCM_NEXUS_PRDYHTTP_DIR)/libprdyhttp.so $(1)/usr/lib/libprdyhttp.so endef -define BCM_REFSW_INSTALL_SECBUF - $(INSTALL) -D $(BCM_REFSW_BIN)/../../BSEAV/lib/security/secbuf/libb_secbuf.so $(1)/usr/lib/libb_secbuf.so +define BCM_REFSW_INSTALL_PRDYHTTP + $(INSTALL) -D $(BCM_REFSW_OUTPUT)/$(BCM_NEXUS_PRDYHTTP_DIR)/libprdyhttp.so $(1)/usr/lib/libprdyhttp.so endef -define BCM_REFSW_INSTALL_SECBUF_DEV - $(call BCM_REFSW_INSTALL_SECBUF,$(1)) - $(INSTALL) -m 644 $(@D)/$(BCM_NEXUS_SECBUF_DIR)/include/*.h $(STAGING_DIR)/usr/include/refsw/ +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30_EXAMPLE),y) +BCM_NEXUS_SAGE_PRDY30_SVP_DIR = /BSEAV/thirdparty/playready/3.0/examples +define BCM_REFSW_BUILD_SAGE_PRDY30_SVP + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_MAKE_ENV) \ + $(BCM_REFSW_CONF_OPTS) \ + $(BCM_REFSW_MAKE_ENV) \ + $(MAKE) -C $(@D)/$(BCM_NEXUS_SAGE_PRDY30_SVP_DIR) target=prdy30_svp all \ + LIBDIR=${BCM_REFSW_BIN} endef endif +endif + +endif ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) From 889b79ebb5f69e73597e5cfb0a3ad9f20b3a0585 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 3 Oct 2018 09:28:16 +0200 Subject: [PATCH 452/614] [gst1-plugins-bad] smoothstreaming fast start and reduce resolution changes --- ...ayback-start-with-the-lowest-quality.patch | 23 +++++++++++++++++++ ...ming-reduced-rapid-resolution-change.patch | 13 +++++++++++ 2 files changed, 36 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch create mode 100644 package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch b/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch new file mode 100644 index 000000000000..3b6fe39401ff --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch @@ -0,0 +1,23 @@ +diff --git a/ext/smoothstreaming/gstmssmanifest.c b/ext/smoothstreaming/gstmssmanifest.c +index 291080a..480114d 100644 +--- a/ext/smoothstreaming/gstmssmanifest.c ++++ b/ext/smoothstreaming/gstmssmanifest.c +@@ -1465,10 +1465,14 @@ gst_mss_manifest_change_bitrate (GstMssManifest * manifest, guint64 bitrate) + * it should actually use the sum of all streams bitrates to compare to + * the target value */ + +- if (bitrate == 0) { +- /* use maximum */ +- bitrate = G_MAXUINT64; +- } ++ /* TODO For now, we will comment out this part of the code. We want to use ++ * the lowest quality of the stream to start playback. With this code, ++ * it starts with the highest. ++ */ ++// if (bitrate == 0) { ++// /* use maximum */ ++// bitrate = G_MAXUINT64; ++// } + + for (iter = gst_mss_manifest_get_streams (manifest); iter; + iter = g_slist_next (iter)) { diff --git a/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch b/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch new file mode 100644 index 000000000000..5f738caf6411 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch @@ -0,0 +1,13 @@ +diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +index 7aacec9..b28e745 100644 +--- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c ++++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c +@@ -135,7 +135,7 @@ GST_DEBUG_CATEGORY (adaptivedemux_debug); + #define DEFAULT_CONNECTION_SPEED 0 + #define DEFAULT_BITRATE_LIMIT 0.8f + #define SRC_QUEUE_MAX_BYTES 20 * 1024 * 1024 /* For safety. Large enough to hold a segment. */ +-#define NUM_LOOKBACK_FRAGMENTS 3 ++#define NUM_LOOKBACK_FRAGMENTS 8 + + #define GST_MANIFEST_GET_LOCK(d) (&(GST_ADAPTIVE_DEMUX_CAST(d)->priv->manifest_lock)) + #define GST_MANIFEST_LOCK(d) G_STMT_START { \ From 91529a5beda0bcaaaba9560ecc6196e8cbc4970d Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 3 Oct 2018 09:29:20 +0200 Subject: [PATCH 453/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 84458fbe2e24..da96f5e20b4d 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 92e60855ddb00bd5a82bc4fdbde2c6f77b20a698 +WPEFRAMEWORK_VERSION = d0a89526683fcec5c83614eb52c084c505f0d638 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From f053013269a7636532ad8bd9ee77e21de0f198d2 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 3 Oct 2018 09:29:40 +0200 Subject: [PATCH 454/614] [wpeframework-plugins] add patch for keyid extension --- ...0000-extend-drm-interface-with-keyid.patch | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch diff --git a/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch b/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch new file mode 100644 index 000000000000..d5dfc3241d7e --- /dev/null +++ b/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch @@ -0,0 +1,86 @@ +From f4de91ff5dd2da7df9cbb6e64b5daf6d96af0320 Mon Sep 17 00:00:00 2001 +From: Pierre Wielders +Date: Sun, 16 Sep 2018 11:56:27 +0200 +Subject: [PATCH] [OCDMi] Support the retrieval of the SessionId. + +--- + OpenCDMi/FrameworkRPC.cpp | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp +index 6ac8480..2765292 100644 +--- a/OpenCDMi/FrameworkRPC.cpp ++++ b/OpenCDMi/FrameworkRPC.cpp +@@ -375,7 +375,7 @@ namespace Plugin { + inline bool HasKeyId(const uint8_t keyId[]) { + return (_cencData.HasKeyId(keyId)); + } +- const std::string& SessionId() const { ++ virtual std::string SessionId() const override { + return (_sessionId); + } + +From 1d4393fde2bc31a3ce8293c89b109a5021d6f8d7 Mon Sep 17 00:00:00 2001 +From: Pierre Wielders +Date: Wed, 19 Sep 2018 20:36:06 +0200 +Subject: [PATCH] [IDRM] Extend the OpenCDM(i)nterface towards the DRM on + decrypt level with a KeyId. + +--- + OpenCDMi/FrameworkRPC.cpp | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp +index 2765292..9d1c159 100644 +--- a/OpenCDMi/FrameworkRPC.cpp ++++ b/OpenCDMi/FrameworkRPC.cpp +@@ -205,6 +205,7 @@ namespace Plugin { + RequestConsume(WPEFramework::Core::infinite); + + if (IsRunning() == true) { ++ uint8_t keyIdLength = 0; + int cr = _mediaKeys->Decrypt( + _sessionKey, + _sessionKeyLength, +@@ -215,7 +216,9 @@ namespace Plugin { + Buffer(), + BytesWritten(), + &clearContentSize, +- &clearContent); ++ &clearContent, ++ keyIdLength, ++ KeyId(keyIdLength)); + + if ((cr == 0) && (clearContentSize != 0)) { + if (clearContentSize != BytesWritten()) { +From 24cf5931d1201c1cdc86a7e0b2e6f496945ab2fd Mon Sep 17 00:00:00 2001 +From: pwielders +Date: Mon, 24 Sep 2018 21:37:11 +0200 +Subject: [PATCH] Force KeyId to be called before the stack is created. + +Maybe the KeyIdLength value is pushed to the stack before the KeyId() method call is issued. +--- + OpenCDMi/FrameworkRPC.cpp | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp +index 9d1c159..fbf041b 100644 +--- a/OpenCDMi/FrameworkRPC.cpp ++++ b/OpenCDMi/FrameworkRPC.cpp +@@ -206,6 +206,7 @@ namespace Plugin { + + if (IsRunning() == true) { + uint8_t keyIdLength = 0; ++ const uint8_t* keyIdData = KeyId(keyIdLength); + int cr = _mediaKeys->Decrypt( + _sessionKey, + _sessionKeyLength, +@@ -218,7 +219,7 @@ namespace Plugin { + &clearContentSize, + &clearContent, + keyIdLength, +- KeyId(keyIdLength)); ++ keyIdData); + + if ((cr == 0) && (clearContentSize != 0)) { + if (clearContentSize != BytesWritten()) { From 99c2da26d74ec4d61ca9617c5528a1157caff382 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 3 Oct 2018 09:30:07 +0200 Subject: [PATCH 455/614] [wpeframework-cdmi] bump all modules to latest version --- .../wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk | 2 +- .../wpeframework-cdmi-playready-nexus.mk | 2 +- .../wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk | 2 +- .../wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk index 2f4da0980764..18e0ec16edeb 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-clearkey/wpeframework-cdmi-clearkey.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_CLEARKEY_VERSION = e931c530883a46fb7e8f33b4ff7e841ab1762fb7 +WPEFRAMEWORK_CDMI_CLEARKEY_VERSION = 3fb37d8ee90a8af941a6ebeff6309f89ead60fd4 WPEFRAMEWORK_CDMI_CLEARKEY_SITE_METHOD = git WPEFRAMEWORK_CDMI_CLEARKEY_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Clearkey.git WPEFRAMEWORK_CDMI_CLEARKEY_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk index 65acdf12fa89..db411a60a802 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/wpeframework-cdmi-playready-nexus.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_VERSION = 65c2596207f69552111e5dd14629fac8943ccbf6 +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_VERSION = 55dd99220c5705c6dadc212501d75e0832bb36c0 WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk index 4e9a41379d9e..90e26b73de82 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready/wpeframework-cdmi-playready.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VERSION = 078a10864b7bec277c3b5b18cc990bd43d2b0327 +WPEFRAMEWORK_CDMI_PLAYREADY_VERSION = 0e564fd772f47877364264413d057df80e1c8aeb WPEFRAMEWORK_CDMI_PLAYREADY_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready.git WPEFRAMEWORK_CDMI_PLAYREADY_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk index 8e3b4e4e25af..467e38c5af23 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = e98b76aa8802dc9bd9dbdb1dd23613172d934fb5 +WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = 83643c5975b15b6ff87b0c183c9169c64d8c4ca2 WPEFRAMEWORK_CDMI_WIDEVINE_SITE_METHOD = git WPEFRAMEWORK_CDMI_WIDEVINE_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Widevine.git WPEFRAMEWORK_CDMI_WIDEVINE_INSTALL_STAGING = NO From fce1085674e2c6039d7e4b30e2ada7a29e8f5549 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 3 Oct 2018 09:30:35 +0200 Subject: [PATCH 456/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index ac418b209188..48457828e57e 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = ad5e8326cb2d1f1047edd5a1716d276acc72c0bd +WPEWEBKIT_VERSION_VALUE = 7e78ea596849a0dca37b3e8d04abbd6be37db34e endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From feb5e1258d8ee4c0c89e15dab7916b371dc9698c Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 4 Oct 2018 12:20:44 +0200 Subject: [PATCH 457/614] Revert "[gst1-plugins-bad] smoothstreaming fast start and reduce resolution" This reverts commit 889b79ebb5f69e73597e5cfb0a3ad9f20b3a0585. --- ...ayback-start-with-the-lowest-quality.patch | 23 ------------------- ...ming-reduced-rapid-resolution-change.patch | 13 ----------- 2 files changed, 36 deletions(-) delete mode 100644 package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch delete mode 100644 package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch b/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch deleted file mode 100644 index 3b6fe39401ff..000000000000 --- a/package/gstreamer1/gst1-plugins-bad/0019-smoothstreaming-playback-start-with-the-lowest-quality.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff --git a/ext/smoothstreaming/gstmssmanifest.c b/ext/smoothstreaming/gstmssmanifest.c -index 291080a..480114d 100644 ---- a/ext/smoothstreaming/gstmssmanifest.c -+++ b/ext/smoothstreaming/gstmssmanifest.c -@@ -1465,10 +1465,14 @@ gst_mss_manifest_change_bitrate (GstMssManifest * manifest, guint64 bitrate) - * it should actually use the sum of all streams bitrates to compare to - * the target value */ - -- if (bitrate == 0) { -- /* use maximum */ -- bitrate = G_MAXUINT64; -- } -+ /* TODO For now, we will comment out this part of the code. We want to use -+ * the lowest quality of the stream to start playback. With this code, -+ * it starts with the highest. -+ */ -+// if (bitrate == 0) { -+// /* use maximum */ -+// bitrate = G_MAXUINT64; -+// } - - for (iter = gst_mss_manifest_get_streams (manifest); iter; - iter = g_slist_next (iter)) { diff --git a/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch b/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch deleted file mode 100644 index 5f738caf6411..000000000000 --- a/package/gstreamer1/gst1-plugins-bad/0020-smoothstreaming-reduced-rapid-resolution-change.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c -index 7aacec9..b28e745 100644 ---- a/gst-libs/gst/adaptivedemux/gstadaptivedemux.c -+++ b/gst-libs/gst/adaptivedemux/gstadaptivedemux.c -@@ -135,7 +135,7 @@ GST_DEBUG_CATEGORY (adaptivedemux_debug); - #define DEFAULT_CONNECTION_SPEED 0 - #define DEFAULT_BITRATE_LIMIT 0.8f - #define SRC_QUEUE_MAX_BYTES 20 * 1024 * 1024 /* For safety. Large enough to hold a segment. */ --#define NUM_LOOKBACK_FRAGMENTS 3 -+#define NUM_LOOKBACK_FRAGMENTS 8 - - #define GST_MANIFEST_GET_LOCK(d) (&(GST_ADAPTIVE_DEMUX_CAST(d)->priv->manifest_lock)) - #define GST_MANIFEST_LOCK(d) G_STMT_START { \ From 7e055eb992c52b7c2d6a0a67f5db3988aea4bacb Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 4 Oct 2018 12:21:26 +0200 Subject: [PATCH 458/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 48457828e57e..51fb16b7581e 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 7e78ea596849a0dca37b3e8d04abbd6be37db34e +WPEWEBKIT_VERSION_VALUE = 9ca82fa3c18a5fb35d034fb427c45efa4f7228ef endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From b0fc70fac29c1f519706c07f491c1fe64d8d7c05 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 4 Oct 2018 12:23:45 +0200 Subject: [PATCH 459/614] [wpeframework-ui] bump to latest version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 5cd5ffdc8cd9..4d8da6cb58d4 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 8b17a00032760d6257b45bdecccf29285896960c +WPEFRAMEWORK_UI_VERSION = 24692e310d9690d0fc34ec10fb1319aea7791ae3 WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins From 271884e6d7263135a73c6d9f55966bf9e032074f Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 4 Oct 2018 12:28:54 +0200 Subject: [PATCH 460/614] [rpi3] add sdk with pr 150 defconfig --- configs/raspberrypi3_wpe_sdk_defconfig | 105 +++++++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 configs/raspberrypi3_wpe_sdk_defconfig diff --git a/configs/raspberrypi3_wpe_sdk_defconfig b/configs/raspberrypi3_wpe_sdk_defconfig new file mode 100644 index 000000000000..37c35b3e58c2 --- /dev/null +++ b/configs/raspberrypi3_wpe_sdk_defconfig @@ -0,0 +1,105 @@ +BR2_arm=y +BR2_cortex_a7=y +BR2_ARM_FPU_NEON_VFPV4=y +BR2_ARM_INSTRUCTIONS_THUMB2=y +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/raspberrypi3/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/raspberrypi3/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="--add-pi3-miniuart-bt-overlay --rpi-wifi --i2c --spi --1w --tvmode-720 --overclock-pi3 --silent" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="be97febf4aa42b1d019ad24e7948739da8557f66" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/raspberrypi/rpi23-linux-4.9.config" +BR2_LINUX_KERNEL_LZ4=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3" +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_ALSA=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_GST_OMX=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_LINUX_FIRMWARE=y +BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y +BR2_PACKAGE_RPI_FIRMWARE=y +BR2_PACKAGE_RPI_WIFI_FIRMWARE=y +BR2_PACKAGE_RPI_BT_FIRMWARE=y +# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_RPI_USERLAND=y +BR2_PACKAGE_WEBP=y +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI="http://jsonip.metrological.com/?maf=true" +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:200m,webprocess:400m,rpcprocess:80m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_APPS=y +BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Blank" +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT="Mozilla/5.0 (Macintosh, Intel Mac OS X 10_11_4) AppleWebKit/602.1.28+ (KHTML, like Gecko) Version/9.1 Safari/601.5.17 WPE-Reference" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y +BR2_TARGET_ROOTFS_INITRAMFS=y +# BR2_TARGET_ROOTFS_TAR is not set From e4fae177fd5eec675e971e5818e2d5ede2713f7f Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 4 Oct 2018 13:56:43 +0200 Subject: [PATCH 461/614] [uma]: update defconfig file --- configs/uma7439_full_wpe_nf_defconfig | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 042def0f5d1e..1d2b2b664f9b 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -53,15 +53,14 @@ BR2_PACKAGE_NETFLIX5_LIB=y BR2_PACKAGE_GDB=y BR2_PACKAGE_GETTEXT=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y -BR2_PACKAGE_WIDEVINE=y -BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_SAGE_FIRMWARE=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y BR2_PACKAGE_BCM_REFSW_SAGE=y +BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y +BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y BR2_PACKAGE_BCM_REFSW_PMLIB=y BR2_PACKAGE_BCM_REFSW_BOXMODE="1" BR2_PACKAGE_ALSA_LIB=y @@ -87,6 +86,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT="2" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y @@ -97,11 +97,8 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST="306" BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y BR2_PACKAGE_ORC=y From acaf6c4aa3da27e7daee973b3d5282cf1951d6bc Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 4 Oct 2018 16:53:52 +0200 Subject: [PATCH 462/614] [PLAYER] Select NOS player if UMA is selected. --- .../wpeframework-linearbroadcastplayer.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk index 54e9f820c3ec..6e01003027eb 100644 --- a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk +++ b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk @@ -16,5 +16,9 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' endif +ifeq ($(BR2_PACKAGE_UMA_SDK),y) +WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=NOS +endif + $(eval $(cmake-package)) From 649e56b3a7cb2c5c056c55eeece0fb951a6c417b Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Mon, 1 Oct 2018 19:30:59 +0200 Subject: [PATCH 463/614] [wpeframework-plugins] Add option to configure the user/group --- package/wpe/wpeframework-plugins/Config.in | 28 +++++++++++++++++++ .../wpeframework-plugins.mk | 12 ++++++++ 2 files changed, 40 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 2b246a6cd2ac..ff3ca8d00523 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -215,6 +215,20 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_CDMI A CDM server plugin to interact with CDMi plugins. if BR2_PACKAGE_WPEFRAMEWORK_CDMI +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER + string "user" + default "" + help + run OpenCDM as this user, leave empty to use the same as + WPEframework + +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP + string "group" + default "" + help + run OpenCDM as this group, leave empty to use the same as + WPEframework + source "package/wpe/wpeframework-cdmi/Config.in" endif @@ -332,6 +346,20 @@ config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT bool "transparent" default false + +config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER + string "user" + default "" + help + run WebKitBrowser as this user, leave empty to use the same as + WPEframework + +config BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP + string "group" + default "" + help + run WebKitBrowser as this group, leave empty to use the same as + WPEframework menuconfig BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE depends on BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 5f305da2404c..8dd693f425b4 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -71,6 +71,12 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI=ON WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_AUTOSTART=true WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_OOP=true +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_USER=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER) +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP) +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_CLEARKEY=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-clearkey @@ -173,6 +179,12 @@ endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_THREADEDPAINTING=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING) endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_USER=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER) +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP) +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT),) From cdb0e45159b1189e7dbd893d24670bb0729992de Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 5 Oct 2018 14:27:32 +0200 Subject: [PATCH 464/614] [wpewebkit] Add patches for broadcom platforms --- ...003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch} | 0 ...l => 0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch} | 0 ...ch.conditional => 0006-brcm-force-sink-av-factories.patch} | 0 package/wpe/wpewebkit/wpewebkit.mk | 4 ---- 4 files changed, 4 deletions(-) rename package/wpe/wpewebkit/{0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional => 0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch} (100%) rename package/wpe/wpewebkit/{0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional => 0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch} (100%) rename package/wpe/wpewebkit/{0006-brcm-force-sink-av-factories.patch.conditional => 0006-brcm-force-sink-av-factories.patch} (100%) diff --git a/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional b/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch similarity index 100% rename from package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional rename to package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch diff --git a/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional b/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch similarity index 100% rename from package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional rename to package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch diff --git a/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional b/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch similarity index 100% rename from package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch.conditional rename to package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 51fb16b7581e..7fa7b62f144b 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -303,14 +303,10 @@ ifeq ($(BR2_PACKAGE_VSS_SDK),y) WPEWEBKIT_PKGDIR = "$(TOP_DIR)/package/wpe/wpewebkit" define WPEWEBKIT_APPLY_LOCAL_PATCHES - $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch.conditional - $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch.conditional - $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 0006-brcm-force-sink-av-factories.patch.conditional # this platform needs to run this gstreamer version parallel # to an older version. $(APPLY_PATCHES) $(@D) $(WPEWEBKIT_PKGDIR) 9999-link_to_wpe_gstreamer.patch.conditional endef - WPEWEBKIT_POST_PATCH_HOOKS += WPEWEBKIT_APPLY_LOCAL_PATCHES endif From a737f6195f39f1304e69ec7047bcacefb543f593 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 5 Oct 2018 16:09:26 +0200 Subject: [PATCH 465/614] [config] Updated kernel and disabled OCDM --- configs/multichoice_bcm7271_wpe_ml_defconfig | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig index 85fd6712d2f3..8891a2d080f2 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="board/arris/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.9hf" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.15hf" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" BR2_PACKAGE_BUSYBOX_SMP=y @@ -69,10 +69,12 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y @@ -102,3 +104,6 @@ BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y BR2_PACKAGE_WPA_SUPPLICANT_EAP=y BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y BR2_PACKAGE_WPA_SUPPLICANT_WPS=y +BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_ROOTFS_EXT2_4=y +BR2_TARGET_ROOTFS_EXT2_LABEL="rootfs" From f93b685f9aa0660be6492e7fc8b3a852e7792528 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 5 Oct 2018 16:11:37 +0200 Subject: [PATCH 466/614] [config] Updated config to latest WPEFramework components --- configs/bcm7252_wpe_ml_defconfig | 96 +++++++++++++++++++------------- 1 file changed, 57 insertions(+), 39 deletions(-) diff --git a/configs/bcm7252_wpe_ml_defconfig b/configs/bcm7252_wpe_ml_defconfig index d3aa3ab27f63..37b66dde9e36 100644 --- a/configs/bcm7252_wpe_ml_defconfig +++ b/configs/bcm7252_wpe_ml_defconfig @@ -4,87 +4,105 @@ BR2_ARM_FPU_NEON_VFPV4=y BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_OPTIMIZE_2=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_14=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y +BR2_BINUTILS_VERSION_2_24_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_GCC_ENABLE_LTO=y +BR2_PACKAGE_HOST_GDB=y BR2_TARGET_GENERIC_CABUNDLE=y +# BR2_TARGET_GENERIC_NETWORK is not set BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y BR2_TARGET_GENERIC_ROOT_PASSWD="root" BR2_TARGET_GENERIC_GETTY_PORT="ttyS0" BR2_SYSTEM_DHCP="eth0" -BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/clean-rootfs.sh" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/bcm/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y -BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-3.14.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="3.14-1.14-hf" -BR2_LINUX_KERNEL_PATCH="board/bcm/linux-7252.patch" +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.15hf" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/bcm/bcm7252_full_defconfig" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y -# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set -BR2_PACKAGE_ORC=y -BR2_PACKAGE_ICU_USE_ICUDATA=y -BR2_PACKAGE_SHARED_MIME_INFO=y -BR2_PACKAGE_DROPBEAR=y -BR2_PACKAGE_GESFTPSERVER=y -BR2_PACKAGE_PLAYREADY=y -BR2_PACKAGE_LIBPROVISION=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y -BR2_PACKAGE_WPEWEBKIT=y -BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_GRAPHITE2=y +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y -BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO=y -BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -# BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC is not set -BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y -BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" +BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:100m,networkprocess:100m,webprocess:600m,rpcprocess:100m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y -BR2_TARGET_ROOTFS_CPIO=y -BR2_TARGET_ROOTFS_CPIO_XZ=y - -BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y -BR2_PACKAGE_GST1_BCM_VP9_SUPPORT=n +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_C_ARES=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_PACKAGE_WPA_SUPPLICANT=y +BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y +BR2_PACKAGE_WPA_SUPPLICANT_AUTOSCAN=y +BR2_PACKAGE_WPA_SUPPLICANT_EAP=y +BR2_PACKAGE_WPA_SUPPLICANT_HOTSPOT=y +BR2_PACKAGE_WPA_SUPPLICANT_WPS=y +BR2_TARGET_ROOTFS_EXT2=y +BR2_TARGET_ROOTFS_EXT2_4=y +BR2_TARGET_ROOTFS_EXT2_LABEL="rootfs" From 3ab466f552fa5f850032f395861c1b651179aa30 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 5 Oct 2018 19:03:01 +0000 Subject: [PATCH 467/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index da96f5e20b4d..4f286a382de0 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = d0a89526683fcec5c83614eb52c084c505f0d638 +WPEFRAMEWORK_VERSION = 3775c1acd1e13a684e159b48239f44d7a8ffd600 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From 58726466426f1253ee265b47d401fc6159565b28 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 5 Oct 2018 19:03:16 +0000 Subject: [PATCH 468/614] [wpeframework-plugins] bump to latest version --- ...0000-extend-drm-interface-with-keyid.patch | 86 ------------------- .../wpeframework-plugins.mk | 2 +- 2 files changed, 1 insertion(+), 87 deletions(-) delete mode 100644 package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch diff --git a/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch b/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch deleted file mode 100644 index d5dfc3241d7e..000000000000 --- a/package/wpe/wpeframework-plugins/0000-extend-drm-interface-with-keyid.patch +++ /dev/null @@ -1,86 +0,0 @@ -From f4de91ff5dd2da7df9cbb6e64b5daf6d96af0320 Mon Sep 17 00:00:00 2001 -From: Pierre Wielders -Date: Sun, 16 Sep 2018 11:56:27 +0200 -Subject: [PATCH] [OCDMi] Support the retrieval of the SessionId. - ---- - OpenCDMi/FrameworkRPC.cpp | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp -index 6ac8480..2765292 100644 ---- a/OpenCDMi/FrameworkRPC.cpp -+++ b/OpenCDMi/FrameworkRPC.cpp -@@ -375,7 +375,7 @@ namespace Plugin { - inline bool HasKeyId(const uint8_t keyId[]) { - return (_cencData.HasKeyId(keyId)); - } -- const std::string& SessionId() const { -+ virtual std::string SessionId() const override { - return (_sessionId); - } - -From 1d4393fde2bc31a3ce8293c89b109a5021d6f8d7 Mon Sep 17 00:00:00 2001 -From: Pierre Wielders -Date: Wed, 19 Sep 2018 20:36:06 +0200 -Subject: [PATCH] [IDRM] Extend the OpenCDM(i)nterface towards the DRM on - decrypt level with a KeyId. - ---- - OpenCDMi/FrameworkRPC.cpp | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp -index 2765292..9d1c159 100644 ---- a/OpenCDMi/FrameworkRPC.cpp -+++ b/OpenCDMi/FrameworkRPC.cpp -@@ -205,6 +205,7 @@ namespace Plugin { - RequestConsume(WPEFramework::Core::infinite); - - if (IsRunning() == true) { -+ uint8_t keyIdLength = 0; - int cr = _mediaKeys->Decrypt( - _sessionKey, - _sessionKeyLength, -@@ -215,7 +216,9 @@ namespace Plugin { - Buffer(), - BytesWritten(), - &clearContentSize, -- &clearContent); -+ &clearContent, -+ keyIdLength, -+ KeyId(keyIdLength)); - - if ((cr == 0) && (clearContentSize != 0)) { - if (clearContentSize != BytesWritten()) { -From 24cf5931d1201c1cdc86a7e0b2e6f496945ab2fd Mon Sep 17 00:00:00 2001 -From: pwielders -Date: Mon, 24 Sep 2018 21:37:11 +0200 -Subject: [PATCH] Force KeyId to be called before the stack is created. - -Maybe the KeyIdLength value is pushed to the stack before the KeyId() method call is issued. ---- - OpenCDMi/FrameworkRPC.cpp | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/OpenCDMi/FrameworkRPC.cpp b/OpenCDMi/FrameworkRPC.cpp -index 9d1c159..fbf041b 100644 ---- a/OpenCDMi/FrameworkRPC.cpp -+++ b/OpenCDMi/FrameworkRPC.cpp -@@ -206,6 +206,7 @@ namespace Plugin { - - if (IsRunning() == true) { - uint8_t keyIdLength = 0; -+ const uint8_t* keyIdData = KeyId(keyIdLength); - int cr = _mediaKeys->Decrypt( - _sessionKey, - _sessionKeyLength, -@@ -218,7 +219,7 @@ namespace Plugin { - &clearContentSize, - &clearContent, - keyIdLength, -- KeyId(keyIdLength)); -+ keyIdData); - - if ((cr == 0) && (clearContentSize != 0)) { - if (clearContentSize != BytesWritten()) { diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 8dd693f425b4..16aef3c89277 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = b2b1355e3dbf7b69a778b14ec9acb05124d8e5cc +WPEFRAMEWORK_PLUGINS_VERSION = c4043400c5b5fb44b531ec88c07b1b54c161f90a WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 67a9d9b0fd96f9824e25e862541115c355be748b Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 5 Oct 2018 19:03:43 +0000 Subject: [PATCH 469/614] [wpebackend] bump to latest version --- package/wpe/wpebackend/wpebackend.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend/wpebackend.mk b/package/wpe/wpebackend/wpebackend.mk index 4d6b088fddde..bb6e0d536122 100644 --- a/package/wpe/wpebackend/wpebackend.mk +++ b/package/wpe/wpebackend/wpebackend.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_VERSION = 6955316a9c885a0325f3d1adab7062ce3a12810b +WPEBACKEND_VERSION = 4be4c7df5734d125148367a90da477c8d40d9eaf WPEBACKEND_SITE = $(call github,WebPlatformForEmbedded,WPEBackend,$(WPEBACKEND_VERSION)) WPEBACKEND_INSTALL_STAGING = YES WPEBACKEND_DEPENDENCIES += libegl libxkbcommon From 8e935952f009ad345786a9aa6aadc7bc17768a8f Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 5 Oct 2018 19:03:56 +0000 Subject: [PATCH 470/614] [wpebackend-rdk] bump to latest version --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 1c24ec1b2950..95821db3fde7 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 08a71fcd2e0fe900bf92860a3ec5fd3a95430a25 +WPEBACKEND_RDK_VERSION = 0b628970fbcdd0346557db630fc07e909f9dd38b WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 0f92239573d1095575ae144f4e3a4ebce533a6fb Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 5 Oct 2018 19:04:11 +0000 Subject: [PATCH 471/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 7fa7b62f144b..3c890c7857be 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 9ca82fa3c18a5fb35d034fb427c45efa4f7228ef +WPEWEBKIT_VERSION_VALUE = a29e1d6634243341168923b035b6accc1a8ebe5f endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 614e22e687805de0d9276474f0ee992dc2ea4ecf Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 8 Oct 2018 08:28:32 +0000 Subject: [PATCH 472/614] [gcc] fix 6.3 compile issue --- .../942-ubsan-fix-check-empty-string.patch | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 package/gcc/6.3.0/942-ubsan-fix-check-empty-string.patch diff --git a/package/gcc/6.3.0/942-ubsan-fix-check-empty-string.patch b/package/gcc/6.3.0/942-ubsan-fix-check-empty-string.patch new file mode 100644 index 000000000000..98e627053b7a --- /dev/null +++ b/package/gcc/6.3.0/942-ubsan-fix-check-empty-string.patch @@ -0,0 +1,40 @@ +From 8db2cf6353c13f2a84cbe49b689654897906c499 Mon Sep 17 00:00:00 2001 +From: kyukhin +Date: Sat, 3 Sep 2016 10:57:05 +0000 +Subject: [PATCH] gcc/ubsan.c: Fix check for empty string + +Building host-gcc-initial with GCC7 on the host fails due to the +comparison of a pointer to an integer in ubsan_use_new_style_p, which +is forbidden by ISO C++: + +ubsan.c:1474:23: error: ISO C++ forbids comparison between pointer and +integer [-fpermissive] + || xloc.file == '\0' || xloc.file[0] == '\xff' + +Backport the fix from upstream GCC to enable the build with GCC 7. + +Backported from: +https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=239971 + +Signed-off-by: Joshua Lock +[Add commit log from [1]] +Signed-off-by: Jörg Krause + +[1] https://patchwork.openembedded.org/patch/138884/ +--- + gcc/ubsan.c | 2 +- + 2 files changed, 5 insertions(+), 1 deletion(-) + +Index: gcc-6.3.0/gcc/ubsan.c +=================================================================== +--- gcc-6.3.0.orig/gcc/ubsan.c ++++ gcc-6.3.0/gcc/ubsan.c +@@ -1471,7 +1471,7 @@ ubsan_use_new_style_p (location_t loc) + + expanded_location xloc = expand_location (loc); + if (xloc.file == NULL || strncmp (xloc.file, "\1", 2) == 0 +- || xloc.file == '\0' || xloc.file[0] == '\xff' ++ || xloc.file[0] == '\0' || xloc.file[0] == '\xff' + || xloc.file[1] == '\xff') + return false; + From e5bb4bca0447b6493dc87f6b46d8759a6058d3df Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 8 Oct 2018 14:17:15 +0000 Subject: [PATCH 473/614] [wpeframework-plugins] bump to latest version --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 16aef3c89277..d0166e8910d0 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = c4043400c5b5fb44b531ec88c07b1b54c161f90a +WPEFRAMEWORK_PLUGINS_VERSION = fde7e5bd47f33cb37a7163005e2d125ffd02b2b6 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 277e9e8b9517338e4f45df43b97ee0c2a9a469a5 Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 9 Oct 2018 16:14:36 +0200 Subject: [PATCH 474/614] [wpeframework]: When CDM is selected, based on refsw SAGE availability, define a flag for proper ocdm.pc generation --- package/wpe/wpeframework/wpeframework.mk | 3 +++ 1 file changed, 3 insertions(+) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 4f286a382de0..e0ab48b72b08 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -53,6 +53,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDM),y) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_CDMI=ON +ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_CDMI_BCM_NEXUS_SVP=ON +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY),y) From 7cec409f5c90034ee814b91dffd94e6b409da4ba Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 9 Oct 2018 16:32:56 +0000 Subject: [PATCH 475/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 3c890c7857be..3091c0693811 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = a29e1d6634243341168923b035b6accc1a8ebe5f +WPEWEBKIT_VERSION_VALUE = eb3fa46d673b8fdc42a55a2e083c73c9a296e2ee endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From e117d6f8a738491149d23cc3818ded64d1d0734a Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 9 Oct 2018 20:49:04 +0200 Subject: [PATCH 476/614] [webkit][bcm-nexus]: Remove unused bcm nexus patches --- ...ek_To_Buffered_Position_Fix_For_BRCM.patch | 21 --------- .../0006-brcm-force-sink-av-factories.patch | 47 ------------------- ...ion-query-frequency-10ms.patch.conditional | 13 ----- 3 files changed, 81 deletions(-) delete mode 100644 package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch delete mode 100644 package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch delete mode 100644 package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional diff --git a/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch b/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch deleted file mode 100644 index 8d55aa0beeb6..000000000000 --- a/package/wpe/wpewebkit/0005-YT_Seek_To_Buffered_Position_Fix_For_BRCM.patch +++ /dev/null @@ -1,21 +0,0 @@ -diff --git a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -index a65bf63..f93a3cb 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -@@ -352,6 +352,16 @@ bool MediaPlayerPrivateGStreamerMSE::doSeek() - return m_seeking; - } - -+#if PLATFORM(BCM_NEXUS) -+ // When performing bufferedSeek, if the state is still playing, make it paused -+ // Seek will trigger state_change to Playing again -+ getStateResult = gst_element_get_state(m_pipeline.get(), &state, &newState, 0); -+ GST_DEBUG("StateResult:%d CurrentState:%s NewState:%s",getStateResult, gst_element_state_get_name(state), gst_element_state_get_name(newState)); -+ if (state == GST_STATE_PLAYING) { -+ gst_element_set_state(m_pipeline.get(), GST_STATE_PAUSED); -+ } -+#endif -+ - GST_DEBUG("We can seek now"); - - MediaTime startTime = seekTime, endTime = MediaTime::invalidTime(); diff --git a/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch b/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch deleted file mode 100644 index 877f90ece69b..000000000000 --- a/package/wpe/wpewebkit/0006-brcm-force-sink-av-factories.patch +++ /dev/null @@ -1,47 +0,0 @@ -.0diff --git a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -ind0 -0e..x 000a875d2..f9343e0 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -@@ -2359,12 +2359,32 @@ void MediaPlayerPrivateGStreamer::createGSTPlayBin() - m_videoSink = gst_element_factory_make( "db410csink", "optimized vsink"); - g_object_set(m_pipeline.get(), "video-sink", m_videoSink.get(), nullptr); - #endif -+ -+#if PLATFORM(BCM_NEXUS) -+ m_videoSink = gst_element_factory_make( "brcmvideosink", "brcmvideosink"); -+ g_object_set(m_pipeline.get(), "video-sink", m_videoSink.get(), nullptr); - --#if !USE(WESTEROS_SINK) && !USE(FUSION_SINK) -+ GValue window_set = {0, }; -+ static char str[40]; -+ snprintf(str, 40, "%d,%d,%d,%d", 0,0, 1280, 720); -+ -+ g_value_init(&window_set, G_TYPE_STRING); -+ g_value_set_static_string(&window_set, str); -+ g_object_set(m_videoSink.get(), "window_set", str, nullptr); -+ g_object_set(m_videoSink.get(), "zorder", 0, nullptr); -+ -+ GstElement* audioSink = gst_element_factory_make( "brcmaudiosink", "brcmaudiosink"); -+ g_object_set(m_pipeline.get(), "audio-sink", audioSink, nullptr); -+ -+#endif -+ -+#if !USE(WESTEROS_SINK) && !USE(FUSION_SINK) && !PLATFORM(BCM_NEXUS) -+ - g_object_set(m_pipeline.get(), "audio-sink", createAudioSink(), nullptr); - #endif - configurePlaySink(); - -+#if !PLATFORM(BCM_NEXUS) - // On 1.4.2 and newer we use the audio-filter property instead. - // See https://bugzilla.gnome.org/show_bug.cgi?id=735748 for - // the reason for using >= 1.4.2 instead of >= 1.4.0. -@@ -2376,6 +2396,7 @@ void MediaPlayerPrivateGStreamer::createGSTPlayBin() - else - g_object_set(m_pipeline.get(), "audio-filter", scale, nullptr); - } -+#endif - - if (!m_renderingCanBeAccelerated) { - // If not using accelerated compositing, let GStreamer handle diff --git a/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional b/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional deleted file mode 100644 index dcd6103fa12e..000000000000 --- a/package/wpe/wpewebkit/0011-change-position-query-frequency-10ms.patch.conditional +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -index 0a875d2..d855fea 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/MediaPlayerPrivateGStreamer.cpp -@@ -357,7 +357,7 @@ MediaTime MediaPlayerPrivateGStreamer::playbackPosition() const - } - - double now = WTF::currentTime(); -- if (m_lastQuery > -1 && ((now - m_lastQuery) < 0.25) && m_cachedPosition.isValid()) -+ if (m_lastQuery > -1 && ((now - m_lastQuery) < 0.01) && m_cachedPosition.isValid()) - return m_cachedPosition; - - m_lastQuery = now; From 0a3df8b092d4f805f84e4a5e39b3e938fc7f948e Mon Sep 17 00:00:00 2001 From: modeveci Date: Tue, 9 Oct 2018 20:49:23 +0200 Subject: [PATCH 477/614] [configs]: update broadcom defconfigs to not select autodetect plugin by default --- configs/arrisrdk_wpe_ml_defconfig | 2 +- configs/bcm7250_wpe_ml_defconfig | 2 +- configs/bcm7252_wpe_ml_defconfig | 2 +- configs/bcm72604_wpe_ml_defconfig | 2 +- configs/bcm7271_wpe_ml_defconfig | 2 +- configs/bcm7425_wpe_ml_defconfig | 2 +- configs/bcm7428_wpe_ml_defconfig | 2 +- configs/bcm7429_wpe_ml_defconfig | 2 +- configs/bcm7437_wpe_ml_defconfig | 2 +- configs/bcm7439_wpe_ml_defconfig | 2 +- configs/dawn7000_wpe_defconfig | 2 +- configs/dawn7002_wpe_defconfig | 2 +- configs/eos_ppr2_wpe_defconfig | 2 +- configs/eos_wpe_defconfig | 2 +- configs/homecast_wpe_defconfig | 2 +- configs/multichoice_bcm7271_wpe_ml_defconfig | 2 +- configs/technicolor_wpe_ml_defconfig | 2 +- configs/uma7439_full_wpe_nf_defconfig | 2 +- configs/vip2952_wpe_yt_defconfig | 2 +- configs/vss_wpe_ml_defconfig | 2 +- configs/zenterio_mr201_wpe_ml_defconfig | 2 +- 21 files changed, 21 insertions(+), 21 deletions(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 33d25d2be7be..95ff5da7964d 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -34,7 +34,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7250_wpe_ml_defconfig b/configs/bcm7250_wpe_ml_defconfig index bba777724bd2..7f3a85e677a1 100644 --- a/configs/bcm7250_wpe_ml_defconfig +++ b/configs/bcm7250_wpe_ml_defconfig @@ -29,7 +29,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7252_wpe_ml_defconfig b/configs/bcm7252_wpe_ml_defconfig index 37b66dde9e36..1f5d4115b153 100644 --- a/configs/bcm7252_wpe_ml_defconfig +++ b/configs/bcm7252_wpe_ml_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/bcm72604_wpe_ml_defconfig b/configs/bcm72604_wpe_ml_defconfig index 63ee18a05748..93def492fbf0 100644 --- a/configs/bcm72604_wpe_ml_defconfig +++ b/configs/bcm72604_wpe_ml_defconfig @@ -33,7 +33,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7271_wpe_ml_defconfig b/configs/bcm7271_wpe_ml_defconfig index 9a9b7d80a4f1..72d92013f072 100644 --- a/configs/bcm7271_wpe_ml_defconfig +++ b/configs/bcm7271_wpe_ml_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/bcm7425_wpe_ml_defconfig b/configs/bcm7425_wpe_ml_defconfig index 759dce931bc5..54a6ee41db85 100644 --- a/configs/bcm7425_wpe_ml_defconfig +++ b/configs/bcm7425_wpe_ml_defconfig @@ -29,7 +29,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7428_wpe_ml_defconfig b/configs/bcm7428_wpe_ml_defconfig index 3ec36a6d9ad4..a0dd40ba991a 100644 --- a/configs/bcm7428_wpe_ml_defconfig +++ b/configs/bcm7428_wpe_ml_defconfig @@ -29,7 +29,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index b8363dfc8315..6e3f410c7517 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -28,7 +28,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/bcm7437_wpe_ml_defconfig b/configs/bcm7437_wpe_ml_defconfig index ff4718f89cae..cd793530bd87 100644 --- a/configs/bcm7437_wpe_ml_defconfig +++ b/configs/bcm7437_wpe_ml_defconfig @@ -29,7 +29,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/bcm7439_wpe_ml_defconfig b/configs/bcm7439_wpe_ml_defconfig index a2e5ac92c890..8ec5dfe38d32 100644 --- a/configs/bcm7439_wpe_ml_defconfig +++ b/configs/bcm7439_wpe_ml_defconfig @@ -36,7 +36,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/dawn7000_wpe_defconfig b/configs/dawn7000_wpe_defconfig index 42b88b869755..1b2c4c50ea47 100644 --- a/configs/dawn7000_wpe_defconfig +++ b/configs/dawn7000_wpe_defconfig @@ -28,7 +28,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/dawn7002_wpe_defconfig b/configs/dawn7002_wpe_defconfig index 33795d5846eb..6b8a3a7d73f6 100644 --- a/configs/dawn7002_wpe_defconfig +++ b/configs/dawn7002_wpe_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/eos_ppr2_wpe_defconfig b/configs/eos_ppr2_wpe_defconfig index ed6604103b5e..0dcc0151ac5b 100644 --- a/configs/eos_ppr2_wpe_defconfig +++ b/configs/eos_ppr2_wpe_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/eos_wpe_defconfig b/configs/eos_wpe_defconfig index 0762d53a2ed0..3699cadefbc6 100644 --- a/configs/eos_wpe_defconfig +++ b/configs/eos_wpe_defconfig @@ -30,7 +30,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y diff --git a/configs/homecast_wpe_defconfig b/configs/homecast_wpe_defconfig index c8caa7b3054b..5a7369e5725a 100644 --- a/configs/homecast_wpe_defconfig +++ b/configs/homecast_wpe_defconfig @@ -26,7 +26,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig index 8891a2d080f2..feff2cb87dcf 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/technicolor_wpe_ml_defconfig b/configs/technicolor_wpe_ml_defconfig index 3c533968cc6b..c1be8cdbc58e 100644 --- a/configs/technicolor_wpe_ml_defconfig +++ b/configs/technicolor_wpe_ml_defconfig @@ -29,7 +29,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 1d2b2b664f9b..c603bd229947 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/vip2952_wpe_yt_defconfig b/configs/vip2952_wpe_yt_defconfig index 794e4cddef3e..5601cc21c965 100644 --- a/configs/vip2952_wpe_yt_defconfig +++ b/configs/vip2952_wpe_yt_defconfig @@ -25,7 +25,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index 0ecc2a62bc28..c80b52d51f11 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -28,7 +28,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y diff --git a/configs/zenterio_mr201_wpe_ml_defconfig b/configs/zenterio_mr201_wpe_ml_defconfig index 6c1850175a6f..5c2c921c2402 100644 --- a/configs/zenterio_mr201_wpe_ml_defconfig +++ b/configs/zenterio_mr201_wpe_ml_defconfig @@ -28,7 +28,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y From 34a590d5abc0298574ca55a3efb1ac5898bb4aff Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 9 Oct 2018 20:46:28 +0000 Subject: [PATCH 478/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index e0ab48b72b08..ef27b62adff5 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 3775c1acd1e13a684e159b48239f44d7a8ffd600 +WPEFRAMEWORK_VERSION = 7280b09744c1b47281023fb8cd1c3d8db6280de7 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib From f9961e3df64f247fb2a5c12ed47ccca8317ef984 Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 9 Oct 2018 20:46:44 +0000 Subject: [PATCH 479/614] [wpewebkit] bump to latest version --- ..._MSE_Conformance_Test_55_DelayedAACAudio.patch | 15 --------------- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 2 files changed, 1 insertion(+), 16 deletions(-) delete mode 100644 package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch diff --git a/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch b/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch deleted file mode 100644 index ff441f501c61..000000000000 --- a/package/wpe/wpewebkit/0003-MSE2018_MSE_Conformance_Test_55_DelayedAACAudio.patch +++ /dev/null @@ -1,15 +0,0 @@ -diff --git a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -index a65bf63..25822af 100644 ---- a/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -+++ b/Source/WebCore/platform/graphics/gstreamer/mse/MediaPlayerPrivateGStreamerMSE.cpp -@@ -602,7 +602,9 @@ void MediaPlayerPrivateGStreamerMSE::updateStates() - m_volumeAndMuteInitialized = true; - } - -- if (!seeking() && !buffering && !m_paused && m_playbackRate) { -+ if (!isTimeBuffered(currentMediaTime()) && !playbackPipelineHasFutureData()) { -+ m_readyState = MediaPlayer::HaveMetadata; -+ } else if (!seeking() && !buffering && !m_paused && m_playbackRate) { - GST_DEBUG("[Buffering] Restarting playback."); - changePipelineState(GST_STATE_PLAYING); - } diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 3091c0693811..4ead39c3f0ac 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = eb3fa46d673b8fdc42a55a2e083c73c9a296e2ee +WPEWEBKIT_VERSION_VALUE = 34be98c99b8e3332eb9239a1c5d3e3c1274e5706 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From e4c5af461441621a0d4d26e0c2144e3f028a7e85 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 10 Oct 2018 15:30:50 +0000 Subject: [PATCH 480/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 4ead39c3f0ac..643ed1a94264 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 34be98c99b8e3332eb9239a1c5d3e3c1274e5706 +WPEWEBKIT_VERSION_VALUE = 037206e53711588a0ba9b1f71e0fb36c78e56b5d endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 6a548dd20a04a9edc1a48174bee7120e7f5a048e Mon Sep 17 00:00:00 2001 From: Zan Dobersek Date: Wed, 10 Oct 2018 17:03:21 +0200 Subject: [PATCH 481/614] wpewebkit: prepare the road for 2.22 Signed-off-by: Xabier Rodriguez Calvar --- package/wpe/wpewebkit/wpewebkit.mk | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 643ed1a94264..8b374011549c 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -233,8 +233,7 @@ ifeq ($(WPEWEBKIT_BUILD_JSC),y) WPEWEBKIT_BUILD_TARGETS += jsc endif ifeq ($(WPEWEBKIT_BUILD_WEBKIT),y) -WPEWEBKIT_BUILD_TARGETS += libWPEWebKit.so libWPEWebInspectorResources.so \ - WPE{Network,Storage,Web}Process WPEWebDriver +WPEWEBKIT_BUILD_TARGETS += all endif @@ -283,7 +282,7 @@ define WPEWEBKIT_INSTALL_TARGET_CMDS_WEBKIT cp $(WPEWEBKIT_BUILDDIR)/bin/WPE{Network,Storage,Web}Process $(TARGET_DIR)/usr/bin/ && \ cp $(WPEWEBKIT_BUILDDIR)/bin/WPEWebDriver $(TARGET_DIR)/usr/bin/ && \ cp -d $(WPEWEBKIT_BUILDDIR)/lib/libWPE* $(TARGET_DIR)/usr/lib/ && \ - $(STRIPCMD) $(TARGET_DIR)/usr/lib/libWPEWebKit.so.* + $(STRIPCMD) $(TARGET_DIR)/usr/lib/libWPEWebKit*.so.* endef else WPEWEBKIT_INSTALL_TARGET_CMDS_WEBKIT = true From 69c1d552ce4a6c2e52b1466ba92624440e9d8935 Mon Sep 17 00:00:00 2001 From: Xabier Rodriguez Calvar Date: Thu, 11 Oct 2018 10:03:14 +0200 Subject: [PATCH 482/614] widevine: revert commit causing regression --- .../wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk index 467e38c5af23..631a85891511 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/wpeframework-cdmi-widevine.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = 83643c5975b15b6ff87b0c183c9169c64d8c4ca2 +WPEFRAMEWORK_CDMI_WIDEVINE_VERSION = ac3a765bdf96027fcb4ff67b0ca69858eb5dd665 WPEFRAMEWORK_CDMI_WIDEVINE_SITE_METHOD = git WPEFRAMEWORK_CDMI_WIDEVINE_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Widevine.git WPEFRAMEWORK_CDMI_WIDEVINE_INSTALL_STAGING = NO From 6d3c94a735a333274a2dc5e8c4a94dfa740fe977 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 12 Oct 2018 10:39:24 +0200 Subject: [PATCH 483/614] [configs] disabled all DRM, corrected kernel headers --- configs/multichoice_bcm7271_wpe_ml_defconfig | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig index feff2cb87dcf..4c0a6556aee3 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -5,7 +5,7 @@ BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_1=y +BR2_KERNEL_HEADERS_4_1=y BR2_BINUTILS_VERSION_2_24_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_GCC_ENABLE_LTO=y @@ -49,9 +49,6 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y -BR2_PACKAGE_WIDEVINE=y -BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y @@ -70,7 +67,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y From 9f7ed28f4b0135152b04e39314db2d97b8282435 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 12 Oct 2018 10:45:27 +0200 Subject: [PATCH 484/614] [cdmi-vgdrm-playready] Bump version --- .../wpeframework-cdmi-playready-vgrdm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk index 731b49153e7d..d8d5a788678d 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = 4d2c73832fc505fa0ba5ef7734119873576837e6 +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = 8d5467184f544c3b7f6a6226df58e96fb4be06bd WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-VGDRM.git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_INSTALL_STAGING = YES From babcc3f58d0a64da664370c4e649a429fa67d047 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 12 Oct 2018 10:50:03 +0200 Subject: [PATCH 485/614] [bcm boards] Add option to install keymaps --- board/bcm/post-build.sh | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/board/bcm/post-build.sh b/board/bcm/post-build.sh index cdbabef142e0..85d260623076 100755 --- a/board/bcm/post-build.sh +++ b/board/bcm/post-build.sh @@ -1,11 +1,27 @@ #!/bin/bash - - set -u set -e echo "Post-build: processing $@" +KEYMAP="" + +for i in "$@" +do +case $i in + -k=*|--keymap=*) # --keymap=ir-remote:advancetv.json + KEYMAP="${KEYMAP} ${i#*=}" + shift # past argument=value + ;; + #-s=*|--searchpath=*) + #SEARCHPATH="${i#*=}" + #shift # past argument=value + #;; + *) # unknown option + ;; +esac +done + BOARD_DIR="$(dirname $0)" # Copy index.html page for WPE Framework @@ -13,3 +29,15 @@ if [ -f "${BOARD_DIR}/index.html" ]; then mkdir -p "${TARGET_DIR}/www/" cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" fi + +# copy keymaps multiple --keymap arguments can be given. +for k in ${KEYMAP} +do +source=$(echo $k | cut -f2 -d:) +destination=$(echo $k | cut -f1 -d:).json +if [ -f "${BOARD_DIR}/${source}" ]; then + echo "Add keymap ${source} as ${destination}" + mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl" + cp -pf "${BOARD_DIR}/${source}" "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/${destination}" +fi +done From 1b37303ab19f587e30043d3c3491dc5600b23025 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 12 Oct 2018 10:55:26 +0200 Subject: [PATCH 486/614] [bcm boards] Add new keymap --- board/bcm/advancetv-ir-remote.json | 39 ++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 board/bcm/advancetv-ir-remote.json diff --git a/board/bcm/advancetv-ir-remote.json b/board/bcm/advancetv-ir-remote.json new file mode 100644 index 000000000000..30dbcbaded13 --- /dev/null +++ b/board/bcm/advancetv-ir-remote.json @@ -0,0 +1,39 @@ +[ + { "code": "0xFF001000", "key": 116, "char": "[POWER]" }, + { "code": "0xEC131000", "key": 28, "char": "[OK]" }, + { "code": "0xEE111000", "key": 103, "char": "[UP]" }, + { "code": "0xEA151000", "key": 108, "char": "[DOWN]" }, + { "code": "0xED121000", "key": 105, "char": "[LEFT]" }, + { "code": "0xEB141000", "key": 106, "char": "[RIGHT]" }, + { "code": "0xF10E1000", "key": 1, "char": "[MENU]" }, + { "code": "0xF30C1000", "key": 11, "char": "[0]" }, + { "code": "0xFC031000", "key": 2, "char": "[1]" }, + { "code": "0xFB041000", "key": 3, "char": "[2]" }, + { "code": "0xFA051000", "key": 4, "char": "[3]" }, + { "code": "0xF9061000", "key": 5, "char": "[4]" }, + { "code": "0xF8071000", "key": 6, "char": "[5]" }, + { "code": "0xF7081000", "key": 7, "char": "[6]" }, + { "code": "0xF6091000", "key": 8, "char": "[7]" }, + { "code": "0xF50A1000", "key": 9, "char": "[8]" }, + { "code": "0xF40B1000", "key": 10, "char": "[9]" }, + { "code": "0xF00F1000", "key": 32, "char": "[CHANNEL DOWN]" }, + { "code": "0xEF101000", "key": 22, "char": "[CHANNEL UP]" }, + { "code": "0xE11E1000", "key": 113, "char": "[MUTE]" }, + { "code": "0xE11E1000", "key": 114, "char": "[VOLUME DOWN]" }, + { "code": "0xE11E1000", "key": 115, "char": "[VOLUME UP]" }, + { "code": "0xE41B1000", "key": 43, "char": "[GUIDE]" }, + { "code": "0xB8471000", "key": 53, "char": "[SEARCH]" }, + { "code": "0xBE411000", "key": 14, "char": "[BACK]" }, + { "code": "0xE9161000", "key": 174, "char": "[EXIT]" }, + { "code": "0x9C631000", "key": 166, "char": "[STOP]" }, + { "code": "0x9F601000", "key": 164, "char": "[PLAYPAUE]" }, + { "code": "0x9E611000", "key": 167, "char": "[RECORD]" }, + { "code": "0x9B641000", "key": 208, "char": "[FORWARD]" }, + { "code": "0x9A651000", "key": 168, "char": "[REWIND]" }, + { "code": "0x98671000", "key": 163, "char": "[NEXT]" }, + { "code": "0x99661000", "key": 165, "char": "[PREVIOUS]" }, + { "code": "0xE31C1000", "key": 398, "char": "[RED]" }, + { "code": "0xE21D1000", "key": 399, "char": "[GREEN]" }, + { "code": "0xE51A1000", "key": 400, "char": "[YELLOW]" }, + { "code": "0xE11E1000", "key": 401, "char": "[BLUE]" }, +] From 0c8730111d35310932591c0d424b45f9db023cb9 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 12 Oct 2018 10:56:29 +0200 Subject: [PATCH 487/614] [board vss] update image scripts --- board/bcm/start.vss.sh | 22 ++++------------------ board/bcm/vss.sh | 12 ++++-------- 2 files changed, 8 insertions(+), 26 deletions(-) diff --git a/board/bcm/start.vss.sh b/board/bcm/start.vss.sh index 9327fcbe0b5b..374de17fadbf 100755 --- a/board/bcm/start.vss.sh +++ b/board/bcm/start.vss.sh @@ -1,19 +1,5 @@ -#!/bin/sh -export SOURCE=/home/metrological -export CORES=/opt/cores - -grep -q "/usr/lib/gio" /proc/mounts && - echo "/usr/lib/gio is already mounted" || mount --bind $SOURCE/usr/lib/gio /usr/lib/gio - -export LD_LIBRARY_PATH=$SOURCE/usr/ml_libs:/lib:/usr/lib:$SOURCE/lib:$SOURCE/usr/lib:$SOURCE/usr/lib/wpeframework/plugins:$SOURCE/usr/lib/wpeframework/proxystubs -export PATH=$SOURCE/usr/bin:$PATH - -export GST_PLUGIN_SCANNER=$SOURCE/usr/libexec/gstreamer-1.0/gst-plugin-scanner -export GST_PLUGIN_SYSTEM_PATH=$SOURCE/usr/ml_libs/gstreamer-1.0 +#!/bin/bash +export LD_LIBRARY_PATH='/lib:/usr/lib:/mnt/flash/wpe/usr/lib' +export GST_PLUGIN_SYSTEM_PATH=/usr/lib/gstreamer-1.0-wpe export GST_REGISTRY=/tmp/gst-registry.bin - -mkdir -p ${CORES} -ulimit -c unlimited -echo "${CORES}/core.%e.%p.%t" > /proc/sys/kernel/core_pattern - -WPEFramework -c $SOURCE/etc/WPEFramework/config.json +WPEFramework1 "$@" diff --git a/board/bcm/vss.sh b/board/bcm/vss.sh index dfd3dfa8c27a..03517b7cd5bc 100755 --- a/board/bcm/vss.sh +++ b/board/bcm/vss.sh @@ -1,7 +1,6 @@ #!/bin/sh BOARD_DIR="$(dirname $0)" ROOTFS_DIR="${BINARIES_DIR}/../rootfs" -ROOTFS_INSTALL_DIR="${ROOTFS_DIR}/home/metrological" ROOTFS_FILES="${BINARIES_DIR}/rootfs.files" STAR="*" @@ -12,7 +11,6 @@ rm -rf "${TARGET_DIR}/etc/ssl/man" # Temp rootfs dir mkdir -p "${ROOTFS_DIR}/usr/bin" -mkdir -p "${ROOTFS_INSTALL_DIR}" # Create files list for rsync rm -rf "${ROOTFS_FILES}" @@ -21,16 +19,14 @@ do find "${TARGET_DIR}" -name "$line$STAR" -printf "%P\n" >> "${ROOTFS_FILES}" done < "${BOARD_DIR}/vss.txt" -# Append missing folders -echo "usr/lib/gio" >> "${ROOTFS_FILES}" - -rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_INSTALL_DIR}" +rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_DIR}" # WPEFramework launcher -cp -apf "${BOARD_DIR}/start.vss.sh" "${ROOTFS_DIR}/usr/bin/wpe" +mv "${ROOTFS_DIR}/usr/bin/WPEFramework" "${ROOTFS_DIR}/usr/bin/WPEFramework1" +cp -apf "${BOARD_DIR}/start.vss.sh" "${ROOTFS_DIR}/usr/bin/WPEFramework" # Create tar -tar -cvf "${BINARIES_DIR}/vss.tar" -C "${ROOTFS_DIR}" . +tar -cf "${BINARIES_DIR}/vss.tar" -C "${ROOTFS_DIR}" . # Cleaning up rm -rf "${ROOTFS_FILES}" From d0c21906b4c09c39bc0eefa4bfa3a39c24ba7125 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 12 Oct 2018 12:23:21 +0000 Subject: [PATCH 488/614] [wpeframework-plugins] correct typo in Config.in --- package/wpe/wpeframework-plugins/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index ff3ca8d00523..93508eb37b20 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -368,7 +368,7 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE A wrapper around the youtube app to start it as a wpeframework plugin. -if BR2_PACKAGE_WPEFRAMEWORK_UX +if BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE config BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT string "useragent" From 2bb74d5213f3241b0abff544bccb72ba74842762 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Tue, 16 Oct 2018 22:54:57 -0700 Subject: [PATCH 489/614] [homecast] update scrips, defconfig and point gst1-bcm to platformserver branch --- board/homecast/homecast.sh | 11 ++++ board/homecast/homecast.txt | 70 ++++--------------------- board/homecast/homecast/wpeframework.sh | 23 ++++---- configs/homecast_wpe_defconfig | 14 ++--- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 4 +- 5 files changed, 41 insertions(+), 81 deletions(-) diff --git a/board/homecast/homecast.sh b/board/homecast/homecast.sh index 8a5cf8e0ae50..02644d0075b5 100755 --- a/board/homecast/homecast.sh +++ b/board/homecast/homecast.sh @@ -37,6 +37,17 @@ cp -f "${TARGET_DIR}/usr/share/fonts/ttf-bitstream-vera/Vera.ttf" "${ROOTFS_DIR} # move utility lib of brcm plugin to usr/lib mv "${ROOTFS_DIR}/usr/lib/gstreamer-1.0/libbrcmgstutil.so" "${ROOTFS_DIR}/usr/lib/" +# add nxclient.so dummy file +cp -f "${STAGING_DIR}/lib/libnxclient.so" "${ROOTFS_DIR}/lib" + +# Copy XKB locales +mkdir -p "{ROOTFS_DIR}/usr/share/X11" +cp -r "${STAGING_DIR}/usr/share/X11" "${ROOTFS_DIR}/usr/share/X11" + +# Copy keymap for cubiware remote (through web) +mkdir -p "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/" +cp -pf "${BOARD_DIR}/homecast-ir-remote.json" "${TARGET_DIR}/usr/share/WPEFramework/RemoteControl/web-remote.json" + # WPEFramework launcher cp -pf "${BOARD_DIR}/homecast/wpeframework.sh" "${ROOTFS_DIR}" diff --git a/board/homecast/homecast.txt b/board/homecast/homecast.txt index ccd52b3208e8..ff016ecbb996 100644 --- a/board/homecast/homecast.txt +++ b/board/homecast/homecast.txt @@ -1,12 +1,5 @@ -WPENetworkProcess -WPEWebProcess -WPEStorageProcess -WPEFramework -WPEProcess -gst-plugin-scanner -gst-inspect-1.0 -gst-launch-1.0 -gst-typefind-1.0 +WPE* +gst-* libatomic.so libudev.so libcairo.so @@ -30,22 +23,7 @@ libgnutls.so libgobject-2.0.so libgpg-error.so libgraphite2.so -libgstadaptivedemux-1.0.so -libgstapp-1.0.so -libgstaudio-1.0.so -libgstbase-1.0.so -libgstcodecparsers-1.0.so -libgstfaad.so -libgstfft-1.0.so -libgstpbutils-1.0.so -libgstmpegts-1.0.so -libgstnet-1.0.so -libgstreamer-1.0.so -libgsttag-1.0.so -libgstriff-1.0.so -libgstrtp-1.0.so -libgsturidownloader-1.0.so -libgstvideo-1.0.so +libgst*.so libharfbuzz-icu.so libharfbuzz.so libhogweed.so @@ -59,6 +37,7 @@ libmng.so libmtdev.so libnetflix.so libnettle.so +libopus.so liborc-0.4.so liborc-test-0.4.so libpcre.so @@ -74,10 +53,7 @@ libstdc++.so libtasn1.so libwebp.so libwebsocket.so -libWPE.so -libWPE-platform.so -libWPEWebInspectorResources.so -libWPEWebKit.so +libWPE*.so libxkbcommon.so libxml2.so libxslt.so @@ -92,38 +68,10 @@ libuuid.so.1 libintl.so.8 libiconv.so.2 ca-certificates.crt -libWPEFrameworkDeviceInfo.so -libWPEFrameworkLocationSync.so -libWPEFrameworkRemoteControl.so -libWPEFrameworkWebKitBrowser.so -libWPEFrameworkDIALServer.so -libWPEFrameworkMonitor.so -libWPEFrameworkTraceControl.so -libWPEFrameworkWebServer.so -libWPEFrameworkInterfaces.so -libWPEFrameworkProxyStubs.so -libWPEFrameworkCore.so -libWPEFrameworkCryptalgo.so -libWPEFrameworkPlugins.so -libWPEFrameworkProtocols.so -libWPEFrameworkTracing.so -libWPEFrameworkVirtualInput.so -libWPEFrameworkTimeSync.so -libWPEFrameworkWebShell.so -libWPEFrameworkSwitchBoard.so -libWPEFrameworkProvisioning.so -libWPEFrameworkNetflix.so -libWPEFrameworkOCDM.so +libWPEFramework*.so libnxclient.so -libWPEBackend.so -libWPEBackend-rdk.so -libWPEBackend-default.so +libwpe*.so +libWPEBackend*.so libwebpdemux.so -libbrcmgstutil.so -libbrcmaudiodecoder.so -libbrcmaudiofilter.so -libbrcmaudiosink.so -libbrcmvideodecoder.so -libbrcmvideosink.so -libbrcmvidfilter.so +libbrcm*.so libocdm.so diff --git a/board/homecast/homecast/wpeframework.sh b/board/homecast/homecast/wpeframework.sh index bcf93c47ae7d..a70a3d7b7130 100755 --- a/board/homecast/homecast/wpeframework.sh +++ b/board/homecast/homecast/wpeframework.sh @@ -11,17 +11,20 @@ export FONTCONFIG_PATH=/tmp/nfs/metrological/etc/fonts/ export XKB_CONFIG_ROOT=/tmp/nfs/metrological/usr/share/X11/xkb/ export GIO_MODULE_DIR=$SOURCE/usr/lib/gio/modules -# GnuTLS doesn’t honor an environment variable like ‘SSL_CERT_DIR’. -# As temporary solution bind directory with ca-certificates. -export DESTINATION=/tmp/nfs/cwc -if [ ! -d $DESTINATION ]; then -mkdir -p $DESTINATION//etc/ssl/certs - cp -rfap /etc/* $DESTINATION//etc/ssl/certs - ln -s $SOURCE/etc/ssl/certs/ca-certificates.crt $DESTINATION/etc/ssl/certs/ca-certificates.crt -fi +# Enable GST debugging +#export GST_DEBUG=3 -grep -q "/etc/ssl/certs" /proc/mounts && echo "/etc/ssl/certs is already mounted" || mount --bind $DESTINATION/etc/ssl/certs /etc/ssl/certs +# Drop caches +echo 3 > /proc/sys/vm/drop_caches + +# Core files +#mkdir -p /tmp/nfs/metrological/cores +#echo 1 > /proc/sys/kernel/core_uses_pid +#echo 2 > /proc/sys/fs/suid_dumpable +#echo "/tmp/nfs/metrological/cores/core--process%E" > /proc/sys/kernel/core_pattern +#ulimit -c unlimited # Firewall for non-prod builds iptables -I INPUT -i eth0 -p tcp --dport 80 -m state --state NEW,ESTABLISHED -j ACCEPT -LD_PRELOAD=$SOURCE/lib/libstdc\+\+.so.6.0.21:/lib/libnexus.so WPEFramework -c $SOURCE/etc/WPEFramework/config.json 2>&1 | logger -t “WPEFramework” +#iptables -I INPUT -i eth0 -p tcp --dport 9998 -m state --state NEW,ESTABLISHED -j ACCEPT +LD_PRELOAD=$SOURCE/lib/libstdc\+\+.so.6.0.21:/lib/libnexus.so WPEFramework -c $SOURCE/etc/WPEFramework/config.json diff --git a/configs/homecast_wpe_defconfig b/configs/homecast_wpe_defconfig index 5a7369e5725a..53bc596c03e2 100644 --- a/configs/homecast_wpe_defconfig +++ b/configs/homecast_wpe_defconfig @@ -26,9 +26,8 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y @@ -37,7 +36,7 @@ BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y -BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +# BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD is not set BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y @@ -46,7 +45,6 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_HOMECAST_SDK=y -BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_JPEG_TURBO=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y @@ -55,11 +53,8 @@ BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/tmp/nfs/metrological/persistent" BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/tmp/nfs/metrological/usr/share/WPEFramework" BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/plugins" BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/tmp/nfs/metrological/usr/lib/wpeframework/proxystubs" -BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y -BR2_PACKAGE_WPEFRAMEWORK_CDM=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set @@ -69,12 +64,13 @@ BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y # BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART is not set +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:170m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEWEBKIT=y # BR2_PACKAGE_WPEWEBKIT_USE_WEB_AUDIO is not set +# BR2_PACKAGE_WPEWEBKIT_USE_GSTREAMER_WEBKIT_HTTP_SRC is not set BR2_PACKAGE_LIBXKBCOMMON=y -BR2_PACKAGE_C_ARES=y -BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_UTIL_LINUX_PIVOT_ROOT=y diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 2222237da943..b3d4899e9b12 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -16,8 +16,10 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) GST1_BCM_VERSION = 17.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) GST1_BCM_VERSION = 17.1-7 -else ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK) $(BR2_PACKAGE_HOMECAST_SDK)),) +else ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK)),) GST1_BCM_VERSION = 17.1-5 +else ifneq ($(filter y,$(BR2_PACKAGE_HOMECAST_SDK)),) +GST1_BCM_VERSION = 961a36dcd30c91330b8a9503e12ec3ddb30b70b6 else ifneq ($(filter y,$(BR2_PACKAGE_VSS_SDK)),) GST1_BCM_VERSION = dd00f0762b7dfed4e4e657482d085e554201fa48 else From d4fe6b11b8b1b705204b883279b71425b7f50eb3 Mon Sep 17 00:00:00 2001 From: SKumarMetro Date: Wed, 17 Oct 2018 17:17:54 -0700 Subject: [PATCH 490/614] [RtspClient] Initial Commit --- package/wpe/wpeframework-plugins/Config.in | 7 +++++++ package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 3 +++ 2 files changed, 10 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 93508eb37b20..5df91dce6a9a 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -551,4 +551,11 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST or '-' to define the range. eg:- 354,362,370 or 354-370 endif +config BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_RTSPCLIENT + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + default n + bool "RTSPCLIENT" + help + RTSP Client Plugin + comment "External plugins below" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index d0166e8910d0..5c7293ec352c 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -210,6 +210,9 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_USERAGENT=$(BR2_PACKA endif endif endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_RTSPCLIENT),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RTSPCLIENT=ON +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBPROXY=ON endif From 4d4e4865a11cd5168c5b2c4548ddd7f8f4cde055 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Mon, 22 Oct 2018 01:00:15 +0200 Subject: [PATCH 491/614] [CDMI] Add Nagra Connect DRM for Open CDM(i) --- package/wpe/wpeframework-cdmi/Config.in | 1 + .../wpeframework-cdmi-nagra/Config.in | 8 ++++++++ .../wpeframework-cdmi-nagra.mk | 13 +++++++++++++ 3 files changed, 22 insertions(+) create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk diff --git a/package/wpe/wpeframework-cdmi/Config.in b/package/wpe/wpeframework-cdmi/Config.in index 6fff1da23b78..769259d06840 100644 --- a/package/wpe/wpeframework-cdmi/Config.in +++ b/package/wpe/wpeframework-cdmi/Config.in @@ -4,3 +4,4 @@ source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/Config.i source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/Config.in" +source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in" diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in new file mode 100644 index 000000000000..b915fd1e3bc8 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in @@ -0,0 +1,8 @@ +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_NAGRA + bool "nagra" + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + default y + help + Nagra + diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk new file mode 100644 index 000000000000..58c149158389 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk @@ -0,0 +1,13 @@ +################################################################################ +# +# wpeframework-cdmi-nagra +# +################################################################################ + +WPEFRAMEWORK_CDMI_NAGRA_VERSION = 615f202efe4f2de942190c806ee4ccf6dd46784a +WPEFRAMEWORK_CDMI_NAGRA_SITE_METHOD = git +WPEFRAMEWORK_CDMI_NAGRA_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Nagra.git +WPEFRAMEWORK_CDMI_NAGRA_INSTALL_STAGING = NO +WPEFRAMEWORK_CDMI_NAGRA_DEPENDENCIES = wpeframework + +$(eval $(cmake-package)) From 5aabee0bf4015123fb62058ee05836ac1653d22b Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Mon, 22 Oct 2018 01:03:27 +0200 Subject: [PATCH 492/614] [CDMI] By default we do not want to build the Nagra CDM(i). --- package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in index b915fd1e3bc8..d3eba125bb8b 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in @@ -2,7 +2,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_CDMI_NAGRA bool "nagra" select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_WPEFRAMEWORK_CDM - default y + default n help Nagra From 57244cbd856a53259dd8858b1059af1175df76be Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Mon, 1 Oct 2018 21:37:52 +0530 Subject: [PATCH 493/614] AAMP: basic support added --- package/Config.in | 3 + package/aamp/Config.in | 11 +++ package/aamp/aamp.mk | 14 +++ package/aampabr/Config.in | 5 ++ package/aampabr/aampabr.mk | 12 +++ package/gstreamer1/Config.in | 1 + package/gstreamer1/gst1-aamp/Config.in | 6 ++ package/gstreamer1/gst1-aamp/gst1-aamp.mk | 13 +++ package/libdash/0001-libdash-build.patch | 13 +++ .../0002-libdash-starttime-uint64.patch | 89 +++++++++++++++++++ package/libdash/Config.in | 8 ++ package/libdash/libdash.mk | 38 ++++++++ package/libdash/libdash.pc | 10 +++ 13 files changed, 223 insertions(+) create mode 100644 package/aamp/Config.in create mode 100644 package/aamp/aamp.mk create mode 100644 package/aampabr/Config.in create mode 100644 package/aampabr/aampabr.mk create mode 100644 package/gstreamer1/gst1-aamp/Config.in create mode 100644 package/gstreamer1/gst1-aamp/gst1-aamp.mk create mode 100644 package/libdash/0001-libdash-build.patch create mode 100644 package/libdash/0002-libdash-starttime-uint64.patch create mode 100644 package/libdash/Config.in create mode 100644 package/libdash/libdash.mk create mode 100644 package/libdash/libdash.pc diff --git a/package/Config.in b/package/Config.in index 21166d4caf24..393ff97f0660 100644 --- a/package/Config.in +++ b/package/Config.in @@ -4,6 +4,8 @@ menu "Target packages" source "package/skeleton/Config.in" menu "Audio and video applications" + source "package/aamp/Config.in" + source "package/aampabr/Config.in" source "package/alsa-utils/Config.in" source "package/amazon/Config.in" source "package/aumix/Config.in" @@ -1228,6 +1230,7 @@ menu "Multimedia" source "package/libass/Config.in" source "package/libbdplus/Config.in" source "package/libbluray/Config.in" + source "package/libdash/Config.in" source "package/libdcadec/Config.in" source "package/libdvbcsa/Config.in" source "package/libdvbpsi/Config.in" diff --git a/package/aamp/Config.in b/package/aamp/Config.in new file mode 100644 index 000000000000..cc8d56670c15 --- /dev/null +++ b/package/aamp/Config.in @@ -0,0 +1,11 @@ +config BR2_PACKAGE_AAMP + bool "aamp" + default n + select BR2_PACKAGE_LIBCURL + select BR2_PACKAGE_LIBDASH + select BR2_PACKAGE_LIBXML2 + select BR2_PACKAGE_CJSON + select BR2_PACKAGE_AAMPABR + select BR2_PACKAGE_GST1_AAMP + help + RDK AAMP diff --git a/package/aamp/aamp.mk b/package/aamp/aamp.mk new file mode 100644 index 000000000000..b44ad626d0a5 --- /dev/null +++ b/package/aamp/aamp.mk @@ -0,0 +1,14 @@ +################################################################################ +# +# aamp +# +################################################################################ + +AAMP_VERSION = 1bff88085d38812bf39cce37bf39809ddb8a6eb8 +AAMP_SITE_METHOD = git +AAMP_SITE = https://github.com/rdkcmf/rdk-aamp +AAMP_INSTALL_STAGING = YES + +AAMP_DEPENDENCIES = libcurl libdash libxml2 cjson aampabr gst1-aamp + +$(eval $(cmake-package)) diff --git a/package/aampabr/Config.in b/package/aampabr/Config.in new file mode 100644 index 000000000000..85d97a057863 --- /dev/null +++ b/package/aampabr/Config.in @@ -0,0 +1,5 @@ +config BR2_PACKAGE_AAMPABR + bool "aampabr" + depends on BR2_PACKAGE_AAMP + help + RDK AAMPABR diff --git a/package/aampabr/aampabr.mk b/package/aampabr/aampabr.mk new file mode 100644 index 000000000000..6fbdafc7c036 --- /dev/null +++ b/package/aampabr/aampabr.mk @@ -0,0 +1,12 @@ +################################################################################ +# +# aampabr +# +################################################################################ + +AAMPABR_VERSION = 3ddb58dea9e5212b4796b0902e5fdccfdcb2a646 +AAMPABR_SITE_METHOD = git +AAMPABR_SITE = https://code.rdkcentral.com/r/rdk/components/generic/aampabr +AAMPABR_INSTALL_STAGING = YES + +$(eval $(cmake-package)) diff --git a/package/gstreamer1/Config.in b/package/gstreamer1/Config.in index 8c905a943dcf..0abce4b8ba83 100644 --- a/package/gstreamer1/Config.in +++ b/package/gstreamer1/Config.in @@ -2,6 +2,7 @@ source "package/gstreamer1/gstreamer1/Config.in" if BR2_PACKAGE_GSTREAMER1 +source "package/gstreamer1/gst1-aamp/Config.in" source "package/gstreamer1/gst1-bcm/Config.in" source "package/gstreamer1/gst1-common/Config.in" source "package/gstreamer1/gst1-plugins-base/Config.in" diff --git a/package/gstreamer1/gst1-aamp/Config.in b/package/gstreamer1/gst1-aamp/Config.in new file mode 100644 index 000000000000..8d13fcd5f1ca --- /dev/null +++ b/package/gstreamer1/gst1-aamp/Config.in @@ -0,0 +1,6 @@ +config BR2_PACKAGE_GST1_AAMP + bool "gst-aamp" + select BR2_PACKAGE_GST1_PLUGINS_BASE + help + GStreamer plug-in to use AAMP DRM functionalities. + diff --git a/package/gstreamer1/gst1-aamp/gst1-aamp.mk b/package/gstreamer1/gst1-aamp/gst1-aamp.mk new file mode 100644 index 000000000000..b3ffdc222273 --- /dev/null +++ b/package/gstreamer1/gst1-aamp/gst1-aamp.mk @@ -0,0 +1,13 @@ +################################################################################ +# +# gst-aamp +# +################################################################################ + +GST1_AAMP_VERSION = 4365a3e100e9df6009eddc544ae7bbbbfcf03f80 +GST1_AAMP_SITE = http://code.rdkcentral.com/r/rdk/components/generic/gst-plugins-rdk-aamp +GST1_AAMP_SITE_METHOD = git + +GST1_AAMP_DEPENDENCIES = gstreamer1 gst1-plugins-base + +$(eval $(cmake-package)) diff --git a/package/libdash/0001-libdash-build.patch b/package/libdash/0001-libdash-build.patch new file mode 100644 index 000000000000..f9c016b9fa75 --- /dev/null +++ b/package/libdash/0001-libdash-build.patch @@ -0,0 +1,13 @@ +diff --git a/libdash/CMakeLists.txt b/libdash/CMakeLists.txt +index aeae94f..a78ddb5 100644 +--- a/libdash/CMakeLists.txt ++++ b/libdash/CMakeLists.txt +@@ -11,4 +11,6 @@ include_directories(include) + file(GLOB_RECURSE libdash_source *.cpp) + + add_library(dash SHARED ${libdash_source}) +-target_link_libraries(dash ${CURL_LIBRARIES} ${ZLIB_LIBRARIES} ${LIBXML2_LIBRARIES}) +\ No newline at end of file ++target_link_libraries(dash ${CURL_LIBRARIES} ${ZLIB_LIBRARIES} ${LIBXML2_LIBRARIES} -pthread) ++install(TARGETS dash DESTINATION lib) ++ diff --git a/package/libdash/0002-libdash-starttime-uint64.patch b/package/libdash/0002-libdash-starttime-uint64.patch new file mode 100644 index 000000000000..1ad3dd514aa6 --- /dev/null +++ b/package/libdash/0002-libdash-starttime-uint64.patch @@ -0,0 +1,89 @@ +diff --git a/libdash/include/ITimeline.h b/libdash/include/ITimeline.h +index e1f8e95..b2ac965 100644 +--- a/libdash/include/ITimeline.h ++++ b/libdash/include/ITimeline.h +@@ -43,7 +43,7 @@ namespace dash + * \em StartTime corresponds to the \c \@t attribute. + * @return an unsigned integer + */ +- virtual uint32_t GetStartTime () const = 0; ++ virtual uint64_t GetStartTime () const = 0; + + /** + * Returns the integer that specifies the Segment duration, in units of the value of the \c \@timescale. \n\n +@@ -63,4 +63,4 @@ namespace dash + } + } + +-#endif /* ITIMELINE_H_ */ +\ No newline at end of file ++#endif /* ITIMELINE_H_ */ +diff --git a/libdash/source/mpd/Timeline.cpp b/libdash/source/mpd/Timeline.cpp +index 624c658..155a78a 100644 +--- a/libdash/source/mpd/Timeline.cpp ++++ b/libdash/source/mpd/Timeline.cpp +@@ -23,11 +23,11 @@ Timeline::~Timeline () + { + } + +-uint32_t Timeline::GetStartTime () const ++uint64_t Timeline::GetStartTime () const + { + return this->startTime; + } +-void Timeline::SetStartTime (uint32_t startTime) ++void Timeline::SetStartTime (uint64_t startTime) + { + this->startTime = startTime; + } +@@ -46,4 +46,4 @@ uint32_t Timeline::GetRepeatCount () const + void Timeline::SetRepeatCount (uint32_t repeatCount) + { + this->repeatCount = repeatCount; +-} +\ No newline at end of file ++} +diff --git a/libdash/source/mpd/Timeline.h b/libdash/source/mpd/Timeline.h +index 3caa331..b0fb440 100644 +--- a/libdash/source/mpd/Timeline.h ++++ b/libdash/source/mpd/Timeline.h +@@ -27,16 +27,16 @@ namespace dash + Timeline (); + virtual ~Timeline (); + +- uint32_t GetStartTime () const; ++ uint64_t GetStartTime () const; + uint32_t GetDuration () const; + uint32_t GetRepeatCount () const; + +- void SetStartTime (uint32_t startTime); ++ void SetStartTime (uint64_t startTime); + void SetDuration (uint32_t duration); + void SetRepeatCount (uint32_t repeatCount); + + private: +- uint32_t startTime; ++ uint64_t startTime; + uint32_t duration; + uint32_t repeatCount; + }; +diff --git a/libdash/source/xml/Node.cpp b/libdash/source/xml/Node.cpp +index 9164332..bc9e9bd 100644 +--- a/libdash/source/xml/Node.cpp ++++ b/libdash/source/xml/Node.cpp +@@ -209,7 +209,7 @@ dash::mpd::Timeline* Node::ToTimeline () cons + + if (this->HasAttribute("t")) + { +- timeline->SetStartTime(strtoul(this->GetAttributeValue("t").c_str(), NULL, 10)); ++ timeline->SetStartTime(strtoull(this->GetAttributeValue("t").c_str(), NULL, 10)); + } + if (this->HasAttribute("d")) + { +@@ -1022,4 +1022,4 @@ void Node::SetCommonValuesForMSeg(dash::m + } + } + +-} +\ No newline at end of file ++} diff --git a/package/libdash/Config.in b/package/libdash/Config.in new file mode 100644 index 000000000000..ffd5e181d81d --- /dev/null +++ b/package/libdash/Config.in @@ -0,0 +1,8 @@ +config BR2_PACKAGE_LIBDASH + bool "libdash" + default n + select BR2_PACKAGE_LIBCURL + select BR2_PACKAGE_LIBXML2 + select BR2_PACKAGE_ZLIB + help + LIBDASH Library diff --git a/package/libdash/libdash.mk b/package/libdash/libdash.mk new file mode 100644 index 000000000000..e5069a544062 --- /dev/null +++ b/package/libdash/libdash.mk @@ -0,0 +1,38 @@ +################################################################################ +# +# libdash +# +################################################################################ + +LIBDASH_VERSION = f5b5d991af5fe5f285e8040c997b755d3d456b0d +LIBDASH_SITE_METHOD = git +LIBDASH_SITE = https://github.com/bitmovin/libdash/libdash +LIBDASH_INSTALL_STAGING = YES + +LIBDASH_DEPENDENCIES = libcurl libxml2 zlib + +define LIBDASH_EXTRACT_DASH + mv $(@D)/libdash $(@D)/temp + mv $(@D)/temp/* $(@D) + rm -rf $(@D)/temp +endef + +LIBDASH_POST_EXTRACT_HOOKS += LIBDASH_EXTRACT_DASH + +define LIBDASH_INSTALL_STAGING_CMDS + $(INSTALL) -D -m 0755 ${LIBDASH_PKGDIR}/libdash.pc $(STAGING_DIR)/usr/lib/pkgconfig/ + mkdir -p $(STAGING_DIR)/usr/include/libdash + mkdir -p $(STAGING_DIR)/usr/include/libdash/helpers + mkdir -p $(STAGING_DIR)/usr/include/libdash/mpd + mkdir -p $(STAGING_DIR)/usr/include/libdash/network + mkdir -p $(STAGING_DIR)/usr/include/libdash/portable + mkdir -p $(STAGING_DIR)/usr/include/libdash/metrics + $(INSTALL) -D -m 0755 $(@D)/libdash/include/*.h $(STAGING_DIR)/usr/include/libdash/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/helpers/*.h $(STAGING_DIR)/usr/include/libdash/helpers/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/mpd/*.h $(STAGING_DIR)/usr/include/libdash/mpd/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/network/*.h $(STAGING_DIR)/usr/include/libdash/network/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/portable/*.h $(STAGING_DIR)/usr/include/libdash/portable/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/metrics/*.h $(STAGING_DIR)/usr/include/libdash/metrics/ +endef + +$(eval $(cmake-package)) diff --git a/package/libdash/libdash.pc b/package/libdash/libdash.pc new file mode 100644 index 000000000000..8f988a1c8cd2 --- /dev/null +++ b/package/libdash/libdash.pc @@ -0,0 +1,10 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${exec_prefix}/lib +includedir=${prefix}/include/libdash + +Name: dash +Description: An object orient interface to the MPEG-DASH standard +Version: 3.0 +Libs: -L${libdir} -ldash +Cflags: -I${includedir} -I${includedir}/mpd From 050125a030b9bd0eb3c1ac188ee528ba518c9999 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 25 Oct 2018 11:13:34 +0200 Subject: [PATCH 494/614] [SDK] Align all flavors of binary deliveries from the different projects to a uniform way of working. --- package/Config.in | 3 ++- package/sff-sdk/Config.in | 21 +++++++++++++++++++++ package/sff-sdk/sff-sdk.mk | 21 +++++++++++++++++++++ 3 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 package/sff-sdk/Config.in create mode 100644 package/sff-sdk/sff-sdk.mk diff --git a/package/Config.in b/package/Config.in index 393ff97f0660..f1a3f7c58b8d 100644 --- a/package/Config.in +++ b/package/Config.in @@ -371,7 +371,7 @@ menu "Firmware" source "package/zd1211-firmware/Config.in" endmenu source "package/synaptics/Config.in" - source "package/intelce-sdk/Config.in" + source "package/intelce-sdk/Config.in" source "package/a10disp/Config.in" source "package/acpica/Config.in" source "package/acpid/Config.in" @@ -427,6 +427,7 @@ endmenu source "package/vss-sdk/Config.in" source "package/homecast-sdk/Config.in" source "package/uma-sdk/Config.in" + source "package/sff-sdk/Config.in" source "package/hwdata/Config.in" source "package/hwloc/Config.in" source "package/i2c-tools/Config.in" diff --git a/package/sff-sdk/Config.in b/package/sff-sdk/Config.in new file mode 100644 index 000000000000..154fe19d16f8 --- /dev/null +++ b/package/sff-sdk/Config.in @@ -0,0 +1,21 @@ +config BR2_PACKAGE_SFF_SDK + bool "sff-sdk" + depends on BR2_arm + select BR2_PACKAGE_HAS_NEXUS + select BR2_PACKAGE_HAS_LIBEGL + select BR2_PACKAGE_HAS_LIBGLES + help + Pre-compiled binaries for a platform + +if BR2_PACKAGE_SFF_SDK + +config BR2_PACKAGE_PROVIDES_NEXUS + default "sff-sdk" + +config BR2_PACKAGE_PROVIDES_LIBEGL + default "sff-sdk" + +config BR2_PACKAGE_PROVIDES_LIBGLES + default "sff-sdk" + +endif diff --git a/package/sff-sdk/sff-sdk.mk b/package/sff-sdk/sff-sdk.mk new file mode 100644 index 000000000000..cb67945b9287 --- /dev/null +++ b/package/sff-sdk/sff-sdk.mk @@ -0,0 +1,21 @@ +################################################################################ +# +# sff-sdk +# +################################################################################ +SFF_SDK_VERSION = master +SFF_SDK_SITE = git@github.com:Metrological/SDK_SFF.git +SFF_SDK_SITE_METHOD = git +SFF_SDK_INSTALL_STAGING = YES +SFF_SDK_INSTALL_TARGET = YES + +define SFF_SDK_INSTALL_STAGING_CMDS + cp -Rpf $(@D)/usr/include/*.h $(STAGING_DIR)/usr/include/ + $(INSTALL) -m 0755 -D $(@D)/usr/lib/* $(STAGING_DIR)/usr/lib/ +endef + +define SFF_SDK_INSTALL_TARGET_CMDS + $(INSTALL) -m 0755 -D $(@D)/usr/lib/* $(STAGING_DIR)/usr/lib/ +endef + +$(eval $(generic-package)) From eb955d0e2213fb9a9afe23fb4d52b7b50437f564 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Thu, 25 Oct 2018 12:52:09 +0200 Subject: [PATCH 495/614] [WPEFrameworkPlugins] Add Nagra DRM --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 5c7293ec352c..c527a17c2108 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -101,6 +101,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_WIDEVINE=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-widevine endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_NAGRA),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_NAGRA=ON +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpeframework-cdmi-nagra +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH),y) From d46c2c6e637a35a7127565ae3ab6f3dfc870ad04 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 25 Oct 2018 17:16:22 +0200 Subject: [PATCH 496/614] [ALIGN] Allign the latest SDK with the UMA build. --- configs/uma7439_full_wpe_nf_defconfig | 13 +++++++++++-- package/Config.in | 1 - package/sage-firmware/Config.in | 5 ----- package/sage-firmware/sage-firmware.mk | 18 ------------------ package/uma-sdk/Config.in | 3 +++ package/uma-sdk/uma-sdk.mk | 12 +++++++----- .../wpeframework-cdmi-nagra.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 8 files changed, 23 insertions(+), 33 deletions(-) delete mode 100644 package/sage-firmware/Config.in delete mode 100644 package/sage-firmware/sage-firmware.mk diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index c603bd229947..a119ee81066e 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -32,7 +32,7 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y @@ -53,16 +53,20 @@ BR2_PACKAGE_NETFLIX5_LIB=y BR2_PACKAGE_GDB=y BR2_PACKAGE_GETTEXT=y BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_WIDEVINE=y +BR2_PACKAGE_WIDEVINE_SOC_WPE=y BR2_PACKAGE_BITSTREAM_VERA=y -BR2_PACKAGE_SAGE_FIRMWARE=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y BR2_PACKAGE_BCM_REFSW_SAGE=y +BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING=y BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y BR2_PACKAGE_BCM_REFSW_PMLIB=y BR2_PACKAGE_BCM_REFSW_BOXMODE="1" +BR2_PACKAGE_UMA_SDK=y BR2_PACKAGE_ALSA_LIB=y # BR2_PACKAGE_ALSA_LIB_ALOAD is not set # BR2_PACKAGE_ALSA_LIB_RAWMIDI is not set @@ -87,6 +91,7 @@ BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_NAGRA=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y @@ -97,7 +102,11 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST="306" BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_PLUGIN_ESPIAL_BROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_LINEARBROADCASTPLAYER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y diff --git a/package/Config.in b/package/Config.in index f1a3f7c58b8d..af6224dde963 100644 --- a/package/Config.in +++ b/package/Config.in @@ -359,7 +359,6 @@ menu "Hardware handling" menu "Firmware" source "package/am33x-cm3/Config.in" source "package/b43-firmware/Config.in" - source "package/sage-firmware/Config.in" source "package/linux-firmware/Config.in" source "package/rpi-firmware/Config.in" source "package/rpi-wifi-firmware/Config.in" diff --git a/package/sage-firmware/Config.in b/package/sage-firmware/Config.in deleted file mode 100644 index c01de24a5080..000000000000 --- a/package/sage-firmware/Config.in +++ /dev/null @@ -1,5 +0,0 @@ -config BR2_PACKAGE_SAGE_FIRMWARE - bool "bcm-sage" - depends on BR2_PACKAGE_HAS_NEXUS - help - Pre-compiled Sage binaries for a platform diff --git a/package/sage-firmware/sage-firmware.mk b/package/sage-firmware/sage-firmware.mk deleted file mode 100644 index b24474422495..000000000000 --- a/package/sage-firmware/sage-firmware.mk +++ /dev/null @@ -1,18 +0,0 @@ -################################################################################ -# -# sage-firmware -# -################################################################################ -SAGE_FIRMWARE_VERSION = master -SAGE_FIRMWARE_SITE = git@github.com:Metrological/bcm-sage.git -SAGE_FIRMWARE_SITE_METHOD = git -SAGE_FIRMWARE_INSTALL_STAGING = NO -SAGE_FIRMWARE_INSTALL_TARGET = YES - -ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5),y) -define SAGE_FIRMWARE_INSTALL_TARGET_CMDS - $(INSTALL) -D -m 0644 $(@D)/uma-r5/* $(TARGET_DIR)/$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH)/ -endef -endif - -$(eval $(virtual-package)) diff --git a/package/uma-sdk/Config.in b/package/uma-sdk/Config.in index b52b03eb08dd..1a1663ad27aa 100644 --- a/package/uma-sdk/Config.in +++ b/package/uma-sdk/Config.in @@ -18,4 +18,7 @@ config BR2_PACKAGE_PROVIDES_LIBEGL config BR2_PACKAGE_PROVIDES_LIBGLES default "uma-sdk" +config BR2_PACKAGE_SDK_INSTALL + default "uma-sdk" + endif diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index 8ae8997632cd..7b98879d3bc3 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,19 +3,21 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = master -UMA_SDK_SITE = git@github.com:Metrological/OperatorDeliveries.git +UMA_SDK_VERSION = 787f93d172ae7d01dbc5201b1014c20b0133b036 +UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES UMA_SDK_INSTALL_TARGET = YES define UMA_SDK_INSTALL_STAGING_CMDS - cp -Rpf $(@D)/nos/player/usr/include/*.h $(STAGING_DIR)/usr/include/ - $(INSTALL) -m 0755 -D $(@D)/nos/player/usr/lib/libplayer.so $(STAGING_DIR)/usr/lib/ + cp -Rpf $(@D)/usr/include/* $(STAGING_DIR)/usr/include/ + ln -sf $(STAGING_DIR)/usr/include/NOSPlayer/Player.h $(STAGING_DIR)/usr/include/Player.h + cp -Rpf $(@D)/usr/lib/Player/* $(STAGING_DIR)/usr/lib/ + cp -Rpf $(@D)/usr/lib/Nagra/* $(STAGING_DIR)/usr/lib/ endef define UMA_SDK_INSTALL_TARGET_CMDS - $(INSTALL) -m 0755 -D $(@D)/nos/player/usr/lib/libplayer.so $(TARGET_DIR)/usr/lib/ + $(INSTALL) -m 0755 -D $(@D)/usr/lib/Player/* $(TARGET_DIR)/usr/lib/ endef $(eval $(generic-package)) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk index 58c149158389..67e6a9b35d2f 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_NAGRA_VERSION = 615f202efe4f2de942190c806ee4ccf6dd46784a +WPEFRAMEWORK_CDMI_NAGRA_VERSION = a1e7bde9d36757cc756ecab58e90d27a80b3da9a WPEFRAMEWORK_CDMI_NAGRA_SITE_METHOD = git WPEFRAMEWORK_CDMI_NAGRA_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Nagra.git WPEFRAMEWORK_CDMI_NAGRA_INSTALL_STAGING = NO diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index ef27b62adff5..99e07c596765 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -7,7 +7,7 @@ WPEFRAMEWORK_VERSION = 7280b09744c1b47281023fb8cd1c3d8db6280de7 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES -WPEFRAMEWORK_DEPENDENCIES = zlib +WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) WPEFRAMEWORK_CONF_OPTS += -DBUILD_REFERENCE=$(WPEFRAMEWORK_VERSION) -DTREE_REFERENCE=$(shell $(GIT) rev-parse HEAD) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PORT=$(BR2_PACKAGE_WPEFRAMEWORK_PORT) From 3883d66e3d10a9b6b77c05b097f68dc855703acf Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 25 Oct 2018 21:59:06 +0200 Subject: [PATCH 497/614] [UMA-SDK] Add missing binary. --- package/uma-sdk/uma-sdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index 7b98879d3bc3..a883832fb07b 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,7 +3,7 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = 787f93d172ae7d01dbc5201b1014c20b0133b036 +UMA_SDK_VERSION = df6a1845a43d2333b9767bbe3c13a0bb6fe927c4 UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES From e1af0ce90516532b4be59ad3b49da5ea6b87e22e Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Wed, 24 Oct 2018 23:22:51 +0530 Subject: [PATCH 498/614] Power plugin implementation moved from WPEPluginPower to WPEFrameworkPlugind/Power --- package/wpe/wpeframework-plugins/Config.in | 23 +++++++++++++++++++ .../wpeframework-plugins.mk | 12 ++++++++++ package/wpe/wpeframework-power/Config.in | 4 ---- .../wpeframework-power/wpeframework-power.mk | 20 ---------------- package/wpe/wpeframework/Config.in | 1 - 5 files changed, 35 insertions(+), 25 deletions(-) delete mode 100644 package/wpe/wpeframework-power/Config.in delete mode 100644 package/wpe/wpeframework-power/wpeframework-power.mk diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5df91dce6a9a..f6d197b7a61d 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -558,4 +558,27 @@ config BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_RTSPCLIENT help RTSP Client Plugin +config BR2_PACKAGE_WPEFRAMEWORK_POWER + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + default n + bool "Power" + help + Power Control Plugin + +if BR2_PACKAGE_WPEFRAMEWORK_POWER + +config BR2_PACKAGE_WPEFRAMEWORK_POWER_AUTOSTART + bool "autostart" + default y + +config BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN + string "gpiopin" + default "" + +config BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE + string "gpiotype" + default "" + +endif + comment "External plugins below" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index c527a17c2108..d3820403d9a7 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -232,6 +232,18 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WIFICONTROL=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_AUTOSTART),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_AUTOSTART=true +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_GPIOPIN=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN) +endif +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_GPIOTYPE=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE) +endif +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += sqlite ifeq ($(BR2_PACKAGE_RPI_FIRMWARE), y) diff --git a/package/wpe/wpeframework-power/Config.in b/package/wpe/wpeframework-power/Config.in deleted file mode 100644 index f3f969e3fb34..000000000000 --- a/package/wpe/wpeframework-power/Config.in +++ /dev/null @@ -1,4 +0,0 @@ -config BR2_PACKAGE_WPEFRAMEWORK_POWER - bool "PowerControl" - help - WPE Platform PowerControl plugin diff --git a/package/wpe/wpeframework-power/wpeframework-power.mk b/package/wpe/wpeframework-power/wpeframework-power.mk deleted file mode 100644 index c64e440daf61..000000000000 --- a/package/wpe/wpeframework-power/wpeframework-power.mk +++ /dev/null @@ -1,20 +0,0 @@ -################################################################################ -# -# wpeframework-power -# -################################################################################ - -WPEFRAMEWORK_POWER_VERSION = 020dfecfe1a3264caf0bb6274182698c65d25e2f -WPEFRAMEWORK_POWER_SITE_METHOD = git -WPEFRAMEWORK_POWER_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginPower.git -WPEFRAMEWORK_POWER_INSTALL_STAGING = YES -WPEFRAMEWORK_POWER_DEPENDENCIES = wpeframework - -WPEFRAMEWORK_POWER_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_POWER_VERSION} - -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) -WPEFRAMEWORK_POWER_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' -endif - -$(eval $(cmake-package)) - diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index f2bae375a9d4..a27a3ff0d365 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -82,7 +82,6 @@ source "package/wpe/wpeframework-linearbroadcastplayer/Config.in" source "package/wpe/wpeframework-netflix/Config.in" source "package/wpe/wpeframework-packager/Config.in" source "package/wpe/wpeframework-playgiga/Config.in" -source "package/wpe/wpeframework-power/Config.in" source "package/wpe/wpeframework-provisioning/Config.in" source "package/wpe/wpeframework-spotify/Config.in" source "package/wpe/wpeframework-switchboard/Config.in" From ac6bcc7436d58efd5f8816ce5747f5dafcef960b Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Thu, 25 Oct 2018 20:09:48 +0530 Subject: [PATCH 499/614] WPEPlayerPlugin platform selection for Aamp/Stub support and full stack fresh build error changes added --- package/aamp/Config.in | 1 - package/aamp/aamp.mk | 2 +- package/gstreamer1/gst1-aamp/Config.in | 1 + package/gstreamer1/gst1-aamp/gst1-aamp.mk | 2 +- package/libdash/libdash.mk | 3 +++ .../wpeframework-linearbroadcastplayer.mk | 4 ++++ 6 files changed, 10 insertions(+), 3 deletions(-) diff --git a/package/aamp/Config.in b/package/aamp/Config.in index cc8d56670c15..8fe4cd028b3a 100644 --- a/package/aamp/Config.in +++ b/package/aamp/Config.in @@ -6,6 +6,5 @@ config BR2_PACKAGE_AAMP select BR2_PACKAGE_LIBXML2 select BR2_PACKAGE_CJSON select BR2_PACKAGE_AAMPABR - select BR2_PACKAGE_GST1_AAMP help RDK AAMP diff --git a/package/aamp/aamp.mk b/package/aamp/aamp.mk index b44ad626d0a5..2ddbc08db5c8 100644 --- a/package/aamp/aamp.mk +++ b/package/aamp/aamp.mk @@ -9,6 +9,6 @@ AAMP_SITE_METHOD = git AAMP_SITE = https://github.com/rdkcmf/rdk-aamp AAMP_INSTALL_STAGING = YES -AAMP_DEPENDENCIES = libcurl libdash libxml2 cjson aampabr gst1-aamp +AAMP_DEPENDENCIES = libcurl libdash libxml2 cjson aampabr $(eval $(cmake-package)) diff --git a/package/gstreamer1/gst1-aamp/Config.in b/package/gstreamer1/gst1-aamp/Config.in index 8d13fcd5f1ca..543ecc6e27c8 100644 --- a/package/gstreamer1/gst1-aamp/Config.in +++ b/package/gstreamer1/gst1-aamp/Config.in @@ -1,6 +1,7 @@ config BR2_PACKAGE_GST1_AAMP bool "gst-aamp" select BR2_PACKAGE_GST1_PLUGINS_BASE + select BR2_PACKAGE_AAMP help GStreamer plug-in to use AAMP DRM functionalities. diff --git a/package/gstreamer1/gst1-aamp/gst1-aamp.mk b/package/gstreamer1/gst1-aamp/gst1-aamp.mk index b3ffdc222273..449a532192f1 100644 --- a/package/gstreamer1/gst1-aamp/gst1-aamp.mk +++ b/package/gstreamer1/gst1-aamp/gst1-aamp.mk @@ -8,6 +8,6 @@ GST1_AAMP_VERSION = 4365a3e100e9df6009eddc544ae7bbbbfcf03f80 GST1_AAMP_SITE = http://code.rdkcentral.com/r/rdk/components/generic/gst-plugins-rdk-aamp GST1_AAMP_SITE_METHOD = git -GST1_AAMP_DEPENDENCIES = gstreamer1 gst1-plugins-base +GST1_AAMP_DEPENDENCIES = gstreamer1 gst1-plugins-base aamp $(eval $(cmake-package)) diff --git a/package/libdash/libdash.mk b/package/libdash/libdash.mk index e5069a544062..b485e9ff3d74 100644 --- a/package/libdash/libdash.mk +++ b/package/libdash/libdash.mk @@ -27,12 +27,15 @@ define LIBDASH_INSTALL_STAGING_CMDS mkdir -p $(STAGING_DIR)/usr/include/libdash/network mkdir -p $(STAGING_DIR)/usr/include/libdash/portable mkdir -p $(STAGING_DIR)/usr/include/libdash/metrics + mkdir -p $(STAGING_DIR)/usr/include/libdash/xml $(INSTALL) -D -m 0755 $(@D)/libdash/include/*.h $(STAGING_DIR)/usr/include/libdash/ $(INSTALL) -D -m 0755 $(@D)/libdash/source/helpers/*.h $(STAGING_DIR)/usr/include/libdash/helpers/ $(INSTALL) -D -m 0755 $(@D)/libdash/source/mpd/*.h $(STAGING_DIR)/usr/include/libdash/mpd/ $(INSTALL) -D -m 0755 $(@D)/libdash/source/network/*.h $(STAGING_DIR)/usr/include/libdash/network/ $(INSTALL) -D -m 0755 $(@D)/libdash/source/portable/*.h $(STAGING_DIR)/usr/include/libdash/portable/ $(INSTALL) -D -m 0755 $(@D)/libdash/source/metrics/*.h $(STAGING_DIR)/usr/include/libdash/metrics/ + $(INSTALL) -D -m 0755 $(@D)/libdash/source/xml/*.h $(STAGING_DIR)/usr/include/libdash/xml/ + $(INSTALL) -D -m 0755 $(@D)/bin/libdash.so $(STAGING_DIR)/usr/lib/ endef $(eval $(cmake-package)) diff --git a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk index 6e01003027eb..5cda56d34cab 100644 --- a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk +++ b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk @@ -18,6 +18,10 @@ endif ifeq ($(BR2_PACKAGE_UMA_SDK),y) WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=NOS +else ifeq ($(BR2_PACKAGE_AAMP),y) +WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=Aamp +else +WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=Stub endif $(eval $(cmake-package)) From 2ba1792c6e0046e4160aadd7e15cf8219f7bfadb Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 26 Oct 2018 15:11:02 +0200 Subject: [PATCH 500/614] [vss] Update vss defconfig --- configs/vss_wpe_ml_defconfig | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/configs/vss_wpe_ml_defconfig b/configs/vss_wpe_ml_defconfig index c80b52d51f11..ba6219f2cdeb 100644 --- a/configs/vss_wpe_ml_defconfig +++ b/configs/vss_wpe_ml_defconfig @@ -25,10 +25,11 @@ BR2_PACKAGE_GST1_BCM=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OGG=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y @@ -47,7 +48,6 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_MEMSTAT=y BR2_PACKAGE_STRACE=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_VGDRM=y BR2_PACKAGE_BITSTREAM_VERA=y # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set BR2_PACKAGE_VSS_SDK=y @@ -56,19 +56,19 @@ BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_PORT="82" -BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/flash/persistent" -BR2_PACKAGE_WPEFRAMEWORK_DATA_PATH="/home/metrological/usr/share/WPEFramework" -BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PATH="/home/metrological/usr/lib/wpeframework/plugins" -BR2_PACKAGE_WPEFRAMEWORK_PROXYSTUB_PATH="/home/metrological/usr/lib/wpeframework/proxystubs" +BR2_PACKAGE_WPEFRAMEWORK_PORT="55555" +BR2_PACKAGE_WPEFRAMEWORK_PERSISTENT_PATH="/mnt/appspace" BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y +BR2_PACKAGE_WPEFRAMEWORK_TEST_RPCLINK=y BR2_PACKAGE_WPEFRAMEWORK_EGLTEST=y BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y BR2_PACKAGE_C_ARES=y From f0b6544ec486f951571a9535bb8b945621f68382 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 26 Oct 2018 15:13:27 +0200 Subject: [PATCH 501/614] [board] Update vss script --- board/bcm/vss.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/bcm/vss.txt b/board/bcm/vss.txt index 308be3e554a2..b6f61bafd0e5 100644 --- a/board/bcm/vss.txt +++ b/board/bcm/vss.txt @@ -1,7 +1,8 @@ WPE* libWPE*.so +libwpe-*.so libwpegst*.so -libbrcm*.so -wpegst-* libepoxy.so libocdm.so +libbrcm*.so +libogg*.so From c3b950089a75dcb76428ae3ee05a6076e2ade5a8 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 26 Oct 2018 15:15:46 +0200 Subject: [PATCH 502/614] [vss] Move to binary repo for VSS --- package/Config.in | 1 - package/vgdrm/Config.in | 4 ---- package/vgdrm/vgdrm.mk | 26 -------------------------- package/vss-sdk/vss-sdk.mk | 14 ++++++++++---- 4 files changed, 10 insertions(+), 35 deletions(-) delete mode 100644 package/vgdrm/Config.in delete mode 100644 package/vgdrm/vgdrm.mk diff --git a/package/Config.in b/package/Config.in index af6224dde963..ea6bc8311f4f 100644 --- a/package/Config.in +++ b/package/Config.in @@ -169,7 +169,6 @@ endmenu menu "Digital rights management" source "package/playready/Config.in" source "package/widevine/Config.in" - source "package/vgdrm/Config.in" endmenu menu "Filesystem and flash utilities" diff --git a/package/vgdrm/Config.in b/package/vgdrm/Config.in deleted file mode 100644 index ec7d511a7037..000000000000 --- a/package/vgdrm/Config.in +++ /dev/null @@ -1,4 +0,0 @@ -config BR2_PACKAGE_VGDRM - bool "vgdrm" - help - Cisco VG DRM diff --git a/package/vgdrm/vgdrm.mk b/package/vgdrm/vgdrm.mk deleted file mode 100644 index 1b0b65d17abc..000000000000 --- a/package/vgdrm/vgdrm.mk +++ /dev/null @@ -1,26 +0,0 @@ -################################################################################ -# -# vgdrm -# -################################################################################ -VGDRM_VERSION = 248e0d83b3c96adc6b2a530d96c2b9cc73035de1 -VGDRM_SITE = git@github.com:Metrological/vgdrm.git -VGDRM_SITE_METHOD = git -VGDRM_LICENSE = PROPRIETARY -VGDRM_INSTALL_STAGING = YES -VGDRM_INSTALL_TARGET = YES - -define VGDRM_BUILD_CMDS -endef - -define VGDRM_INSTALL_STAGING_CMDS - cp -av ${@D}/usr ${STAGING_DIR} - cp -av ${@D}/etc ${STAGING_DIR} -endef - -define VGDRM_INSTALL_TARGET_CMDS - cp -av ${@D}/usr/lib/lib*.so* ${STAGING_DIR}/usr/lib - cp -av ${@D}/etc ${TARGET_DIR} -endef - -$(eval $(generic-package)) diff --git a/package/vss-sdk/vss-sdk.mk b/package/vss-sdk/vss-sdk.mk index e9007fbbaa39..3a93b5f61e28 100644 --- a/package/vss-sdk/vss-sdk.mk +++ b/package/vss-sdk/vss-sdk.mk @@ -4,7 +4,12 @@ # ################################################################################ -#$(eval $(virtual-package)) +VSS_SDK_VERSION = c1484feb9cedf7ffcd4aeb89b69a20e24596d8d1 +VSS_SDK_SITE = git@github.com:Metrological/SDK_VSS.git +VSS_SDK_SITE_METHOD = git +VSS_SDK_LICENSE = PROPRIETARY +VSS_SDK_INSTALL_STAGING = YES +VSS_SDK_INSTALL_TARGET = YES BUILDROOT_FLAGS = .stamp_downloaded \ .stamp_extracted \ @@ -106,12 +111,13 @@ define VSS_SDK_BUILD_CMDS endef define VSS_SDK_INSTALL_STAGING_CMDS -endef - -define VSS_SDK_INSTALL_STAGING_CMDS + cp -av ${@D}/usr ${STAGING_DIR} + cp -av ${@D}/etc ${STAGING_DIR} endef define VSS_SDK_INSTALL_TARGET_CMDS + cp -av ${@D}/usr/lib/lib*.so* ${STAGING_DIR}/usr/lib + cp -av ${@D}/etc ${TARGET_DIR} endef $(eval $(generic-package)) From 09b45f7549427dc29fc35519b3f4ce2b42c4cc5d Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 26 Oct 2018 15:19:04 +0200 Subject: [PATCH 503/614] [vgdrm] Switch to vss-sdk and bump verion --- .../wpeframework-cdmi-playready-vgdrm/Config.in | 2 +- .../wpeframework-cdmi-playready-vgrdm.mk | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in index ad79174e013a..b655840dca51 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in @@ -2,7 +2,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM bool "vgdrm" select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_WPEFRAMEWORK_CDM - depends on BR2_PACKAGE_VGDRM + depends on BR2_PACKAGE_VSS_SDK default y help PlayReady using Video Guard DRM diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk index d8d5a788678d..50c6a9535c3e 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/wpeframework-cdmi-playready-vgrdm.mk @@ -1,13 +1,13 @@ ################################################################################ # -# wpeframework-cdmi-playready-vgdrm +# wpeframework-cdmi-playready-vgdrm # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = 8d5467184f544c3b7f6a6226df58e96fb4be06bd +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_VERSION = 9d8ecdc48a35774f97d778411e8c0441003846c5 WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-VGDRM.git WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_INSTALL_STAGING = YES -WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_DEPENDENCIES = wpeframework vgdrm +WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM_DEPENDENCIES = wpeframework vss-sdk $(eval $(cmake-package)) From 8d8fbb1195da2fabf715174c39e0922f6fc31efd Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Fri, 26 Oct 2018 15:20:59 +0200 Subject: [PATCH 504/614] [gst1-bcm] Move to v17.1-12 for VSS --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index b3d4899e9b12..ab5f079e9d86 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -21,7 +21,7 @@ GST1_BCM_VERSION = 17.1-5 else ifneq ($(filter y,$(BR2_PACKAGE_HOMECAST_SDK)),) GST1_BCM_VERSION = 961a36dcd30c91330b8a9503e12ec3ddb30b70b6 else ifneq ($(filter y,$(BR2_PACKAGE_VSS_SDK)),) -GST1_BCM_VERSION = dd00f0762b7dfed4e4e657482d085e554201fa48 +GST1_BCM_VERSION = 17.1-12 else GST1_BCM_VERSION = 15.2 endif From 9d0e2261044e1b0c96b6421e438772465d66e985 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 26 Oct 2018 22:39:40 +0200 Subject: [PATCH 505/614] [UMA-SDK] Update to the latest SDK of UMA. --- package/uma-sdk/uma-sdk.mk | 41 +++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index a883832fb07b..df04c763aa03 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,7 +3,7 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = df6a1845a43d2333b9767bbe3c13a0bb6fe927c4 +UMA_SDK_VERSION = 2a6e3ce11ddada3919e40a353a8ad7e6db698395 UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES @@ -14,10 +14,49 @@ define UMA_SDK_INSTALL_STAGING_CMDS ln -sf $(STAGING_DIR)/usr/include/NOSPlayer/Player.h $(STAGING_DIR)/usr/include/Player.h cp -Rpf $(@D)/usr/lib/Player/* $(STAGING_DIR)/usr/lib/ cp -Rpf $(@D)/usr/lib/Nagra/* $(STAGING_DIR)/usr/lib/ + cp -f $(@D)/qorvo/rf4ce.pc $(STAGING_DIR)/usr/lib/pkgconfig + cp -f $(@D)/usr/lib/libGreenPeak.a $(STAGING_DIR)/usr/lib + cp -f $(@D)/qorvo/code/Work/libBinShippedRefTarget_ZRC_MSO_GP501_BCM_RDK.a $(STAGING_DIR)/usr/lib + cp -r $(@D)/qorvo/code/Applications $(STAGING_DIR)/usr/include/qorvo + cp -r $(@D)/qorvo/code/BaseComps $(STAGING_DIR)/usr/include/qorvo endef define UMA_SDK_INSTALL_TARGET_CMDS $(INSTALL) -m 0755 -D $(@D)/usr/lib/Player/* $(TARGET_DIR)/usr/lib/ + $(INSTALL) -m 0755 -D $(@D)/qorvo/gpK5.ko ${TARGET_DIR}/lib/modules +endef + +define QORVO_BUILD_MODULE + CFLAGS = \ + -DGP501 \ + -DGP_USE_NEXUS_SPI \ + -nodefaultlibs \ + -Wno-unused-variable \ + -Wno-incompatible-pointer-types \ + -I$(STAGING_DIR)/usr/include \ + -I$(STAGING_DIR)/usr/include/linux \ + -I$(STAGING_DIR)/usr/include/refsw/ \ + -I$(STAGING_DIR)/usr/include/refsw/linuxkernel/include/ \ + -I${@D}/Driver/BCM97358Ref \ + $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) GP_CHIP=$(GREENPEAK_CHIP) EXTRA_CFLAGS="$(GREENPEAK_EXTRA_MOD_CFLAGS)" M=$(@D)/Driver modules +endef + +define QORVO_INSTALL_MODULE + $(MAKE) -C $(LINUX_DIR) $(LINUX_MAKE_FLAGS) M=$(@D)/Driver modules_install +endef + +define UMA_SDK_BUILD_CMDS + cd $(@D)/qorvo ; \ + SDKTARGETSYSROOT=${STAGING_DIR} \ + TOOLCHAIN=${HOST_DIR}/usr \ + TOOLCHAINBIN=${HOST_DIR}/usr/bin \ + CROSS_COMPILE="$(GNU_TARGET_NAME)-" \ + COMPILER=buildroot \ + INC=-I${STAGING_DIR}/usr/include \ + APPLIB=$(@D)/usr/lib/libGreenPeak.a \ + GP_VALIDATION_DISABLE=y \ + make applib ; \ + cd - endef $(eval $(generic-package)) From bea33153e07ffd10847602bf3a33863a62c770c5 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Sat, 27 Oct 2018 11:21:35 +0200 Subject: [PATCH 506/614] [UMA] Update UMA_SDK script to copy Qorvo correctly Add a new plugin, called the IOConnector for IO Actions. --- package/uma-sdk/uma-sdk.mk | 5 +++-- package/wpe/wpeframework-plugins/Config.in | 7 +++++++ package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index df04c763aa03..753dc1a7d5e1 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -17,8 +17,9 @@ define UMA_SDK_INSTALL_STAGING_CMDS cp -f $(@D)/qorvo/rf4ce.pc $(STAGING_DIR)/usr/lib/pkgconfig cp -f $(@D)/usr/lib/libGreenPeak.a $(STAGING_DIR)/usr/lib cp -f $(@D)/qorvo/code/Work/libBinShippedRefTarget_ZRC_MSO_GP501_BCM_RDK.a $(STAGING_DIR)/usr/lib - cp -r $(@D)/qorvo/code/Applications $(STAGING_DIR)/usr/include/qorvo - cp -r $(@D)/qorvo/code/BaseComps $(STAGING_DIR)/usr/include/qorvo + mkdir $(STAGING_DIR)/usr/include/qorvo + cp -Rpf $(@D)/qorvo/code/Applications $(STAGING_DIR)/usr/include/qorvo + cp -Rpf $(@D)/qorvo/code/BaseComps $(STAGING_DIR)/usr/include/qorvo endef define UMA_SDK_INSTALL_TARGET_CMDS diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5df91dce6a9a..cc3ff6ae3aec 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -148,6 +148,13 @@ config BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY help Dictionary Plugin. +config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "IOConnector" + default n + help + Take custom action on hardware pins that changes state. + menuconfig BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "LocationSync" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index c527a17c2108..2c5a8210c9c2 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -33,6 +33,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DICTIONARY=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_EGLTEST),y) WPEFRAMEWORK_COMMON_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_EGLTEST=ON endif From 0402a785cce3b01d378c4af82dbfb2c7fcf2a712 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Sun, 28 Oct 2018 12:00:51 +0100 Subject: [PATCH 507/614] [UMA] Copy Sage firmware to the given location. Turn off provisionProxy to avoid Provisioning subsystem to becoe active. --- configs/uma7439_full_wpe_nf_defconfig | 7 +++++-- package/uma-sdk/Config.in | 1 + package/uma-sdk/uma-sdk.mk | 7 +++++-- package/wpe/wpeframework/wpeframework.mk | 5 +++++ 4 files changed, 16 insertions(+), 4 deletions(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index a119ee81066e..92d63eb61292 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -61,6 +61,7 @@ BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_UMAR5=y BR2_PACKAGE_BCM_REFSW_SAGE=y +BR2_PACKAGE_BCM_REFSW_SAGE_PATH="/lib/firmware" BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING=y BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y @@ -77,7 +78,6 @@ BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PORT="" BR2_PACKAGE_WPEFRAMEWORK_SYSTEM_PREFIX="NOS" BR2_PACKAGE_WPEFRAMEWORK_TEST_LOADER=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y @@ -87,6 +87,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT="2" +BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y @@ -105,11 +106,13 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST="306" BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_PLUGIN_ESPIAL_BROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_ESPIAL=y +BR2_PACKAGE_WPEFRAMEWORK_ESPIAL_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_LINEARBROADCASTPLAYER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y +BR2_PACKAGE_LIBPROVISION=y BR2_PACKAGE_ORC=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_DROPBEAR=y diff --git a/package/uma-sdk/Config.in b/package/uma-sdk/Config.in index 1a1663ad27aa..69af2b1655c8 100644 --- a/package/uma-sdk/Config.in +++ b/package/uma-sdk/Config.in @@ -19,6 +19,7 @@ config BR2_PACKAGE_PROVIDES_LIBGLES default "uma-sdk" config BR2_PACKAGE_SDK_INSTALL + bool default "uma-sdk" endif diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index 753dc1a7d5e1..ebcee56bb89b 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -17,14 +17,17 @@ define UMA_SDK_INSTALL_STAGING_CMDS cp -f $(@D)/qorvo/rf4ce.pc $(STAGING_DIR)/usr/lib/pkgconfig cp -f $(@D)/usr/lib/libGreenPeak.a $(STAGING_DIR)/usr/lib cp -f $(@D)/qorvo/code/Work/libBinShippedRefTarget_ZRC_MSO_GP501_BCM_RDK.a $(STAGING_DIR)/usr/lib - mkdir $(STAGING_DIR)/usr/include/qorvo + mkdir -p $(STAGING_DIR)/usr/include/qorvo cp -Rpf $(@D)/qorvo/code/Applications $(STAGING_DIR)/usr/include/qorvo cp -Rpf $(@D)/qorvo/code/BaseComps $(STAGING_DIR)/usr/include/qorvo endef define UMA_SDK_INSTALL_TARGET_CMDS + mkdir -p $(TARGET_DIR)$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH) + mkdir -p $(TARGET_DIR)/lib/modules/misc $(INSTALL) -m 0755 -D $(@D)/usr/lib/Player/* $(TARGET_DIR)/usr/lib/ - $(INSTALL) -m 0755 -D $(@D)/qorvo/gpK5.ko ${TARGET_DIR}/lib/modules + $(INSTALL) -m 0755 -D $(@D)/qorvo/gpK5.ko ${TARGET_DIR}/lib/modules/misc + $(INSTALL) -D -m 0644 $(@D)/firmware/sage/* $(TARGET_DIR)/$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH)/ endef define QORVO_BUILD_MODULE diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 99e07c596765..c8f7edefeb90 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -88,6 +88,11 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) WPEFRAMEWORK_EXTERN_EVENTS += WebSource +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSERVER=ON +endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_ESPIAL),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_ESPIAL=ON endif WPEFRAMEWORK_CONF_OPTS += -DEXTERN_EVENTS="${WPEFRAMEWORK_EXTERN_EVENTS}" From 6d02ef6b42cc1ac4c0a1633ca49280b81af6a594 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Mon, 29 Oct 2018 18:08:09 +0100 Subject: [PATCH 508/614] [greenpeak] fix conitional check --- package/greenpeak/greenpeak.mk | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index 0eebbac8f6f0..1bdaef69d2f7 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -42,9 +42,8 @@ GREENPEAK_EXTRA_MOD_CFLAGS = \ -Wno-unused-variable \ -Wno-incompatible-pointer-types -ifneq (,$(findstring $(GREENPEAK_CHIP), ZD4500ZNO)) +ifneq (,$(findstring $(GREENPEAK_CHIP_REPO), zd4500zno)) GREENPEAK_EXTRA_MOD_CFLAGS += \ - -I$(STAGING_DIR)/usr/include/refsw/ \ -I$(STAGING_DIR)/usr/include/refsw/linuxkernel/include/ \ -DGP_USE_NEXUS_SPI \ -I${@D}/Driver/BCM97358Ref \ From e12217481f8992928b4a1c71acc02e136026d078 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Mon, 29 Oct 2018 18:12:22 +0100 Subject: [PATCH 509/614] [wpeframework-cdmi-playready-vgdrm] Disable default selection. --- .../wpeframework-cdmi-playready-vgdrm/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in index b655840dca51..a243ecebfcdb 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in @@ -3,7 +3,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_VGDRM select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_WPEFRAMEWORK_CDM depends on BR2_PACKAGE_VSS_SDK - default y + default n help PlayReady using Video Guard DRM From fd171821b04707feab9bc9ff14373bf1f02dd587 Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Mon, 29 Oct 2018 19:22:16 +0100 Subject: [PATCH 510/614] [greenpeak] Bump version --- package/greenpeak/greenpeak.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index 1bdaef69d2f7..cfb7ec812c1f 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -26,6 +26,7 @@ else ifneq (,$(findstring $(GREENPEAK_CHIP), GP502 GP712)) else ifneq (,$(findstring $(GREENPEAK_CHIP), ZD4500ZNO)) GREENPEAK_CHIP_REPO = zd4500zno GREENPEAK_CHIP = GP501 + GREENPEAK_REPO_VERSION = 1.1 else $(error "Chip ${GREENPEAK_CHIP} is not supported.") endif From ee54aad083377de36bf099e230a539e29bf14921 Mon Sep 17 00:00:00 2001 From: anjalirajan Date: Wed, 16 May 2018 12:36:01 +0000 Subject: [PATCH 511/614] [wpeframework-dialserver] Configure switchboard plugin for WebkitBrowser,YouTube & Netflix --- package/wpe/wpeframework-dialserver/Config.in | 1 + package/wpe/wpeframework-switchboard/Config.in | 1 + .../wpeframework-switchboard.mk | 10 ++++++++++ 3 files changed, 12 insertions(+) diff --git a/package/wpe/wpeframework-dialserver/Config.in b/package/wpe/wpeframework-dialserver/Config.in index 78b79deee6c7..809bbd3d67c3 100644 --- a/package/wpe/wpeframework-dialserver/Config.in +++ b/package/wpe/wpeframework-dialserver/Config.in @@ -1,5 +1,6 @@ config BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER bool "DIALServer" + default y help WPE Platform DIALServer plugin diff --git a/package/wpe/wpeframework-switchboard/Config.in b/package/wpe/wpeframework-switchboard/Config.in index 7b2265ae42f1..7974ed5d37e9 100644 --- a/package/wpe/wpeframework-switchboard/Config.in +++ b/package/wpe/wpeframework-switchboard/Config.in @@ -1,4 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD bool "SwitchBoard" + default y help WPE Platform Switch Board plugin diff --git a/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk b/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk index 1a51bca9717f..76e8274551e6 100644 --- a/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk +++ b/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk @@ -6,5 +6,15 @@ WPEFRAMEWORK_SWITCHBOARD_DEPENDENCIES = wpeframework WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_SWITCHBOARD_VERSION} +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETFLIX),y) +WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX=ON +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER),y) +WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER=ON +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) +WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON +endif + $(eval $(cmake-package)) From 027dfe35544cf6bd770900720658fc41b979e1eb Mon Sep 17 00:00:00 2001 From: anjalirajan Date: Tue, 22 May 2018 11:42:37 +0000 Subject: [PATCH 512/614] [wpeframework-dialserver] Conigures Netflix as Library and enable it in configuration --- package/netflix/Config.in | 3 ++- package/wpe/wpeframework-dialserver/Config.in | 1 - 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/netflix/Config.in b/package/netflix/Config.in index f893e93de1f1..a3ed77e49547 100644 --- a/package/netflix/Config.in +++ b/package/netflix/Config.in @@ -1,5 +1,6 @@ config BR2_PACKAGE_NETFLIX bool "netflix" + default y select BR2_PACKAGE_LIBMNG select BR2_PACKAGE_LIBPNG select BR2_PACKAGE_ICU @@ -21,7 +22,7 @@ menu "Extra options" choice bool "Application type" - default BR2_PACKAGE_NETFLIX_APP + default BR2_PACKAGE_NETFLIX_LIB help Choose application type. diff --git a/package/wpe/wpeframework-dialserver/Config.in b/package/wpe/wpeframework-dialserver/Config.in index 809bbd3d67c3..b2db0813a5f0 100644 --- a/package/wpe/wpeframework-dialserver/Config.in +++ b/package/wpe/wpeframework-dialserver/Config.in @@ -1,6 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER bool "DIALServer" default y - help WPE Platform DIALServer plugin From 93b7bc06973421a5ae21cc42480320e281f97ddd Mon Sep 17 00:00:00 2001 From: albertd Date: Tue, 30 Oct 2018 10:47:57 +0000 Subject: [PATCH 513/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 8b374011549c..02d9ea1f361d 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 037206e53711588a0ba9b1f71e0fb36c78e56b5d +WPEWEBKIT_VERSION_VALUE = 1713eef15ab85c4476701f1a6e24e73afa2f323c endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 0a448afd45168c3785aa7474cef02a34f6da9f84 Mon Sep 17 00:00:00 2001 From: anjalirajan Date: Wed, 31 Oct 2018 09:46:25 +0000 Subject: [PATCH 514/614] [wpeframework-dialserver] changed the default selection --- package/wpe/wpeframework-dialserver/Config.in | 2 +- package/wpe/wpeframework-switchboard/Config.in | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-dialserver/Config.in b/package/wpe/wpeframework-dialserver/Config.in index b2db0813a5f0..2a54d6a3606e 100644 --- a/package/wpe/wpeframework-dialserver/Config.in +++ b/package/wpe/wpeframework-dialserver/Config.in @@ -1,5 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER bool "DIALServer" - default y + default n help WPE Platform DIALServer plugin diff --git a/package/wpe/wpeframework-switchboard/Config.in b/package/wpe/wpeframework-switchboard/Config.in index 7974ed5d37e9..7a8e0b41c73d 100644 --- a/package/wpe/wpeframework-switchboard/Config.in +++ b/package/wpe/wpeframework-switchboard/Config.in @@ -1,5 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD bool "SwitchBoard" - default y + default n help WPE Platform Switch Board plugin From d096440590c50b943f5af0c1850496bffa7f8967 Mon Sep 17 00:00:00 2001 From: "w.meek" Date: Wed, 31 Oct 2018 02:57:54 -0700 Subject: [PATCH 515/614] Revert "Merge pull request #67 from WebPlatformForEmbedded/dialserver" This reverts commit d95ad99b180d70f74c9c3d2c7a53aa25d505e9e2, reversing changes made to 93b7bc06973421a5ae21cc42480320e281f97ddd. --- package/netflix/Config.in | 3 +-- package/wpe/wpeframework-dialserver/Config.in | 2 +- package/wpe/wpeframework-switchboard/Config.in | 1 - .../wpeframework-switchboard.mk | 10 ---------- 4 files changed, 2 insertions(+), 14 deletions(-) diff --git a/package/netflix/Config.in b/package/netflix/Config.in index a3ed77e49547..f893e93de1f1 100644 --- a/package/netflix/Config.in +++ b/package/netflix/Config.in @@ -1,6 +1,5 @@ config BR2_PACKAGE_NETFLIX bool "netflix" - default y select BR2_PACKAGE_LIBMNG select BR2_PACKAGE_LIBPNG select BR2_PACKAGE_ICU @@ -22,7 +21,7 @@ menu "Extra options" choice bool "Application type" - default BR2_PACKAGE_NETFLIX_LIB + default BR2_PACKAGE_NETFLIX_APP help Choose application type. diff --git a/package/wpe/wpeframework-dialserver/Config.in b/package/wpe/wpeframework-dialserver/Config.in index 2a54d6a3606e..78b79deee6c7 100644 --- a/package/wpe/wpeframework-dialserver/Config.in +++ b/package/wpe/wpeframework-dialserver/Config.in @@ -1,5 +1,5 @@ config BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER bool "DIALServer" - default n + help WPE Platform DIALServer plugin diff --git a/package/wpe/wpeframework-switchboard/Config.in b/package/wpe/wpeframework-switchboard/Config.in index 7a8e0b41c73d..7b2265ae42f1 100644 --- a/package/wpe/wpeframework-switchboard/Config.in +++ b/package/wpe/wpeframework-switchboard/Config.in @@ -1,5 +1,4 @@ config BR2_PACKAGE_WPEFRAMEWORK_SWITCHBOARD bool "SwitchBoard" - default n help WPE Platform Switch Board plugin diff --git a/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk b/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk index 76e8274551e6..1a51bca9717f 100644 --- a/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk +++ b/package/wpe/wpeframework-switchboard/wpeframework-switchboard.mk @@ -6,15 +6,5 @@ WPEFRAMEWORK_SWITCHBOARD_DEPENDENCIES = wpeframework WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_SWITCHBOARD_VERSION} -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETFLIX),y) -WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX=ON -endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER),y) -WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER=ON -endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) -WPEFRAMEWORK_SWITCHBOARD_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON -endif - $(eval $(cmake-package)) From c08742250dbcfb3185443144ba77cb55707c5658 Mon Sep 17 00:00:00 2001 From: Rahul Raveendran Date: Wed, 31 Oct 2018 10:00:59 +0000 Subject: [PATCH 516/614] [DSResolution] Reset default selection --- package/wpe/wpeframework-plugins/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5d9b59dbc942..a11ccd6b6092 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -67,7 +67,7 @@ config BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO config BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "DSResolution" - default y + default n help DSResolution Plugin From cf0c6bca96f9e3dfde8bec8657769e595976e345 Mon Sep 17 00:00:00 2001 From: aswaunni Date: Thu, 1 Nov 2018 13:12:32 +0000 Subject: [PATCH 517/614] [wpeframework-plugins] Added FrontPanel Plugin. --- package/wpe/wpeframework-plugins/Config.in | 7 +++++++ package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index d9e2b79cd05c..62208734b868 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -155,6 +155,13 @@ config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR help Take custom action on hardware pins that changes state. +config BR2_PACKAGE_WPEFRAMEWORK_FRONTPANEL + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "FrontPanel" + default n + help + FrontPanel Plugin. + menuconfig BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "LocationSync" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 628fe8133099..5bc2e411b3d6 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -41,6 +41,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_EGLTEST),y) WPEFRAMEWORK_COMMON_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_EGLTEST=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_FRONTPANEL),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_FRONTPANEL=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_LOCATIONSYNC=ON WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_LOCATIONSYNC_URI=${BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI} From 5e8d7c7a6132ca2fe04f94ae9ee457f49a7e5bbf Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Mon, 5 Nov 2018 16:00:16 +0100 Subject: [PATCH 518/614] [Evasion] Initial commit --- board/evasion/linux.config | 177 ++++++++++++++++++++++++++++++ configs/evasion7241_wpe_defconfig | 95 ++++++++++++++++ package/bcm-refsw/Config.in | 4 + package/bcm-refsw/platforms.inc | 3 + 4 files changed, 279 insertions(+) create mode 100644 board/evasion/linux.config create mode 100644 configs/evasion7241_wpe_defconfig diff --git a/board/evasion/linux.config b/board/evasion/linux.config new file mode 100644 index 000000000000..6d62d49a5717 --- /dev/null +++ b/board/evasion/linux.config @@ -0,0 +1,177 @@ +CONFIG_BRCMSTB=y +CONFIG_BCM7429B0=y +# CONFIG_MTD_BRCMNAND is not set +# CONFIG_BRCM_SDIO is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SMP=y +CONFIG_NR_CPUS=2 +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_HZ_1000=y +# CONFIG_SECCOMP is not set +CONFIG_CC_STACKPROTECTOR=y +CONFIG_EXPERIMENTAL=y +CONFIG_CROSS_COMPILE="mipsel-linux-" +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_SCHED=y +CONFIG_NAMESPACES=y +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_RELAY=y +CONFIG_EMBEDDED=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_IPV6_SIT is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NF_CONNTRACK_IPV4=y +# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_RPFILTER=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_RPFILTER=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_MULTIQ=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_ATA=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_MIRROR=y +CONFIG_DM_MULTIPATH=y +CONFIG_NETDEVICES=y +CONFIG_MACVLAN=y +CONFIG_VETH=y +CONFIG_USB_PEGASUS=y +CONFIG_USB_USBNET=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO is not set +# CONFIG_CONSOLE_TRANSLATIONS is not set +# CONFIG_VT_CONSOLE is not set +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_HW_RANDOM=y +CONFIG_SPI=y +# CONFIG_HWMON is not set +# CONFIG_VGA_CONSOLE is not set +CONFIG_USB=y +CONFIG_USB_DEVICEFS=y +CONFIG_USB_MON=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SPI=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_XATTR is not set +CONFIG_JBD2_DEBUG=y +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_UDF_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_DEBUG_FS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="rootdelay=10 console=ttyS0,115200" +CONFIG_KEYS=y +CONFIG_ENCRYPTED_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/configs/evasion7241_wpe_defconfig b/configs/evasion7241_wpe_defconfig new file mode 100644 index 000000000000..8561e4fc640a --- /dev/null +++ b/configs/evasion7241_wpe_defconfig @@ -0,0 +1,95 @@ +BR2_mipsel=y +# BR2_MIPS_SOFT_FLOAT is not set +BR2_CCACHE=y +BR2_OPTIMIZE_2=y +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_3=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_PACKAGE_HOST_GDB=y +BR2_TARGET_GENERIC_HOSTNAME="Evasion" +BR2_TARGET_GENERIC_ISSUE="Login to access console" +BR2_TARGET_GENERIC_CABUNDLE=y +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y +BR2_TARGET_GENERIC_ROOT_PASSWD="root" +BR2_TARGET_GENERIC_GETTY_TERM="" +BR2_SYSTEM_DHCP="eth0" +BR2_TARGET_TZ_INFO=y +BR2_TARGET_LOCALTIME="Europe/Amsterdam" +BR2_ROOTFS_POST_BUILD_SCRIPT="board/dawn/post-build.sh" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-3.3.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="87ab7fe07ed16414dbac7147846790c879810aca" +BR2_LINUX_KERNEL_PATCH="board/evasion/patches" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/evasion/linux.config" +BR2_LINUX_KERNEL_VMLINUX=y +BR2_PACKAGE_BUSYBOX_SMP=y +BR2_PACKAGE_GSTREAMER1=y +BR2_PACKAGE_GST1_BCM=y +# BR2_PACKAGE_GST1_BCM_VP9_SUPPORT is not set +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y +BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y +BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_MPEGTSDEMUX=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_VIDEOPARSERS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_DASH=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FAAD=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_HLS=y +BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y +BR2_PACKAGE_GST1_PLUGINS_UGLY=y +BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y +BR2_PACKAGE_NETFLIX=y +BR2_PACKAGE_NETFLIX_LIB=y +BR2_PACKAGE_GDB=y +BR2_PACKAGE_NINJA=y +BR2_PACKAGE_PLAYREADY=y +BR2_PACKAGE_BITSTREAM_VERA=y +BR2_PACKAGE_BCM_REFSW=y +BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_PLATFORM_7241=y +BR2_PACKAGE_BCM_REFSW_EGLCUBE=y +# BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_WPEFRAMEWORK=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMMANDER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y +BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y +BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://37.153.111.234" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,networkprocess:50m,webprocess:170m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y +BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y +BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y +BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y +BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y +BR2_PACKAGE_WPEWEBKIT=y +BR2_PACKAGE_ORC=y +BR2_PACKAGE_ICU_USE_ICUDATA=y +BR2_PACKAGE_SHARED_MIME_INFO=y +BR2_PACKAGE_DROPBEAR=y +BR2_PACKAGE_GESFTPSERVER=y +BR2_TARGET_ROOTFS_CPIO_GZIP=y +BR2_TARGET_ROOTFS_INITRAMFS=y diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index a1b61edde6da..05926ef3d23d 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -73,6 +73,10 @@ choice bool "BCM 7429 IPC" depends on BR2_mipsel + config BR2_PACKAGE_BCM_REFSW_PLATFORM_7241 + bool "BCM 7241 DCSFBTSFF" + depends on BR2_mipsel + config BR2_PACKAGE_BCM_REFSW_PLATFORM_7439 bool "BCM 7439" depends on BR2_arm diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index 18b64e95327b..5374aac857a3 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -64,6 +64,9 @@ BCM_REFSW_PLATFORM_REV = B0 else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7429),y) BCM_REFSW_PLATFORM = 97429 BCM_REFSW_PLATFORM_REV = B0 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_7241),y) +BCM_REFSW_PLATFORM = 97241 +BCM_REFSW_PLATFORM_REV = B0 else BCM_REFSW_PLATFORM = 97429 BCM_REFSW_PLATFORM_REV = B0 From 00d2c1c85cd04f8edd9f1c76bc08fe0ad359b0c5 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Mon, 5 Nov 2018 18:44:24 +0100 Subject: [PATCH 519/614] [Evasion] update --- configs/evasion7241_wpe_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/evasion7241_wpe_defconfig b/configs/evasion7241_wpe_defconfig index 8561e4fc640a..d003ff97d3d5 100644 --- a/configs/evasion7241_wpe_defconfig +++ b/configs/evasion7241_wpe_defconfig @@ -15,7 +15,6 @@ BR2_TARGET_GENERIC_GETTY_TERM="" BR2_SYSTEM_DHCP="eth0" BR2_TARGET_TZ_INFO=y BR2_TARGET_LOCALTIME="Europe/Amsterdam" -BR2_ROOTFS_POST_BUILD_SCRIPT="board/dawn/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-3.3.git" @@ -72,7 +71,7 @@ BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://37.153.111.234" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,networkprocess:50m,webprocess:170m,rpcprocess:50m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y From 8541ac80f6395421d9b760f499f6eae20a28951b Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Tue, 6 Nov 2018 14:50:02 +0100 Subject: [PATCH 520/614] [Evasion] Add WPEFramework configure script --- board/evasion/evasion.sh | 65 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100755 board/evasion/evasion.sh diff --git a/board/evasion/evasion.sh b/board/evasion/evasion.sh new file mode 100755 index 000000000000..3b24ec5c13c3 --- /dev/null +++ b/board/evasion/evasion.sh @@ -0,0 +1,65 @@ +#!/bin/sh + + +set -u +set -e + +BOARD_DIR="$(dirname $0)" + +# Copy index.html page for WPE Framework +if [ -f "${BOARD_DIR}/index.html" ]; then + mkdir -p "${TARGET_DIR}/www/" + cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" +fi + +ROOTFS_DIR="${BINARIES_DIR}/../rootfs" +ROOTFS_FILES="${BINARIES_DIR}/rootfs.files" +STAR="*" + +# Clean up target +rm -rf "${TARGET_DIR}/usr/lib/gstreamer-1.0/include" +rm -rf "${TARGET_DIR}/usr/lib/libstdc++.so.6.0.20-gdb.py" +rm -rf "${TARGET_DIR}/etc/ssl/man" + +# Temp rootfs dir +mkdir -p "${ROOTFS_DIR}" + +# Create files list for rsync +rm -rf "${ROOTFS_FILES}" +while read line +do + find "${TARGET_DIR}" -name "$line$STAR" -printf "%P\n" >> "${ROOTFS_FILES}" +done < "${BOARD_DIR}/evasion.txt" + +# Append missing folders +echo "usr/lib/gstreamer-1.0" >> "${ROOTFS_FILES}" +echo "usr/lib/gio" >> "${ROOTFS_FILES}" +echo "usr/share/X11" >> "${ROOTFS_FILES}" +echo "usr/share/mime" >> "${ROOTFS_FILES}" +echo "etc/playready" >> "${ROOTFS_FILES}" +echo "etc/ssl" >> "${ROOTFS_FILES}" +echo "etc/fonts" >> "${ROOTFS_FILES}" + +rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_DIR}" + +# Default font +mkdir -p "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera" +cp -f "${TARGET_DIR}/usr/share/fonts/ttf-bitstream-vera/Vera.ttf" "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera/" + +# move utility lib of brcm plugin to usr/lib +mv "${ROOTFS_DIR}/usr/lib/gstreamer-1.0/libbrcmgstutil.so" "${ROOTFS_DIR}/usr/lib/" + +# WPEFramework launcher +cp -pf "${BOARD_DIR}/wpeframework.sh" "${ROOTFS_DIR}" + +# WebServer path +mkdir -p "${ROOTFS_DIR}/www" + +# Create tar +tar -cvf "${BINARIES_DIR}/evasion.tar" -C "${ROOTFS_DIR}" . + +# Cleaning up +rm -rf "${ROOTFS_FILES}" +rm -rf "${ROOTFS_DIR}" + + From 7134f9adbeacb888e55fd3cde4a9bc3c9f720e71 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Tue, 6 Nov 2018 14:53:14 +0100 Subject: [PATCH 521/614] [Evasion] update WPEFramework configure script --- board/evasion/evasion.sh | 71 ++++++++-------------------------------- 1 file changed, 13 insertions(+), 58 deletions(-) diff --git a/board/evasion/evasion.sh b/board/evasion/evasion.sh index 3b24ec5c13c3..9964aa1a969e 100755 --- a/board/evasion/evasion.sh +++ b/board/evasion/evasion.sh @@ -1,65 +1,20 @@ -#!/bin/sh +SOURCE=/mnt/nfs +DESTINATION=/usr/metrological +mkdir -p $SOURCE +mkdir -p $DESTINATION/lib -set -u -set -e +udhcpc eth0 -BOARD_DIR="$(dirname $0)" +mount -t nfs -o nolock 192.168.1.203:/usr/src/nfs/nos $SOURCE -# Copy index.html page for WPE Framework -if [ -f "${BOARD_DIR}/index.html" ]; then - mkdir -p "${TARGET_DIR}/www/" - cp -pf "${BOARD_DIR}/index.html" "${TARGET_DIR}/www/" -fi +cp $SOURCE/usr/lib/libstdc++.so.6.0.21 $DESTINATION/lib/libstdc++.so.6 +cp -r $SOURCE/etc/WPEFramework /etc/WPEFramework +cp -r $SOURCE/usr/lib/libWPE* /usr/lib/ +cp -r $SOURCE/usr/lib/wpeframework/ /usr/lib/wpeframework +cp -r $SOURCE/usr/bin/WPE* /usr/bin +cp -r $SOURCE/usr/share/WPEFramework /usr/share/WPEFramework -ROOTFS_DIR="${BINARIES_DIR}/../rootfs" -ROOTFS_FILES="${BINARIES_DIR}/rootfs.files" -STAR="*" - -# Clean up target -rm -rf "${TARGET_DIR}/usr/lib/gstreamer-1.0/include" -rm -rf "${TARGET_DIR}/usr/lib/libstdc++.so.6.0.20-gdb.py" -rm -rf "${TARGET_DIR}/etc/ssl/man" - -# Temp rootfs dir -mkdir -p "${ROOTFS_DIR}" - -# Create files list for rsync -rm -rf "${ROOTFS_FILES}" -while read line -do - find "${TARGET_DIR}" -name "$line$STAR" -printf "%P\n" >> "${ROOTFS_FILES}" -done < "${BOARD_DIR}/evasion.txt" - -# Append missing folders -echo "usr/lib/gstreamer-1.0" >> "${ROOTFS_FILES}" -echo "usr/lib/gio" >> "${ROOTFS_FILES}" -echo "usr/share/X11" >> "${ROOTFS_FILES}" -echo "usr/share/mime" >> "${ROOTFS_FILES}" -echo "etc/playready" >> "${ROOTFS_FILES}" -echo "etc/ssl" >> "${ROOTFS_FILES}" -echo "etc/fonts" >> "${ROOTFS_FILES}" - -rsync -ar --files-from="${ROOTFS_FILES}" "${TARGET_DIR}" "${ROOTFS_DIR}" - -# Default font -mkdir -p "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera" -cp -f "${TARGET_DIR}/usr/share/fonts/ttf-bitstream-vera/Vera.ttf" "${ROOTFS_DIR}/usr/share/fonts/ttf-bitstream-vera/" - -# move utility lib of brcm plugin to usr/lib -mv "${ROOTFS_DIR}/usr/lib/gstreamer-1.0/libbrcmgstutil.so" "${ROOTFS_DIR}/usr/lib/" - -# WPEFramework launcher -cp -pf "${BOARD_DIR}/wpeframework.sh" "${ROOTFS_DIR}" - -# WebServer path -mkdir -p "${ROOTFS_DIR}/www" - -# Create tar -tar -cvf "${BINARIES_DIR}/evasion.tar" -C "${ROOTFS_DIR}" . - -# Cleaning up -rm -rf "${ROOTFS_FILES}" -rm -rf "${ROOTFS_DIR}" +export LD_LIBRARY_PATH=$DESTINATION/lib:$LD_LIBRARY_PATH From 7a2b7c4bf1774ac888fa6b4ac13779c6bf169ade Mon Sep 17 00:00:00 2001 From: Bram Oosterhuis Date: Tue, 6 Nov 2018 18:34:32 +0100 Subject: [PATCH 522/614] [greenpeak] generalize nexus builds --- package/greenpeak/Config.in | 1 + package/greenpeak/greenpeak.mk | 12 +++++------- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/package/greenpeak/Config.in b/package/greenpeak/Config.in index 5fd77f3d291b..d833b2ff233c 100644 --- a/package/greenpeak/Config.in +++ b/package/greenpeak/Config.in @@ -7,6 +7,7 @@ if BR2_PACKAGE_GREENPEAK config BR2_PACKAGE_GREENPEAK_KERNEL_MODULE bool "kernel module" + select BR2_PACKAGE_BCM_REFSW_KERNELSPACE_HEADERS if BR2_PACKAGE_HAS_NEXUS help Build the kernel module diff --git a/package/greenpeak/greenpeak.mk b/package/greenpeak/greenpeak.mk index cfb7ec812c1f..a7b6a1808e9c 100644 --- a/package/greenpeak/greenpeak.mk +++ b/package/greenpeak/greenpeak.mk @@ -21,6 +21,7 @@ endif ifneq (,$(findstring $(GREENPEAK_CHIP), GP501 GP510 GP711)) GREENPEAK_CHIP_REPO = gp501 + GREENPEAK_REPO_VERSION = 1.1 else ifneq (,$(findstring $(GREENPEAK_CHIP), GP502 GP712)) GREENPEAK_CHIP_REPO = gp712 else ifneq (,$(findstring $(GREENPEAK_CHIP), ZD4500ZNO)) @@ -37,17 +38,14 @@ GREENPEAK_VERSION = ${GREENPEAK_CHIP_REPO}_${GREENPEAK_PLATFORM}_${ARCH}_${GREEN ifeq ($(BR2_PACKAGE_GREENPEAK_KERNEL_MODULE),y) GREENPEAK_EXTRA_MOD_CFLAGS = \ -D$(GREENPEAK_CHIP) \ - -I$(STAGING_DIR)/usr/include \ - -I$(STAGING_DIR)/usr/include/linux \ - -nodefaultlibs \ - -Wno-unused-variable \ - -Wno-incompatible-pointer-types + -I$(STAGING_DIR)/usr/include -ifneq (,$(findstring $(GREENPEAK_CHIP_REPO), zd4500zno)) +ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) GREENPEAK_EXTRA_MOD_CFLAGS += \ -I$(STAGING_DIR)/usr/include/refsw/linuxkernel/include/ \ -DGP_USE_NEXUS_SPI \ - -I${@D}/Driver/BCM97358Ref \ + -nodefaultlibs \ + -I${@D}/Driver/BCM97358Ref define GREENPEAK_PREPARE_MODULE $(INSTALL) -m 644 -D $(STAGING_DIR)/usr/include/refsw/linuxkernel/Module.symvers ${@D}/Driver/ From 421aa832bf0a09311d77f972136b094592fa3f0e Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 12 Nov 2018 23:31:50 +0000 Subject: [PATCH 523/614] [wpeframework] bump to latest version --- package/wpe/wpeframework/wpeframework.mk | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index c8f7edefeb90..76dd2ce17b05 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 7280b09744c1b47281023fb8cd1c3d8db6280de7 +WPEFRAMEWORK_VERSION = 7ed8348b4248068a82a535f3bc6b41cc6cf91937 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) @@ -86,6 +86,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) WPEFRAMEWORK_EXTERN_EVENTS += Decryption endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) WPEFRAMEWORK_EXTERN_EVENTS += WebSource WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSERVER=ON From 7f6b2103f859aa75d7cd334d6e4f9fe37eebd350 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 12 Nov 2018 23:32:09 +0000 Subject: [PATCH 524/614] [wpeframework-plugins] bump to latest versions --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 5bc2e411b3d6..31ce2b407fb9 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = fde7e5bd47f33cb37a7163005e2d125ffd02b2b6 +WPEFRAMEWORK_PLUGINS_VERSION = f496482ceee43d74cde4e3142efef9dd437704ad WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From cc38ef726c2a27c38d4bc355840829fb059e06e3 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 12 Nov 2018 23:32:40 +0000 Subject: [PATCH 525/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 02d9ea1f361d..44468ccb5d9a 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = 1713eef15ab85c4476701f1a6e24e73afa2f323c +WPEWEBKIT_VERSION_VALUE = c04a067fb08ad03f34f0ad1cfe2c95dc138cbdbb endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From dfb84d4a4c0cad7bc4f79ca5d7ddd80e282ede89 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Tue, 13 Nov 2018 20:25:32 +0100 Subject: [PATCH 526/614] [UMA] bump to latest version --- package/uma-sdk/uma-sdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index ebcee56bb89b..b8fe432d9c9c 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,7 +3,7 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = 2a6e3ce11ddada3919e40a353a8ad7e6db698395 +UMA_SDK_VERSION = 0c5a1a29bf1b1265b7f3a459e6ae40a290e71cdd UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES From 100355f78713cabf8b8b40db0f20580587653763 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 14 Nov 2018 12:41:05 +0100 Subject: [PATCH 527/614] [UMA] bump to latest version --- package/uma-sdk/uma-sdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index b8fe432d9c9c..dbe07a78e61c 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,7 +3,7 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = 0c5a1a29bf1b1265b7f3a459e6ae40a290e71cdd +UMA_SDK_VERSION = 5e70f06a5b627deab51ca24580802dbe8e215f25 UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES From 415c39b65feb56098f7b266b9fcb2c0b5fd9a2b7 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 16 Nov 2018 15:34:57 +0000 Subject: [PATCH 528/614] [wpeframework] override config.json if exists --- package/wpe/wpeframework/S80WPEFramework | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index 4da4a981878c..b3c1a6faee27 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -33,6 +33,11 @@ start() { cp /boot/index.html /www/ fi + # override config.json + if [ -f /boot/config.json ]; then + cp /boot/config.json /www/ + fi + # read proxy settings from /boot/proxy if [ -f /boot/proxy ]; then PROXY_IP=`cat /boot/proxy` From 3bdb6de8e4e9a3cd236e6a99fb0f59466b94c67a Mon Sep 17 00:00:00 2001 From: woutermeek Date: Fri, 16 Nov 2018 11:23:36 -0800 Subject: [PATCH 529/614] [mc] Added ocdm and playready 3.0/SVP support --- configs/multichoice_bcm7271_wpe_ml_defconfig | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig index 4c0a6556aee3..0f1a3e25ce52 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -32,7 +32,6 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ICYDEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y @@ -53,12 +52,16 @@ BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7271=y +BR2_PACKAGE_BCM_REFSW_SAGE=y +BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING=y +BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y +BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y +BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30_EXAMPLE=y BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y @@ -71,7 +74,7 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y -# BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set +BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y @@ -84,10 +87,6 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,netwo BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y BR2_PACKAGE_WPEFRAMEWORK_UX=y -BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y -BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_C_ARES=y BR2_PACKAGE_ORC=y From ef3c4594aa962a8c873b12e91a8848a715c24aa3 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Sun, 18 Nov 2018 13:22:59 +0100 Subject: [PATCH 530/614] [WPEFrameworkPlugins] Enable Streamer Plugin. --- package/wpe/wpeframework-plugins/Config.in | 61 +++++++++++++++++++ .../wpeframework-plugins.mk | 26 ++++++++ package/wpe/wpeframework/Config.in | 6 ++ package/wpe/wpeframework/wpeframework.mk | 4 ++ 4 files changed, 97 insertions(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 62208734b868..26555cf213a0 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -298,6 +298,67 @@ config BR2_PACKAGE_WPEFRAMEWORK_SICONTROL help SI Control Plugin +menuconfig BR2_PACKAGE_WPEFRAMEWORK_STREAMER + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_BROADCAST + bool "Streamer" + help + Multi Frontend support control (playback or record) + +if BR2_PACKAGE_WPEFRAMEWORK_STREAMER + +config BR2_PACKAGE_WPEFRAMEWORK_STREAMER_SI_PARSING + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "SI parsing" + help + Enable SI parsing from the streamer. + +config BR2_PACKAGE_WPEFRAMEWORK_STREAMER_TS_SCANNING + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + bool "TS scanning" + help + Enable transport stream scanning from the home transport stream. + +if BR2_PACKAGE_WPEFRAMEWORK_STREAMER_TS_SCANNING + +config BR2_PACKAGE_WPEFRAMEWORK_STREAMER_HOME_TS + string "Home transport stream" + default "frequency=714\;modulation=64\;symbol=6875000" + help + Sets the Home transport +endif + +choice + bool "DBS Options" + default BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DVB + help + Choose the DBS flavor. + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DVB + bool "DVB" + help + Enable DVB DBS + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_STREAMER_ATSC + bool "ATSC" + help + Enable ATSC DBS +endchoice + +config BR2_PACKAGE_WPEFRAMEWORK_STREAMER_FRONTENDS + string "Frontends" + default "1" + help + Sets the number of frontends (tuners) available in the system. + +config BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DECODERS + string "Decoders" + default "1" + help + Sets the number of decoders available in the system. + +endif + config BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "TimeSync" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 31ce2b407fb9..db365a45fe7f 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -222,24 +222,30 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_USERAGENT=$(BR2_PACKA endif endif endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_RTSPCLIENT),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RTSPCLIENT=ON endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBPROXY=ON endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSERVER=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_WEBSERVER_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH) endif endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSHELL=ON endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WIFICONTROL=ON endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_AUTOSTART),y) @@ -252,6 +258,26 @@ ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_GPIOTYPE=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE) endif endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DSTREAMER_IMPLEMENTATION=QAM +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_FRONTENDS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_FRONTENDS)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_DECODERS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DECODERS)) +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DVB),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_STANDARD=DVB +else +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_STANDARD=ATSC +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_SI_PARSING),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_SI_PARSING=ON +endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_TS_SCANNING),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_TS_SCANNING=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_HOME_TS=$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_HOME_TS) +endif +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += sqlite ifeq ($(BR2_PACKAGE_RPI_FIRMWARE), y) diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index a27a3ff0d365..15e78fc077e8 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -69,6 +69,12 @@ config BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY select BR2_PACKAGE_LIBPROVISION help Allows provisioning of modules from the cloud. + + config BR2_PACKAGE_WPEFRAMEWORK_BROADCAST + bool "Broadcast" + default n + help + Abstraction on QAM tuner and PSI/SI parser functionality. endmenu diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 76dd2ce17b05..ddf63e72d82e 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -51,6 +51,10 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_VIRTUALINPUT=ON endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BROADCAST),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_BROADCAST=ON +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDM),y) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_CDMI=ON ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE),y) From 0c38c6e97a1eae9a807b2b61b4762e0e0a5c376b Mon Sep 17 00:00:00 2001 From: pwielders Date: Sun, 18 Nov 2018 13:25:47 +0100 Subject: [PATCH 531/614] Set the default for Streamer to no --- package/wpe/wpeframework-plugins/Config.in | 1 + 1 file changed, 1 insertion(+) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 26555cf213a0..a0a12277fc37 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -302,6 +302,7 @@ menuconfig BR2_PACKAGE_WPEFRAMEWORK_STREAMER select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_WPEFRAMEWORK_BROADCAST bool "Streamer" + default n help Multi Frontend support control (playback or record) From ccbd37f15b93edc92a3b04e0bc4229100c5f3b87 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 19 Nov 2018 16:57:10 +0100 Subject: [PATCH 532/614] [OCDM-Nexus]: bump the version and remove pc dependencies --- .../wpeframework-cdmi-playready-nexus-svp.mk | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk index 3f062992c615..e7c0c842b934 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = d0a4d4eae54ba5bdfac26090e16fa4145c3ed6b1 +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = dcc0e11f61d08fb7cf9a5f50e459ab47f190ec4c WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus-SVP.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_STAGING = YES @@ -14,20 +14,8 @@ ifeq ($(BR2_PACKAGE_BCM_REFSW),y) WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_DEPENDENCIES += bcm-refsw endif -define WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_PLAYREADY_PC_FILE - $(INSTALL) -m 0644 -D $(@D)/playready_3.0.pc $(STAGING_DIR)/usr/lib/pkgconfig/playready.pc -endef - -define WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_OCDM_PC_FILE - $(INSTALL) -m 0644 -D $(@D)/ocdm-nexus.pc $(STAGING_DIR)/usr/lib/pkgconfig/ocdm-nexus.pc -endef - ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_ENABLE),y) WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_CONF_OPTS += -DNEXUS_PLAYREADY_SVP_ENABLE=ON endif -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_POST_EXTRACT_HOOKS += \ - WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_PLAYREADY_PC_FILE \ - WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_OCDM_PC_FILE - $(eval $(cmake-package)) From f2ef54d1e0b0c5da80af1c69b31ed2f30cff1d80 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 19 Nov 2018 17:12:05 +0100 Subject: [PATCH 533/614] [MC]: Update config --- configs/multichoice_bcm7271_wpe_ml_defconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/multichoice_bcm7271_wpe_ml_defconfig index 0f1a3e25ce52..44627990720f 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/multichoice_bcm7271_wpe_ml_defconfig @@ -26,6 +26,7 @@ BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y +BR2_PACKAGE_GST1_BCM_ENABLE_SVP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_APP=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y @@ -53,10 +54,9 @@ BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7271=y BR2_PACKAGE_BCM_REFSW_SAGE=y -BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING=y BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y -BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30_EXAMPLE=y +BR2_PACKAGE_BCM_REFSW_BOXMODE="1" BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y @@ -71,9 +71,11 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT="2" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y +BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y From a3a3b03bd4209d2b8fd35a45bea021d1a326ba31 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Tue, 20 Nov 2018 13:10:00 -0800 Subject: [PATCH 534/614] wpeframework-netflix: bump to latest to fix build --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 9b6c59bd19dc..e2c152ff21cf 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_NETFLIX_VERSION = cf6a61a1985ec34d34b044fceaaa68088512fbdc +WPEFRAMEWORK_NETFLIX_VERSION = 463b00b225748667cc60948ba2a1f1ef0799d988 ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. From f93ed23fe61690d93b41ff9dbab62dc1d2a23b50 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 21 Nov 2018 14:27:18 +0000 Subject: [PATCH 535/614] [rpi] update index page to avoid warning when no config.json is found --- board/raspberrypi/index.html | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/board/raspberrypi/index.html b/board/raspberrypi/index.html index 80a6483be1aa..1846c4810140 100644 --- a/board/raspberrypi/index.html +++ b/board/raspberrypi/index.html @@ -243,17 +243,21 @@ statusEl.innerHTML = 'We're connected!'; } if (data.subsystems && data.subsystems.Time) { - statusEl.innerHTML = 'Loading UX'; + statusEl.innerHTML = 'Internet is up!'; configUX() - .then(loadUX) - .then(() => { - logoEl.className = ''; - statusEl.innerHTML = 'We're ready!'; + .then((config) => { + statusEl.innerHTML = 'Loading UX'; + loadUX(config).then(() => { + logoEl.className = ''; + statusEl.innerHTML = 'We're ready!'; + }) + .catch((err) => { + statusEl.innerHTML = 'Something went wrong (' + deviceId + ')'; + }); }) .catch((err) => { - statusEl.innerHTML = 'Something went wrong (' + deviceId + ')'; + statusEl.innerHTML = 'We're ready!'; }); - } }; socket.onopen = () => { From 6c4a14f7f024978f3aa708f8c29d3b4e09a7b888 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 21 Nov 2018 14:33:07 +0000 Subject: [PATCH 536/614] [rpi-firmware] fix custom toolchains From kernel version 4.9 the block devices have been renamed --- package/rpi-firmware/rpi-firmware.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 5ed79cf03cf2..e3018151f84e 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -55,7 +55,7 @@ endef endif ifeq ($(BR2_TARGET_ROOTFS_CPIO),y) -ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) +ifeq ($(BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_9),y) define RPI_FIRMWARE_MOUNT_ROOT mkdir -p $(TARGET_DIR)/root grep -q '^/dev/mmcblk0p2' $(TARGET_DIR)/etc/fstab || \ From 85cc86d908ec9caecb443c7539e9d97f5f3266da Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 21 Nov 2018 14:42:56 +0000 Subject: [PATCH 537/614] [rpi-firmware] correctly handle different kernel versions --- package/rpi-firmware/rpi-firmware.mk | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index e3018151f84e..d43f413a0d8e 100644 --- a/package/rpi-firmware/rpi-firmware.mk +++ b/package/rpi-firmware/rpi-firmware.mk @@ -34,41 +34,41 @@ define RPI_FIRMWARE_INSTALL_TARGET_CMDS endef endif # INSTALL_VCDBG -ifeq ($(BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_9),y) +ifeq ($(BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14),y) define RPI_FIRMWARE_MOUNT_BOOT mkdir -p $(TARGET_DIR)/boot - grep -q '^/dev/mmcblk0p1' $(TARGET_DIR)/etc/fstab || \ - echo -e '/dev/mmcblk0p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab + grep -q '^/dev/mmcblk1p1' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk1p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab endef define RPI_FIRMWARE_CMDLINE - $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-0 $(BINARIES_DIR)/rpi-firmware/cmdline.txt + $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-1 $(BINARIES_DIR)/rpi-firmware/cmdline.txt endef else define RPI_FIRMWARE_MOUNT_BOOT mkdir -p $(TARGET_DIR)/boot - grep -q '^/dev/mmcblk1p1' $(TARGET_DIR)/etc/fstab || \ - echo -e '/dev/mmcblk1p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab + grep -q '^/dev/mmcblk0p1' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk0p1 /boot vfat defaults 0 0' >> $(TARGET_DIR)/etc/fstab endef define RPI_FIRMWARE_CMDLINE - $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-1 $(BINARIES_DIR)/rpi-firmware/cmdline.txt + $(INSTALL) -D -m 0644 package/rpi-firmware/cmdline.txt-0 $(BINARIES_DIR)/rpi-firmware/cmdline.txt endef endif ifeq ($(BR2_TARGET_ROOTFS_CPIO),y) -ifeq ($(BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_9),y) +ifeq ($(BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14),y) define RPI_FIRMWARE_MOUNT_ROOT mkdir -p $(TARGET_DIR)/root - grep -q '^/dev/mmcblk0p2' $(TARGET_DIR)/etc/fstab || \ - echo -e '/dev/mmcblk0p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab - $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-0 \ + grep -q '^/dev/mmcblk1p2' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk1p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab + $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-1 \ $(TARGET_DIR)/etc/init.d/S30mountroot endef else define RPI_FIRMWARE_MOUNT_ROOT mkdir -p $(TARGET_DIR)/root - grep -q '^/dev/mmcblk1p2' $(TARGET_DIR)/etc/fstab || \ - echo -e '/dev/mmcblk1p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab - $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-1 \ + grep -q '^/dev/mmcblk0p2' $(TARGET_DIR)/etc/fstab || \ + echo -e '/dev/mmcblk0p2 /root ext4 defaults 0 0' >> $(TARGET_DIR)/etc/fstab + $(INSTALL) -m 0755 -D package/rpi-firmware/S30mountroot-0 \ $(TARGET_DIR)/etc/init.d/S30mountroot endef endif From 3a5bc985a64d66655356d596a14652fe9fd05f7b Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 21 Nov 2018 15:23:16 +0000 Subject: [PATCH 538/614] [wpewebkit] bump to latest version --- package/wpe/wpewebkit/wpewebkit.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpewebkit/wpewebkit.mk b/package/wpe/wpewebkit/wpewebkit.mk index 44468ccb5d9a..f03411fc6987 100644 --- a/package/wpe/wpewebkit/wpewebkit.mk +++ b/package/wpe/wpewebkit/wpewebkit.mk @@ -8,7 +8,7 @@ ifeq ($(BR2_PACKAGE_WPEWEBKIT_BUILD_DEVELOPMENT_VERSION),y) WPEWEBKIT_VERSION_VALUE = d87dd8efb1ac316d270d8bc2076c800106f9507f else -WPEWEBKIT_VERSION_VALUE = c04a067fb08ad03f34f0ad1cfe2c95dc138cbdbb +WPEWEBKIT_VERSION_VALUE = 7f58a6513c4cf3413974ab6d11668e13b6a20b24 endif WPEWEBKIT_VERSION = $(WPEWEBKIT_VERSION_VALUE) From 1a0e122f93a0f64516676ffe61412a397a66ae73 Mon Sep 17 00:00:00 2001 From: albertd Date: Wed, 21 Nov 2018 19:45:28 +0000 Subject: [PATCH 539/614] [rpi] fix boot up with new 4.14 kernels --- board/raspberrypi/post-image.sh | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/board/raspberrypi/post-image.sh b/board/raspberrypi/post-image.sh index 1588481faa37..da36b4cb4b68 100755 --- a/board/raspberrypi/post-image.sh +++ b/board/raspberrypi/post-image.sh @@ -32,6 +32,7 @@ __EOF__ fi fi +KERNEL_4_14="$(grep ^BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_14=y ${BR2_CONFIG})" for i in "$@" do case "$i" in @@ -142,19 +143,21 @@ __EOF__ fi ;; --rpi-wifi*) - if ! grep -qE '^dtoverlay=sdtweak' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Adding 'rpi wifi' functionality to config.txt." - cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" + if [ "x${KERNEL_4_14}" = "x" ]; then + if ! grep -qE '^dtoverlay=sdtweak' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Adding 'rpi wifi' functionality to config.txt." + cat << __EOF__ >> "${BINARIES_DIR}/rpi-firmware/config.txt" # Enable overlay for wifi functionality dtoverlay=sdtweak,overclock_50=80 __EOF__ - fi - if grep -qE '^dtoverlay=mmc' "${BINARIES_DIR}/rpi-firmware/config.txt"; then - echo "Removing overlay for mmc due to wifi compatibilityin config.txt." - cat "${BINARIES_DIR}/rpi-firmware/config.txt" | sed '/^# Enable mmc by default/,+2d' > "${BINARIES_DIR}/rpi-firmware/config_.txt" - rm "${BINARIES_DIR}/rpi-firmware/config.txt" - mv "${BINARIES_DIR}/rpi-firmware/config_.txt" "${BINARIES_DIR}/rpi-firmware/config.txt" + fi + if grep -qE '^dtoverlay=mmc' "${BINARIES_DIR}/rpi-firmware/config.txt"; then + echo "Removing overlay for mmc due to wifi compatibilityin config.txt." + cat "${BINARIES_DIR}/rpi-firmware/config.txt" | sed '/^# Enable mmc by default/,+2d' > "${BINARIES_DIR}/rpi-firmware/config_.txt" + rm "${BINARIES_DIR}/rpi-firmware/config.txt" + mv "${BINARIES_DIR}/rpi-firmware/config_.txt" "${BINARIES_DIR}/rpi-firmware/config.txt" + fi fi ;; --overclock*) From d9167e8a3f072a210d17c0e4c3e34911648bc0d9 Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 22 Nov 2018 01:49:19 +0100 Subject: [PATCH 540/614] [Widevine-Nexus]: Introducing Widevine broadcom SVP/Sage --- package/wpe/wpeframework-cdmi/Config.in | 1 + .../Config.in | 11 +++++++++++ .../wpeframework-cdmi-widevine-nexus-svp.mk | 17 +++++++++++++++++ 3 files changed, 29 insertions(+) create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/Config.in create mode 100644 package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/wpeframework-cdmi-widevine-nexus-svp.mk diff --git a/package/wpe/wpeframework-cdmi/Config.in b/package/wpe/wpeframework-cdmi/Config.in index 769259d06840..bf461c34ec4b 100644 --- a/package/wpe/wpeframework-cdmi/Config.in +++ b/package/wpe/wpeframework-cdmi/Config.in @@ -4,4 +4,5 @@ source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus/Config.i source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-vgdrm/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine/Config.in" +source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/Config.in" source "package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/Config.in" diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/Config.in b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/Config.in new file mode 100644 index 000000000000..1eb40581ac35 --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/Config.in @@ -0,0 +1,11 @@ +config BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP + bool "widevine broadcom svp/sage" + depends on BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_HAS_NEXUS + depends on BR2_PACKAGE_BCM_REFSW_SAGE + select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS + select BR2_PACKAGE_WPEFRAMEWORK_CDM + select BR2_PACKAGE_HAS_WIDEVINE + default y + help + Broadcom WideVine SVP SAGE implementation + diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/wpeframework-cdmi-widevine-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/wpeframework-cdmi-widevine-nexus-svp.mk new file mode 100644 index 000000000000..45b0fefdebab --- /dev/null +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-widevine-nexus-svp/wpeframework-cdmi-widevine-nexus-svp.mk @@ -0,0 +1,17 @@ +################################################################################ +# +# wpeframework-cdmi-widevine-nexus-svp +# +################################################################################ + +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_VERSION = 02e67eec87fa7d2e8db6e5b331fd5687de2ca32a +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_SITE_METHOD = git +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Widevine-Nexus-SVP.git +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_INSTALL_STAGING = NO +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_DEPENDENCIES = wpeframework + +ifeq ($(BR2_PACKAGE_BCM_REFSW),y) +WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP_DEPENDENCIES += bcm-refsw +endif + +$(eval $(cmake-package)) From e112932899f8666cabb3ff54d164e70ad79918af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Thu, 22 Nov 2018 13:09:52 +0000 Subject: [PATCH 541/614] gst1-plugins-bad: mssdemux: support for live content as vod --- ...emux-support-for-live-content-as-vod.patch | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644 package/gstreamer1/gst1-plugins-bad/0019-mssdemux-support-for-live-content-as-vod.patch diff --git a/package/gstreamer1/gst1-plugins-bad/0019-mssdemux-support-for-live-content-as-vod.patch b/package/gstreamer1/gst1-plugins-bad/0019-mssdemux-support-for-live-content-as-vod.patch new file mode 100644 index 000000000000..ac883f588fa9 --- /dev/null +++ b/package/gstreamer1/gst1-plugins-bad/0019-mssdemux-support-for-live-content-as-vod.patch @@ -0,0 +1,162 @@ +From 747d71056c368136c30d4911c4bcf1a78e05a9e2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= +Date: Thu, 22 Nov 2018 12:21:53 +0000 +Subject: [PATCH] mssdemux: support for live content as vod + +Some content providers store live videos (with initial PTS very far away from +zero) and later serve them as regular video-on-demand content (isLive=false), +which is expected to start from zero. + +This patch detects those contents (non-live, not-zero start) and uses probes +on the MssDemux src pads to "fix" the PTS by offsetting it back to start from +zero. +--- + ext/smoothstreaming/gstmssdemux.c | 72 ++++++++++++++++++++++++++++ + ext/smoothstreaming/gstmssmanifest.c | 28 +++++++++++ + ext/smoothstreaming/gstmssmanifest.h | 1 + + 3 files changed, 101 insertions(+) + +diff --git a/ext/smoothstreaming/gstmssdemux.c b/ext/smoothstreaming/gstmssdemux.c +index 1624cf7d7..49ebdee74 100644 +--- a/ext/smoothstreaming/gstmssdemux.c ++++ b/ext/smoothstreaming/gstmssdemux.c +@@ -214,6 +214,76 @@ gst_mss_demux_class_init (GstMssDemuxClass * klass) + GST_DEBUG_CATEGORY_INIT (mssdemux_debug, "mssdemux", 0, "mssdemux plugin"); + } + ++static GstPadProbeReturn live_as_vod_pts_fixer_probe (GstPad *pad, ++ GstPadProbeInfo *info, gpointer user_data) ++{ ++ const GstClockTime* live_as_vod_offset = (const GstClockTime*)user_data; ++ GstBuffer* buffer = GST_PAD_PROBE_INFO_BUFFER(info); ++ ++ if (G_LIKELY(GST_BUFFER_PTS(buffer) != GST_CLOCK_TIME_NONE)) ++ GST_BUFFER_PTS(buffer) -= *live_as_vod_offset; ++ ++ return GST_PAD_PROBE_OK; ++} ++ ++// This function installs probes to offset PTSs on those non-live streams ++// which don't start from zero (because they're just live streams reconverted ++// to non-live). The offset will adjust the PTSs to start from zero, so the ++// stream behaves as a well formed non-live stream. ++static void setup_live_as_vod_offset (GstElement *element, gpointer user_data) ++{ ++ GstAdaptiveDemux *adaptivedemux = GST_ADAPTIVE_DEMUX_CAST (element); ++ GstMssDemux *mssdemux = GST_MSS_DEMUX_CAST (element); ++ GstClockTime stream_start_time, live_as_vod_offset = GST_CLOCK_TIME_NONE; ++ GList* streams; ++ GstIterator* it; ++ GValue item = G_VALUE_INIT; ++ ++ GST_DEBUG_OBJECT(element, "No more pads, setting up live-as-VoD offset"); ++ ++ if (gst_mss_manifest_is_live (mssdemux->manifest)) { ++ GST_DEBUG_OBJECT(element, "Stream is live, doing nothing"); ++ return; ++ } ++ ++ if (!adaptivedemux->streams) { ++ GST_WARNING_OBJECT (adaptivedemux, "No streams yet"); ++ return; ++ } ++ ++ for (streams = adaptivedemux->streams; streams; streams = streams->next) { ++ GstMssDemuxStream* mssdemuxstream = (GstMssDemuxStream*)(adaptivedemux->streams->data); ++ stream_start_time = (gst_mss_manifest_is_live (mssdemux->manifest)) ? GST_CLOCK_TIME_NONE : ++ gst_mss_stream_get_first_fragment_gst_timestamp(mssdemuxstream->manifest_stream); ++ if (stream_start_time == 0) ++ stream_start_time = GST_CLOCK_TIME_NONE; ++ ++ // This assumes that GST_CLOCK_TIME_NONE is larger than any valid time value ++ if (stream_start_time < live_as_vod_offset) ++ live_as_vod_offset = stream_start_time; ++ } ++ ++ if (live_as_vod_offset == GST_CLOCK_TIME_NONE) { ++ GST_DEBUG_OBJECT(element, "All streams start at zero, doing nothing"); ++ return; ++ } ++ ++ GST_DEBUG_OBJECT (mssdemux, "Minimal offset: %" GST_TIME_FORMAT ", installing probes", ++ GST_TIME_ARGS(live_as_vod_offset)); ++ ++ it = gst_element_iterate_src_pads(element); ++ while (gst_iterator_next (it, &item) == GST_ITERATOR_OK) { ++ GstPad* pad = GST_PAD(g_value_get_object(&item)); ++ GstClockTime* p = g_new (GstClockTime, 1); ++ *p = live_as_vod_offset; ++ GST_DEBUG_OBJECT (pad, "Adding live-as-VoD PTS fixer probe"); ++ gst_pad_add_probe(pad, GST_PAD_PROBE_TYPE_BUFFER, live_as_vod_pts_fixer_probe, p, g_free); ++ g_value_reset (&item); ++ } ++ g_value_unset (&item); ++ gst_iterator_free (it); ++} ++ + static void + gst_mss_demux_init (GstMssDemux * mssdemux) + { +@@ -221,6 +291,8 @@ gst_mss_demux_init (GstMssDemux * mssdemux) + + gst_adaptive_demux_set_stream_struct_size (GST_ADAPTIVE_DEMUX_CAST (mssdemux), + sizeof (GstMssDemuxStream)); ++ ++ g_signal_connect(GST_ELEMENT(mssdemux), "no-more-pads", G_CALLBACK(setup_live_as_vod_offset), NULL); + } + + static void +diff --git a/ext/smoothstreaming/gstmssmanifest.c b/ext/smoothstreaming/gstmssmanifest.c +index 1ab19daa1..2deadf824 100644 +--- a/ext/smoothstreaming/gstmssmanifest.c ++++ b/ext/smoothstreaming/gstmssmanifest.c +@@ -1240,6 +1240,34 @@ gst_mss_stream_get_fragment_gst_timestamp (GstMssStream * stream) + timescale); + } + ++guint64 gst_mss_stream_get_first_fragment_gst_timestamp (GstMssStream * stream) ++{ ++ guint64 time; ++ guint64 timescale; ++ GstMssStreamFragment *fragment; ++ ++ g_return_val_if_fail (stream->active, GST_CLOCK_TIME_NONE); ++ ++ GList *last; ++ ++ if (stream->has_live_fragments) ++ last = g_queue_peek_head_link (&stream->live_fragments); ++ else ++ last = g_list_first (stream->fragments); ++ if (last == NULL) ++ return GST_CLOCK_TIME_NONE; ++ ++ fragment = last->data; ++ ++ GST_LOG_OBJECT (stream, "fragment #%d, time %" GST_TIME_FORMAT, ++ fragment->number, GST_TIME_ARGS(fragment->time)); ++ ++ time = fragment->time; ++ timescale = gst_mss_stream_get_timescale (stream); ++ return (GstClockTime) gst_util_uint64_scale_round (time, GST_SECOND, ++ timescale); ++} ++ + GstClockTime + gst_mss_stream_get_fragment_gst_duration (GstMssStream * stream) + { +diff --git a/ext/smoothstreaming/gstmssmanifest.h b/ext/smoothstreaming/gstmssmanifest.h +index 3f9f49ada..c1c615fd3 100644 +--- a/ext/smoothstreaming/gstmssmanifest.h ++++ b/ext/smoothstreaming/gstmssmanifest.h +@@ -71,6 +71,7 @@ GstFlowReturn gst_mss_stream_advance_fragment (GstMssStream * stream); + GstFlowReturn gst_mss_stream_regress_fragment (GstMssStream * stream); + void gst_mss_stream_seek (GstMssStream * stream, gboolean forward, GstSeekFlags flags, guint64 time, guint64 * final_time); + const gchar * gst_mss_stream_get_lang (GstMssStream * stream); ++guint64 gst_mss_stream_get_first_fragment_gst_timestamp (GstMssStream * stream); + + const gchar * gst_mss_stream_type_name (GstMssStreamType streamtype); + +-- +2.17.0 + From 8f519d3fd0e9ad09167c50191f28873cac8e885d Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 22 Nov 2018 15:00:37 +0100 Subject: [PATCH 542/614] [UMA] Select older (working) bcm gst plugins --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index ab5f079e9d86..54a87d4e6e61 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -4,7 +4,9 @@ # ################################################################################ -ifeq ($(BR2_PACKAGE_BCM_REFSW_16_1),y) +ifeq ($(BR2_PACKAGE_UMA_SDK),y) +GST1_BCM_VERSION = 17.1-7 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_1),y) GST1_BCM_VERSION = 16.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_16_2),y) GST1_BCM_VERSION = 16.2 From be82375b2dc8a9ade912c482498e5385f73bc3f7 Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 22 Nov 2018 15:01:52 +0100 Subject: [PATCH 543/614] [NETFLIX5] Bump Netflix5 and plugin --- package/netflix5/netflix5.mk | 11 ++++++----- .../wpe/wpeframework-netflix/wpeframework-netflix.mk | 2 +- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index a7a83e02d34a..0180aad0d266 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,11 +4,12 @@ # ################################################################################ -NETFLIX5_VERSION = ea2d825345af5477514f63ff2f54be73ab6fc055 +# TODO: only select WPEFramework plugins as dependency if wpeframework graphics backend is selected +NETFLIX5_VERSION = fd91f1b6905f9024ca04856601132a1d3da91845 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY -NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework gst1-plugins-base +NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework gst1-plugins-base wpeframework-plugins NETFLIX5_INSTALL_TARGET = YES NETFLIX5_INSTALL_STAGING = YES NETFLIX5_SUBDIR = netflix @@ -20,7 +21,7 @@ NETFLIX_CONF_ENV += TARGET_CROSS="$(GNU_TARGET_NAME)-" ifeq ($(BR2_PACKAGE_PLAYREADY), y) NETFLIX5_DEPENDENCIES += playready endif -# TODO: disable hardcoded build type, check if all args are really needed. +# TODO: check if all args are really needed. NETFLIX5_CONF_OPTS = \ -DBUILD_DPI_DIRECTORY=$(@D)/partner/dpi \ -DCMAKE_INSTALL_PREFIX=$(@D)/release \ @@ -104,7 +105,7 @@ NETFLIX5_CONF_OPTS += \ -DGIBBON_GRAPHICS=wayland-egl else NETFLIX5_CONF_OPTS += \ - -DGIBBON_GRAPHICS=nexus \ + -DGIBBON_GRAPHICS=wpeframework \ -DGST_VIDEO_RENDERING=bcm-nexus endif @@ -257,7 +258,7 @@ define NETFLIX5_INSTALL_STAGING_CMDS cp -r $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu $(TARGET_DIR)/root/Netflix cp -r $(@D)/netflix/src/platform/gibbon/resources $(TARGET_DIR)/root/Netflix cp -r $(@D)/netflix/resources/configuration/* $(TARGET_DIR)/root/Netflix/etc/conf - cp $(@D)/partner/graphics/nexus/graphics.xml $(TARGET_DIR)/root/Netflix/etc/conf + cp $(@D)/partner/graphics/wpeframework/graphics.xml $(TARGET_DIR)/root/Netflix/etc/conf cp $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu/icudt58l/debug/unames.icu $(TARGET_DIR)/root/Netflix/icu/icudt58l cp $(@D)/netflix/src/platform/gibbon/*.js* $(TARGET_DIR)/root/Netflix/resources/js cp $(@D)/netflix/src/platform/gibbon/resources/default/PartnerBridge.js $(TARGET_DIR)/root/Netflix/resources/js diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index e2c152ff21cf..de30a725be2f 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -8,7 +8,7 @@ WPEFRAMEWORK_NETFLIX_VERSION = 463b00b225748667cc60948ba2a1f1ef0799d988 ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = d844095a3e7f6e6e43564f3e4d15453c24636db1 +WPEFRAMEWORK_NETFLIX_VERSION = add252eb73e8a763d7d6655233eda58915f68bf2 endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git From b67092fc5c92b3c09ad845296b3dc2734b91a66c Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 22 Nov 2018 15:02:25 +0100 Subject: [PATCH 544/614] [UMA] For now deselect a number of plugins that dont work in buildroot situation --- configs/uma7439_full_wpe_nf_defconfig | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/configs/uma7439_full_wpe_nf_defconfig b/configs/uma7439_full_wpe_nf_defconfig index 92d63eb61292..5e760c7a219b 100644 --- a/configs/uma7439_full_wpe_nf_defconfig +++ b/configs/uma7439_full_wpe_nf_defconfig @@ -91,8 +91,7 @@ BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR=y BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y -BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y -BR2_PACKAGE_WPEFRAMEWORK_CDMI_NAGRA=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y @@ -103,12 +102,7 @@ BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="https://youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL=y -BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL=y -BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST="306" BR2_PACKAGE_WPEFRAMEWORK_DIALSERVER=y -BR2_PACKAGE_WPEFRAMEWORK_ESPIAL=y -BR2_PACKAGE_WPEFRAMEWORK_ESPIAL_AUTOSTART=y -BR2_PACKAGE_WPEFRAMEWORK_LINEARBROADCASTPLAYER=y BR2_PACKAGE_WPEFRAMEWORK_NETFLIX=y BR2_PACKAGE_WPEWEBKIT=y BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y From 532dc6a275b27dc92cf5eb1d85341ba81bafc013 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Thu, 22 Nov 2018 21:39:32 +0530 Subject: [PATCH 545/614] [Westeros] repo of westeros changed to rdkcmf/westeros --- .../westeros-simplebuffer.mk | 5 +- .../westeros-simpleshell.mk | 5 +- .../0002-NXClient-local-switch.patch | 92 +++++++++++++++++++ ...ustom-queue-instead-flushing-display.patch | 58 ++++++++++++ package/westeros-sink/westeros-sink.mk | 5 +- package/westeros-soc/westeros-soc.mk | 4 +- ...dd-input-focus-control-to-compositor.patch | 65 +++++++++++++ package/westeros/westeros.mk | 7 +- 8 files changed, 230 insertions(+), 11 deletions(-) create mode 100644 package/westeros-sink/0002-NXClient-local-switch.patch create mode 100644 package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch create mode 100644 package/westeros/0001-Add-input-focus-control-to-compositor.patch diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index 9380bf69c72d..e7bdac54470a 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,9 +4,9 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 +WESTEROS_SIMPLEBUFFER_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 WESTEROS_SIMPLEBUFFER_SITE_METHOD = git -WESTEROS_SIMPLEBUFFER_SITE = git://github.com/Metrological/westeros +WESTEROS_SIMPLEBUFFER_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES WESTEROS_SIMPLEBUFFER_SUBDIR = simplebuffer/ WESTEROS_SIMPLEBUFFER_AUTORECONF = YES @@ -16,6 +16,7 @@ WESTEROS_SIMPLEBUFFER_DEPENDENCIES = wayland libglib2 define WESTEROS_SIMPLEBUFFER_RUN_AUTOCONF mkdir -p $(@D)/simplebuffer/cfg + mkdir -p $(@D)/simplebuffer/m4 endef WESTEROS_SIMPLEBUFFER_PRE_CONFIGURE_HOOKS += WESTEROS_SIMPLEBUFFER_RUN_AUTOCONF diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index b6a9bc00d3e5..93e9d14e6e76 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,9 +4,9 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 +WESTEROS_SIMPLESHELL_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 WESTEROS_SIMPLESHELL_SITE_METHOD = git -WESTEROS_SIMPLESHELL_SITE = git://github.com/Metrological/westeros +WESTEROS_SIMPLESHELL_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES WESTEROS_SIMPLESHELL_SUBDIR = simpleshell/ WESTEROS_SIMPLESHELL_AUTORECONF = YES @@ -16,6 +16,7 @@ WESTEROS_SIMPLESHELL_DEPENDENCIES = wayland libglib2 define WESTEROS_SIMPLESHELL_RUN_AUTOCONF mkdir -p $(@D)/simpleshell/cfg + mkdir -p $(@D)/simpleshell/m4 endef WESTEROS_SIMPLESHELL_PRE_CONFIGURE_HOOKS += WESTEROS_SIMPLESHELL_RUN_AUTOCONF diff --git a/package/westeros-sink/0002-NXClient-local-switch.patch b/package/westeros-sink/0002-NXClient-local-switch.patch new file mode 100644 index 000000000000..67f5d00fcb38 --- /dev/null +++ b/package/westeros-sink/0002-NXClient-local-switch.patch @@ -0,0 +1,92 @@ +diff --git a/brcm/Makefile.am b/brcm/Makefile.am +index 2bfc998..725a59d 100644 +--- a/brcm/Makefile.am ++++ b/brcm/Makefile.am +@@ -46,7 +46,13 @@ libwesteros_gl_la_CXXFLAGS= $(AM_CFLAGS) + libwesteros_gl_la_LDFLAGS= \ + $(AM_LDFLAGS) \ + -lwayland-egl \ +- -lnexus ++ ${NEXUS_LD_LIBRARIES} ++ ++if NXCLIENT_LOCAL ++libwesteros_gl_la_LDFLAGS += -lnxclient_local ++else ++libwesteros_gl_la_LDFLAGS += -lnxclient ++endif + + distcleancheck_listfiles = *-libtool + +diff --git a/brcm/configure.ac b/brcm/configure.ac +index f18567f..c9dea91 100644 +--- a/brcm/configure.ac ++++ b/brcm/configure.ac +@@ -44,6 +44,20 @@ AC_HEADER_STDBOOL + + IARM_CFLAGS=" " + ++NXCLIENT_LOCAL=" " ++AC_ARG_ENABLE([nxclient_local], ++ AS_HELP_STRING([--enable-nxclient_local],[enable local nxclient ]), ++ [ ++ case "${enableval}" in ++ yes) NXCLIENT_LOCAL=true ;; ++ no) NXCLIENT_LOCAL=false ;; ++ *) AC_MSG_ERROR([bad value ${enableval} for --enable-nxclient_local ]) ;; ++ esac ++ ], ++ [echo "local nxclient is enable"]) ++AM_CONDITIONAL([NXCLIENT_LOCAL], [test x$NXCLIENT_LOCAL = xtrue]) ++AC_SUBST(NXCLIENT_LOCAL) ++ + # Checks for library functions. + #Add the subdirectories to be considered for building. + SUBDIRS=" " +diff --git a/brcm/westeros-render-nexus/Makefile.am b/brcm/westeros-render-nexus/Makefile.am +index 6f8f762..31dc514 100644 +--- a/brcm/westeros-render-nexus/Makefile.am ++++ b/brcm/westeros-render-nexus/Makefile.am +@@ -30,12 +30,18 @@ lib_LTLIBRARIES = libwesteros_render_nexus.la + + libwesteros_render_nexus_la_SOURCES = westeros-render-nexus.cpp + libwesteros_render_nexus_la_includedir = $(includedir) +-libwesteros_render_nexus_la_LDFLAGS= -lnxclient -lwesteros_simplebuffer_server ++libwesteros_render_nexus_la_LDFLAGS= -lwesteros_simplebuffer_server + if HAVE_WAYLAND_EGL + AM_CXXFLAGS += -DWESTEROS_HAVE_WAYLAND_EGL + libwesteros_render_nexus_la_LDFLAGS += -lwayland-egl + endif + ++if NXCLIENT_LOCAL ++libwesteros_render_nexus_la_LDFLAGS += -lnxclient_local ++else ++libwesteros_render_nexus_la_LDFLAGS += -lnxclient ++endif ++ + distcleancheck_listfiles = *-libtool + + ## IPK Generation Support +diff --git a/brcm/westeros-render-nexus/configure.ac b/brcm/westeros-render-nexus/configure.ac +index a706f87..0d690f8 100644 +--- a/brcm/westeros-render-nexus/configure.ac ++++ b/brcm/westeros-render-nexus/configure.ac +@@ -45,6 +45,19 @@ AC_HEADER_STDBOOL + WAYLAND_EGL_DETECTED=" " + + IARM_CFLAGS=" " ++NXCLIENT_LOCAL=" " ++AC_ARG_ENABLE([nxclient_local], ++ AS_HELP_STRING([--enable-nxclient_local],[enable local nxclient ]), ++ [ ++ case "${enableval}" in ++ yes) NXCLIENT_LOCAL=true ;; ++ no) NXCLIENT_LOCAL=false ;; ++ *) AC_MSG_ERROR([bad value ${enableval} for --enable-nxclient_local ]) ;; ++ esac ++ ], ++ [echo "local nxclient is enable"]) ++AM_CONDITIONAL([NXCLIENT_LOCAL], [test x$NXCLIENT_LOCAL = xtrue]) ++AC_SUBST(NXCLIENT_LOCAL) + + # Checks for library functions. + #Add the subdirectories to be considered for building. diff --git a/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch b/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch new file mode 100644 index 000000000000..d5ec48aac19d --- /dev/null +++ b/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch @@ -0,0 +1,58 @@ +diff --git a/westeros-sink/westeros-sink.c b/westeros-sink/westeros-sink.c +index b5fa0cb..e7839c9 100644 +--- a/westeros-sink/westeros-sink.c ++++ b/westeros-sink/westeros-sink.c +@@ -106,7 +106,6 @@ static void shellSurfaceId(void *data, + wl_simple_shell_set_opacity( sink->shell, sink->surfaceId, op); + wl_simple_shell_get_status( sink->shell, sink->surfaceId ); + } +- wl_display_flush(sink->display); + } + + static void shellSurfaceCreated(void *data, +@@ -264,8 +263,6 @@ static void registryHandleGlobal(void *data, + wl_proxy_set_queue((struct wl_proxy*)sink->vpc, sink->queue); + } + gst_westeros_sink_soc_registryHandleGlobal( sink, registry, id, interface, version ); +- +- wl_display_flush(sink->display); + } + + static void registryHandleGlobalRemove(void *data, +@@ -525,7 +522,8 @@ gst_westeros_sink_init(GstWesterosSink *sink, GstWesterosSinkClass *gclass) + sink->surface= wl_compositor_create_surface(sink->compositor); + printf("gst_westeros_sink_init: surface=%p\n", (void*)sink->surface); + wl_proxy_set_queue((struct wl_proxy*)sink->surface, sink->queue); +- wl_display_flush( sink->display ); ++ ++ wl_display_dispatch_queue( sink->display, sink->queue ); + } + else + { +@@ -668,10 +666,13 @@ static void gst_westeros_sink_set_property(GObject *object, guint prop_id, const + wl_simple_shell_set_visible( sink->shell, sink->surfaceId, true); + + wl_simple_shell_get_status( sink->shell, sink->surfaceId); +- +- wl_display_flush( sink->display ); + } + } ++ ++ if ( sink->queue ) ++ { ++ wl_display_dispatch_queue( sink->display, sink->queue ); ++ } + } + + g_strfreev(parts); +@@ -767,7 +768,9 @@ static GstStateChangeReturn gst_westeros_sink_change_state(GstElement *element, + { + wl_vpc_surface_set_geometry( sink->vpcSurface, sink->windowX, sink->windowY, sink->windowWidth, sink->windowHeight ); + } +- wl_display_flush( sink->display ); ++ ++ wl_display_dispatch_queue( sink->display, sink->queue ); ++ + printf("westeros-sink: null_to_ready: done add vpcSurface listener\n"); + } + else diff --git a/package/westeros-sink/westeros-sink.mk b/package/westeros-sink/westeros-sink.mk index 140cc14f7db3..b9e9f9bde728 100644 --- a/package/westeros-sink/westeros-sink.mk +++ b/package/westeros-sink/westeros-sink.mk @@ -4,9 +4,9 @@ # ################################################################################ -WESTEROS_SINK_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 +WESTEROS_SINK_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 WESTEROS_SINK_SITE_METHOD = git -WESTEROS_SINK_SITE = git://github.com/Metrological/westeros +WESTEROS_SINK_SITE = git://github.com/rdkcmf/westeros WESTEROS_SINK_INSTALL_STAGING = YES WESTEROS_SINK_AUTORECONF = YES WESTEROS_SINK_AUTORECONF_OPTS = "-Icfg" @@ -41,6 +41,7 @@ endif define WESTEROS_SINK_RUN_AUTOCONF mkdir -p $(@D)/$(WESTEROS_SINK_SUBDIR)/cfg + mkdir -p $(@D)/$(WESTEROS_SINK_SUBDIR)/m4 endef WESTEROS_SINK_PRE_CONFIGURE_HOOKS += WESTEROS_SINK_RUN_AUTOCONF diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index 6cc6db63a36c..4d689f1e00f2 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,9 +4,9 @@ # ################################################################################ -WESTEROS_SOC_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 +WESTEROS_SOC_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 WESTEROS_SOC_SITE_METHOD = git -WESTEROS_SOC_SITE = git://github.com/Metrological/westeros +WESTEROS_SOC_SITE = git://github.com/rdkcmf/westeros WESTEROS_SOC_INSTALL_STAGING = YES WESTEROS_SOC_AUTORECONF = YES WESTEROS_SOC_AUTORECONF_OPTS = "-Icfg" diff --git a/package/westeros/0001-Add-input-focus-control-to-compositor.patch b/package/westeros/0001-Add-input-focus-control-to-compositor.patch new file mode 100644 index 000000000000..4c6f56afaf86 --- /dev/null +++ b/package/westeros/0001-Add-input-focus-control-to-compositor.patch @@ -0,0 +1,65 @@ +diff --git a/westeros-compositor.cpp b/westeros-compositor.cpp +index 0b9d0ac..70f7574 100644 +--- a/westeros-compositor.cpp ++++ b/westeros-compositor.cpp +@@ -2730,7 +2730,35 @@ exit: + return result; + } + ++void WstCompositorFocusClientById( WstCompositor *ctx, const int id){ ++ WstKeyboard *keyboard= ctx->seat->keyboard; + ++ if (keyboard != 0) { ++ for (std::vector::iterator it = ctx->surfaces.begin(); it != ctx->surfaces.end(); ++it) { ++ WstSurface *surface= (*it); ++ ++ if (id == surface->surfaceId) { ++ wstKeyboardSetFocus(keyboard, surface); ++ break; ++ } ++ } ++ } ++} ++ ++void WstCompositorFocusClientByName( WstCompositor *ctx, const char *name){ ++ WstKeyboard *keyboard= ctx->seat->keyboard; ++ ++ if (keyboard != 0) { ++ for (std::vector::iterator it = ctx->surfaces.begin(); it != ctx->surfaces.end(); ++it) { ++ WstSurface *surface= (*it); ++ ++ if (::strcmp(name, surface->name) == 0) { ++ wstKeyboardSetFocus(keyboard, surface); ++ break; ++ } ++ } ++ } ++} + + /* + * ----------------- Internal methods -------------------------------------------------------------- +diff --git a/westeros-compositor.h b/westeros-compositor.h +index bdeb66e..9a7490b 100644 +--- a/westeros-compositor.h ++++ b/westeros-compositor.h +@@ -605,5 +605,20 @@ void WstCompositorTouchEvent( WstCompositor *ctx, WstTouchSet *touchSet ); + */ + bool WstCompositorLaunchClient( WstCompositor *ctx, const char *cmd ); + ++/** ++ * WstCompositorFocusClientById ++ * ++ * Manually change the keyboard input focus to a client using it's id ++ */ ++void WstCompositorFocusClientById( WstCompositor *ctx, const int id); ++ ++/** ++ * WstCompositorFocusClientByName ++ * ++ * Manually change the keyboard input focus to a client using it's name. The name uniqueness is the responsibility of ++ * the client. The first hit will be returned. ++ */ ++void WstCompositorFocusClientByName( WstCompositor *ctx, const char *name); ++ + #endif + diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index 9898814715f8..86d3b43c278c 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,9 +4,9 @@ # ################################################################################ -WESTEROS_VERSION = 8ec4db488273a81720934bebe0ab27ab511cc249 +WESTEROS_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 WESTEROS_SITE_METHOD = git -WESTEROS_SITE = git://github.com/Metrological/westeros +WESTEROS_SITE = git://github.com/rdkcmf/westeros WESTEROS_INSTALL_STAGING = YES WESTEROS_AUTORECONF = YES WESTEROS_AUTORECONF_OPTS = "-Icfg" @@ -19,7 +19,8 @@ WESTEROS_CONF_OPTS = \ --enable-rendergl=yes \ --enable-sbprotocol=yes \ --enable-xdgv5=yes\ - --enable-essos=no + --enable-essos=no \ + --enable-app ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) WESTEROS_CONF_ENV += CXXFLAGS="$(TARGET_CXXFLAGS) -DWESTEROS_PLATFORM_RPI -DWESTEROS_INVERTED_Y -DBUILD_WAYLAND -I${STAGING_DIR}/usr/include/interface/vmcs_host/linux" From 16ad40e01b3256c237d5ab5738b4ee6ea18492df Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Mon, 26 Nov 2018 15:28:30 +0530 Subject: [PATCH 546/614] Wayland support added for brcmEGL --- .../rpi-userland/0007-brcmEGL-wayland-support.patch | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 package/rpi-userland/0007-brcmEGL-wayland-support.patch diff --git a/package/rpi-userland/0007-brcmEGL-wayland-support.patch b/package/rpi-userland/0007-brcmEGL-wayland-support.patch new file mode 100644 index 000000000000..6878c0399cca --- /dev/null +++ b/package/rpi-userland/0007-brcmEGL-wayland-support.patch @@ -0,0 +1,13 @@ +diff --git a/interface/khronos/CMakeLists.txt b/interface/khronos/CMakeLists.txt +index 9ad615b..03a8d20 100644 +--- a/interface/khronos/CMakeLists.txt ++++ b/interface/khronos/CMakeLists.txt +@@ -87,7 +87,7 @@ add_library(brcmGLESv2 ${SHARED} ${GLES_SOURCE}) + add_library(brcmOpenVG ${SHARED} ${VG_SOURCE}) + add_library(brcmWFC ${SHARED} ${WFC_SOURCE}) + +-target_link_libraries(brcmEGL khrn_client vchiq_arm vcos bcm_host ${VCSM_LIBS} -lm) ++target_link_libraries(brcmEGL khrn_client vchiq_arm vcos bcm_host ${VCSM_LIBS} -lm ${WAYLAND_SERVER_LIBRARIES} ${WAYLAND_CLIENT_LIBRARIES}) + target_link_libraries(brcmGLESv2 brcmEGL khrn_client vcos) + target_link_libraries(brcmWFC brcmEGL) + target_link_libraries(brcmOpenVG brcmEGL) From a7d987f7e32d53689e4dab831cba09dc52994f18 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Tue, 27 Nov 2018 10:52:59 +0100 Subject: [PATCH 547/614] [NAGRA] Bump UMA --- package/uma-sdk/uma-sdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/uma-sdk/uma-sdk.mk b/package/uma-sdk/uma-sdk.mk index dbe07a78e61c..31c885ba888e 100644 --- a/package/uma-sdk/uma-sdk.mk +++ b/package/uma-sdk/uma-sdk.mk @@ -3,7 +3,7 @@ # uma-sdk # ################################################################################ -UMA_SDK_VERSION = 5e70f06a5b627deab51ca24580802dbe8e215f25 +UMA_SDK_VERSION = 48f894f03ef963bc427d560a4625818dc67ac99e UMA_SDK_SITE = git@github.com:Metrological/SDK_UMA.git UMA_SDK_SITE_METHOD = git UMA_SDK_INSTALL_STAGING = YES From 95f628c1d1133043e43cf9ab0210af22f178ff49 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Wed, 28 Nov 2018 08:53:05 +0100 Subject: [PATCH 548/614] [WPEFRAMEWORK] Add an SI parsing flag to the broadcast library. --- package/wpe/wpeframework/Config.in | 11 ++++++++++- package/wpe/wpeframework/wpeframework.mk | 3 +++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index 15e78fc077e8..e073e82912b2 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -70,11 +70,20 @@ config BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY help Allows provisioning of modules from the cloud. - config BR2_PACKAGE_WPEFRAMEWORK_BROADCAST +menuconfig BR2_PACKAGE_WPEFRAMEWORK_BROADCAST bool "Broadcast" default n help Abstraction on QAM tuner and PSI/SI parser functionality. + +if BR2_PACKAGE_WPEFRAMEWORK_BROADCAST +config BR2_PACKAGE_WPEFRAMEWORK_BROADCAST_SI_PARSING + bool "SI Parsing" + default n + help + Enable functionality to automatically parse SI information on the + tuned streams. +endif endmenu diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index ddf63e72d82e..7ea5f8a64334 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -53,6 +53,9 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BROADCAST),y) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_BROADCAST=ON +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BROADCAST_SI_PARSING),y) +WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_BROADCAST_SI_PARSING=ON +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDM),y) From a63cce74626a501c51cb22755eac2240622c44a8 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Wed, 28 Nov 2018 21:21:37 -0800 Subject: [PATCH 549/614] [bcm7429] update config --- configs/bcm7429_wpe_ml_defconfig | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/configs/bcm7429_wpe_ml_defconfig b/configs/bcm7429_wpe_ml_defconfig index 6e3f410c7517..8a5166aa79ee 100644 --- a/configs/bcm7429_wpe_ml_defconfig +++ b/configs/bcm7429_wpe_ml_defconfig @@ -28,10 +28,8 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y -BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ID3DEMUX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MATROSKA=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_SOUPHTTPSRC=y @@ -44,17 +42,26 @@ BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_SMOOTHSTREAMING=y BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y -BR2_PACKAGE_NETFLIX=y -BR2_PACKAGE_NETFLIX_LIB=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y BR2_PACKAGE_BCM_REFSW_17_4=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7429=y +# BR2_PACKAGE_BCM_VP9_DECODER_SUPPORT is not set # BR2_PACKAGE_EUDEV_ENABLE_HWDB is not set +BR2_PACKAGE_LIBMNG=y +BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONPROXY=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="350" BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y @@ -62,17 +69,19 @@ BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="file:///www/index.html" -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:30m,networkprocess:50m,webprocess:170m,rpcprocess:50m" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:170m,rpcprocess:80m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE="90m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE=y +BR2_PACKAGE_WPEFRAMEWORK_UX=y +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING="2" BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY=y BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER=y BR2_PACKAGE_WPEFRAMEWORK_PROVISIONING=y BR2_PACKAGE_WPEWEBKIT=y # BR2_PACKAGE_WPEWEBKIT_USE_GSTREAMER_WEBKIT_HTTP_SRC is not set -BR2_PACKAGE_ORC=y +BR2_PACKAGE_WPEWEBKIT_ENABLE_NATIVE_AUDIO=y BR2_PACKAGE_ICU_USE_ICUDATA=y BR2_PACKAGE_SHARED_MIME_INFO=y BR2_PACKAGE_DROPBEAR=y From 6c20e25e7c1d9a884e9df4a9a29087abc02ca111 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 29 Nov 2018 13:25:29 +0000 Subject: [PATCH 550/614] [gnutls/nettle] select proper version --- package/gnutls/gnutls.mk | 4 ++-- package/nettle/nettle.mk | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/package/gnutls/gnutls.mk b/package/gnutls/gnutls.mk index 868da1d96473..09ab339b0349 100644 --- a/package/gnutls/gnutls.mk +++ b/package/gnutls/gnutls.mk @@ -6,7 +6,7 @@ GNUTLS_VERSION_MAJOR = 3.5 GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).10 -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)),) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) GNUTLS_VERSION_MAJOR = 3.3 GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).22 endif @@ -34,7 +34,7 @@ GNUTLS_CONF_ENV = gl_cv_socket_ipv6=yes \ GNUTLS_INSTALL_STAGING = YES -ifeq ($(BR2_PACKAGE_PLAYREADY),y) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) GNUTLS_CONF_OPTS += --disable-openssl-compatibility else GNUTLS_CONF_OPTS += --enable-openssl-compatibility diff --git a/package/nettle/nettle.mk b/package/nettle/nettle.mk index 8f2f4ddb19d0..74362231c1e8 100644 --- a/package/nettle/nettle.mk +++ b/package/nettle/nettle.mk @@ -5,13 +5,13 @@ ################################################################################ NETTLE_VERSION = 3.3 -ifeq ($(BR2_PACKAGE_PLAYREADY),y) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) NETTLE_VERSION = 2.7.1 endif NETTLE_SITE = http://www.lysator.liu.se/~nisse/archive NETTLE_DEPENDENCIES = gmp NETTLE_INSTALL_STAGING = YES -ifeq ($(BR2_PACKAGE_PLAYREADY),y) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) NETTLE_LICENSE = LGPLv2+ NETTLE_LICENSE_FILES = COPYING.LIB else @@ -37,7 +37,7 @@ define NETTLE_DITCH_DEBUGGING_CFLAGS $(SED) '/CFLAGS/ s/ -ggdb3//' $(@D)/configure endef -ifeq ($(BR2_PACKAGE_PLAYREADY),y) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) NETTLE_POST_EXTRACT_HOOKS += NETTLE_DITCH_DEBUGGING_CFLAGS endif From a722a9ef7a6900b3040810a464161102a46a5a0d Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 29 Nov 2018 15:43:21 +0000 Subject: [PATCH 551/614] [gnutls] remove unistring dependency --- package/gnutls/Config.in | 2 +- package/gnutls/gnutls.mk | 13 ++++++++----- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/package/gnutls/Config.in b/package/gnutls/Config.in index cfb7cb3f3b5a..d0fe225c1cbe 100644 --- a/package/gnutls/Config.in +++ b/package/gnutls/Config.in @@ -1,7 +1,7 @@ config BR2_PACKAGE_GNUTLS bool "gnutls" select BR2_PACKAGE_LIBTASN1 - select BR2_PACKAGE_LIBUNISTRING + select BR2_PACKAGE_LIBUNISTRING if !(BR2_PACKAGE_PLAYREADY||BR2_PACKAGE_VIP_SDK||BR2_PACKAGE_BCM_REFSW) select BR2_PACKAGE_NETTLE select BR2_PACKAGE_PCRE depends on BR2_USE_WCHAR diff --git a/package/gnutls/gnutls.mk b/package/gnutls/gnutls.mk index 09ab339b0349..e5b75ff0fb26 100644 --- a/package/gnutls/gnutls.mk +++ b/package/gnutls/gnutls.mk @@ -4,17 +4,19 @@ # ################################################################################ -GNUTLS_VERSION_MAJOR = 3.5 -GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).10 ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) GNUTLS_VERSION_MAJOR = 3.3 GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).22 +GNUTLS_DEPENDENCIES = host-pkgconf libtasn1 nettle pcre +else +GNUTLS_VERSION_MAJOR = 3.5 +GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).10 +GNUTLS_DEPENDENCIES = host-pkgconf libunistring libtasn1 nettle pcre endif GNUTLS_SOURCE = gnutls-$(GNUTLS_VERSION).tar.xz GNUTLS_SITE = ftp://ftp.gnutls.org/gcrypt/gnutls/v$(GNUTLS_VERSION_MAJOR) GNUTLS_LICENSE = LGPLv2.1+ (core library), GPLv3+ (gnutls-openssl library) GNUTLS_LICENSE_FILES = doc/COPYING doc/COPYING.LESSER -GNUTLS_DEPENDENCIES = host-pkgconf libunistring libtasn1 nettle pcre GNUTLS_CONF_OPTS = \ --disable-doc \ --disable-guile \ @@ -22,7 +24,6 @@ GNUTLS_CONF_OPTS = \ --disable-rpath \ --enable-local-libopts \ --with-libnettle-prefix=$(STAGING_DIR)/usr \ - --with-libunistring-prefix=$(STAGING_DIR)/usr \ --with-librt-prefix=$(STAGING_DIR) \ --without-tpm \ $(if $(BR2_PACKAGE_GNUTLS_TOOLS),--enable-tools,--disable-tools) @@ -37,7 +38,9 @@ GNUTLS_INSTALL_STAGING = YES ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) GNUTLS_CONF_OPTS += --disable-openssl-compatibility else -GNUTLS_CONF_OPTS += --enable-openssl-compatibility +GNUTLS_CONF_OPTS += \ + --enable-openssl-compatibility \ + --with-libunistring-prefix=$(STAGING_DIR)/usr endif # libpthread and libz autodetection poison the linkpath From e5174fab225abd2d7c27a1fccb99b10d20d05bd4 Mon Sep 17 00:00:00 2001 From: albertd Date: Thu, 29 Nov 2018 18:44:50 +0000 Subject: [PATCH 552/614] [nettle/gnutls] check for gst1-bcm as well --- package/gnutls/Config.in | 2 +- package/gnutls/gnutls.mk | 4 ++-- package/nettle/nettle.mk | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/package/gnutls/Config.in b/package/gnutls/Config.in index d0fe225c1cbe..6e415bf06e8b 100644 --- a/package/gnutls/Config.in +++ b/package/gnutls/Config.in @@ -1,7 +1,7 @@ config BR2_PACKAGE_GNUTLS bool "gnutls" select BR2_PACKAGE_LIBTASN1 - select BR2_PACKAGE_LIBUNISTRING if !(BR2_PACKAGE_PLAYREADY||BR2_PACKAGE_VIP_SDK||BR2_PACKAGE_BCM_REFSW) + select BR2_PACKAGE_LIBUNISTRING if !(BR2_PACKAGE_PLAYREADY||BR2_PACKAGE_VIP_SDK||BR2_PACKAGE_BCM_REFSW||BR2_PACKAGE_GST1_BCM) select BR2_PACKAGE_NETTLE select BR2_PACKAGE_PCRE depends on BR2_USE_WCHAR diff --git a/package/gnutls/gnutls.mk b/package/gnutls/gnutls.mk index e5b75ff0fb26..04e6522475a9 100644 --- a/package/gnutls/gnutls.mk +++ b/package/gnutls/gnutls.mk @@ -4,7 +4,7 @@ # ################################################################################ -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) GNUTLS_VERSION_MAJOR = 3.3 GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).22 GNUTLS_DEPENDENCIES = host-pkgconf libtasn1 nettle pcre @@ -35,7 +35,7 @@ GNUTLS_CONF_ENV = gl_cv_socket_ipv6=yes \ GNUTLS_INSTALL_STAGING = YES -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) GNUTLS_CONF_OPTS += --disable-openssl-compatibility else GNUTLS_CONF_OPTS += \ diff --git a/package/nettle/nettle.mk b/package/nettle/nettle.mk index 74362231c1e8..af10d31c648c 100644 --- a/package/nettle/nettle.mk +++ b/package/nettle/nettle.mk @@ -5,13 +5,13 @@ ################################################################################ NETTLE_VERSION = 3.3 -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) NETTLE_VERSION = 2.7.1 endif NETTLE_SITE = http://www.lysator.liu.se/~nisse/archive NETTLE_DEPENDENCIES = gmp NETTLE_INSTALL_STAGING = YES -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) +ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) NETTLE_LICENSE = LGPLv2+ NETTLE_LICENSE_FILES = COPYING.LIB else From 290268b4fed52adf321274c1cdc71eac403f7678 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 30 Nov 2018 00:08:18 +0000 Subject: [PATCH 553/614] [gmp] support for lgpl v2 version --- ...0000-avoid-h-asm-constraint-for-MIPS.patch | 57 ++++++++++++++ .../0001-gmp_fix_for_automake-1.12.patch | 56 +++++++++++++ ...-mpn_add_nc-if-HAVE_NATIVE_mpn_sub_n.patch | 78 +++++++++++++++++++ .../0003-Use-__gnu_inline__-attribute.patch | 36 +++++++++ package/gmp/gmp.hash | 1 + package/gmp/gmp.mk | 12 ++- 6 files changed, 236 insertions(+), 4 deletions(-) create mode 100644 package/gmp/4.2.1/0000-avoid-h-asm-constraint-for-MIPS.patch create mode 100644 package/gmp/4.2.1/0001-gmp_fix_for_automake-1.12.patch create mode 100644 package/gmp/4.2.1/0002-prevent-calls-to-mpn_add_nc-if-HAVE_NATIVE_mpn_sub_n.patch create mode 100644 package/gmp/4.2.1/0003-Use-__gnu_inline__-attribute.patch diff --git a/package/gmp/4.2.1/0000-avoid-h-asm-constraint-for-MIPS.patch b/package/gmp/4.2.1/0000-avoid-h-asm-constraint-for-MIPS.patch new file mode 100644 index 000000000000..6da0be9ca0a6 --- /dev/null +++ b/package/gmp/4.2.1/0000-avoid-h-asm-constraint-for-MIPS.patch @@ -0,0 +1,57 @@ +From d50686de0406a88ef9112f5252103f799982e84a Mon Sep 17 00:00:00 2001 +From: Andre McCurdy +Date: Thu, 4 Feb 2016 14:00:00 -0800 +Subject: [PATCH] avoid h asm constraint for MIPS + +The h asm constrain (to extract the high part of a multiplication +result) has not been recognised since gcc 4.4: + + https://gcc.gnu.org/gcc-4.4/changes.html + +Drop the MIPS umul_ppmm() implementations which rely on "=h" and fall +back to the older implementations (which use explicit mfhi and mflo +instructions to move the high and low parts of the multiplication +result into their destinations). + +Upstream-Status: Inappropriate [upstream has a different solution] + +Signed-off-by: Andre McCurdy +--- + longlong.h | 10 ---------- + 1 file changed, 10 deletions(-) + +diff --git a/longlong.h b/longlong.h +index b53fbee..0193abb 100644 +--- a/longlong.h ++++ b/longlong.h +@@ -1011,27 +1011,17 @@ extern UWtype __MPN(udiv_qrnnd) _PROTO ((UWtype *, UWtype, UWtype, UWtype)); + #endif /* __m88000__ */ + + #if defined (__mips) && W_TYPE_SIZE == 32 +-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 +-#define umul_ppmm(w1, w0, u, v) \ +- __asm__ ("multu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) +-#else + #define umul_ppmm(w1, w0, u, v) \ + __asm__ ("multu %2,%3\n\tmflo %0\n\tmfhi %1" \ + : "=d" (w0), "=d" (w1) : "d" (u), "d" (v)) +-#endif + #define UMUL_TIME 10 + #define UDIV_TIME 100 + #endif /* __mips */ + + #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64 +-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 +-#define umul_ppmm(w1, w0, u, v) \ +- __asm__ ("dmultu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) +-#else + #define umul_ppmm(w1, w0, u, v) \ + __asm__ ("dmultu %2,%3\n\tmflo %0\n\tmfhi %1" \ + : "=d" (w0), "=d" (w1) : "d" (u), "d" (v)) +-#endif + #define UMUL_TIME 20 + #define UDIV_TIME 140 + #endif /* __mips */ +-- +1.9.1 + diff --git a/package/gmp/4.2.1/0001-gmp_fix_for_automake-1.12.patch b/package/gmp/4.2.1/0001-gmp_fix_for_automake-1.12.patch new file mode 100644 index 000000000000..26fd8ef8bcf7 --- /dev/null +++ b/package/gmp/4.2.1/0001-gmp_fix_for_automake-1.12.patch @@ -0,0 +1,56 @@ +automake 1.12 has depricated automatic de-ANSI-fication support + +this patch avoids these kinds of errors: + +| configure.in:2240: error: automatic de-ANSI-fication support has been removed +| Makefile.am:28: error: automatic de-ANSI-fication support has been removed + +Signed-off-by: Nitin A Kamble +2012/05/02 + + +This patch was removed in f181c6ce8b3 when gmp 4.2.1 was mistakenly +dropped. + +Upstream is not interested in patches for ancient versions. + +Upstream-Status: Inappropriate +Signed-off-by: Jussi Kukkonen + + +Index: gmp-4.2.1/configure.in +=================================================================== +--- gmp-4.2.1.orig/configure.in ++++ gmp-4.2.1/configure.in +@@ -67,7 +67,7 @@ dnl + dnl Note that there's a copy of these options in the top-level Makefile.am, + dnl so update there too if changing anything. + dnl +-AM_INIT_AUTOMAKE([1.8 gnu no-dependencies $(top_builddir)/ansi2knr]) ++AM_INIT_AUTOMAKE([1.8 gnu no-dependencies]) + AM_CONFIG_HEADER(config.h:config.in) + AM_MAINTAINER_MODE + +@@ -2022,9 +2022,6 @@ fi + echo " MPN_PATH=\"$path\"" + + +-# Automake ansi2knr support. +-AM_C_PROTOTYPES +- + GMP_PROG_AR + GMP_PROG_NM + +Index: gmp-4.2.1/Makefile.am +=================================================================== +--- gmp-4.2.1.orig/Makefile.am ++++ gmp-4.2.1/Makefile.am +@@ -27,7 +27,7 @@ + # Makefiles in subdirectories, but here we must omit it so automake gives + # the actual ansi2knr build rule, not "cd $(top_builddir) && make ansi2knr". + # +-AUTOMAKE_OPTIONS = 1.8 gnu no-dependencies ansi2knr ++AUTOMAKE_OPTIONS = 1.8 gnu no-dependencies + + + # Libtool -version-info for libgmp.la and libmp.la. See "Versioning" in the diff --git a/package/gmp/4.2.1/0002-prevent-calls-to-mpn_add_nc-if-HAVE_NATIVE_mpn_sub_n.patch b/package/gmp/4.2.1/0002-prevent-calls-to-mpn_add_nc-if-HAVE_NATIVE_mpn_sub_n.patch new file mode 100644 index 000000000000..7b879c32da3a --- /dev/null +++ b/package/gmp/4.2.1/0002-prevent-calls-to-mpn_add_nc-if-HAVE_NATIVE_mpn_sub_n.patch @@ -0,0 +1,78 @@ +From d4f3542fabe0797cf2d60afd957585862bd9a29b Mon Sep 17 00:00:00 2001 +From: Andre McCurdy +Date: Fri, 25 Aug 2017 16:16:06 -0700 +Subject: [PATCH] prevent calls to mpn_add_nc() if HAVE_NATIVE_mpn_sub_nc is false + +When building for aarch64 (ie relying only on generic C code rather +than asm) libgmp.so contains undefined references to __gmpn_add_nc +and __gmpn_sub_nc which causes attempts to link with -lgmp to fail: + + | .../usr/lib/libgmp.so: undefined reference to `__gmpn_sub_nc' + | .../usr/lib/libgmp.so: undefined reference to `__gmpn_add_nc' + +Solution based on a historical patch posted to the gmp mailing list: + + https://gmplib.org/list-archives/gmp-discuss/2006-May/002344.html + +Upstream-Status: Inappropriate [Fixed in current versions] + +Signed-off-by: Andre McCurdy +--- + mpn/generic/addsub_n.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/mpn/generic/addsub_n.c b/mpn/generic/addsub_n.c +index 27b2c08..0ff7ca0 100644 +--- a/mpn/generic/addsub_n.c ++++ b/mpn/generic/addsub_n.c +@@ -58,13 +58,13 @@ mpn_addsub_n (mp_ptr r1p, mp_ptr r2p, mp_srcptr s1p, mp_srcptr s2p, mp_size_t n) + for (off = 0; off < n; off += PART_SIZE) + { + this_n = MIN (n - off, PART_SIZE); +-#if HAVE_NATIVE_mpn_add_nc || !HAVE_NATIVE_mpn_add_n ++#if HAVE_NATIVE_mpn_add_nc + acyo = mpn_add_nc (r1p + off, s1p + off, s2p + off, this_n, acyo); + #else + acyn = mpn_add_n (r1p + off, s1p + off, s2p + off, this_n); + acyo = acyn + mpn_add_1 (r1p + off, r1p + off, this_n, acyo); + #endif +-#if HAVE_NATIVE_mpn_sub_nc || !HAVE_NATIVE_mpn_sub_n ++#if HAVE_NATIVE_mpn_sub_nc + scyo = mpn_sub_nc (r2p + off, s1p + off, s2p + off, this_n, scyo); + #else + scyn = mpn_sub_n (r2p + off, s1p + off, s2p + off, this_n); +@@ -81,13 +81,13 @@ mpn_addsub_n (mp_ptr r1p, mp_ptr r2p, mp_srcptr s1p, mp_srcptr s2p, mp_size_t n) + for (off = 0; off < n; off += PART_SIZE) + { + this_n = MIN (n - off, PART_SIZE); +-#if HAVE_NATIVE_mpn_sub_nc || !HAVE_NATIVE_mpn_sub_n ++#if HAVE_NATIVE_mpn_sub_nc + scyo = mpn_sub_nc (r2p + off, s1p + off, s2p + off, this_n, scyo); + #else + scyn = mpn_sub_n (r2p + off, s1p + off, s2p + off, this_n); + scyo = scyn + mpn_sub_1 (r2p + off, r2p + off, this_n, scyo); + #endif +-#if HAVE_NATIVE_mpn_add_nc || !HAVE_NATIVE_mpn_add_n ++#if HAVE_NATIVE_mpn_add_nc + acyo = mpn_add_nc (r1p + off, s1p + off, s2p + off, this_n, acyo); + #else + acyn = mpn_add_n (r1p + off, s1p + off, s2p + off, this_n); +@@ -105,13 +105,13 @@ mpn_addsub_n (mp_ptr r1p, mp_ptr r2p, mp_srcptr s1p, mp_srcptr s2p, mp_size_t n) + for (off = 0; off < n; off += PART_SIZE) + { + this_n = MIN (n - off, PART_SIZE); +-#if HAVE_NATIVE_mpn_add_nc || !HAVE_NATIVE_mpn_add_n ++#if HAVE_NATIVE_mpn_add_nc + acyo = mpn_add_nc (tp, s1p + off, s2p + off, this_n, acyo); + #else + acyn = mpn_add_n (tp, s1p + off, s2p + off, this_n); + acyo = acyn + mpn_add_1 (tp, tp, this_n, acyo); + #endif +-#if HAVE_NATIVE_mpn_sub_nc || !HAVE_NATIVE_mpn_sub_n ++#if HAVE_NATIVE_mpn_sub_nc + scyo = mpn_sub_nc (r2p + off, s1p + off, s2p + off, this_n, scyo); + #else + scyn = mpn_sub_n (r2p + off, s1p + off, s2p + off, this_n); +-- +1.9.1 + diff --git a/package/gmp/4.2.1/0003-Use-__gnu_inline__-attribute.patch b/package/gmp/4.2.1/0003-Use-__gnu_inline__-attribute.patch new file mode 100644 index 000000000000..627d71aba9a2 --- /dev/null +++ b/package/gmp/4.2.1/0003-Use-__gnu_inline__-attribute.patch @@ -0,0 +1,36 @@ +From 3cb33502bafd04b8ad4ca3454fab16d5ff313297 Mon Sep 17 00:00:00 2001 +From: Jussi Kukkonen +Date: Tue, 22 Sep 2015 13:16:23 +0300 +Subject: [PATCH] Use __gnu_inline__ attribute + +gcc5 uses C11 inline rules. This means the old "extern inline" +semantics are not available without a special attribute. + +See: https://gcc.gnu.org/gcc-5/porting_to.html + +Upstream-Status: Inappropriate [Fixed in current versions] +Signed-off-by: Jussi Kukkonen +--- + gmp-h.in | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/gmp-h.in b/gmp-h.in +index eed6fe4..361dd1d 100644 +--- a/gmp-h.in ++++ b/gmp-h.in +@@ -419,8 +419,11 @@ typedef __mpq_struct *mpq_ptr; + /* gcc has __inline__ in all modes, including strict ansi. Give a prototype + for an inline too, so as to correctly specify "dllimport" on windows, in + case the function is called rather than inlined. */ ++ ++/* Use __gnu_inline__ attribute: later gcc uses different "extern inline" ++ behaviour */ + #ifdef __GNUC__ +-#define __GMP_EXTERN_INLINE extern __inline__ ++#define __GMP_EXTERN_INLINE extern __inline__ __attribute__ ((__gnu_inline__)) + #define __GMP_INLINE_PROTOTYPES 1 + #endif + +-- +2.1.4 + diff --git a/package/gmp/gmp.hash b/package/gmp/gmp.hash index f4793cd93c09..0b048e896969 100644 --- a/package/gmp/gmp.hash +++ b/package/gmp/gmp.hash @@ -1,2 +1,3 @@ # Locally calculated after checking pgp signature +sha256 d07ffcb37eecec35c5ec72516d10b35fdf6e6fef1fcf1dcd37e30b8cbf8bf941 gmp-4.2.1.tar.bz2 sha256 87b565e89a9a684fe4ebeeddb8399dce2599f9c9049854ca8c0dfbdea0e21912 gmp-6.1.2.tar.xz diff --git a/package/gmp/gmp.mk b/package/gmp/gmp.mk index 33b5d542b48e..32e05cc1ba81 100644 --- a/package/gmp/gmp.mk +++ b/package/gmp/gmp.mk @@ -4,12 +4,16 @@ # ################################################################################ -GMP_VERSION = 6.1.2 +GMP_VERSION = 4.2.1 +HOST_GMP_VERSION = 6.1.2 GMP_SITE = $(BR2_GNU_MIRROR)/gmp -GMP_SOURCE = gmp-$(GMP_VERSION).tar.xz +GMP_SOURCE = gmp-$(GMP_VERSION).tar.bz2 +HOST_GMP_SOURCE = gmp-$(HOST_GMP_VERSION).tar.xz GMP_INSTALL_STAGING = YES -GMP_LICENSE = LGPLv3+ or GPLv2+ -GMP_LICENSE_FILES = COPYING.LESSERv3 COPYINGv2 +GMP_LICENSE = LGPLv2.1 or GPLv2 +GMP_LICENSE_FILES = COPYING.LIB COPYING +HOST_GMP_LICENSE = LGPLv3+ or GPLv2+ +HOST_GMP_LICENSE_FILES = COPYING.LESSERv3 COPYINGv2 GMP_DEPENDENCIES = host-m4 HOST_GMP_DEPENDENCIES = host-m4 From a99668074cd81f990f31869f35ffff412cb2814a Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 30 Nov 2018 00:09:06 +0000 Subject: [PATCH 554/614] [mpc] support for lgpl v2 version --- package/mpc/mpc.hash | 1 + package/mpc/mpc.mk | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/package/mpc/mpc.hash b/package/mpc/mpc.hash index 98f1447a0d28..c13bd85cdbbb 100644 --- a/package/mpc/mpc.hash +++ b/package/mpc/mpc.hash @@ -1,2 +1,3 @@ # From http://www.multiprecision.org/index.php?prog=mpc&page=download +sha1 339550cedfb013b68749cd47250cd26163b9edd4 mpc-0.8.2.tar.gz sha1 b8be66396c726fdc36ebb0f692ed8a8cca3bcc66 mpc-1.0.3.tar.gz diff --git a/package/mpc/mpc.mk b/package/mpc/mpc.mk index 579e2ccc1012..5b94f7eb3f7b 100644 --- a/package/mpc/mpc.mk +++ b/package/mpc/mpc.mk @@ -4,7 +4,8 @@ # ################################################################################ -MPC_VERSION = 1.0.3 +MPC_VERSION = 0.8.2 +HOST_MPC_VERSION = 1.0.3 MPC_SITE = $(BR2_GNU_MIRROR)/mpc MPC_LICENSE = LGPLv3+ MPC_LICENSE_FILES = COPYING.LESSER From ccaf0a9b7214ed82513a3b26986000996f233b65 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 30 Nov 2018 00:09:24 +0000 Subject: [PATCH 555/614] [mpfr] support for lgpl v2 version --- ...001-Fix-obsolete-ARC-asm-constraints.patch | 37 +++++++++++++++++++ package/mpfr/mpfr.hash | 1 + package/mpfr/mpfr.mk | 4 +- 3 files changed, 41 insertions(+), 1 deletion(-) create mode 100644 package/mpfr/3.1.5/0001-Fix-obsolete-ARC-asm-constraints.patch diff --git a/package/mpfr/3.1.5/0001-Fix-obsolete-ARC-asm-constraints.patch b/package/mpfr/3.1.5/0001-Fix-obsolete-ARC-asm-constraints.patch new file mode 100644 index 000000000000..12590cfd3045 --- /dev/null +++ b/package/mpfr/3.1.5/0001-Fix-obsolete-ARC-asm-constraints.patch @@ -0,0 +1,37 @@ +mpfr-longlong.h: Fix obsolete ARC asm constraints + +This patch replaces obsolete ARC "J" asm constraint with +up-to-date "Cal" constraint. +The patch should be applied to upstream "mpfr" library and +after that it should be removed from buildroot as soon as +mpfr version with current fix will come up. + +Signed-off-by: Vlad Zakharov +Signed-off-by: Claudiu Zissulescu +--- +Index: /src/mpfr-longlong.h +=================================================================== +--- /src/mpfr-longlong.h (revision 10963) ++++ /src/mpfr-longlong.h (working copy) +@@ -416,17 +416,17 @@ + : "=r" (sh), \ + "=&r" (sl) \ + : "r" ((USItype) (ah)), \ +- "rIJ" ((USItype) (bh)), \ ++ "rICal" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ +- "rIJ" ((USItype) (bl))) ++ "rICal" ((USItype) (bl))) + #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub.f\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ + : "=r" (sh), \ + "=&r" (sl) \ + : "r" ((USItype) (ah)), \ +- "rIJ" ((USItype) (bh)), \ ++ "rICal" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ +- "rIJ" ((USItype) (bl))) ++ "rICal" ((USItype) (bl))) + #endif + + #if defined (__arm__) && (defined (__thumb2__) || !defined (__thumb__)) \ diff --git a/package/mpfr/mpfr.hash b/package/mpfr/mpfr.hash index d2c32f2af5c4..03435aa2f89a 100644 --- a/package/mpfr/mpfr.hash +++ b/package/mpfr/mpfr.hash @@ -1,2 +1,3 @@ # Locally calculated after checking pgp signature +sha256 d7271bbfbc9ddf387d3919df8318cd7192c67b232919bfa1cb3202d07843da1b mpfr-2.4.2.tar.xz sha256 015fde82b3979fbe5f83501986d328331ba8ddf008c1ff3da3c238f49ca062bc mpfr-3.1.5.tar.xz diff --git a/package/mpfr/mpfr.mk b/package/mpfr/mpfr.mk index bb78ccc81a87..1527d392df49 100644 --- a/package/mpfr/mpfr.mk +++ b/package/mpfr/mpfr.mk @@ -4,9 +4,11 @@ # ################################################################################ -MPFR_VERSION = 3.1.5 +MPFR_VERSION = 2.4.2 +HOST_MPFR_VERSION = 3.1.5 MPFR_SITE = http://www.mpfr.org/mpfr-$(MPFR_VERSION) MPFR_SOURCE = mpfr-$(MPFR_VERSION).tar.xz +HOST_MPFR_SOURCE = mpfr-$(HOST_MPFR_VERSION).tar.xz MPFR_LICENSE = LGPLv3+ MPFR_LICENSE_FILES = COPYING.LESSER MPFR_INSTALL_STAGING = YES From a38e2f64418ec093746d7e663e308d23f840264e Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 30 Nov 2018 00:09:46 +0000 Subject: [PATCH 556/614] [gnutls] bump to latest lgpl v2 version --- .../0001-configure.ac-fix-sed-command.patch | 31 ++ .../0002-use-pkg-config-to-locate-zlib.patch | 67 ++++ ...mize-subject-alternative-name-access.patch | 296 ------------------ package/gnutls/Config.in | 1 - package/gnutls/gnutls.hash | 3 +- package/gnutls/gnutls.mk | 18 +- 6 files changed, 101 insertions(+), 315 deletions(-) create mode 100644 package/gnutls/0001-configure.ac-fix-sed-command.patch create mode 100644 package/gnutls/0002-use-pkg-config-to-locate-zlib.patch delete mode 100644 package/gnutls/3.3.22/0001-backport-x509-optimize-subject-alternative-name-access.patch diff --git a/package/gnutls/0001-configure.ac-fix-sed-command.patch b/package/gnutls/0001-configure.ac-fix-sed-command.patch new file mode 100644 index 000000000000..44a9934b5dbf --- /dev/null +++ b/package/gnutls/0001-configure.ac-fix-sed-command.patch @@ -0,0 +1,31 @@ +From eb93aa7b986c84da60a3db40afb29d1a70c50223 Mon Sep 17 00:00:00 2001 +From: Robert Yang +Date: Sat, 17 Jan 2015 17:02:15 +0000 +Subject: [PATCH] configure.ac: fix sed command + +The "sed 's/.bak//g'" matchs "bitbake", which would cause strange errors +when the S contains "bitbake", fix to "sed 's/\.bak$//'`" + +Upstream-Status: Pending + +Signed-off-by: Robert Yang +--- + configure.ac | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configure.ac b/configure.ac +index c6818a0..1c4582d 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -466,7 +466,7 @@ if test "$NEED_LIBOPTS_DIR" = "true";then + dnl replace libopts-generated files with distributed backups, if present + missing_baks= + for i in ${srcdir}/src/*-args.c.bak ${srcdir}/src/*-args.h.bak; do +- nam=`echo $i|sed 's/.bak//g'` ++ nam=`echo $i|sed 's/\.bak$//'` + if test -f $i;then + cp -f $i $nam + else +-- +2.0.1 + diff --git a/package/gnutls/0002-use-pkg-config-to-locate-zlib.patch b/package/gnutls/0002-use-pkg-config-to-locate-zlib.patch new file mode 100644 index 000000000000..0e1b7c8f72e3 --- /dev/null +++ b/package/gnutls/0002-use-pkg-config-to-locate-zlib.patch @@ -0,0 +1,67 @@ +From cee80af1fe93f5b76765afeebfcc3b902768f5d6 Mon Sep 17 00:00:00 2001 +From: Andre McCurdy +Date: Tue, 26 May 2015 21:41:24 -0700 +Subject: [PATCH] use pkg-config to locate zlib + +AC_LIB_HAVE_LINKFLAGS can sometimes find host libs and is therefore not +robust when cross-compiling. Remove it for zlib and use PKG_CHECK_MODULES +instead. + +Removing AC_LIB_HAVE_LINKFLAGS for zlib also removes the --with-libz-prefix +configure option. If zlib support is enabled, then failure to find zlib via +pkg-config is now treated as a fatal error. + +Change based on ChromeOS gnutls 2.12.23 cross-compile fixes patch: + + https://chromium-review.googlesource.com/#/c/271661/ + +Upstream-Status: Inappropriate [configuration] + +Signed-off-by: Andre McCurdy +--- + configure.ac | 24 ++++++++++-------------- + 1 file changed, 10 insertions(+), 14 deletions(-) + +diff --git a/configure.ac b/configure.ac +index 1b561d5..0c787dc 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -508,25 +508,21 @@ AC_ARG_WITH(zlib, AS_HELP_STRING([--without-zlib], + AC_MSG_CHECKING([whether to include zlib compression support]) + if test x$ac_zlib != xno; then + AC_MSG_RESULT(yes) +- AC_LIB_HAVE_LINKFLAGS(z,, [#include ], [compress (0, 0, 0, 0);]) +- if test x$ac_cv_libz != xyes; then +- AC_MSG_WARN( +-*** +-*** ZLIB was not found. You will not be able to use ZLIB compression.) +- fi + else + AC_MSG_RESULT(no) + fi + +-PKG_CHECK_EXISTS(zlib, ZLIB_HAS_PKGCONFIG=y, ZLIB_HAS_PKGCONFIG=n) +- + if test x$ac_zlib != xno; then +- if test "$ZLIB_HAS_PKGCONFIG" = "y" ; then +- if test "x$GNUTLS_REQUIRES_PRIVATE" = x; then +- GNUTLS_REQUIRES_PRIVATE="Requires.private: zlib" +- else +- GNUTLS_REQUIRES_PRIVATE="$GNUTLS_REQUIRES_PRIVATE, zlib" +- fi ++ PKG_CHECK_MODULES(ZLIB, zlib) ++ HAVE_LIBZ=yes ++ AC_DEFINE([HAVE_LIBZ], [1], [zlib is enabled]) ++ AC_SUBST(HAVE_LIBZ) ++ LTLIBZ=$ZLIB_LIBS ++ AC_SUBST(LTLIBZ) ++ if test "x$GNUTLS_REQUIRES_PRIVATE" = x; then ++ GNUTLS_REQUIRES_PRIVATE="Requires.private: zlib" ++ else ++ GNUTLS_REQUIRES_PRIVATE="$GNUTLS_REQUIRES_PRIVATE, zlib" + fi + fi + AC_SUBST(GNUTLS_REQUIRES_PRIVATE) +-- +1.9.1 + diff --git a/package/gnutls/3.3.22/0001-backport-x509-optimize-subject-alternative-name-access.patch b/package/gnutls/3.3.22/0001-backport-x509-optimize-subject-alternative-name-access.patch deleted file mode 100644 index 4fa879eda0a6..000000000000 --- a/package/gnutls/3.3.22/0001-backport-x509-optimize-subject-alternative-name-access.patch +++ /dev/null @@ -1,296 +0,0 @@ -diff --git a/lib/x509/x509.c b/lib/x509/x509.c -index abac2a8..c89eebc 100644 ---- a/lib/x509/x509.c -+++ b/lib/x509/x509.c -@@ -52,6 +52,20 @@ static int crt_reinit(gnutls_x509_crt_t crt) - return result; - } - -+ gnutls_subject_alt_names_deinit(crt->san); -+ result = gnutls_subject_alt_names_init(&crt->san); -+ if (result < 0) { -+ gnutls_assert(); -+ return result; -+ } -+ -+ gnutls_subject_alt_names_deinit(crt->ian); -+ result = gnutls_subject_alt_names_init(&crt->ian); -+ if (result < 0) { -+ gnutls_assert(); -+ return result; -+ } -+ - return 0; - } - -@@ -67,12 +81,12 @@ static int crt_reinit(gnutls_x509_crt_t crt) - int gnutls_x509_crt_init(gnutls_x509_crt_t * cert) - { - gnutls_x509_crt_t tmp; -+ int result; - - FAIL_IF_LIB_ERROR; - - tmp = - gnutls_calloc(1, sizeof(gnutls_x509_crt_int)); -- int result; - - if (!tmp) - return GNUTLS_E_MEMORY_ERROR; -@@ -85,6 +99,25 @@ int gnutls_x509_crt_init(gnutls_x509_crt_t * cert) - return _gnutls_asn2err(result); - } - -+ -+ result = gnutls_subject_alt_names_init(&tmp->san); -+ if (result < 0) { -+ gnutls_assert(); -+ asn1_delete_structure(&tmp->cert); -+ gnutls_free(tmp); -+ return result; -+ } -+ -+ result = gnutls_subject_alt_names_init(&tmp->ian); -+ if (result < 0) { -+ gnutls_assert(); -+ asn1_delete_structure(&tmp->cert); -+ gnutls_free(tmp); -+ gnutls_subject_alt_names_deinit(tmp->san); -+ return result; -+ } -+ -+ - /* If you add anything here, be sure to check if it has to be added - to gnutls_x509_crt_import as well. */ - -@@ -161,6 +194,8 @@ void gnutls_x509_crt_deinit(gnutls_x509_crt_t cert) - if (cert->cert) - asn1_delete_structure(&cert->cert); - gnutls_free(cert->der.data); -+ gnutls_subject_alt_names_deinit(cert->san); -+ gnutls_subject_alt_names_deinit(cert->ian); - gnutls_free(cert); - } - -@@ -229,6 +264,41 @@ static int compare_sig_algorithm(gnutls_x509_crt_t cert) - return ret; - } - -+static int cache_alt_names(gnutls_x509_crt_t cert) -+{ -+ gnutls_datum_t tmpder = {NULL, 0}; -+ int ret; -+ -+ /* pre-parse subject alt name */ -+ ret = _gnutls_x509_crt_get_extension(cert, "2.5.29.17", 0, &tmpder, NULL); -+ if (ret < 0 && ret != GNUTLS_E_REQUESTED_DATA_NOT_AVAILABLE) { -+ gnutls_free(tmpder.data); -+ return gnutls_assert_val(ret); -+ } -+ -+ if (ret >= 0) { -+ ret = gnutls_x509_ext_import_subject_alt_names(&tmpder, cert->san, 0); -+ gnutls_free(tmpder.data); -+ tmpder.data = NULL; -+ if (ret < 0) -+ return gnutls_assert_val(ret); -+ } -+ -+ ret = _gnutls_x509_crt_get_extension(cert, "2.5.29.18", 0, &tmpder, NULL); -+ if (ret < 0 && ret != GNUTLS_E_REQUESTED_DATA_NOT_AVAILABLE) -+ return gnutls_assert_val(ret); -+ -+ if (ret >= 0) { -+ ret = gnutls_x509_ext_import_subject_alt_names(&tmpder, cert->ian, 0); -+ gnutls_free(tmpder.data); -+ if (ret < 0) -+ return gnutls_assert_val(ret); -+ } -+ -+ return 0; -+} -+ -+ - /** - * gnutls_x509_crt_import: - * @cert: The structure to store the parsed certificate. -@@ -343,6 +413,12 @@ gnutls_x509_crt_import(gnutls_x509_crt_t cert, - goto cleanup; - } - -+ result = cache_alt_names(cert); -+ if (result < 0) { -+ gnutls_assert(); -+ goto cleanup; -+ } -+ - /* enforce the rule that only version 3 certificates carry extensions */ - result = gnutls_x509_crt_get_version(cert); - if (result < 0) { -@@ -1348,50 +1424,26 @@ cleanup: - } - - static int --get_alt_name(gnutls_x509_crt_t cert, const char *extension_id, -+get_alt_name(gnutls_subject_alt_names_t san, - unsigned int seq, uint8_t *alt, - size_t * alt_size, unsigned int *alt_type, - unsigned int *critical, int othername_oid) - { - int ret; -- gnutls_datum_t dnsname = {NULL, 0}; - gnutls_datum_t ooid = {NULL, 0}; -- gnutls_datum_t res; -- gnutls_subject_alt_names_t sans = NULL; -+ gnutls_datum_t oname; -+ gnutls_datum_t virt = {NULL, 0}; - unsigned int type; - -- if (cert == NULL) { -+ if (san == NULL) { - gnutls_assert(); -- return GNUTLS_E_INVALID_REQUEST; -+ return GNUTLS_E_REQUESTED_DATA_NOT_AVAILABLE; - } - - if (alt == NULL) - *alt_size = 0; - -- if ((ret = -- _gnutls_x509_crt_get_extension(cert, extension_id, 0, -- &dnsname, critical)) < 0) { -- return ret; -- } -- -- if (dnsname.size == 0 || dnsname.data == NULL) { -- gnutls_assert(); -- return GNUTLS_E_REQUESTED_DATA_NOT_AVAILABLE; -- } -- -- ret = gnutls_subject_alt_names_init(&sans); -- if (ret < 0) { -- gnutls_assert(); -- goto cleanup; -- } -- -- ret = gnutls_x509_ext_import_subject_alt_names(&dnsname, sans, 0); -- if (ret < 0) { -- gnutls_assert(); -- goto cleanup; -- } -- -- ret = gnutls_subject_alt_names_get(sans, seq, &type, &res, &ooid); -+ ret = gnutls_subject_alt_names_get(san, seq, &type, &oname, &ooid); - if (ret < 0) { - gnutls_assert(); - goto cleanup; -@@ -1399,13 +1451,11 @@ get_alt_name(gnutls_x509_crt_t cert, const char *extension_id, - - if (othername_oid && type == GNUTLS_SAN_OTHERNAME) { - unsigned vtype; -- gnutls_datum_t virt; -- ret = gnutls_x509_othername_to_virtual((char*)ooid.data, &res, &vtype, &virt); -+ ret = gnutls_x509_othername_to_virtual((char*)ooid.data, &oname, &vtype, &virt); - if (ret >= 0) { - type = vtype; -- gnutls_free(res.data); -- res.data = virt.data; -- res.size = virt.size; -+ oname.data = virt.data; -+ oname.size = virt.size; - } - } - -@@ -1416,9 +1466,9 @@ get_alt_name(gnutls_x509_crt_t cert, const char *extension_id, - ret = _gnutls_copy_string(&ooid, alt, alt_size); - } else { - if (is_type_printable(type)) { -- ret = _gnutls_copy_string(&res, alt, alt_size); -+ ret = _gnutls_copy_string(&oname, alt, alt_size); - } else { -- ret = _gnutls_copy_data(&res, alt, alt_size); -+ ret = _gnutls_copy_data(&oname, alt, alt_size); - } - } - -@@ -1429,9 +1479,7 @@ get_alt_name(gnutls_x509_crt_t cert, const char *extension_id, - - ret = type; - cleanup: -- gnutls_free(dnsname.data); -- if (sans != NULL) -- gnutls_subject_alt_names_deinit(sans); -+ gnutls_free(virt.data); - - return ret; - } -@@ -1472,7 +1520,7 @@ gnutls_x509_crt_get_subject_alt_name(gnutls_x509_crt_t cert, - size_t * san_size, - unsigned int *critical) - { -- return get_alt_name(cert, "2.5.29.17", seq, san, san_size, NULL, -+ return get_alt_name(cert->san, seq, san, san_size, NULL, - critical, 0); - } - -@@ -1515,7 +1563,7 @@ gnutls_x509_crt_get_issuer_alt_name(gnutls_x509_crt_t cert, - size_t * ian_size, - unsigned int *critical) - { -- return get_alt_name(cert, "2.5.29.18", seq, ian, ian_size, NULL, -+ return get_alt_name(cert->ian, seq, ian, ian_size, NULL, - critical, 0); - } - -@@ -1550,7 +1598,7 @@ gnutls_x509_crt_get_subject_alt_name2(gnutls_x509_crt_t cert, - unsigned int *san_type, - unsigned int *critical) - { -- return get_alt_name(cert, "2.5.29.17", seq, san, san_size, -+ return get_alt_name(cert->san, seq, san, san_size, - san_type, critical, 0); - } - -@@ -1588,7 +1636,7 @@ gnutls_x509_crt_get_issuer_alt_name2(gnutls_x509_crt_t cert, - unsigned int *ian_type, - unsigned int *critical) - { -- return get_alt_name(cert, "2.5.29.18", seq, ian, ian_size, -+ return get_alt_name(cert->ian, seq, ian, ian_size, - ian_type, critical, 0); - } - -@@ -1627,7 +1675,7 @@ gnutls_x509_crt_get_subject_alt_othername_oid(gnutls_x509_crt_t cert, - unsigned int seq, - void *oid, size_t * oid_size) - { -- return get_alt_name(cert, "2.5.29.17", seq, oid, oid_size, NULL, -+ return get_alt_name(cert->san, seq, oid, oid_size, NULL, - NULL, 1); - } - -@@ -1668,7 +1716,7 @@ gnutls_x509_crt_get_issuer_alt_othername_oid(gnutls_x509_crt_t cert, - unsigned int seq, - void *ret, size_t * ret_size) - { -- return get_alt_name(cert, "2.5.29.18", seq, ret, ret_size, NULL, -+ return get_alt_name(cert->ian, seq, ret, ret_size, NULL, - NULL, 1); - } - -diff --git a/lib/x509/x509_int.h b/lib/x509/x509_int.h -index 803f391..71eec52 100644 ---- a/lib/x509/x509_int.h -+++ b/lib/x509/x509_int.h -@@ -73,6 +73,11 @@ typedef struct gnutls_x509_crt_int { - gnutls_datum_t raw_spki; - - gnutls_datum_t der; -+ -+ /* this cached value allows fast access to alt names */ -+ gnutls_subject_alt_names_t san; -+ gnutls_subject_alt_names_t ian; -+ - struct pin_info_st pin; - } gnutls_x509_crt_int; - diff --git a/package/gnutls/Config.in b/package/gnutls/Config.in index 6e415bf06e8b..998e213c7d0f 100644 --- a/package/gnutls/Config.in +++ b/package/gnutls/Config.in @@ -1,7 +1,6 @@ config BR2_PACKAGE_GNUTLS bool "gnutls" select BR2_PACKAGE_LIBTASN1 - select BR2_PACKAGE_LIBUNISTRING if !(BR2_PACKAGE_PLAYREADY||BR2_PACKAGE_VIP_SDK||BR2_PACKAGE_BCM_REFSW||BR2_PACKAGE_GST1_BCM) select BR2_PACKAGE_NETTLE select BR2_PACKAGE_PCRE depends on BR2_USE_WCHAR diff --git a/package/gnutls/gnutls.hash b/package/gnutls/gnutls.hash index 526ca3bec5f7..3cd5632784b0 100644 --- a/package/gnutls/gnutls.hash +++ b/package/gnutls/gnutls.hash @@ -1,3 +1,2 @@ # Locally calculated after checking pgp signature -sha256 0ffa233e022e851f3f5f7811ac9223081a0870d5a05a7cf35a9f22e173c7b009 gnutls-3.3.22.tar.xz -sha256 af443e86ba538d4d3e37c4732c00101a492fe4b56a55f4112ff0ab39dbe6579d gnutls-3.5.10.tar.xz +sha256 41d70107ead3de2f12390909a05eefc9a88def6cd1f0d90ea82a7dac8b8effee gnutls-3.3.30.tar.xz diff --git a/package/gnutls/gnutls.mk b/package/gnutls/gnutls.mk index 04e6522475a9..e4a577c9dec3 100644 --- a/package/gnutls/gnutls.mk +++ b/package/gnutls/gnutls.mk @@ -4,15 +4,9 @@ # ################################################################################ -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) GNUTLS_VERSION_MAJOR = 3.3 -GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).22 +GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).30 GNUTLS_DEPENDENCIES = host-pkgconf libtasn1 nettle pcre -else -GNUTLS_VERSION_MAJOR = 3.5 -GNUTLS_VERSION = $(GNUTLS_VERSION_MAJOR).10 -GNUTLS_DEPENDENCIES = host-pkgconf libunistring libtasn1 nettle pcre -endif GNUTLS_SOURCE = gnutls-$(GNUTLS_VERSION).tar.xz GNUTLS_SITE = ftp://ftp.gnutls.org/gcrypt/gnutls/v$(GNUTLS_VERSION_MAJOR) GNUTLS_LICENSE = LGPLv2.1+ (core library), GPLv3+ (gnutls-openssl library) @@ -22,6 +16,7 @@ GNUTLS_CONF_OPTS = \ --disable-guile \ --disable-libdane \ --disable-rpath \ + --disable-openssl-compatibility \ --enable-local-libopts \ --with-libnettle-prefix=$(STAGING_DIR)/usr \ --with-librt-prefix=$(STAGING_DIR) \ @@ -34,15 +29,6 @@ GNUTLS_CONF_ENV = gl_cv_socket_ipv6=yes \ gl_cv_func_gettimeofday_clobber=no GNUTLS_INSTALL_STAGING = YES - -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) -GNUTLS_CONF_OPTS += --disable-openssl-compatibility -else -GNUTLS_CONF_OPTS += \ - --enable-openssl-compatibility \ - --with-libunistring-prefix=$(STAGING_DIR)/usr -endif - # libpthread and libz autodetection poison the linkpath GNUTLS_CONF_OPTS += $(if $(BR2_TOOLCHAIN_HAS_THREADS),--with-libpthread-prefix=$(STAGING_DIR)/usr) GNUTLS_CONF_OPTS += $(if $(BR2_PACKAGE_ZLIB),--with-libz-prefix=$(STAGING_DIR)/usr) From 418f021a3c6bca7eb7def4ef81175ed49b3ab0c8 Mon Sep 17 00:00:00 2001 From: albertd Date: Fri, 30 Nov 2018 00:10:29 +0000 Subject: [PATCH 557/614] [nettle] bump to latest lgpl v2 version --- .../0001-disable-testsuite-examples.patch | 20 -- .../0001-fix-shared-only-build.patch | 0 .../0002-disable-testsuite-examples.patch | 0 package/nettle/0003-CVE-2015-8803_8805.patch | 82 +++++ package/nettle/0004-CVE-2015-8804.patch | 282 ++++++++++++++++++ package/nettle/nettle.hash | 1 - package/nettle/nettle.mk | 10 - 7 files changed, 364 insertions(+), 31 deletions(-) delete mode 100644 package/nettle/0001-disable-testsuite-examples.patch rename package/nettle/{2.7.1 => }/0001-fix-shared-only-build.patch (100%) rename package/nettle/{2.7.1 => }/0002-disable-testsuite-examples.patch (100%) create mode 100644 package/nettle/0003-CVE-2015-8803_8805.patch create mode 100644 package/nettle/0004-CVE-2015-8804.patch diff --git a/package/nettle/0001-disable-testsuite-examples.patch b/package/nettle/0001-disable-testsuite-examples.patch deleted file mode 100644 index 82d97d5d2131..000000000000 --- a/package/nettle/0001-disable-testsuite-examples.patch +++ /dev/null @@ -1,20 +0,0 @@ -Makefile: disable testsuite and example - -We do not need them in the context of Buildroot. - -Also, they break for a shared-only build (but it's fixed in patch 0001). - -Signed-off-by: "Yann E. MORIN" - -diff -durN nettle-2.7.1.orig/Makefile.in nettle-2.7.1/Makefile.in ---- nettle-2.7.1.orig/Makefile.in 2013-05-28 16:21:54.000000000 +0200 -+++ nettle-2.7.1/Makefile.in 2014-12-12 19:57:12.499805574 +0100 -@@ -16,7 +16,7 @@ - - OPT_ASM_SOURCES = @OPT_ASM_SOURCES@ - --SUBDIRS = tools testsuite examples -+SUBDIRS = tools - - include config.make - diff --git a/package/nettle/2.7.1/0001-fix-shared-only-build.patch b/package/nettle/0001-fix-shared-only-build.patch similarity index 100% rename from package/nettle/2.7.1/0001-fix-shared-only-build.patch rename to package/nettle/0001-fix-shared-only-build.patch diff --git a/package/nettle/2.7.1/0002-disable-testsuite-examples.patch b/package/nettle/0002-disable-testsuite-examples.patch similarity index 100% rename from package/nettle/2.7.1/0002-disable-testsuite-examples.patch rename to package/nettle/0002-disable-testsuite-examples.patch diff --git a/package/nettle/0003-CVE-2015-8803_8805.patch b/package/nettle/0003-CVE-2015-8803_8805.patch new file mode 100644 index 000000000000..988f39e8288d --- /dev/null +++ b/package/nettle/0003-CVE-2015-8803_8805.patch @@ -0,0 +1,82 @@ +From f21b9f7b21067fa3630607cdc1663141b2735ae5 Mon Sep 17 00:00:00 2001 +From: Armin Kuster +Date: Thu, 2 Mar 2017 12:24:31 +0000 +Subject: [PATCH] Create meta-gplv2 from files from OE-Core + +Upstream-Status: Backport +https://git.lysator.liu.se/nettle/nettle/commit/c71d2c9d20eeebb985e3872e4550137209e3ce4d + +CVE: CVE-2015-8803 +CVE: CVE-2015-8805 + +Same fix for both. + +Signed-off-by: Armin Kuster + +--- + ChangeLog | 6 ++++++ + ecc-256.c | 23 ++++++++++++++++++----- + 2 files changed, 24 insertions(+), 5 deletions(-) + +diff --git a/ChangeLog b/ChangeLog +index 7b7854d..abdd974 100644 +--- a/ChangeLog ++++ b/ChangeLog +@@ -1,3 +1,9 @@ ++2015-12-10 Niels Möller ++ ++ * ecc-256.c (ecc_256_modp): Fixed carry propagation bug. Problem ++ reported by Hanno Böck. ++ (ecc_256_modq): Fixed another carry propagation bug. ++ + 2013-05-28 Niels Möller + + * Released nettle-2.7.1. +diff --git a/ecc-256.c b/ecc-256.c +index 571cf73..7bee4c7 100644 +--- a/ecc-256.c ++++ b/ecc-256.c +@@ -96,9 +96,19 @@ ecc_256_modp (const struct ecc_curve *ecc, mp_limb_t *rp) + q2 += t + (q1 < t); + + assert (q2 < 2); +- +- /* We multiply by two low limbs of p, 2^96 - 1, so we could use +- shifts rather than mul. */ ++ /* ++ n-1 n-2 n-3 n-4 ++ +---+---+---+---+ ++ | u1| u0| u low | ++ +---+---+---+---+ ++ - | q1(2^96-1)| ++ +-------+---+ ++ |q2(2^.)| ++ +-------+ ++ ++ We multiply by two low limbs of p, 2^96 - 1, so we could use ++ shifts rather than mul. ++ */ + t = mpn_submul_1 (rp + n - 4, ecc->p, 2, q1); + t += cnd_sub_n (q2, rp + n - 3, ecc->p, 1); + t += (-q2) & 0xffffffff; +@@ -108,7 +118,10 @@ ecc_256_modp (const struct ecc_curve *ecc, mp_limb_t *rp) + u0 -= t; + t = (u1 < cy); + u1 -= cy; +- u1 += cnd_add_n (t, rp + n - 4, ecc->p, 3); ++ ++ cy = cnd_add_n (t, rp + n - 4, ecc->p, 2); ++ u0 += cy; ++ u1 += (u0 < cy); + u1 -= (-t) & 0xffffffff; + } + rp[2] = u0; +@@ -195,7 +208,7 @@ ecc_256_modq (const struct ecc_curve *ecc, mp_limb_t *rp) + + /* Conditional add of p */ + u1 += t; +- u2 += (t<<32) + (u0 < t); ++ u2 += (t<<32) + (u1 < t); + + t = cnd_add_n (t, rp + n - 4, ecc->q, 2); + u1 += t; diff --git a/package/nettle/0004-CVE-2015-8804.patch b/package/nettle/0004-CVE-2015-8804.patch new file mode 100644 index 000000000000..f6906fd15823 --- /dev/null +++ b/package/nettle/0004-CVE-2015-8804.patch @@ -0,0 +1,282 @@ +From 8cbd1d71caf56d45c54b1d8d073b330c07c66d12 Mon Sep 17 00:00:00 2001 +From: Armin Kuster +Date: Thu, 2 Mar 2017 12:24:31 +0000 +Subject: [PATCH] Create meta-gplv2 from files from OE-Core + +Upstream-Status: Backport + https://git.lysator.liu.se/nettle/nettle/commit/fa269b6ad06dd13c901dbd84a12e52b918a09cd7 + +CVE: CVE-2015-8804 +Signed-off-by: Armin Kuster + +--- + ChangeLog | 8 +++ + x86_64/ecc-384-modp.asm | 169 +++++++++++++++++++++--------------------------- + 2 files changed, 83 insertions(+), 94 deletions(-) + +diff --git a/ChangeLog b/ChangeLog +index abdd974..c81168b 100644 +--- a/ChangeLog ++++ b/ChangeLog +@@ -1,3 +1,11 @@ ++2015-12-15 Niels Möller ++ ++ * x86_64/ecc-384-modp.asm: Fixed carry propagation bug. Problem ++ reported by Hanno Böck. Simplified the folding to always use ++ non-negative carry, the old code attempted to add in a carry which ++ could be either positive or negative, but didn't get that case ++ right. ++ + 2015-12-10 Niels Möller + + * ecc-256.c (ecc_256_modp): Fixed carry propagation bug. Problem +diff --git a/x86_64/ecc-384-modp.asm b/x86_64/ecc-384-modp.asm +index 698838f..31b739e 100644 +--- a/x86_64/ecc-384-modp.asm ++++ b/x86_64/ecc-384-modp.asm +@@ -20,7 +20,7 @@ C MA 02111-1301, USA. + .file "ecc-384-modp.asm" + + define(, <%rsi>) +-define(, <%rax>) ++define(, <%rax>) + define(, <%rbx>) + define(, <%rcx>) + define(, <%rdx>) +@@ -35,8 +35,8 @@ define(

, <%r13>) + define(

, <%r14>) + define(, <%r15>) + define(, H5) C Overlap +-define(, RP) C Overlap +-define(, H4) C Overlap ++define(, RP) C Overlap ++ + + PROLOGUE(nettle_ecc_384_modp) + W64_ENTRY(2, 0) +@@ -48,34 +48,38 @@ PROLOGUE(nettle_ecc_384_modp) + push %r14 + push %r15 + +- C First get top 2 limbs, which need folding twice ++ C First get top 2 limbs, which need folding twice. ++ C B^10 = B^6 + B^4 + 2^32 (B-1)B^4. ++ C We handle the terms as follow: + C +- C H5 H4 +- C -H5 +- C ------ +- C H0 D4 ++ C B^6: Folded immediatly. + C +- C Then shift right, (H1,H0,D4) <-- (H0,D4) << 32 +- C and add ++ C B^4: Delayed, added in in the next folding. + C +- C H5 H4 +- C H1 H0 +- C ---------- +- C C2 H1 H0 +- +- mov 80(RP), D4 +- mov 88(RP), H0 +- mov D4, H4 +- mov H0, H5 +- sub H0, D4 +- sbb $0, H0 +- +- mov D4, T2 +- mov H0, H1 +- shl $32, H0 +- shr $32, T2 ++ C 2^32(B-1) B^4: Low half limb delayed until the next ++ C folding. Top 1.5 limbs subtracted and shifter now, resulting ++ C in 2.5 limbs. The low limb saved in D5, high 1.5 limbs added ++ C in. ++ ++ mov 80(RP), H4 ++ mov 88(RP), H5 ++ C Shift right 32 bits, into H1, H0 ++ mov H4, H0 ++ mov H5, H1 ++ mov H5, D5 + shr $32, H1 +- or T2, H0 ++ shl $32, D5 ++ shr $32, H0 ++ or D5, H0 ++ ++ C H1 H0 ++ C - H1 H0 ++ C -------- ++ C H1 H0 D5 ++ mov H0, D5 ++ neg D5 ++ sbb H1, H0 ++ sbb $0, H1 + + xor C2, C2 + add H4, H0 +@@ -114,118 +118,95 @@ PROLOGUE(nettle_ecc_384_modp) + adc H3, T5 + adc $0, C0 + +- C H3 H2 H1 H0 0 +- C - H4 H3 H2 H1 H0 +- C --------------- +- C H3 H2 H1 H0 D0 +- +- mov XREG(D4), XREG(D4) +- mov H0, D0 +- neg D0 +- sbb H1, H0 +- sbb H2, H1 +- sbb H3, H2 +- sbb H4, H3 +- sbb $0, D4 +- +- C Shift right. High bits are sign, to be added to C0. +- mov D4, TMP +- sar $32, TMP +- shl $32, D4 +- add TMP, C0 +- ++ C Shift left, including low half of H4 + mov H3, TMP ++ shl $32, H4 + shr $32, TMP +- shl $32, H3 +- or TMP, D4 ++ or TMP, H4 + + mov H2, TMP ++ shl $32, H3 + shr $32, TMP +- shl $32, H2 + or TMP, H3 + + mov H1, TMP ++ shl $32, H2 + shr $32, TMP +- shl $32, H1 + or TMP, H2 + + mov H0, TMP ++ shl $32, H1 + shr $32, TMP +- shl $32, H0 + or TMP, H1 + +- mov D0, TMP +- shr $32, TMP +- shl $32, D0 +- or TMP, H0 ++ shl $32, H0 ++ ++ C H4 H3 H2 H1 H0 0 ++ C - H4 H3 H2 H1 H0 ++ C --------------- ++ C H4 H3 H2 H1 H0 TMP + +- add D0, T0 ++ mov H0, TMP ++ neg TMP ++ sbb H1, H0 ++ sbb H2, H1 ++ sbb H3, H2 ++ sbb H4, H3 ++ sbb $0, H4 ++ ++ add TMP, T0 + adc H0, T1 + adc H1, T2 + adc H2, T3 + adc H3, T4 +- adc D4, T5 ++ adc H4, T5 + adc $0, C0 + + C Remains to add in C2 and C0 +- C C0 C0<<32 (-2^32+1)C0 +- C C2 C2<<32 (-2^32+1)C2 +- C where C2 is always positive, while C0 may be -1. ++ C Set H1, H0 = (2^96 - 2^32 + 1) C0 + mov C0, H0 + mov C0, H1 +- mov C0, H2 +- sar $63, C0 C Get sign + shl $32, H1 +- sub H1, H0 C Gives borrow iff C0 > 0 ++ sub H1, H0 + sbb $0, H1 +- add C0, H2 + ++ C Set H3, H2 = (2^96 - 2^32 + 1) C2 ++ mov C2, H2 ++ mov C2, H3 ++ shl $32, H3 ++ sub H3, H2 ++ sbb $0, H3 ++ add C0, H2 C No carry. Could use lea trick ++ ++ xor C0, C0 + add H0, T0 + adc H1, T1 +- adc $0, H2 +- adc $0, C0 +- +- C Set (H1 H0) <-- C2 << 96 - C2 << 32 + 1 +- mov C2, H0 +- mov C2, H1 +- shl $32, H1 +- sub H1, H0 +- sbb $0, H1 +- +- add H2, H0 +- adc C0, H1 +- adc C2, C0 +- mov C0, H2 +- sar $63, C0 +- add H0, T2 +- adc H1, T3 +- adc H2, T4 +- adc C0, T5 +- sbb C0, C0 ++ adc H2, T2 ++ adc H3, T3 ++ adc C2, T4 ++ adc D5, T5 C Value delayed from initial folding ++ adc $0, C0 C Use sbb and switch sign? + + C Final unlikely carry + mov C0, H0 + mov C0, H1 +- mov C0, H2 +- sar $63, C0 + shl $32, H1 + sub H1, H0 + sbb $0, H1 +- add C0, H2 + + pop RP + +- sub H0, T0 ++ add H0, T0 + mov T0, (RP) +- sbb H1, T1 ++ adc H1, T1 + mov T1, 8(RP) +- sbb H2, T2 ++ adc C0, T2 + mov T2, 16(RP) +- sbb C0, T3 ++ adc $0, T3 + mov T3, 24(RP) +- sbb C0, T4 ++ adc $0, T4 + mov T4, 32(RP) +- sbb C0, T5 ++ adc $0, T5 + mov T5, 40(RP) + + pop %r15 diff --git a/package/nettle/nettle.hash b/package/nettle/nettle.hash index 59999288f58f..34c38627b6c6 100644 --- a/package/nettle/nettle.hash +++ b/package/nettle/nettle.hash @@ -1,3 +1,2 @@ # Locally calculated after checking pgp signature sha256 bc71ebd43435537d767799e414fce88e521b7278d48c860651216e1fc6555b40 nettle-2.7.1.tar.gz -sha256 46942627d5d0ca11720fec18d81fc38f7ef837ea4197c1f630e71ce0d470b11e nettle-3.3.tar.gz diff --git a/package/nettle/nettle.mk b/package/nettle/nettle.mk index af10d31c648c..95361f16f9c8 100644 --- a/package/nettle/nettle.mk +++ b/package/nettle/nettle.mk @@ -4,20 +4,12 @@ # ################################################################################ -NETTLE_VERSION = 3.3 -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) NETTLE_VERSION = 2.7.1 -endif NETTLE_SITE = http://www.lysator.liu.se/~nisse/archive NETTLE_DEPENDENCIES = gmp NETTLE_INSTALL_STAGING = YES -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)$(BR2_PACKAGE_GST1_BCM)),) NETTLE_LICENSE = LGPLv2+ NETTLE_LICENSE_FILES = COPYING.LIB -else -NETTLE_LICENSE = Dual GPLv2+/LGPLv3+ -NETTLE_LICENSE_FILES = COPYING.LESSERv3 COPYINGv2 -endif # don't include openssl support for (unused) examples as it has problems # with static linking NETTLE_CONF_OPTS = --disable-openssl @@ -37,8 +29,6 @@ define NETTLE_DITCH_DEBUGGING_CFLAGS $(SED) '/CFLAGS/ s/ -ggdb3//' $(@D)/configure endef -ifneq ($(filter y,$(BR2_PACKAGE_PLAYREADY)$(BR2_PACKAGE_VIP_SDK)$(BR2_PACKAGE_BCM_REFSW)),) NETTLE_POST_EXTRACT_HOOKS += NETTLE_DITCH_DEBUGGING_CFLAGS -endif $(eval $(autotools-package)) From ada4be7d0a8b2613dace3332c2dd3f4631b18eb6 Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Sat, 1 Dec 2018 12:37:39 +0530 Subject: [PATCH 558/614] westeros bumbed to latast (after adding libnxclient_local switch) --- .../westeros-simplebuffer.mk | 2 +- .../westeros-simpleshell.mk | 2 +- ...ustom-queue-instead-flushing-display.patch | 58 ++++++++++++ .../0002-NXClient-local-switch.patch | 92 ------------------- package/westeros-sink/westeros-sink.mk | 2 +- package/westeros-soc/westeros-soc.mk | 2 +- package/westeros/westeros.mk | 2 +- 7 files changed, 63 insertions(+), 97 deletions(-) create mode 100644 package/westeros-sink/0002-Dispatch-custom-queue-instead-flushing-display.patch delete mode 100644 package/westeros-sink/0002-NXClient-local-switch.patch diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index e7bdac54470a..591816f8dfcc 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 +WESTEROS_SIMPLEBUFFER_VERSION = c512302406068f98903d78b3678cae55debabcea WESTEROS_SIMPLEBUFFER_SITE_METHOD = git WESTEROS_SIMPLEBUFFER_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index 93e9d14e6e76..7f88ff508a09 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 +WESTEROS_SIMPLESHELL_VERSION = c512302406068f98903d78b3678cae55debabcea WESTEROS_SIMPLESHELL_SITE_METHOD = git WESTEROS_SIMPLESHELL_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES diff --git a/package/westeros-sink/0002-Dispatch-custom-queue-instead-flushing-display.patch b/package/westeros-sink/0002-Dispatch-custom-queue-instead-flushing-display.patch new file mode 100644 index 000000000000..d5ec48aac19d --- /dev/null +++ b/package/westeros-sink/0002-Dispatch-custom-queue-instead-flushing-display.patch @@ -0,0 +1,58 @@ +diff --git a/westeros-sink/westeros-sink.c b/westeros-sink/westeros-sink.c +index b5fa0cb..e7839c9 100644 +--- a/westeros-sink/westeros-sink.c ++++ b/westeros-sink/westeros-sink.c +@@ -106,7 +106,6 @@ static void shellSurfaceId(void *data, + wl_simple_shell_set_opacity( sink->shell, sink->surfaceId, op); + wl_simple_shell_get_status( sink->shell, sink->surfaceId ); + } +- wl_display_flush(sink->display); + } + + static void shellSurfaceCreated(void *data, +@@ -264,8 +263,6 @@ static void registryHandleGlobal(void *data, + wl_proxy_set_queue((struct wl_proxy*)sink->vpc, sink->queue); + } + gst_westeros_sink_soc_registryHandleGlobal( sink, registry, id, interface, version ); +- +- wl_display_flush(sink->display); + } + + static void registryHandleGlobalRemove(void *data, +@@ -525,7 +522,8 @@ gst_westeros_sink_init(GstWesterosSink *sink, GstWesterosSinkClass *gclass) + sink->surface= wl_compositor_create_surface(sink->compositor); + printf("gst_westeros_sink_init: surface=%p\n", (void*)sink->surface); + wl_proxy_set_queue((struct wl_proxy*)sink->surface, sink->queue); +- wl_display_flush( sink->display ); ++ ++ wl_display_dispatch_queue( sink->display, sink->queue ); + } + else + { +@@ -668,10 +666,13 @@ static void gst_westeros_sink_set_property(GObject *object, guint prop_id, const + wl_simple_shell_set_visible( sink->shell, sink->surfaceId, true); + + wl_simple_shell_get_status( sink->shell, sink->surfaceId); +- +- wl_display_flush( sink->display ); + } + } ++ ++ if ( sink->queue ) ++ { ++ wl_display_dispatch_queue( sink->display, sink->queue ); ++ } + } + + g_strfreev(parts); +@@ -767,7 +768,9 @@ static GstStateChangeReturn gst_westeros_sink_change_state(GstElement *element, + { + wl_vpc_surface_set_geometry( sink->vpcSurface, sink->windowX, sink->windowY, sink->windowWidth, sink->windowHeight ); + } +- wl_display_flush( sink->display ); ++ ++ wl_display_dispatch_queue( sink->display, sink->queue ); ++ + printf("westeros-sink: null_to_ready: done add vpcSurface listener\n"); + } + else diff --git a/package/westeros-sink/0002-NXClient-local-switch.patch b/package/westeros-sink/0002-NXClient-local-switch.patch deleted file mode 100644 index 67f5d00fcb38..000000000000 --- a/package/westeros-sink/0002-NXClient-local-switch.patch +++ /dev/null @@ -1,92 +0,0 @@ -diff --git a/brcm/Makefile.am b/brcm/Makefile.am -index 2bfc998..725a59d 100644 ---- a/brcm/Makefile.am -+++ b/brcm/Makefile.am -@@ -46,7 +46,13 @@ libwesteros_gl_la_CXXFLAGS= $(AM_CFLAGS) - libwesteros_gl_la_LDFLAGS= \ - $(AM_LDFLAGS) \ - -lwayland-egl \ -- -lnexus -+ ${NEXUS_LD_LIBRARIES} -+ -+if NXCLIENT_LOCAL -+libwesteros_gl_la_LDFLAGS += -lnxclient_local -+else -+libwesteros_gl_la_LDFLAGS += -lnxclient -+endif - - distcleancheck_listfiles = *-libtool - -diff --git a/brcm/configure.ac b/brcm/configure.ac -index f18567f..c9dea91 100644 ---- a/brcm/configure.ac -+++ b/brcm/configure.ac -@@ -44,6 +44,20 @@ AC_HEADER_STDBOOL - - IARM_CFLAGS=" " - -+NXCLIENT_LOCAL=" " -+AC_ARG_ENABLE([nxclient_local], -+ AS_HELP_STRING([--enable-nxclient_local],[enable local nxclient ]), -+ [ -+ case "${enableval}" in -+ yes) NXCLIENT_LOCAL=true ;; -+ no) NXCLIENT_LOCAL=false ;; -+ *) AC_MSG_ERROR([bad value ${enableval} for --enable-nxclient_local ]) ;; -+ esac -+ ], -+ [echo "local nxclient is enable"]) -+AM_CONDITIONAL([NXCLIENT_LOCAL], [test x$NXCLIENT_LOCAL = xtrue]) -+AC_SUBST(NXCLIENT_LOCAL) -+ - # Checks for library functions. - #Add the subdirectories to be considered for building. - SUBDIRS=" " -diff --git a/brcm/westeros-render-nexus/Makefile.am b/brcm/westeros-render-nexus/Makefile.am -index 6f8f762..31dc514 100644 ---- a/brcm/westeros-render-nexus/Makefile.am -+++ b/brcm/westeros-render-nexus/Makefile.am -@@ -30,12 +30,18 @@ lib_LTLIBRARIES = libwesteros_render_nexus.la - - libwesteros_render_nexus_la_SOURCES = westeros-render-nexus.cpp - libwesteros_render_nexus_la_includedir = $(includedir) --libwesteros_render_nexus_la_LDFLAGS= -lnxclient -lwesteros_simplebuffer_server -+libwesteros_render_nexus_la_LDFLAGS= -lwesteros_simplebuffer_server - if HAVE_WAYLAND_EGL - AM_CXXFLAGS += -DWESTEROS_HAVE_WAYLAND_EGL - libwesteros_render_nexus_la_LDFLAGS += -lwayland-egl - endif - -+if NXCLIENT_LOCAL -+libwesteros_render_nexus_la_LDFLAGS += -lnxclient_local -+else -+libwesteros_render_nexus_la_LDFLAGS += -lnxclient -+endif -+ - distcleancheck_listfiles = *-libtool - - ## IPK Generation Support -diff --git a/brcm/westeros-render-nexus/configure.ac b/brcm/westeros-render-nexus/configure.ac -index a706f87..0d690f8 100644 ---- a/brcm/westeros-render-nexus/configure.ac -+++ b/brcm/westeros-render-nexus/configure.ac -@@ -45,6 +45,19 @@ AC_HEADER_STDBOOL - WAYLAND_EGL_DETECTED=" " - - IARM_CFLAGS=" " -+NXCLIENT_LOCAL=" " -+AC_ARG_ENABLE([nxclient_local], -+ AS_HELP_STRING([--enable-nxclient_local],[enable local nxclient ]), -+ [ -+ case "${enableval}" in -+ yes) NXCLIENT_LOCAL=true ;; -+ no) NXCLIENT_LOCAL=false ;; -+ *) AC_MSG_ERROR([bad value ${enableval} for --enable-nxclient_local ]) ;; -+ esac -+ ], -+ [echo "local nxclient is enable"]) -+AM_CONDITIONAL([NXCLIENT_LOCAL], [test x$NXCLIENT_LOCAL = xtrue]) -+AC_SUBST(NXCLIENT_LOCAL) - - # Checks for library functions. - #Add the subdirectories to be considered for building. diff --git a/package/westeros-sink/westeros-sink.mk b/package/westeros-sink/westeros-sink.mk index b9e9f9bde728..bc765af922b9 100644 --- a/package/westeros-sink/westeros-sink.mk +++ b/package/westeros-sink/westeros-sink.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SINK_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 +WESTEROS_SINK_VERSION = c512302406068f98903d78b3678cae55debabcea WESTEROS_SINK_SITE_METHOD = git WESTEROS_SINK_SITE = git://github.com/rdkcmf/westeros WESTEROS_SINK_INSTALL_STAGING = YES diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index 4d689f1e00f2..f51b108d931b 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SOC_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 +WESTEROS_SOC_VERSION = c512302406068f98903d78b3678cae55debabcea WESTEROS_SOC_SITE_METHOD = git WESTEROS_SOC_SITE = git://github.com/rdkcmf/westeros WESTEROS_SOC_INSTALL_STAGING = YES diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index 86d3b43c278c..c8c8870fbc05 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_VERSION = e7225b5f6066b65b6e50c5d2515b6ae3f7d7a801 +WESTEROS_VERSION = c512302406068f98903d78b3678cae55debabcea WESTEROS_SITE_METHOD = git WESTEROS_SITE = git://github.com/rdkcmf/westeros WESTEROS_INSTALL_STAGING = YES From a75e9f4b9f9bfe7a3bfddd9165c7f5511e16260d Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Sun, 2 Dec 2018 10:19:43 +0530 Subject: [PATCH 559/614] Removed duplicate patch --- ...ustom-queue-instead-flushing-display.patch | 58 ------------------- 1 file changed, 58 deletions(-) delete mode 100644 package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch diff --git a/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch b/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch deleted file mode 100644 index d5ec48aac19d..000000000000 --- a/package/westeros-sink/0003-Dispatch-custom-queue-instead-flushing-display.patch +++ /dev/null @@ -1,58 +0,0 @@ -diff --git a/westeros-sink/westeros-sink.c b/westeros-sink/westeros-sink.c -index b5fa0cb..e7839c9 100644 ---- a/westeros-sink/westeros-sink.c -+++ b/westeros-sink/westeros-sink.c -@@ -106,7 +106,6 @@ static void shellSurfaceId(void *data, - wl_simple_shell_set_opacity( sink->shell, sink->surfaceId, op); - wl_simple_shell_get_status( sink->shell, sink->surfaceId ); - } -- wl_display_flush(sink->display); - } - - static void shellSurfaceCreated(void *data, -@@ -264,8 +263,6 @@ static void registryHandleGlobal(void *data, - wl_proxy_set_queue((struct wl_proxy*)sink->vpc, sink->queue); - } - gst_westeros_sink_soc_registryHandleGlobal( sink, registry, id, interface, version ); -- -- wl_display_flush(sink->display); - } - - static void registryHandleGlobalRemove(void *data, -@@ -525,7 +522,8 @@ gst_westeros_sink_init(GstWesterosSink *sink, GstWesterosSinkClass *gclass) - sink->surface= wl_compositor_create_surface(sink->compositor); - printf("gst_westeros_sink_init: surface=%p\n", (void*)sink->surface); - wl_proxy_set_queue((struct wl_proxy*)sink->surface, sink->queue); -- wl_display_flush( sink->display ); -+ -+ wl_display_dispatch_queue( sink->display, sink->queue ); - } - else - { -@@ -668,10 +666,13 @@ static void gst_westeros_sink_set_property(GObject *object, guint prop_id, const - wl_simple_shell_set_visible( sink->shell, sink->surfaceId, true); - - wl_simple_shell_get_status( sink->shell, sink->surfaceId); -- -- wl_display_flush( sink->display ); - } - } -+ -+ if ( sink->queue ) -+ { -+ wl_display_dispatch_queue( sink->display, sink->queue ); -+ } - } - - g_strfreev(parts); -@@ -767,7 +768,9 @@ static GstStateChangeReturn gst_westeros_sink_change_state(GstElement *element, - { - wl_vpc_surface_set_geometry( sink->vpcSurface, sink->windowX, sink->windowY, sink->windowWidth, sink->windowHeight ); - } -- wl_display_flush( sink->display ); -+ -+ wl_display_dispatch_queue( sink->display, sink->queue ); -+ - printf("westeros-sink: null_to_ready: done add vpcSurface listener\n"); - } - else From e441fc7fcd35c01455ca2b34522bf84f28fc8823 Mon Sep 17 00:00:00 2001 From: wouterlucas Date: Mon, 3 Dec 2018 10:50:38 -0800 Subject: [PATCH 560/614] [wpebackend-rdk] bump to latest --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 95821db3fde7..7b81fbbc428b 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 0b628970fbcdd0346557db630fc07e909f9dd38b +WPEBACKEND_RDK_VERSION = 99c0f3fafd6e71552bd42e89540175d646e15b7d WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From 474ff550004dabdf9454d5ca932aae09aca8ecde Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= Date: Tue, 4 Dec 2018 13:37:21 +0000 Subject: [PATCH 561/614] [gst-omx] omxvideodec: fix deadlock on downstream EOS Wake the _drain condition when downstream signals GST_FLOW_EOS to prevent the upstream streaming thread to keep waiting forever. This scenario can be triggered when seeking near EOS. This patch solves https://github.com/WebPlatformForEmbedded/WPEWebKit/issues/394 --- ...eodec-fix-deadlock-on-downstream-EOS.patch | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 package/gstreamer1/gst-omx/0006-omxvideodec-fix-deadlock-on-downstream-EOS.patch diff --git a/package/gstreamer1/gst-omx/0006-omxvideodec-fix-deadlock-on-downstream-EOS.patch b/package/gstreamer1/gst-omx/0006-omxvideodec-fix-deadlock-on-downstream-EOS.patch new file mode 100644 index 000000000000..03b6faeb98ad --- /dev/null +++ b/package/gstreamer1/gst-omx/0006-omxvideodec-fix-deadlock-on-downstream-EOS.patch @@ -0,0 +1,31 @@ +From 50751075eaa745f82526b15832af1957ea1a7379 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Enrique=20Oca=C3=B1a=20Gonz=C3=A1lez?= +Date: Tue, 4 Dec 2018 11:59:17 +0000 +Subject: [PATCH] omxvideodec: fix deadlock on downstream EOS + +Wake the _drain condition when downstream signals GST_FLOW_EOS to +prevent the upstream streaming thread to keep waiting forever. + +This scenario can be triggered when seeking near EOS. +--- + omx/gstomxvideodec.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/omx/gstomxvideodec.c b/omx/gstomxvideodec.c +index 6034d53..c8af722 100644 +--- a/omx/gstomxvideodec.c ++++ b/omx/gstomxvideodec.c +@@ -1598,6 +1598,10 @@ flow_error: + gst_event_new_eos ()); + gst_pad_pause_task (GST_VIDEO_DECODER_SRC_PAD (self)); + self->started = FALSE; ++ if (self->draining) { ++ self->draining = FALSE; ++ g_cond_broadcast (&self->drain_cond); ++ } + } else if (flow_ret < GST_FLOW_EOS) { + GST_ELEMENT_ERROR (self, STREAM, FAILED, + ("Internal data stream error."), ("stream stopped, reason %s", +-- +2.17.0 + From 410ae57f2dbf9241abecf57a043d0d436d9c8adc Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:01:07 +0100 Subject: [PATCH 562/614] [package/netflix5]: erroneous relative paths Paths should be based on Buildroot's environment variables. --- package/netflix5/netflix5.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 0180aad0d266..4b2cb59c1726 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -246,9 +246,9 @@ define NETFLIX5_INSTALL_STAGING_CMDS cp -Rpf $(@D)/netflix/src/platform/gibbon/text/freetype/*.h $(STAGING_DIR)/usr/include/netflix mkdir -p $(STAGING_DIR)/usr/include/netflix/gibbon cp -Rpf $(@D)/netflix/src/platform/gibbon/include/gibbon/*.h $(STAGING_DIR)/usr/include/netflix/gibbon - find output/staging/usr/include/netflix/nrdbase/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; - find output/staging/usr/include/netflix/nrd/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; - find output/staging/usr/include/netflix/nrdnet/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + find $(STAGING_DIR)/usr/include/netflix/nrdbase/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + find $(STAGING_DIR)/usr/include/netflix/nrd/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; + find $(STAGING_DIR)/usr/include/netflix/nrdnet/ -name "*.h" -exec sed -i "s/^#include \"\.\.\/\.\.\//#include \"/g" {} \; mkdir -p $(TARGET_DIR)/root/Netflix cp -r $(@D)/netflix/src/platform/gibbon/resources/gibbon/fonts $(TARGET_DIR)/root/Netflix From 2d0083dadc98f87b967a79ecea49f67557d0ff4e Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:04:56 +0100 Subject: [PATCH 563/614] [package/netflix]: missing path The data files at the path are provided by 'package/playready'. They are directly copied to /present at that path. --- .../netflix/0001-drm-playready-include.patch | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 package/netflix/0001-drm-playready-include.patch diff --git a/package/netflix/0001-drm-playready-include.patch b/package/netflix/0001-drm-playready-include.patch new file mode 100644 index 000000000000..d0f4610cf36f --- /dev/null +++ b/package/netflix/0001-drm-playready-include.patch @@ -0,0 +1,47 @@ +--- a/partner/dpi/reference/drm.cmake ++++ b/partner/dpi/reference/drm.cmake +@@ -41,7 +41,7 @@ + add_custom_command(TARGET nrddpi POST_BUILD + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready/storage +- COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready ++ # COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready + ) + + else() +@@ -80,7 +80,7 @@ + add_custom_command(TARGET nrddpi POST_BUILD + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready/storage +- COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready ++ # COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready + ) + + #else() +@@ -124,7 +124,7 @@ + add_custom_command(TARGET nrddpi POST_BUILD + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready/storage +- COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready ++ # COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready + ) + + set(CMAKE_REQUIRED_INCLUDES "${CMAKE_REQUIRED_INCLUDES_SAVED}") +@@ -165,7 +165,7 @@ + add_custom_command(TARGET nrddpi POST_BUILD + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready/storage +- COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready ++ # COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready + ) + + set(CMAKE_REQUIRED_INCLUDES "${CMAKE_REQUIRED_INCLUDES_SAVED}") +@@ -201,7 +201,7 @@ + add_custom_command(TARGET nrddpi POST_BUILD + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready + COMMAND ${CMAKE_COMMAND} -E make_directory ${HAVE_DPI_DIRECTORY}/playready/storage +- COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready ++ # COMMAND ${CMAKE_COMMAND} -E copy_directory ${PLAYREADY_INCLUDE}/etc/playready ${HAVE_DPI_DIRECTORY}/playready + ) + + set(CMAKE_REQUIRED_INCLUDES "${CMAKE_REQUIRED_INCLUDES_SAVED}") From 53e6d1475cb3475f3ce672f626e2ec3ea22257e7 Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:07:32 +0100 Subject: [PATCH 564/614] [package/python]: avoid segfault with GCC 8.x Patches are copied from upstream buildroot and python commit e348c8d154cf6342c79d627ebfe89dfe9de23817. --- ...nd-set-to-default-when-addin.patch.disable | 37 +++++++++++++++ package/python/0035-Fix-gcc8-segfault.patch | 46 +++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 package/python/0034-Override-system-locale-and-set-to-default-when-addin.patch.disable create mode 100644 package/python/0035-Fix-gcc8-segfault.patch diff --git a/package/python/0034-Override-system-locale-and-set-to-default-when-addin.patch.disable b/package/python/0034-Override-system-locale-and-set-to-default-when-addin.patch.disable new file mode 100644 index 000000000000..8fe722bc6c82 --- /dev/null +++ b/package/python/0034-Override-system-locale-and-set-to-default-when-addin.patch.disable @@ -0,0 +1,37 @@ +From d2bfa8805206db8c57c182094396d20a9d94bd8f Mon Sep 17 00:00:00 2001 +From: Samuel Cabrero +Date: Sat, 1 Apr 2017 09:31:52 +0200 +Subject: [PATCH] Override system locale and set to default when adding gcc + paths + +Forces the use of the default locale in the function +add_gcc_paths, which is called when cross compiling to add the +include and library paths. This is necessary because otherwise +the gcc output is localized and the output parsing fails, which +results in no paths added and detect_modules not able to find +any system library (eg. libz, libssl, etc.) + +[Thomas: patch taken from https://bugs.python.org/issue23767.] + +Signed-off-by: Samuel Cabrero +Signed-off-by: Thomas Petazzoni +--- + setup.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/setup.py b/setup.py +index 8045a9b..c14f4ab 100644 +--- a/setup.py ++++ b/setup.py +@@ -430,7 +430,7 @@ class PyBuildExt(build_ext): + tmpfile = os.path.join(self.build_temp, 'gccpaths') + if not os.path.exists(self.build_temp): + os.makedirs(self.build_temp) +- ret = os.system('%s -E -v - %s 1>/dev/null' % (gcc, tmpfile)) ++ ret = os.system('LC_ALL=C %s -E -v - %s 1>/dev/null' % (gcc, tmpfile)) + is_gcc = False + in_incdirs = False + inc_dirs = [] +-- +2.7.4 + diff --git a/package/python/0035-Fix-gcc8-segfault.patch b/package/python/0035-Fix-gcc8-segfault.patch new file mode 100644 index 000000000000..3dac8a869f37 --- /dev/null +++ b/package/python/0035-Fix-gcc8-segfault.patch @@ -0,0 +1,46 @@ +From e348c8d154cf6342c79d627ebfe89dfe9de23817 Mon Sep 17 00:00:00 2001 +From: "Gregory P. Smith" +Date: Mon, 10 Dec 2012 18:05:05 -0800 +Subject: [PATCH] Using 'long double' to force this structure to be worst case + aligned is no longer required as of Python 2.5+ when the gc_refs changed from + an int (4 bytes) to a Py_ssize_t (8 bytes) as the minimum size is 16 bytes. + +The use of a 'long double' triggered a warning by Clang trunk's +Undefined-Behavior Sanitizer as on many platforms a long double requires +16-byte alignment but the Python memory allocator only guarantees 8 byte +alignment. + +So our code would allocate and use these structures with technically improper +alignment. Though it didn't matter since the 'dummy' field is never used. +This silences that warning. + +Spelunking into code history, the double was added in 2001 to force better +alignment on some platforms and changed to a long double in 2002 to appease +Tru64. That issue should no loner be present since the upgrade from int to +Py_ssize_t where the minimum structure size increased to 16 (unless anyone +knows of a platform where ssize_t is 4 bytes?) or 24 bytes depending on if the +build uses 4 or 8 byte pointers. + +We can probably get rid of the double and this union hack all together today. +That is a slightly more invasive change that can be left for later. + +A more correct non-hacky alternative if any alignment issues are still found +would be to use a compiler specific alignment declaration on the structure and +determine which value to use at configure time. +--- + Include/objimpl.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/Include/objimpl.h b/Include/objimpl.h +index 63465009e3a9..b577be2df3b5 100644 +--- a/Include/objimpl.h ++++ b/Include/objimpl.h +@@ -251,7 +251,7 @@ typedef union _gc_head { + union _gc_head *gc_prev; + Py_ssize_t gc_refs; + } gc; +- long double dummy; /* force worst-case alignment */ ++ double dummy; /* force worst-case alignment */ + } PyGC_Head; + + extern PyGC_Head *_PyGC_generation0; From c8979b4668aed41d5f552c7dae5e7ff08346db78 Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:15:49 +0100 Subject: [PATCH 565/614] [package/bison]: fix build on hosts with GLIBC 2.28 Patches are copied from upstream buildroot. --- ...adjust-to-glibc-2.28-libio.h-removal.patch | 50 +++++++++++++++++++ ...e-more-paranoid-about-libio.h-change.patch | 46 +++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 package/bison/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch create mode 100644 package/bison/0002-fflush-be-more-paranoid-about-libio.h-change.patch diff --git a/package/bison/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch b/package/bison/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch new file mode 100644 index 000000000000..e9dee48af9ff --- /dev/null +++ b/package/bison/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch @@ -0,0 +1,50 @@ +From 4af4a4a71827c0bc5e0ec67af23edef4f15cee8e Mon Sep 17 00:00:00 2001 +From: Paul Eggert +Date: Mon, 5 Mar 2018 10:56:29 -0800 +Subject: [PATCH 1/1] fflush: adjust to glibc 2.28 libio.h removal +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Problem reported by Daniel P. Berrangé in: +https://lists.gnu.org/r/bug-gnulib/2018-03/msg00000.html +* lib/fbufmode.c (fbufmode): +* lib/fflush.c (clear_ungetc_buffer_preserving_position) +(disable_seek_optimization, rpl_fflush): +* lib/fpending.c (__fpending): +* lib/fpurge.c (fpurge): +* lib/freadable.c (freadable): +* lib/freadahead.c (freadahead): +* lib/freading.c (freading): +* lib/freadptr.c (freadptr): +* lib/freadseek.c (freadptrinc): +* lib/fseeko.c (fseeko): +* lib/fseterr.c (fseterr): +* lib/fwritable.c (fwritable): +* lib/fwriting.c (fwriting): +Check _IO_EOF_SEEN instead of _IO_ftrylockfile. +* lib/stdio-impl.h (_IO_IN_BACKUP) [_IO_EOF_SEEN]: +Define if not already defined. +--- + lib/fseterr.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +[yann.morin.1998@free.fr: partially backport from upstream gnulib] +Signed-off-by: "Yann E. MORIN" + +diff --git a/lib/fseterr.c b/lib/fseterr.c +index 82649c3ac..adb637256 100644 +--- a/lib/fseterr.c ++++ b/lib/fseterr.c +@@ -29,7 +29,7 @@ fseterr (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_flags |= _IO_ERR_SEEN; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +-- +2.14.1 + diff --git a/package/bison/0002-fflush-be-more-paranoid-about-libio.h-change.patch b/package/bison/0002-fflush-be-more-paranoid-about-libio.h-change.patch new file mode 100644 index 000000000000..035f8282c102 --- /dev/null +++ b/package/bison/0002-fflush-be-more-paranoid-about-libio.h-change.patch @@ -0,0 +1,46 @@ +From 74d9d6a293d7462dea8f83e7fc5ac792e956a0ad Mon Sep 17 00:00:00 2001 +From: Paul Eggert +Date: Thu, 8 Mar 2018 16:42:45 -0800 +Subject: [PATCH 2/2] fflush: be more paranoid about libio.h change + +Suggested by Eli Zaretskii in: +https://lists.gnu.org/r/emacs-devel/2018-03/msg00270.html +* lib/fbufmode.c (fbufmode): +* lib/fflush.c (clear_ungetc_buffer_preserving_position) +(disable_seek_optimization, rpl_fflush): +* lib/fpending.c (__fpending): +* lib/fpurge.c (fpurge): +* lib/freadable.c (freadable): +* lib/freadahead.c (freadahead): +* lib/freading.c (freading): +* lib/freadptr.c (freadptr): +* lib/freadseek.c (freadptrinc): +* lib/fseeko.c (fseeko): +* lib/fseterr.c (fseterr): +* lib/fwritable.c (fwritable): +* lib/fwriting.c (fwriting): +Look at _IO_ftrylockfile as well as at _IO_EOF_SEEN. +--- + lib/fseterr.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +[yann.morin.1998@free.fr: partially backport from upstream gnulib] +Signed-off-by: "Yann E. MORIN" + +diff --git a/lib/fseterr.c b/lib/fseterr.c +index adb637256..fd9da6338 100644 +--- a/lib/fseterr.c ++++ b/lib/fseterr.c +@@ -29,7 +29,8 @@ fseterr (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_flags |= _IO_ERR_SEEN; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +-- +2.14.1 + From 05045ebf76ec8a81ca5b304514585d050399fd95 Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:17:29 +0100 Subject: [PATCH 566/614] [package/m4]: fix build on hosts with GLIBC 2.28 Patches are copied from upstream buildroot. --- ...adjust-to-glibc-2.28-libio.h-removal.patch | 166 ++++++++++++++++++ ...e-more-paranoid-about-libio.h-change.patch | 151 ++++++++++++++++ 2 files changed, 317 insertions(+) create mode 100644 package/m4/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch create mode 100644 package/m4/0002-fflush-be-more-paranoid-about-libio.h-change.patch diff --git a/package/m4/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch b/package/m4/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch new file mode 100644 index 000000000000..5c5c11b990da --- /dev/null +++ b/package/m4/0001-fflush-adjust-to-glibc-2.28-libio.h-removal.patch @@ -0,0 +1,166 @@ +From 4af4a4a71827c0bc5e0ec67af23edef4f15cee8e Mon Sep 17 00:00:00 2001 +From: Paul Eggert +Date: Mon, 5 Mar 2018 10:56:29 -0800 +Subject: [PATCH] fflush: adjust to glibc 2.28 libio.h removal +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Problem reported by Daniel P. Berrangé in: +https://lists.gnu.org/r/bug-gnulib/2018-03/msg00000.html +* lib/fbufmode.c (fbufmode): +* lib/fflush.c (clear_ungetc_buffer_preserving_position) +(disable_seek_optimization, rpl_fflush): +* lib/fpending.c (__fpending): +* lib/fpurge.c (fpurge): +* lib/freadable.c (freadable): +* lib/freadahead.c (freadahead): +* lib/freading.c (freading): +* lib/freadptr.c (freadptr): +* lib/freadseek.c (freadptrinc): +* lib/fseeko.c (fseeko): +* lib/fseterr.c (fseterr): +* lib/fwritable.c (fwritable): +* lib/fwriting.c (fwriting): +Check _IO_EOF_SEEN instead of _IO_ftrylockfile. +* lib/stdio-impl.h (_IO_IN_BACKUP) [_IO_EOF_SEEN]: +Define if not already defined. + +[yann.morin.1998@free.fr: partially backport from upstream gnulib] +Signed-off-by: "Yann E. MORIN" + +--- + lib/fflush.c | 6 +++--- + lib/fpending.c | 2 +- + lib/fpurge.c | 2 +- + lib/freadahead.c | 2 +- + lib/freading.c | 2 +- + lib/fseeko.c | 4 ++-- + lib/stdio-impl.h | 6 ++++++ + 7 files changed, 15 insertions(+), 9 deletions(-) + +diff --git a/lib/fflush.c b/build-aux/gnulib/lib/fflush.c +index 983ade0ff..a6edfa105 100644 +--- a/lib/fflush.c ++++ b/lib/fflush.c +@@ -33,7 +33,7 @@ + #undef fflush + + +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + + /* Clear the stream's ungetc buffer, preserving the value of ftello (fp). */ + static void +@@ -72,7 +72,7 @@ clear_ungetc_buffer (FILE *fp) + + #endif + +-#if ! (defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */) ++#if ! (defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */) + + # if (defined __sferror || defined __DragonFly__ || defined __ANDROID__) && defined __SNPT + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +@@ -148,7 +148,7 @@ rpl_fflush (FILE *stream) + if (stream == NULL || ! freading (stream)) + return fflush (stream); + +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + + clear_ungetc_buffer_preserving_position (stream); + +diff --git a/lib/fpending.c b/build-aux/gnulib/lib/fpending.c +index c84e3a5b4..789f50e4e 100644 +--- a/lib/fpending.c ++++ b/lib/fpending.c +@@ -32,7 +32,7 @@ __fpending (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + return fp->_IO_write_ptr - fp->_IO_write_base; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +diff --git a/lib/fpurge.c b/build-aux/gnulib/lib/fpurge.c +index b1d417c7a..3aedcc373 100644 +--- a/lib/fpurge.c ++++ b/lib/fpurge.c +@@ -62,7 +62,7 @@ fpurge (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_IO_read_end = fp->_IO_read_ptr; + fp->_IO_write_ptr = fp->_IO_write_base; + /* Avoid memory leak when there is an active ungetc buffer. */ +diff --git a/lib/freadahead.c b/build-aux/gnulib/lib/freadahead.c +index c2ecb5b28..23ec76ee5 100644 +--- a/lib/freadahead.c ++++ b/lib/freadahead.c +@@ -30,7 +30,7 @@ extern size_t __sreadahead (FILE *); + size_t + freadahead (FILE *fp) + { +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + if (fp->_IO_write_ptr > fp->_IO_write_base) + return 0; + return (fp->_IO_read_end - fp->_IO_read_ptr) +diff --git a/lib/freading.c b/build-aux/gnulib/lib/freading.c +index 73c28acdd..c24d0c88a 100644 +--- a/lib/freading.c ++++ b/lib/freading.c +@@ -31,7 +31,7 @@ freading (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-# if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + return ((fp->_flags & _IO_NO_WRITES) != 0 + || ((fp->_flags & (_IO_NO_READS | _IO_CURRENTLY_PUTTING)) == 0 + && fp->_IO_read_base != NULL)); +diff --git a/lib/fseeko.c b/build-aux/gnulib/lib/fseeko.c +index 0101ab55f..193f4e8ce 100644 +--- a/lib/fseeko.c ++++ b/lib/fseeko.c +@@ -47,7 +47,7 @@ fseeko (FILE *fp, off_t offset, int whence) + #endif + + /* These tests are based on fpurge.c. */ +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + if (fp->_IO_read_end == fp->_IO_read_ptr + && fp->_IO_write_ptr == fp->_IO_write_base + && fp->_IO_save_base == NULL) +@@ -123,7 +123,7 @@ fseeko (FILE *fp, off_t offset, int whence) + return -1; + } + +-#if defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_flags &= ~_IO_EOF_SEEN; + fp->_offset = pos; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ +diff --git a/lib/stdio-impl.h b/build-aux/gnulib/lib/stdio-impl.h +index 78d896e9f..05c5752a2 100644 +--- a/lib/stdio-impl.h ++++ b/lib/stdio-impl.h +@@ -18,6 +18,12 @@ + the same implementation of stdio extension API, except that some fields + have different naming conventions, or their access requires some casts. */ + ++/* Glibc 2.28 made _IO_IN_BACKUP private. For now, work around this ++ problem by defining it ourselves. FIXME: Do not rely on glibc ++ internals. */ ++#if !defined _IO_IN_BACKUP && defined _IO_EOF_SEEN ++# define _IO_IN_BACKUP 0x100 ++#endif + + /* BSD stdio derived implementations. */ + +-- +2.14.1 + diff --git a/package/m4/0002-fflush-be-more-paranoid-about-libio.h-change.patch b/package/m4/0002-fflush-be-more-paranoid-about-libio.h-change.patch new file mode 100644 index 000000000000..a820ca8ca9b3 --- /dev/null +++ b/package/m4/0002-fflush-be-more-paranoid-about-libio.h-change.patch @@ -0,0 +1,151 @@ +From 74d9d6a293d7462dea8f83e7fc5ac792e956a0ad Mon Sep 17 00:00:00 2001 +From: Paul Eggert +Date: Thu, 8 Mar 2018 16:42:45 -0800 +Subject: [PATCH 2/2] fflush: be more paranoid about libio.h change + +Suggested by Eli Zaretskii in: +https://lists.gnu.org/r/emacs-devel/2018-03/msg00270.html +* lib/fbufmode.c (fbufmode): +* lib/fflush.c (clear_ungetc_buffer_preserving_position) +(disable_seek_optimization, rpl_fflush): +* lib/fpending.c (__fpending): +* lib/fpurge.c (fpurge): +* lib/freadable.c (freadable): +* lib/freadahead.c (freadahead): +* lib/freading.c (freading): +* lib/freadptr.c (freadptr): +* lib/freadseek.c (freadptrinc): +* lib/fseeko.c (fseeko): +* lib/fseterr.c (fseterr): +* lib/fwritable.c (fwritable): +* lib/fwriting.c (fwriting): +Look at _IO_ftrylockfile as well as at _IO_EOF_SEEN. +--- + lib/fflush.c | 9 ++++++--- + lib/fpending.c | 3 ++- + lib/fpurge.c | 3 ++- + lib/freadahead.c | 3 ++- + lib/freading.c | 3 ++- + lib/fseeko.c | 6 ++++-- + 6 files changed, 18 insertions(+), 9 deletions(-) + +[yann.morin.1998@free.fr: partially backport from upstream gnulib] +Signed-off-by: "Yann E. MORIN" + +diff --git a/lib/fflush.c b/build-aux/gnulib/lib/fflush.c +index a6edfa105..a140b7ad9 100644 +--- a/lib/fflush.c ++++ b/lib/fflush.c +@@ -33,7 +33,8 @@ + #undef fflush + + +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++/* GNU libc, BeOS, Haiku, Linux libc5 */ + + /* Clear the stream's ungetc buffer, preserving the value of ftello (fp). */ + static void +@@ -72,7 +73,8 @@ clear_ungetc_buffer (FILE *fp) + + #endif + +-#if ! (defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */) ++#if ! (defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1) ++/* GNU libc, BeOS, Haiku, Linux libc5 */ + + # if (defined __sferror || defined __DragonFly__ || defined __ANDROID__) && defined __SNPT + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +@@ -148,7 +150,8 @@ rpl_fflush (FILE *stream) + if (stream == NULL || ! freading (stream)) + return fflush (stream); + +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + + clear_ungetc_buffer_preserving_position (stream); + +diff --git a/lib/fpending.c b/build-aux/gnulib/lib/fpending.c +index 789f50e4e..7bc235ded 100644 +--- a/lib/fpending.c ++++ b/lib/fpending.c +@@ -32,7 +32,8 @@ __fpending (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + return fp->_IO_write_ptr - fp->_IO_write_base; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ + /* FreeBSD, NetBSD, OpenBSD, DragonFly, Mac OS X, Cygwin, Minix 3, Android */ +diff --git a/lib/fpurge.c b/build-aux/gnulib/lib/fpurge.c +index 3aedcc373..554790b56 100644 +--- a/lib/fpurge.c ++++ b/lib/fpurge.c +@@ -62,7 +62,8 @@ fpurge (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++# if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_IO_read_end = fp->_IO_read_ptr; + fp->_IO_write_ptr = fp->_IO_write_base; + /* Avoid memory leak when there is an active ungetc buffer. */ +diff --git a/lib/freadahead.c b/build-aux/gnulib/lib/freadahead.c +index 23ec76ee5..ed3dd0ebd 100644 +--- a/lib/freadahead.c ++++ b/lib/freadahead.c +@@ -30,7 +30,8 @@ extern size_t __sreadahead (FILE *); + size_t + freadahead (FILE *fp) + { +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + if (fp->_IO_write_ptr > fp->_IO_write_base) + return 0; + return (fp->_IO_read_end - fp->_IO_read_ptr) +diff --git a/lib/freading.c b/build-aux/gnulib/lib/freading.c +index c24d0c88a..790f92ca3 100644 +--- a/lib/freading.c ++++ b/lib/freading.c +@@ -31,7 +31,8 @@ freading (FILE *fp) + /* Most systems provide FILE as a struct and the necessary bitmask in + , because they need it for implementing getc() and putc() as + fast macros. */ +-# if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++# if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + return ((fp->_flags & _IO_NO_WRITES) != 0 + || ((fp->_flags & (_IO_NO_READS | _IO_CURRENTLY_PUTTING)) == 0 + && fp->_IO_read_base != NULL)); +diff --git a/lib/fseeko.c b/build-aux/gnulib/lib/fseeko.c +index 193f4e8ce..e5c5172e7 100644 +--- a/lib/fseeko.c ++++ b/lib/fseeko.c +@@ -47,7 +47,8 @@ fseeko (FILE *fp, off_t offset, int whence) + #endif + + /* These tests are based on fpurge.c. */ +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + if (fp->_IO_read_end == fp->_IO_read_ptr + && fp->_IO_write_ptr == fp->_IO_write_base + && fp->_IO_save_base == NULL) +@@ -123,7 +124,8 @@ fseeko (FILE *fp, off_t offset, int whence) + return -1; + } + +-#if defined _IO_EOF_SEEN || __GNU_LIBRARY__ == 1 /* GNU libc, BeOS, Haiku, Linux libc5 */ ++#if defined _IO_EOF_SEEN || defined _IO_ftrylockfile || __GNU_LIBRARY__ == 1 ++ /* GNU libc, BeOS, Haiku, Linux libc5 */ + fp->_flags &= ~_IO_EOF_SEEN; + fp->_offset = pos; + #elif defined __sferror || defined __DragonFly__ || defined __ANDROID__ +-- +2.14.1 + From 5dd5103f78cd68b1cf18544d5e2ddc3d1cf99e3f Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:22:34 +0100 Subject: [PATCH 567/614] [package/icu]: fix missing 'xlocale.h' More recent versions of GLIBC (>2.26) no longer include the non-standard header. --- package/icu/58.2/0006-fix-missing-xlocale.patch | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 package/icu/58.2/0006-fix-missing-xlocale.patch diff --git a/package/icu/58.2/0006-fix-missing-xlocale.patch b/package/icu/58.2/0006-fix-missing-xlocale.patch new file mode 100644 index 000000000000..d6a0c6190421 --- /dev/null +++ b/package/icu/58.2/0006-fix-missing-xlocale.patch @@ -0,0 +1,11 @@ +--- a/source/i18n/digitlst.cpp ++++ b/source/i18n/digitlst.cpp +@@ -64,7 +64,7 @@ + # if U_PLATFORM_USES_ONLY_WIN32_API || U_PLATFORM == U_PF_CYGWIN + # include + # else +-# include ++# include + # endif + #endif + From 099e40453985e01f8b4b85371d6de7b7da78ebaf Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 13:28:12 +0100 Subject: [PATCH 568/614] [package/bcm-refsw]: prepare for python 3.x Python 2.x has been superseded by python 3.x. Host systems typically symlink to the installed python binary without version information in the name (anyway). --- package/bcm-refsw/0002-python3.patch | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 package/bcm-refsw/0002-python3.patch diff --git a/package/bcm-refsw/0002-python3.patch b/package/bcm-refsw/0002-python3.patch new file mode 100644 index 000000000000..f7b36b7f1c64 --- /dev/null +++ b/package/bcm-refsw/0002-python3.patch @@ -0,0 +1,22 @@ +--- a/BSEAV/lib/gpu/vc5/driver/libs/util/dglenum/dglenum_gen.py ++++ b/BSEAV/lib/gpu/vc5/driver/libs/util/dglenum/dglenum_gen.py +@@ -37,7 +37,7 @@ + static DGLENUM_NAME_VALUE_T glenums[] = { + ''') + +-for (name,value) in glenums.iteritems(): ++for (name,value) in glenums.items(): + fout.write(' {{ "{}", {} }},\n'.format(name,value)) + + fout.write('};\n') +--- a/BSEAV/lib/gpu/vc5/driver/V3DDriver.mk ++++ b/BSEAV/lib/gpu/vc5/driver/V3DDriver.mk +@@ -16,7 +16,7 @@ + + PROFILING?=0 + +-PYTHON_CMD := python2 ++PYTHON_CMD := python + + ifeq ($(VERBOSE),) + hide := @ From c7b5df9f0707630b208ec52665c94ba419d15dc6 Mon Sep 17 00:00:00 2001 From: msieben Date: Thu, 6 Dec 2018 14:55:29 +0100 Subject: [PATCH 569/614] [package/bcm-refsw]: added build instruction and explanation Address space layout randomization conflicts with pre-compiled headers. --- package/bcm-refsw/readme.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 package/bcm-refsw/readme.rst diff --git a/package/bcm-refsw/readme.rst b/package/bcm-refsw/readme.rst new file mode 100644 index 000000000000..6fd86782eb21 --- /dev/null +++ b/package/bcm-refsw/readme.rst @@ -0,0 +1,14 @@ +Common build instructions +========================= + +Address space layout randomization +---------------------------------- + +You might need to disable address space layout randomization when working with pre-compiled headers. (Recent) GCC sources contain the file *gcc/c-family/c-pch.c'* that has the function *int c_common_valid_pch (cpp_reader *pfile, const char *name, int fd)* which contains:: + + /* If the text segment was not loaded at the same address as it was + when the PCH file was created, function pointers loaded from the + PCH will not be valid. We could in theory remap all the function + pointers, but no support for that exists at present. + Since we have the same executable, it should only be necessary to + check one function. */ From 916ba1eb1f2d8ab8860a8a357706803b89584724 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Sun, 9 Dec 2018 12:16:07 +0100 Subject: [PATCH 570/614] [TVHAT] Enable V4Linux API through which the Broadcast stack will access the RPI TV Hat. --- board/raspberrypi/rpi23-linux-v4l2.config | 417 ++++++++++++++++++++++ 1 file changed, 417 insertions(+) create mode 100644 board/raspberrypi/rpi23-linux-v4l2.config diff --git a/board/raspberrypi/rpi23-linux-v4l2.config b/board/raspberrypi/rpi23-linux-v4l2.config new file mode 100644 index 000000000000..7e74da7e6207 --- /dev/null +++ b/board/raspberrypi/rpi23-linux-v4l2.config @@ -0,0 +1,417 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZ4=y +CONFIG_DEFAULT_HOSTNAME="PiWi" +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM2835=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_HOTPLUG_CPU=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_AEABI=y +CONFIG_CMA=y +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y +# CONFIG_ATAGS is not set +CONFIG_CPU_FREQ=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_DIAG is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_VLAN_8021Q=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_MAC80211_MESH=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_REGULATOR=m +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=5 +CONFIG_CONNECTOR=y +CONFIG_OF_OVERLAY=y +CONFIG_BCM2835_SMI=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_ASYNC=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +# CONFIG_USB_NET_AX88179_178A is not set +# CONFIG_USB_NET_CDCETHER is not set +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_QMI_WWAN=m +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_USB=y +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +CONFIG_RT2X00=m +CONFIG_RT2800USB=m +# CONFIG_RT2800USB_RT35XX is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_RPISENSE=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO is not set +CONFIG_BRCM_CHAR_DRIVERS=y +CONFIG_BCM_VCIO=y +CONFIG_BCM_VC_SM=y +# CONFIG_BCM2835_DEVGPIOMEM is not set +# CONFIG_BCM2835_SMI_DEV is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_RAW_DRIVER=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_BCM2708=m +CONFIG_I2C_BCM2835=m +CONFIG_SPI=y +CONFIG_SPI_BCM2835=y +CONFIG_SPI_BCM2835AUX=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_W1=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_THERMAL=y +CONFIG_THERMAL_BCM2835=y +CONFIG_WATCHDOG=y +CONFIG_BCM2835_WDT=y +CONFIG_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_MAX_ADAPTERS=4 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_M88DS3103 is not set +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_TDA10071 is not set +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_HD29L2 is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_S5H1411 is not set +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_SP2 is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_HELENE is not set +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_BCM2708=y +CONFIG_FB_RPISENSE=m +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +CONFIG_SND_BCM2835=y +# CONFIG_SND_SPI is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_MULTITOUCH=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DYNAMIC_MINORS=y +CONFIG_USB_DWCOTG=y +CONFIG_USB_ACM=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_BCM2835=y +CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_SDHOST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_DMADEVICES=y +CONFIG_DMA_BCM2835=y +CONFIG_DMA_BCM2708=y +CONFIG_STAGING=y +CONFIG_MAILBOX=y +CONFIG_BCM2835_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_RASPBERRYPI_POWER=y +CONFIG_RASPBERRYPI_FIRMWARE=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=850 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_STRIP_ASM_SYMS=y +CONFIG_PANIC_ON_OOPS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_ANSI_CPRNG=y +# CONFIG_CRYPTO_HW is not set +CONFIG_ARM_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y From 312ec70e3755e83eb20b49e067b2370ff46e0b5e Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Tue, 11 Dec 2018 12:28:32 +0100 Subject: [PATCH 571/614] [Launcher] Add launcher and do some maintenance. --- package/wpe/wpeframework-launcher/Config.in | 7 +++++ .../wpeframework-launcher.mk | 10 +++++++ .../Config.in | 4 --- .../wpeframework-linearbroadcastplayer.mk | 28 ------------------- package/wpe/wpeframework/Config.in | 2 +- 5 files changed, 18 insertions(+), 33 deletions(-) create mode 100644 package/wpe/wpeframework-launcher/Config.in create mode 100644 package/wpe/wpeframework-launcher/wpeframework-launcher.mk delete mode 100644 package/wpe/wpeframework-linearbroadcastplayer/Config.in delete mode 100644 package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk diff --git a/package/wpe/wpeframework-launcher/Config.in b/package/wpe/wpeframework-launcher/Config.in new file mode 100644 index 000000000000..670e31ae10ed --- /dev/null +++ b/package/wpe/wpeframework-launcher/Config.in @@ -0,0 +1,7 @@ +config BR2_PACKAGE_WPEFRAMEWORK_LAUNCHER + bool "Launcher" + default n + help + WPE Platform Launcher plugin + This plugin can be used as a *temporary* solution + to launch linux applications and linux scripts. diff --git a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk new file mode 100644 index 000000000000..7a0825b286f6 --- /dev/null +++ b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk @@ -0,0 +1,10 @@ +WPEFRAMEWORK_LAUNCHER_VERSION = 050a6631ab665d4137c7d7d5647e7a31e8918cbb +WPEFRAMEWORK_LAUNCHER_SITE_METHOD = git +WPEFRAMEWORK_LAUNCHER_SITE = git@github.com:WebPlatformForEmbedded/WPEFPluginLauncher.git +WPEFRAMEWORK_LAUNCHER_INSTALL_STAGING = YES +WPEFRAMEWORK_LAUNCHER_DEPENDENCIES = wpeframework + +WPEFRAMEWORK_LAUNCHER_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_LAUNCHER_VERSION} + +$(eval $(cmake-package)) + diff --git a/package/wpe/wpeframework-linearbroadcastplayer/Config.in b/package/wpe/wpeframework-linearbroadcastplayer/Config.in deleted file mode 100644 index 9b0c17a115d7..000000000000 --- a/package/wpe/wpeframework-linearbroadcastplayer/Config.in +++ /dev/null @@ -1,4 +0,0 @@ -config BR2_PACKAGE_WPEFRAMEWORK_LINEARBROADCASTPLAYER - bool "LinearBroadcastPlayer" - help - WPE Platform LinearBroadcastPlayer plugin diff --git a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk b/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk deleted file mode 100644 index 5cda56d34cab..000000000000 --- a/package/wpe/wpeframework-linearbroadcastplayer/wpeframework-linearbroadcastplayer.mk +++ /dev/null @@ -1,28 +0,0 @@ -################################################################################ -# -# wpeframework-linearbroadcastplayer -# -################################################################################ - -WPEFRAMEWORK_LINEARBROADCASTPLAYER_VERSION = 18595aeb9bb4115ff4f992a81dd4170705f13b12 -WPEFRAMEWORK_LINEARBROADCASTPLAYER_SITE_METHOD = git -WPEFRAMEWORK_LINEARBROADCASTPLAYER_SITE = git@github.com:WebPlatformForEmbedded/WPELinearBroadcastPlayer.git -WPEFRAMEWORK_LINEARBROADCASTPLAYER_INSTALL_STAGING = YES -WPEFRAMEWORK_LINEARBROADCASTPLAYER_DEPENDENCIES = wpeframework - -WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_LINEARBROADCASTPLAYER_VERSION} - -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEBUG),y) -WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' -endif - -ifeq ($(BR2_PACKAGE_UMA_SDK),y) -WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=NOS -else ifeq ($(BR2_PACKAGE_AAMP),y) -WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=Aamp -else -WPEFRAMEWORK_LINEARBROADCASTPLAYER_CONF_OPTS += -DPLAYER_IMPLEMENTATION=Stub -endif - -$(eval $(cmake-package)) - diff --git a/package/wpe/wpeframework/Config.in b/package/wpe/wpeframework/Config.in index e073e82912b2..64adbebd55bd 100644 --- a/package/wpe/wpeframework/Config.in +++ b/package/wpe/wpeframework/Config.in @@ -93,7 +93,7 @@ source "package/wpe/wpeframework-amazon/Config.in" source "package/wpe/wpeframework-avnclient/Config.in" source "package/wpe/wpeframework-cobalt/Config.in" source "package/wpe/wpeframework-dialserver/Config.in" -source "package/wpe/wpeframework-linearbroadcastplayer/Config.in" +source "package/wpe/wpeframework-launcher/Config.in" source "package/wpe/wpeframework-netflix/Config.in" source "package/wpe/wpeframework-packager/Config.in" source "package/wpe/wpeframework-playgiga/Config.in" From 214c67ef05a5854b7d3a17523afe9eb04c9fa6d9 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Tue, 11 Dec 2018 12:39:10 +0100 Subject: [PATCH 572/614] [LIBPROVISION] This module now generates it's cmake package. --- package/libprovision/libprovision.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/libprovision/libprovision.mk b/package/libprovision/libprovision.mk index 84c595192029..c7b2004a9f27 100644 --- a/package/libprovision/libprovision.mk +++ b/package/libprovision/libprovision.mk @@ -4,7 +4,7 @@ # ################################################################################ -LIBPROVISION_VERSION = 5ace4f1c9646afe6621055b5ab2a4936e2c18f42 +LIBPROVISION_VERSION = 85b52b1ef4520af2ee0093948a104fd747f21aca LIBPROVISION_SITE_METHOD = git LIBPROVISION_SITE = git@github.com:Metrological/libprovision.git LIBPROVISION_LICENSE = PROPRIETARY From a6a5f4bf5139cc19988c1801787a20902b255c9f Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 12 Dec 2018 19:02:19 +0100 Subject: [PATCH 573/614] [COMPOSITOR] Add resolution as option to config --- package/wpe/wpeframework-plugins/Config.in | 16 +++++++++++++++- .../wpeframework-plugins/wpeframework-plugins.mk | 8 ++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5f26122bfd56..5e3dd3c5984a 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -121,8 +121,22 @@ config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT help Allow update of Client memory. SAGE must be told which heap the client's will be using. The amount of memory in MB to be configured for. +choice + prompt "resolution" + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_720P + bool "720p" + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_1080P + bool "1080p" + +menuconfig BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_2160P + bool "2160p" + +endchoice + config BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY - string "Manual overrule of the time it takes to initialisize all hardware (ms)" + string "Manual overrule of the time it takes to initialisize all hardware (s)" default 0 endif diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 594c28977f63..9c7d9a5fee77 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -32,6 +32,14 @@ WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DDSRESOLUTION_WITH_DUMMY_DSHAL=ON endif endif +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_720P),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=720p +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_1080P),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=1080p50Hz +else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_2160P),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=2160p50Hz +endif + ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DHCPSERVER=ON endif From 4b7437347425f1509012700be3b05e9128f68203 Mon Sep 17 00:00:00 2001 From: Marcel Fransen Date: Wed, 12 Dec 2018 19:06:24 +0100 Subject: [PATCH 574/614] [ARRISRDK] Set 4K as default --- configs/arrisrdk_wpe_ml_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/arrisrdk_wpe_ml_defconfig b/configs/arrisrdk_wpe_ml_defconfig index 95ff5da7964d..81e7bfc1ae40 100644 --- a/configs/arrisrdk_wpe_ml_defconfig +++ b/configs/arrisrdk_wpe_ml_defconfig @@ -34,7 +34,6 @@ BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_GIO=y BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_OPUS=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOFX=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUDIOPARSERS=y -# BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_AUTODETECT is not set BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_FLV=y BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_INTERLEAVE=y @@ -69,6 +68,8 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="350" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_2160P=y +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY="3" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y # BR2_PACKAGE_WPEFRAMEWORK_CDMI is not set From e482d012cff02f052f2b8bc63f331217181a0ddd Mon Sep 17 00:00:00 2001 From: anjalirajan Date: Thu, 13 Dec 2018 05:01:44 +0000 Subject: [PATCH 575/614] [ICU58] Bump to latest version --- package/icudata/icudata.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/icudata/icudata.mk b/package/icudata/icudata.mk index 8c5babb99287..cbc412f82e63 100644 --- a/package/icudata/icudata.mk +++ b/package/icudata/icudata.mk @@ -4,7 +4,7 @@ # ################################################################################ -ICUDATA_VERSION = c6e813deb8d75937ebb78b68fa6f828bd45550db +ICUDATA_VERSION = d8d56c495af970036f4afa3704f58609446a2853 ICUDATA_SITE = $(call github,Metrological,icudata,$(ICUDATA_VERSION)) define ICUDATA_EXTRACT From cee27f0210593eb54dce059ef511eeb75b9abd36 Mon Sep 17 00:00:00 2001 From: woutermeek Date: Thu, 13 Dec 2018 03:36:50 -0800 Subject: [PATCH 576/614] [config] remove playready dependency from rp3 sdk build --- configs/raspberrypi3_wpe_sdk_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/raspberrypi3_wpe_sdk_defconfig b/configs/raspberrypi3_wpe_sdk_defconfig index 37c35b3e58c2..cd7d3d7eca11 100644 --- a/configs/raspberrypi3_wpe_sdk_defconfig +++ b/configs/raspberrypi3_wpe_sdk_defconfig @@ -51,7 +51,6 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY=y BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_GST_OMX=y BR2_PACKAGE_NINJA=y -BR2_PACKAGE_PLAYREADY=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_LINUX_FIRMWARE=y BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y From 209c9ff7d312db5882cf3a2e456ac1ebbc66aef9 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 13 Dec 2018 17:58:36 +0100 Subject: [PATCH 577/614] [UMA] Board config, make sure the kernel<->Userspace connector is active. --- board/uma/linux-4.1.config | 45 ++++++++++++++------------------------ 1 file changed, 16 insertions(+), 29 deletions(-) diff --git a/board/uma/linux-4.1.config b/board/uma/linux-4.1.config index ab48839725e7..24bacb851d04 100644 --- a/board/uma/linux-4.1.config +++ b/board/uma/linux-4.1.config @@ -1,15 +1,18 @@ # CONFIG_SWAP is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_FHANDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y +CONFIG_CC_STACKPROTECTOR_STRONG=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y @@ -17,44 +20,33 @@ CONFIG_MODVERSIONS=y CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_BCM=y CONFIG_ARCH_BRCMSTB=y -CONFIG_BCM7439B0=y -CONFIG_BCMGENET=y CONFIG_ARM_LPAE=y -CONFIG_ARM_KERNMEM_PERMS=y # CONFIG_VDSO is not set +CONFIG_ARM_KERNMEM_PERMS=y CONFIG_PCI=y CONFIG_PCI_MSI=y CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BRCMSTB=y CONFIG_SMP=y -CONFIG_ARM_MODULE_PLTS=y CONFIG_ARM_PSCI=y -CONFIG_ARM_PTDUMP=y CONFIG_HZ_1000=y CONFIG_AEABI=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_MODULE_PLTS=y CONFIG_SPARSEMEM_MANUAL=y -CONFIG_CFG80211=y -CONFIG_WIRELESS=y CONFIG_CMA=y CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_ATAG_DTB_COMPAT=y -CONFIG_CC_STACKPROTECTOR_STRONG=y -# CONFIG_KEXEC is not set CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_ARM_BRCMSTB_CPUFREQ=y -CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y CONFIG_CPUFREQ_DT=y +CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y CONFIG_CPU_IDLE=y -CONFIG_CRAMFS=y CONFIG_VFP=y CONFIG_NEON=y -CONFIG_PM_RUNTIME=y CONFIG_PM_DEBUG=y CONFIG_NET=y CONFIG_PACKET=y @@ -81,11 +73,13 @@ CONFIG_TCP_CONG_BIC=y CONFIG_BRIDGE=y CONFIG_NET_DSA=y CONFIG_NET_SWITCHDEV=y +CONFIG_CFG80211=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_DMA_CMA=y CONFIG_CMA_ALIGNMENT=9 +CONFIG_CONNECTOR=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y @@ -104,7 +98,6 @@ CONFIG_MTD_SPI_NOR=y # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set CONFIG_MTD_UBI=y CONFIG_MTD_UBI_GLUEBI=y -CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=8192 @@ -112,7 +105,6 @@ CONFIG_EEPROM_93CX6=y CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y CONFIG_ATA=y CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_BRCMSTB=y @@ -124,6 +116,7 @@ CONFIG_NET_DSA_BCM_SF2=y # CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ATHEROS is not set # CONFIG_NET_CADENCE is not set +CONFIG_BCMGENET=y CONFIG_SYSTEMPORT=y # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_VENDOR_CHELSIO is not set @@ -195,8 +188,8 @@ CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_GSPCA=y -CONFIG_DRM=y # CONFIG_VGA_ARB is not set +CONFIG_DRM=y CONFIG_SOUND=y CONFIG_SND=y CONFIG_SND_SOC=y @@ -206,24 +199,24 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_BDC_UDC=y +CONFIG_USB_MASS_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_RTC_CLASS=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_BRCMSTB_BMEM=y CONFIG_BRCMSTB_CMA=y -CONFIG_BRCMSTB_MEMORY_API=y CONFIG_BRCMSTB_SRPD=y -CONFIG_BRCMSTB_WKTMR=y CONFIG_BRCMSTB_NEXUS_API=y CONFIG_RESET_CONTROLLER=y CONFIG_PHY_BRCMSTB_SATA=y CONFIG_EXT4_FS=y CONFIG_JBD2_DEBUG=y CONFIG_FUSE_FS=y -CONFIG_FHANDLE=y -CONFIG_CGROUPS=y CONFIG_CUSE=y CONFIG_ISO9660_FS=y CONFIG_JOLIET=y @@ -234,6 +227,7 @@ CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y CONFIG_SQUASHFS=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y @@ -249,19 +243,12 @@ CONFIG_PRINTK_TIME=y CONFIG_DYNAMIC_DEBUG=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_RODATA=y CONFIG_MAGIC_SYSRQ=y CONFIG_LOCKUP_DETECTOR=y +CONFIG_ARM_PTDUMP=y CONFIG_DEBUG_USER=y CONFIG_DEBUG_LL=y -CONFIG_DEBUG_BRCMSTB_UART=y CONFIG_EARLY_PRINTK=y # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set CONFIG_CRC_CCITT=y -CONFIG_RTC_CLASS=y -CONFIG_USB_GADGET=y -CONFIG_USB_BDC_UDC=y -CONFIG_USB_F_MASS_STORAGE=y -CONFIG_USB_MASS_STORAGE=y From abca2fa73b5c74bbbd7ad89b5fefcc83d545c9ba Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 13 Dec 2018 19:25:17 +0100 Subject: [PATCH 578/614] [BUMP] Bump WPEFramework*. New CMake structure, Reduced resources, New Plugins. --- package/wpe/wpeframework-amazon/wpeframework-amazon.mk | 2 +- .../wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk | 2 +- package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk | 2 +- package/wpe/wpeframework-launcher/wpeframework-launcher.mk | 2 +- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- .../wpe/wpeframework-provisioning/wpeframework-provisioning.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/package/wpe/wpeframework-amazon/wpeframework-amazon.mk b/package/wpe/wpeframework-amazon/wpeframework-amazon.mk index b4bc480c70e9..55ed113d4743 100644 --- a/package/wpe/wpeframework-amazon/wpeframework-amazon.mk +++ b/package/wpe/wpeframework-amazon/wpeframework-amazon.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_AMAZON_VERSION = 401cdaaaed43f3b56fb7965778bb0d8cfb48b973 +WPEFRAMEWORK_AMAZON_VERSION = 62cbaca905ee02f9270e44f228f0d3f5e599f099 WPEFRAMEWORK_AMAZON_SITE_METHOD = git WPEFRAMEWORK_AMAZON_SITE = git@github.com:Metrological/WPEPluginAmazon.git WPEFRAMEWORK_AMAZON_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk index 67e6a9b35d2f..98cb76f8ae48 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_NAGRA_VERSION = a1e7bde9d36757cc756ecab58e90d27a80b3da9a +WPEFRAMEWORK_CDMI_NAGRA_VERSION = 1af93b65f3a3a1f7c730a233dc79e36183afec83 WPEFRAMEWORK_CDMI_NAGRA_SITE_METHOD = git WPEFRAMEWORK_CDMI_NAGRA_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Nagra.git WPEFRAMEWORK_CDMI_NAGRA_INSTALL_STAGING = NO diff --git a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk index b3a05f53067c..872871283b14 100644 --- a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk +++ b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_DIALSERVER_VERSION = d9766822925b8f2cceafb08b4460826c2ba9d709 +WPEFRAMEWORK_DIALSERVER_VERSION = 9d1c1ad906d7098f3d732a360bd9a1b9ba0188b5 WPEFRAMEWORK_DIALSERVER_SITE_METHOD = git WPEFRAMEWORK_DIALSERVER_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginDIAL.git WPEFRAMEWORK_DIALSERVER_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk index 7a0825b286f6..83729cfb8645 100644 --- a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk +++ b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk @@ -1,4 +1,4 @@ -WPEFRAMEWORK_LAUNCHER_VERSION = 050a6631ab665d4137c7d7d5647e7a31e8918cbb +WPEFRAMEWORK_LAUNCHER_VERSION = bcf715d167419c87662174f4ecd99bf11f6b2924 WPEFRAMEWORK_LAUNCHER_SITE_METHOD = git WPEFRAMEWORK_LAUNCHER_SITE = git@github.com:WebPlatformForEmbedded/WPEFPluginLauncher.git WPEFRAMEWORK_LAUNCHER_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 9c7d9a5fee77..018ed4da34ab 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = f496482ceee43d74cde4e3142efef9dd437704ad +WPEFRAMEWORK_PLUGINS_VERSION = acff967b463cf5d9aa8fe2ef0f4e8f590c87b369 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng diff --git a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk index 0de4f658b4cb..0d313c8a25c0 100644 --- a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk +++ b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PROVISIONING_VERSION = 43fac8ca8f208ef06ea1a0bda673318be17be5ff +WPEFRAMEWORK_PROVISIONING_VERSION = 2eef3c5185a405fdc53a4bb731de14b849048ff8 WPEFRAMEWORK_PROVISIONING_SITE_METHOD = git WPEFRAMEWORK_PROVISIONING_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginProvisioning.git WPEFRAMEWORK_PROVISIONING_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 7ea5f8a64334..ceec5ce3dc80 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 7ed8348b4248068a82a535f3bc6b41cc6cf91937 +WPEFRAMEWORK_VERSION = 04191a9e3898199e38f948b074296db216469e00 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From 836b4a2e153dcb7bd6bf2f47f57136bfb53c74b2 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 13 Dec 2018 21:03:09 +0100 Subject: [PATCH 579/614] [CMAKE] Continue the CMake cleanup. --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 018ed4da34ab..0c4065dcbdf9 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = acff967b463cf5d9aa8fe2ef0f4e8f590c87b369 +WPEFRAMEWORK_PLUGINS_VERSION = 6a85df4fd58070a3d3da656acaf70a8cebd09fa3 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index ceec5ce3dc80..e123d3d70bb5 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 04191a9e3898199e38f948b074296db216469e00 +WPEFRAMEWORK_VERSION = 0b9c5bbbefc0c121aef2d36805e14360a8f98254 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From 7bcd07336cf535660c6d50510150ba1150beb65e Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 14 Dec 2018 09:55:58 +0100 Subject: [PATCH 580/614] [IOCONNECTOR] Allow the handler (Pairing) to be externally defined. --- package/wpe/wpeframework-plugins/Config.in | 30 ++++++++++++++++++- .../wpeframework-plugins.mk | 5 ++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index 5e3dd3c5984a..ef0d637476da 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -179,13 +179,41 @@ config BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY help Dictionary Plugin. -config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR +menuconfig BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "IOConnector" default n help Take custom action on hardware pins that changes state. +if BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR + +config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_IO + bool "link pairing button" + default n + help + Add a the activation of pairing for a control to a GPIO pin + +if BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_IO +config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN + string "pin" + default "162" + help + To which pin needs the handler to be associated. +config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_CALLSIGN + string "callsign" + default "RemoteControl" + help + Which plugin is handling the pairing requests + config BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PRODUCER + string "producer" + default "RF4CE" + help + What is the name of the key producer tha you want to pair +endif +endif + + config BR2_PACKAGE_WPEFRAMEWORK_FRONTPANEL select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS bool "FrontPanel" diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 0c4065dcbdf9..cc4ac4d56848 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -50,6 +50,11 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR=ON +ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN),) + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_PIN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN} + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_CALLSIGN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_CALLSIGN} + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_PRODUCER=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PRODUCER} +endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_EGLTEST),y) From 1ecacc3de066171f6d6b111a31d9f834ab08b58a Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 14 Dec 2018 10:03:13 +0100 Subject: [PATCH 581/614] [BUMP] Get the Westros functionality back in the compositor, fully working. Add an automatic config generation for IOConnector KeyPairing. --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index cc4ac4d56848..f2fe13b82068 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 6a85df4fd58070a3d3da656acaf70a8cebd09fa3 +WPEFRAMEWORK_PLUGINS_VERSION = 7995425102cc5156a0c6c4481d72c06eb5e31eac WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From 925163ef3b14919d3a3758ba9b5ae917e9e26f18 Mon Sep 17 00:00:00 2001 From: modeveci Date: Fri, 14 Dec 2018 13:13:13 +0100 Subject: [PATCH 582/614] [MC]: Add explora platform and sdk --- board/explora/linux-4.9.config | 4171 +++++++++++++++++ ...onfig => explora_bcm7271_wpe_ml_defconfig} | 14 +- package/Config.in | 1 + package/explora-sdk/Config.in | 25 + package/explora-sdk/explora-sdk.mk | 18 + 5 files changed, 4223 insertions(+), 6 deletions(-) create mode 100644 board/explora/linux-4.9.config rename configs/{multichoice_bcm7271_wpe_ml_defconfig => explora_bcm7271_wpe_ml_defconfig} (93%) create mode 100644 package/explora-sdk/Config.in create mode 100644 package/explora-sdk/explora-sdk.mk diff --git a/board/explora/linux-4.9.config b/board/explora/linux-4.9.config new file mode 100644 index 000000000000..d75703bf6505 --- /dev/null +++ b/board/explora/linux-4.9.config @@ -0,0 +1,4171 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 4.9.89-1.6 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="arm-linux-gnueabihf-" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_LZMA is not set +CONFIG_KERNEL_XZ=y +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_EXPEDITE_BOOT is not set +# CONFIG_BUILD_BIN2C is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_NMI_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_BLK_CGROUP is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +CONFIG_RT_GROUP_SCHED=y +# CONFIG_CGROUP_PIDS is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_PERF is not set +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="$${INITRAMFS_PATH}" +CONFIG_INITRAMFS_ROOT_UID=0 +CONFIG_INITRAMFS_ROOT_GID=0 +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_GCC_PLUGINS=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR_NONE is not set +CONFIG_CC_STACKPROTECTOR_REGULAR=y +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_BITS_MAX=16 +CONFIG_ARCH_MMAP_RND_BITS=8 +# CONFIG_HAVE_ARCH_HASH is not set +# CONFIG_ISA_BUS_API is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y +# CONFIG_CPU_NO_EFFICIENT_FFS is not set +# CONFIG_HAVE_ARCH_VMAP_STACK is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +CONFIG_BLK_MQ_PCI=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP1 is not set + +# +# Multiple platform selection +# + +# +# CPU Core family selection +# +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_V6_V7=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# CONFIG_ARCH_VIRT is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_ARTPEC is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_AXXIA is not set +CONFIG_ARCH_BCM=y + +# +# IPROC architected SoCs +# +# CONFIG_ARCH_BCM_CYGNUS is not set +# CONFIG_ARCH_BCM_NSP is not set +# CONFIG_ARCH_BCM_5301X is not set + +# +# KONA architected SoCs +# +# CONFIG_ARCH_BCM_281XX is not set +# CONFIG_ARCH_BCM_21664 is not set +# CONFIG_ARCH_BCM_23550 is not set + +# +# Other Architectures +# +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_53573 is not set +# CONFIG_ARCH_BCM_63XX is not set +CONFIG_ARCH_BRCMSTB=y +CONFIG_PLAT_ARRIS=y +CONFIG_ARRIS_CHANGE=y +# CONFIG_ARRIS_PLATFORM_E758 is not set +# CONFIG_ARRIS_PLATFORM_E759 is not set +# CONFIG_ARRIS_PLATFORM_E932 is not set +# CONFIG_ARRIS_PLATFORM_F073 is not set +# CONFIG_ARRIS_PLATFORM_F073_PRE_PROTOTYPE is not set +CONFIG_ARRIS_PLATFORM_F047=y + +# +# ARRIS configuration options +# +CONFIG_ARRIS_DEVICE_TREE_FIXUP_SUPPORT=y +CONFIG_ARRIS_SPI_NOR_READ_ID_SUPPORT=y +CONFIG_ARRIS_SPI_NOR_SOFT_PROTECTION_SUPPORT=y +# CONFIG_ARRIS_PRODUCTION_BUILD is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_DIGICOLOR is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_MEDIATEK is not set + +# +# TI OMAP/AM/DM/DRA Family +# +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +# CONFIG_SOC_AM33XX is not set +# CONFIG_SOC_AM43XX is not set +# CONFIG_SOC_DRA7XX is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_TANGO is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_WM8850 is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_LPAE=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_ARM_VIRT_EXT=y +CONFIG_SWP_EMULATE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_SPECTRE=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_KUSER_HELPERS=y +# CONFIG_VDSO is not set +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_CACHE_B15_RAC=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_CACHE_L2X0=y +# CONFIG_CACHE_L2X0_PMU is not set +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_PL310_ERRATA_727915 is not set +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_DEBUG_RODATA=y +CONFIG_DEBUG_ALIGN_RODATA=y +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_643719 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_ARM_ERRATA_754322 is not set +# CONFIG_ARM_ERRATA_754327 is not set +# CONFIG_ARM_ERRATA_764369 is not set +# CONFIG_ARM_ERRATA_775420 is not set +CONFIG_ARM_ERRATA_798181=y +# CONFIG_ARM_ERRATA_773022 is not set +# CONFIG_ARM_ERRATA_818325_852422 is not set +# CONFIG_ARM_ERRATA_821420 is not set +# CONFIG_ARM_ERRATA_825619 is not set +# CONFIG_ARM_ERRATA_852421 is not set +# CONFIG_ARM_ERRATA_852423 is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI host controller drivers +# +# CONFIG_PCIE_DW_PLAT is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCI_LAYERSCAPE is not set +# CONFIG_PCIE_ALTERA is not set +CONFIG_PCIE_BRCMSTB=y +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_HAVE_NATIVE_64BIT_ACCESS=y +CONFIG_HAVE_SMP=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_ARM_CPU_TOPOLOGY=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_HAVE_ARM_ARCH_TIMER=y +# CONFIG_MCPM is not set +# CONFIG_BIG_LITTLE is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_3G_OPT is not set +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +CONFIG_ARM_PSCI=y +CONFIG_ARCH_NR_GPIO=1024 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_HZ_FIXED=0 +# CONFIG_HZ_100 is not set +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_500 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_ARM_PATCH_IDIV=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_GENERIC_RCU_GUP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARM_MODULE_PLTS=y +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_XEN is not set + +# +# Boot options +# +CONFIG_USE_OF=y +# CONFIG_ATAGS is not set +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="libata.force=3 vmalloc=850m bmem=766m@166m" +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y +# CONFIG_EFI is not set + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y +CONFIG_ARM_BRCMSTB_CPUFREQ=y +CONFIG_ARM_BRCMSTB_CPUFREQ_OLD_DT_COMPAT=y +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +# CONFIG_ARM_SCMI_CPUFREQ is not set +# CONFIG_QORIQ_CPUFREQ is not set + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARM_HIGHBANK_CPUIDLE is not set +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y +# CONFIG_KERNEL_MODE_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_ADVANCED_DEBUG is not set +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_APM_EMULATION is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_NET=y +CONFIG_NET_INGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_NET_IP_TUNNEL is not set +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_UDP_TUNNEL is not set +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_UDP_DIAG=y +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_NETLINK_ACCT=y +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +CONFIG_NF_CT_PROTO_GRE=y +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=y +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +CONFIG_NF_CONNTRACK_PPTP=y +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_FTP=y +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +CONFIG_NF_NAT_REDIRECT=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +CONFIG_NETFILTER_XT_CONNMARK=y + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +# CONFIG_NETFILTER_XT_TARGET_CT is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_HL=y +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=y +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_NFACCT=y +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK_IPV4=y +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=y +CONFIG_NF_NAT_IPV4=y +# CONFIG_NF_NAT_MASQUERADE_IPV4 is not set +CONFIG_NF_NAT_PROTO_GRE=y +CONFIG_NF_NAT_PPTP=y +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=y +# CONFIG_IP_NF_TARGET_MASQUERADE is not set +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +CONFIG_IP_NF_TARGET_TTL=y +CONFIG_IP_NF_RAW=y +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_SOCK_CGROUP_DATA is not set +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +# CONFIG_STREAM_PARSER is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=y +CONFIG_LIB80211_CRYPT_WEP=y +CONFIG_LIB80211_CRYPT_CCMP=y +CONFIG_LIB80211_CRYPT_TKIP=y +# CONFIG_LIB80211_DEBUG is not set +# CONFIG_MAC80211 is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_REGULATOR is not set +# CONFIG_RFKILL_GPIO is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_LWTUNNEL is not set +# CONFIG_DST_CACHE is not set +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_HAVE_CBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +# CONFIG_DMA_SHARED_BUFFER is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=9 + +# +# Bus devices +# +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI_PMU=y +CONFIG_ARM_CCI400_COMMON=y +CONFIG_ARM_CCI400_PMU=y +# CONFIG_ARM_CCI5xx_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_DENALI_PCI is not set +# CONFIG_MTD_NAND_DENALI_DT is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_NAND_BRCMNAND=y +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_HISI504 is not set +# CONFIG_MTD_NAND_MTK is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# CONFIG_MTD_LPDDR2_NVM is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +CONFIG_MTD_UBI_GLUEBI=y +# CONFIG_MTD_UBI_BLOCK is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=y +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_AFU_DRIVER_OPS is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_BRCM=y +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +CONFIG_BCMGENET=y +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2X is not set +CONFIG_SYSTEMPORT=y +# CONFIG_BNXT is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CAVIUM=y +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_FARADAY is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +# CONFIG_HNS is not set +# CONFIG_HNS_DSAF is not set +# CONFIG_HNS_ENET is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_FM10K is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP_NETVF is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000 is not set +# CONFIG_QCOM_EMAC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +CONFIG_NET_VENDOR_RENESAS=y +# CONFIG_NET_VENDOR_RDC is not set +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_SFC is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y + +# +# MDIO bus device drivers +# +CONFIG_MDIO_BCM_UNIMAC=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_HISI_FEMAC is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +CONFIG_BCM531XX_PHY=y +CONFIG_BCM7XXX_PHY=y +# CONFIG_BCM87XX_PHY is not set +CONFIG_BCM_NET_PHYLIB=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=y +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH6KL is not set +# CONFIG_WIL6210 is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_HOSTAP=y +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_HERMES is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_MWIFIEX is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +CONFIG_WLAN_VENDOR_RALINK=y +CONFIG_WLAN_VENDOR_REALTEK=y +CONFIG_WLAN_VENDOR_RSI=y +CONFIG_WLAN_VENDOR_ST=y +CONFIG_WLAN_VENDOR_TI=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_PS2_ELANTECH=y +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +CONFIG_INPUT_MPU3050=y +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +CONFIG_DEVKMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_EM is not set +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_8250_BCM7271=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_BCM63XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_ST_ASC is not set +# CONFIG_SERIAL_STM32 is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_IPROC_RNG200=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set +# CONFIG_BRCM_MOCA is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_REG is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_BRCMSTB=y +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BCM_QSPI=y +# CONFIG_SPI_BRCMSTB_MSPI is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +CONFIG_GPIO_BRCMSTB=y +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EM is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_MPC8XXX is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_VX855 is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_ZEVIO is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_TPIC2810 is not set +# CONFIG_GPIO_TS4900 is not set + +# +# MFD GPIO expanders +# +# CONFIG_HTC_EGPIO is not set + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set + +# +# SPI or I2C GPIO expanders +# +# CONFIG_GPIO_MCP23S08 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +# CONFIG_POWER_AVS is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMKONA is not set +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VERSATILE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ARM_SCMI is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +CONFIG_THERMAL_GOV_USER_SPACE=y +# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set +# CONFIG_CPU_THERMAL is not set +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_QORIQ_THERMAL is not set +CONFIG_INTEL_POWERCLAMP=y + +# +# ACPI INT340X thermal drivers +# +CONFIG_BRCMSTB_THERMAL=y +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_EXYNOS_LPASS is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_PM8921_CORE is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_RC_SUPPORT is not set +# CONFIG_MEDIA_CONTROLLER is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_GSPCA=y +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Audio decoders, processors and mixers +# + +# +# RDS decoders +# + +# +# Video decoders +# + +# +# Video and audio decoders +# + +# +# Video encoders +# + +# +# Camera sensor devices +# + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Audio/Video compression chips +# + +# +# Miscellaneous helper chips +# + +# +# Sensors used on soc_camera driver +# + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +# CONFIG_IMX_IPUV3_CORE is not set +# CONFIG_DRM is not set + +# +# ACP (Audio CoProcessor) Configuration +# + +# +# Frame buffer Devices +# +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_VGASTATE is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_ARM=y +# CONFIG_SND_ARMAACI is not set +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_ES8328 is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SND_SIMPLE_SCU_CARD is not set +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +CONFIG_HID_MICROSOFT=y +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_C67X00_HCD=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PLATFORM is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set +CONFIG_BRCM_USB_OHCI=y +CONFIG_BRCM_USB_EHCI=y +CONFIG_BRCM_USB_XHCI=y +CONFIG_BRCM_USB_PHY=y +CONFIG_BRCM_USB=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +CONFIG_USB_SERIAL_MCT_U232=y +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_PHY is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +CONFIG_USB_BDC_PCI=y +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_MASS_STORAGE=y +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_IPROC is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_BRCMSTB=y +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_SNVS is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +# CONFIG_DMADEVICES is not set + +# +# DMABUF options +# +# CONFIG_SYNC_FILE is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_SCMI is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_NXP is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_PIC32 is not set +CONFIG_CLK_BCM2835=y + +# +# Hardware Spinlock drivers +# + +# +# Clock Source drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_ARM_TIMER_SP804 is not set +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_BRCMSTB_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# + +# +# SOC (System On Chip) specific Drivers +# + +# +# Broadcom SoC drivers +# +CONFIG_SOC_BRCMSTB=y +CONFIG_BRCMSTB_BMEM=y +CONFIG_BRCMSTB_CMA=y +CONFIG_BRCMSTB_DPFE=y +CONFIG_BRCMSTB_MEMORY_API=y +CONFIG_BRCMSTB_PM=y +CONFIG_BRCMSTB_PM_DEBUG=y +CONFIG_BRCMSTB_SRPD=y +CONFIG_BRCMSTB_WKTMR=y +CONFIG_BRCMSTB_XPT_HASH=y +CONFIG_BRCMSTB_NEXUS_API=y +CONFIG_BRCMSTB_BBSI=y +CONFIG_BRCMSTB=y +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_BCM7120_L2_IRQ=y +CONFIG_BRCMSTB_L2_IRQ=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_ATH79 is not set +# CONFIG_RESET_BERLIN is not set +# CONFIG_RESET_LPC18XX is not set +# CONFIG_RESET_MESON is not set +# CONFIG_RESET_PISTACHIO is not set +# CONFIG_RESET_SOCFPGA is not set +# CONFIG_RESET_STM32 is not set +# CONFIG_RESET_SUNXI is not set +# CONFIG_TI_SYSCON_RESET is not set +# CONFIG_RESET_ZYNQ is not set +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +CONFIG_PHY_BRCM_SATA=y +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +# CONFIG_RAS is not set +# CONFIG_THUNDERBOLT is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_NVMEM is not set +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set + +# +# FPGA Configuration Support +# +# CONFIG_FPGA is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +CONFIG_JBD2_DEBUG=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +# CONFIG_OVERLAY_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +CONFIG_ECRYPT_FS=y +# CONFIG_ECRYPT_FS_MESSAGING is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +# CONFIG_LOGFS is not set +CONFIG_CRAMFS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_REDUCED=y +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_TIMER_STATS is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_UPROBE_EVENT is not set +# CONFIG_PROBE_EVENTS is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +CONFIG_TRACING_EVENTS_GPIO=y + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set +CONFIG_ARM_PTDUMP=y +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_BRCMSTB_UART=y +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_DEBUG_SEMIHOSTING is not set +# CONFIG_DEBUG_LL_UART_8250 is not set +# CONFIG_DEBUG_LL_UART_PL01X is not set +CONFIG_DEBUG_LL_INCLUDE="debug/brcmstb.S" +# CONFIG_DEBUG_UART_8250 is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_EARLY_PRINTK=y +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_SET_MODULE_RONX is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +CONFIG_SECURITY_DMESG_RESTRICT=y +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y +# CONFIG_HARDENED_USERCOPY is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +# CONFIG_CRYPTO_ECDH is not set +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_MCRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=y +# CONFIG_CRYPTO_USER_API_AEAD is not set +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_ARM_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +# CONFIG_CRC8 is not set +# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +# CONFIG_SG_SPLIT is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_VIRTUALIZATION is not set diff --git a/configs/multichoice_bcm7271_wpe_ml_defconfig b/configs/explora_bcm7271_wpe_ml_defconfig similarity index 93% rename from configs/multichoice_bcm7271_wpe_ml_defconfig rename to configs/explora_bcm7271_wpe_ml_defconfig index 44627990720f..e37d2365a16f 100644 --- a/configs/multichoice_bcm7271_wpe_ml_defconfig +++ b/configs/explora_bcm7271_wpe_ml_defconfig @@ -5,8 +5,10 @@ BR2_ARM_INSTRUCTIONS_THUMB2=y BR2_CCACHE=y BR2_OPTIMIZE_2=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_KERNEL_HEADERS_4_1=y -BR2_BINUTILS_VERSION_2_24_X=y +BR2_KERNEL_HEADERS_4_9=y +BR2_GLIBC_VERSION_2_25=y +BR2_BINUTILS_VERSION_2_27_X=y +BR2_GCC_VERSION_6_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_GCC_ENABLE_LTO=y BR2_PACKAGE_HOST_GDB=y @@ -19,10 +21,10 @@ BR2_SYSTEM_DHCP="eth0" BR2_ROOTFS_POST_BUILD_SCRIPT="board/arris/post-build.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y -BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.1.git" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.1-1.15hf" +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:Metrological/bcm-stblinux-4.9.git" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="master" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/technicolor/linux.config" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/explora/linux-4.9.config" BR2_PACKAGE_BUSYBOX_SMP=y BR2_PACKAGE_GSTREAMER1=y BR2_PACKAGE_GST1_BCM=y @@ -51,7 +53,7 @@ BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_MPG123=y BR2_PACKAGE_NINJA=y BR2_PACKAGE_BITSTREAM_VERA=y BR2_PACKAGE_BCM_REFSW=y -BR2_PACKAGE_BCM_REFSW_17_4=y +BR2_PACKAGE_BCM_REFSW_18_2=y BR2_PACKAGE_BCM_REFSW_PLATFORM_7271=y BR2_PACKAGE_BCM_REFSW_SAGE=y BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y diff --git a/package/Config.in b/package/Config.in index ea6bc8311f4f..ab5e6a396f15 100644 --- a/package/Config.in +++ b/package/Config.in @@ -426,6 +426,7 @@ endmenu source "package/homecast-sdk/Config.in" source "package/uma-sdk/Config.in" source "package/sff-sdk/Config.in" + source "package/explora-sdk/Config.in" source "package/hwdata/Config.in" source "package/hwloc/Config.in" source "package/i2c-tools/Config.in" diff --git a/package/explora-sdk/Config.in b/package/explora-sdk/Config.in new file mode 100644 index 000000000000..c011638c9319 --- /dev/null +++ b/package/explora-sdk/Config.in @@ -0,0 +1,25 @@ +config BR2_PACKAGE_EXPLORA_SDK + bool "explora-sdk" + depends on BR2_arm + select BR2_PACKAGE_HAS_NEXUS + select BR2_PACKAGE_HAS_LIBEGL + select BR2_PACKAGE_HAS_LIBGLES + help + Pre-compiled binaries for a platform + +if BR2_PACKAGE_EXPLORA_SDK + +config BR2_PACKAGE_PROVIDES_NEXUS + default "explora-sdk" + +config BR2_PACKAGE_PROVIDES_LIBEGL + default "explora-sdk" + +config BR2_PACKAGE_PROVIDES_LIBGLES + default "explora-sdk" + +config BR2_PACKAGE_SDK_INSTALL + bool + default "explora-sdk" + +endif diff --git a/package/explora-sdk/explora-sdk.mk b/package/explora-sdk/explora-sdk.mk new file mode 100644 index 000000000000..9d5adabc858e --- /dev/null +++ b/package/explora-sdk/explora-sdk.mk @@ -0,0 +1,18 @@ +################################################################################ +# +# explora-sdk +# +################################################################################ +EXPLORA_SDK_VERSION = 507604e7d93a52c986d8e6d314b4ddc7aad6912d +EXPLORA_SDK_SITE = git@github.com:Metrological/SDK_Explora.git +EXPLORA_SDK_SITE_METHOD = git +EXPLORA_SDK_INSTALL_STAGING = NO +EXPLORA_SDK_INSTALL_TARGET = YES + +define EXPLORA_SDK_INSTALL_TARGET_CMDS + mkdir -p $(TARGET_DIR)$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH) + $(INSTALL) -D -m 0644 $(@D)/firmware/sage/release/* $(TARGET_DIR)/$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH)/ + $(INSTALL) -D -m 0644 $(@D)/firmware/drm/* $(TARGET_DIR)/usr/bin/ +endef + +$(eval $(generic-package)) From 7d8a71f6ae30de3df65fb7b2a7715d123644a689 Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 17 Dec 2018 21:35:27 +0100 Subject: [PATCH 583/614] [gst1-bcm]: add 18.2 version --- package/gstreamer1/gst1-bcm/gst1-bcm.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 54a87d4e6e61..12224469067e 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -18,6 +18,8 @@ else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_1_RDK),y) GST1_BCM_VERSION = 17.1 else ifeq ($(BR2_PACKAGE_BCM_REFSW_17_3_RDK),y) GST1_BCM_VERSION = 17.1-7 +else ifeq ($(BR2_PACKAGE_BCM_REFSW_18_2),y) +GST1_BCM_VERSION = 18.2-rdkv-20180727 else ifneq ($(filter y,$(BR2_PACKAGE_ACN_SDK)),) GST1_BCM_VERSION = 17.1-5 else ifneq ($(filter y,$(BR2_PACKAGE_HOMECAST_SDK)),) @@ -91,6 +93,8 @@ GST1_BCM_CONF_OPTS = \ --disable-mp3swdecode \ --disable-mp4demux \ --enable-pcmsink \ + --disable-pesfilter \ + --disable-pessink \ --disable-pesdemux \ --disable-playback \ --disable-qtdemux \ From 36914c4da5a8402735362053a18ba3bde81d800e Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 17 Dec 2018 21:41:01 +0100 Subject: [PATCH 584/614] [bcm-refsw]: Introduce refsw 18.2 --- package/bcm-refsw/Config.in | 5 ++++- package/bcm-refsw/bcm-refsw.mk | 11 ++++++++--- package/bcm-refsw/nexus.inc | 15 +++++++++++++-- package/bcm-refsw/platforms.inc | 1 + 4 files changed, 26 insertions(+), 6 deletions(-) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 05926ef3d23d..cdf4333e585f 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -54,6 +54,8 @@ choice config BR2_PACKAGE_BCM_REFSW_17_4 bool "bcm-refsw 17.4" + config BR2_PACKAGE_BCM_REFSW_18_2 + bool "bcm-refsw 18.2" endchoice choice @@ -140,7 +142,8 @@ endmenu config BR2_PACKAGE_BCM_REFSW_SAGE bool "SAGE v3.x" default n - depends on BR2_PACKAGE_BCM_REFSW && (BR2_PACKAGE_BCM_REFSW_16_2 || BR2_PACKAGE_BCM_REFSW_16_3 || BR2_PACKAGE_BCM_REFSW_17_1 || BR2_PACKAGE_BCM_REFSW_17_1_RDK || BR2_PACKAGE_BCM_REFSW_17_2 || BR2_PACKAGE_BCM_REFSW_17_4) + depends on BR2_PACKAGE_BCM_REFSW + depends on !BR2_PACKAGE_BCM_REFSW_13_1 && !BR2_PACKAGE_BCM_REFSW_13_4 && !BR2_PACKAGE_BCM_REFSW_15_2 && !BR2_PACKAGE_BCM_REFSW_16_1 select BR2_PACKAGE_SAGE_FIRMWARE help Add SAGE support in Nexus. diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index 3fc591db105b..cd163cff1054 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -32,6 +32,8 @@ BCM_REFSW_VERSION = 17.4-uma else BCM_REFSW_VERSION = 17.4-4 endif +else ifeq ($(BR2_PACKAGE_BCM_REFSW_18_2),y) +BCM_REFSW_VERSION = 18.2 else BCM_REFSW_VERSION = 16.2-7 endif @@ -77,8 +79,11 @@ BCM_REFSW_MAKE_ENV += \ NEXUS_EXTRA_LDFLAGS="$(TARGET_LDFLAGS)" \ VCX=$(BCM_REFSW_PLATFORM_VC) \ V3D_EXTRA_CFLAGS="$(TARGET_CFLAGS)" \ - V3D_EXTRA_LDFLAGS="$(TARGET_LDFLAGS)" \ - NEXUS_IR_INPUT_EXTENSION_INC="${@D}/nexus/extensions/insert_ir_input/insert_ir_input.inc" \ + V3D_EXTRA_LDFLAGS="$(TARGET_LDFLAGS)" + +ifneq ($(BR2_PACKAGE_BCM_REFSW_18_2),y) +BCM_REFSW_MAKE_ENV += NEXUS_IR_INPUT_EXTENSION_INC="${@D}/nexus/extensions/insert_ir_input/insert_ir_input.inc" +endif ifeq ($(BR2_PACKAGE_BCM_REFSW_15_2),y) BCM_REFSW_MAKE_ENV += CLIENT=y @@ -119,7 +124,7 @@ ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) ifeq ($(shell expr $(BCM_REFSW_VERSION) \>= 16.2),1) BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/libs/khrn/include else - BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/interface/khronos/include + BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/interface/khronos/include endif else BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/interface/khronos/include diff --git a/package/bcm-refsw/nexus.inc b/package/bcm-refsw/nexus.inc index 35c555492b96..ae1f50c2796c 100644 --- a/package/bcm-refsw/nexus.inc +++ b/package/bcm-refsw/nexus.inc @@ -139,15 +139,26 @@ endif ifeq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30),y) BCM_NEXUS_PLAYREADY30_DIR = /BSEAV/thirdparty/playready/3.0 + +ifeq ($(shell expr $(BCM_REFSW_VERSION) \>= 18.1),1) +ifeq ($(BCM_REFSW_PLATFORM_SECURITY_ZEUS_VERSION),5) + BCM_NEXUS_PLAYREADY30_LIBDIR = $(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/Zeus5x/lib +else + BCM_NEXUS_PLAYREADY30_LIBDIR = $(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/Zeus4x/lib +endif +else + BCM_NEXUS_PLAYREADY30_LIBDIR = $(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib +endif + define BCM_REFSW_INSTALL_PLAYREADY30_DEV $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/inc/* $(1)/usr/include/refsw/ $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/../http/include/* $(1)/usr/include/refsw/ $(INSTALL) -D $(@D)/BSEAV/lib/drmrootfs/drm_data.h $(1)/usr/include/refsw/ - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/* $(1)/usr/lib/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_LIBDIR)/* $(1)/usr/lib/ endef define BCM_REFSW_INSTALL_PLAYREADY30 - $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_DIR)/bin/$(ARCH)-linux/lib/*.so $(1)/usr/lib/ + $(INSTALL) -D $(@D)/$(BCM_NEXUS_PLAYREADY30_LIBDIR)/*.so $(1)/usr/lib/ endef BCM_NEXUS_DRMROOTFS_DIR = /BSEAV/lib/drmrootfs diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index 5374aac857a3..fec0acb3b3e6 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -13,6 +13,7 @@ BCM_REFSW_PLATFORM_REV = B0 BCM_REFSW_PLATFORM_VC = vc5 BCM_REFSW_BCHP_CHIP = 7271 BCM_REFSW_BCHP_VER_LOWER = b0 +BCM_REFSW_PLATFORM_SECURITY_ZEUS_VERSION = 4 else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_72604),y) BCM_REFSW_PLATFORM = 97260 BCM_REFSW_PLATFORM_REV = A0 From 6bc9a659879cee9061c3ed930fecaf7ef96eee6e Mon Sep 17 00:00:00 2001 From: modeveci Date: Mon, 17 Dec 2018 21:43:16 +0100 Subject: [PATCH 585/614] [bcm-refsw]: do not patch source to change version of pyhton, pass python version as environment variable --- package/bcm-refsw/0002-python3.patch | 11 ----------- package/bcm-refsw/bcm-refsw.mk | 1 + 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/package/bcm-refsw/0002-python3.patch b/package/bcm-refsw/0002-python3.patch index f7b36b7f1c64..b6c51713a2f8 100644 --- a/package/bcm-refsw/0002-python3.patch +++ b/package/bcm-refsw/0002-python3.patch @@ -9,14 +9,3 @@ fout.write(' {{ "{}", {} }},\n'.format(name,value)) fout.write('};\n') ---- a/BSEAV/lib/gpu/vc5/driver/V3DDriver.mk -+++ b/BSEAV/lib/gpu/vc5/driver/V3DDriver.mk -@@ -16,7 +16,7 @@ - - PROFILING?=0 - --PYTHON_CMD := python2 -+PYTHON_CMD := python - - ifeq ($(VERBOSE),) - hide := @ diff --git a/package/bcm-refsw/bcm-refsw.mk b/package/bcm-refsw/bcm-refsw.mk index cd163cff1054..581eac4a8876 100644 --- a/package/bcm-refsw/bcm-refsw.mk +++ b/package/bcm-refsw/bcm-refsw.mk @@ -126,6 +126,7 @@ ifeq ($(BCM_REFSW_PLATFORM_VC),vc5) else BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/interface/khronos/include endif + BCM_REFSW_MAKE_ENV += PYTHON_CMD=pyhton else BCM_REFSW_VCX_KHRN = $(BCM_REFSW_VCX)/driver/interface/khronos/include endif From 4582ca8e3b8f7b9778d522163c89adcb2d681ff4 Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 10:49:55 +0100 Subject: [PATCH 586/614] [bcm-refsw]: Add configuration flag to decide enable and disable Broadcom V3D DRM interface. Based on this flag update egl.pc and glesv2.pc Cflags --- package/bcm-refsw/Config.in | 7 +++++++ package/bcm-refsw/graphics.inc | 8 +++++++- package/bcm-refsw/vc5/egl.pc | 2 +- package/bcm-refsw/vc5/glesv2.pc | 2 +- 4 files changed, 16 insertions(+), 3 deletions(-) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index cdf4333e585f..747d4deaa08c 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -199,6 +199,13 @@ config BR2_PACKAGE_PROVIDES_LIBEGL config BR2_PACKAGE_PROVIDES_LIBGLES default "bcm-refsw" +config BR2_PACKAGE_BCM_REFSW_V3D_DRM + bool "V3D DRM" + default n + depends on BR2_PACKAGE_BCM_REFSW_18_2 + help + Enable V3D DRM + config BR2_PACKAGE_BCM_REFSW_EGLCUBE bool "eglcube" default n diff --git a/package/bcm-refsw/graphics.inc b/package/bcm-refsw/graphics.inc index 4434d68e0f21..3042767826cd 100644 --- a/package/bcm-refsw/graphics.inc +++ b/package/bcm-refsw/graphics.inc @@ -21,11 +21,17 @@ define BCM_REFSW_INSTALL_GRAPHICS cd $1/usr/lib && ln -sf libv3ddriver.so libEGL.so && ln -sf libv3ddriver.so libGLESv2.so endef +ifneq ($(BR2_PACKAGE_BCM_REFSW_V3D_DRM),y) +EGL_EXTRA_CFLAGS += -DV3D_DRM_DISABLE +endif + define BCM_REFSW_INSTALL_GRAPHICS_DEV $(call BCM_REFSW_INSTALL_GRAPHICS,$(STAGING_DIR)) $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/lib/pkgconfig $(INSTALL) -m 644 package/bcm-refsw/${BCM_REFSW_PLATFORM_VC}/egl.pc $(STAGING_DIR)/usr/lib/pkgconfig/egl.pc - $(INSTALL) -m 644 package/bcm-refsw/${BCM_REFSW_PLATFORM_VC}/glesv2.pc $(STAGING_DIR)/usr/lib/pkgconfig/ + $(INSTALL) -m 644 package/bcm-refsw/${BCM_REFSW_PLATFORM_VC}/glesv2.pc $(STAGING_DIR)/usr/lib/pkgconfig/ + sed -i 's/@CFLAGS@/${EGL_EXTRA_CFLAGS}/g' $(STAGING_DIR)/usr/lib/pkgconfig/egl.pc; \ + sed -i 's/@CFLAGS@/${EGL_EXTRA_CFLAGS}/g' $(STAGING_DIR)/usr/lib/pkgconfig/glesv2.pc; \ $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/include/GLES $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/include/GLES2 $(INSTALL) -m 755 -d $(STAGING_DIR)/usr/include/EGL diff --git a/package/bcm-refsw/vc5/egl.pc b/package/bcm-refsw/vc5/egl.pc index 2204a24afe6c..59a397fc24a7 100644 --- a/package/bcm-refsw/vc5/egl.pc +++ b/package/bcm-refsw/vc5/egl.pc @@ -7,4 +7,4 @@ Name: egl Description: Broadcom implementation of EGL Version: 1 Libs: -L${libdir} -lrt -lnexus -lnxclient -lnxpl -lv3ddriver -Cflags: -I${includedir} -I${includedir}/refsw -DBROADCOM_PLATFORM -DVCX=5 -DBSTD_CPU_ENDIAN=BSTD_ENDIAN_LITTLE -I${includedir}/interface/khronos/include -I${includedir}/interface/khronos/include/bcg_abstract -I${includedir}/vcos/include +Cflags: -I${includedir} -I${includedir}/refsw @CFLAGS@ -DBROADCOM_PLATFORM -DVCX=5 -DBSTD_CPU_ENDIAN=BSTD_ENDIAN_LITTLE -I${includedir}/interface/khronos/include -I${includedir}/interface/khronos/include/bcg_abstract -I${includedir}/vcos/include diff --git a/package/bcm-refsw/vc5/glesv2.pc b/package/bcm-refsw/vc5/glesv2.pc index b7eba5054439..f34390672bc4 100644 --- a/package/bcm-refsw/vc5/glesv2.pc +++ b/package/bcm-refsw/vc5/glesv2.pc @@ -7,5 +7,5 @@ Name: glesv2 Description: Broadcom implementation of OpenGL ESv2 Version: 2.0 Libs: -L${libdir} -lnexus -lnxpl -lv3ddriver -Cflags: -I${includedir} -I${includedir}/refsw -I${includedir}/GLES2 -DBROADCOM_PLATFORM -DVCX=5 -DBSTD_CPU_ENDIAN=BSTD_ENDIAN_LITTLE -I${includedir}/interface/khronos/include -I${includedir}/interface/khronos/include/bcg_abstract -I${includedir}/vcos/include +Cflags: -I${includedir} -I${includedir}/refsw -I${includedir}/GLES2 @CFLAGS@ -DBROADCOM_PLATFORM -DVCX=5 -DBSTD_CPU_ENDIAN=BSTD_ENDIAN_LITTLE -I${includedir}/interface/khronos/include -I${includedir}/interface/khronos/include/bcg_abstract -I${includedir}/vcos/include From 98626b1383019d5cd262538d76a9a9323cd05ce3 Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 11:47:22 +0100 Subject: [PATCH 587/614] [Explora-SDK]: bump the version --- package/explora-sdk/explora-sdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/explora-sdk/explora-sdk.mk b/package/explora-sdk/explora-sdk.mk index 9d5adabc858e..450929055b57 100644 --- a/package/explora-sdk/explora-sdk.mk +++ b/package/explora-sdk/explora-sdk.mk @@ -3,7 +3,7 @@ # explora-sdk # ################################################################################ -EXPLORA_SDK_VERSION = 507604e7d93a52c986d8e6d314b4ddc7aad6912d +EXPLORA_SDK_VERSION = caf26482fd97afa422ea351903701202fed28050 EXPLORA_SDK_SITE = git@github.com:Metrological/SDK_Explora.git EXPLORA_SDK_SITE_METHOD = git EXPLORA_SDK_INSTALL_STAGING = NO From bca58c580cfad1746b1cd248642c752dab161b85 Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 11:48:03 +0100 Subject: [PATCH 588/614] [Explora]: Update config to use SDK and generate initramfs --- configs/explora_bcm7271_wpe_ml_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/explora_bcm7271_wpe_ml_defconfig b/configs/explora_bcm7271_wpe_ml_defconfig index e37d2365a16f..0ffbcf547d3a 100644 --- a/configs/explora_bcm7271_wpe_ml_defconfig +++ b/configs/explora_bcm7271_wpe_ml_defconfig @@ -59,11 +59,11 @@ BR2_PACKAGE_BCM_REFSW_SAGE=y BR2_PACKAGE_BCM_REFSW_SAGE_BSECBUF=y BR2_PACKAGE_BCM_REFSW_SAGE_PLAYREADY_30=y BR2_PACKAGE_BCM_REFSW_BOXMODE="1" +BR2_PACKAGE_EXPLORA_SDK=y BR2_PACKAGE_GRAPHITE2=y BR2_PACKAGE_LIBMNG=y BR2_PACKAGE_WEBP=y BR2_PACKAGE_WPEFRAMEWORK=y -BR2_PACKAGE_WPEFRAMEWORK_DEBUG=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS=y @@ -107,3 +107,4 @@ BR2_PACKAGE_WPA_SUPPLICANT_WPS=y BR2_TARGET_ROOTFS_EXT2=y BR2_TARGET_ROOTFS_EXT2_4=y BR2_TARGET_ROOTFS_EXT2_LABEL="rootfs" +BR2_TARGET_ROOTFS_INITRAMFS=y From 7bb2f0dae6c5c1fe6e27e2b6cee19c53bb2ae80e Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Thu, 20 Dec 2018 16:53:45 +0530 Subject: [PATCH 589/614] [westeros] bumped to rdkcmf/westros latest --- .../westeros-simplebuffer.mk | 2 +- .../westeros-simpleshell.mk | 2 +- package/westeros-sink/westeros-sink.mk | 2 +- package/westeros-soc/westeros-soc.mk | 2 +- ...dd-input-focus-control-to-compositor.patch | 65 ------------------- package/westeros/westeros.mk | 2 +- 6 files changed, 5 insertions(+), 70 deletions(-) delete mode 100644 package/westeros/0001-Add-input-focus-control-to-compositor.patch diff --git a/package/westeros-simplebuffer/westeros-simplebuffer.mk b/package/westeros-simplebuffer/westeros-simplebuffer.mk index 591816f8dfcc..ffaccec4a43d 100644 --- a/package/westeros-simplebuffer/westeros-simplebuffer.mk +++ b/package/westeros-simplebuffer/westeros-simplebuffer.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLEBUFFER_VERSION = c512302406068f98903d78b3678cae55debabcea +WESTEROS_SIMPLEBUFFER_VERSION = e9c64619f19064420ea55efb43df98af21f0896d WESTEROS_SIMPLEBUFFER_SITE_METHOD = git WESTEROS_SIMPLEBUFFER_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLEBUFFER_INSTALL_STAGING = YES diff --git a/package/westeros-simpleshell/westeros-simpleshell.mk b/package/westeros-simpleshell/westeros-simpleshell.mk index 7f88ff508a09..5f46586e5153 100644 --- a/package/westeros-simpleshell/westeros-simpleshell.mk +++ b/package/westeros-simpleshell/westeros-simpleshell.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SIMPLESHELL_VERSION = c512302406068f98903d78b3678cae55debabcea +WESTEROS_SIMPLESHELL_VERSION = e9c64619f19064420ea55efb43df98af21f0896d WESTEROS_SIMPLESHELL_SITE_METHOD = git WESTEROS_SIMPLESHELL_SITE = git://github.com/rdkcmf/westeros WESTEROS_SIMPLESHELL_INSTALL_STAGING = YES diff --git a/package/westeros-sink/westeros-sink.mk b/package/westeros-sink/westeros-sink.mk index bc765af922b9..fa3009e56cda 100644 --- a/package/westeros-sink/westeros-sink.mk +++ b/package/westeros-sink/westeros-sink.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SINK_VERSION = c512302406068f98903d78b3678cae55debabcea +WESTEROS_SINK_VERSION = e9c64619f19064420ea55efb43df98af21f0896d WESTEROS_SINK_SITE_METHOD = git WESTEROS_SINK_SITE = git://github.com/rdkcmf/westeros WESTEROS_SINK_INSTALL_STAGING = YES diff --git a/package/westeros-soc/westeros-soc.mk b/package/westeros-soc/westeros-soc.mk index f51b108d931b..4c7dad642f99 100644 --- a/package/westeros-soc/westeros-soc.mk +++ b/package/westeros-soc/westeros-soc.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_SOC_VERSION = c512302406068f98903d78b3678cae55debabcea +WESTEROS_SOC_VERSION = e9c64619f19064420ea55efb43df98af21f0896d WESTEROS_SOC_SITE_METHOD = git WESTEROS_SOC_SITE = git://github.com/rdkcmf/westeros WESTEROS_SOC_INSTALL_STAGING = YES diff --git a/package/westeros/0001-Add-input-focus-control-to-compositor.patch b/package/westeros/0001-Add-input-focus-control-to-compositor.patch deleted file mode 100644 index 4c6f56afaf86..000000000000 --- a/package/westeros/0001-Add-input-focus-control-to-compositor.patch +++ /dev/null @@ -1,65 +0,0 @@ -diff --git a/westeros-compositor.cpp b/westeros-compositor.cpp -index 0b9d0ac..70f7574 100644 ---- a/westeros-compositor.cpp -+++ b/westeros-compositor.cpp -@@ -2730,7 +2730,35 @@ exit: - return result; - } - -+void WstCompositorFocusClientById( WstCompositor *ctx, const int id){ -+ WstKeyboard *keyboard= ctx->seat->keyboard; - -+ if (keyboard != 0) { -+ for (std::vector::iterator it = ctx->surfaces.begin(); it != ctx->surfaces.end(); ++it) { -+ WstSurface *surface= (*it); -+ -+ if (id == surface->surfaceId) { -+ wstKeyboardSetFocus(keyboard, surface); -+ break; -+ } -+ } -+ } -+} -+ -+void WstCompositorFocusClientByName( WstCompositor *ctx, const char *name){ -+ WstKeyboard *keyboard= ctx->seat->keyboard; -+ -+ if (keyboard != 0) { -+ for (std::vector::iterator it = ctx->surfaces.begin(); it != ctx->surfaces.end(); ++it) { -+ WstSurface *surface= (*it); -+ -+ if (::strcmp(name, surface->name) == 0) { -+ wstKeyboardSetFocus(keyboard, surface); -+ break; -+ } -+ } -+ } -+} - - /* - * ----------------- Internal methods -------------------------------------------------------------- -diff --git a/westeros-compositor.h b/westeros-compositor.h -index bdeb66e..9a7490b 100644 ---- a/westeros-compositor.h -+++ b/westeros-compositor.h -@@ -605,5 +605,20 @@ void WstCompositorTouchEvent( WstCompositor *ctx, WstTouchSet *touchSet ); - */ - bool WstCompositorLaunchClient( WstCompositor *ctx, const char *cmd ); - -+/** -+ * WstCompositorFocusClientById -+ * -+ * Manually change the keyboard input focus to a client using it's id -+ */ -+void WstCompositorFocusClientById( WstCompositor *ctx, const int id); -+ -+/** -+ * WstCompositorFocusClientByName -+ * -+ * Manually change the keyboard input focus to a client using it's name. The name uniqueness is the responsibility of -+ * the client. The first hit will be returned. -+ */ -+void WstCompositorFocusClientByName( WstCompositor *ctx, const char *name); -+ - #endif - diff --git a/package/westeros/westeros.mk b/package/westeros/westeros.mk index c8c8870fbc05..15b091357311 100644 --- a/package/westeros/westeros.mk +++ b/package/westeros/westeros.mk @@ -4,7 +4,7 @@ # ################################################################################ -WESTEROS_VERSION = c512302406068f98903d78b3678cae55debabcea +WESTEROS_VERSION = e9c64619f19064420ea55efb43df98af21f0896d WESTEROS_SITE_METHOD = git WESTEROS_SITE = git://github.com/rdkcmf/westeros WESTEROS_INSTALL_STAGING = YES From 68b52478fea4b110bbbdb28b054a95017e2670bf Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 13:36:50 +0100 Subject: [PATCH 590/614] [OCDM-Nexus-SVP]: bump the version --- .../wpeframework-cdmi-playready-nexus-svp.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk index e7c0c842b934..71ab82d9891c 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = dcc0e11f61d08fb7cf9a5f50e459ab47f190ec4c +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = 5a51c1a349f65b9a9932e8dacd4390291de657df WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus-SVP.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_STAGING = YES From f65ae161e543ad8a63c2d47d6f19617b7cfe9caa Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 13:37:56 +0100 Subject: [PATCH 591/614] [bcm-refsw]: Introduce PAK and DRM path for 18.2 version --- package/bcm-refsw/Config.in | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/package/bcm-refsw/Config.in b/package/bcm-refsw/Config.in index 747d4deaa08c..22f1cae9fa00 100644 --- a/package/bcm-refsw/Config.in +++ b/package/bcm-refsw/Config.in @@ -155,6 +155,20 @@ config BR2_PACKAGE_BCM_REFSW_SAGE_PATH help Sage binaries path +config BR2_PACKAGE_BCM_REFSW_PAK_PATH + string "PAK Path" + default "/usr/bin/" + depends on BR2_PACKAGE_BCM_REFSW_18_2 + help + PAK binaries path + +config BR2_PACKAGE_BCM_REFSW_DRM_PATH + string "DRM Path" + default "/usr/bin/" + depends on BR2_PACKAGE_BCM_REFSW_18_2 + help + DRM binaries path + config BR2_PACKAGE_BCM_REFSW_SAGE_MANUFACTURING bool "SAGE Manufacturing" default n From dd494e87500acc88a36e4522d8a26f4a71e200ac Mon Sep 17 00:00:00 2001 From: modeveci Date: Thu, 20 Dec 2018 13:38:55 +0100 Subject: [PATCH 592/614] [wpeframework-plugins]: Introduce PAK and DRM config options for Compositor Nexus server --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index f2fe13b82068..b84b3666df55 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -370,6 +370,12 @@ endif ifneq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PATH),) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SAGE_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH))" endif +ifneq ($(BR2_PACKAGE_BCM_REFSW_PAK_PATH),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_PAK_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_PAK_PATH))" +endif +ifneq ($(BR2_PACKAGE_BCM_REFSW_DRM_PATH),) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_DRM_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_DRM_PATH))" +endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="None" else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO),y) From b7f77cce4177b32005f75bd4dd027b27c394a8cd Mon Sep 17 00:00:00 2001 From: HaseenaSainul Date: Thu, 20 Dec 2018 20:32:46 +0530 Subject: [PATCH 593/614] [icu58-2] Add patch to disable LDFLAGS - "nodefaultlibs -nostdlib" --- package/icu/58.2/0004-link-icudata-as-data-only.patch | 1 + 1 file changed, 1 insertion(+) create mode 120000 package/icu/58.2/0004-link-icudata-as-data-only.patch diff --git a/package/icu/58.2/0004-link-icudata-as-data-only.patch b/package/icu/58.2/0004-link-icudata-as-data-only.patch new file mode 120000 index 000000000000..9bb3221cec32 --- /dev/null +++ b/package/icu/58.2/0004-link-icudata-as-data-only.patch @@ -0,0 +1 @@ +../0004-link-icudata-as-data-only.patch \ No newline at end of file From 164d11d088f0796a7afb0355ac7b069bdcf5c178 Mon Sep 17 00:00:00 2001 From: HaseenaSainul <41037131+HaseenaSainul@users.noreply.github.com> Date: Fri, 21 Dec 2018 09:41:39 +0530 Subject: [PATCH 594/614] Nf5 rpi changes (#75) * [NF5] Updates netflix5 Makefile for RPi * [NF5] package config updated --- package/netflix5/Config.in | 30 ++++++++++++- package/netflix5/netflix.pc | 2 +- package/netflix5/netflix5.mk | 44 +++++++++++++------ .../wpeframework-netflix.mk | 3 +- 4 files changed, 62 insertions(+), 17 deletions(-) diff --git a/package/netflix5/Config.in b/package/netflix5/Config.in index e6b1db2e2fde..155ddef74141 100644 --- a/package/netflix5/Config.in +++ b/package/netflix5/Config.in @@ -58,6 +58,34 @@ config BR2_PACKAGE_NETFLIX5_WESTEROS_SINK depends on BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR default n -endmenu +config BR2_PACKAGE_NETFLIX5_AUDIO_MIXER + bool "audio-mixer" + select BR2_PACKAGE_TREMOR + default n + +if BR2_PACKAGE_NETFLIX5_AUDIO_MIXER + +choice + bool "Audio Mixer type" + default BR2_PACKAGE_NETFLIX5_AUDIO_MIXER_SOFTWARE + help + Choose Audio Mixer type + +config BR2_PACKAGE_NETFLIX5_AUDIO_MIXER_SOFTWARE + bool "software" + help + Software Audio Mixer +config BR2_PACKAGE_NETFLIX5_AUDIO_MIXER_NEXUS + bool "nexus" + depends on BR2_PACKAGE_HAS_NEXUS + help + Nexus Audio Mixer + +endchoice + + +endif + +endmenu endif diff --git a/package/netflix5/netflix.pc b/package/netflix5/netflix.pc index 4f5b5362eae5..363ecd63f798 100644 --- a/package/netflix5/netflix.pc +++ b/package/netflix5/netflix.pc @@ -6,6 +6,6 @@ includedir=${prefix}/include/netflix Name: netflix Description: Netflix Requires: -Version: 5.1 +Version: 5.0.1 Libs: -L${libdir} -lnetflix Cflags: -I${includedir} diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 4b2cb59c1726..28705eaba208 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,14 +4,13 @@ # ################################################################################ -# TODO: only select WPEFramework plugins as dependency if wpeframework graphics backend is selected -NETFLIX5_VERSION = fd91f1b6905f9024ca04856601132a1d3da91845 +NETFLIX5_VERSION = c4da479ff9aae9cf03400b8c2b402d550d272fc3 + NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git NETFLIX5_LICENSE = PROPRIETARY NETFLIX5_DEPENDENCIES = freetype icu jpeg libpng libmng webp harfbuzz expat openssl c-ares libcurl graphite2 nghttp2 wpeframework gst1-plugins-base wpeframework-plugins NETFLIX5_INSTALL_TARGET = YES -NETFLIX5_INSTALL_STAGING = YES NETFLIX5_SUBDIR = netflix NETFLIX5_RESOURCE_LOC = $(call qstrip,${BR2_PACKAGE_NETFLIX5_RESOURCE_LOCATION}) @@ -40,16 +39,28 @@ NETFLIX5_CONF_OPTS = \ -DBUILD_DEBUG=OFF -DNRDP_HAS_GIBBON_QA=ON -DNRDP_HAS_MUTEX_STACK=ON -DNRDP_HAS_OBJECTCOUNT=ON \ -DBUILD_PRODUCTION=OFF -DNRDP_HAS_QA=ON -DBUILD_SMALL=OFF -DBUILD_SYMBOLS=ON -DNRDP_HAS_TRACING=OFF \ -DNRDP_CRASH_REPORTING=breakpad \ - -DNRDP_HAS_AUDIOMIXER=OFF \ - -DDPI_SINK_INTERFACE_OVERRIDE_APPBOOT=ON + -DDPI_SINK_INTERFACE_OVERRIDE_APPBOOT=ON \ + -DGIBBON_GRAPHICS_GL_WSYS=egl -ifeq ($(BR2_PACKAGE_NETFLIX5_LIB), y) +ifeq ($(BR2_PACKAGE_NETFLIX5_LIB), y) +NETFLIX5_INSTALL_STAGING = YES NETFLIX5_CONF_OPTS += -DGIBBON_MODE=shared NETFLIX5_FLAGS = -O3 -fPIC else NETFLIX5_CONF_OPTS += -DGIBBON_MODE=executable endif +ifeq ($(BR2_PACKAGE_NETFLIX5_AUDIO_MIXER_SOFTWARE), y) +NETFLIX5_CONF_OPTS += -DNRDP_HAS_AUDIOMIXER=ON \ + -DUSE_AUDIOMIXER_GST=ON +NETFLIX5_DEPENDENCIES += tremor +else ifeq ($(BR2_PACKAGE_NETFLIX5_AUDIO_MIXER_NEXUS), y) +NETFLIX5_CONF_OPTS += -DNRDP_HAS_AUDIOMIXER=ON \ + -DUSE_AUDIOMIXER_NEXUS=ON +else +NETFLIX5_CONF_OPTS += -DNRDP_HAS_AUDIOMIXER=OFF +endif + ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yy) NETFLIX5_CONF_OPTS += -DGIBBON_INPUT=wpeframework NETFLIX5_DEPENDENCIES = wpeframework-plugins @@ -73,10 +84,11 @@ else ifeq ($(BR2_PACKAGE_NETFLIX5_WESTEROS_SINK),y) endif ifeq ($(BR2_PACKAGE_RPI_USERLAND),y) - +NETFLIX5_CONF_OPTS += \ + -DGIBBON_GST_PLATFORM=rpi #TODO remove it once GIBBON_PLATFORM for rpi is ready ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yy) NETFLIX5_CONF_OPTS += \ - -DGIBBON_GRAPHICS=wpeframework + -DGIBBON_GRAPHICS=wpeframework else ifeq ($(BR2_PACKAGE_WESTEROS)$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),yn) NETFLIX5_CONF_OPTS += \ -DGIBBON_GRAPHICS=wayland-egl @@ -85,7 +97,7 @@ NETFLIX5_CONF_OPTS += \ -DGIBBON_GRAPHICS=rpi-egl endif NETFLIX5_CONF_OPTS += \ - -DGIBBON_PLATFORM=rpi +# -DGIBBON_PLATFORM=rpi //Enable once port platform layer ifeq ($(BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_GL)$(BR2_PACKAGE_NETFLIX5_WESTEROS_SINK),yn) NETFLIX5_CONF_OPTS += \ -DGST_VIDEO_RENDERING=gl @@ -212,8 +224,6 @@ NETFLIX5_CONF_OPTS += \ -DCMAKE_C_FLAGS="$(TARGET_CFLAGS) $(NETFLIX5_FLAGS)" \ -DCMAKE_CXX_FLAGS="$(TARGET_CXXFLAGS) $(NETFLIX5_FLAGS)" - - define NETFLIX5_FIX_CONFIG_XMLS mkdir -p $(@D)/netflix/src/platform/gibbon/data/etc/conf cp -f $(@D)/netflix/resources/configuration/common.xml $(@D)/netflix/src/platform/gibbon/data/etc/conf/common.xml @@ -224,10 +234,16 @@ NETFLIX5_POST_EXTRACT_HOOKS += NETFLIX5_FIX_CONFIG_XMLS ifeq ($(BR2_PACKAGE_NETFLIX5_LIB),y) +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),y) +define NETFLIX5_INSTALL_WPEFRAMEWORK_XML + cp $(@D)/partner/graphics/wpeframework/graphics.xml $(TARGET_DIR)/root/Netflix/etc/conf +endef +endif + define NETFLIX5_INSTALL_STAGING_CMDS make -C $(@D)/netflix install $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/libnetflix.so $(STAGING_DIR)/usr/lib - $(INSTALL) -D package/netflix/netflix.pc $(STAGING_DIR)/usr/lib/pkgconfig/netflix.pc + $(INSTALL) -D package/netflix5/netflix.pc $(STAGING_DIR)/usr/lib/pkgconfig/netflix.pc mkdir -p $(STAGING_DIR)/usr/include/netflix/src mkdir -p $(STAGING_DIR)/usr/include/netflix/nrdbase mkdir -p $(STAGING_DIR)/usr/include/netflix/nrd @@ -258,7 +274,8 @@ define NETFLIX5_INSTALL_STAGING_CMDS cp -r $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu $(TARGET_DIR)/root/Netflix cp -r $(@D)/netflix/src/platform/gibbon/resources $(TARGET_DIR)/root/Netflix cp -r $(@D)/netflix/resources/configuration/* $(TARGET_DIR)/root/Netflix/etc/conf - cp $(@D)/partner/graphics/wpeframework/graphics.xml $(TARGET_DIR)/root/Netflix/etc/conf + + $(NETFLIX5_INSTALL_WPEFRAMEWORK_XML) cp $(@D)/netflix/src/platform/gibbon/resources/gibbon/icu/icudt58l/debug/unames.icu $(TARGET_DIR)/root/Netflix/icu/icudt58l cp $(@D)/netflix/src/platform/gibbon/*.js* $(TARGET_DIR)/root/Netflix/resources/js cp $(@D)/netflix/src/platform/gibbon/resources/default/PartnerBridge.js $(TARGET_DIR)/root/Netflix/resources/js @@ -273,7 +290,6 @@ else define NETFLIX5_INSTALL_TARGET_CMDS $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/netflix $(TARGET_DIR)/usr/bin - $(INSTALL) -m 755 $(@D)/netflix/src/platform/gibbon/manufss $(TARGET_DIR)/usr/bin endef endif diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index de30a725be2f..35695b964954 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -8,7 +8,7 @@ WPEFRAMEWORK_NETFLIX_VERSION = 463b00b225748667cc60948ba2a1f1ef0799d988 ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = add252eb73e8a763d7d6655233eda58915f68bf2 +WPEFRAMEWORK_NETFLIX_VERSION = 45e1e6ad2ecc7179dc29212a1a807e8fc1f19cff endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git @@ -18,6 +18,7 @@ WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework ifeq ($(BR2_PACKAGE_NETFLIX5_LIB),y) WPEFRAMEWORK_NETFLIX_DEPENDENCIES = netflix5 +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DNETFLIX_VERSION_5=true endif ifeq ($(BR2_PACKAGE_NETFLIX_LIB),y) From 4d4835187027f566207089e737cddfd90747e473 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 21 Dec 2018 10:46:08 +0100 Subject: [PATCH 595/614] [SDK] Allow WPEFramework to rely on SDK dependencies. --- package/Config.in | 1 + package/sdk/Config.in | 6 ++++++ package/sdk/sdk.mk | 7 +++++++ package/uma-sdk/Config.in | 2 +- 4 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 package/sdk/Config.in create mode 100644 package/sdk/sdk.mk diff --git a/package/Config.in b/package/Config.in index ab5e6a396f15..55dc08595f39 100644 --- a/package/Config.in +++ b/package/Config.in @@ -420,6 +420,7 @@ endmenu source "package/greenpeak/Config.in" source "package/gvfs/Config.in" source "package/hdparm/Config.in" + source "package/sdk/Config.in" source "package/horizon-sdk/Config.in" source "package/vip-sdk/Config.in" source "package/vss-sdk/Config.in" diff --git a/package/sdk/Config.in b/package/sdk/Config.in new file mode 100644 index 000000000000..dcfc0d2b42ee --- /dev/null +++ b/package/sdk/Config.in @@ -0,0 +1,6 @@ +config BR2_PACKAGE_HAS_SDK + bool + +config BR2_PACKAGE_SDK_INSTALL + depends on BR2_PACKAGE_HAS_SDK + string diff --git a/package/sdk/sdk.mk b/package/sdk/sdk.mk new file mode 100644 index 000000000000..9af61531eb93 --- /dev/null +++ b/package/sdk/sdk.mk @@ -0,0 +1,7 @@ +################################################################################ +# +# sdk +# +################################################################################ + +$(eval $(virtual-package)) diff --git a/package/uma-sdk/Config.in b/package/uma-sdk/Config.in index 69af2b1655c8..574a555ea219 100644 --- a/package/uma-sdk/Config.in +++ b/package/uma-sdk/Config.in @@ -19,7 +19,7 @@ config BR2_PACKAGE_PROVIDES_LIBGLES default "uma-sdk" config BR2_PACKAGE_SDK_INSTALL - bool + string default "uma-sdk" endif From 2bac55aef1512b7d0d5d4a0efc8ee5d494d8a7ea Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 21 Dec 2018 11:58:35 +0100 Subject: [PATCH 596/614] [NETFLIX5] Make sure the NOS builds again. --- package/netflix5/netflix5.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/netflix5/netflix5.mk b/package/netflix5/netflix5.mk index 28705eaba208..ee362082fd9b 100644 --- a/package/netflix5/netflix5.mk +++ b/package/netflix5/netflix5.mk @@ -4,7 +4,7 @@ # ################################################################################ -NETFLIX5_VERSION = c4da479ff9aae9cf03400b8c2b402d550d272fc3 +NETFLIX5_VERSION = 3b48ee3950522a08f28a84a2cb4a51d493fa0d69 NETFLIX5_SITE = git@github.com:Metrological/netflix.git NETFLIX5_SITE_METHOD = git From 2cae0931a4e6affe50f3ad74b62aaf723b299200 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 21 Dec 2018 13:18:18 +0100 Subject: [PATCH 597/614] [CMAKE] Use the new CMake structure for the WPEFramework --- .../wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk | 2 +- .../wpeframework-cdmi-playready-nexus-svp.mk | 2 +- package/wpe/wpeframework-cobalt/wpeframework-cobalt.mk | 2 +- package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk | 2 +- package/wpe/wpeframework-launcher/wpeframework-launcher.mk | 2 +- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- .../wpe/wpeframework-provisioning/wpeframework-provisioning.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk index 98cb76f8ae48..98db5022800a 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-nagra/wpeframework-cdmi-nagra.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_NAGRA_VERSION = 1af93b65f3a3a1f7c730a233dc79e36183afec83 +WPEFRAMEWORK_CDMI_NAGRA_VERSION = 525b4da61d2f515cd0d92421bf87e3cfaf0af088 WPEFRAMEWORK_CDMI_NAGRA_SITE_METHOD = git WPEFRAMEWORK_CDMI_NAGRA_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Nagra.git WPEFRAMEWORK_CDMI_NAGRA_INSTALL_STAGING = NO diff --git a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk index 71ab82d9891c..84c4aed0eeb9 100644 --- a/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk +++ b/package/wpe/wpeframework-cdmi/wpeframework-cdmi-playready-nexus-svp/wpeframework-cdmi-playready-nexus-svp.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = 5a51c1a349f65b9a9932e8dacd4390291de657df +WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_VERSION = 193cf91aa54cfd120847640784f9334c5d431398 WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE_METHOD = git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_SITE = git@github.com:WebPlatformForEmbedded/OCDM-Playready-Nexus-SVP.git WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-cobalt/wpeframework-cobalt.mk b/package/wpe/wpeframework-cobalt/wpeframework-cobalt.mk index 694afc03ec73..b0ffee206386 100644 --- a/package/wpe/wpeframework-cobalt/wpeframework-cobalt.mk +++ b/package/wpe/wpeframework-cobalt/wpeframework-cobalt.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_COBALT_VERSION = 54b11df844e6e0d4b2e39e7e224542597eb752ca +WPEFRAMEWORK_COBALT_VERSION = e1c0582220af8ca2ca963bdbd47f138cf929e673 WPEFRAMEWORK_COBALT_SITE_METHOD = git WPEFRAMEWORK_COBALT_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginCobalt.git WPEFRAMEWORK_COBALT_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk index 872871283b14..234386949415 100644 --- a/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk +++ b/package/wpe/wpeframework-dialserver/wpeframework-dialserver.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_DIALSERVER_VERSION = 9d1c1ad906d7098f3d732a360bd9a1b9ba0188b5 +WPEFRAMEWORK_DIALSERVER_VERSION = 00b66a2334d1c60bc7a703f89b435c0c3b53f6b1 WPEFRAMEWORK_DIALSERVER_SITE_METHOD = git WPEFRAMEWORK_DIALSERVER_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginDIAL.git WPEFRAMEWORK_DIALSERVER_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk index 83729cfb8645..595c9a08ec2f 100644 --- a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk +++ b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk @@ -1,4 +1,4 @@ -WPEFRAMEWORK_LAUNCHER_VERSION = bcf715d167419c87662174f4ecd99bf11f6b2924 +WPEFRAMEWORK_LAUNCHER_VERSION = 94e4d81cfdc4ac2e169ae95955e19ee8e98f2ea7 WPEFRAMEWORK_LAUNCHER_SITE_METHOD = git WPEFRAMEWORK_LAUNCHER_SITE = git@github.com:WebPlatformForEmbedded/WPEFPluginLauncher.git WPEFRAMEWORK_LAUNCHER_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index b84b3666df55..9cf814709429 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 7995425102cc5156a0c6c4481d72c06eb5e31eac +WPEFRAMEWORK_PLUGINS_VERSION = 5b10229394f2abd1ee569ea6bab707e39273a3e8 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng diff --git a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk index 0d313c8a25c0..a4af30e8ea40 100644 --- a/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk +++ b/package/wpe/wpeframework-provisioning/wpeframework-provisioning.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PROVISIONING_VERSION = 2eef3c5185a405fdc53a4bb731de14b849048ff8 +WPEFRAMEWORK_PROVISIONING_VERSION = 4b35279c8c567dc0be0ad54b1555f3e3168e05bd WPEFRAMEWORK_PROVISIONING_SITE_METHOD = git WPEFRAMEWORK_PROVISIONING_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginProvisioning.git WPEFRAMEWORK_PROVISIONING_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index e123d3d70bb5..560c21d7dfc3 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 0b9c5bbbefc0c121aef2d36805e14360a8f98254 +WPEFRAMEWORK_VERSION = 33b46c273ad75f1f87de1ce840a805225a092c6e WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From f067bcfbc56dfa1e545e1ac4622dd04937667d46 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 21 Dec 2018 15:05:11 +0100 Subject: [PATCH 598/614] [EXPLORA] Change to the SDK. Needs to be a string i.s.o. a boolean. --- package/explora-sdk/Config.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/explora-sdk/Config.in b/package/explora-sdk/Config.in index c011638c9319..b0682780aabf 100644 --- a/package/explora-sdk/Config.in +++ b/package/explora-sdk/Config.in @@ -19,7 +19,7 @@ config BR2_PACKAGE_PROVIDES_LIBGLES default "explora-sdk" config BR2_PACKAGE_SDK_INSTALL - bool + string default "explora-sdk" endif From 80109516583a7726aa9f7dc94af4560d2eaeb292 Mon Sep 17 00:00:00 2001 From: modeveci Date: Fri, 21 Dec 2018 15:21:19 +0100 Subject: [PATCH 599/614] [bcm-refsw]: add frontend 45308 for bcm7271 platform --- package/bcm-refsw/platforms.inc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/package/bcm-refsw/platforms.inc b/package/bcm-refsw/platforms.inc index fec0acb3b3e6..b14cb8e9f040 100644 --- a/package/bcm-refsw/platforms.inc +++ b/package/bcm-refsw/platforms.inc @@ -14,6 +14,8 @@ BCM_REFSW_PLATFORM_VC = vc5 BCM_REFSW_BCHP_CHIP = 7271 BCM_REFSW_BCHP_VER_LOWER = b0 BCM_REFSW_PLATFORM_SECURITY_ZEUS_VERSION = 4 +BCM_REFSW_MAKE_ENV += \ + NEXUS_FRONTEND_45308=y else ifeq ($(BR2_PACKAGE_BCM_REFSW_PLATFORM_72604),y) BCM_REFSW_PLATFORM = 97260 BCM_REFSW_PLATFORM_REV = A0 From 26a0acf4d078fee032354021ad4685704dc6564c Mon Sep 17 00:00:00 2001 From: modeveci Date: Fri, 21 Dec 2018 17:14:10 +0100 Subject: [PATCH 600/614] [explora]: update defconfig --- configs/explora_bcm7271_wpe_ml_defconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/configs/explora_bcm7271_wpe_ml_defconfig b/configs/explora_bcm7271_wpe_ml_defconfig index 0ffbcf547d3a..1573a4920286 100644 --- a/configs/explora_bcm7271_wpe_ml_defconfig +++ b/configs/explora_bcm7271_wpe_ml_defconfig @@ -72,20 +72,21 @@ BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE="18" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE="1" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=y BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORIES=y -BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="200" +BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX="100" BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT="2" BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC=y BR2_PACKAGE_WPEFRAMEWORK_MONITOR=y BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY=y BR2_PACKAGE_WPEFRAMEWORK_CDMI_PLAYREADY_NEXUS_SVP=y +# BR2_PACKAGE_WPEFRAMEWORK_CDMI_WIDEVINE_NEXUS_SVP is not set BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR=y BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT=y BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC=y BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL=y BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER=y -BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://127.0.0.1:8080" +BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL="http://www.youtube.com/tv" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE="512m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE="databaseprocess:50m,networkprocess:100m,webprocess:512m,rpcprocess:50m" BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT=y @@ -108,3 +109,4 @@ BR2_TARGET_ROOTFS_EXT2=y BR2_TARGET_ROOTFS_EXT2_4=y BR2_TARGET_ROOTFS_EXT2_LABEL="rootfs" BR2_TARGET_ROOTFS_INITRAMFS=y +# BR2_TARGET_ROOTFS_TAR is not set From ef341f7d81c12b776e30fdc5d11c145d9ba75bc7 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Fri, 21 Dec 2018 18:10:44 +0100 Subject: [PATCH 601/614] [PLUGINLauncher] Fix type in repository name. --- package/wpe/wpeframework-launcher/wpeframework-launcher.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk index 595c9a08ec2f..6fc069da1170 100644 --- a/package/wpe/wpeframework-launcher/wpeframework-launcher.mk +++ b/package/wpe/wpeframework-launcher/wpeframework-launcher.mk @@ -1,6 +1,6 @@ WPEFRAMEWORK_LAUNCHER_VERSION = 94e4d81cfdc4ac2e169ae95955e19ee8e98f2ea7 WPEFRAMEWORK_LAUNCHER_SITE_METHOD = git -WPEFRAMEWORK_LAUNCHER_SITE = git@github.com:WebPlatformForEmbedded/WPEFPluginLauncher.git +WPEFRAMEWORK_LAUNCHER_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginLauncher.git WPEFRAMEWORK_LAUNCHER_INSTALL_STAGING = YES WPEFRAMEWORK_LAUNCHER_DEPENDENCIES = wpeframework From 0b65803a14de7de7ed54b533c29afb8a7c1a05b2 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Mon, 24 Dec 2018 15:46:42 +0100 Subject: [PATCH 602/614] [WPEFRAMEWORK-PLUGINS] Continue cleanup. Move from redundant setting WPEFRAMEWORK_PLUGINS_ to PLUGINS_ --- .../wpeframework-plugins.mk | 244 +++++++++--------- 1 file changed, 122 insertions(+), 122 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 9cf814709429..17f3a9916c3f 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -18,92 +18,92 @@ endif # libprovision ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMMANDER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMMANDER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMMANDER=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DEVICEINFO),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DEVICEINFO=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_DEVICEINFO=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DSRESOLUTION),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DSRESOLUTION=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_DSRESOLUTION=ON ifeq ($(BR2_PACKAGE_DSRESOLUTION_WITH_DUMMY_DSHAL), y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DDSRESOLUTION_WITH_DUMMY_DSHAL=ON endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_720P),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=720p +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_RESOLUTION=720p else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_1080P),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=1080p50Hz +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_RESOLUTION=1080p50Hz else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_RESOLUTION_2160P),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_RESOLUTION=2160p50Hz +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_RESOLUTION=2160p50Hz endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DHCPSERVER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DHCPSERVER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_DHCPSERVER=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_DICTIONARY),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_DICTIONARY=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_DICTIONARY=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_IOCONNECTOR=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN),) - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_PIN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN} - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_CALLSIGN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_CALLSIGN} - WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_IOCONNECTOR_PAIRING_PRODUCER=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PRODUCER} + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_IOCONNECTOR_PAIRING_PIN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PIN} + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_IOCONNECTOR_PAIRING_CALLSIGN=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_CALLSIGN} + WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_IOCONNECTOR_PAIRING_PRODUCER=${BR2_PACKAGE_WPEFRAMEWORK_IOCONNECTOR_PAIRING_PRODUCER} endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_EGLTEST),y) -WPEFRAMEWORK_COMMON_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_EGLTEST=ON +WPEFRAMEWORK_COMMON_CONF_OPTS += -DPLUGIN_EGLTEST=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_FRONTPANEL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_FRONTPANEL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_FRONTPANEL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_LOCATIONSYNC=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_LOCATIONSYNC_URI=${BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_LOCATIONSYNC=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_LOCATIONSYNC_URI=${BR2_PACKAGE_WPEFRAMEWORK_LOCATIONSYNC_URI} endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_MONITOR=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_MONITOR=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_WEBKIT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_WEBKIT} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_WEBKIT} endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_YOUTUBE_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_YOUTUBE_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_YOUTUBE} endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_APPS_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_APPS} endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_UX_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_UX} endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_MONITOR_NETFLIX),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_NETFLIX} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_NETFLIX=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_NETFLIX_MEMORYLIMIT=${BR2_PACKAGE_WPEFRAMEWORK_MONITOR_NETFLIX} endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_NETWORKCONTROL),y) ifeq ($(BR2_TARGET_GENERIC_NETWORK),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_NETWORKCONTROL_SYSTEM_NETWORK=ON endif -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETWORKCONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_NETWORKCONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_AUTOSTART=true -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_OOP=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_OOP=true ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_USER=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_USER=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_USER) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_OPENCDMI_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_CDMI_GROUP) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_CDMI_CLEARKEY),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_OPENCDMI_CLEARKEY=ON @@ -136,9 +136,9 @@ endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_AUTOSTART=true -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_BLUETOOTH_OOP=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH_OOP=true ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD define WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD @@ -149,152 +149,152 @@ endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_REMOTECONTROL=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_DEVINPUT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_DEVINPUT=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_REMOTECONTROL_DEVINPUT=ON WPEFRAMEWORK_PLUGINS_DEPENDENCIES += udev endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_IR=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_REMOTECONTROL_IR=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_REMOTECONTROL_CODEMASK="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_REMOTECONTROL_CODEMASK="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_REMOTECONTROL_IR_CODEMASK))" endif endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_SNAPSHOT),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += libpng -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_SNAPSHOT=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_SNAPSHOT=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TIMESYNC),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TIMESYNC=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TIMESYNC=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TRACECONTROL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TRACECONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TRACECONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpewebkit -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_AUTOSTART=true else -WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_AUTOSTART=false +WPEFRAMEWORK_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_AUTOSTART=false endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_STARTURL=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_STARTURL=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_STARTURL) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USERAGENT) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_MEMORYPROFILE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_MEMORYPROFILE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPROFILE) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_MEMORYPRESSURE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_MEMORYPRESSURE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEMORYPRESSURE) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_MEDIADISKCACHE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_MEDIADISKCACHE=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_MEDIADISKCACHE=true endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_DISKCACHE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_DISKCACHE=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_DISKCACHE) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_XHRCACHE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_XHRCACHE=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_XHRCACHE=false endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_CLIENTIDENTIFIER=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_CLIENTIDENTIFIER=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_CLIENTIDENTIFIER) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_TRANSPARENT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_TRANSPARENT=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_TRANSPARENT=true else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_TRANSPARENT=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_TRANSPARENT=false endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_THREADEDPAINTING=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_THREADEDPAINTING=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_THREADEDPAINTING) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_USER=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_USER=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_USER) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_GROUP=$(BR2_PACKAGE_WPEFRAMEWORK_WEBKITBROWSER_GROUP) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_YOUTUBE=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_YOUTUBE=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_YOUTUBE_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_YOUTUBE_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_YOUTUBE_USERAGENT) endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_APPS=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_APPS=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_APPS_AUTOSTART=true endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_APPS_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_APPS_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_APPS_USERAGENT) endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBKITBROWSER_UX=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBKITBROWSER_UX=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_UX_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_UX_AUTOSTART=true endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_UX_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_UX_USERAGENT=$(BR2_PACKAGE_WPEFRAMEWORK_UX_USERAGENT) endif endif endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_RTSPCLIENT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RTSPCLIENT=ON +ifeq ($(BR2_PACKAGE_PLUGIN_RTSPCLIENT),y) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_RTSPCLIENT=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBPROXY),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBPROXY=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBPROXY=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSERVER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBSERVER=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_WEBSERVER_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBSERVER_PATH=$(BR2_PACKAGE_WPEFRAMEWORK_WEBSERVER_PATH) endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WEBSHELL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WEBSHELL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WEBSHELL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_WIFICONTROL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_WIFICONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_WIFICONTROL=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_POWER=ON ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_POWER_AUTOSTART=true endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_GPIOPIN=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_POWER_GPIOPIN=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOPIN) endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_POWER_GPIOTYPE=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_POWER_GPIOTYPE=$(BR2_PACKAGE_WPEFRAMEWORK_POWER_GPIOTYPE) endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER=ON WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DSTREAMER_IMPLEMENTATION=QAM -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_FRONTENDS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_FRONTENDS)) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_DECODERS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DECODERS)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_FRONTENDS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_FRONTENDS)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_DECODERS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DECODERS)) ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_DVB),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_STANDARD=DVB +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_STANDARD=DVB else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_STANDARD=ATSC +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_STANDARD=ATSC endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_SI_PARSING),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_SI_PARSING=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_SI_PARSING=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_TS_SCANNING),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_TS_SCANNING=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_STREAMER_HOME_TS=$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_HOME_TS) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_TS_SCANNING=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_STREAMER_HOME_TS=$(BR2_PACKAGE_WPEFRAMEWORK_STREAMER_HOME_TS) endif endif @@ -308,115 +308,115 @@ WPEFRAMEWORK_PLUGINS_DEPENDENCIES += wpetvplatform-bcm else ifeq ($(BR2_PACKAGE_TVPLATFORM_LINUXTV), y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_LINUXTV=ON endif -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL=ON -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_HOME_TS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_HOME_TS)) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_HOME_TS=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_HOME_TS)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_FREQUENCY_LIST=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_FREQUENCY_LIST)) ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_DVB=true -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE)) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_DVB=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_COUNTRY_CODE=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_CODE)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_COUNTRY_REGION_ID=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_COUNTRY_REGION_ID)) ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_ENABLE_BOUQUET_PARSING), y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_ENABLE_BOUQUET_PARSING=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_ENABLE_BOUQUET_PARSING=true endif ifeq ($(BR2_PACKAGE_BCM_REFSW), y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM)) +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_TUNE_PARAM=$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGINS_TVCONTROL_TUNE_PARAM)) endif else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_TVCONTROL_DVB=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_TVCONTROL_DVB=false endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_TVCONTROL_DVB),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += dvb-apps endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_RPCLINK),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RPCLINK=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_RPCLINK=ON endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR=ON ifeq ($(BR2_PACKAGE_WESTEROS),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += westeros -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Wayland +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_IMPLEMENTATION=Wayland else ifeq ($(BR2_PACKAGE_BCM_REFSW),y) WPEFRAMEWORK_PLUGINS_DEPENDENCIES += bcm-refsw -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus else ifeq ($(BR2_PACKAGE_HAS_NEXUS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_IMPLEMENTATION=Nexus else ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IMPLEMENTATION=RPI +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_IMPLEMENTATION=RPI else -$(error Missing a compositor implemtation, please provide one or disable WPEFRAMEWORK_PLUGIN_COMPOSITOR) +$(error Missing a compositor implemtation, please provide one or disable PLUGIN_COMPOSITOR) endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_OUTOFPROCESS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_OUTOFPROCESS=true else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_OUTOFPROCESS=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_OUTOFPROCESS=false endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_AUTOSTART),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_AUTOSTART=true else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_AUTOSTART=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_AUTOSTART=false endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_NEXUS_SERVER),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_NXSERVER=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_NXSERVER=ON ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_IRMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_IRMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_IRMODE))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_BOXMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_BOXMODE="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_BOXMODE))" endif ifneq ($(BR2_PACKAGE_BCM_REFSW_SAGE_PATH),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SAGE_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_SAGE_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_SAGE_PATH))" endif ifneq ($(BR2_PACKAGE_BCM_REFSW_PAK_PATH),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_PAK_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_PAK_PATH))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_PAK_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_PAK_PATH))" endif ifneq ($(BR2_PACKAGE_BCM_REFSW_DRM_PATH),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_DRM_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_DRM_PATH))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_DRM_PATH="$(call qstrip,$(BR2_PACKAGE_BCM_REFSW_DRM_PATH))" endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_NONE),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="None" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_SVP="None" else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_VIDEO),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="Video" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_SVP="Video" else ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_SVP_ALL),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_SVP="All" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_SVP="All" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_GFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_GFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_GFX2="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_GFX2="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_GFX2))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_RESTRICTED="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_RESTRICTED="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_RESTRICTED))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_MAIN="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_MAIN="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_MAIN))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_EXPORT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_EXPORT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_EXPORT))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_SECUREGFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_SECUREGFX="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_SECUREGFX))" endif ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT),) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_MEMORY_CLIENT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT))" +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_MEMORY_CLIENT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_MEMORY_CLIENT))" endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=false +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=false else -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=true +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_ALLOW_UNAUTHENTICATED_CLIENTS=true endif endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_VIRTUALINPUT),y) -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_VIRTUALINPUT=ON +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_VIRTUALINPUT=ON endif -WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_COMPOSITOR_HARDWAREREADY=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY} +WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_COMPOSITOR_HARDWAREREADY=${BR2_PACKAGE_WPEFRAMEWORK_COMPOSITOR_HARDWAREREADY} define WPEFRAMEWORK_COMPOSITOR_POST_TARGET_REMOVE_HEADERS rm -rf $(TARGET_DIR)/usr/include/WPEFramework From 293b9362ee36754863b874c594fdb1fb17379cfe Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 3 Jan 2019 16:00:55 +0100 Subject: [PATCH 603/614] [WPEFRAMEWORK] Bumps Plugins and Netflix5 plugin --- package/wpe/wpeframework-netflix/wpeframework-netflix.mk | 2 +- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 35695b964954..5746cf7e0a63 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -8,7 +8,7 @@ WPEFRAMEWORK_NETFLIX_VERSION = 463b00b225748667cc60948ba2a1f1ef0799d988 ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = 45e1e6ad2ecc7179dc29212a1a807e8fc1f19cff +WPEFRAMEWORK_NETFLIX_VERSION = b45d9e8a19ec02ff03a0e25a99e75e655d0f2e78 endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index 17f3a9916c3f..a41088e89c88 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 5b10229394f2abd1ee569ea6bab707e39273a3e8 +WPEFRAMEWORK_PLUGINS_VERSION = 19df029b06567f036888554694237009159e0877 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng From ba32963fdabe0cd2630984b4f73c96d2281a758b Mon Sep 17 00:00:00 2001 From: Sander van der Maar Date: Thu, 3 Jan 2019 18:36:47 +0100 Subject: [PATCH 604/614] [WPEFRAMEWORK] Adds Unit Tests --- package/wpe/wpeframework-devtools/Config.in | 6 ++++++ package/wpe/wpeframework-devtools/wpeframework-devtools.mk | 5 +++++ package/wpe/wpeframework/wpeframework.mk | 2 +- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/package/wpe/wpeframework-devtools/Config.in b/package/wpe/wpeframework-devtools/Config.in index e20c64635efc..f4745ae2e04a 100644 --- a/package/wpe/wpeframework-devtools/Config.in +++ b/package/wpe/wpeframework-devtools/Config.in @@ -78,6 +78,12 @@ config BR2_PACKAGE_WPEFRAMEWORK_LINUX_ONEWIRE help Test application for the Core (Netlink/Connector) functionality. +config BR2_PACKAGE_WPEFRAMEWORK_TEST_UNITTESTS + select BR2_PACKAGE_GTEST + bool "Unit Tests" + help + Builds Unit Tests + endmenu endmenu diff --git a/package/wpe/wpeframework-devtools/wpeframework-devtools.mk b/package/wpe/wpeframework-devtools/wpeframework-devtools.mk index 438eebcff437..ade3bab84fda 100644 --- a/package/wpe/wpeframework-devtools/wpeframework-devtools.mk +++ b/package/wpe/wpeframework-devtools/wpeframework-devtools.mk @@ -17,3 +17,8 @@ endif ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_LINUX_ONEWIRE),y) WPEFRAMEWORK_CONF_OPTS += -DWPEFRAMEWORK_TEST_APPS=ON -DWPEFRAMEWORK_TEST_LINUX1W=ON endif + +ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_TEST_UNITTESTS),y) +WPEFRAMEWORK_DEPENDENCIES += gtest +WPEFRAMEWORK_CONF_OPTS += -DBUILD_TESTS=ON +endif diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index 560c21d7dfc3..cbef9066c5c2 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 33b46c273ad75f1f87de1ce840a805225a092c6e +WPEFRAMEWORK_VERSION = 6a91c8e99d7fe16ef95255b5fb4e8aeff1654690 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From f8732d5e5410a8d31dd469c45fa0bcfe3685b7f4 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 3 Jan 2019 18:49:17 +0100 Subject: [PATCH 605/614] [AVN] Bump AVN package and client to use the new CMake structure. --- package/avn-client/avn-client.mk | 2 +- package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/avn-client/avn-client.mk b/package/avn-client/avn-client.mk index a03d9a4642d8..677b856937b8 100644 --- a/package/avn-client/avn-client.mk +++ b/package/avn-client/avn-client.mk @@ -4,7 +4,7 @@ # ################################################################################ -AVN_CLIENT_VERSION = 67dfdb99668cca7242cfd2f02b16bab97ec937bd +AVN_CLIENT_VERSION = a340713b4a5475266fd5d1504f43edb27871b3e8 AVN_CLIENT_SITE_METHOD = git AVN_CLIENT_SITE = git@github.com:Metrological/avn-nanoclient.git AVN_CLIENT_INSTALL_STAGING = YES diff --git a/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk b/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk index c8c68f1bbc39..6b53de36095c 100644 --- a/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk +++ b/package/wpe/wpeframework-avnclient/wpeframework-avnclient.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_AVNCLIENT_VERSION = 7d3ded06b8fb4b77881e821d1426d603cba67d0a +WPEFRAMEWORK_AVNCLIENT_VERSION = d1af171864be56ab1c01be2c136e6b310d18449f WPEFRAMEWORK_AVNCLIENT_SITE_METHOD = git WPEFRAMEWORK_AVNCLIENT_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginAVNClient.git WPEFRAMEWORK_AVNCLIENT_INSTALL_STAGING = YES From c3d36e12b81a4ab6fd70f26a5a9204852d153cf6 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Thu, 3 Jan 2019 19:05:44 +0100 Subject: [PATCH 606/614] [NETFLIX] Bump 4.X and 5.X to the new CMake structures. --- .../wpeframework-netflix.mk | 47 ++++++++----------- 1 file changed, 19 insertions(+), 28 deletions(-) diff --git a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk index 5746cf7e0a63..cc3ef5bf864d 100644 --- a/package/wpe/wpeframework-netflix/wpeframework-netflix.mk +++ b/package/wpe/wpeframework-netflix/wpeframework-netflix.mk @@ -3,28 +3,19 @@ # wpeframework-netflix # ################################################################################ - -WPEFRAMEWORK_NETFLIX_VERSION = 463b00b225748667cc60948ba2a1f1ef0799d988 - ifeq ($(BR2_PACKAGE_NETFLIX5),y) # Netflix 5 has a little different API, use "netflix5" branch for now. -WPEFRAMEWORK_NETFLIX_VERSION = b45d9e8a19ec02ff03a0e25a99e75e655d0f2e78 +WPEFRAMEWORK_NETFLIX_VERSION = 34d9e0a438d3e3005e3bca4b712c230028e0109a +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DNETFLIX_VERSION_5=true +WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework netflix5 +else +WPEFRAMEWORK_NETFLIX_VERSION = d9d1f1726f33480f5ae6b4a420742f6e901c733b +WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework netflix endif WPEFRAMEWORK_NETFLIX_SITE_METHOD = git WPEFRAMEWORK_NETFLIX_SITE = git@github.com:WebPlatformForEmbedded/WPEPluginNetflix.git WPEFRAMEWORK_NETFLIX_INSTALL_STAGING = YES -WPEFRAMEWORK_NETFLIX_DEPENDENCIES = wpeframework - -ifeq ($(BR2_PACKAGE_NETFLIX5_LIB),y) -WPEFRAMEWORK_NETFLIX_DEPENDENCIES = netflix5 -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DNETFLIX_VERSION_5=true -endif - -ifeq ($(BR2_PACKAGE_NETFLIX_LIB),y) -WPEFRAMEWORK_NETFLIX_DEPENDENCIES = netflix -endif - WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DBUILD_REFERENCE=${WPEFRAMEWORK_NETFLIX_VERSION} @@ -34,30 +25,30 @@ WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DCMAKE_CXX_FLAGS='-g -Og' endif # TODO: Do not have WPEFRAMEWORK versioning yet -# WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_NETFLIX_VERSION="$(WEBBRIDGE_BUILD_VERSION)-dev" +# WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_VERSION="$(WEBBRIDGE_BUILD_VERSION)-dev" -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_AUTOSTART),y) -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_AUTOSTART=true +ifeq ($(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_AUTOSTART),y) +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_AUTOSTART=true else -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_AUTOSTART=false +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_AUTOSTART=false endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_MODEL),) -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_MODEL="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_MODEL))" +ifneq ($(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_MODEL),) +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_MODEL="$(call qstrip,$(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_MODEL))" endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_SUSPEND_TIMEOUT),) -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_SUSPENDTIMEOUT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_SUSPEND_TIMEOUT))" +ifneq ($(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_SUSPEND_TIMEOUT),) +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_SUSPENDTIMEOUT="$(call qstrip,$(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_SUSPEND_TIMEOUT))" endif -ifneq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_RESUME_TIMEOUT),) -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_RESUMETIMEOUT="$(call qstrip,$(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_RESUME_TIMEOUT))" +ifneq ($(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_RESUME_TIMEOUT),) +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_RESUMETIMEOUT="$(call qstrip,$(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_RESUME_TIMEOUT))" endif -ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_PLUGIN_NETFLIX_FULLHD),y) -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_FULLHD=true +ifeq ($(BR2_PACKAGE_PLUGIN_NETFLIX_NETFLIX_FULLHD),y) +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_FULLHD=true else -WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DWPEFRAMEWORK_PLUGIN_FULLHD=false +WPEFRAMEWORK_NETFLIX_CONF_OPTS += -DPLUGIN_NETFLIX_FULLHD=false endif $(eval $(cmake-package)) From 9b5fc1f708fadaf6fc3b9933f147417c51dd5e9c Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Mon, 7 Jan 2019 07:22:41 +0100 Subject: [PATCH 607/614] [WPEBackend-RDK] Bump. There is nolonger a virtualkeyboard, it is called WPEFrameworkVirtualInput. --- package/wpe/wpebackend-rdk/wpebackend-rdk.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk index 7b81fbbc428b..809908eed95d 100644 --- a/package/wpe/wpebackend-rdk/wpebackend-rdk.mk +++ b/package/wpe/wpebackend-rdk/wpebackend-rdk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEBACKEND_RDK_VERSION = 99c0f3fafd6e71552bd42e89540175d646e15b7d +WPEBACKEND_RDK_VERSION = 0a7467f2d253a4803e7bc2b00aa4c79eed6d10f5 WPEBACKEND_RDK_SITE = $(call github,WebPlatformForEmbedded,WPEBackend-rdk,$(WPEBACKEND_RDK_VERSION)) WPEBACKEND_RDK_INSTALL_STAGING = YES WPEBACKEND_RDK_DEPENDENCIES = wpebackend libglib2 From d50f56bebc06dfe321a98b92b70116e714ab06d8 Mon Sep 17 00:00:00 2001 From: Pierre Wielders Date: Mon, 7 Jan 2019 08:47:34 +0100 Subject: [PATCH 608/614] [WPEFRAMEWORK/WPEFRAMEWORKPLUGINS] Bump. Fix Wifi. --- package/wpe/wpeframework-plugins/wpeframework-plugins.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index a41088e89c88..fbb0821ae55f 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = 19df029b06567f036888554694237009159e0877 +WPEFRAMEWORK_PLUGINS_VERSION = ad0aa66414808c3f98564901538fc485479e0f39 WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index cbef9066c5c2..aec12ac156fd 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 6a91c8e99d7fe16ef95255b5fb4e8aeff1654690 +WPEFRAMEWORK_VERSION = 56ca8055d45ff5a9ea07b0173341dea6d2e9fdb1 WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From 744b40b8339825f6a1117433736540958b50fca1 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 7 Jan 2019 08:19:27 +0000 Subject: [PATCH 609/614] [gst1-bcm] cleaning up curl and mpg123 --- .../gst1-bcm/0002-disable-curl-and-mpg123.patch | 12 ++++++++++++ package/gstreamer1/gst1-bcm/Config.in | 11 +++++------ package/gstreamer1/gst1-bcm/gst1-bcm.mk | 2 +- 3 files changed, 18 insertions(+), 7 deletions(-) create mode 100644 package/gstreamer1/gst1-bcm/0002-disable-curl-and-mpg123.patch diff --git a/package/gstreamer1/gst1-bcm/0002-disable-curl-and-mpg123.patch b/package/gstreamer1/gst1-bcm/0002-disable-curl-and-mpg123.patch new file mode 100644 index 000000000000..037f7985ff5d --- /dev/null +++ b/package/gstreamer1/gst1-bcm/0002-disable-curl-and-mpg123.patch @@ -0,0 +1,12 @@ +diff -urN gst1-bcm-18.2-rdkv-20180727.orig/configure.ac gst1-bcm-18.2-rdkv-20180727/configure.ac +--- gst1-bcm-18.2-rdkv-20180727.orig/configure.ac 2018-12-17 20:32:10.000000000 +0000 ++++ gst1-bcm-18.2-rdkv-20180727/configure.ac 2018-12-21 14:36:24.310768714 +0000 +@@ -288,8 +288,6 @@ + + plugindir="\$(libdir)/gstreamer-$GST_MAJORMINOR" + PKG_CHECK_MODULES([GLIB], [glib-2.0 >= 0.10.28]) +-PKG_CHECK_MODULES([CURL], [libcurl >= 7.19.6]) +-PKG_CHECK_MODULES([MPG123], [libmpg123 >= 1.19.0]) + AC_SUBST(PLUGIN_SRC) + AC_SUBST(ENABLE_SVP) + AC_SUBST(plugindir) diff --git a/package/gstreamer1/gst1-bcm/Config.in b/package/gstreamer1/gst1-bcm/Config.in index aa940c805d9c..7a3dc0d2e7be 100644 --- a/package/gstreamer1/gst1-bcm/Config.in +++ b/package/gstreamer1/gst1-bcm/Config.in @@ -1,8 +1,6 @@ menuconfig BR2_PACKAGE_GST1_BCM bool "gst1-bcm" select BR2_PACKAGE_GST1_PLUGINS_BASE - select BR2_PACKAGE_LIBCURL - select BR2_PACKAGE_MPG123 depends on BR2_PACKAGE_BCM_REFSW || BR2_PACKAGE_ACN_SDK || BR2_PACKAGE_HOMECAST_SDK || BR2_PACKAGE_VSS_SDK help Broadcom NEXUS GStreamer 1.x plugins @@ -12,10 +10,11 @@ if BR2_PACKAGE_GST1_BCM comment "Broadcom Nexus specific plugins" config BR2_PACKAGE_GST1_BCM_VP9_SUPPORT - bool "VP9 support" - default y - help - If this plugin supports VP9, provide VP9 via typefindelements + bool "VP9 support" + depends on BR2_PACKAGE_HAS_VP9_DECODER + default n + help + If this plugin supports VP9, provide VP9 via typefindelements config BR2_PACKAGE_GST1_BCM_AUDFILTER bool "audfilter" diff --git a/package/gstreamer1/gst1-bcm/gst1-bcm.mk b/package/gstreamer1/gst1-bcm/gst1-bcm.mk index 12224469067e..80a60d8ef81e 100644 --- a/package/gstreamer1/gst1-bcm/gst1-bcm.mk +++ b/package/gstreamer1/gst1-bcm/gst1-bcm.mk @@ -34,7 +34,7 @@ GST1_BCM_SITE = git@github.com:Metrological/gstreamer-plugins-soc.git GST1_BCM_SITE_METHOD = git GST1_BCM_LICENSE = PROPRIETARY GST1_BCM_INSTALL_STAGING = YES -GST1_BCM_DEPENDENCIES = gstreamer1 gst1-plugins-base libcurl mpg123 +GST1_BCM_DEPENDENCIES = gstreamer1 gst1-plugins-base ifeq ($(BR2_PACKAGE_BCM_REFSW),y) GST1_BCM_DEPENDENCIES += bcm-refsw From 74840aee508dac87aaafbc488bdc75ac82571c5e Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 7 Jan 2019 11:12:27 +0000 Subject: [PATCH 610/614] [bluez5_utils] build without dbus --- .../0002-remove-dbus-dependency.patch | 191 ++++++++++++++++++ package/bluez5_utils/Config.in | 1 - package/bluez5_utils/bluez5_utils.mk | 2 +- 3 files changed, 192 insertions(+), 2 deletions(-) create mode 100644 package/bluez5_utils/0002-remove-dbus-dependency.patch diff --git a/package/bluez5_utils/0002-remove-dbus-dependency.patch b/package/bluez5_utils/0002-remove-dbus-dependency.patch new file mode 100644 index 000000000000..b42046016466 --- /dev/null +++ b/package/bluez5_utils/0002-remove-dbus-dependency.patch @@ -0,0 +1,191 @@ +diff -Naur a/configure b/configure +--- a/configure 2018-09-28 06:34:32.966936000 +0000 ++++ b/configure 2018-09-28 06:33:25.802936000 +0000 +@@ -13326,134 +13326,6 @@ + fi + + +-pkg_failed=no +-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for DBUS" >&5 +-$as_echo_n "checking for DBUS... " >&6; } +- +-if test -n "$DBUS_CFLAGS"; then +- pkg_cv_DBUS_CFLAGS="$DBUS_CFLAGS" +- elif test -n "$PKG_CONFIG"; then +- if test -n "$PKG_CONFIG" && \ +- { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"dbus-1 >= 1.6\""; } >&5 +- ($PKG_CONFIG --exists --print-errors "dbus-1 >= 1.6") 2>&5 +- ac_status=$? +- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 +- test $ac_status = 0; }; then +- pkg_cv_DBUS_CFLAGS=`$PKG_CONFIG --cflags "dbus-1 >= 1.6" 2>/dev/null` +- test "x$?" != "x0" && pkg_failed=yes +-else +- pkg_failed=yes +-fi +- else +- pkg_failed=untried +-fi +-if test -n "$DBUS_LIBS"; then +- pkg_cv_DBUS_LIBS="$DBUS_LIBS" +- elif test -n "$PKG_CONFIG"; then +- if test -n "$PKG_CONFIG" && \ +- { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"dbus-1 >= 1.6\""; } >&5 +- ($PKG_CONFIG --exists --print-errors "dbus-1 >= 1.6") 2>&5 +- ac_status=$? +- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 +- test $ac_status = 0; }; then +- pkg_cv_DBUS_LIBS=`$PKG_CONFIG --libs "dbus-1 >= 1.6" 2>/dev/null` +- test "x$?" != "x0" && pkg_failed=yes +-else +- pkg_failed=yes +-fi +- else +- pkg_failed=untried +-fi +- +- +- +-if test $pkg_failed = yes; then +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +-$as_echo "no" >&6; } +- +-if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then +- _pkg_short_errors_supported=yes +-else +- _pkg_short_errors_supported=no +-fi +- if test $_pkg_short_errors_supported = yes; then +- DBUS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "dbus-1 >= 1.6" 2>&1` +- else +- DBUS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "dbus-1 >= 1.6" 2>&1` +- fi +- # Put the nasty error message in config.log where it belongs +- echo "$DBUS_PKG_ERRORS" >&5 +- +- as_fn_error $? "D-Bus >= 1.6 is required" "$LINENO" 5 +-elif test $pkg_failed = untried; then +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +-$as_echo "no" >&6; } +- as_fn_error $? "D-Bus >= 1.6 is required" "$LINENO" 5 +-else +- DBUS_CFLAGS=$pkg_cv_DBUS_CFLAGS +- DBUS_LIBS=$pkg_cv_DBUS_LIBS +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +-$as_echo "yes" >&6; } +- dummy=yes +-fi +- +- +- +- +-# Check whether --with-dbusconfdir was given. +-if test "${with_dbusconfdir+set}" = set; then : +- withval=$with_dbusconfdir; path_dbusconfdir=${withval} +-fi +- +-if (test -z "${path_dbusconfdir}"); then +- { $as_echo "$as_me:${as_lineno-$LINENO}: checking D-Bus configuration directory" >&5 +-$as_echo_n "checking D-Bus configuration directory... " >&6; } +- path_dbusconfdir="`$PKG_CONFIG --variable=sysconfdir dbus-1`" +- if (test -z "${path_dbusconfdir}"); then +- as_fn_error $? "D-Bus configuration directory is required" "$LINENO" 5 +- fi +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${path_dbusconfdir}" >&5 +-$as_echo "${path_dbusconfdir}" >&6; } +-fi +-DBUS_CONFDIR=${path_dbusconfdir} +- +- +- +-# Check whether --with-dbussystembusdir was given. +-if test "${with_dbussystembusdir+set}" = set; then : +- withval=$with_dbussystembusdir; path_dbussystembusdir=${withval} +-fi +- +-if (test -z "${path_dbussystembusdir}"); then +- { $as_echo "$as_me:${as_lineno-$LINENO}: checking D-Bus system bus services dir" >&5 +-$as_echo_n "checking D-Bus system bus services dir... " >&6; } +- path_dbussystembusdir="`$PKG_CONFIG --variable=system_bus_services_dir dbus-1`" +- if (test -z "${path_dbussystembusdir}"); then +- as_fn_error $? "D-Bus system bus services directory is required" "$LINENO" 5 +- fi +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${path_dbussystembusdir}" >&5 +-$as_echo "${path_dbussystembusdir}" >&6; } +-fi +-DBUS_SYSTEMBUSDIR=${path_dbussystembusdir} +- +- +- +-# Check whether --with-dbussessionbusdir was given. +-if test "${with_dbussessionbusdir+set}" = set; then : +- withval=$with_dbussessionbusdir; path_dbussessionbusdir=${withval} +-fi +- +-if (test -z "${path_dbussessionbusdir}"); then +- { $as_echo "$as_me:${as_lineno-$LINENO}: checking D-Bus session bus services dir" >&5 +-$as_echo_n "checking D-Bus session bus services dir... " >&6; } +- path_dbussessionbusdir="`$PKG_CONFIG --variable=session_bus_services_dir dbus-1`" +- if (test -z "${path_dbussessionbusdir}"); then +- as_fn_error $? "D-Bus session bus services directory is required" "$LINENO" 5 +- fi +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${path_dbussessionbusdir}" >&5 +-$as_echo "${path_dbussessionbusdir}" >&6; } +-fi +-DBUS_SESSIONBUSDIR=${path_dbussessionbusdir} + + + # Check whether --enable-backtrace was given. +diff -Naur a/Makefile.in b/Makefile.in +--- a/Makefile.in 2018-09-28 06:32:15.998936000 +0000 ++++ b/Makefile.in 2018-09-28 06:32:24.110936000 +0000 +@@ -83,11 +83,10 @@ + POST_UNINSTALL = : + build_triplet = @build@ + host_triplet = @host@ +-bin_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \ +- $(am__EXEEXT_4) +-noinst_PROGRAMS = $(am__EXEEXT_5) $(am__EXEEXT_6) $(am__EXEEXT_7) \ ++bin_PROGRAMS = $(am__EXEEXT_4) ++#noinst_PROGRAMS = $(am__EXEEXT_5) $(am__EXEEXT_6) $(am__EXEEXT_7) \ + $(am__EXEEXT_8) $(am__EXEEXT_9) $(am__EXEEXT_13) +-libexec_PROGRAMS = src/bluetoothd$(EXEEXT) obexd/src/obexd$(EXEEXT) ++#libexec_PROGRAMS = src/bluetoothd$(EXEEXT) obexd/src/obexd$(EXEEXT) + @LIBRARY_TRUE@am__append_1 = $(lib_headers) + @LIBRARY_TRUE@am__append_2 = lib/libbluetooth.la + DIST_COMMON = $(srcdir)/Makefile.plugins $(srcdir)/Makefile.tools \ +@@ -1798,7 +1797,7 @@ + $(systemduserunit_DATA) + am__include_HEADERS_DIST = lib/bluetooth.h lib/hci.h lib/hci_lib.h \ + lib/sco.h lib/l2cap.h lib/sdp.h lib/sdp_lib.h lib/rfcomm.h \ +- lib/bnep.h lib/cmtp.h lib/hidp.h ++ lib/bnep.h lib/cmtp.h lib/hidp.h lib/mgmt.h + HEADERS = $(include_HEADERS) + am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \ + $(LISP)config.h.in +@@ -2167,9 +2166,7 @@ + AM_MAKEFLAGS = --no-print-directory + lib_LTLIBRARIES = $(am__append_2) + noinst_LIBRARIES = $(am__append_7) +-noinst_LTLIBRARIES = lib/libbluetooth-internal.la \ +- gdbus/libgdbus-internal.la src/libshared-glib.la \ +- src/libshared-mainloop.la ++noinst_LTLIBRARIES = lib/libbluetooth-internal.la + dist_man_MANS = $(am__append_31) $(am__append_34) $(am__append_37) + dist_noinst_MANS = $(am__append_53) + CLEANFILES = $(builtin_files) src/bluetooth.service \ +@@ -2255,12 +2252,12 @@ + plugindir = $(libdir)/bluetooth/plugins + @MAINTAINER_MODE_FALSE@build_plugindir = $(plugindir) + @MAINTAINER_MODE_TRUE@build_plugindir = $(abs_top_srcdir)/plugins/.libs +-plugin_LTLIBRARIES = $(am__append_24) $(am__append_25) \ ++#plugin_LTLIBRARIES = $(am__append_24) $(am__append_25) \ + $(am__append_47) + lib_sources = lib/bluetooth.c lib/hci.c lib/sdp.c + lib_headers = lib/bluetooth.h lib/hci.h lib/hci_lib.h \ + lib/sco.h lib/l2cap.h lib/sdp.h lib/sdp_lib.h \ +- lib/rfcomm.h lib/bnep.h lib/cmtp.h lib/hidp.h ++ lib/rfcomm.h lib/bnep.h lib/cmtp.h lib/hidp.h lib/mgmt.h + + extra_headers = lib/mgmt.h lib/uuid.h lib/a2mp.h lib/amp.h + extra_sources = lib/uuid.c diff --git a/package/bluez5_utils/Config.in b/package/bluez5_utils/Config.in index a7c0ee4ba47e..f1e41de8f0fc 100644 --- a/package/bluez5_utils/Config.in +++ b/package/bluez5_utils/Config.in @@ -7,7 +7,6 @@ config BR2_PACKAGE_BLUEZ5_UTILS depends on !BR2_PACKAGE_BLUEZ_UTILS # conflicts with 4.x version depends on BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_4 depends on BR2_TOOLCHAIN_HAS_SYNC_4 - select BR2_PACKAGE_DBUS select BR2_PACKAGE_LIBGLIB2 help bluez utils version 5.x diff --git a/package/bluez5_utils/bluez5_utils.mk b/package/bluez5_utils/bluez5_utils.mk index 2dba27e03d9f..f416131e341c 100644 --- a/package/bluez5_utils/bluez5_utils.mk +++ b/package/bluez5_utils/bluez5_utils.mk @@ -8,7 +8,7 @@ BLUEZ5_UTILS_VERSION = 5.44 BLUEZ5_UTILS_SOURCE = bluez-$(BLUEZ5_UTILS_VERSION).tar.xz BLUEZ5_UTILS_SITE = $(BR2_KERNEL_MIRROR)/linux/bluetooth BLUEZ5_UTILS_INSTALL_STAGING = YES -BLUEZ5_UTILS_DEPENDENCIES = dbus libglib2 +BLUEZ5_UTILS_DEPENDENCIES = libglib2 BLUEZ5_UTILS_LICENSE = GPLv2+, LGPLv2.1+ BLUEZ5_UTILS_LICENSE_FILES = COPYING COPYING.LIB From 2643a0efb29b9c92d500f0d5f60016a1b9f1abd3 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 7 Jan 2019 11:13:02 +0000 Subject: [PATCH 611/614] [bluez-alsa] bump and cleanup --- package/alsa-lib/alsa-lib.mk | 3 ++- package/bluez-alsa/bluez-alsa.hash | 3 +-- package/bluez-alsa/bluez-alsa.mk | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/alsa-lib/alsa-lib.mk b/package/alsa-lib/alsa-lib.mk index 5957568aa38d..7f9eebc0c3eb 100644 --- a/package/alsa-lib/alsa-lib.mk +++ b/package/alsa-lib/alsa-lib.mk @@ -16,7 +16,8 @@ ALSA_LIB_CONF_OPTS = \ --with-alsa-devdir=$(call qstrip,$(BR2_PACKAGE_ALSA_LIB_DEVDIR)) \ --with-pcm-plugins="$(call qstrip,$(BR2_PACKAGE_ALSA_LIB_PCM_PLUGINS))" \ --with-ctl-plugins="$(call qstrip,$(BR2_PACKAGE_ALSA_LIB_CTL_PLUGINS))" \ - --without-versioned + --without-versioned \ + --disable-thread-safety # Can't build with static & shared at the same time (1.0.25+) ifeq ($(BR2_STATIC_LIBS),y) diff --git a/package/bluez-alsa/bluez-alsa.hash b/package/bluez-alsa/bluez-alsa.hash index 28a409f25ba5..9c9afd984fc7 100644 --- a/package/bluez-alsa/bluez-alsa.hash +++ b/package/bluez-alsa/bluez-alsa.hash @@ -1,3 +1,2 @@ # Locally calculated: -sha256 7fb5953264766169066cba313ac51c243c90952c32b8ec56f8d825705a183431 bluez-alsa-88aefeea56b7ea20668796c2c7a8312bf595eef4.tar.gz -sha256 c90a0081b0526834f700d084e48819b18d11453ecb030c9b7de0d2cc3e3711a5 LICENSE.txt +sha256 c2c3f5e3a904592fb5d804617d7a9f7c2c44bc8ede2b3b08c027758125bd1d80 bluez-alsa-11eb11d1b42eec1ec0956e7ab82864e3a61e422d.tar.gz diff --git a/package/bluez-alsa/bluez-alsa.mk b/package/bluez-alsa/bluez-alsa.mk index 7be8a5f2013f..a1fa67c4a5ee 100644 --- a/package/bluez-alsa/bluez-alsa.mk +++ b/package/bluez-alsa/bluez-alsa.mk @@ -4,7 +4,7 @@ # ################################################################################ -BLUEZ_ALSA_VERSION = 88aefeea56b7ea20668796c2c7a8312bf595eef4 +BLUEZ_ALSA_VERSION = 11eb11d1b42eec1ec0956e7ab82864e3a61e422d BLUEZ_ALSA_SITE = $(call github,Arkq,bluez-alsa,$(BLUEZ_ALSA_VERSION)) BLUEZ_ALSA_LICENSE = MIT BLUEZ_ALSA_LICENSE_FILES = LICENSE.txt From a9ac8df134a15527a81744adbf1dfafe052c75d1 Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 7 Jan 2019 11:13:32 +0000 Subject: [PATCH 612/614] [wpeframework-plugins] bump to latest and correctly select bluez5 --- package/wpe/wpeframework-plugins/Config.in | 1 - .../S35WPEFrameworkBluetooth | 66 ++++++++++--------- .../wpeframework-plugins.mk | 3 +- 3 files changed, 37 insertions(+), 33 deletions(-) diff --git a/package/wpe/wpeframework-plugins/Config.in b/package/wpe/wpeframework-plugins/Config.in index ef0d637476da..fe8cc1e10a4a 100644 --- a/package/wpe/wpeframework-plugins/Config.in +++ b/package/wpe/wpeframework-plugins/Config.in @@ -309,7 +309,6 @@ config BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH bool "Bluetooth" select BR2_PACKAGE_WPEFRAMEWORK_PLUGINS select BR2_PACKAGE_BLUEZ5_UTILS - select BR2_PACKAGE_BLUEZ_ALSA default n help A Bluetooth plugin to interact with Bluetooth devices. diff --git a/package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth b/package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth index f0c2b21f0d58..ec8b43c7642e 100644 --- a/package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth +++ b/package/wpe/wpeframework-plugins/S35WPEFrameworkBluetooth @@ -1,39 +1,43 @@ #!/bin/sh start() { - echo -n "Running bluetooth startup script" - if [ -f /usr/bin/hciattach ]; then - echo -n "Flashing Blutooth firmware" - /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow - if [ ! -d "/sys/class/bluetooth/hci0" ]; then - sleep 3 - /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow - [ $? == 0 ] && echo "OK" || echo "FAIL" - else - echo "OK" - fi - fi - - if [ -f /usr/libexec/bluetooth/bluetoothd ]; then - echo -n "Starting bluetoothd daemon" - /usr/libexec/bluetooth/bluetoothd & - [ $? == 0 ] && echo "OK" || echo "FAIL" - fi - - if [ -f /usr/bin/bluealsa ]; then - echo -n "Starting bluealsa daemon" - /usr/bin/bluealsa & - [ $? == 0 ] && echo "OK" || echo "FAIL" - fi + if [ -f /usr/bin/hciattach ]; then + echo -n "Flashing Blutooth firmware" + /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow + if [ ! -d "/sys/class/bluetooth/hci0" ]; then + sleep 3 + /usr/bin/hciattach /dev/ttyAMA0 bcm43xx 921600 noflow + [ $? == 0 ] && echo "OK" || echo "FAIL" + else + echo "OK" + fi + fi + if [ -f /usr/libexec/bluetooth/bluetoothd ]; then + echo -n "Starting bluetoothd daemon" + /usr/libexec/bluetooth/bluetoothd & + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi + if [ -f /usr/bin/bluealsa ]; then + echo -n "Starting bluealsa daemon" + /usr/bin/bluealsa & + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi } stop() { - echo -n "Stopping bluetoothd daemon" - killall -9 bluetoothd - [ $? == 0 ] && echo "OK" || echo "FAIL" - - echo -n "Stopping bluealsa daemon" - killall -9 bluealsa - [ $? == 0 ] && echo "OK" || echo "FAIL" + if [ -f /usr/libexec/bluetooth/bluetoothd ]; then + echo -n "Stopping bluetoothd daemon" + killall -9 bluetoothd + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi + if [ -f /usr/bin/bluealsa ]; then + echo -n "Stopping bluealsa daemon" + killall -9 bluealsa + [ $? == 0 ] && echo "OK" || echo "FAIL" + fi + if [ -f /usr/bin/hciattach ]; then + echo -n "Stopping hci0 bluetooth interface" + /usr/bin/hciconfig hci0 down + fi } restart() { stop diff --git a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk index fbb0821ae55f..13b925cbfc7c 100644 --- a/package/wpe/wpeframework-plugins/wpeframework-plugins.mk +++ b/package/wpe/wpeframework-plugins/wpeframework-plugins.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_PLUGINS_VERSION = ad0aa66414808c3f98564901538fc485479e0f39 +WPEFRAMEWORK_PLUGINS_VERSION = 11594a2e00f457503d422e3358b6db1ce3307e1a WPEFRAMEWORK_PLUGINS_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkPlugins,$(WPEFRAMEWORK_PLUGINS_VERSION)) WPEFRAMEWORK_PLUGINS_INSTALL_STAGING = YES WPEFRAMEWORK_PLUGINS_DEPENDENCIES = wpeframework libpng @@ -139,6 +139,7 @@ ifeq ($(BR2_PACKAGE_WPEFRAMEWORK_BLUETOOTH),y) WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH=ON WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH_AUTOSTART=true WPEFRAMEWORK_PLUGINS_CONF_OPTS += -DPLUGIN_BLUETOOTH_OOP=true +WPEFRAMEWORK_PLUGINS_DEPENDENCIES += bluez5_utils ifeq ($(BR2_PACKAGE_RPI_FIRMWARE),y) WPEFRAMEWORK_PLUGINS_POST_INSTALL_TARGET_HOOKS += WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD define WPEFRAMEWORK_BLUETOOTH_POST_TARGET_INITD From 88b264503bd55b23500027ed78815e517f9c45fe Mon Sep 17 00:00:00 2001 From: albertd Date: Mon, 7 Jan 2019 11:14:05 +0000 Subject: [PATCH 613/614] [wpeframework] bump and cleanup --- package/wpe/wpeframework/S80WPEFramework | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework/S80WPEFramework b/package/wpe/wpeframework/S80WPEFramework index b3c1a6faee27..fdda88328f91 100644 --- a/package/wpe/wpeframework/S80WPEFramework +++ b/package/wpe/wpeframework/S80WPEFramework @@ -14,7 +14,7 @@ start() { mount -a # make sure netflix has proper mapping - if [ ! -d /root/Netflix/dpi ]; then + if [ -f /etc/WPEFramework/plugins/Netflix.json ] && [ ! -d /root/Netflix/dpi ]; then mkdir -p /root/Netflix/dpi ln -sfn /etc/playready /root/Netflix/dpi/playready fi diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index aec12ac156fd..af1ee0e5295f 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 56ca8055d45ff5a9ea07b0173341dea6d2e9fdb1 +WPEFRAMEWORK_VERSION = 6445a0eaf10c20e39236633cba75a4131c4b0a7f WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL)) From 7e9d0c7f91fd8ff7f7f510849792b4964719fea7 Mon Sep 17 00:00:00 2001 From: woutermeek Date: Mon, 7 Jan 2019 03:31:38 -0800 Subject: [PATCH 614/614] [wpeframework-ui] bump version --- package/wpe/wpeframework-ui/wpeframework-ui.mk | 2 +- package/wpe/wpeframework/wpeframework.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/wpe/wpeframework-ui/wpeframework-ui.mk b/package/wpe/wpeframework-ui/wpeframework-ui.mk index 4d8da6cb58d4..8d361b32a8d8 100644 --- a/package/wpe/wpeframework-ui/wpeframework-ui.mk +++ b/package/wpe/wpeframework-ui/wpeframework-ui.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_UI_VERSION = 24692e310d9690d0fc34ec10fb1319aea7791ae3 +WPEFRAMEWORK_UI_VERSION = 4a6b16f871e0199bb0f37117f0dbc070ff2f6b88 WPEFRAMEWORK_UI_SITE = $(call github,WebPlatformForEmbedded,WPEFrameworkUI,$(WPEFRAMEWORK_UI_VERSION)) WPEFRAMEWORK_UI_DEPENDENCIES = wpeframework wpeframework-plugins diff --git a/package/wpe/wpeframework/wpeframework.mk b/package/wpe/wpeframework/wpeframework.mk index af1ee0e5295f..dfd8944892b1 100644 --- a/package/wpe/wpeframework/wpeframework.mk +++ b/package/wpe/wpeframework/wpeframework.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEFRAMEWORK_VERSION = 6445a0eaf10c20e39236633cba75a4131c4b0a7f +WPEFRAMEWORK_VERSION = 6445a0eaf10c20e39236633cba75a4131c4b0a7f WPEFRAMEWORK_SITE = $(call github,WebPlatformForEmbedded,WPEFramework,$(WPEFRAMEWORK_VERSION)) WPEFRAMEWORK_INSTALL_STAGING = YES WPEFRAMEWORK_DEPENDENCIES = zlib $(call qstrip,$(BR2_PACKAGE_SDK_INSTALL))