diff --git a/projects/tt_um_senolgulgonul/commit_id.json b/projects/tt_um_senolgulgonul/commit_id.json index 89f7d488..31f38bf6 100644 --- a/projects/tt_um_senolgulgonul/commit_id.json +++ b/projects/tt_um_senolgulgonul/commit_id.json @@ -1,8 +1,8 @@ { "app": "Tiny Tapeout tt09 a48b1c74", "repo": "https://github.com/senolgulgonul/tt09-senolgulgonul", - "commit": "288ca74f0aea9d18a309147f2a8742d7b9beddf3", - "workflow_url": "https://github.com/senolgulgonul/tt09-senolgulgonul/actions/runs/11704449707", + "commit": "21918c1c05d6a6f434cd4cb54d2dac90440da411", + "workflow_url": "https://github.com/senolgulgonul/tt09-senolgulgonul/actions/runs/11708849893", "sort_id": 1730725111692, "openlane_version": "OpenLane2 2.1.9", "pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a" diff --git a/projects/tt_um_senolgulgonul/stats/metrics.csv b/projects/tt_um_senolgulgonul/stats/metrics.csv index 2eb00859..ccf35563 100644 --- a/projects/tt_um_senolgulgonul/stats/metrics.csv +++ b/projects/tt_um_senolgulgonul/stats/metrics.csv @@ -3,21 +3,21 @@ design__lint_error__count,0 design__lint_timing_construct__count,0 design__lint_warning__count,0 design__inferred_latch__count,0 -design__instance__count,286 -design__instance__area,938.4 +design__instance__count,289 +design__instance__area,942.154 design__instance_unmapped__count,0 synthesis__check_error__count,0 design__max_slew_violation__count__corner:nom_tt_025C_1v80,0 design__max_fanout_violation__count__corner:nom_tt_025C_1v80,0 design__max_cap_violation__count__corner:nom_tt_025C_1v80,0 -power__internal__total,0.00005824807158205658 -power__switching__total,0.00001219865407620091 -power__leakage__total,1.8443998550665697E-9 -power__total,0.00007044856465654448 -clock__skew__worst_hold__corner:nom_tt_025C_1v80,0.0006913636525628001 -clock__skew__worst_setup__corner:nom_tt_025C_1v80,0.0006913636525628001 -timing__hold__ws__corner:nom_tt_025C_1v80,0.33877274167030175 -timing__setup__ws__corner:nom_tt_025C_1v80,14.7000176192399 +power__internal__total,0.00005628330836771056 +power__switching__total,0.000011626812010945287 +power__leakage__total,1.9286874319845992E-9 +power__total,0.00006791204941691831 +clock__skew__worst_hold__corner:nom_tt_025C_1v80,0.0012925494374000175 +clock__skew__worst_setup__corner:nom_tt_025C_1v80,0.0012925494374000175 +timing__hold__ws__corner:nom_tt_025C_1v80,0.33075532138237423 +timing__setup__ws__corner:nom_tt_025C_1v80,14.704005540457139 timing__hold__tns__corner:nom_tt_025C_1v80,0.0 timing__setup__tns__corner:nom_tt_025C_1v80,0.0 timing__hold__wns__corner:nom_tt_025C_1v80,0 @@ -31,10 +31,10 @@ timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80,0 design__max_slew_violation__count__corner:nom_ss_100C_1v60,0 design__max_fanout_violation__count__corner:nom_ss_100C_1v60,0 design__max_cap_violation__count__corner:nom_ss_100C_1v60,0 -clock__skew__worst_hold__corner:nom_ss_100C_1v60,0.0009962586593235034 -clock__skew__worst_setup__corner:nom_ss_100C_1v60,0.0009962586593235034 -timing__hold__ws__corner:nom_ss_100C_1v60,0.9368472929264692 -timing__setup__ws__corner:nom_ss_100C_1v60,13.698894850663342 +clock__skew__worst_hold__corner:nom_ss_100C_1v60,0.0014997448152305728 +clock__skew__worst_setup__corner:nom_ss_100C_1v60,0.0014997448152305728 +timing__hold__ws__corner:nom_ss_100C_1v60,0.9373745378557752 +timing__setup__ws__corner:nom_ss_100C_1v60,13.705788003573586 timing__hold__tns__corner:nom_ss_100C_1v60,0.0 timing__setup__tns__corner:nom_ss_100C_1v60,0.0 timing__hold__wns__corner:nom_ss_100C_1v60,0 @@ -48,10 +48,10 @@ timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60,0 design__max_slew_violation__count__corner:nom_ff_n40C_1v95,0 design__max_fanout_violation__count__corner:nom_ff_n40C_1v95,0 design__max_cap_violation__count__corner:nom_ff_n40C_1v95,0 -clock__skew__worst_hold__corner:nom_ff_n40C_1v95,0.000582561793072408 -clock__skew__worst_setup__corner:nom_ff_n40C_1v95,0.000582561793072408 -timing__hold__ws__corner:nom_ff_n40C_1v95,0.12164924967240093 -timing__setup__ws__corner:nom_ff_n40C_1v95,15.063478002428946 +clock__skew__worst_hold__corner:nom_ff_n40C_1v95,0.0012136403336930827 +clock__skew__worst_setup__corner:nom_ff_n40C_1v95,0.0012136403336930827 +timing__hold__ws__corner:nom_ff_n40C_1v95,0.11182885489706622 +timing__setup__ws__corner:nom_ff_n40C_1v95,15.066204710254542 timing__hold__tns__corner:nom_ff_n40C_1v95,0.0 timing__setup__tns__corner:nom_ff_n40C_1v95,0.0 timing__hold__wns__corner:nom_ff_n40C_1v95,0 @@ -65,10 +65,10 @@ timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95,0 design__max_slew_violation__count,0 design__max_fanout_violation__count,0 design__max_cap_violation__count,0 -clock__skew__worst_hold,0.0012515544510563162 -clock__skew__worst_setup,0.00039143689397780595 -timing__hold__ws,0.1179136266446428 -timing__setup__ws,13.688949916616698 +clock__skew__worst_hold,0.002018052448935568 +clock__skew__worst_setup,0.0010730583392239918 +timing__hold__ws,0.10889101040179083 +timing__setup__ws,13.69707941392213 timing__hold__tns,0.0 timing__setup__tns,0.0 timing__hold__wns,0 @@ -86,12 +86,12 @@ flow__errors__count,0 design__io,45 design__die__area,17954.7 design__core__area,16493.3 -design__instance__count__stdcell,286 -design__instance__area__stdcell,938.4 +design__instance__count__stdcell,289 +design__instance__area__stdcell,942.154 design__instance__count__macros,0 design__instance__area__macros,0 -design__instance__utilization,0.0568958 -design__instance__utilization__stdcell,0.0568958 +design__instance__utilization,0.0571234 +design__instance__utilization__stdcell,0.0571234 design__power_grid_violation__count__net:VPWR,0 design__power_grid_violation__count__net:VGND,0 design__power_grid_violation__count,0 @@ -100,31 +100,31 @@ timing__drv__floating__pins,0 design__instance__displacement__total,0 design__instance__displacement__mean,0 design__instance__displacement__max,0 -route__wirelength__estimated,1042.37 +route__wirelength__estimated,973.064 design__violations,0 design__instance__count__setup_buffer,0 design__instance__count__hold_buffer,1 antenna__violating__nets,0 antenna__violating__pins,0 route__antenna_violation__count,0 -route__net,79 +route__net,82 route__net__special,2 -route__drc_errors__iter:1,95 -route__wirelength__iter:1,1197 -route__drc_errors__iter:2,18 -route__wirelength__iter:2,1185 -route__drc_errors__iter:3,8 -route__wirelength__iter:3,1150 +route__drc_errors__iter:1,29 +route__wirelength__iter:1,1073 +route__drc_errors__iter:2,6 +route__wirelength__iter:2,1047 +route__drc_errors__iter:3,13 +route__wirelength__iter:3,1028 route__drc_errors__iter:4,0 -route__wirelength__iter:4,1157 +route__wirelength__iter:4,1030 route__drc_errors,0 -route__wirelength,1157 -route__vias,400 -route__vias__singlecut,400 +route__wirelength,1030 +route__vias,393 +route__vias__singlecut,393 route__vias__multicut,0 design__disconnected_pin__count,17 design__critical_disconnected_pin__count,0 -route__wirelength__max,80.12 +route__wirelength__max,83.27 timing__unannotated_net__count__corner:nom_tt_025C_1v80,34 timing__unannotated_net_filtered__count__corner:nom_tt_025C_1v80,0 timing__unannotated_net__count__corner:nom_ss_100C_1v60,34 @@ -134,10 +134,10 @@ timing__unannotated_net_filtered__count__corner:nom_ff_n40C_1v95,0 design__max_slew_violation__count__corner:min_tt_025C_1v80,0 design__max_fanout_violation__count__corner:min_tt_025C_1v80,0 design__max_cap_violation__count__corner:min_tt_025C_1v80,0 -clock__skew__worst_hold__corner:min_tt_025C_1v80,0.000486499743149896 -clock__skew__worst_setup__corner:min_tt_025C_1v80,0.000486499743149896 -timing__hold__ws__corner:min_tt_025C_1v80,0.333317605173373 -timing__setup__ws__corner:min_tt_025C_1v80,14.705980849318417 +clock__skew__worst_hold__corner:min_tt_025C_1v80,0.001138422721647429 +clock__skew__worst_setup__corner:min_tt_025C_1v80,0.001138422721647429 +timing__hold__ws__corner:min_tt_025C_1v80,0.32609837975157424 +timing__setup__ws__corner:min_tt_025C_1v80,14.70882657305562 timing__hold__tns__corner:min_tt_025C_1v80,0.0 timing__setup__tns__corner:min_tt_025C_1v80,0.0 timing__hold__wns__corner:min_tt_025C_1v80,0 @@ -153,10 +153,10 @@ timing__unannotated_net_filtered__count__corner:min_tt_025C_1v80,0 design__max_slew_violation__count__corner:min_ss_100C_1v60,0 design__max_fanout_violation__count__corner:min_ss_100C_1v60,0 design__max_cap_violation__count__corner:min_ss_100C_1v60,0 -clock__skew__worst_hold__corner:min_ss_100C_1v60,0.0007626677283359677 -clock__skew__worst_setup__corner:min_ss_100C_1v60,0.0007626677283359677 -timing__hold__ws__corner:min_ss_100C_1v60,0.9271838559356799 -timing__setup__ws__corner:min_ss_100C_1v60,13.708269574148412 +clock__skew__worst_hold__corner:min_ss_100C_1v60,0.0013118395629984417 +clock__skew__worst_setup__corner:min_ss_100C_1v60,0.0013118395629984417 +timing__hold__ws__corner:min_ss_100C_1v60,0.9300691036136761 +timing__setup__ws__corner:min_ss_100C_1v60,13.713386370169017 timing__hold__tns__corner:min_ss_100C_1v60,0.0 timing__setup__tns__corner:min_ss_100C_1v60,0.0 timing__hold__wns__corner:min_ss_100C_1v60,0 @@ -172,10 +172,10 @@ timing__unannotated_net_filtered__count__corner:min_ss_100C_1v60,0 design__max_slew_violation__count__corner:min_ff_n40C_1v95,0 design__max_fanout_violation__count__corner:min_ff_n40C_1v95,0 design__max_cap_violation__count__corner:min_ff_n40C_1v95,0 -clock__skew__worst_hold__corner:min_ff_n40C_1v95,0.00039143689397780595 -clock__skew__worst_setup__corner:min_ff_n40C_1v95,0.00039143689397780595 -timing__hold__ws__corner:min_ff_n40C_1v95,0.1179136266446428 -timing__setup__ws__corner:min_ff_n40C_1v95,15.067844287663679 +clock__skew__worst_hold__corner:min_ff_n40C_1v95,0.0010730583392239918 +clock__skew__worst_setup__corner:min_ff_n40C_1v95,0.0010730583392239918 +timing__hold__ws__corner:min_ff_n40C_1v95,0.10889101040179083 +timing__setup__ws__corner:min_ff_n40C_1v95,15.069725449609807 timing__hold__tns__corner:min_ff_n40C_1v95,0.0 timing__setup__tns__corner:min_ff_n40C_1v95,0.0 timing__hold__wns__corner:min_ff_n40C_1v95,0 @@ -191,10 +191,10 @@ timing__unannotated_net_filtered__count__corner:min_ff_n40C_1v95,0 design__max_slew_violation__count__corner:max_tt_025C_1v80,0 design__max_fanout_violation__count__corner:max_tt_025C_1v80,0 design__max_cap_violation__count__corner:max_tt_025C_1v80,0 -clock__skew__worst_hold__corner:max_tt_025C_1v80,0.0010008105738532034 -clock__skew__worst_setup__corner:max_tt_025C_1v80,0.0010008105738532034 -timing__hold__ws__corner:max_tt_025C_1v80,0.3435273829300319 -timing__setup__ws__corner:max_tt_025C_1v80,14.69342555882245 +clock__skew__worst_hold__corner:max_tt_025C_1v80,0.0017431057091111231 +clock__skew__worst_setup__corner:max_tt_025C_1v80,0.0017431057091111231 +timing__hold__ws__corner:max_tt_025C_1v80,0.33556303130418236 +timing__setup__ws__corner:max_tt_025C_1v80,14.698308763912067 timing__hold__tns__corner:max_tt_025C_1v80,0.0 timing__setup__tns__corner:max_tt_025C_1v80,0.0 timing__hold__wns__corner:max_tt_025C_1v80,0 @@ -210,10 +210,10 @@ timing__unannotated_net_filtered__count__corner:max_tt_025C_1v80,0 design__max_slew_violation__count__corner:max_ss_100C_1v60,0 design__max_fanout_violation__count__corner:max_ss_100C_1v60,0 design__max_cap_violation__count__corner:max_ss_100C_1v60,0 -clock__skew__worst_hold__corner:max_ss_100C_1v60,0.0012515544510563162 -clock__skew__worst_setup__corner:max_ss_100C_1v60,0.0012515544510563162 -timing__hold__ws__corner:max_ss_100C_1v60,0.9452784378362241 -timing__setup__ws__corner:max_ss_100C_1v60,13.688949916616698 +clock__skew__worst_hold__corner:max_ss_100C_1v60,0.002018052448935568 +clock__skew__worst_setup__corner:max_ss_100C_1v60,0.002018052448935568 +timing__hold__ws__corner:max_ss_100C_1v60,0.945075711106194 +timing__setup__ws__corner:max_ss_100C_1v60,13.69707941392213 timing__hold__tns__corner:max_ss_100C_1v60,0.0 timing__setup__tns__corner:max_ss_100C_1v60,0.0 timing__hold__wns__corner:max_ss_100C_1v60,0 @@ -229,10 +229,10 @@ timing__unannotated_net_filtered__count__corner:max_ss_100C_1v60,0 design__max_slew_violation__count__corner:max_ff_n40C_1v95,0 design__max_fanout_violation__count__corner:max_ff_n40C_1v95,0 design__max_cap_violation__count__corner:max_ff_n40C_1v95,0 -clock__skew__worst_hold__corner:max_ff_n40C_1v95,0.0009384021603164313 -clock__skew__worst_setup__corner:max_ff_n40C_1v95,0.0009384021603164313 -timing__hold__ws__corner:max_ff_n40C_1v95,0.12491275034558467 -timing__setup__ws__corner:max_ff_n40C_1v95,15.058314132950766 +clock__skew__worst_hold__corner:max_ff_n40C_1v95,0.0016473350927408176 +clock__skew__worst_setup__corner:max_ff_n40C_1v95,0.0016473350927408176 +timing__hold__ws__corner:max_ff_n40C_1v95,0.11517728763403584 +timing__setup__ws__corner:max_ff_n40C_1v95,15.061735396320211 timing__hold__tns__corner:max_ff_n40C_1v95,0.0 timing__setup__tns__corner:max_ff_n40C_1v95,0.0 timing__hold__wns__corner:max_ff_n40C_1v95,0 @@ -249,13 +249,13 @@ timing__unannotated_net__count,34 timing__unannotated_net_filtered__count,0 design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79995 design_powergrid__drop__average__net:VPWR__corner:nom_tt_025C_1v80,1.8 -design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.0000517906 -design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000454245 -design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.00000114582 -design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000454245 +design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.0000467214 +design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000460914 +design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.00000119085 +design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000460914 ir__voltage__worst,1.8000000000000000444089209850062616169452667236328125 -ir__drop__avg,0.000001170000000000000021170673721038202330646527116186916828155517578125 -ir__drop__worst,0.000051799999999999998714743376648783623750205151736736297607421875 +ir__drop__avg,0.00000119000000000000004144145963891343598106686840765178203582763671875 +ir__drop__worst,0.00004669999999999999672206651979422531439922749996185302734375 magic__drc_error__count,0 magic__illegal_overlap__count,0 design__lvs_device_difference__count,0 diff --git a/projects/tt_um_senolgulgonul/stats/synthesis-stats.txt b/projects/tt_um_senolgulgonul/stats/synthesis-stats.txt index 1e7e12f6..99cbf93f 100644 --- a/projects/tt_um_senolgulgonul/stats/synthesis-stats.txt +++ b/projects/tt_um_senolgulgonul/stats/synthesis-stats.txt @@ -2,33 +2,34 @@ === tt_um_senolgulgonul === - Number of wires: 38 - Number of wire bits: 73 + Number of wires: 41 + Number of wire bits: 76 Number of public wires: 12 Number of public wire bits: 47 Number of memories: 0 Number of memory bits: 0 Number of processes: 0 - Number of cells: 54 - sky130_fd_sc_hd__a211o_2 1 - sky130_fd_sc_hd__a21boi_2 1 - sky130_fd_sc_hd__a21o_2 2 + Number of cells: 57 + sky130_fd_sc_hd__a21o_2 1 sky130_fd_sc_hd__a21oi_2 2 sky130_fd_sc_hd__a31o_2 1 sky130_fd_sc_hd__and2_2 1 + sky130_fd_sc_hd__and2b_2 1 sky130_fd_sc_hd__and3_2 2 + sky130_fd_sc_hd__and4b_2 1 sky130_fd_sc_hd__buf_2 1 sky130_fd_sc_hd__conb_1 16 sky130_fd_sc_hd__dfrtp_2 11 sky130_fd_sc_hd__inv_2 4 - sky130_fd_sc_hd__mux2_1 3 - sky130_fd_sc_hd__nand2_2 2 - sky130_fd_sc_hd__nand2b_2 1 - sky130_fd_sc_hd__nor2_2 1 - sky130_fd_sc_hd__o211a_2 1 + sky130_fd_sc_hd__mux2_1 2 + sky130_fd_sc_hd__nor2_2 7 + sky130_fd_sc_hd__nor3_2 1 + sky130_fd_sc_hd__o21a_2 1 sky130_fd_sc_hd__o21ba_2 1 - sky130_fd_sc_hd__or3_2 2 + sky130_fd_sc_hd__o22a_2 1 + sky130_fd_sc_hd__o31ai_2 1 + sky130_fd_sc_hd__or2_2 1 sky130_fd_sc_hd__xnor2_2 1 - Chip area for module '\tt_um_senolgulgonul': 569.296000 + Chip area for module '\tt_um_senolgulgonul': 586.812800 diff --git a/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.gds b/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.gds index f10989de..f1eecad9 100644 Binary files a/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.gds and b/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.gds differ diff --git a/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.v b/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.v index f5cfed41..d23e79f1 100644 --- a/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.v +++ b/projects/tt_um_senolgulgonul/tt_um_senolgulgonul.v @@ -45,6 +45,9 @@ module tt_um_senolgulgonul (clk, wire _23_; wire _24_; wire _25_; + wire _26_; + wire _27_; + wire _28_; wire \index[0] ; wire \index[1] ; wire \index[2] ; @@ -72,204 +75,224 @@ module tt_um_senolgulgonul (clk, wire clknet_1_1__leaf_clk; wire net19; - sky130_fd_sc_hd__inv_2 _26_ (.A(\index[2] ), + sky130_fd_sc_hd__inv_2 _29_ (.A(\index[2] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), .Y(_11_)); - sky130_fd_sc_hd__inv_2 _27_ (.A(\index[3] ), + sky130_fd_sc_hd__inv_2 _30_ (.A(\index[3] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), .Y(_12_)); - sky130_fd_sc_hd__inv_2 _28_ (.A(\index[0] ), + sky130_fd_sc_hd__inv_2 _31_ (.A(\index[1] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), .Y(_13_)); - sky130_fd_sc_hd__inv_2 _29_ (.A(\index[1] ), + sky130_fd_sc_hd__and4b_1 _32_ (.A_N(\index[0] ), + .B(\index[1] ), + .C(\index[2] ), + .D(\index[3] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_14_)); - sky130_fd_sc_hd__or3_1 _30_ (.A(_11_), - .B(_12_), - .C(_14_), + .X(_14_)); + sky130_fd_sc_hd__nor2_1 _33_ (.A(net19), + .B(_14_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_15_)); - sky130_fd_sc_hd__and2_1 _31_ (.A(_13_), - .B(_15_), + .Y(_07_)); + sky130_fd_sc_hd__nor2_1 _34_ (.A(\index[0] ), + .B(\index[1] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_07_)); - sky130_fd_sc_hd__xnor2_1 _32_ (.A(\index[0] ), + .Y(_15_)); + sky130_fd_sc_hd__and2_1 _35_ (.A(\index[0] ), .B(\index[1] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_16_)); - sky130_fd_sc_hd__o21ba_1 _33_ (.A1(\index[0] ), - .A2(_15_), - .B1_N(_16_), + .X(_16_)); + sky130_fd_sc_hd__nor2_1 _36_ (.A(_15_), + .B(_16_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_08_)); - sky130_fd_sc_hd__or3_1 _34_ (.A(_11_), - .B(_13_), - .C(_14_), + .Y(_17_)); + sky130_fd_sc_hd__and2b_1 _37_ (.A_N(_14_), + .B(_17_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_17_)); - sky130_fd_sc_hd__a21o_1 _35_ (.A1(\index[0] ), - .A2(\index[1] ), - .B1(\index[2] ), + .X(_08_)); + sky130_fd_sc_hd__and3_1 _38_ (.A(\index[2] ), + .B(\index[0] ), + .C(\index[1] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), .X(_18_)); - sky130_fd_sc_hd__o211a_1 _36_ (.A1(\index[0] ), - .A2(_15_), - .B1(_17_), - .C1(_18_), + sky130_fd_sc_hd__inv_2 _39_ (.A(_18_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_09_)); - sky130_fd_sc_hd__a21boi_1 _37_ (.A1(_12_), - .A2(_17_), - .B1_N(_15_), + .Y(_19_)); + sky130_fd_sc_hd__nor2_1 _40_ (.A(\index[2] ), + .B(_16_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_10_)); - sky130_fd_sc_hd__nand2_1 _38_ (.A(\index[2] ), - .B(_13_), + .Y(_20_)); + sky130_fd_sc_hd__nor3_1 _41_ (.A(_14_), + .B(_18_), + .C(_20_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_19_)); - sky130_fd_sc_hd__a21oi_1 _39_ (.A1(\index[3] ), - .A2(\index[0] ), - .B1(_14_), + .Y(_09_)); + sky130_fd_sc_hd__xnor2_1 _42_ (.A(\index[3] ), + .B(_18_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_20_)); - sky130_fd_sc_hd__mux2_1 _40_ (.A0(_14_), - .A1(_20_), - .S(_19_), + .Y(_21_)); + sky130_fd_sc_hd__nor2_1 _43_ (.A(_14_), + .B(_21_), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .Y(_10_)); + sky130_fd_sc_hd__a21oi_1 _44_ (.A1(_12_), + .A2(\index[1] ), + .B1(\index[0] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_00_)); - sky130_fd_sc_hd__and3_1 _41_ (.A(\index[2] ), + .Y(_22_)); + sky130_fd_sc_hd__a21oi_1 _45_ (.A1(\index[2] ), + .A2(net19), + .B1(_22_), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .Y(_00_)); + sky130_fd_sc_hd__nor2_1 _46_ (.A(\index[3] ), .B(\index[0] ), - .C(_14_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_21_)); - sky130_fd_sc_hd__a211o_1 _42_ (.A1(_11_), + .Y(_23_)); + sky130_fd_sc_hd__o22a_1 _47_ (.A1(_11_), .A2(\index[3] ), - .B1(_20_), - .C1(_21_), + .B1(\index[1] ), + .B2(_23_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_01_)); - sky130_fd_sc_hd__mux2_1 _43_ (.A0(_17_), - .A1(_18_), - .S(_12_), + .X(_24_)); + sky130_fd_sc_hd__o31ai_1 _48_ (.A1(\index[2] ), + .A2(net19), + .A3(_13_), + .B1(_24_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_02_)); - sky130_fd_sc_hd__nand2b_1 _44_ (.A_N(\index[3] ), - .B(\index[0] ), + .Y(_01_)); + sky130_fd_sc_hd__or2_1 _49_ (.A(\index[2] ), + .B(\index[1] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_22_)); - sky130_fd_sc_hd__nand2_1 _45_ (.A(\index[1] ), - .B(_22_), + .X(_25_)); + sky130_fd_sc_hd__a31o_1 _50_ (.A1(_12_), + .A2(_19_), + .A3(_25_), + .B1(_10_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_23_)); - sky130_fd_sc_hd__a21o_1 _46_ (.A1(\index[3] ), - .A2(_13_), - .B1(\index[2] ), + .X(_02_)); + sky130_fd_sc_hd__nor2_1 _51_ (.A(_15_), + .B(_23_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_24_)); - sky130_fd_sc_hd__mux2_1 _47_ (.A0(_11_), - .A1(_24_), - .S(_23_), + .Y(_26_)); + sky130_fd_sc_hd__a21o_1 _52_ (.A1(_12_), + .A2(\index[1] ), + .B1(_11_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_03_)); - sky130_fd_sc_hd__a31o_1 _48_ (.A1(_11_), - .A2(\index[3] ), - .A3(_16_), - .B1(_21_), + .X(_27_)); + sky130_fd_sc_hd__mux2_1 _53_ (.A0(\index[2] ), + .A1(_27_), + .S(_26_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .X(_04_)); - sky130_fd_sc_hd__nor2_1 _49_ (.A(\index[2] ), - .B(\index[1] ), + .X(_03_)); + sky130_fd_sc_hd__o21ba_1 _54_ (.A1(_18_), + .A2(_20_), + .B1_N(_21_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_25_)); - sky130_fd_sc_hd__a21oi_1 _50_ (.A1(net19), - .A2(_22_), + .X(_28_)); + sky130_fd_sc_hd__o21a_1 _55_ (.A1(_15_), + .A2(_28_), .B1(_25_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), - .Y(_05_)); - sky130_fd_sc_hd__and3_1 _51_ (.A(_12_), - .B(\index[0] ), - .C(_25_), + .X(_04_)); + sky130_fd_sc_hd__mux2_1 _56_ (.A0(_17_), + .A1(_23_), + .S(\index[2] ), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .X(_05_)); + sky130_fd_sc_hd__and3_1 _57_ (.A(_11_), + .B(_13_), + .C(_23_), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR), .X(_06_)); - sky130_fd_sc_hd__dfrtp_4 _52_ (.CLK(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _58_ (.CLK(clknet_1_1__leaf_clk), .D(_00_), .RESET_B(net2), .VGND(VGND), @@ -277,7 +300,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[0])); - sky130_fd_sc_hd__dfrtp_4 _53_ (.CLK(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _59_ (.CLK(clknet_1_1__leaf_clk), .D(_02_), .RESET_B(net2), .VGND(VGND), @@ -285,7 +308,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[2])); - sky130_fd_sc_hd__dfrtp_4 _54_ (.CLK(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _60_ (.CLK(clknet_1_0__leaf_clk), .D(_01_), .RESET_B(net2), .VGND(VGND), @@ -293,7 +316,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[3])); - sky130_fd_sc_hd__dfrtp_4 _55_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _61_ (.CLK(clknet_1_0__leaf_clk), .D(_03_), .RESET_B(net2), .VGND(VGND), @@ -301,7 +324,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[4])); - sky130_fd_sc_hd__dfrtp_4 _56_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _62_ (.CLK(clknet_1_0__leaf_clk), .D(_04_), .RESET_B(net2), .VGND(VGND), @@ -309,7 +332,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[5])); - sky130_fd_sc_hd__dfrtp_4 _57_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _63_ (.CLK(clknet_1_0__leaf_clk), .D(_05_), .RESET_B(net2), .VGND(VGND), @@ -317,7 +340,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[6])); - sky130_fd_sc_hd__dfrtp_4 _58_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _64_ (.CLK(clknet_1_0__leaf_clk), .D(_06_), .RESET_B(net2), .VGND(VGND), @@ -325,7 +348,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(uo_out[7])); - sky130_fd_sc_hd__dfrtp_4 _59_ (.CLK(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _65_ (.CLK(clknet_1_1__leaf_clk), .D(_07_), .RESET_B(net2), .VGND(VGND), @@ -333,7 +356,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(\index[0] )); - sky130_fd_sc_hd__dfrtp_2 _60_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _66_ (.CLK(clknet_1_0__leaf_clk), .D(_08_), .RESET_B(net2), .VGND(VGND), @@ -341,7 +364,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(\index[1] )); - sky130_fd_sc_hd__dfrtp_4 _61_ (.CLK(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__dfrtp_4 _67_ (.CLK(clknet_1_0__leaf_clk), .D(_09_), .RESET_B(net2), .VGND(VGND), @@ -349,7 +372,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .Q(\index[2] )); - sky130_fd_sc_hd__dfrtp_2 _62_ (.CLK(clknet_1_0__leaf_clk), + sky130_fd_sc_hd__dfrtp_2 _68_ (.CLK(clknet_1_1__leaf_clk), .D(_10_), .RESET_B(net1), .VGND(VGND), @@ -438,7 +461,7 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .HI(net11)); - sky130_fd_sc_hd__buf_2 _79_ (.A(uo_out[3]), + sky130_fd_sc_hd__buf_2 _85_ (.A(uo_out[3]), .VGND(VGND), .VNB(VGND), .VPB(VPWR), @@ -1235,12 +1258,12 @@ module tt_um_senolgulgonul (clk, .VPB(VPWR), .VPWR(VPWR), .X(clknet_1_1__leaf_clk)); - sky130_fd_sc_hd__clkbuf_4 clkload0 (.A(clknet_1_1__leaf_clk), + sky130_fd_sc_hd__clkinv_2 clkload0 (.A(clknet_1_1__leaf_clk), .VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__dlygate4sd3_1 hold1 (.A(\index[2] ), + sky130_fd_sc_hd__dlygate4sd3_1 hold1 (.A(\index[0] ), .VGND(VGND), .VNB(VGND), .VPB(VPWR), @@ -5442,19 +5465,15 @@ module tt_um_senolgulgonul (clk, .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_29_181 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_29_193 (.VPWR(VPWR), - .VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_29_181 (.VGND(VGND), + .VNB(VGND), .VPB(VPWR), - .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_29_205 (.VPWR(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_0_29_203 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_6 FILLER_0_29_217 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_29_215 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -5566,27 +5585,15 @@ module tt_um_senolgulgonul (clk, .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_30_141 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_30_153 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_30_164 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_30_165 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_30_176 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_30_177 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_fd_sc_hd__decap_6 FILLER_0_30_189 (.VGND(VGND), - .VNB(VGND), - .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_30_195 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_30_188 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -5710,34 +5717,22 @@ module tt_um_senolgulgonul (clk, .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_3 FILLER_0_31_145 (.VGND(VGND), + sky130_fd_sc_hd__decap_4 FILLER_0_31_169 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_31_156 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_fd_sc_hd__fill_1 FILLER_0_31_169 (.VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_31_173 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_3 FILLER_0_31_175 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_31_181 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_31_207 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_31_212 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_4 FILLER_0_31_219 (.VGND(VGND), - .VNB(VGND), - .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_31_223 (.VGND(VGND), - .VNB(VGND), - .VPB(VPWR), - .VPWR(VPWR)); sky130_ef_sc_hd__decap_12 FILLER_0_31_225 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), @@ -5842,27 +5837,39 @@ module tt_um_senolgulgonul (clk, .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_4 FILLER_0_32_165 (.VGND(VGND), + sky130_fd_sc_hd__decap_4 FILLER_0_32_141 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_32_151 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_32_175 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_32_179 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_3 FILLER_0_32_197 (.VGND(VGND), + sky130_fd_sc_hd__fill_2 FILLER_0_32_194 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_32_223 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_32_208 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_32_235 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_32_220 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_4 FILLER_0_32_247 (.VGND(VGND), - .VNB(VGND), + sky130_ef_sc_hd__decap_12 FILLER_0_32_232 (.VPWR(VPWR), + .VGND(VGND), .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_32_251 (.VGND(VGND), + .VNB(VGND)); + sky130_fd_sc_hd__decap_8 FILLER_0_32_244 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -5958,23 +5965,35 @@ module tt_um_senolgulgonul (clk, .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_4 FILLER_0_33_137 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_33_137 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_0_33_145 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_33_148 (.VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_33_157 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_33_169 (.VGND(VGND), + sky130_fd_sc_hd__fill_2 FILLER_0_33_179 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_8 FILLER_0_33_214 (.VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_33_188 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_2 FILLER_0_33_222 (.VGND(VGND), + sky130_ef_sc_hd__decap_12 FILLER_0_33_192 (.VPWR(VPWR), + .VGND(VGND), + .VPB(VPWR), + .VNB(VGND)); + sky130_ef_sc_hd__decap_12 FILLER_0_33_204 (.VPWR(VPWR), + .VGND(VGND), + .VPB(VPWR), + .VNB(VGND)); + sky130_fd_sc_hd__decap_8 FILLER_0_33_216 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -6074,19 +6093,39 @@ module tt_um_senolgulgonul (clk, .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__fill_2 FILLER_0_34_141 (.VGND(VGND), + sky130_fd_sc_hd__decap_6 FILLER_0_34_133 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_34_229 (.VPWR(VPWR), - .VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_34_139 (.VGND(VGND), + .VNB(VGND), .VPB(VPWR), - .VNB(VGND)); - sky130_fd_sc_hd__decap_8 FILLER_0_34_241 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_34_141 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_34_145 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_3 FILLER_0_34_249 (.VGND(VGND), + sky130_fd_sc_hd__fill_1 FILLER_0_34_175 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_34_201 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_0_34_226 (.VPWR(VPWR), + .VGND(VGND), + .VPB(VPWR), + .VNB(VGND)); + sky130_ef_sc_hd__decap_12 FILLER_0_34_238 (.VPWR(VPWR), + .VGND(VGND), + .VPB(VPWR), + .VNB(VGND)); + sky130_fd_sc_hd__fill_2 FILLER_0_34_250 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -6178,31 +6217,23 @@ module tt_um_senolgulgonul (clk, .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_35_125 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_fd_sc_hd__fill_1 FILLER_0_35_137 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_35_125 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_6 FILLER_0_35_161 (.VGND(VGND), + sky130_fd_sc_hd__decap_3 FILLER_0_35_133 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_35_167 (.VGND(VGND), - .VNB(VGND), - .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__decap_8 FILLER_0_35_169 (.VGND(VGND), - .VNB(VGND), + sky130_ef_sc_hd__decap_12 FILLER_0_35_194 (.VPWR(VPWR), + .VGND(VGND), .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__fill_1 FILLER_0_35_177 (.VGND(VGND), - .VNB(VGND), + .VNB(VGND)); + sky130_ef_sc_hd__decap_12 FILLER_0_35_206 (.VPWR(VPWR), + .VGND(VGND), .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__decap_8 FILLER_0_35_216 (.VGND(VGND), + .VNB(VGND)); + sky130_fd_sc_hd__decap_6 FILLER_0_35_218 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -6310,43 +6341,35 @@ module tt_um_senolgulgonul (clk, .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_8 FILLER_0_36_141 (.VGND(VGND), - .VNB(VGND), + sky130_ef_sc_hd__decap_12 FILLER_0_36_141 (.VPWR(VPWR), + .VGND(VGND), .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__decap_6 FILLER_0_36_175 (.VGND(VGND), + .VNB(VGND)); + sky130_fd_sc_hd__fill_2 FILLER_0_36_153 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_2 FILLER_0_36_188 (.VGND(VGND), + sky130_fd_sc_hd__fill_2 FILLER_0_36_161 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__fill_2 FILLER_0_36_194 (.VGND(VGND), + sky130_fd_sc_hd__decap_3 FILLER_0_36_186 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_3 FILLER_0_36_197 (.VGND(VGND), + sky130_fd_sc_hd__decap_3 FILLER_0_36_193 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_36_206 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_36_218 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_36_220 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_36_230 (.VPWR(VPWR), + sky130_ef_sc_hd__decap_12 FILLER_0_36_232 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_8 FILLER_0_36_242 (.VGND(VGND), - .VNB(VGND), - .VPB(VPWR), - .VPWR(VPWR)); - sky130_fd_sc_hd__fill_2 FILLER_0_36_250 (.VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_36_244 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -6442,11 +6465,19 @@ module tt_um_senolgulgonul (clk, .VGND(VGND), .VPB(VPWR), .VNB(VGND)); - sky130_fd_sc_hd__decap_8 FILLER_0_37_137 (.VGND(VGND), + sky130_fd_sc_hd__decap_4 FILLER_0_37_137 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_37_164 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_fd_sc_hd__decap_8 FILLER_0_37_169 (.VGND(VGND), + sky130_fd_sc_hd__decap_4 FILLER_0_37_169 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_37_219 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); @@ -6590,18 +6621,18 @@ module tt_um_senolgulgonul (clk, .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); - sky130_ef_sc_hd__decap_12 FILLER_0_38_197 (.VPWR(VPWR), - .VGND(VGND), - .VPB(VPWR), - .VNB(VGND)); - sky130_ef_sc_hd__decap_12 FILLER_0_38_209 (.VPWR(VPWR), - .VGND(VGND), + sky130_fd_sc_hd__decap_8 FILLER_0_38_197 (.VGND(VGND), + .VNB(VGND), .VPB(VPWR), - .VNB(VGND)); - sky130_fd_sc_hd__decap_3 FILLER_0_38_221 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_38_205 (.VGND(VGND), .VNB(VGND), .VPB(VPWR), .VPWR(VPWR)); + sky130_ef_sc_hd__decap_12 FILLER_0_38_212 (.VPWR(VPWR), + .VGND(VGND), + .VPB(VPWR), + .VNB(VGND)); sky130_ef_sc_hd__decap_12 FILLER_0_38_225 (.VPWR(VPWR), .VGND(VGND), .VPB(VPWR),