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feat: update project tt_um_ece298a_8_bit_cpu_top from gjrchen/8-Bit-C…
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…PU-top

Commit: 730b2f8b61c1c0592e8e529c32150931fae74475
Workflow: https://github.com/gjrchen/8-Bit-CPU-top/actions/runs/11766874807
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@TinyTapeoutBot @urish
TinyTapeoutBot authored and urish committed Nov 10, 2024
1 parent 2eef3f7 commit e25945a
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Showing 8 changed files with 3,935 additions and 3,414 deletions.
4 changes: 2 additions & 2 deletions projects/tt_um_ece298a_8_bit_cpu_top/commit_id.json
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@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt08 b85e49a2",
"repo": "https://github.com/gjrchen/8-Bit-CPU-top",
"commit": "868e597c70bd949d0969770b3eb1642986a3ec1a",
"workflow_url": "https://github.com/gjrchen/8-Bit-CPU-top/actions/runs/11746496721",
"commit": "730b2f8b61c1c0592e8e529c32150931fae74475",
"workflow_url": "https://github.com/gjrchen/8-Bit-CPU-top/actions/runs/11766874807",
"sort_id": 1731180356210,
"openlane_version": "OpenLane2 2.0.8",
"pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"
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549 changes: 525 additions & 24 deletions projects/tt_um_ece298a_8_bit_cpu_top/docs/info.md
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48 changes: 24 additions & 24 deletions projects/tt_um_ece298a_8_bit_cpu_top/info.yaml
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Expand Up @@ -33,34 +33,34 @@ project:
# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
# Inputs
ui[0]: "in_0"
ui[1]: "in_1"
ui[2]: "in_2"
ui[3]: "in_3"
ui[4]: "in_4"
ui[5]: "in_5"
ui[6]: "in_6"
ui[7]: "in_7"
ui[0]: "prog_in_0"
ui[1]: "prog_in_1"
ui[2]: "prog_in_2"
ui[3]: "prog_in_3"
ui[4]: "prog_in_4"
ui[5]: "prog_in_5"
ui[6]: "prog_in_6"
ui[7]: "prog_in_7"

# Outputs
uo[0]: "out_0"
uo[1]: "out_1"
uo[2]: "out_2"
uo[3]: "out_3"
uo[4]: "out_4"
uo[5]: "out_5"
uo[6]: "out_6"
uo[7]: "out_7"
uo[0]: "output_register_0"
uo[1]: "output_register_1"
uo[2]: "output_register_2"
uo[3]: "output_register_3"
uo[4]: "output_register_4"
uo[5]: "output_register_5"
uo[6]: "output_register_6"
uo[7]: "output_register_7"

# Bidirectional pins
uio[0]: "in_out_0"
uio[1]: "in_out_1"
uio[2]: "in_out_2"
uio[3]: "in_out_3"
uio[4]: "in_out_4"
uio[5]: "in_out_5"
uio[6]: "in_out_6"
uio[7]: "in_out_7"
uio[0]: "in_programming"
uio[1]: "out_ready_for_ui"
uio[2]: "out_done_load"
uio[3]: "out_CF"
uio[4]: "out_ZF"
uio[5]: "out_HF"
uio[6]: ""
uio[7]: ""

# Do not change!
yaml_version: 6
238 changes: 121 additions & 117 deletions projects/tt_um_ece298a_8_bit_cpu_top/stats/metrics.csv
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57 changes: 29 additions & 28 deletions projects/tt_um_ece298a_8_bit_cpu_top/stats/synthesis-stats.txt
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Expand Up @@ -2,55 +2,56 @@

=== tt_um_ece298a_8_bit_cpu_top ===

Number of wires: 684
Number of wire bits: 719
Number of wires: 681
Number of wire bits: 716
Number of public wires: 215
Number of public wire bits: 250
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 740
sky130_fd_sc_hd__a2111o_2 3
Number of cells: 737
sky130_fd_sc_hd__a2111o_2 1
sky130_fd_sc_hd__a211o_2 2
sky130_fd_sc_hd__a21bo_2 1
sky130_fd_sc_hd__a21o_2 2
sky130_fd_sc_hd__a21oi_2 8
sky130_fd_sc_hd__a22o_2 10
sky130_fd_sc_hd__a21o_2 1
sky130_fd_sc_hd__a21oi_2 6
sky130_fd_sc_hd__a22o_2 9
sky130_fd_sc_hd__a2bb2o_2 1
sky130_fd_sc_hd__a311o_2 2
sky130_fd_sc_hd__a31o_2 6
sky130_fd_sc_hd__a32o_2 1
sky130_fd_sc_hd__and2_2 20
sky130_fd_sc_hd__and2b_2 4
sky130_fd_sc_hd__and3_2 7
sky130_fd_sc_hd__and3b_2 2
sky130_fd_sc_hd__and4b_2 1
sky130_fd_sc_hd__buf_1 12
sky130_fd_sc_hd__a31o_2 5
sky130_fd_sc_hd__a41oi_2 1
sky130_fd_sc_hd__and2_2 21
sky130_fd_sc_hd__and2b_2 3
sky130_fd_sc_hd__and3_2 3
sky130_fd_sc_hd__and3b_2 4
sky130_fd_sc_hd__and4_2 1
sky130_fd_sc_hd__and4b_2 2
sky130_fd_sc_hd__buf_2 16
sky130_fd_sc_hd__dfxtp_2 203
sky130_fd_sc_hd__ebufn_2 48
sky130_fd_sc_hd__inv_2 54
sky130_fd_sc_hd__mux2_1 185
sky130_fd_sc_hd__inv_2 25
sky130_fd_sc_hd__mux2_1 187
sky130_fd_sc_hd__mux4_2 32
sky130_fd_sc_hd__nand2_2 16
sky130_fd_sc_hd__nand2_2 45
sky130_fd_sc_hd__nand2b_2 9
sky130_fd_sc_hd__nand3_2 7
sky130_fd_sc_hd__nand3b_2 1
sky130_fd_sc_hd__nor2_2 21
sky130_fd_sc_hd__nand3_2 6
sky130_fd_sc_hd__nand3b_2 9
sky130_fd_sc_hd__nor2_2 19
sky130_fd_sc_hd__nor3_2 1
sky130_fd_sc_hd__nor4_2 1
sky130_fd_sc_hd__o211a_2 2
sky130_fd_sc_hd__o211ai_2 1
sky130_fd_sc_hd__o21a_2 10
sky130_fd_sc_hd__o21a_2 9
sky130_fd_sc_hd__o21ai_2 2
sky130_fd_sc_hd__o21ba_2 3
sky130_fd_sc_hd__o21ba_2 4
sky130_fd_sc_hd__o32a_2 1
sky130_fd_sc_hd__or2_2 18
sky130_fd_sc_hd__or3_2 3
sky130_fd_sc_hd__or3b_2 14
sky130_fd_sc_hd__or2_2 33
sky130_fd_sc_hd__or3_2 4
sky130_fd_sc_hd__or3b_2 6
sky130_fd_sc_hd__or4_2 2
sky130_fd_sc_hd__or4b_2 1
sky130_fd_sc_hd__or4bb_2 1
sky130_fd_sc_hd__xnor2_2 4
sky130_fd_sc_hd__xor2_2 4

Chip area for module '\tt_um_ece298a_8_bit_cpu_top': 9611.718400
Chip area for module '\tt_um_ece298a_8_bit_cpu_top': 9718.070400

Binary file modified projects/tt_um_ece298a_8_bit_cpu_top/tt_um_ece298a_8_bit_cpu_top.gds
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28 changes: 14 additions & 14 deletions projects/tt_um_ece298a_8_bit_cpu_top/tt_um_ece298a_8_bit_cpu_top.lef
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Expand Up @@ -294,7 +294,7 @@ MACRO tt_um_ece298a_8_bit_cpu_top
PIN uio_out[1]
DIRECTION OUTPUT ;
USE SIGNAL ;
ANTENNADIFFAREA 0.445500 ;
ANTENNADIFFAREA 0.795200 ;
PORT
LAYER met4 ;
RECT 69.310 110.520 69.610 111.520 ;
Expand All @@ -303,7 +303,7 @@ MACRO tt_um_ece298a_8_bit_cpu_top
PIN uio_out[2]
DIRECTION OUTPUT ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
ANTENNADIFFAREA 0.445500 ;
PORT
LAYER met4 ;
RECT 66.550 110.520 66.850 111.520 ;
Expand All @@ -312,7 +312,7 @@ MACRO tt_um_ece298a_8_bit_cpu_top
PIN uio_out[3]
DIRECTION OUTPUT ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
ANTENNADIFFAREA 0.445500 ;
PORT
LAYER met4 ;
RECT 63.790 110.520 64.090 111.520 ;
Expand All @@ -330,7 +330,7 @@ MACRO tt_um_ece298a_8_bit_cpu_top
PIN uio_out[5]
DIRECTION OUTPUT ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
ANTENNADIFFAREA 0.445500 ;
PORT
LAYER met4 ;
RECT 58.270 110.520 58.570 111.520 ;
Expand Down Expand Up @@ -459,11 +459,11 @@ MACRO tt_um_ece298a_8_bit_cpu_top
LAYER li1 ;
RECT 2.760 2.635 158.240 108.885 ;
LAYER met1 ;
RECT 2.760 2.480 158.240 109.040 ;
RECT 2.760 2.080 158.240 109.440 ;
LAYER met2 ;
RECT 6.540 2.535 156.760 110.685 ;
RECT 4.700 2.050 156.760 110.685 ;
LAYER met3 ;
RECT 14.785 2.555 152.655 110.665 ;
RECT 17.085 2.555 154.035 110.665 ;
LAYER met4 ;
RECT 31.370 110.120 33.030 111.170 ;
RECT 34.130 110.120 35.790 111.170 ;
Expand Down Expand Up @@ -507,13 +507,13 @@ MACRO tt_um_ece298a_8_bit_cpu_top
RECT 139.010 110.120 140.670 111.170 ;
RECT 141.770 110.120 143.430 111.170 ;
RECT 30.655 109.440 144.145 110.120 ;
RECT 30.655 22.615 56.750 109.440 ;
RECT 59.150 22.615 60.050 109.440 ;
RECT 62.450 22.615 95.620 109.440 ;
RECT 98.020 22.615 98.920 109.440 ;
RECT 101.320 22.615 134.490 109.440 ;
RECT 136.890 22.615 137.790 109.440 ;
RECT 140.190 22.615 144.145 109.440 ;
RECT 30.655 52.535 56.750 109.440 ;
RECT 59.150 52.535 60.050 109.440 ;
RECT 62.450 52.535 95.620 109.440 ;
RECT 98.020 52.535 98.920 109.440 ;
RECT 101.320 52.535 134.490 109.440 ;
RECT 136.890 52.535 137.790 109.440 ;
RECT 140.190 52.535 144.145 109.440 ;
END
END tt_um_ece298a_8_bit_cpu_top
END LIBRARY
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