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Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #129: Commit bee7568 pushed by Timmmm
August 21, 2024 09:57 22m 35s user/timh/cbo
user/timh/cbo
August 21, 2024 09:57 22m 35s
Update model/riscv_insts_zicboz.sail CI #128: Commit 5feaa01 pushed by Timmmm
August 21, 2024 09:57 22m 40s user/timh/cbo
user/timh/cbo
August 21, 2024 09:57 22m 40s
Update c_emulator/riscv_sim.c CI #127: Commit eed2323 pushed by Timmmm
August 21, 2024 09:56 22m 48s user/timh/cbo
user/timh/cbo
August 21, 2024 09:56 22m 48s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #126: Commit 72fae64 pushed by Timmmm
August 16, 2024 20:21 22m 50s user/timh/cbo
user/timh/cbo
August 16, 2024 20:21 22m 50s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #125: Commit c0729fb pushed by Timmmm
August 5, 2024 14:38 23m 39s user/timh/cbo
user/timh/cbo
August 5, 2024 14:38 23m 39s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #124: Commit 69e993b pushed by Timmmm
August 5, 2024 14:21 5m 5s user/timh/cbo
user/timh/cbo
August 5, 2024 14:21 5m 5s
Add support for HPM counters CI #123: Commit 023c48d pushed by Timmmm
July 22, 2024 15:07 24m 33s user/timh/hpmcounters
user/timh/hpmcounters
July 22, 2024 15:07 24m 33s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #122: Commit 82efd68 pushed by Timmmm
July 16, 2024 16:02 23m 31s user/timh/cbo
user/timh/cbo
July 16, 2024 16:02 23m 31s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #121: Commit 15699af pushed by Timmmm
July 16, 2024 15:49 23m 37s user/timh/cbo
user/timh/cbo
July 16, 2024 15:49 23m 37s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #120: Commit ec2c6ba pushed by Timmmm
July 16, 2024 13:57 23m 47s user/timh/cbo
user/timh/cbo
July 16, 2024 13:57 23m 47s
Use physical addresses for LR/SC reservations CI #119: Commit 585e6ff pushed by Timmmm
July 15, 2024 14:58 24m 34s user/timh/physical_reservation_address
user/timh/physical_reservation_address
July 15, 2024 14:58 24m 34s
Remove redundant CSR privilege checks CI #118: Commit 0d8b50e pushed by Timmmm
July 10, 2024 15:07 23m 38s user/timh/redundant_access_checks
user/timh/redundant_access_checks
July 10, 2024 15:07 23m 38s
Increase TLB size to 64 CI #117: Commit be3f3b1 pushed by Timmmm
July 4, 2024 15:30 24m 9s user/timh/bigger_tlb_2
user/timh/bigger_tlb_2
July 4, 2024 15:30 24m 9s
Remove redundant CSR privilege checks CI #116: Commit f5b67c6 pushed by Timmmm
July 4, 2024 15:25 24m 8s user/timh/redundant_access_checks
user/timh/redundant_access_checks
July 4, 2024 15:25 24m 8s
Fix TLB bug CI #115: Commit 76282a9 pushed by Timmmm
July 4, 2024 15:25 23m 39s user/timh/tlb_fix
user/timh/tlb_fix
July 4, 2024 15:25 23m 39s
Use physical addresses for LR/SC reservations CI #114: Commit 085b37a pushed by Timmmm
July 4, 2024 15:24 23m 19s user/timh/physical_reservation_address
user/timh/physical_reservation_address
July 4, 2024 15:24 23m 19s
Use bool <-> bit mappings from riscv_types.sail CI #113: Commit dcf8d01 pushed by Timmmm
July 4, 2024 15:24 23m 20s user/timh/bool_mappings
user/timh/bool_mappings
July 4, 2024 15:24 23m 20s
Add support for HPM counters CI #112: Commit a880990 pushed by Timmmm
July 4, 2024 15:24 23m 25s user/timh/hpmcounters
user/timh/hpmcounters
July 4, 2024 15:24 23m 25s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #111: Commit c1f1520 pushed by Timmmm
July 4, 2024 15:23 23m 12s user/timh/cbo
user/timh/cbo
July 4, 2024 15:23 23m 12s
Use physical addresses for LR/SC reservations CI #110: Commit 11e63e7 pushed by Timmmm
June 19, 2024 10:52 23m 41s user/timh/physical_reservation_address
user/timh/physical_reservation_address
June 19, 2024 10:52 23m 41s
Fix consecutive builds of the OCaml emulator CI #109: Commit 634d2c5 pushed by Timmmm
June 18, 2024 17:01 23m 16s user/timh/sail_file_permissions
user/timh/sail_file_permissions
June 18, 2024 17:01 23m 16s
Increase TLB size to 64 CI #108: Commit 3f5b7f4 pushed by Timmmm
June 18, 2024 15:43 23m 30s user/timh/bigger_tlb_2
user/timh/bigger_tlb_2
June 18, 2024 15:43 23m 30s
Increase TLB size to 64 CI #107: Commit 51970a6 pushed by Timmmm
June 18, 2024 15:42 24m 38s user/timh/bigger_tlb_2
user/timh/bigger_tlb_2
June 18, 2024 15:42 24m 38s
Remove redundant CSR privilege checks CI #106: Commit 50b6448 pushed by Timmmm
June 18, 2024 15:41 24m 13s user/timh/redundant_access_checks
user/timh/redundant_access_checks
June 18, 2024 15:41 24m 13s
Fix TLB bug CI #105: Commit ff1515d pushed by Timmmm
June 18, 2024 15:38 23m 46s user/timh/tlb_fix
user/timh/tlb_fix
June 18, 2024 15:38 23m 46s