I would like to simulate my design that uses fakeram45_256x16, but I cannot find the .v file that describes its behavior.

[LucaMartis00]

Where are the Verilog files that describe the behavior of fakeram memories?
I can only find .lib, .lef, and .gds files that allow me to create the design. However, this way, I have no means to verify if my design is actually functioning.

[maliberty]

They are fake so there is no Verilog. They are mostly to allow physical design testing not functional testing.

[rovinski]

The original fakerams were generated from https://github.com/bespoke-silicon-group/bsg_fakeram or a fork of it. You could try putting the config into it to generate the verilog if needed.

[LucaMartis00]

Okay, perfect, that makes sense.
As for the igp-sg13g2 PDK, the documentation states that there are SRAMs included, but I can't seem to find them.
Are they supported?

[maliberty]

They are not in ORFS yet. I've asked in #2084 about them.

[LucaMartis00]

Shouldn't it be enough to simply include the memory LEF/LIB/GDS files? Or are there other parts of the script that need to be modified, such as the pdn.tcl?

[maliberty]

Also .v & .cdl but otherwise yes. That's mostly what the above PR is about. Is this urgent for you?

[LucaMartis00]

It would be great if I could finish the work I'm doing by August, and with those memories, it would be easier compared to using OpenRAM.

[maliberty]

I've opened #2171 to get the raw files in. I haven't setup pdn but you could look at nangate45 as an example of how to do that.

[LucaMartis00]

Thank you very much. If I understand correctly, then only pdn.tcl needs to be modified, and the rest has already been done by you?

[LucaMartis00]

If I understand correctly, if I want to add also I/O pins, which are not supported by ORFS for now, I just have to copy and paste the related files (.cdl, .gds, .gds, .lef) and then modify pdn.tcl?

[maliberty]

Depending on which ram(s) you use you'll need to set ADDITIONAL_LIBS/ADDITIONAL_LEFS/ADDITIONAL_GDS (see flow/designs/sky130hd/microwatt/config.mk for example).

For IOs you'll also need to setup the pad placer.

[LucaMartis00]

Perfect, thank you again. Where could I have found all this information in the documentation?

[maliberty]

https://openroad-flow-scripts.readthedocs.io/en/latest/user/FlowVariables.html#id1 for ADD*
https://openroad-flow-scripts.readthedocs.io/en/latest/user/AddingNewDesign.html
https://openroad-flow-scripts.readthedocs.io/en/latest/contrib/PlatformBringUp.html
https://openroad.readthedocs.io/en/latest/main/src/pdn/README.html

[LucaMartis00]

Hi, I have seen that the IHP memories were added.
I'm trying to use them in my design, but I’m having some problems during the PDN generation stage and in the final part of the flow.

1. PDN: It seems like the memories are not connected.
   [WARNING STA-0347] current_design for other than top cell not supported.
[WARNING PDN-0189] Supply pin sample_mem.mem0/VSS! is not connected to any net.
[WARNING PDN-0189] Supply pin sample_mem.mem0/VDD! is not connected to any net.
[WARNING PDN-0189] Supply pin sample_mem.mem0/VDDARRAY! is not connected to any net.
[WARNING PDN-0189] Supply pin sample_mem.mem1/VSS! is not connected to any net.
[WARNING PDN-0189] Supply pin sample_mem.mem1/VDD! is not connected to any net.
[WARNING PDN-0189] Supply pin sample_mem.mem1/VDDARRAY! is not connected to any net.
[INFO PDN-0001] Inserting grid: grid

2. Final: ERROR of no matching GDS/OAS

For the second problem, I solved it by adding the following setting, in the config.mk file:
export GDS_ALLOW_EMPTY = RM_IHPSG13_1P_BITKIT_16x2_LE_con_edge_lr|RM_IHPSG13_1P_BITKIT_16x2_LE_con_tap_lr|RM_IHPSG13_1P_BITKIT_16x2_TAP_LR|RM_IHPSG13_1P_BITKIT_16x2_POWER_ramtap|RM_IHPSG13_1P_BITKIT_16x2_LE_con_corner|RM_IHPSG13_1P_BITKIT_16x2_CORNER|RM_IHPSG13_1P_BITKIT_16x2_TAP|RM_IHPSG13_1P_BITKIT_16x2_EDGE_TB

but I don’t know how to fix the PDN issue. Should I modify the pdn.tcl file?

[maliberty]

You can't just drop memories from one PDK into another. You would need to switch to IHP. You should open an issue with a test case as not much can be done from some messages.