diff --git a/README.md b/README.md
index d9d625416..4590f4ca4 100644
--- a/README.md
+++ b/README.md
@@ -1,11 +1,9 @@
OpenLane
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-
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-
+
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OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, CVC, SPEF-Extractor, KLayout and a number of custom scripts for design exploration and optimization. The flow performs all ASIC implementation steps from RTL all the way down to GDSII.
diff --git a/flake.lock b/flake.lock
index a3c57fa90..636c1f435 100644
--- a/flake.lock
+++ b/flake.lock
@@ -21,7 +21,6 @@
]
},
"locked": {
- "lastModified": 1713262631,
"narHash": "sha256-0Lt3DVImH3TpwUh7sDW/6Cxsrmo5DDG+SCuirBFquXs=",
"owner": "efabless",
"repo": "ioplace_parser",
@@ -42,7 +41,6 @@
]
},
"locked": {
- "lastModified": 1713178934,
"narHash": "sha256-1w6HBBE2bWAD0GM98O8WZRmZDW9+EzD0KFvnnH2ho/k=",
"owner": "efabless",
"repo": "libparse-python",
@@ -78,11 +76,10 @@
"nixpkgs": "nixpkgs"
},
"locked": {
- "lastModified": 1713887831,
- "narHash": "sha256-DNbYE+oON8U+xqaBgmnWzoJjzO8TOxRphGNYi8ZvZEA=",
+ "narHash": "sha256-DB0E0yiE0sTVHilOCLhdAP9vx1BpCH1SaqZhXta2rSU=",
"owner": "efabless",
"repo": "openlane2",
- "rev": "a42ba4f3d1d32623ba390722125d899978b4e23e",
+ "rev": "40a06364e82cd248c30e7958d3a543925c617d7a",
"type": "github"
},
"original": {