From dac28ec8bd8f994cb7b4c218e8989c9057bb0047 Mon Sep 17 00:00:00 2001 From: Anthony Nourry Date: Wed, 13 Nov 2019 15:50:44 +0100 Subject: [PATCH] Port OpenAMP_FreeRTOS example through STM32CubeIDE --- .../OpenAMP_FreeRTOS_echo/.project | 29 + .../OpenAMP_FreeRTOS_echo/CM4/.cproject | 157 ++++ .../OpenAMP_FreeRTOS_echo/CM4/.project | 331 ++++++++ .../CM4/stm32mp15xx_m4.ld | 202 +++++ .../STM32CubeIDE/startup_stm32mp15xx.s | 792 ++++++++++++++++++ .../STM32CubeIDE/syscalls.c | 204 +++++ .../OpenAMP_FreeRTOS_echo/.project | 29 + .../OpenAMP_FreeRTOS_echo/CM4/.cproject | 159 ++++ .../OpenAMP_FreeRTOS_echo/CM4/.project | 331 ++++++++ .../CM4/stm32mp15xx_m4.ld | 202 +++++ .../STM32CubeIDE/startup_stm32mp15xx.s | 792 ++++++++++++++++++ .../STM32CubeIDE/syscalls.c | 204 +++++ 12 files changed, 3432 insertions(+) create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s create mode 100644 Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s create mode 100644 Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project new file mode 100644 index 00000000..d876937a --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project @@ -0,0 +1,29 @@ + + + OpenAMP_FreeRTOS_echo + + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mpu.projectnatures.core.MPUEmbeddedMCUProjectNature + + + + 1568709163798 + + 22 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-*.launch + + + + diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject new file mode 100644 index 00000000..9bbec587 --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject @@ -0,0 +1,157 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project new file mode 100644 index 00000000..e2a40025 --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project @@ -0,0 +1,331 @@ + + + OpenAMP_FreeRTOS_echo_CM4 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mpu.projectnatures.core.MPUEmbeddedMCUProjectNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + com.st.stm32cube.ide.mcu.MCUSW4STM32ConvertedProjectNature + + + + Doc/readme.txt + 1 + PARENT-3-PROJECT_LOC/readme.txt + + + Remoteproc/README + 1 + PARENT-3-PROJECT_LOC/Remoteproc/README + + + Remoteproc/fw_cortex_m4.sh + 1 + PARENT-3-PROJECT_LOC/Remoteproc/fw_cortex_m4.sh + + + Application/STM32CubeIDE/startup_stm32mp15xx.s + 1 + PARENT-2-PROJECT_LOC/startup_stm32mp15xx.s + + + Application/STM32CubeIDE/syscalls.c + 1 + PARENT-2-PROJECT_LOC/syscalls.c + + + Application/User/app_freertos.c + 1 + PARENT-3-PROJECT_LOC/Src/app_freertos.c + + + Application/User/lock_resource.c + 1 + PARENT-3-PROJECT_LOC/Src/lock_resource.c + + + Application/User/main.c + 1 + PARENT-3-PROJECT_LOC/Src/main.c + + + Application/User/mbox_ipcc.c + 1 + PARENT-3-PROJECT_LOC/Src/mbox_ipcc.c + + + Application/User/openamp.c + 1 + PARENT-3-PROJECT_LOC/Src/openamp.c + + + Application/User/openamp_log.c + 1 + PARENT-3-PROJECT_LOC/Src/openamp_log.c + + + Application/User/rsc_table.c + 1 + PARENT-3-PROJECT_LOC/Src/rsc_table.c + + + Application/User/stm32mp1xx_hal_msp.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_hal_msp.c + + + Application/User/stm32mp1xx_hal_timebase_tim.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_hal_timebase_tim.c + + + Application/User/stm32mp1xx_it.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_it.c + + + Drivers/BSP/stm32mp15xx_disco.c + 1 + PARENT-8-PROJECT_LOC/Drivers/BSP/STM32MP15xx_DISCO/stm32mp15xx_disco.c + + + Drivers/CMSIS/system_stm32mp1xx.c + 1 + PARENT-3-PROJECT_LOC/Src/system_stm32mp1xx.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_cortex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_dma.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_dma_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_exti.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_gpio.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_hsem.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_ipcc.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_mdma.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_pwr.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_pwr_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_rcc.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_rcc_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_tim.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_tim_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c + + + Middlewares/FreeRTOS/cmsis_os2.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c + + + Middlewares/FreeRTOS/croutine.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/croutine.c + + + Middlewares/FreeRTOS/event_groups.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + + + Middlewares/FreeRTOS/heap_4.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c + + + Middlewares/FreeRTOS/list.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/list.c + + + Middlewares/FreeRTOS/port.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c + + + Middlewares/FreeRTOS/queue.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/queue.c + + + Middlewares/FreeRTOS/stream_buffer.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c + + + Middlewares/FreeRTOS/tasks.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/tasks.c + + + Middlewares/FreeRTOS/timers.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/timers.c + + + Middlewares/OpenAMP/libmetal/device.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/device.c + + + Middlewares/OpenAMP/libmetal/init.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/init.c + + + Middlewares/OpenAMP/libmetal/io.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/io.c + + + Middlewares/OpenAMP/libmetal/log.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/log.c + + + Middlewares/OpenAMP/libmetal/shmem.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/shmem.c + + + Middlewares/OpenAMP/virtual_driver/virt_uart.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/virtual_driver/virt_uart.c + + + Middlewares/OpenAMP/libmetal/generic/condition.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/condition.c + + + Middlewares/OpenAMP/libmetal/generic/generic_device.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_device.c + + + Middlewares/OpenAMP/libmetal/generic/generic_init.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_init.c + + + Middlewares/OpenAMP/libmetal/generic/generic_io.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_io.c + + + Middlewares/OpenAMP/libmetal/generic/generic_shmem.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_shmem.c + + + Middlewares/OpenAMP/libmetal/generic/time.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/time.c + + + Middlewares/OpenAMP/open-amp/remoteproc/remoteproc_virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/remoteproc/remoteproc_virtio.c + + + Middlewares/OpenAMP/open-amp/rpmsg/rpmsg.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/rpmsg/rpmsg.c + + + Middlewares/OpenAMP/open-amp/rpmsg/rpmsg_virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/rpmsg/rpmsg_virtio.c + + + Middlewares/OpenAMP/open-amp/virtio/virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/virtio/virtio.c + + + Middlewares/OpenAMP/open-amp/virtio/virtqueue.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/virtio/virtqueue.c + + + Middlewares/OpenAMP/libmetal/generic/cortexm/sys.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/cortexm/sys.c + + + diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld new file mode 100644 index 00000000..cbad455d --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld @@ -0,0 +1,202 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32MP1 series +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,� without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© Copyright (c) 2019 STMicroelectronics. +** All rights reserved.

+** +** This software component is licensed by ST under BSD 3-Clause license, +** the License; You may not use this file except in compliance with the +** License. You may obtain a copy of the License at: +** opensource.org/licenses/BSD-3-Clause +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x10040000; /* end of RAM */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000298 + m_text (RX) : ORIGIN = 0x10000000, LENGTH = 0x00020000 + m_data (RW) : ORIGIN = 0x10020000, LENGTH = 0x00020000 + m_ipc_shm (RW) : ORIGIN = 0x10040000, LENGTH = 0x00008000 +} + + /* Symbols needed for OpenAMP to enable rpmsg */ +__OPENAMP_region_start__ = ORIGIN(m_ipc_shm); +__OPENAMP_region_end__ = ORIGIN(m_ipc_shm)+LENGTH(m_ipc_shm); + +/* Sections */ +SECTIONS +{ + /* The startup code into ROM memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + + /* The program code and other data into ROM memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } > m_text + + /* Constant data into ROM memory*/ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > m_text + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > m_text + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } > m_text + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } > m_text + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } > m_text + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } > m_text + + /* Used by the startup to initialize data */ + __DATA_ROM = .; + _sidata = LOADADDR(.data); + + /* Initialized data sections */ + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (_edata - _sdata); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + .resource_table : + { + . = ALIGN(4); + KEEP (*(.resource_table*)) + . = ALIGN(4); + } > m_data + + + /* Uninitialized data section into RAM memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } > m_data + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } > m_data + + + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } + +} diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s new file mode 100644 index 00000000..3b0634e9 --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s @@ -0,0 +1,792 @@ +/** + ****************************************************************************** + * @file startup_stm32mp15xx.s + * @author MCD Application Team + * @brief STM32MP15xx Devices vector table for GCC based toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .startup_copro_fw.Reset_Handler,"ax" + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * _sidata: End of code section, i.e., begin of data sections to copy from. + * _sdata/_edata: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss + +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + + bl SystemInit + // ldr r0, =SystemInit + // blx r0 +/* Call static constructors */ + bl __libc_init_array + // ldr r0, =__libc_init_array + // blx r0 +/* Call the application's entry point.*/ + bl main + //ldr r0, =main + //blx r0 + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack // Top of Stack + .word Reset_Handler // Reset Handler + .word NMI_Handler // NMI Handler + .word HardFault_Handler // Hard Fault Handler + .word MemManage_Handler // MPU Fault Handler + .word BusFault_Handler // Bus Fault Handler + .word UsageFault_Handler // Usage Fault Handler + .word 0 // Reserved + .word 0 // Reserved + .word 0 // Reserved + .word 0 // Reserved + .word SVC_Handler // SVCall Handler + .word DebugMon_Handler // Debug Monitor Handler + .word 0 // Reserved + .word PendSV_Handler // PendSV Handler + .word SysTick_Handler // SysTick Handler + + // External Interrupts + .word WWDG1_IRQHandler // Window WatchDog 1 + .word PVD_AVD_IRQHandler // PVD and AVD through EXTI Line detection + .word TAMP_IRQHandler // Tamper and TimeStamps through the EXTI line + .word RTC_WKUP_ALARM_IRQHandler // RTC Wakeup and Alarm through the EXTI line + .word RESERVED4_IRQHandler // Reserved + .word RCC_IRQHandler // RCC + .word EXTI0_IRQHandler // EXTI Line0 + .word EXTI1_IRQHandler // EXTI Line1 + .word EXTI2_IRQHandler // EXTI Line2 + .word EXTI3_IRQHandler // EXTI Line3 + .word EXTI4_IRQHandler // EXTI Line4 + .word DMA1_Stream0_IRQHandler // DMA1 Stream 0 + .word DMA1_Stream1_IRQHandler // DMA1 Stream 1 + .word DMA1_Stream2_IRQHandler // DMA1 Stream 2 + .word DMA1_Stream3_IRQHandler // DMA1 Stream 3 + .word DMA1_Stream4_IRQHandler // DMA1 Stream 4 + .word DMA1_Stream5_IRQHandler // DMA1 Stream 5 + .word DMA1_Stream6_IRQHandler // DMA1 Stream 6 + .word ADC1_IRQHandler // ADC1 + .word FDCAN1_IT0_IRQHandler // FDCAN1 Interrupt line 0 + .word FDCAN2_IT0_IRQHandler // FDCAN2 Interrupt line 0 + .word FDCAN1_IT1_IRQHandler // FDCAN1 Interrupt line 1 + .word FDCAN2_IT1_IRQHandler // FDCAN2 Interrupt line 1 + .word EXTI5_IRQHandler // External Line5 interrupts through AIEC + .word TIM1_BRK_IRQHandler // TIM1 Break interrupt + .word TIM1_UP_IRQHandler // TIM1 Update Interrupt + .word TIM1_TRG_COM_IRQHandler // TIM1 Trigger and Commutation Interrupt + .word TIM1_CC_IRQHandler // TIM1 Capture Compare + .word TIM2_IRQHandler // TIM2 + .word TIM3_IRQHandler // TIM3 + .word TIM4_IRQHandler // TIM4 + .word I2C1_EV_IRQHandler // I2C1 Event + .word I2C1_ER_IRQHandler // I2C1 Error + .word I2C2_EV_IRQHandler // I2C2 Event + .word I2C2_ER_IRQHandler // I2C2 Error + .word SPI1_IRQHandler // SPI1 + .word SPI2_IRQHandler // SPI2 + .word USART1_IRQHandler // USART1 + .word USART2_IRQHandler // USART2 + .word USART3_IRQHandler // USART3 + .word EXTI10_IRQHandler // External Line10 interrupts through AIEC + .word RTC_TIMESTAMP_IRQHandler // RTC TimeStamp through EXTI Line + .word EXTI11_IRQHandler // External Line11 interrupts through AIEC + .word TIM8_BRK_IRQHandler // TIM8 Break Interrupt + .word TIM8_UP_IRQHandler // TIM8 Update Interrupt + .word TIM8_TRG_COM_IRQHandler // TIM8 Trigger and Commutation Interrupt + .word TIM8_CC_IRQHandler // TIM8 Capture Compare Interrupt + .word DMA1_Stream7_IRQHandler // DMA1 Stream7 + .word FMC_IRQHandler // FMC + .word SDMMC1_IRQHandler // SDMMC1 + .word TIM5_IRQHandler // TIM5 + .word SPI3_IRQHandler // SPI3 + .word UART4_IRQHandler // UART4 + .word UART5_IRQHandler // UART5 + .word TIM6_IRQHandler // TIM6 + .word TIM7_IRQHandler // TIM7 + .word DMA2_Stream0_IRQHandler // DMA2 Stream 0 + .word DMA2_Stream1_IRQHandler // DMA2 Stream 1 + .word DMA2_Stream2_IRQHandler // DMA2 Stream 2 + .word DMA2_Stream3_IRQHandler // DMA2 Stream 3 + .word DMA2_Stream4_IRQHandler // DMA2 Stream 4 + .word ETH1_IRQHandler // Ethernet + .word ETH1_WKUP_IRQHandler // Ethernet Wakeup through EXTI line + .word FDCAN_CAL_IRQHandler // FDCAN Calibration + .word EXTI6_IRQHandler // EXTI Line6 interrupts through AIEC + .word EXTI7_IRQHandler // EXTI Line7 interrupts through AIEC + .word EXTI8_IRQHandler // EXTI Line8 interrupts through AIEC + .word EXTI9_IRQHandler // EXTI Line9 interrupts through AIEC + .word DMA2_Stream5_IRQHandler // DMA2 Stream 5 + .word DMA2_Stream6_IRQHandler // DMA2 Stream 6 + .word DMA2_Stream7_IRQHandler // DMA2 Stream 7 + .word USART6_IRQHandler // USART6 + .word I2C3_EV_IRQHandler // I2C3 event + .word I2C3_ER_IRQHandler // I2C3 error + .word USBH_OHCI_IRQHandler // USB Host OHCI + .word USBH_EHCI_IRQHandler // USB Host EHCI + .word EXTI12_IRQHandler // EXTI Line12 interrupts through AIEC + .word EXTI13_IRQHandler // EXTI Line13 interrupts through AIEC + .word DCMI_IRQHandler // DCMI + .word CRYP1_IRQHandler // Crypto1 global interrupt + .word HASH1_IRQHandler // Crypto Hash1 interrupt + .word FPU_IRQHandler // FPU + .word UART7_IRQHandler // UART7 + .word UART8_IRQHandler // UART8 + .word SPI4_IRQHandler // SPI4 + .word SPI5_IRQHandler // SPI5 + .word SPI6_IRQHandler // SPI6 + .word SAI1_IRQHandler // SAI1 + .word LTDC_IRQHandler // LTDC + .word LTDC_ER_IRQHandler // LTDC error + .word ADC2_IRQHandler // ADC2 + .word SAI2_IRQHandler // SAI2 + .word QUADSPI_IRQHandler // QUADSPI + .word LPTIM1_IRQHandler // LPTIM1 global interrupt + .word CEC_IRQHandler // HDMI_CEC + .word I2C4_EV_IRQHandler // I2C4 Event + .word I2C4_ER_IRQHandler // I2C4 Error + .word SPDIF_RX_IRQHandler // SPDIF_RX + .word OTG_IRQHandler // USB On The Go HS global interrupt + .word RESERVED99_IRQHandler // Reserved + .word IPCC_RX0_IRQHandler // Mailbox RX0 Free interrupt + .word IPCC_TX0_IRQHandler // Mailbox TX0 Free interrupt + .word DMAMUX1_OVR_IRQHandler // DMAMUX1 Overrun interrupt + .word IPCC_RX1_IRQHandler // Mailbox RX1 Free interrupt + .word IPCC_TX1_IRQHandler // Mailbox TX1 Free interrupt + .word CRYP2_IRQHandler // Crypto2 global interrupt + .word HASH2_IRQHandler // Crypto Hash2 interrupt + .word I2C5_EV_IRQHandler // I2C5 Event Interrupt + .word I2C5_ER_IRQHandler // I2C5 Error Interrupt + .word GPU_IRQHandler // GPU Global Interrupt + .word DFSDM1_FLT0_IRQHandler // DFSDM Filter0 Interrupt + .word DFSDM1_FLT1_IRQHandler // DFSDM Filter1 Interrupt + .word DFSDM1_FLT2_IRQHandler // DFSDM Filter2 Interrupt + .word DFSDM1_FLT3_IRQHandler // DFSDM Filter3 Interrupt + .word SAI3_IRQHandler // SAI3 global Interrupt + .word DFSDM1_FLT4_IRQHandler // DFSDM Filter4 Interrupt + .word TIM15_IRQHandler // TIM15 global Interrupt + .word TIM16_IRQHandler // TIM16 global Interrupt + .word TIM17_IRQHandler // TIM17 global Interrupt + .word TIM12_IRQHandler // TIM12 global Interrupt + .word MDIOS_IRQHandler // MDIOS global Interrupt + .word EXTI14_IRQHandler // EXTI Line14 interrupts through AIEC + .word MDMA_IRQHandler // MDMA global Interrupt + .word DSI_IRQHandler // DSI global Interrupt + .word SDMMC2_IRQHandler // SDMMC2 global Interrupt + .word HSEM_IT2_IRQHandler // HSEM global Interrupt + .word DFSDM1_FLT5_IRQHandler // DFSDM Filter5 Interrupt + .word EXTI15_IRQHandler // EXTI Line15 interrupts through AIEC + .word nCTIIRQ1_IRQHandler // Cortex-M4 CTI interrupt 1 + .word nCTIIRQ2_IRQHandler // Cortex-M4 CTI interrupt 2 + .word TIM13_IRQHandler // TIM13 global interrupt + .word TIM14_IRQHandler // TIM14 global interrupt + .word DAC_IRQHandler // DAC1 and DAC2 underrun error interrupts + .word RNG1_IRQHandler // RNG1 interrupt + .word RNG2_IRQHandler // RNG2 interrupt + .word I2C6_EV_IRQHandler // I2C6 Event Interrupt + .word I2C6_ER_IRQHandler // I2C6 Error Interrupt + .word SDMMC3_IRQHandler // SDMMC3 global Interrupt + .word LPTIM2_IRQHandler // LPTIM2 global interrupt + .word LPTIM3_IRQHandler // LPTIM3 global interrupt + .word LPTIM4_IRQHandler // LPTIM4 global interrupt + .word LPTIM5_IRQHandler // LPTIM5 global interrupt + .word ETH1_LPI_IRQHandler // ETH1_LPI interrupt + .word RESERVED143_IRQHandler // Reserved + .word MPU_SEV_IRQHandler // MPU Send Event through AIEC + .word RCC_WAKEUP_IRQHandler // RCC Wake up interrupt + .word SAI4_IRQHandler // SAI4 global interrupt + .word DTS_IRQHandler // Temperature sensor interrupt + .word RESERVED148_IRQHandler // Reserved + .word WAKEUP_PIN_IRQHandler // Interrupt for all 6 wake-up pins + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak RESERVED4_IRQHandler + .thumb_set RESERVED4_IRQHandler,Default_Handler + + .weak RESERVED99_IRQHandler + .thumb_set RESERVED99_IRQHandler,Default_Handler + + .weak ETH1_LPI_IRQHandler + .thumb_set ETH1_LPI_IRQHandler,Default_Handler + + .weak RESERVED143_IRQHandler + .thumb_set RESERVED143_IRQHandler,Default_Handler + + .weak WWDG1_IRQHandler + .thumb_set WWDG1_IRQHandler,Default_Handler + + .weak PVD_AVD_IRQHandler + .thumb_set PVD_AVD_IRQHandler,Default_Handler + + .weak TAMP_IRQHandler + .thumb_set TAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_ALARM_IRQHandler + .thumb_set RTC_WKUP_ALARM_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak ADC2_IRQHandler + .thumb_set ADC2_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak FDCAN_CAL_IRQHandler + .thumb_set FDCAN_CAL_IRQHandler,Default_Handler + + .weak EXTI5_IRQHandler + .thumb_set EXTI5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI10_IRQHandler + .thumb_set EXTI10_IRQHandler,Default_Handler + + .weak RTC_TIMESTAMP_IRQHandler + .thumb_set RTC_TIMESTAMP_IRQHandler,Default_Handler + + .weak EXTI11_IRQHandler + .thumb_set EXTI11_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_IRQHandler + .thumb_set TIM6_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH1_IRQHandler + .thumb_set ETH1_IRQHandler,Default_Handler + + .weak ETH1_WKUP_IRQHandler + .thumb_set ETH1_WKUP_IRQHandler,Default_Handler + + .weak ETH1_LPI_IRQHandler + .thumb_set ETH1_LPI_IRQHandler,Default_Handler + + .weak EXTI6_IRQHandler + .thumb_set EXTI6_IRQHandler,Default_Handler + + .weak EXTI7_IRQHandler + .thumb_set EXTI7_IRQHandler,Default_Handler + + .weak EXTI8_IRQHandler + .thumb_set EXTI8_IRQHandler,Default_Handler + + .weak EXTI9_IRQHandler + .thumb_set EXTI9_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak USBH_OHCI_IRQHandler + .thumb_set USBH_OHCI_IRQHandler,Default_Handler + + .weak USBH_EHCI_IRQHandler + .thumb_set USBH_EHCI_IRQHandler,Default_Handler + + .weak EXTI12_IRQHandler + .thumb_set EXTI12_IRQHandler,Default_Handler + + .weak EXTI13_IRQHandler + .thumb_set EXTI13_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak CRYP1_IRQHandler + .thumb_set CRYP1_IRQHandler,Default_Handler + + .weak HASH1_IRQHandler + .thumb_set HASH1_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPDIF_RX_IRQHandler + .thumb_set SPDIF_RX_IRQHandler,Default_Handler + + .weak OTG_IRQHandler + .thumb_set OTG_IRQHandler,Default_Handler + + .weak IPCC_RX0_IRQHandler + .thumb_set IPCC_RX0_IRQHandler,Default_Handler + + .weak IPCC_TX0_IRQHandler + .thumb_set IPCC_TX0_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak IPCC_RX1_IRQHandler + .thumb_set IPCC_RX1_IRQHandler,Default_Handler + + .weak IPCC_TX1_IRQHandler + .thumb_set IPCC_TX1_IRQHandler,Default_Handler + + .weak CRYP2_IRQHandler + .thumb_set CRYP2_IRQHandler,Default_Handler + + .weak HASH2_IRQHandler + .thumb_set HASH2_IRQHandler,Default_Handler + + .weak I2C5_EV_IRQHandler + .thumb_set I2C5_EV_IRQHandler,Default_Handler + + .weak I2C5_ER_IRQHandler + .thumb_set I2C5_ER_IRQHandler,Default_Handler + + .weak GPU_IRQHandler + .thumb_set GPU_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak SAI3_IRQHandler + .thumb_set SAI3_IRQHandler,Default_Handler + + .weak DFSDM1_FLT4_IRQHandler + .thumb_set DFSDM1_FLT4_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak TIM12_IRQHandler + .thumb_set TIM12_IRQHandler,Default_Handler + + .weak MDIOS_IRQHandler + .thumb_set MDIOS_IRQHandler,Default_Handler + + .weak EXTI14_IRQHandler + .thumb_set EXTI14_IRQHandler,Default_Handler + + .weak MDMA_IRQHandler + .thumb_set MDMA_IRQHandler,Default_Handler + + .weak DSI_IRQHandler + .thumb_set DSI_IRQHandler,Default_Handler + + .weak SDMMC2_IRQHandler + .thumb_set SDMMC2_IRQHandler,Default_Handler + + .weak HSEM_IT2_IRQHandler + .thumb_set HSEM_IT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT5_IRQHandler + .thumb_set DFSDM1_FLT5_IRQHandler,Default_Handler + + .weak EXTI15_IRQHandler + .thumb_set EXTI15_IRQHandler,Default_Handler + + .weak nCTIIRQ1_IRQHandler + .thumb_set nCTIIRQ1_IRQHandler,Default_Handler + + .weak nCTIIRQ2_IRQHandler + .thumb_set nCTIIRQ2_IRQHandler,Default_Handler + + .weak TIM13_IRQHandler + .thumb_set TIM13_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak DAC_IRQHandler + .thumb_set DAC_IRQHandler,Default_Handler + + .weak RNG1_IRQHandler + .thumb_set RNG1_IRQHandler,Default_Handler + + .weak RNG2_IRQHandler + .thumb_set RNG2_IRQHandler,Default_Handler + + .weak I2C6_EV_IRQHandler + .thumb_set I2C6_EV_IRQHandler,Default_Handler + + .weak I2C6_ER_IRQHandler + .thumb_set I2C6_ER_IRQHandler,Default_Handler + + .weak SDMMC3_IRQHandler + .thumb_set SDMMC3_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak LPTIM4_IRQHandler + .thumb_set LPTIM4_IRQHandler,Default_Handler + + .weak LPTIM5_IRQHandler + .thumb_set LPTIM5_IRQHandler,Default_Handler + + .weak MPU_SEV_IRQHandler + .thumb_set MPU_SEV_IRQHandler,Default_Handler + + .weak RCC_WAKEUP_IRQHandler + .thumb_set RCC_WAKEUP_IRQHandler,Default_Handler + + .weak SAI4_IRQHandler + .thumb_set SAI4_IRQHandler,Default_Handler + + .weak DTS_IRQHandler + .thumb_set DTS_IRQHandler,Default_Handler + + .weak RESERVED148_IRQHandler + .thumb_set RESERVED148_IRQHandler,Default_Handler + + .weak WAKEUP_PIN_IRQHandler + .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c new file mode 100644 index 00000000..e3c8a89f --- /dev/null +++ b/Projects/STM32MP157C-DK2/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c @@ -0,0 +1,204 @@ +/** +***************************************************************************** +** +** File : syscalls.c +** +** Abstract : System Workbench Minimal System calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : System Workbench for MCU +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +caddr_t _sbrk(int incr) +{ + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + heap_end = &end; + + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) + { +// write(1, "Heap and stack collision\n", 25); +// abort(); + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project new file mode 100644 index 00000000..d876937a --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/.project @@ -0,0 +1,29 @@ + + + OpenAMP_FreeRTOS_echo + + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature + com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mpu.projectnatures.core.MPUEmbeddedMCUProjectNature + + + + 1568709163798 + + 22 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-*.launch + + + + diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject new file mode 100644 index 00000000..02b37865 --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.cproject @@ -0,0 +1,159 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project new file mode 100644 index 00000000..404f9202 --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/.project @@ -0,0 +1,331 @@ + + + OpenAMP_FreeRTOS_echo_CM4 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mpu.projectnatures.core.MPUEmbeddedMCUProjectNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + com.st.stm32cube.ide.mcu.MCUSW4STM32ConvertedProjectNature + + + + Doc/readme.txt + 1 + PARENT-3-PROJECT_LOC/readme.txt + + + Remoteproc/README + 1 + PARENT-3-PROJECT_LOC/Remoteproc/README + + + Remoteproc/fw_cortex_m4.sh + 1 + PARENT-3-PROJECT_LOC/Remoteproc/fw_cortex_m4.sh + + + Application/STM32CubeIDE/startup_stm32mp15xx.s + 1 + PARENT-2-PROJECT_LOC/startup_stm32mp15xx.s + + + Application/STM32CubeIDE/syscalls.c + 1 + PARENT-2-PROJECT_LOC/syscalls.c + + + Application/User/app_freertos.c + 1 + PARENT-3-PROJECT_LOC/Src/app_freertos.c + + + Application/User/lock_resource.c + 1 + PARENT-3-PROJECT_LOC/Src/lock_resource.c + + + Application/User/main.c + 1 + PARENT-3-PROJECT_LOC/Src/main.c + + + Application/User/mbox_ipcc.c + 1 + PARENT-3-PROJECT_LOC/Src/mbox_ipcc.c + + + Application/User/openamp.c + 1 + PARENT-3-PROJECT_LOC/Src/openamp.c + + + Application/User/openamp_log.c + 1 + PARENT-3-PROJECT_LOC/Src/openamp_log.c + + + Application/User/rsc_table.c + 1 + PARENT-3-PROJECT_LOC/Src/rsc_table.c + + + Application/User/stm32mp1xx_hal_msp.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_hal_msp.c + + + Application/User/stm32mp1xx_hal_timebase_tim.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_hal_timebase_tim.c + + + Application/User/stm32mp1xx_it.c + 1 + PARENT-3-PROJECT_LOC/Src/stm32mp1xx_it.c + + + Drivers/BSP/stm32mp15xx_eval.c + 1 + PARENT-8-PROJECT_LOC/Drivers/BSP/STM32MP15xx_EVAL/stm32mp15xx_eval.c + + + Drivers/CMSIS/system_stm32mp1xx.c + 1 + PARENT-3-PROJECT_LOC/Src/system_stm32mp1xx.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_cortex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cortex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_dma.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_dma_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dma_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_exti.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_exti.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_gpio.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_hsem.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hsem.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_ipcc.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_ipcc.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_mdma.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_mdma.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_pwr.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_pwr_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_rcc.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_rcc_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc_ex.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_tim.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim.c + + + Drivers/STM32MP1xx_HAL_Driver/stm32mp1xx_hal_tim_ex.c + 1 + PARENT-8-PROJECT_LOC/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_tim_ex.c + + + Middlewares/FreeRTOS/cmsis_os2.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c + + + Middlewares/FreeRTOS/croutine.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/croutine.c + + + Middlewares/FreeRTOS/event_groups.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + + + Middlewares/FreeRTOS/heap_4.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c + + + Middlewares/FreeRTOS/list.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/list.c + + + Middlewares/FreeRTOS/port.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c + + + Middlewares/FreeRTOS/queue.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/queue.c + + + Middlewares/FreeRTOS/stream_buffer.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c + + + Middlewares/FreeRTOS/tasks.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/tasks.c + + + Middlewares/FreeRTOS/timers.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/FreeRTOS/Source/timers.c + + + Middlewares/OpenAMP/libmetal/device.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/device.c + + + Middlewares/OpenAMP/libmetal/init.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/init.c + + + Middlewares/OpenAMP/libmetal/io.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/io.c + + + Middlewares/OpenAMP/libmetal/log.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/log.c + + + Middlewares/OpenAMP/libmetal/shmem.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/shmem.c + + + Middlewares/OpenAMP/virtual_driver/virt_uart.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/virtual_driver/virt_uart.c + + + Middlewares/OpenAMP/libmetal/generic/condition.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/condition.c + + + Middlewares/OpenAMP/libmetal/generic/generic_device.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_device.c + + + Middlewares/OpenAMP/libmetal/generic/generic_init.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_init.c + + + Middlewares/OpenAMP/libmetal/generic/generic_io.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_io.c + + + Middlewares/OpenAMP/libmetal/generic/generic_shmem.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/generic_shmem.c + + + Middlewares/OpenAMP/libmetal/generic/time.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/time.c + + + Middlewares/OpenAMP/open-amp/remoteproc/remoteproc_virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/remoteproc/remoteproc_virtio.c + + + Middlewares/OpenAMP/open-amp/rpmsg/rpmsg.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/rpmsg/rpmsg.c + + + Middlewares/OpenAMP/open-amp/rpmsg/rpmsg_virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/rpmsg/rpmsg_virtio.c + + + Middlewares/OpenAMP/open-amp/virtio/virtio.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/virtio/virtio.c + + + Middlewares/OpenAMP/open-amp/virtio/virtqueue.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/open-amp/lib/virtio/virtqueue.c + + + Middlewares/OpenAMP/libmetal/generic/cortexm/sys.c + 1 + PARENT-8-PROJECT_LOC/Middlewares/Third_Party/OpenAMP/libmetal/lib/system/generic/cortexm/sys.c + + + diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld new file mode 100644 index 00000000..cbad455d --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/OpenAMP_FreeRTOS_echo/CM4/stm32mp15xx_m4.ld @@ -0,0 +1,202 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32MP1 series +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,� without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© Copyright (c) 2019 STMicroelectronics. +** All rights reserved.

+** +** This software component is licensed by ST under BSD 3-Clause license, +** the License; You may not use this file except in compliance with the +** License. You may obtain a copy of the License at: +** opensource.org/licenses/BSD-3-Clause +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x10040000; /* end of RAM */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000298 + m_text (RX) : ORIGIN = 0x10000000, LENGTH = 0x00020000 + m_data (RW) : ORIGIN = 0x10020000, LENGTH = 0x00020000 + m_ipc_shm (RW) : ORIGIN = 0x10040000, LENGTH = 0x00008000 +} + + /* Symbols needed for OpenAMP to enable rpmsg */ +__OPENAMP_region_start__ = ORIGIN(m_ipc_shm); +__OPENAMP_region_end__ = ORIGIN(m_ipc_shm)+LENGTH(m_ipc_shm); + +/* Sections */ +SECTIONS +{ + /* The startup code into ROM memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + + /* The program code and other data into ROM memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } > m_text + + /* Constant data into ROM memory*/ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > m_text + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } > m_text + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } > m_text + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } > m_text + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } > m_text + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } > m_text + + /* Used by the startup to initialize data */ + __DATA_ROM = .; + _sidata = LOADADDR(.data); + + /* Initialized data sections */ + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (_edata - _sdata); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + .resource_table : + { + . = ALIGN(4); + KEEP (*(.resource_table*)) + . = ALIGN(4); + } > m_data + + + /* Uninitialized data section into RAM memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } > m_data + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } > m_data + + + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } + +} diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s new file mode 100644 index 00000000..3b0634e9 --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/startup_stm32mp15xx.s @@ -0,0 +1,792 @@ +/** + ****************************************************************************** + * @file startup_stm32mp15xx.s + * @author MCD Application Team + * @brief STM32MP15xx Devices vector table for GCC based toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .startup_copro_fw.Reset_Handler,"ax" + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * _sidata: End of code section, i.e., begin of data sections to copy from. + * _sdata/_edata: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss + +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + + bl SystemInit + // ldr r0, =SystemInit + // blx r0 +/* Call static constructors */ + bl __libc_init_array + // ldr r0, =__libc_init_array + // blx r0 +/* Call the application's entry point.*/ + bl main + //ldr r0, =main + //blx r0 + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack // Top of Stack + .word Reset_Handler // Reset Handler + .word NMI_Handler // NMI Handler + .word HardFault_Handler // Hard Fault Handler + .word MemManage_Handler // MPU Fault Handler + .word BusFault_Handler // Bus Fault Handler + .word UsageFault_Handler // Usage Fault Handler + .word 0 // Reserved + .word 0 // Reserved + .word 0 // Reserved + .word 0 // Reserved + .word SVC_Handler // SVCall Handler + .word DebugMon_Handler // Debug Monitor Handler + .word 0 // Reserved + .word PendSV_Handler // PendSV Handler + .word SysTick_Handler // SysTick Handler + + // External Interrupts + .word WWDG1_IRQHandler // Window WatchDog 1 + .word PVD_AVD_IRQHandler // PVD and AVD through EXTI Line detection + .word TAMP_IRQHandler // Tamper and TimeStamps through the EXTI line + .word RTC_WKUP_ALARM_IRQHandler // RTC Wakeup and Alarm through the EXTI line + .word RESERVED4_IRQHandler // Reserved + .word RCC_IRQHandler // RCC + .word EXTI0_IRQHandler // EXTI Line0 + .word EXTI1_IRQHandler // EXTI Line1 + .word EXTI2_IRQHandler // EXTI Line2 + .word EXTI3_IRQHandler // EXTI Line3 + .word EXTI4_IRQHandler // EXTI Line4 + .word DMA1_Stream0_IRQHandler // DMA1 Stream 0 + .word DMA1_Stream1_IRQHandler // DMA1 Stream 1 + .word DMA1_Stream2_IRQHandler // DMA1 Stream 2 + .word DMA1_Stream3_IRQHandler // DMA1 Stream 3 + .word DMA1_Stream4_IRQHandler // DMA1 Stream 4 + .word DMA1_Stream5_IRQHandler // DMA1 Stream 5 + .word DMA1_Stream6_IRQHandler // DMA1 Stream 6 + .word ADC1_IRQHandler // ADC1 + .word FDCAN1_IT0_IRQHandler // FDCAN1 Interrupt line 0 + .word FDCAN2_IT0_IRQHandler // FDCAN2 Interrupt line 0 + .word FDCAN1_IT1_IRQHandler // FDCAN1 Interrupt line 1 + .word FDCAN2_IT1_IRQHandler // FDCAN2 Interrupt line 1 + .word EXTI5_IRQHandler // External Line5 interrupts through AIEC + .word TIM1_BRK_IRQHandler // TIM1 Break interrupt + .word TIM1_UP_IRQHandler // TIM1 Update Interrupt + .word TIM1_TRG_COM_IRQHandler // TIM1 Trigger and Commutation Interrupt + .word TIM1_CC_IRQHandler // TIM1 Capture Compare + .word TIM2_IRQHandler // TIM2 + .word TIM3_IRQHandler // TIM3 + .word TIM4_IRQHandler // TIM4 + .word I2C1_EV_IRQHandler // I2C1 Event + .word I2C1_ER_IRQHandler // I2C1 Error + .word I2C2_EV_IRQHandler // I2C2 Event + .word I2C2_ER_IRQHandler // I2C2 Error + .word SPI1_IRQHandler // SPI1 + .word SPI2_IRQHandler // SPI2 + .word USART1_IRQHandler // USART1 + .word USART2_IRQHandler // USART2 + .word USART3_IRQHandler // USART3 + .word EXTI10_IRQHandler // External Line10 interrupts through AIEC + .word RTC_TIMESTAMP_IRQHandler // RTC TimeStamp through EXTI Line + .word EXTI11_IRQHandler // External Line11 interrupts through AIEC + .word TIM8_BRK_IRQHandler // TIM8 Break Interrupt + .word TIM8_UP_IRQHandler // TIM8 Update Interrupt + .word TIM8_TRG_COM_IRQHandler // TIM8 Trigger and Commutation Interrupt + .word TIM8_CC_IRQHandler // TIM8 Capture Compare Interrupt + .word DMA1_Stream7_IRQHandler // DMA1 Stream7 + .word FMC_IRQHandler // FMC + .word SDMMC1_IRQHandler // SDMMC1 + .word TIM5_IRQHandler // TIM5 + .word SPI3_IRQHandler // SPI3 + .word UART4_IRQHandler // UART4 + .word UART5_IRQHandler // UART5 + .word TIM6_IRQHandler // TIM6 + .word TIM7_IRQHandler // TIM7 + .word DMA2_Stream0_IRQHandler // DMA2 Stream 0 + .word DMA2_Stream1_IRQHandler // DMA2 Stream 1 + .word DMA2_Stream2_IRQHandler // DMA2 Stream 2 + .word DMA2_Stream3_IRQHandler // DMA2 Stream 3 + .word DMA2_Stream4_IRQHandler // DMA2 Stream 4 + .word ETH1_IRQHandler // Ethernet + .word ETH1_WKUP_IRQHandler // Ethernet Wakeup through EXTI line + .word FDCAN_CAL_IRQHandler // FDCAN Calibration + .word EXTI6_IRQHandler // EXTI Line6 interrupts through AIEC + .word EXTI7_IRQHandler // EXTI Line7 interrupts through AIEC + .word EXTI8_IRQHandler // EXTI Line8 interrupts through AIEC + .word EXTI9_IRQHandler // EXTI Line9 interrupts through AIEC + .word DMA2_Stream5_IRQHandler // DMA2 Stream 5 + .word DMA2_Stream6_IRQHandler // DMA2 Stream 6 + .word DMA2_Stream7_IRQHandler // DMA2 Stream 7 + .word USART6_IRQHandler // USART6 + .word I2C3_EV_IRQHandler // I2C3 event + .word I2C3_ER_IRQHandler // I2C3 error + .word USBH_OHCI_IRQHandler // USB Host OHCI + .word USBH_EHCI_IRQHandler // USB Host EHCI + .word EXTI12_IRQHandler // EXTI Line12 interrupts through AIEC + .word EXTI13_IRQHandler // EXTI Line13 interrupts through AIEC + .word DCMI_IRQHandler // DCMI + .word CRYP1_IRQHandler // Crypto1 global interrupt + .word HASH1_IRQHandler // Crypto Hash1 interrupt + .word FPU_IRQHandler // FPU + .word UART7_IRQHandler // UART7 + .word UART8_IRQHandler // UART8 + .word SPI4_IRQHandler // SPI4 + .word SPI5_IRQHandler // SPI5 + .word SPI6_IRQHandler // SPI6 + .word SAI1_IRQHandler // SAI1 + .word LTDC_IRQHandler // LTDC + .word LTDC_ER_IRQHandler // LTDC error + .word ADC2_IRQHandler // ADC2 + .word SAI2_IRQHandler // SAI2 + .word QUADSPI_IRQHandler // QUADSPI + .word LPTIM1_IRQHandler // LPTIM1 global interrupt + .word CEC_IRQHandler // HDMI_CEC + .word I2C4_EV_IRQHandler // I2C4 Event + .word I2C4_ER_IRQHandler // I2C4 Error + .word SPDIF_RX_IRQHandler // SPDIF_RX + .word OTG_IRQHandler // USB On The Go HS global interrupt + .word RESERVED99_IRQHandler // Reserved + .word IPCC_RX0_IRQHandler // Mailbox RX0 Free interrupt + .word IPCC_TX0_IRQHandler // Mailbox TX0 Free interrupt + .word DMAMUX1_OVR_IRQHandler // DMAMUX1 Overrun interrupt + .word IPCC_RX1_IRQHandler // Mailbox RX1 Free interrupt + .word IPCC_TX1_IRQHandler // Mailbox TX1 Free interrupt + .word CRYP2_IRQHandler // Crypto2 global interrupt + .word HASH2_IRQHandler // Crypto Hash2 interrupt + .word I2C5_EV_IRQHandler // I2C5 Event Interrupt + .word I2C5_ER_IRQHandler // I2C5 Error Interrupt + .word GPU_IRQHandler // GPU Global Interrupt + .word DFSDM1_FLT0_IRQHandler // DFSDM Filter0 Interrupt + .word DFSDM1_FLT1_IRQHandler // DFSDM Filter1 Interrupt + .word DFSDM1_FLT2_IRQHandler // DFSDM Filter2 Interrupt + .word DFSDM1_FLT3_IRQHandler // DFSDM Filter3 Interrupt + .word SAI3_IRQHandler // SAI3 global Interrupt + .word DFSDM1_FLT4_IRQHandler // DFSDM Filter4 Interrupt + .word TIM15_IRQHandler // TIM15 global Interrupt + .word TIM16_IRQHandler // TIM16 global Interrupt + .word TIM17_IRQHandler // TIM17 global Interrupt + .word TIM12_IRQHandler // TIM12 global Interrupt + .word MDIOS_IRQHandler // MDIOS global Interrupt + .word EXTI14_IRQHandler // EXTI Line14 interrupts through AIEC + .word MDMA_IRQHandler // MDMA global Interrupt + .word DSI_IRQHandler // DSI global Interrupt + .word SDMMC2_IRQHandler // SDMMC2 global Interrupt + .word HSEM_IT2_IRQHandler // HSEM global Interrupt + .word DFSDM1_FLT5_IRQHandler // DFSDM Filter5 Interrupt + .word EXTI15_IRQHandler // EXTI Line15 interrupts through AIEC + .word nCTIIRQ1_IRQHandler // Cortex-M4 CTI interrupt 1 + .word nCTIIRQ2_IRQHandler // Cortex-M4 CTI interrupt 2 + .word TIM13_IRQHandler // TIM13 global interrupt + .word TIM14_IRQHandler // TIM14 global interrupt + .word DAC_IRQHandler // DAC1 and DAC2 underrun error interrupts + .word RNG1_IRQHandler // RNG1 interrupt + .word RNG2_IRQHandler // RNG2 interrupt + .word I2C6_EV_IRQHandler // I2C6 Event Interrupt + .word I2C6_ER_IRQHandler // I2C6 Error Interrupt + .word SDMMC3_IRQHandler // SDMMC3 global Interrupt + .word LPTIM2_IRQHandler // LPTIM2 global interrupt + .word LPTIM3_IRQHandler // LPTIM3 global interrupt + .word LPTIM4_IRQHandler // LPTIM4 global interrupt + .word LPTIM5_IRQHandler // LPTIM5 global interrupt + .word ETH1_LPI_IRQHandler // ETH1_LPI interrupt + .word RESERVED143_IRQHandler // Reserved + .word MPU_SEV_IRQHandler // MPU Send Event through AIEC + .word RCC_WAKEUP_IRQHandler // RCC Wake up interrupt + .word SAI4_IRQHandler // SAI4 global interrupt + .word DTS_IRQHandler // Temperature sensor interrupt + .word RESERVED148_IRQHandler // Reserved + .word WAKEUP_PIN_IRQHandler // Interrupt for all 6 wake-up pins + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak RESERVED4_IRQHandler + .thumb_set RESERVED4_IRQHandler,Default_Handler + + .weak RESERVED99_IRQHandler + .thumb_set RESERVED99_IRQHandler,Default_Handler + + .weak ETH1_LPI_IRQHandler + .thumb_set ETH1_LPI_IRQHandler,Default_Handler + + .weak RESERVED143_IRQHandler + .thumb_set RESERVED143_IRQHandler,Default_Handler + + .weak WWDG1_IRQHandler + .thumb_set WWDG1_IRQHandler,Default_Handler + + .weak PVD_AVD_IRQHandler + .thumb_set PVD_AVD_IRQHandler,Default_Handler + + .weak TAMP_IRQHandler + .thumb_set TAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_ALARM_IRQHandler + .thumb_set RTC_WKUP_ALARM_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak ADC2_IRQHandler + .thumb_set ADC2_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak FDCAN_CAL_IRQHandler + .thumb_set FDCAN_CAL_IRQHandler,Default_Handler + + .weak EXTI5_IRQHandler + .thumb_set EXTI5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI10_IRQHandler + .thumb_set EXTI10_IRQHandler,Default_Handler + + .weak RTC_TIMESTAMP_IRQHandler + .thumb_set RTC_TIMESTAMP_IRQHandler,Default_Handler + + .weak EXTI11_IRQHandler + .thumb_set EXTI11_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_IRQHandler + .thumb_set TIM6_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH1_IRQHandler + .thumb_set ETH1_IRQHandler,Default_Handler + + .weak ETH1_WKUP_IRQHandler + .thumb_set ETH1_WKUP_IRQHandler,Default_Handler + + .weak ETH1_LPI_IRQHandler + .thumb_set ETH1_LPI_IRQHandler,Default_Handler + + .weak EXTI6_IRQHandler + .thumb_set EXTI6_IRQHandler,Default_Handler + + .weak EXTI7_IRQHandler + .thumb_set EXTI7_IRQHandler,Default_Handler + + .weak EXTI8_IRQHandler + .thumb_set EXTI8_IRQHandler,Default_Handler + + .weak EXTI9_IRQHandler + .thumb_set EXTI9_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak USBH_OHCI_IRQHandler + .thumb_set USBH_OHCI_IRQHandler,Default_Handler + + .weak USBH_EHCI_IRQHandler + .thumb_set USBH_EHCI_IRQHandler,Default_Handler + + .weak EXTI12_IRQHandler + .thumb_set EXTI12_IRQHandler,Default_Handler + + .weak EXTI13_IRQHandler + .thumb_set EXTI13_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak CRYP1_IRQHandler + .thumb_set CRYP1_IRQHandler,Default_Handler + + .weak HASH1_IRQHandler + .thumb_set HASH1_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPDIF_RX_IRQHandler + .thumb_set SPDIF_RX_IRQHandler,Default_Handler + + .weak OTG_IRQHandler + .thumb_set OTG_IRQHandler,Default_Handler + + .weak IPCC_RX0_IRQHandler + .thumb_set IPCC_RX0_IRQHandler,Default_Handler + + .weak IPCC_TX0_IRQHandler + .thumb_set IPCC_TX0_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak IPCC_RX1_IRQHandler + .thumb_set IPCC_RX1_IRQHandler,Default_Handler + + .weak IPCC_TX1_IRQHandler + .thumb_set IPCC_TX1_IRQHandler,Default_Handler + + .weak CRYP2_IRQHandler + .thumb_set CRYP2_IRQHandler,Default_Handler + + .weak HASH2_IRQHandler + .thumb_set HASH2_IRQHandler,Default_Handler + + .weak I2C5_EV_IRQHandler + .thumb_set I2C5_EV_IRQHandler,Default_Handler + + .weak I2C5_ER_IRQHandler + .thumb_set I2C5_ER_IRQHandler,Default_Handler + + .weak GPU_IRQHandler + .thumb_set GPU_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak SAI3_IRQHandler + .thumb_set SAI3_IRQHandler,Default_Handler + + .weak DFSDM1_FLT4_IRQHandler + .thumb_set DFSDM1_FLT4_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak TIM12_IRQHandler + .thumb_set TIM12_IRQHandler,Default_Handler + + .weak MDIOS_IRQHandler + .thumb_set MDIOS_IRQHandler,Default_Handler + + .weak EXTI14_IRQHandler + .thumb_set EXTI14_IRQHandler,Default_Handler + + .weak MDMA_IRQHandler + .thumb_set MDMA_IRQHandler,Default_Handler + + .weak DSI_IRQHandler + .thumb_set DSI_IRQHandler,Default_Handler + + .weak SDMMC2_IRQHandler + .thumb_set SDMMC2_IRQHandler,Default_Handler + + .weak HSEM_IT2_IRQHandler + .thumb_set HSEM_IT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT5_IRQHandler + .thumb_set DFSDM1_FLT5_IRQHandler,Default_Handler + + .weak EXTI15_IRQHandler + .thumb_set EXTI15_IRQHandler,Default_Handler + + .weak nCTIIRQ1_IRQHandler + .thumb_set nCTIIRQ1_IRQHandler,Default_Handler + + .weak nCTIIRQ2_IRQHandler + .thumb_set nCTIIRQ2_IRQHandler,Default_Handler + + .weak TIM13_IRQHandler + .thumb_set TIM13_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak DAC_IRQHandler + .thumb_set DAC_IRQHandler,Default_Handler + + .weak RNG1_IRQHandler + .thumb_set RNG1_IRQHandler,Default_Handler + + .weak RNG2_IRQHandler + .thumb_set RNG2_IRQHandler,Default_Handler + + .weak I2C6_EV_IRQHandler + .thumb_set I2C6_EV_IRQHandler,Default_Handler + + .weak I2C6_ER_IRQHandler + .thumb_set I2C6_ER_IRQHandler,Default_Handler + + .weak SDMMC3_IRQHandler + .thumb_set SDMMC3_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak LPTIM4_IRQHandler + .thumb_set LPTIM4_IRQHandler,Default_Handler + + .weak LPTIM5_IRQHandler + .thumb_set LPTIM5_IRQHandler,Default_Handler + + .weak MPU_SEV_IRQHandler + .thumb_set MPU_SEV_IRQHandler,Default_Handler + + .weak RCC_WAKEUP_IRQHandler + .thumb_set RCC_WAKEUP_IRQHandler,Default_Handler + + .weak SAI4_IRQHandler + .thumb_set SAI4_IRQHandler,Default_Handler + + .weak DTS_IRQHandler + .thumb_set DTS_IRQHandler,Default_Handler + + .weak RESERVED148_IRQHandler + .thumb_set RESERVED148_IRQHandler,Default_Handler + + .weak WAKEUP_PIN_IRQHandler + .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c new file mode 100644 index 00000000..e3c8a89f --- /dev/null +++ b/Projects/STM32MP157C-EV1/Applications/OpenAMP/OpenAMP_FreeRTOS_echo/STM32CubeIDE/syscalls.c @@ -0,0 +1,204 @@ +/** +***************************************************************************** +** +** File : syscalls.c +** +** Abstract : System Workbench Minimal System calls file +** +** For more information about which c-functions +** need which of these lowlevel functions +** please consult the Newlib libc-manual +** +** Environment : System Workbench for MCU +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +caddr_t _sbrk(int incr) +{ + extern char end asm("end"); + static char *heap_end; + char *prev_heap_end; + + if (heap_end == 0) + heap_end = &end; + + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) + { +// write(1, "Heap and stack collision\n", 25); +// abort(); + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr; + + return (caddr_t) prev_heap_end; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +}