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sha1: Add extra .S for AArch64 on macOS (Fixing building on M1 Macs) (#38)
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4 files changed

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sha1/build.rs

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fn main() {
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let target_arch = std::env::var("CARGO_CFG_TARGET_ARCH").unwrap_or_default();
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let target_vendor = std::env::var("CARGO_CFG_TARGET_VENDOR").unwrap_or_default();
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let asm_path = if target_arch == "x86" {
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"src/x86.S"
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} else if target_arch == "x86_64" {
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"src/x64.S"
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} else if target_arch == "aarch64" && target_vendor == "apple" {
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"src/aarch64_apple.S"
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} else if target_arch == "aarch64" {
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"src/aarch64.S"
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} else {

sha1/src/aarch64_apple.S

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/*
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* SHA-1 hash in AArch64 assembly
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*
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* Copyright (c) 2020 Emmanuel Gil Peyrot <[email protected]>. (MIT License)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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* - The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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* - The Software is provided "as is", without warranty of any kind, express or
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* implied, including but not limited to the warranties of merchantability,
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* fitness for a particular purpose and noninfringement. In no event shall the
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* authors or copyright holders be liable for any claim, damages or other
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* liability, whether in an action of contract, tort or otherwise, arising from,
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* out of or in connection with the Software or the use or other dealings in the
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* Software.
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*/
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/* void sha1_compress(uint32_t state[5], const uint8_t block[64]) */
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.global _sha1_compress
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_sha1_compress:
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/*
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* Storage usage:
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* Bytes Location Description
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* 4 x0 state argument
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* 4 x1 block argument
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* 16 q0 W0
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* 16 q1 W1
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* 16 q2 W2
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* 16 q3 W3
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* 16 q4 k
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* 16 q5 Original ABCD
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* 16 q6 ABCD (with s3 being A)
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* 4 s16 E
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* 4 s17 e0
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* 4 s18 e1
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* 16 q19 wk
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*/
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// Load state in registers
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ldr q5, [x0]
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ldr s16, [x0, 16]
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mov v6.16b, v5.16b
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// Load block in registers
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ldr q0, [x1]
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ldr q1, [x1, 16]
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ldr q2, [x1, 32]
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ldr q3, [x1, 48]
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// TODO: only do that on little endian
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rev32 v0.16b, v0.16b
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rev32 v1.16b, v1.16b
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rev32 v2.16b, v2.16b
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rev32 v3.16b, v3.16b
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// k for the next five rounds
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adrp x1, .K0@PAGE
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ldr q4, [x1, #:lo12:.K0@PAGEOFF]
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// 0
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sha1h s18, s6
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add v19.4s, v0.4s, v4.4s
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sha1c q6, s16, v19.4s
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sha1su0 v0.4s, v1.4s, v2.4s
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// 1
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sha1h s17, s6
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add v19.4s, v1.4s, v4.4s
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sha1c q6, s18, v19.4s
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sha1su1 v0.4s, v3.4s
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sha1su0 v1.4s, v2.4s, v3.4s
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// 2
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sha1h s18, s6
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add v19.4s, v2.4s, v4.4s
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sha1c q6, s17, v19.4s
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sha1su1 v1.4s, v0.4s
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sha1su0 v2.4s, v3.4s, v0.4s
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// 3
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sha1h s17, s6
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add v19.4s, v3.4s, v4.4s
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sha1c q6, s18, v19.4s
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sha1su1 v2.4s, v1.4s
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sha1su0 v3.4s, v0.4s, v1.4s
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// 4
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sha1h s18, s6
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add v19.4s, v0.4s, v4.4s
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sha1c q6, s17, v19.4s
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sha1su1 v3.4s, v2.4s
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sha1su0 v0.4s, v1.4s, v2.4s
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// k for the next five rounds
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adrp x1, .K1@PAGE
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ldr q4, [x1, #:lo12:.K1@PAGEOFF]
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// 5
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sha1h s17, s6
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add v19.4s, v1.4s, v4.4s
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sha1p q6, s18, v19.4s
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sha1su1 v0.4s, v3.4s
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sha1su0 v1.4s, v2.4s, v3.4s
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// 6
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sha1h s18, s6
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add v19.4s, v2.4s, v4.4s
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sha1p q6, s17, v19.4s
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sha1su1 v1.4s, v0.4s
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sha1su0 v2.4s, v3.4s, v0.4s
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// 7
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sha1h s17, s6
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add v19.4s, v3.4s, v4.4s
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sha1p q6, s18, v19.4s
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sha1su1 v2.4s, v1.4s
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sha1su0 v3.4s, v0.4s, v1.4s
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// 8
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sha1h s18, s6
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add v19.4s, v0.4s, v4.4s
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sha1p q6, s17, v19.4s
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sha1su1 v3.4s, v2.4s
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sha1su0 v0.4s, v1.4s, v2.4s
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// 9
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sha1h s17, s6
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add v19.4s, v1.4s, v4.4s
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sha1p q6, s18, v19.4s
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sha1su1 v0.4s, v3.4s
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sha1su0 v1.4s, v2.4s, v3.4s
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// k for the next five rounds
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adrp x1, .K2@PAGE
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ldr q4, [x1, #:lo12:.K2@PAGEOFF]
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// 10
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sha1h s18, s6
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add v19.4s, v2.4s, v4.4s
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sha1m q6, s17, v19.4s
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sha1su1 v1.4s, v0.4s
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sha1su0 v2.4s, v3.4s, v0.4s
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// 11
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sha1h s17, s6
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add v19.4s, v3.4s, v4.4s
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sha1m q6, s18, v19.4s
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sha1su1 v2.4s, v1.4s
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sha1su0 v3.4s, v0.4s, v1.4s
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// 12
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sha1h s18, s6
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add v19.4s, v0.4s, v4.4s
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sha1m q6, s17, v19.4s
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sha1su1 v3.4s, v2.4s
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sha1su0 v0.4s, v1.4s, v2.4s
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// 13
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sha1h s17, s6
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add v19.4s, v1.4s, v4.4s
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sha1m q6, s18, v19.4s
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sha1su1 v0.4s, v3.4s
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sha1su0 v1.4s, v2.4s, v3.4s
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// 14
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sha1h s18, s6
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add v19.4s, v2.4s, v4.4s
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sha1m q6, s17, v19.4s
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sha1su1 v1.4s, v0.4s
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sha1su0 v2.4s, v3.4s, v0.4s
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// k for the next five rounds
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adrp x1, .K3@PAGE
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ldr q4, [x1, #:lo12:.K3@PAGEOFF]
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// 15
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sha1h s17, s6
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add v19.4s, v3.4s, v4.4s
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sha1p q6, s18, v19.4s
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sha1su1 v2.4s, v1.4s
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sha1su0 v3.4s, v0.4s, v1.4s
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// 16
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sha1h s18, s6
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add v19.4s, v0.4s, v4.4s
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sha1p q6, s17, v19.4s
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sha1su1 v3.4s, v2.4s
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// 17
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sha1h s17, s6
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add v19.4s, v1.4s, v4.4s
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sha1p q6, s18, v19.4s
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// 18
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sha1h s18, s6
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add v19.4s, v2.4s, v4.4s
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sha1p q6, s17, v19.4s
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// 19
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sha1h s17, s6
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add v19.4s, v3.4s, v4.4s
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sha1p q6, s18, v19.4s
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// Update state
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add v6.4s, v6.4s, v5.4s
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str q6, [x0]
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add v16.2s, v16.2s, v17.2s
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str s16, [x0, 16]
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ret
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.align 4
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.K0:
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.word 0x5A827999
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.word 0x5A827999
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.word 0x5A827999
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.word 0x5A827999
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.K1:
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.word 0x6ED9EBA1
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.word 0x6ED9EBA1
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.word 0x6ED9EBA1
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.word 0x6ED9EBA1
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.K2:
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.word 0x8F1BBCDC
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.word 0x8F1BBCDC
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.word 0x8F1BBCDC
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.word 0x8F1BBCDC
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.K3:
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.word 0xCA62C1D6
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.word 0xCA62C1D6
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.word 0xCA62C1D6
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.word 0xCA62C1D6

sha2/build.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,16 +2,16 @@ fn main() {
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use std::env;
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let target_arch = env::var("CARGO_CFG_TARGET_ARCH").unwrap_or_default();
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let target_os = env::var("CARGO_CFG_TARGET_OS").unwrap_or_default();
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let target_vendor = env::var("CARGO_CFG_TARGET_VENDOR").unwrap_or_default();
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let mut build256 = cc::Build::new();
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let (sha256_path, sha512_path) = if target_arch == "x86" {
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("src/sha256_x86.S", "src/sha512_x86.S")
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} else if target_arch == "x86_64" {
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("src/sha256_x64.S", "src/sha512_x64.S")
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} else if target_arch == "aarch64" && target_os == "macos" {
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} else if target_arch == "aarch64" && target_vendor == "apple" {
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build256.flag("-march=armv8-a+crypto");
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("src/sha256_aarch64_macos.S", "")
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("src/sha256_aarch64_apple.S", "")
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} else if target_arch == "aarch64" {
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build256.flag("-march=armv8-a+crypto");
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("src/sha256_aarch64.S", "")
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