Skip to content

Commit 6c71bac

Browse files
committed
deploy: d86b62d
1 parent 105f729 commit 6c71bac

File tree

59 files changed

+2357
-329
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

59 files changed

+2357
-329
lines changed

main/.buildinfo

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
11
# Sphinx build info version 1
22
# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
3-
config: a30f5b232d9fb3e8970f66bc7d3afb1f
3+
config: bda5522d97de56817f861757d7785f80
44
tags: 645f666f9bcd5a90fca523b33c5a78b7

main/.doctrees/environment.pickle

81.2 KB
Binary file not shown.

main/.doctrees/user/index.doctree

99 Bytes
Binary file not shown.
Binary file not shown.
Binary file not shown.
Loading
Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
from common.python.timing_plot import make_timing_plot
2+
make_timing_plot('/home/runner/work/PandABlocks.github.io/PandABlocks.github.io/docs/user/tutorials/tutorial2.timing.ini', 'Trigger Counter 5x faster', 'Milliseconds')
Loading
Binary file not shown.
Loading
Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
from common.python.timing_plot import make_timing_plot
2+
make_timing_plot('/home/runner/work/PandABlocks.github.io/PandABlocks.github.io/docs/user/tutorials/tutorial2.timing.ini', 'Trigger Only', 'Milliseconds')
Loading

main/_images/tutorial1_bits.png

95.3 KB
Loading

main/_images/tutorial1_layout.png

127 KB
Loading

main/_images/tutorial1_pulse.png

37.3 KB
Loading

main/_images/tutorial2_layout.png

99.6 KB
Loading

main/_images/tutorial2_pcap.png

43.5 KB
Loading
14.4 KB
Loading
21 KB
Loading

main/_images/tutorial2_positions.png

83 KB
Loading

main/_sources/user/index.rst.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,9 @@ side-bar.
1313
:caption: Tutorials
1414
:maxdepth: 1
1515

16+
tutorials/tutorial1_blinking_leds.rst
17+
tutorials/tutorial2_position_capture.rst
18+
1619
+++
1720

1821
Tutorials for installation and typical usage. New users start here.
Lines changed: 94 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,94 @@
1+
.. _blinking_leds_tutorial:
2+
3+
Blinking LEDs Tutorial
4+
======================
5+
6+
This tutorial will introduce you to the basics of PandABlocks, how to wire
7+
Blocks together to make different LEDs flash at different rates
8+
9+
10+
Opening the GUI
11+
---------------
12+
13+
Point your web browser at the ip address or hostname of the PandA and you will
14+
be greeted with a welcome page. At the bottom of this page will be links for
15+
Docs, Control and Admin. You can use the Control link to open the Web Control
16+
page that we will use in these tutorials. For more information on the Web
17+
Control, see its entry in the Docs section.
18+
19+
20+
Loading the tutorial design
21+
---------------------------
22+
23+
The Design dropdown box allows you to select from saved designs stored on the
24+
PandA. Selecting an item from this list will load the saved design over the
25+
current Block settings. You can use the Save method to save your current
26+
design if you wish to keep it.
27+
28+
Select "template_tutorial1_leds" from the box and the settings and wiring of
29+
the Blocks in the PandA will be changed to the following:
30+
31+
.. image:: ../../images/tutorial1_layout.png
32+
33+
If you now look at the front panel of the PandA you should see the first 4
34+
TTL output LEDs turn on sequentially, then turn off in the opposite order.
35+
36+
37+
How the design works
38+
--------------------
39+
40+
The CLOCKS Block is creating a 50% duty cycle pulse train with a period of 1s.
41+
PULSE1..4 are taking this as an input trigger, and producing a different width
42+
pulse with a different delay for each PULSE Block. These PULSE Blocks work as a
43+
delay line, queuing a series of pulses up to be sent out when the delay expires.
44+
45+
If you click on one of them you can see its settings:
46+
47+
.. image:: ../../images/tutorial1_pulse.png
48+
49+
If you increase the delay beyond the 1s period you will notice that the
50+
``Queued`` field will increase, but the PULSE Block will still continue
51+
outputting pulses after the desired delay. However if you increase the width
52+
beyond the pulse period the Block will drop the pulse, reporting it via the
53+
``Dropped`` field. This is so it avoids merging them together.
54+
55+
You can also try clicking on the CLOCKS Block to modify the period of the input
56+
pulse train.
57+
58+
You can also try wiring these outputs to different TTLOUT Blocks by clicking
59+
the Palette icon, dragging a TTLOUT Block onto the canvas, and connecting it
60+
up by dragging the PULSE out port to the TTLOUT val port.
61+
62+
63+
The Bit Bus
64+
-----------
65+
66+
All ports on the visible Blocks are blue. They represent bits, single boolean
67+
values that can propagate through the system by connecting Blocks together.
68+
These outputs can be viewed on their respective Blocks by clicking them on the
69+
design, or all together by clicking the Bits field in the left hand pane:
70+
71+
.. image:: ../../images/tutorial1_bits.png
72+
73+
If you scroll down to the section with the Pulse blocks you will see the
74+
same pattern of flashing lights as on the front of the PandA
75+
76+
.. note::
77+
78+
The web GUI polls the PandA at 10Hz, receiving the current value of each bit
79+
and whether it has changed. The web GUI uses this information to reflect the
80+
current value of each bit if pulsing at less than 5Hz, and displaying a 5Hz
81+
pulsing value if faster than 5Hz. This means that you will see even short
82+
pulses reflected on the web GUI. The front panel LEDs have a similar
83+
behaviour but with a maximum rate of 10Hz.
84+
85+
86+
Conclusion
87+
----------
88+
89+
This tutorial has shown how to load a saved design and modify some parameters.
90+
It has also introduced the PULSE delay block that is useful for delaying and
91+
stretching trigger signals. It has introduced bit outputs and shown how they
92+
can be connected to the outside world using the TTLOUT Blocks. In the next
93+
tutorial we will read about position outputs, how they can be set and how they
94+
can be captured.
Lines changed: 208 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,208 @@
1+
.. _position_capture_tutorial:
2+
3+
Position Capture Tutorial
4+
=========================
5+
6+
This tutorial will introduce you to the Position Capture interface of
7+
PandABlocks, how to provide trigger signals to control when these capture points
8+
are taken and visualize the data.
9+
10+
11+
Loading the tutorial design
12+
---------------------------
13+
14+
Select "template_tutorial2_pcap" from the Design dropdown box and the settings
15+
and wiring of the Blocks in the PandA will be changed to the following:
16+
17+
.. image:: ../../images/tutorial2_layout.png
18+
19+
20+
How the design works
21+
--------------------
22+
23+
This design has two CLOCK Blocks, which are enabled as soon as the PCAP Block
24+
becomes active:
25+
26+
- The first CLOCK is wired to PCAP trigger and gate. The gate is a level driven
27+
signal that provides the window of time that a capture should be active over.
28+
The trigger is an edge driven signal that actually captures data. In this
29+
example, PCAP.TRIG_EDGE="Falling" so capture will be triggered on a falling
30+
edge of the trigger.
31+
- The second CLOCK is wired to a COUNTER, triggering the increment of the
32+
counter value.
33+
34+
We start off with both CLOCK Blocks set to a period of 1s, so each second the
35+
COUNTER will increment by one, followed by a PCAP trigger half a second later.
36+
This is best viewed as a timing diagram:
37+
38+
.. timing_plot::
39+
:path: docs/user/tutorials/tutorial2.timing.ini
40+
:section: Trigger Only
41+
:xlabel: Milliseconds
42+
43+
What PCAP does on that trigger is determined by the PCAP Block settings, and
44+
the contents of the Bits and Positions tables. For Bits you can turn capture
45+
(instantaneous at the time of trigger) on and off. For Positions, you have a
46+
choice of:
47+
48+
============== =======================
49+
Capture Description
50+
-------------- -----------------------
51+
No Don't capture
52+
Value Instantaneous capture at time of trigger
53+
Diff The difference in the value while gate was high
54+
Sum The sum of all the samples while gate was high
55+
Min The smallest value seen while gate was high
56+
Max The largest value seen while gate was high
57+
Mean The average value seen while gate was high
58+
Min Max Capture both Min and Max
59+
Min Max Mean Capture Min Max and Mean
60+
============== =======================
61+
62+
There are also a handful of other fields like the start of frame, end of frame
63+
and trigger time that can be captured by setting fields on the PCAP Block. If
64+
you click on the PCAP Block you will see them in the Outputs section:
65+
66+
.. image:: ../../images/tutorial2_pcap.png
67+
68+
In the inputs section of the PCAP Block we can see that we have set a delay of
69+
1 for both the Trig and Gate. Delays on bit inputs are in FPGA clock ticks, and
70+
are there to compensate for different length data paths that need to be aligned.
71+
Each Block and each wire in PandA take 1 clock tick each. In this example, both
72+
COUNTER1 and PCAP are being triggered by a CLOCK in the same clock tick, but
73+
we want to delay the input to PCAP by one clock tick so that it sees the updated
74+
COUNTER1 value *after* the corresponding CLOCK rising edge.
75+
76+
.. note::
77+
78+
The delay fields of the PCAP Block are also shown as small badges on the
79+
input ports of the Block
80+
81+
We can set COUNTER1.OUT to capture the Value at trigger by modifying the
82+
Positions table and pressing Submit:
83+
84+
.. image:: ../../images/tutorial2_positions.png
85+
86+
Now we can get a client ready to receive data. We can capture data in ASCII or
87+
Binary format as detailed in the TCP server documentation, and TANGO and EPICS
88+
have clients to do this. For this tutorial we will just use the ASCII format on
89+
the commandline to check::
90+
91+
$ nc <panda-ip> 8889
92+
93+
Here we could specify binary output and header format, but we'll just stick
94+
with the default ASCII output (the default). Press Return again, and we will
95+
see::
96+
97+
OK
98+
99+
Now go back to the PandA layout and select the PCAP Block, pressing the ARM
100+
button. The Active light will go on and data will start streaming in the
101+
terminal window until Disarm is pressed::
102+
103+
missed: 0
104+
process: Scaled
105+
format: ASCII
106+
fields:
107+
COUNTER1.OUT double Value scale: 1 offset: 0 units:
108+
109+
1
110+
2
111+
3
112+
4
113+
END 4 Disarmed
114+
115+
This tallies with the timing diagram we saw above, the captured value matches
116+
the instantaneous value of COUNTER1.OUT when PCAP.TRIG went high.
117+
118+
We will now make the COUNTER1.OUT increment 5 times faster. Set CLOCK2.PERIOD
119+
to 0.2s, and click PCAP.ARM and you will see the captured value change::
120+
121+
missed: 0
122+
process: Scaled
123+
format: ASCII
124+
fields:
125+
COUNTER1.OUT double Value scale: 1 offset: 0 units:
126+
127+
3
128+
8
129+
13
130+
18
131+
END 4 Disarmed
132+
133+
If we look at the timing plot, we can see this also matched what we expect, the
134+
value is captured mid way through each increment of 5:
135+
136+
.. timing_plot::
137+
:path: docs/user/tutorials/tutorial2.timing.ini
138+
:section: Trigger Counter 5x faster
139+
:xlabel: Milliseconds
140+
141+
Now let's investigate the other options. If we change the Positions table
142+
so COUNTER1.OUT captures the Diff instead of Value then we will see it captures
143+
the difference between the value at the rising edge of the gate, and the
144+
falling edge::
145+
146+
missed: 0
147+
process: Scaled
148+
format: ASCII
149+
fields:
150+
COUNTER1.OUT double Diff scale: 1 offset: 0 units:
151+
152+
2
153+
2
154+
2
155+
2
156+
END 4 Disarmed
157+
158+
This again matches the timing plot, GATE rises when COUNTER was at 1, and falls
159+
at 3, then rises at 6 and falls at 8.
160+
161+
.. note::
162+
163+
If we hadn't put in the 1 clock tick delays for Gate and Trig then we would
164+
see 3 rather than 2, as GATE would rise at 0 and fall at 3, then rise at 5
165+
and fall at 8
166+
167+
This capture output is generally used with COUNTER Blocks connected to an input
168+
fed from a V2F_ to capture the total counts produced in a given time window.
169+
170+
If we change COUNTER1.OUT to capture Min Max and Mean, we will see the other
171+
options::
172+
173+
missed: 0
174+
process: Scaled
175+
format: ASCII
176+
fields:
177+
COUNTER1.OUT double Min scale: 1 offset: 0 units:
178+
COUNTER1.OUT double Max scale: 1 offset: 0 units:
179+
COUNTER1.OUT double Mean scale: 1 offset: 0 units:
180+
181+
1 3 1.8
182+
6 8 6.8
183+
11 13 11.8
184+
16 18 16.8
185+
END 4 Disarmed
186+
187+
Here we can see our min and max values as we expected, and also the Mean of
188+
the COUNTER value during the total gate::
189+
190+
# (sum of counter_value * time_at_value) / gate_time = mean
191+
(1 * 0.2 + 2 * 0.2 + 3 * 0.1) / 0.5 = 1.8
192+
(6 * 0.2 + 7 * 0.2 + 8 * 0.1) / 0.5 = 6.8
193+
194+
This capture output is generally used with encoders, to give the min, max and
195+
mean value of the encoder over a detector frame.
196+
197+
Conclusion
198+
----------
199+
200+
This tutorial has shown how to use the Position Capture interface of a PandA
201+
to capture entries on the position bus, and introduced the different capture
202+
types. It has also introduced the COUNTER block that is useful connecting to
203+
the pulse train produced by a V2F_. In the next tutorial we will read about
204+
how to use position compare to generate triggers from position outputs, and
205+
how to configure position capture to work with it.
206+
207+
208+
.. _V2F: https://hal.archives-ouvertes.fr/hal-01573024/document

main/_static/documentation_options.js

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
const DOCUMENTATION_OPTIONS = {
2-
VERSION: '3.1.dev1+g7c4ec5e',
2+
VERSION: '3.1.dev2+gd86b62d',
33
LANGUAGE: 'en',
44
COLLAPSE_INDEX: false,
55
BUILDER: 'html',

main/_static/plot_directive.css

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
/*
2+
* plot_directive.css
3+
* ~~~~~~~~~~~~
4+
*
5+
* Stylesheet controlling images created using the `plot` directive within
6+
* Sphinx.
7+
*
8+
* :copyright: Copyright 2020-* by the Matplotlib development team.
9+
* :license: Matplotlib, see LICENSE for details.
10+
*
11+
*/
12+
13+
img.plot-directive {
14+
border: 0;
15+
max-width: 100%;
16+
}

0 commit comments

Comments
 (0)