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device.yaml
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config:
register_address_type: u8
default_byte_order: LE
default_bit_order: LSB0
defmt_feature: defmt-03
OUTPUT_PORT0:
type: register
address: 0x02
size_bits: 8
reset_value: 0xFF
fields:
O0_0:
base: bool
start: 0
description: Output Port 0 Pin 0. Host writes this bit to set the desired logic output level.
O0_1:
base: bool
start: 1
description: Output Port 0 Pin 1. Host writes this bit to set the desired logic output level.
O0_2:
base: bool
start: 2
description: Output Port 0 Pin 2. Host writes this bit to set the desired logic output level.
O0_3:
base: bool
start: 3
description: Output Port 0 Pin 3. Host writes this bit to set the desired logic output level.
O0_4:
base: bool
start: 4
description: Output Port 0 Pin 4. Host writes this bit to set the desired logic output level.
O0_5:
base: bool
start: 5
description: Output Port 0 Pin 5. Host writes this bit to set the desired logic output level.
O0_6:
base: bool
start: 6
description: Output Port 0 Pin 6. Host writes this bit to set the desired logic output level.
O0_7:
base: bool
start: 7
description: Output Port 0 Pin 7. Host writes this bit to set the desired logic output level.
OUTPUT_PORT1:
type: register
address: 0x03
size_bits: 8
reset_value: 0xFF
fields:
O1_0:
base: bool
start: 0
description: Output Port 1 Pin 0. Host writes this bit to set the desired logic output level.
O1_1:
base: bool
start: 1
description: Output Port 1 Pin 1. Host writes this bit to set the desired logic output level.
O1_2:
base: bool
start: 2
description: Output Port 1 Pin 2. Host writes this bit to set the desired logic output level.
O1_3:
base: bool
start: 3
description: Output Port 1 Pin 3. Host writes this bit to set the desired logic output level.
O1_4:
base: bool
start: 4
description: Output Port 1 Pin 4. Host writes this bit to set the desired logic output level.
O1_5:
base: bool
start: 5
description: Output Port 1 Pin 5. Host writes this bit to set the desired logic output level.
O1_6:
base: bool
start: 6
description: Output Port 1 Pin 6. Host writes this bit to set the desired logic output level.
O1_7:
base: bool
start: 7
description: Output Port 1 Pin 7. Host writes this bit to set the desired logic output level.
CONFIG_PORT0:
type: register
address: 0x06
size_bits: 8
reset_value: 0xFF
fields:
C0_0:
base: bool
start: 0
description: Config Port 0 Pin 0. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_1:
base: bool
start: 1
description: Config Port 0 Pin 1. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_2:
base: bool
start: 2
description: Config Port 0 Pin 2. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_3:
base: bool
start: 3
description: Config Port 0 Pin 3. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_4:
base: bool
start: 4
description: Config Port 0 Pin 4. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_5:
base: bool
start: 5
description: Config Port 0 Pin 5. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_6:
base: bool
start: 6
description: Config Port 0 Pin 6. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C0_7:
base: bool
start: 7
description: Config Port 0 Pin 7. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
CONFIG_PORT1:
type: register
address: 0x07
size_bits: 8
reset_value: 0xFF
fields:
C1_0:
base: bool
start: 0
description: Config Port 1 Pin 0. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_1:
base: bool
start: 1
description: Config Port 1 Pin 1. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_2:
base: bool
start: 2
description: Config Port 1 Pin 2. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_3:
base: bool
start: 3
description: Config Port 1 Pin 3. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_4:
base: bool
start: 4
description: Config Port 1 Pin 4. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_5:
base: bool
start: 5
description: Config Port 1 Pin 5. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_6:
base: bool
start: 6
description: Config Port 1 Pin 6. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.
C1_7:
base: bool
start: 7
description: Config Port 1 Pin 7. Host clears this bit to set the pin as an output. Bit is set by default and configures the pin as an input.