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Due to the potential for delays between async calls, the state machine transitions (i.e., START->WRITE->CONT->READ->STOP) should be handled in the ISR directly, so that the async i2c transaction function simply polls a future for when the entire transfer is complete, instead of each individual state transition being polled. This will help guarantee I2C bus performance regardless of what work the CPU has bound
The text was updated successfully, but these errors were encountered:
Due to the potential for delays between async calls, the state machine transitions (i.e., START->WRITE->CONT->READ->STOP) should be handled in the ISR directly, so that the async i2c transaction function simply polls a future for when the entire transfer is complete, instead of each individual state transition being polled. This will help guarantee I2C bus performance regardless of what work the CPU has bound
The text was updated successfully, but these errors were encountered: