Problem with runing simulator with riscv-tests #1442
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Hello, I'm using riscv simualtor from mipt-mips (github.com/MIPT-ILab/) to run tests from riscv-tests(github.com/MIPT-ILab/riscv-tests ) also with the help of riscv-gnu-toolchain (github.com/riscv/riscv-gnu-toolchain). How i have builded simulator: cmake /path/to/mipt-mips/simulator -G "Ninja" How i have builded tests: I'm running tests in --bp-mode So my problem is that i cant run riscv-tests from benchmarks and want to find tests with a lot of instructions that will work fine in --bp-mode |
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Replies: 4 comments
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This happens because we have not fixed #1076 yet, assuming next instruction is always PC + 4, while for compressed instructions it should be PC + 2.
Current assignment for MIPT students is to implement benchmarks sensitive to different branch prediction modes, |
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Sorry, I was not precise, this string was a bad example. To disable compressed instructions, add to this line: following options: |
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I will add few points that may clarify the current state. I succeeded with running those tests. Unfortunately, not all benchmarks could be compiled with proposed options. Those are benchamrks that use floating point instructions or atomic instructions. I could not find any option to exclude them from build, so I fixed Makefile a bit. You may find patch attached. |
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Sorry, I was not precise, this string was a bad example.
In shot, RISC-V ISA has few sub-sets, and each subset is encoded with a single letter: A for atomic, B for bit manipulations, C for compressed, etc.
To disable compressed instructions, add to this line:
https://github.com/riscv/riscv-tests/blob/58eb560a84ea2d6a392f7e75bba649a0c5946617/benchmarks/Makefile#L40
following options:
-march=rv64im -mabi=lp64