From d1c10e1f8f7d09339b2d63fb4cb59b6bd60bbcd4 Mon Sep 17 00:00:00 2001 From: Ludwig CRON Date: Sun, 12 Apr 2020 10:50:25 +0200 Subject: [PATCH] Gather digital tests & report fix: - batch -> digital/batch - generic_sar -> digital/generic_sar - fix erroneous sim time in "others" --- default.config | 1 + envs/bin/run | 32 ++-- tests/Batch.list | 4 +- tests/{ => common}/main/Sources.list | 0 tests/{ => common}/main/tb.sv | 0 tests/{ => common}/src_dir1/Sources.list | 0 tests/{ => common}/src_dir1/clk_gen.v | 0 tests/{ => common}/src_dir2/Sources.list | 0 tests/digital/Batch.list | 3 + tests/digital/batch/.tmp_report/report.html | 151 ++++++++++++++++++ tests/{ => digital}/batch/Batch.list | 0 tests/{ => digital}/batch/tb/Sources.list | 0 tests/{ => digital}/batch/tb/tb.sv | 0 tests/{ => digital}/generic_sar/Makefile | 0 tests/{ => digital}/generic_sar/Sources.list | 0 .../generic_sar/generic/Sources.list | 0 .../generic_sar/generic/rs_nand.v | 0 .../generic_sar/generic/rs_nor.v | 0 .../generic_sar/generic/toggle_resync.v | 0 .../{ => digital}/generic_sar/project.config | 3 +- tests/{ => digital}/generic_sar/sar.v | 0 tests/{ => digital}/generic_sar/sar_analog.sv | 0 .../generic_sar/sar_reconstruction.v | 0 tests/{ => digital}/generic_sar/tb.sv | 0 tests/{ => digital}/generic_sar/view.gtkw | 0 25 files changed, 174 insertions(+), 20 deletions(-) rename tests/{ => common}/main/Sources.list (100%) rename tests/{ => common}/main/tb.sv (100%) rename tests/{ => common}/src_dir1/Sources.list (100%) rename tests/{ => common}/src_dir1/clk_gen.v (100%) rename tests/{ => common}/src_dir2/Sources.list (100%) create mode 100644 tests/digital/Batch.list create mode 100644 tests/digital/batch/.tmp_report/report.html rename tests/{ => digital}/batch/Batch.list (100%) rename tests/{ => digital}/batch/tb/Sources.list (100%) rename tests/{ => digital}/batch/tb/tb.sv (100%) rename tests/{ => digital}/generic_sar/Makefile (100%) rename tests/{ => digital}/generic_sar/Sources.list (100%) rename tests/{ => digital}/generic_sar/generic/Sources.list (100%) rename tests/{ => digital}/generic_sar/generic/rs_nand.v (100%) rename tests/{ => digital}/generic_sar/generic/rs_nor.v (100%) rename tests/{ => digital}/generic_sar/generic/toggle_resync.v (100%) rename tests/{ => digital}/generic_sar/project.config (78%) rename tests/{ => digital}/generic_sar/sar.v (100%) rename tests/{ => digital}/generic_sar/sar_analog.sv (100%) rename tests/{ => digital}/generic_sar/sar_reconstruction.v (100%) rename tests/{ => digital}/generic_sar/tb.sv (100%) rename tests/{ => digital}/generic_sar/view.gtkw (100%) diff --git a/default.config b/default.config index c647414..5aca81f 100644 --- a/default.config +++ b/default.config @@ -1,5 +1,6 @@ DIG_SYNTHESIS_TOOL = yosys DIG_SIMULATOR_TOOL = iverilog +DIG_LINTER_TOOL = iverilog DIG_COVERAGE_TOOL = covered DIG_WAVEFORM_VIEWER = gtkwave ANA_SIMULATOR_TOOL = ltspice diff --git a/envs/bin/run b/envs/bin/run index 934d776..cdef15f 100755 --- a/envs/bin/run +++ b/envs/bin/run @@ -199,9 +199,9 @@ if __name__ == "__main__": relog.error("cannot lint mixed signal or analog simulations") exit(0) # load the simulator script - tool_path = utils.find_tool(config["DIG_SIMULATOR_TOOL"]) + tool_path = utils.find_tool(config["DIG_LINTER_TOOL"]) sys.path.append(os.path.dirname(tool_path)) - linter = import_module(config["DIG_SIMULATOR_TOOL"]) + linter = import_module(config["DIG_LINTER_TOOL"]) # execute t_start = time.time() * 1000.0 stats = linter.main(files, params, lint=True) @@ -325,23 +325,23 @@ if __name__ == "__main__": # read other sims db_batch = {"sims": [], "lints": [], "covs": []} for stats_path in Path(CURRENT_DIR).rglob("**/*.stats"): - if stats_path in read_stat_done: - continue - type, db_sim = read_sim_stat(stats_path) - # aggregate - for k, v in db_sim.items(): - tmp = db_batch[k] if k in db_batch else 0 - if k != "name": - try: - db_batch[k] = float(v) + tmp - except ValueError: - relog.error("%s values should be number" % stats_path) - read_stat_done.append(stats_path) - if type != "batch": - db_batch["%ss" % type].append(db_sim) + if stats_path not in read_stat_done and "batch.stats" not in str(stats_path): + type, db_sim = read_sim_stat(stats_path) + # aggregate + for k, v in db_sim.items(): + tmp = db_batch[k] if k in db_batch else 0 + if k != "name": + try: + db_batch[k] = float(v) + tmp + except ValueError: + relog.error("%s values should be number" % stats_path) + read_stat_done.append(stats_path) + if type != "batch": + db_batch["%ss" % type].append(db_sim) # add some stats to the db add_extra_stats(db_batch) db_batch["name"] = "others" + print(db_batch) db["blocks"].append(db_batch) # read the html template t = Template( diff --git a/tests/Batch.list b/tests/Batch.list index 654e2c8..a7af5cb 100644 --- a/tests/Batch.list +++ b/tests/Batch.list @@ -1,4 +1,2 @@ -generic_sar analog -digital/cov/simple -batch \ No newline at end of file +digital diff --git a/tests/main/Sources.list b/tests/common/main/Sources.list similarity index 100% rename from tests/main/Sources.list rename to tests/common/main/Sources.list diff --git a/tests/main/tb.sv b/tests/common/main/tb.sv similarity index 100% rename from tests/main/tb.sv rename to tests/common/main/tb.sv diff --git a/tests/src_dir1/Sources.list b/tests/common/src_dir1/Sources.list similarity index 100% rename from tests/src_dir1/Sources.list rename to tests/common/src_dir1/Sources.list diff --git a/tests/src_dir1/clk_gen.v b/tests/common/src_dir1/clk_gen.v similarity index 100% rename from tests/src_dir1/clk_gen.v rename to tests/common/src_dir1/clk_gen.v diff --git a/tests/src_dir2/Sources.list b/tests/common/src_dir2/Sources.list similarity index 100% rename from tests/src_dir2/Sources.list rename to tests/common/src_dir2/Sources.list diff --git a/tests/digital/Batch.list b/tests/digital/Batch.list new file mode 100644 index 0000000..71af3a4 --- /dev/null +++ b/tests/digital/Batch.list @@ -0,0 +1,3 @@ +batch +cov/simple +generic_sar diff --git a/tests/digital/batch/.tmp_report/report.html b/tests/digital/batch/.tmp_report/report.html new file mode 100644 index 0000000..632ebd4 --- /dev/null +++ b/tests/digital/batch/.tmp_report/report.html @@ -0,0 +1,151 @@ + + + + + + + + + +

Saturday, 11. April 2020 20:36

+ + + + + + + + + + + + + + + + + +
namelintsimulationcoveragetotal time
+ + batch + + 0/06/60/00.507s
+ +
+ + batch + +

Lint

+
No lints
+ +

Simulation

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
idwarningserrorstotal time
s2000.10s
tb000.10s
youpi000.9s
s000.10s
fast_clock000.10s
UFC000.11s
+ +

Code coverage

+
No coverage simulations
+
+ + + \ No newline at end of file diff --git a/tests/batch/Batch.list b/tests/digital/batch/Batch.list similarity index 100% rename from tests/batch/Batch.list rename to tests/digital/batch/Batch.list diff --git a/tests/batch/tb/Sources.list b/tests/digital/batch/tb/Sources.list similarity index 100% rename from tests/batch/tb/Sources.list rename to tests/digital/batch/tb/Sources.list diff --git a/tests/batch/tb/tb.sv b/tests/digital/batch/tb/tb.sv similarity index 100% rename from tests/batch/tb/tb.sv rename to tests/digital/batch/tb/tb.sv diff --git a/tests/generic_sar/Makefile b/tests/digital/generic_sar/Makefile similarity index 100% rename from tests/generic_sar/Makefile rename to tests/digital/generic_sar/Makefile diff --git a/tests/generic_sar/Sources.list b/tests/digital/generic_sar/Sources.list similarity index 100% rename from tests/generic_sar/Sources.list rename to tests/digital/generic_sar/Sources.list diff --git a/tests/generic_sar/generic/Sources.list b/tests/digital/generic_sar/generic/Sources.list similarity index 100% rename from tests/generic_sar/generic/Sources.list rename to tests/digital/generic_sar/generic/Sources.list diff --git a/tests/generic_sar/generic/rs_nand.v b/tests/digital/generic_sar/generic/rs_nand.v similarity index 100% rename from tests/generic_sar/generic/rs_nand.v rename to tests/digital/generic_sar/generic/rs_nand.v diff --git a/tests/generic_sar/generic/rs_nor.v b/tests/digital/generic_sar/generic/rs_nor.v similarity index 100% rename from tests/generic_sar/generic/rs_nor.v rename to tests/digital/generic_sar/generic/rs_nor.v diff --git a/tests/generic_sar/generic/toggle_resync.v b/tests/digital/generic_sar/generic/toggle_resync.v similarity index 100% rename from tests/generic_sar/generic/toggle_resync.v rename to tests/digital/generic_sar/generic/toggle_resync.v diff --git a/tests/generic_sar/project.config b/tests/digital/generic_sar/project.config similarity index 78% rename from tests/generic_sar/project.config rename to tests/digital/generic_sar/project.config index a34b02d..a23dc9e 100644 --- a/tests/generic_sar/project.config +++ b/tests/digital/generic_sar/project.config @@ -1,7 +1,8 @@ DIG_SYNTHESIS_TOOL = yosys DIG_SIMULATOR_TOOL = iverilog +DIG_LINTER_TOOL = iverilog DIG_COVERAGE_TOOL = covered WAVEFORM_VIEWER = gtkwave -PLATFORM = Ganymede +PLATFORM = reflow PROJECT_FLOW = digital TECH_LIB = $(CADTOOLS)/yosys/examples/cmos/cmos_cells.lib \ No newline at end of file diff --git a/tests/generic_sar/sar.v b/tests/digital/generic_sar/sar.v similarity index 100% rename from tests/generic_sar/sar.v rename to tests/digital/generic_sar/sar.v diff --git a/tests/generic_sar/sar_analog.sv b/tests/digital/generic_sar/sar_analog.sv similarity index 100% rename from tests/generic_sar/sar_analog.sv rename to tests/digital/generic_sar/sar_analog.sv diff --git a/tests/generic_sar/sar_reconstruction.v b/tests/digital/generic_sar/sar_reconstruction.v similarity index 100% rename from tests/generic_sar/sar_reconstruction.v rename to tests/digital/generic_sar/sar_reconstruction.v diff --git a/tests/generic_sar/tb.sv b/tests/digital/generic_sar/tb.sv similarity index 100% rename from tests/generic_sar/tb.sv rename to tests/digital/generic_sar/tb.sv diff --git a/tests/generic_sar/view.gtkw b/tests/digital/generic_sar/view.gtkw similarity index 100% rename from tests/generic_sar/view.gtkw rename to tests/digital/generic_sar/view.gtkw