From bb62c88919ff22698deacb7bb73e0ceb9b498eed Mon Sep 17 00:00:00 2001 From: Benedek Kupper Date: Tue, 30 Apr 2019 22:16:25 +0200 Subject: [PATCH] add BSP for STM32L476GDISCOVERY --- .travis.yml | 2 + BSP_STM32L4xx/bsp_io.c | 47 +++ BSP_STM32L4xx/bsp_io.h | 54 +++ BSP_STM32L4xx/bsp_system.c | 59 ++++ BSP_STM32L4xx/bsp_system.h | 37 ++ BSP_STM32L4xx/bsp_usb.c | 70 ++++ BSP_STM32L4xx/bsp_usb.h | 39 +++ BSP_STM32L4xx/startup_stm32l476xx.s | 526 ++++++++++++++++++++++++++++ BSP_STM32L4xx/stm32_flash.ld | 198 +++++++++++ BSP_STM32L4xx/system_stm32l4xx.c | 67 ++++ BSP_STM32L4xx/xpd_config.h | 38 ++ Makefile | 6 +- README.md | 2 +- 13 files changed, 1141 insertions(+), 4 deletions(-) create mode 100644 BSP_STM32L4xx/bsp_io.c create mode 100644 BSP_STM32L4xx/bsp_io.h create mode 100644 BSP_STM32L4xx/bsp_system.c create mode 100644 BSP_STM32L4xx/bsp_system.h create mode 100644 BSP_STM32L4xx/bsp_usb.c create mode 100644 BSP_STM32L4xx/bsp_usb.h create mode 100644 BSP_STM32L4xx/startup_stm32l476xx.s create mode 100644 BSP_STM32L4xx/stm32_flash.ld create mode 100644 BSP_STM32L4xx/system_stm32l4xx.c create mode 100644 BSP_STM32L4xx/xpd_config.h diff --git a/.travis.yml b/.travis.yml index ed2e20a..5f82b93 100644 --- a/.travis.yml +++ b/.travis.yml @@ -12,3 +12,5 @@ before_install: script: - docker run -v $PWD:/my_files_in_docker --entrypoint /usr/bin/make jumperio/vlab-gcc-arm -C my_files_in_docker SERIES=STM32F4 - docker run -v $PWD:/my_files_in_docker --entrypoint /usr/bin/make jumperio/vlab-gcc-arm -C my_files_in_docker SERIES=STM32F4 OS_DIR=FreeRTOS/FreeRTOS/Source +- docker run -v $PWD:/my_files_in_docker --entrypoint /usr/bin/make jumperio/vlab-gcc-arm -C my_files_in_docker SERIES=STM32L4 +- docker run -v $PWD:/my_files_in_docker --entrypoint /usr/bin/make jumperio/vlab-gcc-arm -C my_files_in_docker SERIES=STM32L4 OS_DIR=FreeRTOS/FreeRTOS/Source diff --git a/BSP_STM32L4xx/bsp_io.c b/BSP_STM32L4xx/bsp_io.c new file mode 100644 index 0000000..6a9e842 --- /dev/null +++ b/BSP_STM32L4xx/bsp_io.c @@ -0,0 +1,47 @@ +/** + ****************************************************************************** + * @file bsp_io.c + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for I/O pins + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include + +const GPIO_InitType BSP_IOCfg[] = +{ + /* USB pins */ + { + .Mode = GPIO_MODE_ALTERNATE, + .Pull = GPIO_PULL_FLOAT, + .Output.Type = GPIO_OUTPUT_PUSHPULL, + .Output.Speed = VERY_HIGH, + .AlternateMap = GPIO_OTG_FS_AF10 + }, + /* PushButton */ + { + .Mode = GPIO_MODE_INPUT, + .Pull = GPIO_PULL_FLOAT, + }, + /* LED */ + { + .Mode = GPIO_MODE_OUTPUT, + .Pull = GPIO_PULL_FLOAT, + .Output.Type = GPIO_OUTPUT_PUSHPULL, + .Output.Speed = HIGH, + }, +}; diff --git a/BSP_STM32L4xx/bsp_io.h b/BSP_STM32L4xx/bsp_io.h new file mode 100644 index 0000000..bb2b222 --- /dev/null +++ b/BSP_STM32L4xx/bsp_io.h @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * @file bsp_io.h + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for I/O pins + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef __BSP_IO_H_ +#define __BSP_IO_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include + +#define USB_DP_PIN PA12 +#define USB_DM_PIN PA11 +#define USB_VBUS_PIN PA9 +#define USB_DP_CFG (&BSP_IOCfg[0]) +#define USB_DM_CFG (&BSP_IOCfg[0]) +#define USB_VBUS_CFG (&BSP_IOCfg[0]) + +#define BUTTON_PIN PA0 +#define BUTTON_CFG (&BSP_IOCfg[1]) + +#define LED_GREEN_PIN PE8 +#define LED_RED_PIN PB2 +#define LED_GREEN_CFG (&BSP_IOCfg[2]) +#define LED_RED_CFG (&BSP_IOCfg[2]) + +extern const GPIO_InitType BSP_IOCfg[]; + +#ifdef __cplusplus +} +#endif + +#endif /* __BSP_IO_H_ */ diff --git a/BSP_STM32L4xx/bsp_system.c b/BSP_STM32L4xx/bsp_system.c new file mode 100644 index 0000000..e3c19af --- /dev/null +++ b/BSP_STM32L4xx/bsp_system.c @@ -0,0 +1,59 @@ +/** + ****************************************************************************** + * @file bsp_system.c + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for system clocking + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include + +static const RCC_MSI_InitType msiconf = { + .ClockFreq = MSI_48MHz, + .State = ENABLE +}; + +static const RCC_PLL_InitType pllconf = { + .State = ENABLE, + .Source = MSI, + .M = 6, + .N = 20, + .R = 2, /* MSI / 6 * 20 / 2 = PLLR = 80000000 -> SYSCLK */ + + .Q = 2, + .P = 7 +}; + +/* System clocks configuration */ +void SystemClock_Config(void) +{ + RCC_eMSI_Config(&msiconf); + +#ifdef LSE_VALUE_Hz + /* Use LSE to synchronize MSI */ + RCC_eLSE_Config(OSC_ON); +#endif + + RCC_ePLL_Config(&pllconf); + + /* System clocks configuration */ + RCC_eHCLK_Config(PLL, CLK_DIV1, 4); + + RCC_vPCLK1_Config(CLK_DIV1); + RCC_vPCLK2_Config(CLK_DIV1); +} diff --git a/BSP_STM32L4xx/bsp_system.h b/BSP_STM32L4xx/bsp_system.h new file mode 100644 index 0000000..b154da5 --- /dev/null +++ b/BSP_STM32L4xx/bsp_system.h @@ -0,0 +1,37 @@ +/** + ****************************************************************************** + * @file bsp_system.h + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for system clocking + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef __BSP_SYSTEM_H_ +#define __BSP_SYSTEM_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +extern void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BSP_SYSTEM_H_ */ diff --git a/BSP_STM32L4xx/bsp_usb.c b/BSP_STM32L4xx/bsp_usb.c new file mode 100644 index 0000000..e59ecdd --- /dev/null +++ b/BSP_STM32L4xx/bsp_usb.c @@ -0,0 +1,70 @@ +/** + ****************************************************************************** + * @file bsp_usb.c + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for USB communication + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include +#include + +void OTG_FS_IRQHandler(void); + +/* USB dependencies initialization */ +static void BSP_USB_Init(void * handle) +{ + /* GPIO settings */ + GPIO_vInitPin(USB_DM_PIN, USB_DM_CFG); + GPIO_vInitPin(USB_DP_PIN, USB_DP_CFG); + + NVIC_SetPriorityConfig(OTG_FS_IRQn, 0x6, 0); + NVIC_EnableIRQ(OTG_FS_IRQn); + + USB_vClockConfig(USB_CLOCKSOURCE_MSI); + + PWR_vVddUSB(ENABLE); +} + +/* USB dependencies deinitialization */ +static void BSP_USB_Deinit(void * handle) +{ + GPIO_vDeinitPin(USB_DM_PIN); + GPIO_vDeinitPin(USB_DP_PIN); + NVIC_DisableIRQ(OTG_FS_IRQn); + PWR_vVddUSB(DISABLE); +} + +extern USB_HandleType *const UsbDevice; + +void BSP_USB_Bind(void) +{ + USB_INST2HANDLE(UsbDevice, USB_OTG_FS); + UsbDevice->Callbacks.DepInit = BSP_USB_Init; + UsbDevice->Callbacks.DepDeinit = BSP_USB_Deinit; +} + +/* Common interrupt handler for USB core and WKUP line */ +void OTG_FS_IRQHandler(void) +{ + EXTI_vClearFlag(USB_OTG_FS_WAKEUP_EXTI_LINE); + + /* Handle USB interrupts */ + USB_vIRQHandler(UsbDevice); +} diff --git a/BSP_STM32L4xx/bsp_usb.h b/BSP_STM32L4xx/bsp_usb.h new file mode 100644 index 0000000..05717bf --- /dev/null +++ b/BSP_STM32L4xx/bsp_usb.h @@ -0,0 +1,39 @@ +/** + ****************************************************************************** + * @file bsp_usb.h + * @author Benedek Kupper + * @version 0.1 + * @date 2018-12-16 + * @brief IPoverUSB BSP for USB communication + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef __BSP_USB_H_ +#define __BSP_USB_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include + +void BSP_USB_Bind(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BSP_USB_H_ */ diff --git a/BSP_STM32L4xx/startup_stm32l476xx.s b/BSP_STM32L4xx/startup_stm32l476xx.s new file mode 100644 index 0000000..6e1281e --- /dev/null +++ b/BSP_STM32L4xx/startup_stm32l476xx.s @@ -0,0 +1,526 @@ +/** + ****************************************************************************** + * @file startup_stm32l476xx.s + * @author MCD Application Team + * @version V1.3.0 + * @date 17-February-2017 + * @brief STM32L476xx devices vector table GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_PVM_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN1_TX_IRQHandler + .word CAN1_RX0_IRQHandler + .word CAN1_RX1_IRQHandler + .word CAN1_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word DFSDM1_FLT3_IRQHandler + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word FMC_IRQHandler + .word SDMMC1_IRQHandler + .word TIM5_IRQHandler + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word DFSDM1_FLT0_IRQHandler + .word DFSDM1_FLT1_IRQHandler + .word DFSDM1_FLT2_IRQHandler + .word COMP_IRQHandler + .word LPTIM1_IRQHandler + .word LPTIM2_IRQHandler + .word OTG_FS_IRQHandler + .word DMA2_Channel6_IRQHandler + .word DMA2_Channel7_IRQHandler + .word LPUART1_IRQHandler + .word QUADSPI_IRQHandler + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word SAI1_IRQHandler + .word SAI2_IRQHandler + .word SWPMI1_IRQHandler + .word TSC_IRQHandler + .word LCD_IRQHandler + .word 0 + .word RNG_IRQHandler + .word FPU_IRQHandler + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_PVM_IRQHandler + .thumb_set PVD_PVM_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak COMP_IRQHandler + .thumb_set COMP_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Channel6_IRQHandler + .thumb_set DMA2_Channel6_IRQHandler,Default_Handler + + .weak DMA2_Channel7_IRQHandler + .thumb_set DMA2_Channel7_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak SWPMI1_IRQHandler + .thumb_set SWPMI1_IRQHandler,Default_Handler + + .weak TSC_IRQHandler + .thumb_set TSC_IRQHandler,Default_Handler + + .weak LCD_IRQHandler + .thumb_set LCD_IRQHandler,Default_Handler + + .weak RNG_IRQHandler + .thumb_set RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/BSP_STM32L4xx/stm32_flash.ld b/BSP_STM32L4xx/stm32_flash.ld new file mode 100644 index 0000000..060d4a2 --- /dev/null +++ b/BSP_STM32L4xx/stm32_flash.ld @@ -0,0 +1,198 @@ +/* +****************************************************************************** +File: stm32l4_flash.ld +Info: Generated by Atollic TrueSTUDIO(R) 9.0.0 2018-02-24 + +Abstract: Linker script for STM32L476VG device + Set heap size, stack size, stack location, memory areas and + sections according to application requirements. + +The MIT License (MIT) +Copyright (c) 2018 STMicroelectronics + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + RAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 32K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siram2 = LOADADDR(.ram2); + + /* RAM2 section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ram2 : + { + . = ALIGN(4); + _sram2 = .; /* create a global symbol at ram2 start */ + *(.ram2) + *(.ram2*) + + . = ALIGN(4); + _eram2 = .; /* create a global symbol at ram2 end */ + } >RAM2 AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/BSP_STM32L4xx/system_stm32l4xx.c b/BSP_STM32L4xx/system_stm32l4xx.c new file mode 100644 index 0000000..64cd08c --- /dev/null +++ b/BSP_STM32L4xx/system_stm32l4xx.c @@ -0,0 +1,67 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author Benedek Kupper + * @version 0.3 + * @date 2018-09-28 + * @brief STM32 eXtensible Peripheral Drivers template + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include +#include + +/** @brief Global variable used to store the actual system clock frequency [Hz] */ +uint32_t SystemCoreClock; + +/** @brief Interrupt vector table in startup_.s */ +extern const uint32_t g_pfnVectors[]; + +/** + * @brief Setup the microcontroller system. + * Initialize the default HSI clock source, + * vector table location + * and the PLL configuration is reset. + */ +void SystemInit(void) +{ + /* Reset all peripherals */ + XPD_vDeinit(); + + /* Reset the RCC clock configuration to the default reset state + * Sets SystemCoreClock value */ + RCC_vDeinit(); + +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + /* FPU settings: if used, set CP10 and CP11 Full Access */ + SCB->CPACR.b.CP10 = 3; + SCB->CPACR.b.CP11 = 3; +#endif + + /* initialize XPD services */ + XPD_vInit(); + + /* TODO Redirect to interrupt vector table position */ + SCB->VTOR.w = (uint32_t)g_pfnVectors; + SYSTEM_MEMORY_REMAP(FLASH); + + /* TODO Configure system memory options */ + FLASH_vPrefetchBuffer(ENABLE); + + FLASH_vInstCache(ENABLE); + FLASH_vDataCache(ENABLE); +} diff --git a/BSP_STM32L4xx/xpd_config.h b/BSP_STM32L4xx/xpd_config.h new file mode 100644 index 0000000..7e686ad --- /dev/null +++ b/BSP_STM32L4xx/xpd_config.h @@ -0,0 +1,38 @@ +/** + ****************************************************************************** + * @file xpd_config.h + * @author Benedek Kupper + * @version 0.2 + * @date 2018-01-28 + * @brief STM32 eXtensible Peripheral Drivers configuration template + * + * Copyright (c) 2018 Benedek Kupper + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef __XPD_CONFIG_H_ +#define __XPD_CONFIG_H_ + +/* TODO step 1: specify device header */ +#include + +/* TODO step 2: enable desired used XPD modules error handling */ + +/* TODO step 3: specify power supplies */ +#define VDD_VALUE_mV 3300 /* Value of VDD in mV */ +#define VDDA_VALUE_mV 3300 /* Value of VDD Analog in mV */ + +/* TODO step 4: specify oscillator parameters */ +#define LSE_VALUE_Hz 32768 + +#endif /* __XPD_CONFIG_H_ */ diff --git a/Makefile b/Makefile index d006fa8..4a27072 100644 --- a/Makefile +++ b/Makefile @@ -25,7 +25,7 @@ include $(LWIPDIR)/Filelists.mk CORE = m4 SERIES = STM32F4 -BSP = BSP_STM32F4xx +BSP = BSP_$(SERIES)xx C_DEFS = @@ -92,7 +92,7 @@ ifeq ($(strip $(OS_DIR)),) C_INCLUDES += -IConfig -BUILD_DIR = build +BUILD_DIR = build_baremetal_$(SERIES) else ifeq ($(findstring FreeRTOS,$(OS_DIR)),FreeRTOS) # FreeRTOS @@ -123,7 +123,7 @@ $(wildcard $(OS_DIR)/portable/Common/*.c) \ $(wildcard $(OS_DIR)/portable/$(PORT_CORE)/*.c) \ $(wildcard Core/os/*.c) -BUILD_DIR = build_FreeRTOS +BUILD_DIR = build_FreeRTOS_$(SERIES) endif diff --git a/README.md b/README.md index 44b6e50..3f3b6a0 100644 --- a/README.md +++ b/README.md @@ -11,7 +11,7 @@ There are two possible supported software configurations: ## How to use -1. Build and flash the image on an STM32F4Discovery (easily portable to other STM32 targets) +1. Build and flash the image on an STM32F4DISCOVERY or a 32L476GDISCOVERY (easily portable to other STM32 targets) 2. Connect to PC via USB 3. Fix any driver issues, see below 4. Go to http://www.lwip.home