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Step 3.0 #20

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steven-murray opened this issue Aug 15, 2019 · 1 comment
Open

Step 3.0 #20

steven-murray opened this issue Aug 15, 2019 · 1 comment
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@zacharymartinot
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formal-test A formal Validation Test pipeline:pspec Tests the pspec pipeline component simcmp:eor:powerlaw Uses a power-law P(k) for EoR signal simcmp:sys:noise Simulation Component: Thermal noise simulator:hera_sim Uses the hera_sim simulator simulator:rimez Uses the RIMEz simulator status:active A formal test that is being actively worked on

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steven-murray commented Aug 15, 2019 •
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Discussion from telecon:

  • Noise levels basically just from RFI flagged channels
  • Not particular concerned about colored noise in largely non-flagged channels.
  • No calibration
@steven-murray steven-murray added this to the H1C IDR2 milestone Sep 27, 2019
@steven-murray steven-murray added formal-test A formal Validation Test simcmp:sys:noise Simulation Component: Thermal noise simulator:rimez Uses the RIMEz simulator simulator:hera_sim Uses the hera_sim simulator simcmp:eor:powerlaw Uses a power-law P(k) for EoR signal pipeline:pspec Tests the pspec pipeline component labels Sep 27, 2019
@steven-murray steven-murray added the status:active A formal test that is being actively worked on label Oct 28, 2019
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@jaguirre is this still something we want to do?

@steven-murray steven-murray removed this from the H1C IDR2 milestone Oct 12, 2021
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formal-test A formal Validation Test pipeline:pspec Tests the pspec pipeline component simcmp:eor:powerlaw Uses a power-law P(k) for EoR signal simcmp:sys:noise Simulation Component: Thermal noise simulator:hera_sim Uses the hera_sim simulator simulator:rimez Uses the RIMEz simulator status:active A formal test that is being actively worked on
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